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A Novel Non-Linear Transient Analysis for Phase-Locked Loop Design
Fref ref
LOOP +
Fosc PFD FILTER
VCO
PFD
Vpd Loop Vcntl VCO f osc
214 www.erpublication.org
International Journal of Engineering and Technical Research (IJETR)
ISSN: 2321-0869, Volume-2, Issue-12, December 2014
Sum = Sum + Tosc ;
end
pulsewidth = abs(Sum) ; sign = -1;
if previous_sign >0 #transition from Up to
Down
period = Tosc + pulsewidth; #correcting the period
else period = Tref ;
end
end;
end
215 www.erpublication.org
A Novel Non-Linear Transient Analysis for Phase-Locked Loop Design
R
Vpd Vcntl
Enlarged
As shown in Fig. 5
Fig. 6. The 1st order low pass filter.
216 www.erpublication.org
International Journal of Engineering and Technical Research (IJETR)
ISSN: 2321-0869, Volume-2, Issue-12, December 2014
=0.1
L
=0.3
=0.5
R
Vin
Vout
C
=0.7
Fig. 8. An equivalent RLC circuit.
Vout 1
(15)
Vin LCs 2 RCs 1 Fig. 9. The results of nonlinear transient analysis with damping factor,
RC p l
We then compare (25) with the standard damping equation as
follows:
0 l (26)
0.204 1
2 K Pll 2 p s 2
2s
1
To verify the model, the same circuit parameters are 02 0
applied to nonlinear transient analysis. The results are shown From eq. (25) and eq. (26), we can obtain
in Fig. 9. From the results, the loop frequency is about 1
p l 2 (27)
1/0.2610-5 = 3.85105 Hz, and =2f=2.42106 radians. We 0
compare the waveform to a standard damping waveforms 2 (28)
( l z )
which has curves with different damping factor = 0.1, 0.3, 0
0.5, and 0.7. The closest is between 0.1 and 0.3. Therefore,
both numbers agree with the small signal model calculations.
217 www.erpublication.org
A Novel Non-Linear Transient Analysis for Phase-Locked Loop Design
Fref
LOOP
Fosc PFD CP VCO
FILTER
218 www.erpublication.org
International Journal of Engineering and Technical Research (IJETR)
ISSN: 2321-0869, Volume-2, Issue-12, December 2014
Ipd Vcntl
R2
C1 C2
219 www.erpublication.org
A Novel Non-Linear Transient Analysis for Phase-Locked Loop Design
shown in Fig. 15. The damping factor, , is between 0.1 and Proc. IEEE Int. Symp. Circuits and Syst, vol. 1, pp. 375378, June
1999.
0.2, or about 0.15. The calculated is 0.15. From the [8] A. T. Yang and I. L. Wemple, Timing and Power Simulation for Deep
simulation results, the calculated frequency and damping Sub-Micron ICs, in Proc. IEEE Int. Symp. VLSI Technology, Systems,
factor are very close to the real ones. The proposed PLL and Applications, pp. 7986, June 1995.
[9] Y. Tang and M. Ismail, A methodology for fast SPICE simulation of
model is accurate to present the real circuit. Thus, the loop frequency synthesizers, IEEE J. Circuits and Devices Magazine, vol.
frequency and the damping factor can be derived from the 16, no. 4, pp. 1015, July 2000.
proposed small signal linear equations precisely.
VII. CONCLUSIONS
In this paper, a novel behavioral model that can handle two
widely different input frequencies and accompanied with a
non-near lock assumption PLL circuit for the digital phase
frequency detector (PFD) is proposed. The model can also
handle the dead zone of a PLL circuit as well. To reduce the Zhi-Ming Lin (S88M91) received his Ph.D. degree in
computation time, a new non-linear transient analysis is Electrical Engineering from the University of Maryland, College Park, in
1991. He is currently a Professor in the Department of Computer Science
proposed for PLL circuits. The analysis method takes few
and Information Engineering, National Changhua University of Education,
seconds to finish the calculations while HSPICE takes days to Changhua, Taiwan, R.O.C. His research interests include very large scale
finish a similar simulation. integration/computer aided design.
A new non-linear transient analysis method is applied to
simulate two regular PLL circuits. This new non-linear
transient analysis results indicated that we obtained the same
results as the traditional small signal model analysis.
In this behavioral model, a PLL circuit with a charge pump is
also simulated by using the non-linear transient analysis. Our
simulation results indicated that the loop frequency and the Po-Yu Kuo received his Ph.D. degree in Electrical
damping factor can be derived from the new small signal Engineering from the University of Texas at Dallas in 2011. He is currently
served as an assistant professor in the Department of Electronic Engineering
linear equations efficiently. Therefore, we believed that the in National Yunlin University of Science & Technology (NYUST), Douliou,
proposed non-linear transient analysis in this behavioral Taiwan, R.O.C. His research interests include the robust performance
model is very practical to simulate PLL circuits. By using the analysis of analog circuit under process variations, and analytical modeling
of analog circuits.
newly proposed method, the circuit designers can optimize
their PLL circuit parameters more efficiently comparing to
the HSPICE simulations.
ACKNOWLEDGMENT
The authors would like to appreciate the support from
Ministry of Science and Technology, Taiwan, under the Grant:
MOST 103-2221-E-224-079 and the technical support from Shu-Chung Yi received his Ph.D. degrees in Electrical
Engineering from National Taiwan University in 1998. He is currently an
the National Chip Implementation Center(CIC), Taiwan, associate professor in the Department of Computer Science and Information
R.O.C. Engineering, National Changhua University of Education, Taiwan, R.O.C.
His research interests include algorithms, VLSI architectures, and circuit
level techniques.
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