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Electrical Engineering (2005) :19

DOI 10.1007/s00202-005-0328-9

O R I G I N A L PA P E R

V.V. Terzija R.M.Ciric H. Nouri

A new iterative method for fault currents calculation which models


arc resistance at the fault location

Received: 16 July 2005 / Accepted: 9 August 2005 / Published online:


Springer-Verlag 2005

Abstract In order to calculate fault currents in distribution the protective device coordination is carried out, etc. In order
systems accurately, the fault model must also include the to calculate fault currents in distribution systems accurately,
electrical arc existing at the fault point and playing an impor- the value of the arc resistance existing at the fault location
tant role in the fault currents calculation. In the existing ap- must be known in advance. Statistically, arcing faults occur
proaches the value of the arc resistance at the fault location in over 80% of all faults, so the consideration of the arc resis-
must be known in advance. Since fault current depends on tance is essential. Since the fault current depends on the arc
the arc resistance, which is itself a non-linear function of resistance, which is itself a non-linear function of the fault
the fault current, the fundamental question here is how to current, the fundamental question here is how to calculate
calculate the arc resistance and the fault current at the fault the arc resistance and the fault current at the fault location
location simultaneously and accurately. In this paper, a new simultaneously and accurately.
solution for the above-defined problem by using an iterative By assuming a constant value for arc resistance, based on
procedure is given and thoroughly tested. A new method for experience (e.g., 0.5 ), or arrived at simply by neglecting
calculating short circuit currents in medium voltage distri- the arc existing at the fault location, the problem is directly
bution networks based on the iterative hybrid compensation solvable. The currents obtained by this are higher than those
short circuit method and a new formula for arc resistance are obtained when the arc resistance is included in the calculation
presented. The new method calculates short circuit currents procedure.
and arc resistance simultaneously. Results of fault analysis In this paper, a solution for the above mentioned problem
and arc resistance calculation in the IEEE-34 distribution net- by using an iterative procedure is presented and thoroughly
work with/without distributed generator are presented and tested. A new iterative method for short circuit currents cal-
discussed. culation in medium voltage distribution networks, based on
the hybrid compensation short circuit method and new a for-
Keywords Medium voltage distribution networks mula for arc resistance are presented. The original hybrid
Dispersed generators Fault currents calculation Arc compensation method uses the solution of the three-phase
resistance formula distribution power flow, as a pre-fault condition and performs
one backwardforward sweep to generate the post-fault state
1 Introduction after updating the hybrid current injections. The iterative pro-
cedure is the key point of the methodology proposed and
Calculation of short circuit currents in distribution networks an efficient approach for solving the problem of non-linear
is a very important task. Based on such studies, the switch- relationship between the arc resistance and the fault current.
gear components are designed, manufactured and installed, Compared to the existing methods in which the phenomenon
of arc resistance has been either totally neglected or solved by
V.V. Terzija (B) assuming an arbitrary constant arc resistance value, the new
ABB AG, ABB/PTPM-AS Oberhausener Str. 33 method offers a more realistic approach and at the same time
40472, Ratingen, Germany
Tel.: +49-2102-121770 more accurate short circuit currents calculation in medium
Fax: +49-2102-121255 voltage distribution networks.
E-mail: vladimir.terzija@de.abb.com Results of fault analysis and arc resistance calculation
in the IEEE-34 distribution network with/without distributed
R.M. Ciric H. Nouri
University of the West of England, Frenchay Campus,
generator are presented and discussed. The errors appeared in
Coldharbour Lane, Bristol BS16 1QY, UK fault currents due to neglect of the arc from the consideration
E-mail: rciric@netscape.net; hassan.nouri@uwe.ac.uk are analyzed and discussed.

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2 V.V. Terzija et al.

2 Hybrid compensation short circuit method For a three-line to ground fault (without ground
impedance), Vf(s) is equal to 0, and the fault voltage mismatch
Methods for short circuit analysis in distribution networks use Vf is given as
symmetrical components or phase network representation (o)
[1, 2]. The main advantage of conventional symmetrical com- Vfa Vfa
ponent methods for fault analysis is that the three sequence Vfb = V (o) (3)
fb
matrices are treated separately [2]. However this group of Vfc Vfc(o)

methods does not enable the exactly modeling four-wire dis-


tribution networks and cannot be applied in the unbalanced For a single-line to ground or double-line to ground fault
and/or unsymmetrical network configurations. On the other (without ground impedance), Vf is equal to Vf(o) , as well.
hand, several efficient methods for fault analysis in phase The corresponding vector size of Vf is 11, or 21, respec-
domain are proposed [37]. tively.
The distribution short circuit analysis approach based on For a line-to-line fault without impedance between phases
the hybrid compensation method [7] uses the solution of b and c, the fault boundary condition is given as
three-phase distribution power flow as a pre-fault condition    
Vfb 1 Vfb(o) + Vfc(o)
and performs one backwardforward sweep to generate the = (4)
postfault state after updating the hybrid current injections.
Vfc 2 Vfb(o) Vfc(o)
A typical fault analysis method requires the creation of a fault After solving Eq. 1 for fault currents If , the node current
Thevenin equivalent impedance matrix. The hybrid compen- injections of phases a, b, and c are updated by adding the
sation method uses compensation method in phase coordi- post-fault current injections with the pre-fault node current
nates. The method combines three basic compensations, i.e., injections. The pre-fault node current injections of phases a,
the loops break-point compensation, the embedded gener- b, and c are obtained from the power flow solution [8]. For
ation compensation, and the fault compensation [7]. In this the three-line to ground fault, at the three-phase line section,
paper only the compensation for fault is explained. In [7], the the post-fault current injections are given as follows:
compensation concept for loops and generators is explained
(p)
in detail. Ifa I
(p) fa
The Thevenin equivalent is calculated from the following Ifb = I fb (5)
equation (p)
Ifc I fc
[Zf ] [If ] = [Vf ] , (1) (p)
where If are the post-fault phase current injections which
where If is the complex vector of the fault currents, Vf is the will be added to faulted nodes, and If are the fault currents
vector of fault voltage mismatches at the faulted nodes, and obtained by solving Eq. 1.
Zf is the complex fault equivalent impedance matrix with a
size of the sum of faulted phases at each node (for single or
simultaneously faulted node).
The diagonal elements of the hybrid Thevenin equivalent
matrix are equal to the sum of the line section impedance
between the compensation (fault) nodes and the root node.
If two faulted nodes i and j (the simultaneous faults) have
completely different paths to the root node, then the off-diag-
onal entry Zij is zero. If i and j share any common path to
the root node, then Zij is equal to the sum of all line section
impedance matrices on the common path.
In Eq. 1 the right-hand side is the voltage mismatch vector
for fault nodes. The compensation method uses power flow
solution as pre-fault condition, and generates the post-fault
state after updating the current injections. To update the cur-
rent injections, the Eq. 1 should be solved for currents If .
The appropriate fault boundary conditions should be applied
for calculating different types of fault (2),
(s) (o)
Vfa Vfa Vfa
Vfb = V (s) V (o) (2)
fb fb
Vfc (s)
Vfc Vfc(o)

where Vf is the voltage mismatch vector from Eq. (1), Vf(s) is


the scheduled voltage (fault boundary condition), and Vf(o) is
the pre-fault voltage at the faulted node. Fig. 1 Flow chart of the hybrid compensation short circuit method

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A new iterative method for fault currents calculation which models arc resistance at the fault location 3

33

14 31

11 28
9 26
24
10
1 2 3 5 6 7 8 13 21 23 25 27 30
0
4 19 20 22 29

17 32

12 15 16 18
Fig. 2 IEEE 34 node 24.9 kV test distribution network


(p)
Table 1 Results obtained in IEEE 34 DN without distributed generation Ifa 0
(p)
Fault type Node Ra () If (A) Ifb = Ifb (6)
(p)
Ifc Ifc
Single-line-to-ground (a) 2 0.5 1,865
5 1.1 774
15 1.7 494 For a single-line to ground fault on phase a, the post-fault
23 2.3 378 (p)
30 2.5 350
current injection If is expressed as
Line-to-line (b, c) 2 <0.1 33,348
(p)
33,320 Ifa I
5 0.4 2,020 (p) fa
1,995 Ifb = 0 (7)
(p) 0
15 0.8 1,090 I fc
1,069
23 1.1 792 Once the post-fault current injections at all simultaneously
776
30 1.1 750 faulted nodes are obtained, the post-fault line section currents
749 and node voltages are calculated by using a single backward
Double-line-to-ground (b, c) 2 <0.1 33,365 forward procedure of the power flow method [8]. Figure 1
33,311 presents a flow chart of the hybrid compensation short cir-
5 0.4 1,990
2,054 cuit method [7]. The method combines the following three
15 0.8 1,062 basic compensations: the loops break-point compensation,
1,122 the embedded generation compensation, and the fault com-
23 1.1 767 pensation. The hybrid Thevenin equivalent is applied and
1.0 820
30 1.2 695
equivalent matrix Zt , currents It , and voltage mismatches
1.2 690 Vt are used rather than Zf , If , and Vf .
Three-line-to-ground 2 <0.1 35,443
39,428
38,072
5 0.6 1,356
1,511 3 Arc resistance formula
1,476
15 1.0 1,136
0.9 1,270 Based on experimental testing in a high power test labora-
1.0 1,241 tory and exhaustive analysis and processing of digitized arc
23 1.0 826 voltage and current signals, a new formula for arc resistance
0.9 919 calculation is derived as follows [9]:
0.9 901
30 1.1 792
1.0 880 2 2 Ea L
R= (8)
1.0 861 I
where R is the arc resistance in , L is the arc length in
For a double-line to ground fault or line-to-line fault meter, I is the arc current in A, and Ea is the arc voltage gra-
(p)
between phases b and c, the post-fault current injections If dient in V/m. The open literature [10,11] offers the following
can be expressed as expressions for Ea calculation:

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4 V.V. Terzija et al.

Table 2 Results obtained in IEEE 34 DN with DG at node 23 4 Algorithm for fault currents and arc resistance
Fault type Node Ra () If (A) calculation
Single-line-to-ground (a) 2 0.5 1,826
5 1.2 702 From Eq. 12 it follows that fault currents depend on arc resis-
15 2.0 426 tance, which is a non-linear function of the fault current. The
23 0.8 1,123 problem is how to calculate the arc resistance and the fault
30 0.8 1,083 current simultaneously and accurately.
Line-to-line (b, c) 2 <0.1 33,347
33,322 This paper presents a new method for calculating short
5 0.4 2,022 circuit currents in medium voltage distribution networks based
1,993 on iterative hybrid compensation short circuit method, and
15 0.8 427 a new formula for arc resistance . An iterative procedure is
472 the key to the methodology proposed and it is an efficient
23 0.7 1,268
1,303 approach for solving the problem of non-linear relationship
30 0.7 1,200 between the arc resistance and the fault current. Through the
1,244 iterative procedure the new method calculates short circuit
Double-line-to-ground (b, c) 2 <0.1 33,363 currents and arc resistance simultaneously.
33,314
5 0.4 2,011 The proposed iterative procedure for fault currents and
2,029 arc resistance calculation can be presented through the fol-
15 0.8 1,083 lowing steps (here k is an iteration index):
1,102
23 0.5 1,582 1. Set the start value of arc resistance, Ra (k=1) = 0;
0.8 1,021 2. Calculate the fault current, If (k=1), by using the com-
30 0.6 1,515 pensation short circuit method and the arc resistance at
0.9 961
Three-line-to-ground 2 <0.1 35,442 the fault location assumed in the k-th step;
39,383 3. Increment the iteration index: k = k + 1;
38,139 4. Calculate the arc resistance Ra (k) using Eq. 12 and the
5 0.6 1,357 fault current at the fault location calculated in the previ-
1,504 ous step;
1,482
15 0.8 1,139 5. Calculate the fault current, If (k), using the updated
0.7 1,260 impedance matrix, Zt , which includes the arc resistance
0.7 1,248 Ra (k) at the fault location;
23 0.6 1,385 6. Test the accuracy criterion, if |Ra (k) Ra (k 1)| >
1,405
1,438 (= 0.0001), then go to Step 3, else stop the procedure
30 1.1 1,381 and print the results.
1.0 1,400
1.0 1,430
5 Test network

The proposed methodology for arc resistance calculation is
1, 200
Ea = (V/m) (9) applied to the modified IEEE 34-node radial, overhead dis-
1, 500 tribution network (IEEE 34 DN) [12] (see Fig. 2). The base
Ea = 950 + 5, 000/I (V/m) (10) voltage of the network is Vb = 24.9 kV, and the reference volt-
age in the substation HV/MV is Vref = 25.647 kV. For the sim-
Equations (9) and (10) can be included in (8), so the following plicity reason the in-line auto transformer 24.9/4.16 kV/kV
two equations for arc resistance can be obtained: in original IEEE 34 DN-test feeder is replaced with the line
and the network is modeled with the single voltage level.

The automatic voltage regulator is not modeled, as well. The
1, 080.4 L load and line data of the test network are given in [13]. In
R1 = (11)
1, 350.5 I all simulations it is assumed that in Eq. 12 the arc length is

L = 1m and that it is a constant value. In order to analyze
855.3 4501.6
R2 = + L (12) the fault currents and arc resistances in the IEEE 34 DN with
I I2 dispersed generator, a generator at node 23 is introduced and
modeled as a PV node. The generator data are as follows:
In this research the more complex Eq. 12 for arc resistance real power Pg =300 kW, calculated reactive injected power
calculation is used. It can be noticed that the arc resistance is Qg =134.5 kV Ar, set generator voltage Vg =25.100 kV. The
a nonlinear function of the arc (fault) current. In addition, it internal impedance of the generator is Zg = (0.6 + j 1.5) 
depends on the arc length and suitable parameters stemming /phase and the system equivalent impedance at the substation
from the expressions for the arc voltage gradient. HV/MV ( /grounded Y) is Zsys = (5 + j 5)  /phase.

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A new iterative method for fault currents calculation which models arc resistance at the fault location 5

2000
without DG
with DG
fault current (A) 1500

1000

500

0
0 5 10 15 20 25 30
node
Fig. 3 Fault currents for single-line-to-ground fault at different nodes

4
without DG
with DG
Arc resistance (Ohm)

0
0 5 10 15 20 25 30
node
Fig. 4 Arc resistances for single-line-to-ground fault in different nodes

105
without DG
with DG
fault current (A)

104

103

0 5 10 15 20 25 30
node
Fig. 5 Fault currents for line-to-line fault in different nodes

6 Illustrative test examples the calculated value of the arc resistance for a selected fault
type and faulted node. In the case of line-to-line fault and
The results of fault analysis and arc resistance calculation in double-line-to-ground fault, the algorithm delivers two val-
the IEEE 34 DN without/with distributed generator are pre- ues of fault currents and two values for arc resistance. In the
sented in Tables 1, 2 respectively. The constant admittance case of three-line to ground fault, three phase currents and
load modeling approach is applied. Four types of fault (sin- three values for arc resistance are obtained.
gle-line-to-ground, line-to-line, double-line-to-ground and The error Er in fault current calculation due to neglect of
three-line-to-ground) at different nodes of IEEE 34 DN are the arc was calculated as follows:
simulated. In Tables 1 and 2 the If represents the calculated
If IfARC
value of fault current at the fault location, whereas the Ra is Er(%) = 100% (13)
IfARC
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6 V.V. Terzija et al.

0
10

Arc resistances (Ohm)

10-1
without DG
with DG
0 5 10 15 20 25 30
node
Fig. 6 Arc resistances for line-to-line fault in different nodes

105
without DG
with DG
fault current (A)

104

103

0 5 10 15 20 25 30
node
Fig. 7 Fault currents for double-line-to-ground fault in different nodes

100
Arc resistances (Ohm)

10-1
without DG
with DG
0 5 10 15 20 25 30
node
Fig. 8 Arc resistances for double-line-to-ground fault in different nodes

where If is the fault current at the feeder terminal with arc nodes. Consequently arc resistance is decreased in case of
neglected, and IfARC is the fault current at the feeder terminal the faults at the generator node and the neighboring nodes.
with arc included in the calculation. The errors in fault current calculation due to neglect of
The calculated values of arc resistances were in the range arc were mostly in the range of 212%. The largest error
of 0.12.3  . The largest values of arc resistance are obtained is obtained in the case of single-line-to-ground fault (12%),
in case of single-line-to-ground fault far from the substation while the smallest error is calculated in case of double-line-
HV/MV. In all cases, the required algorithm accuracy (crite- to-ground fault (2%). The errors as well as arc resistance
rion = Ra < 0.01 ) is obtained after several iterations. increase as faults occur closer to the end of the feeder. That
Distributed generator at node 23 significantly increases was expected, since the fault currents decrease as the faults
the fault currents at the generator node and the neighboring occur closer to the end of the feeder.

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A new iterative method for fault currents calculation which models arc resistance at the fault location 7

105
without DG
fault current (A) with DG

104

103

0 5 10 15 20 25 30
node
Fig. 9 Fault currents for three-lines-to-ground fault in different nodes

10 0
Arc resistances (Ohm)

10 -1
without DG
with DG
0 5 10 15 20 25 30
node
Fig. 10 Arc resistances for three-lines-to-ground fault in different nodes

15

10
Error (%)

0
0 5 10 15 20 25 30
node
Fig. 11 Error in fault current due to neglect of arc for single-line-to-ground fault at different nodes

Figures 310 show, respectively the distribution of fault Figure 11 presents errors in fault currents due to neglect
currents and arc resistance from Tables 1 and 2 over the dis- of arc at the fault location for single-line-to-ground fault at
tribution network from Fig. 2. These figures offer a better different nodes of the IEEE 34 DN (see Eq. 13)
overview of the fault currents distribution.It is obvious that In this research the robustness and the convergence speed
for closed faults, higher currents are obtained and vice versa. of the proposed algorithm for arc resistance calculation are
Consequently, for higher currents, the smaller values for arc also investigated. The proposed algorithm showed excellent
resistance, according to Eq. 12 are obtained. Thus, for remote convergence properties since the satisfactory arc resistance
faults and the case without DG, the higher arc resistances mismatch in all considered simulations were obtained after
are obtained. 23 iterations (Ra < 0.01 ).

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8 V.V. Terzija et al.

0.5

Arc resistance (Ohm) 0.4

0.3

0.2

0.1

0.0
0 1 2 3 4 5 6 7
iteration index
Fig. 12 Convergence characteristics of algorithm for arc resistance calculation

4
direct grounded
over resistance
Arc resistance (Ohm)

3
over impedance

0
0 1 2 3 4 5 6 7
iteration index
Fig. 13 Convergence characteristics of the algorithm for arc resistance calculation sensitivity to grounding of the neutral point

Figure 12 presents the algorithm convergence process The impact of dispersed generation on fault currents and arc
for calculating arc resistance for single-line-to-ground fault resistance in the IEEE 34 distribution network is also inves-
at node 2. It is obvious that after 23 iterations the algorithm tigated.
converges. There was no case of algorithm divergence. Calculated values of arc resistance after the fault in the
In this research, the impact grounding the neutral point considered IEEE-34 distribution network were in the range of
of the supply transformer on the convergence speed of the 0.12.3  . The largest values of arc resistance were obtained
proposed algorithm for arc resistance calculation, is also in the case of single-line-to-ground faults far from the substa-
investigated. Figure 13 presents the algorithm convergence tion HV/MV (remote faults). In all cases, satisfactory values
for arc resistance calculation, regarding three types of ground- for arc resistance were obtained after 23 iterations (with the
ing of the neutral point of supply transformer (direct grounded, accuracy criterion = Ra < 0.01 ). Distributed gener-
grounded via resistance Rgr =40  and grounded via ator at node 23 significantly increases fault currents at the
impedance Zgr = (1 + j 40) ). The expected results are generator node and the neighboring nodes of the distribution
obtained. For the case of the directly grounded transformer, network. Consequently, the arc resistance is decreased in case
the highest currents and corresponding smallest arc resis- of the faults at the generator node and the neighboring nodes.
tances are obtained. The errors in fault current calculation due to neglect of arc
were in the range of 212%. The largest error is obtained in
the case of single-line-to-ground fault (12%), while the small-
7 Conclusion est error occurred in case of double-line-to-ground fault (2%).
The errors as well as the arc resistance increase when faults
This paper presents a new method for fault analysis in medium occur far from the substation HV/MV. This was expected
voltage distribution networks considering arc resistance is since the fault currents decrease when the faults occur closer
presented. The proposed iterative method for simultaneous to the end of the feeder.
calculation of arc resistance and fault currents is based on Compared to the existing fault analysis methods, in which
the hybrid compensation method and the new formula for arc the phenomenon of arc resistance has been totally neglected
resistance calculation. The proposed methodology is applied or solved by assuming a suitable constant arc resistance value,
on the IEEE 34 node radial, overhead distribution network.

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A new iterative method for fault currents calculation which models arc resistance at the fault location 9

the new method offers the more realistic approach and the 6. Brandwajn V, Tinney WF (1985) Generalised method of fault anal-
more accurate calculation of short circuit currents in medium ysis. IEEE Trans Power Appar and Syst PAS-104(6):13011306
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bution short circuit analysis approach using hybrid compensation
method. IEEE Trans Power Syst 10(4):20532059
8. Cheng CS, Shirmohammadi D (1995) A three-phase power flow
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