Charge Pump 2

This article has been accepted for publication in a future issue of this journal, but has not been
fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2016.2594016, IEEE
Transactions on Power Electronics
A High-Voltage-Gain DC-DC Converter Based on

Modified Dickson Charge Pump Voltage Multiplier
Bhanu Prashant Baddipadiga, Student Member, IEEE, Mehdi Ferdowsi, Member, IEEE
Abstract - A high-voltage-gain dc-dc converter is TABLE I

HIGH-VOLTAGE-GAIN CONVERTERS USING BOOST STAGE AND VOLTAGE
introduced in this paper. The proposed converter MULTIPLIER CIRCUITS
resembles a two-phase interleaved boost converter on its
input side while having a Dickson charge pump based Topology [8] [9] [10] [11]
No. of
voltage multiplier on its output side. This converter offers 1 1 2 2
switches
continuous input current which makes it more appealing No. of
for the integration of renewable sources like solar panels 1 1 2 2
inductors
to a 400-V dc bus. Also, the proposed converter is capable No. of
4 3 3 3
of drawing power from either a single source or two capacitors
No. of
independent sources. Furthermore, the voltage multiplier diodes
4 3 3 4
used offers low voltage ratings for capacitors which
3 d 2 3 d 1
d 1 d
potentially leads to size reduction. The converter design Vout/Vin
1 d 1 d 1 d
and component selection has been discussed in detail with
supporting simulation results. A hardware prototype of VSwitch/Vout
1 1 1
1 d , d
3 d 2 3 d
the proposed converter with Vin=20V and Vout=400V has Input
been developed to validate the analytical results. Discontinuous Continuous Discontinuous Continuous
current
Index Terms - Voltage multiplier, modified Dickson proposed in [8-11]. Table I summarizes these converters
charge pump, high-voltage-gain dc-dc power electronic based on their individual component count, voltage gain, and
converter voltage stress on their switches. The second order hybrid
boosting converter proposed in [8] offers relatively low
I. INTRODUCTION voltage gain in comparison to its voltage multiplier
Distribution systems at 400-V dc have been gaining component count. It also has a very large input current ripple
popularity as they offer better efficiency, higher reliability at in proportion to its average. High step-up converters using
an improved power quality, and low cost compared to ac single-inductor-energy-storage-cell-based switched capacitors
distribution systems [1-4]. They offer a simpler integration of proposed in [9] do not offer voltage gains high enough to
renewable energy and energy storage systems. Currently, boost a 20V input to 400V at an reasonable switching duty
telecom centers, data centers, commercial buildings, cycle. The multiple-inductor-energy-storage-cell-based
residential buildings, and microgrids are among the emerging switched capacitor based high voltage converters [9] offer a
examples of dc distribution systems [5-7]. One of the relatively low voltage gain in proportion to its component
challenges facing such systems is the power electronic count. The switched-capacitor-based active-network
converters for integrating renewable sources into the 400-V converter proposed in [10] has a discontinuous input current
dc bus. A typical voltage range for solar panels is between ripple due to the series and parallel connection of the
20V dc to 40V dc. Stepping up these voltages to 400-V dc inductors in its two modes of operation. The transformer-less
using classic boost and buck-boost converters requires high high-gain boost converter proposed in [11] offers continuous
duty ratios which results in high component stress and lower input current but the switches experience a high voltage stress
efficiency. Therefore, a typical choice would be using two more than 2/3rd of its output voltage.
cascaded converters; which results in inefficient operation, High-voltage-gain dc-dc converters using coupled
reduced reliability, increased size, and stability issues. inductors and high frequency transformers have been
Isolated topologies like flyback, forward, half-bridge, full- proposed for the integration of solar panels to 400V dc bus
bridge, and push-pull converters have discontinuous input [12-18]. In such converters, the design of high frequency
currents and hence would require large input capacitors. transformers and coupled inductors is complicated as the
High-voltage-gain dc-dc converters using a boost stage leakage inductance increases when higher voltage gains are
followed by voltage multiplier (VM) cells have been intended. As a result, the converter switches experience large
Manuscript submitted Mar. 8th, 2016; revised May 3rd, 2016; accepted
voltage spikes and therefore would require clamping circuitry
July 10th, 2016. to reduce the voltage stress on the switches. These clamping
Bhanu Prashant Baddipadiga and Mehdi Ferdowsi are with the Electrical circuits have a negative effect on the converter voltage gains.
and Computer Engineering department at Missouri University of Science and A family of non-isolated high-voltage-gain dc-dc converters
Technology, Rolla, MO - 65401, USA. (e-mail: bbt68@mst.edu;
ferdowsi@mst.edu )
0885-8993 (c) 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2016.2594016, IEEE
1st 2nd 3rd 4th Interleaved Boost Stage Voltage Multiplier Circuit
L1 Stage Stage Stage Stage L1 A
-
+
S1 C2 C4 Vin1 S1 C2 C4 +
D1 D2 D3 D4 Dout -D D3 Dout
D1 2
N
-
+
C1 C3 S2 C1 C3 +
+ Vin2 +
L2 L2 - Cout vout R
Cout vout R B
-
Vin -
S2
Fig. 3. Proposed high-voltage-gain dc-dc converter

Fig. 1. High-voltage-gain dc-dc converter proposed in [19]
A Mode-I Mode-II Mode-I Mode-III
Ts
C2 C4 S1
d1Ts
VAB D1 D2 D3 D4 Dout
t
+
vout R
S2
C1 C3 Cout
- d2Ts
B
t
Ts
(a) Dickson charge pump
A Fig. 4. Input boost converter switching signals for the proposed converter
C2 C4
converter has been derived in section IV. Section V analyzes
D1 D2 D3 Dout
the component stress and provides supporting simulation
VAB results. Section VI discusses the experimental results
+ obtained using the hardware prototype. A comparative
C1 C3
Cout vout R analysis of the proposed converter and the high-voltage-gain
B - converter shown in Fig. 1 has been discussed in section VII.
Finally, section VIII concludes the paper.
(b) Modified Dickson charge pump
Fig. 2. Conventional and modified Dickson charge pump voltage multiplier
II. MODIFIED DICKSON CHARGE PUMP VOLTAGE
circuits MULTIPLIER
The Dickson charge pump voltage multiplier circuit [20]
that makes use of VM cells derived from the Dickson charge shown in Fig. 2a offers a boosted dc output voltage by
pump (see Fig. 1) has been proposed in [19]. The voltage charging and discharging its capacitors. The input voltage
rating of each VM cell capacitor is twice that of its previous (VAB) is a modified square wave (MSW) voltage. The
VM cell. Also, the inductors (L1, L2) and switches (S1, S2) voltages of the capacitors in the Dickson charge pump double
experience different current stresses whenever even number at each stage as one traverses from the input side capacitor C1
of VM cells is used. to the load side capacitor C4. For an output voltage of Vout =
A high-voltage-gain dc-dc converter based on the modified 400V, the voltages of capacitors C1, C2, C3, and C4 are 80V,
Dickson charge pump voltage multiplier circuit is introduced 160V, 240V, and 320V respectively.
in this paper. This converter is capable of stepping up The authors propose to make a slight modification to the
voltages as low as 20V to 400V. The proposed converter Dickson charge pump circuit as shown in Fig. 2b. For a same
offers continuous input current and low voltage stress (1/4 th output voltage, the voltages of all the capacitors in the
of its output voltage) on its switches. This converter can draw modified Dickson charge pump are smaller than the voltage
power from a single source or two independent sources while of capacitor C2 in the Dickson charge pump. For an output
having continuous input currents, which makes it suitable for voltage of Vout = 400V, the voltages of capacitors C1, C2, C3,
applications like solar panels. Compared to the topology and C4 are only 150V, 50V, 50V, and 150V, respectively
presented in [19], the proposed converter requires lower Therefore the volume of the capacitors used in the proposed
voltage rating capacitors for its VM circuit and also one less modified Dickson charge pump voltage multiplier circuit is
diode. The inductors and switches experience identical potentially less compared to the Dickson charge pump.
current stresses making the component selection process for
the converter simpler. III. TOPOLOGY AND MODES OF OPERATION
In section II, the modified Dickson charge pump voltage The proposed converter provides a high voltage gain using
multiplier circuit has been discussed. Section III introduces the modified Dickson charge pump voltage multiplier circuit
modes of operations. The voltage gain of the proposed (see Fig. 3). On a closer look, it can be seen that the converter
vL1 A and the output diode Dout is reverse biased. Therefore, the
L1 iL1 load is supplied by the output capacitor.

Vin1 S1 C2 C4 VC4 B. Mode II
VC2
D D3 Dout In this mode, switch S1 is OFF and switch S2 is ON. Diodes
D1 2
N D1 and D3 are OFF as they are reverse biased while diodes D2

and Dout are ON as they are forward biased (see Fig. 6). A
S2 C1 VC1 C3 VC3
Vin2
vout R
part of inductor current iL1 flows through capacitors C2 and C3
vL2 Cout
B
and thereby charging them. The remaining current flows
L2 i through the capacitors C4 and C1 discharging them to charge
L2
the output capacitor Cout and supply the load.

Fig. 5. Proposed converter operation in mode-I
C. Mode III
vL1 A In this mode switch S1 is ON and switch S2 is OFF (see
L1 iL1
Fig. 7). Diodes D1 and D3 are ON as they are forward biased

Vin1 S1 C2 VC2 C4 VC4 while diodes D2 and Dout are OFF as they are reverse biased.
D D3 Dout Inductor current iL2 flows through diode-capacitor voltage
D1 2
N
multiplier cell capacitors C1, C2, C3, and C4. Capacitors C1
and C4 are charged while discharging capacitors C2 and C3. In
S2 C1 VC1 C3 VC3
Vin2

this mode, the output capacitor supplies the load.
vL2 B
Cout vout R

L2 i IV. VOLTAGE GAIN OF THE CONVERTER
L2
In the proposed converter, the input power is transferred to

Fig. 6. Proposed converter operation in mode-II the output by charging and discharging the voltage multiplier
vL1 A circuit capacitors. For an ideal converter shown in Fig. 3, the
L1 iL1 voltage gain of the converter can be derived as described

Vin1 S1 below. For inductors L1 and L2, the average voltage across the
C2 VC2 C4 VC4

inductors according to volt-second balance can be written as
D1 D2 D3 Dout
N VL1 VL2 0 (1)

S2 C1 VC1 C3 VC3 From Fig. 6, based on the volt-second balance of inductor L1,
Vin2
vL2

Cout vout R one can write
B Vin1
L2 i V AN VC 2 VC 3 Vout VC1 VC 4 (2)
L2
(1 d1 )
Fig. 7. Proposed converter operation in mode-III

where d1 is the duty cycle of switch S1. From Fig. 7, based on
the volt-second balance of the inductor L2, one can write
is made up of two stages. The first stage is a two-phase Vin2
VBN VC1 VC 2 VC 4 VC 3 (3)
interleaved boost converter which outputs an MSW voltage (1 d 2 )
between its output terminals A and B. The second stage is the Assuming capacitors C2 and C3 are identical, the voltage
modified Dickson chare pump voltage multiplier circuit that across them would be equal and can be written as
boosts the MSW voltage (VAB) to provide a higher dc output VC 2 VC 3
1 V
in1
voltage. The gating signals of the two interleaved boost stage 2 (1 d1 )
(4)
switches S1 and S2 are shown in Fig. 4. For the proposed By substituting (4) in (3), one can derive capacitor voltages
converter to operate normally, both switches S1 and S2 must VC1 and VC4 to be
have an overlap time where both are ON and also one of the 1 V Vin2
VC1 VC 4 in1 (5)
switches must be ON at any point of time. This can be 2 (1 d1 ) (1 d 2 )
achieved by using duty ratios of greater than 50% for both the Finally, the output voltage is derived by substituting (5) in (2)
switches and having them operate at 180 degrees out of phase which yields
from each other. As can be seen from Fig. 4, such gate 2 Vin1 2 Vin2
signals lead to three different modes of operation which are Vout (6)
(1 d1 ) (1 d 2 )
explained as follows.
The proposed converter can be supplied from two inputs
A. Mode I (see Fig. 3) as well as using only one input source. When a
In this mode, both switches S1 and S2 of the two-phase single input is used for the proposed converter, switches S1
interleaved boost converter are ON (see Fig. 5). Input sources and S2 have the same switching duty cycle d and are 180
Vin1 and Vin2 charge inductors L1 and L2 respectively. Inductor degrees out of phase from each other. The proposed converter
currents iL1 and iL2 both increase linearly. All the diodes of with single source is shown in Fig. 8. The multiplier circuit
the voltage multiplier circuit are reverse-biased and hence capacitor voltages and the output voltage are simplified as
OFF. The voltages of the multiplier capacitors remain same shown below.
1 Vin L1 A
VC 2 VC 3 (7)
2 (1 d ) -
+
3 Vin S1 C2 C4
VC1 VC 4 (8) +
2 (1 d ) Vin D1
-D
2 D3 Dout
N
4 Vin
Vout
-
(9) +
(1 d ) S2 C1 C3 +
+
A 20-V input source at 80% switching duty cycle will L2 - Cout vout R
B
-
generate an output voltage of 400V using the proposed
converter in Fig. 8. Capacitors C1 and C4 are charged to 150V
and capacitors C2 and C3 are charged to 50V.
Fig. 8. Proposed converter with single input source
V. COMPONENT STRESS AND SIMULATION RESULTS TABLE II
This section discusses the voltage and current stresses SIMULATION PARAMETERS
observed by different components and also provide
Parameter Value
simulation waveforms during steady-state operation of the Input Voltage 20 V
proposed converter. The discussions in this section are based Output Voltage 400 V
on the topology shown in Fig. 8, i.e., using a single voltage Load Resistance 800
source to power the converter while operating both switches Duty cycle of switches S1 and S2 80%
S1 and S2 of the two-phase interleaved boost stage at a fixed Switching Frequency - fsw 100 kHz
Boost Inductors L1 and L2 100 H
duty cycle d. A simulation model of the proposed converter VM capacitors 60 F
has been built in PLECS blockset of MATLAB. The Output Capacitor 22 F
parameters used in the simulation are given in Table II.
A. Inductor
The inductor currents in both phases of the interleaved
boost stages are similar. The average inductor currents can be
calculated using (10). The rms value of the inductor currents
used in the calculation of inductor copper losses can be
calculated as shown in (11).
2 I out
I L1, avg I L2, avg (10)
(1 d )
2
2 I out
2
Vin d
I L1, rms I L2, rms
(11)
1 d 2 3 L f sw

The inductance required for a current ripple of IL is given by

Vin d
L1 L2 L (12)
I L f sw
Fig. 9. Inductor L1 and L2 current and voltage waveforms, Input current
From (10), (11), and (12), it is observed that both the
inductors carry same amount of current and require same converter operating at 200W is shown in Fig. 9. It can be seen
inductance for an assumed current ripple. Therefore, a similar that the ripple of the input current is about 1.2A even though
inductor can be used for both L1 and L2. Moreover as the rms inductor currents iL1 and iL2 have a ripple of 1.6A each. The
currents of inductors L1 and L2 are equal, minimal conduction reason for this smaller input current ripple is both the boost
losses can be achieved in the inductors compared to other switches being operated 180 degrees out of phase from each
similar converters (see Fig. 1) having different values of other.
currents flowing through their boost stage inductors. The
C. Switches
inductor current and voltage waveforms obtained from
The maximum voltage observed across the switches in the
PLECS simulation are shown in Fig. 9. At 200W of output
proposed converter is equal to the output of its boost stage.
power, both the inductors carry a current of 5A with a ripple
This is a small number compared to the high output voltage
of 1.6A in each.
of the proposed converter. The switch blocking voltages can
B. Input Current be calculated using (13). As current in both the inductors is
The input source is connected to an interleaved two-phase the same, the current stress on both switches is same as well.
boost stage. Since it is a boost converter on the input side, the The average current in the switches can be calculated using
input current is continuous. As the two phases of the (14).
interleaved boost are 180 degrees out of phase from each VS1 VS 2
Vin
other, the input current ripple is even smaller. This greatly (1 d )
(13)
reduces the size of the input filter capacitor required for the 2 I out
converter. The input current waveform of the proposed I S1,avg I S 2,avg (14)
(1 d )
maximum voltage stress seen on both switches is only 100V.

Both switches S1 and S2 carry an average current of 5A.
D. Diodes
The diodes experience two times higher blocking voltages
compared to the switches as it depends on the voltages of the
voltage multiplier circuit capacitors. In this topology, all the
diodes experience the same blocking voltage which can be
calculated using (15). The average current in the diode can be
calculated using (16). Since all the diodes experience same
maximum voltage stress, similar diodes can be used for all of
them.
(a) Switch S1 (b) Switch S2 2 Vin
VD1 VD2 VD3 VDout (15)
Fig. 10. Switch voltage, current and gate signal waveforms (1 d )
I D1,avg I D2,avg I D3,avg I Dout,avg Iout (16)

The voltage and current waveforms of diodes D1, D2, D3,
and Dout in the proposed converter are shown in Fig. 11. For
the converter operating at 80% switching duty cycle and 20V
input, the maximum blocking voltage seen by the diodes is
200V. The diodes conduct either only during mode II or
mode III of the converter operation. All the diodes carry an
average current of 0.5A which is equal to the output current.
Diodes D2 and Dout have different current waveforms. This is
because of the voltage imbalance in the capacitors during the
start of mode II. Only diode Dout initially conducts in order to
(a) Diode D1 (b) Diode D2 charge the output capacitor and bring in a balance in the
voltage. Once the voltage loops are balanced, then the current
flowing through the diodes is dependent on the impedance of
the capacitors.
VI. EXPERIMENTAL RESULTS

A hardware prototype of the proposed converter was built
to test and validate the proposed converter operation. The
specifications of the components used for building the
hardware prototype are given in Table III. The power rating
of the converter is 400W with an input voltage of 20V and an
output voltage of 400V. The proposed converter is tested at a
switching frequency of 100 kHz.
(a) Diode D3 (b) Output Diode Dout
A theoretical loss analysis is performed using the ratings of
Fig. 11. Diode voltage and current waveforms the selected components of the hardware prototype. The
converter is assumed to operate at 200W of output power.
TABLE III
COMPONENT SPECIFICATIONS OF THE HARDWARE PROTOTYPE The calculated losses include conduction losses in inductors
L1 and L2, conduction and switching losses in switches S1 and
Component Name Rating Part No
S2, conduction and reverse recovery losses in diodes, and
100 H, DCR=11 conduction losses in the ESR of the capacitors. The
Inductor L1, L2 CTX100-10-52LP
m
conduction losses in the inductors are calculated as

150 V, 43 A,
MOSFET S1,S2 IPA075N15N3G
Rds(on)=7.5 m PL _ Cond I L1,rms2 RL1, DCR I L2,rms2 RL2, DCR (17)
D1, D2, D3, 250 V, 40 A,
Diode MBR40250T
Dout VF=0.97 V The conduction and switching losses in the switches are
VM C1, C2, C3, 60 F, 250 V, calculated as
C4ATDBW5600A3OJ

capacitors C4 ESR=2.6 m
Output 22 uF, 450 V, PS _ Cond I S1,rms2 RDS ,S1 I S 2,rms2 RDS ,S 2 (18)
Cout B32774D4226
Capacitor ESR=6.2 m
1

PS _ Switching I L1,avg VS1 Ton, S1 Toff , S1 f sw
The waveforms of the switches in the proposed converter are 2
(19)
shown in Figs. 10(a) and 10(b). Switches S1 and S2 have the
same current and voltage stress as can be seen in the
1

I L 2,avg VS 2 Ton, S 2 Toff , S 2 f sw
2
simulation waveforms. Since the converter in simulation is
operating at 80% switching duty cycle with a 20V input, the With similar diode used for D1, D2, D3, and Dout, the
3%
iIN
24%
iL1
iL2
56%
17%
Vout
Inductors Switches Diodes Capacitors
Fig. 12. Percentage distribution of losses in system components
98% Fig. 14. Input current (iIN), Inductor currents (iL1, iL2), and Output Voltage
(Vout)
96%
94%
volume of the converter.
Efficiency
Around 24% and 17% of the losses occur among the

92% inductors and switches, respectively. The conduction losses
90% in the inductors can be reduced by selecting an inductor with
88%
lower value of DCR (DC Resistance). The selected switches
have similar conduction and switching losses. The losses in
86% the capacitors are very small as the ESR of the film
50 150 250 350 450
Output Power
capacitors used is in the order of few milliohms and the rms
currents are around 1A. Using (17)-(23), the theoretical
Fig. 13. Efficiency curve of the proposed converter efficiency of the proposed converter at 200W was around
96.8%. A 400W prototype was built and tested to validate the
conduction and reverse recovery losses in the diodes can be analytical results. An efficiency of 93.76% was observed at
calculated as

200W of output power. The difference in the calculated and

PD _ Cond 4 I D,avg VF , D I D, rms2 RD (20) experimental efficiency can be accounted for the core losses
in the inductors that were not considered in the calculated
1
PD _ RR 4 TRR I RR VD f sw (21) efficiency and the approximate approach to calculating
2 component losses. The efficiency of the prototype over a
The conduction losses in the ESR of the capacitors can be wide range of output power is shown in Fig. 13. A maximum
calculated as efficiency of 94.16% was achieved at a power rating of

PC _ Cond IC1,rms2 RESR1 RESR2 RESR3 RESR4 150W.
2
ICout,rms RESRout (22) The experimental waveforms are shown in Figs. 14-17.
The experimental waveforms conform to simulation
The total loss in the proposed converter is given as waveforms. Fig. 14 shows the input current, inductor currents
PLoss PL _ Cond PS _ Cond PS _ Switching PD _ Cond iL1 and iL2, and the output voltage of the converter. It can be
PD _ RR PC _ Cond
(23)
observed that the input current is continuous and has a
The percentage distribution of losses in the system smaller ripple compared to that in inductor currents. The
components is shown in Fig. 12. It is observed that the major inductor currents are equal and are 180 degrees out of phase
percent of losses occur in the diodes which are about 56%. As from each other as the two phases of the interleaved boost are
there are 4 diodes in the converter, each diode has a loss of operated in such way. The output voltage is 400V and the
about 14%. As the diode losses increase, its junction voltage ripple is almost negligible. Fig. 15 shows the inductor
temperature rises and decreases the forward voltage drop currents along with the gate signals of the switches. The
across it. This decrease in forward voltage drop reduces the voltages of switches S1 and S2 are shown in Fig. 16. The turn
power loss and helps in preventing a further increase in off voltage of both switches is around 100V as can be
junction temperature which can lead to diode failure. In the calculated from (13). The inductor current waveforms are
worst case scenario, the losses in the selected diode were decreasing during the turn off of their respective switches.
estimated to be within its power dissipation limits. The The 180 degree out of phase operation of switches S1 and S2
authors however would suggest using a plug in style heat sink can be clearly seen in the switch voltages.
like the 5768 series of aavid thermalloy to prevent the diode The reverse blocking voltages of diode D2 and output
from any overheating and operate it at a temperature that is diode Dout are shown in Fig. 17. The maximum blocking
well below its maximum operating junction temperature. This voltage of the diodes is observed to be 200V which is same as
particular heat sink contributes to a minimal increase in the that calculated using (15). Also the wave shape of both
TABLE IV
iL1 COMPARISON OF THE PROPOSED CONVERTER TO OTHER HIGH-VOLTAGE-GAIN
CONVERTERS
iL2 Proposed
Topology [8] [9] [10] [11]
Converter
VGS1 3 d 2 3 d 1 4
d 1 d
Vout/Vin Cout
1 d 1 d 1 d 1 d
1 1 1 1
S1 1 d
3 d 2 3 d 4
Vswitch/Vout
VGS2 1 1
S2 - - d
3 d 4
1 1 2 1
D1 1 d
3 d 2 3 d 2
1 1 2 1
D2 d
3 d 2 3 d 2
Fig. 15. Inductor currents (iL1, iL2) and Gate voltages (VGS1, VGS2) 1 1
Vdiode/Vout D3 - - d
3 d 2
iL1 1
D4 - - - -
3 d
1 2 1
iL2 Do - -
2 3 d 2
1 d 1 1 d 3
VS1 C1 1 d
3 d 2 3 d 8
1 1 2 1
C2 d
3 d 2 3 d 8
Vcap/Vout
1 2 1
VS2 C3 - d
3 d 3 d 8
1 3
C4 - - -
3 d 8
VII. PROPOSED CONVERTER VS. HIGH-VOLTAGE-GAIN

Fig. 16. Inductor currents (iL1, iL2) and Switch voltages (VS1, VS2)
CONVERTERS USING BOOST STAGE AND VOLTAGE
MULTIPLIER CIRCUITS
In this section, the proposed converter is compared to other
high-voltage-gain converters using boost stage and voltage
iL1 multiplier circuits. A comparison is made between the
proposed converter and converters from [8-11] that have been
iL2
discussed earlier in this paper. The comparison is based on
the voltage gain of the converters along with the voltage
stress on their components. To have a fair comparison, the
voltage stress on its components has been normalized with
respect to their output voltages. The comparison is
VD2
summarized in Table IV. The proposed converter offers
higher voltage gain, has lower voltage stress on its switches
and diodes in comparison to all other converters. The major
VDout advantage with the proposed converter is the significantly
smaller voltage ratings for its capacitors in comparison to
other converters. This greatly contributes to cost and size
Fig. 17. Inductor currents (iL1, iL2) and Diode voltages (VD2, VDout) reduction of the proposed converter.
The proposed converter is also compared to a high-voltage-
diodes D2 and Dout voltages are similar because they both are gain converter using Dickson charge pump voltage multiplier
ON during mode I when the switch S1 is turned OFF. cells that is very similar in structure and operation. The
Likewise, the wave shape of voltages of diodes D1 and D3 comparison of these two converters is shown in Table V. The
will be similar and have the maximum blocking voltage of high-voltage-gain converter using the Dickson charge pump
200V for the above test specifications. The experimental voltage multiplier cells [19] will be referred to as reference
waveforms provided validate the converter operation and converter in the following sections of the paper (see Fig. 1).
analysis. The proposed converter is capable of providing Both converters mainly differ in terms of their component
voltage gains high enough to step up the output voltage of stresses. The converters are being compared in terms of
renewable sources to the distribution level 400V DC. component stress and size while both offer a voltage gain of
TABLE V The proposed converter has a smaller size compared to the

COMPARISON OF THE PROPOSED CONVERTER TO THE REFERENCE CONVERTER
reference topology due to its voltage multiplier circuit
Component Parameter
Reference Proposed capacitors. Ideally, this can be demonstrated by looking at the
Converter [19] Converter total energy of the voltage multiplier capacitors which can be
Input Current Continuous Continuous calculated as follows.
4
2 C
Inductor Current IL1=6 A, IL2=4 A IL1=5 A, IL2=5 A 1
VS1=80 V, VS2=80 VS1=100 V, Etotal n Vn2 (24)
Voltage
V VS2=100 V n 1
Switches Duty Cycle D1=D2=75% D1=D2=80% The total energy of the voltage multiplier capacitors of the
Current IS1=6 A, IS2=4 A IS1=5 A, IS2=5 A
reference converter is 0.4J while that of the proposed
C1=12.5 F,
converter is 0.2J. It can be seen that the capacitors of the
Capacitance proposed converter hold only 50% of the energy compared to
C2=6.25 F, C1=C4=6.66 F,
for 1% voltage
C3=4.17 F, C2=C3=20 F the reference converter. A more practical way to compare the
VM ripple
C4=3.125 F converter size is by looking at the volume of selected voltage
Capacitors
VC1=80 V, VC2=160 multiplier capacitors available in the market. The voltage
VC1=VC4=150 V,
Voltage V, VC3=240 V,
VC4=320 V
VC2=VC3=50 V multiplier capacitors were selected from KEMET R60-
VD1=160 V, Series Film Capacitors such that they had the closest
VD1=200 V,
VD2=160 V,
VD2=200 V, capacitance and voltage ratings to what was required. It was
Diodes Voltage VD3=160 V, observed that the proposed converter had 44% smaller
VD3=200 V,
VD4=160 V,
VDout=80 V
VDout=200 V volume of voltage multiplier capacitors compared to the
Capacitance reference converter. Therefore the size of the proposed
Output Cout=1.875 F Cout=1.875 F
for 1V ripple converter is smaller compared to the reference converter.
Capacitor
Voltage VCout=400 V VCout=400 V The proposed converter has one less diode compared to the
reference converter. All the diodes experience the same
20, i.e., a 20V input is stepped up to 400V on the output side. reverse blocking voltage of 200V which is slightly higher
Here in this comparison, both converters are sourced from a than that of the diodes in the reference converter. This is
single source despite the fact that they could be powered from because of the slightly higher duty ratio of the proposed
two independent sources. converter compared to the reference converter. As the output
Both converters achieve a high voltage gain by charging ratings are the same, the output capacitors of both the
and discharging of the voltage multiplier capacitors. They converters are the same.
offer continuous input current which can be owed to the two-
phase interleaved boost topology on the input side. The VIII. CONCLUSION
proposed converter is symmetric, i.e., both the interleaved In this paper, a high-voltage-gain dc-dc converter is
boost phases on the input side experience same voltage and introduced that can offer a voltage gain of 20, i.e., to step up
current stresses. Also, some of the capacitors in the voltage a 20V input to 400V output. The proposed converter is based
multiplier circuit have similar voltage stress. This simplifies on a two-phase interleaved boost and the modified Dickson
the effort and time during component selection of the system charge pump voltage multiplier circuit. It can draw power
design. The switches in the proposed converter have a higher from a single source as well as from two independent sources
duty ratio as the proposed converter offers slightly lower while offering continuous input current in both cases. This
gain. This leads to a slightly higher voltage stress across the makes the converter well suited for renewable applications
switches compared to the reference topology. like solar. The proposed converter is symmetric, i.e., the
The major difference in the converters being compared is semiconductor components experience same voltage and
in their voltage multiplier circuits. Apart from the output current stresses which therefore reduces the effort and time
capacitor, both the reference converter and proposed spent in the component selection during the system design.
converter have four voltage multiplier capacitors. The The proposed converter has smaller voltage multiplier
capacitors in the reference converter have linearly increasing capacitors compared to a reference converter based on
voltage stress as observed from C1 to C4. The voltages of the Dickson charge pump voltage multiplier cells; hence it is
capacitors C1, C2, C3, and C4 are 80V, 160V, 240V, and 320V smaller in size. The converter finds its application in
respectively. For a 1% ripple voltage in the voltage multiplier integration of individual solar panels onto the 400V
capacitors, the required capacitance for C1, C2, C3, and C4 are distribution bus in datacenters, telecom centers, dc buildings
12.5 F, 6.25 F, 4.17 F, and 3.125 F, respectively. The and microgrids.
proposed converter has smaller voltage rating for the voltage
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This article has been accepted for publication in a future issue of this journal, but has not been

A High-Voltage-Gain DC-DC Converter Based on

Abstract - A high-voltage-gain dc-dc converter is TABLE I

Fig. 3. Proposed high-voltage-gain dc-dc converter

A Mode-I Mode-II Mode-I Mode-III

the output capacitor Cout and supply the load.

In the proposed converter, the input power is transferred to

Fig. 7. Proposed converter operation in mode-III

The inductance required for a current ripple of IL is given by

maximum voltage stress seen on both switches is only 100V.

I D1,avg I D2,avg I D3,avg I Dout,avg Iout (16)

VI. EXPERIMENTAL RESULTS

Inductors Switches Diodes Capacitors

Fig. 12. Percentage distribution of losses in system components

Around 24% and 17% of the losses occur among the

VII. PROPOSED CONVERTER VS. HIGH-VOLTAGE-GAIN

TABLE V The proposed converter has a smaller size compared to the

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