UNIT - VI

Field Effect Transistor

INTRODUCTION:
In ordinary transistors both holes and electrons take part in current through it. This is the
reason that these are sometimes called the bipolar transistors.
Such transistors have two main drawbacks namely low input impedance because of
forward biased emitter junction and considerable noise level. Both of these drawbacks
have been overcome to a great extent in the field effect transistor (FET), which is an
electric field (or voltage) controlled device.
A FET is a three terminal (namely drain, source and gate) semiconductor device, in
which current conduction is by only one type of majority carriers.
It is also sometimes called the uni-polar transistor unlike a bipolar transistor a FET
requires virtually no input (bias signal) current and gives an extremely high input
resistance (most important advantage over a BJT).

CLASSIFICATION OF FET:
1. Junction Field Effect Transistors (JFET)
2. Insulated Gate Field Effect Transistors (IGFET)
(or) Metal Oxide Semiconductor Field Effect Transistors (MOSFET)

CONSTRUCTION OF JFETs:
A JFET is a three terminal semiconductor device in which current conduction is by one
type of carrier i.e. electrons or holes.
The current conduction is controlled by means of an electric field between the gate and
the conducting channel of the device.
 The JFET has high input impedance and low noise level.
A JFET consists of a p-type or n-type silicon bar containing two pn junctions at the sides
as shown in below figure.

Figure: 1 N-channel JFET

The bar forms the conducting channel for the charge carriers.
If the bar is of p-type, it is called p-channel JFET and if the bar is of n-type, it is called n-
channel JFET.
The two pn junctions forming diodes are connected internally and a common terminal
called gate is taken out.

Standard Notations in JFET:

Source: The terminal through which the majority carriers enter the channel is called the source
terminal S and the conventional current entering the channel at S is designated a IG.
Drain: The terminal through which the majority carriers leave the channel is called the drain
terminal D and the conventional current leaving the channel at D is designated as ID.
The drain to source voltage is called VDS and is positive if D is more positive than source S.
Gate: there are two internally connected heavily doped impurity regions formed by alloying by
diffusion or by any other method available to create two pn junctions.
These impurity regions are called the gate (G). a voltage VGS is applied between the gate
and source in the direction to reverse bias the pn junction. Conventional current entering the
channel at G is designated as IG.
Schematic symbols of JFET:

The direction of the arrow at the gate indicates the direction in which the gate current
flows when the gate junction is forward biased.
Thus for the N-channel JFET, the arrow at the gate junction points into the device and is
P-channel JFET it is away from the device.

Polarity conventions of JFET:

In each case, the voltage between the gate and source is such that the gate is reverse
biased.
The source and the drain terminals are interchangeable.
The following points may be noted:
1. The input circuit (i.e. gate to source) of a JFET is reverse biased. This means that the
device has high input impedance.
 2. The drain is so biased w.r.t. source that drain current ID flows from the source to
drain.
3. In all JFETs, source current IS is equal to the drain current i.e IS = ID.
Operation of N-channel JFET:
(i) When VGS=0 & VDS=0: When no voltage is applied between drain and source & gate and
source the thickness of the depletion regions around the pn junction is uniform.
(ii) When VDS=0 and VGS is decreased from zero: In this case the pn junctions are reverse
biased and hence the thickness of the depletion region increases. As VGS is decreased from zero
the reverse bias voltage across the pn junction is increased and hence the thickness of the
depletion region in the channel also increases until the two depletion regions make contact with
each other. In this condition, the channel is said to be cut-off. The value of VGS which is required
to cut-off the channel is called the cut-off voltage VC.
(iii) When VGS=0 and VDS is increased from zero: Drain is positive with respect to the source
with VGS=0. Now the majority carriers (electrons) flow through the Nchannel from source to
drain. Therefore the conventional current ID flows from drain to source.
The magnitude of the current will depend upon the following factors:
a) The number of majority carriers available in the channel. (Conductivity)
b) The length L of the channel.
c) the cross sectional area A of the channel
Drain Characteristics:
As VDS is increased from zero, ID increases, and the rate of increase of ID with VDS
decreases. The region from VDS=0 to VDS=VP is called the ohmic region.
In the ohmic region, the drain to source resistance VDS/ID is related to the gate voltage
VGS, in an almost linear manner. This is useful as a voltage variable resistor (VVR) or
voltage dependent resistor (VDR).
When VDS=VP, ID becomes maximum. When VDS is increased beyond VP, the length of
the pinch-off or saturation region increases. Hence there is no further increase of ID.
At a certain voltage, ID suddenly increases. This effect is due to the avalanche
multiplication of electrons caused by breaking of covalent bonds of silicon atoms in te
depletion region between the gate and the drain.
When VGS is negative and VDS is increased: When the gate is maintained at a negative
voltage less than the negative cut-off voltage, the reverse voltage across the junction is
further increased. Hence for a negative value of VGS, the curve ID versus VDS is similar to
that for VGS=0, but the values of VP and VDS (max) are lower.
Transfer Characteristics:
The transfer characteristic for a JFET can be determined experimentally, keeping drain-
source voltage, VDS constant and determining drain current, ID for various values of gate-
source voltage, VGS.
It is observed that
(i) Drain current decreases with the increase in negative gate-source bias
(ii) Drain current, ID = IDSS when VGS = 0
(iii) Drain current, ID = 0 when VGS = VD

The transfer characteristic follows the equation:

2
= [1 ] (or) = [1 ] Shockleys equations.

 FET as Voltage-Variable Resistor (VVR)

The region to the left of the pinch-off locus of Fig. 5.10 is referred to as the ohmicor
voltage-controlled resistance region. In this region the JFET can actually be employedas
a variable resistor whoseresistance is controlled by the applied gate-to-source voltage.

Fig. 5.6: n-Channel JFET characteristics with IDSS= 8 mA and VP = 4 V.

The slope of each curve and therefore the resistance of the device between drain and
source for VDS< VP is a function of the applied voltage VGS.
As VGS becomes moreand more negative, the slope of each curve becomes more and
more horizontal,corresponding with an increasing resistance level. The following
equation will providea good first approximation to the resistance level in terms of the
applied voltageVGS.

wherero is the resistance with VGS = 0 V and rd the resistance at a particular level

of VGS.
Comparison of JFET and BJT:
Metal Oxide Semiconductor Field Effect Transistor (MOSFET):

MOSFETs are divided into two types:

(i) Depletion Type MOSFET
(ii) Enhancement Type MOSFET
The terms depletion and enhancement define their basic mode of operation.

Depletion type MOSFET:

Basic Construction: n-Channel depletion type MOSFET

 Two highly doped n-regions are diffused into a lightly doped p-type substrate. These two
highly doped n-regions represent source and drain. In some cases substrate is internally
connected to the source terminal.
The source and drain terminals are connected through metallic contacts to n-doped
regions linked by an n-channel.
The gate is also connected to a metal contact surface but remains insulated from the n-
channel by a very thin layer of dielectric material, silicon dioxide (SiO2).
Thus, there is no direct electrical connection between the gate terminal and the channel of
a MOSFET, increasing the input impedance of the device.
Basic operation and characteristics:

On the application of drain to source voltage VDS and keeping gate to source voltage to
zero, free electrons from the n-channel attract towards positive potential of drain
terminal. This establishes current through the channel to be denoted as IDSS at VGS=0V.
If we apply negative gate voltage, the negative charges on the gate repel conduction
electrons from the channel, and attract holes from the p-type substrate. This initiates
recombination of repelled electrons and attracted holes.
Due to recombination, n-channel is depleted of some of its electrons, thus decreasing the
channel conductivity.
The greater the negative voltage applied at the gate, the greater the depletion of n-channel
electrons. The level of drain current will reduce with increasing negative bias for VGS.
For positive values of VGS the positive gate will draw additional electrons from the p-
type substrate due to reverse leakage current and establish new carriers through the
collisions between accelerating principles. Because of this, as gate to source voltage
increases in positive direction, the drain current also increases.
 The application of a positive gate to source voltage has enhanced the level of free
carriers in the channel compared to that encountered with VGS=0V.
For this reason the region of positive gate voltages on the drain or transfer characteristics
is referred to as enhancement region and the region between cutoff and the saturation
levels of IDSS referred to as depletion region.
Symbols for n-channel and p-channel depletion type MOSFETs:

Enhancement Type MOSFET:

This type of MOSFET operates only in the enhancement mode and has no depletion
mode. It differs in construction from the depletion MOSFET in that it has no physical channel.
Basic Construction:
 The main difference between the construction of D-MOSFET and that of E-MOSFET is,
E-MOSFET substrate extends all the way to the silicon dioxide (SiO2) and no
channels are doped between the source and the drain. Channels are electrically induced in
these MOSFETs, when a positive gate-source voltage VGS is applied to it.
Operation:

This MOSFET operates only in the enhancement mode and has no depletion mode. It
operates with large positive gate voltage only. It does not conduct when the gate-source
voltage VGS = 0. This is the reason that it is called normally-off MOSFET.
When drain is applied with positive voltage with respect to source and no potential is
applied to the gate two N-regions and one P-substrate from two P-N junctions connected
back to back with a resistance of the P-substrate. So a very small drain current that is,
reverses leakage current flows.
If the P-type substrate is now connected to the source terminal, there is zero voltage
across the source substrate junction, and the drain substrate junction remains
reverse biased.
When the gate is made positive with respect to the source and the substrate, negative (i.e.
minority) charge carriers within the substrate are attracted to the positive gate and
accumulate close to the-surface of the substrate. As the gate voltage is increased, more
and more electrons accumulate under the gate. Since these electrons cannot flow across
the insulated layer of silicon dioxide to the gate, so they accumulate at the surface of the
substrate just below the gate.
 These accumulated minority charge carriers N -type channel stretching from drain to
source. When this occurs, a channel is induced by forming what is termed an inversion
layer (N-type).
Now a drain current starts flowing. The strength of the drain current depends upon the
channel resistance which, in turn, depends upon the number of charge carriers attracted to
the positive gate. Thus drain current is controlled by the gate potential.
Since the conductivity of the channel is enhanced by the positive bias on the gate so this
device is also called the enhancement MOSFET or E- MOSFET.
The minimum value of gate-to-source voltage VGS that is required to form the inversion
layer (N-type) is termed the gate-to-source threshold voltage VGST.
Characteristics of an EMOSFET:

The lowest curve is the VGST curve. When VGS is lesser than VGST, ID is approximately
zero. When VGS is greater than VGST, the device turns- on and the drain current ID is
controlled by the gate voltage.
The almost vertical components of the curves correspond to the ohmic region, and the
horizontal components correspond to the constant current region. Thus E-MOSFET can
be operated in either of these regions i.e. it can be used as a variable-voltage resistor
(WR) or as a constant current source.

The current IDSS at VGS <=0 is very small, being of the order of a few nano-amperes.
When the VGS is made positive, the drain current ID increases slowly at first, and then
much more rapidly with an increase in VGS. The manufacturer sometimes indicates
the gate-source threshold voltage VGST at which the drain current ID attains some defined
small value (say 10A).
 For VGS>VT the relationship between drain current and VGS is nonlinear and it is given
as,
= [( )2 ]

()
Where K = ( 2
is a constant function of the construction of the device.
() )

Symbols for Enhancement n-channel and p-channel type MOSFET:

Assignment-cum-Tutorial Questions
A. Questions testing the understanding/remembering level of students.
I) Objective Questions
1. When VGS = 0 V, a JFET is:
a) saturated b) an open switch c) cut off d) an analog device
2. When the JFET is no longer able to control the current, this point is called the:
a) depletion region b) pinch-off region c) saturation point d) breakdown region
3. When applied input voltage varies the resistance of a channel, the result is called:
a) polarization b) saturation c) cutoff d) field effect
4. A MOSFET has how many terminals?
a) 2 b) 1 c) 3 OR 4 d) 3
5. With the E-MOSFET, when gate input voltage is zero, drain current is:
a) at saturation b) zero c) IDSS d) widening the channel
6. JFET terminal legs are connections to the drain, the gate, and the:
a) source b) substrate c) channel d) cathode
7. IDSS can be defined as:
a) the maximum possible current with VGS held at 0 V
b) the maximum possible current with VGS held at 4 V
c) the minimum possible drain current
d) the maximum drain current with the source shorted
8. When an input signal reduces the channel size, the process is called:
a)gate charge b)enhancement c)substrate connecting d)depletion
9. How will electrons flow through a p-channel JFET?
a) from drain to gate b) from source to gate
c) from source to drain d) from drain to source
10. In the constant-current region, how will the IDS change in an n-channel JFET?
a) As VGS increases ID increases. B) As VGS decreases ID decreases.
c) As VGS increases ID remains constant. D) As VGS decreases ID remains constant.
11. A JFET is a driven device
a) current b) voltage c) both current and voltage d) none of the above
12. The gate of a JFET is biased
a) reverse b) forward c) reverse as well as forward d) none of the above
13. When drain voltage equals the pinch-off-voltage, then drain current . with the
increase in drain voltage
 a) decreases b) increases c) remains constant d) none of the above
14. Breakdown voltage and pinch-off voltage of a JFET are different terms for the same voltage
level.
a) True b) False
15. A JFET can be either a current-controlled device or a voltage-controlled device.
a) True b) False
16. An enhancement-type MOSFET or E-MOSFET can be turned on when the channel is
depleted.
a) True b) False

17. The amount of gate voltage needed to turn the JFET completely off is called VGS(OFF).
a) True b) False
18. Which transistor is also renowned as ' Insulated Gate Field Effect Transistor' (IG-FET)?
a) Junction FET b) Metal- Oxide Semiconductor FET c) Both a & b
19. The passage of majority charge carriers from source to drain terminal takes place through the
channel only after an application of
a) Drain to Source Voltage (VDS) b) Gate to Source Voltage (VGS)
c) Gate to Gate Voltage (VGG) d) Drain to Drain Voltage (VDD)

II) Descriptive Questions:

1. How does the constructional feature of a MOSFET differ from that of a JFET.
2. Why are N-channel MOSFETs preferred over P-channel MOSFETs?
3. What is MOSFET? How many types of MOSFETs are there?
4. Compared JFET and BJT.
5. Explain why BJTs are called bipolar devices while FETs are called uni-polar devices.
6. Why a Field Effect Transistor is called so?
7. Define and explain the parameters transconductance gm, drain resistance rd and amplification
factor () of a JFET. Establish the relation between them.
8. Give the construction details and characteristics of depletion type MOSFET.
9. Give the construction details and characteristics of JFET.
10. Give the construction details and characteristics of enhancement type MOSFET.

B) Questions testing the ability of students in applying the concepts.

1. When the reverse gate voltage of JFET changes from 4 to 3.9 V, the drain current changes
from 1.3 to 1.6mA. Find the value of transconductance.
2. A FET has a driven current of 4mA. If IDSS =8mA and VGS(off)=-6V. Find the values of
VGS and VP.
3. An N-channel JFET has IDSS=8mA and Vp=-5V. Determine the minimum value of VDS for
pinch-off region and the drain current ID for VGS=-2V in the pinch off region.
4. Given the constant k=0.4 * 103 A/ 2 (of enchancement type MOSFET) and ID(ON) =3mA
with VGS(ON)=4V, determine the threshold voltage VT.
5. Given a depletion type MOSFET with IDSS=6mA and VP=-3V, determine the drain current at
VGS=-1V, 0V, 1V and 2V. Compare the difference i current levels between -1 and 0V with the
difference between 1 and 2V. In the positive VGS region, does the drain current increase at a
significantly higher rate than for negative values? is there a linear or nonlinear relationship
between ID and VGS? Explain.
6. If VA = 100 V, find the JFET output resistance ro when operating in pinch-off at a current of 1
mA, 2.5 mA, and 10 mA.
7. For VDS = 3 V, find the change in ID corresponding to a change in VGS from 2 to 1.6 V.
8. An n-channel JFET has a pinch-off voltage VP of 4.5V and IDSS = 9.0mA. At what value of
VGS in the pinch-off region will ID equal to 3.0mA and what is the value of VDS(P) when ID
= 3.0mA?
9. The data sheet for certain type of JFET indicates that IDSS = 25mA, VGS(off) = -10V, and gm0
= 5000S. Determine (i) The type of JFET (ii) Drain current ID at VGS = 0 (iii) Drain current
ID and transconductance gm at VGS = - 4V.
10. A JFET has the following parameters: IDSS = 32 mA ; VGS (off) = 8V ; VGS = 4.5 V.
Find the value of drain current.
11. A JFET has a drain current of 5 mA. If IDSS = 10 mA and VGS (off) = 6 V, find the value
of (i) VGS and (ii) VP.
12. A particular p-channel JFET has a VGS (off) = + 4V. What is ID when VGS = + 6V?
13. A JFET has a value of gmo = 4000 S. Determine the value of gm at VGS = 3V. Given
that VGS (off) = 8V
14. The data sheet of a JFET gives the following information : IDSS = 3 mA, VGS (off) = 6V
and gm (max) = 5000 S. Determine the transconductance for VGS = 4V and find drain
current ID at this point
15. For a certain D-MOSFET, IDSS = 10 mA and VGS (off) = 8V. (i) Is this an n-channel or a
p-channel ? (ii) Calculate ID at VGS = 3V. (iii) Calculate ID at VGS = + 3V
16. A D-MOSFET has parameters of VGS (off) = 6V and IDSS = 1 mA. How will you plot the
transconductance curve for the device ?
17. The data sheet for an E-MOSFET gives ID(on) = 500 mA at VGS = 10V and VGS (th) = 1V.
Determine the drain current for VGS = 5V
18. The data sheet for an E-MOSFET gives ID (on) = 3 mA at VGS = 10V and VGS (th) = 3V.
Determine the resulting value of K for the device. How will you plot the transconductance
curve for this MOSFET ?