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llfliA" SERVICE MANUAL

SEGA SATURN (PAL)

NO. 013- 1

ISSUED JUNE, 1995

CONTENTS

1. SPECIFICATIONS 3
2. IDENTIFYING PARTS 4
3. ACCESSORIES 5
4. IDENTIFICATIONS AND LOCATIONS OF CIRCUIT BOARDS 5
5. DISASSEMBLY PROCEDURE 6
6. CD DRIVE MAINTENANCE AND ADJUSTMENT 8
7. BLOCK DIAGRAM 11
8. SCHEMATIC DIAGRAMS 13
9. CIRCUIT BOARD DIAGRAMS 27
10. PARTS SPECIFICATIONS .. .. .. .. .... .. .. .. 32
11. EXPLODED VIEW & PARTS LIST .. .. ...... .. ...... .. 70
11-1. Exploded View 70
11-2. Mechanical Parts List 71
11-3. Electrical Parts List 72
11-4. Accessories/Package list 77

Sega Enterprises, Ltd.


PROTECTION OF EYES FROM LASER BEAM DURING SERVICING
This set employs laser. Therefore, be sure to follow carefully the instructions below when servicing.

Warning
When servicing, do not approach the laser exit with the eye too closely. In case it is necessary to confirm laser beam emission.
Be sure to observe from a distance of more than 30 em from the surface of the objective lens on the optical pick-up block.

Cautio"' Invisible laser radiation when open and interlocks defeated avoid exposure to beam

Caution
Use of controls or adjustments or performance of procedures other than those specified herein may result in hazardous
radiation exposure.

This console is classified as a CLASS 1 LASER product.

SAFETY PRECAUTIONS
Notice: Comply with all cautions and safety related notes located on or inside the cabinet and on the chassis.
I. When replacing a chassis in the console, all the protective devices must be put back in place, such as barriers, non-metallic
knobs, adjustment and compartment covers/shields, isolation resistors/capacitors, etc.
' When service is required, observe the original lead-dress. Extra precautions should be taken to assure correct lead dress in
the high voltage circuit.
3. Always use the manufacturer's replacement components. Especially critical components as indicated on the circuit diagram
should not be replaced by other manufacturer's. Furthermore, where a short-circuit has occurred, replace those components
that indicate evidence of overheating.

PRODUCT SAFETY NOTICE


Many electrical and mechanical parts have special safety-related characteristics. These are often not evident from visual
inspection nor can the protection afforded by them necessarily be obtained by using replacement components rated for higher
voltage, wattage, etc. Replacement parts which have these special safety characteristics are identified in this Service Manual.
Electrical components having such features are identified by marking with a it, in the parts list in this Service Manual. The use
of a substitute replacement component which does not have the same safety characteristics as the SEGA recommended
replacement one, shown in the parts list in this Se[Vice Manual, may create shock, fire, or other hazards. Product Safety is
continuously under review and new instructions are issued from time to time.

CAUTION ON FUSE REPLACEMENT


Caution: For continued protection against risk of fire, replace only with same type, amperage, volt fuse.
Attention: Afin d'assurer une protection permanente contre tout risque d'amon;age electrique, replacer uniquement
par un fusible de meme type et de amperes volts.

8 This symbol indicates a Fast Operating Type Fuse.

.8. This symbol indicates a Time Lag Type Fuse.

-2-
SATURN
COMPATABILITY

Audio CD:

The normal audio Compact Disc is playable on the Saturn machine, and can be
altered with all the effects of a modern Hi-fi and more. Surround sound, vocal
cut-out for Karaoke, program sequence of tracks and shuffle to name but a few.
You need no extra equipment to play music CDs on your Saturn.

CD+G:

CD and Graphics are a format where simple visuals can appear on the screen
that relate to the music. These visuals might include stills of the band, or other
pictures. You need to buy no extra equipment to use CD+G on your Saturn.

CD+EG:

CD and extended graphics is a new medium ready to be utilised by the music


community. It is basically an enhanced version of what is described above in
CD+G. You need no extra equipment to use CD+EG on your Saturn.

MPEG:

MPEG is the standard industry format for compressing Full Motion Video
footage. This means that the footage takes up less disk space, and when it is to
be viewed, the MPEG program decodes the footage and plays it on screen. The
MPEG add-on is needed in order to use the MPEG video CDs and Philips CDi.
At the current rate of compression one movie can fit on two CDs.
', I

Developed by Philips, CDi is an interactive CD format that can be used in a


variety of educational and entertainment purposes. Using video footage and CD
quality sound CDi has become an industry leader in the field of interactive fun._
The MPEG add-on is required to access the full range of CDi software

Kodak Photo CD:

Photos stored on CD have theoretically infmite life, are always picture perfect
and will never fade or be otherwise damaged. The Saturn can access Kodak
Photo CDs with the use of another Saturn CD which allows the user to see
display the photos in various ways. There are many Kodak Photo CD stores
open in the major cities.
Frame Buffering: A technique to maximise graphic display performance
by letting the graphics processor chip "set aside" images it has
already calculated, allowing it to work on enerating the next fraction
of a seconds visual images, all while the screen is still busy painting
the last fraction of a second's display.

Playfields: The background(s), anything that is on screen that it not a .


sprite. When two playfields (layers of bacground) are contolled
properly, parrallax scrolling can result.The Sega Saturn has a whole
chip dedicated to controllingbackgrounds (the VDP2 or Video
Display Processor 2") that can generate 5 distict layers of
background at the same time.

Polygons/Second: (1000's of) The number of polygons of a given size that


can be drawn on the screen in one second. This figure does not
include the size of the polygons, nor their texturing, shading, or
lighting.

Realtime: An important adjective that usually indicates the game display


is being re-calculated every second, taking into account the full
effects of the player's actions. When reffering to a game's response
or speed, it means the game responds instantly to the player's
commands.

Render: Drawing 3D graphical objects on a computer or game machine.


"BUG" and "Clockwork Knight" are filled with beautifully rendered
characters.

Texture Mapping: Copying a bit-map onto the faces of selected polygons


to give the illusion of surface texture. "Daytona USA" is a great
example of a texture mapped game.

Wireframe: A connect the dots approach to showing graphical objects by


drawing lines between sets of points that make up a geometric
outline.

Dynamic Perspective: Constantly changing the point of view ("camera


angle") so that the players feel that they are weaving in and around
the on-screen action. Typically requires strong scaling and rotational
capabilities. This can be seen on Sega Sports games on Saturn.
1. SPECIFICATIONS
Ratings

Model MK - 80200-50

Power supply AC220-240 V 50/60 Hz

Power consumption Approx. 20W


Temperature 5 C to 35 C
Operating environment
HumiditylO% to 80% RH (no condensation)
260 mm(W) X 230 mm(L) X 83 mm(H)
Dimensions
(10.2 inches) x (9.0 inches) x (3.2 inches)

Specifications
Master 32bit RISC SH2 (28.4 MHz, 25MIPS)
CPU Slave 32bit RISC SH2 (28.4 MHz, 25MIPS)
Sound 68ECOOO (11.3 MHz)
Work RAM 16 Mbit
Video RAM 12 Mbit
Sound RAM 4Mbit
Memories
CD Buffer RAM 4Mbit
IPLROM 4Mbit
Backup RAM 256 Kbit
Resolution 320 x 224 dot etc.
Graphics Colors 1024/2048 (16,770,000 simultaneous transmission)
Sprite Enlargement, Reducation, Rotation, Transformation
5 screen maximum
XY Scroll 4
Rotation 2
Enlargement I reduction 2
Scroll
Windo~ 2
Vertical cell scroll
Special features Lateral line scroll
Enlargement I reduction
Polygons Specialized hardware
Wire frame
CG Functions
Special features Flat shading
Gouraud shading
32 channels
16 bit sampling
Sound PCM & FM sound source
Sampling rate 44.1 kHz max.
AudioDSP
CD-ROM Intelligent double-speed CD drive
[Note] Characteristics and specifications may be changed without notice.

-3-
2. IDENTIFYING PARTS
2-1. Front View of Console 2-3. Control pad

OPEN Button Cartridge Slot

RIGHT SHIFT Button

A Button
ACCESS Light B Button
DIRECTIONAL Button START Button C Button

CONTROL PORT 1 CONTROL PORT 2

2-2. Back View of Console

POWER Jack

Master Reset Switch AN OUT Jack

-4-
3. ACCESSORIES

Positive Side

B
Lithium Battery (CR2032) RGB Cable

AC Cable [UK] AC Cable [SOE] AC Cable [AUSTRALIA]

4. IDENTIFICATIONS AND LOCATIONS OF CIRCUIT BOARDS

CD Drive Unit

P. SW Board

Main Board

R. SW Board

Fig. 4-1

-5-
5. DISASSEMBLY PROCEDURE
5-1. Top Case Removal 53. CD Drive Unit Removal
1) Remove six screws and then the top case in the 1). Disconnect two connectors and one flat cable.
direction of the arrow. 2) Remove the CD drive unit in the direction of arrow
.

Fig. 5-1 Fig. 5-3

5-2. CD Compartment lid Removal 5-4. SH-1 Board Removal


1) Remove two screws and then the bracket lid CD l) Remove four screws and then the top shield
spring. plate.
2) Remove spring . 2) Remove screw CD and release three tabs, then lift
3) Remove two screws@ and then the oil dumper. the SH-1 board in the direction of arrow Q) to
4) Push the lever in the direction of arrow to remove it.
release the boss and then push the lever in the
direction of arrow to remove the CD compart-
ment lid.

Fig. 5-2 Fig. 5-4

-6-
5-5. Main Board Removal
1) Remove four screws holding the CD drive
unit supports.
2) Remove five screws and then the main board.

Fig. 5-5

56. Power, Power Indicator and


R. SW Boards Removal
I) Remove three screws If@ and then the power
board.
2) Remove screw and then the power indicator
board.
3) Remove two screws @ and then the R. SW board.

R.SWBoard

Fig. 5-6

-7-
6. CD DRIVE MAINTENANCE AND ADJUSTMENT
6-1. Maintenance of Pickup 6-2. Laser Pickup Replacement
Procedure
I) Checking the laser diode
As the laser diode wears out, the RF level Turn the power switch off and unplug the power
(amplitude of eye pattern) becomes lower. cord from the AC outlet.
Check that the RF level is 0.8V - l.4Vp-p during
maintenance. If the RF level is less that 0.8Vp-p 1
then the pickup should be replaced.
Replace the pickup.

2) Variable resistor on the APC board


The variable resistor attached to the pickup on the
1
Set the door close detection switch to on
APC board is used to adjust the output power of the
manually and turn the power switch on. Check
laser. This adjustment is done at the facto!}' and that the laser emits light for approx. 3 seconds
can not be performed in the field. If the laser's and the pickup lens moves up and down.
output power is low, the laser diode has worn out
and should be replaced. Adjusting this variable [Note] Be careful not to bring your eyes too
near to the laser and do not look straight
resistor may cause damage to the laser diode.
at it as this is dangerous.

l
Check the FE bias.

I
Adjust the focus gain.

1
Adjust the TE balance.

l
Adjust the tracking gain.
I
f
Check that the eye pattern waveform can be
observed at the RF test point. (0.8-1.4Vp-p)
I
i
Replacement complete

[Note] Since the adjutments influence each other,


it may be necessal}' to repeat them 2 to 3
times. times.

-8-
Adjustment Preparation 6-4-1. FE (Focus Error) bias adjustment
Apply markings to the positions of the variable resistors and focus gain adjustment
before adjustment. If the adjustment are out of the I. Connect the oscilloscope to test point FE IN as
specifidtions, the following symptoms may occur. shown in Fig. 6-2.
[Focus gain] 2. Turn the power switch on and set the CD drive to
If the focus adjustment is too low the pickup lens will not the stop mode.
be able to focus properly and the disk will not rotate. If the 3. Adjust Rll4 (FE bios) so the DC voltage at the
adjustment is too high portions of a track may be skipped test point (FE IN) is OV.
and noise will increase. 4. Play the first track of the test CD and adjust
[Tracking gain] Rill (Focus gain) so the DC voltage is - 7mV.
If the tracking adjustment is too low the drive is more
susceptable to shocks or bumps, portions of a track may be 6-4-2. FE balance and tracking gain
skipped or the disk time counter may stop. adjustments
If the adjustment is too high the pickup lens may oscillate I. Connect the oscilloscope to test point BP IN as
leading to unstable or distorted sound. shown in Fig. 6-3.
The focus and tracking adjustments are done so as to 2. Turn the power switch on and play the first track
mutually satisfy conflicting characteristics. of the test CD.
3. After play has begun, connect the TEST pin to
6-3. Test equipment and tools GND.
necessary for adjustment 4. Adjust RI04 (FE balance) so the center voltage
I. Oscilloscope of the waveform is OV.
2. DC voltmeter 5. Adjust Rll3 (tracking gain) so the amplitude of
3. Non-metallic adjustment screwdriver the wavefonn is 0.4V as in Fig. 6-4.
4. Test CD (A-BEC TCD-792A)

6-4. CD Drive Unit Adjustment Proce-


dure
r--------------------------, 10k Q 0
:, :, FEIN

IW
'
I
'
'I
''' Fig. 6-4

: _ _B
_ _ _ _ _ _ r_ _
~--
$ !
vc
Fig. 6-2

10k Q Oscilloscope
IC201 !\
'I
>
401C BPI.._
'' '''
I' I
'I 'I
'' ''
' '
:' ''

Fig. 6-3
'
r-----------------' '----------------------------------------------------------------------------------------------
R104 R111 R113 R118 R114
t:rn ~ L@] IBPij I F. OFFI FE IN. GND

Fig. 6-1

-9- -10-
7. BLOCK DIAGRAM

fCtRTRI DGE CONNECTOR .----------------- r---------,


L CNl
1
1
MPEG 1
CO~TOR 1 I
I
MPEG
I
I

I ~XBGO-EXBG2~
~103)
I I r--e- VIDEO
I I 1 1
I

_t
/CN3 IC301 I
t__~.:.::.:;.:.......:-=-::=-:.:_--l,~ I 0 [) I I I I
+
lJ
+9V (CO DRIVE. FOR PLLlUSED FOR THE POWER SUPPLY I I I I
POWER
I 9 I
SUPPLY
BOARD
+SV (VCC. AVCC2l USED FOR ALL CHIPS OTHER THAN SDRAM
SHI ~ I I I I
..__ __, +3 3V ~VCD USED FOR SDRAM BOARD II ~
II I BUFFER I 4Mb it
CONNECTOR 1 OCU I I lC302 I
CLOCK! I IC301 I I I

~ ~~~~~~~t~ .1
I I I I
I I 1 MPEG 1
14 I I 1 j----. AUDI 0 I
2 I I I IC40 I I
PLL UP TO S BACKGROUND SCREENS 1 _ SHl 1 I I
IC 0
2 MCLKO (SCROLL SCREENS) 1 1----. IC!OI I I I
MCLKI

~ J,I 1 ~t~l
DISPLAY PRIORITY I I I I

~:1
CAN MOVE SCREEN UP. DOWN. RIGHT. : PROGRAM --i-4Mbit
LEFT. ROTATE MAGNIFY AND REDUCE
~~~~ 3
(Ng~o8~~Dl
NTs/ / /
/'1/ COLOR OFFSET
SHADOW

D. AUDIO
I 1 _
---..
BUFFER
RAM
\
I '-
I
I
I MPEG I
I
I
I- UP TO 72 Ml NUTES
(30 FRAMES PER SECONDl
DOTSEL OSP FUNC Tl ONS t__---+---t MULTIPLEX
I CI02
I
I
I BOARD I
I POSSIBLE ON ONE co.
EXTCLK LIKE CO-PROCESSOR IC33 I
FOR SH2
INTERNAL WORK RAM
4Mb it I
I
l<OPT I ONAU l
L---------.J

3
28. 6MHz
32bit
RISC CPU
4Kbyte CACHE
.---j
SH2
(MASTERl
!Cl
A-BUS
ADO-AD IS. AAO-AA25.)
;,..___ _ _ _...., ( A-CONTROL \ J~~~~----1~102~----~J
r----,
I
1
I
I
1~
V () \
1\
1 '-....-/
}
1- X2 SPEED
1 CD-ROM
I
I
INTERNAL MATH
PROCESSOR
scu 1+----------\\--L__----f---+--_j I L...y- ICD
32bit ~--------.--------+! DSP ([ 4 3MHz) I T :DRIVE

J 1
INTERNAL/EXTERNAL 3DMA CHANNELS L ____ J
1------,-----~,-------r-t------t---1 SCSP
SH2
(SLAVE:)
WORK
RAM
I CS
B-BUS
( BOO-BOIS. )
1 ' IC17
~ DSP (SOUND>
DAC
IC~ 2
IC2 [-----. HIGH B-CONTROL L--r--.---' ~~~~~ELS
~ ....-~--..
L---.. IC3 -4Mb it 32bit RISC CPU
(SORAMl PIXELS SPRITES. FM 8CHANNELS
20MHz
C-BUS
CDO-CD3l. ) -
- POLYGONS l ----
..
COLOR CALCULATION')~
VOP I ""-----~ VDP2 1 - - - - ,
ICIO IC14
4Kbyte CACHE
( CAO-CA24. WORK INTERNAL DAC
-4Mb it TEXTURE
CONTROL RAM 32b it INTERNAL. 16b it EXTERNAL
SHADING SOUND - 4Mb i t INTERNAL MATH PROCESSOR
f-----. HIGH 2Mb it
4 DCC
IC6
IC4
(SDRAMl
-- L__,. RAM
ICI9
SPR l TE FRAME - 2Mb i t VIDEO
CHARACTER I-- 1-- RAM 1------- RAM
RAM IC12 !CIS SOUND
ICll ~:16bit CISC CPU
~~ JI C26~ rc1o
I Ec-sus -- CPU
68ECOOW II. 3MHz
~VER
4Mbit
IV~~ ==------------ (ECDO-ECDIS.)
ECA I -ECA 19
4Mb it
.--
FRAME -2Mb it VIDEO
ICI8

' - - - - - - - t l RGB ENCODER


L..... RAM
r~~ll< ~ ~I ~C~7
~RAM TO TV
[c13 IC16 -~ IC21
DATA __,. - 4Mb it VDPI READS CNS
ONLY - - r-===~ '--
L....-- DRAW COMMANDS
FROM HERE AND 2Mb it
.-- THE DRAWS TO THE
WCRK
FRAME RAM
5 y illRc",hlC BACKUP -
[-----. RAM
256Kb i t
IC32 IC8 CLOCK3 CLOCK4

n
32 768KHz
4 M b i t 4TMHz

f___- (~~~i~OL )
X4
TO -....1----.. X3
CONTROL ul----1+------t SMPC ~
PADS [2_0-- IC9

BATTERY
(CR2032l
j INPUT: MRES FROM SW3. SRES FROM SWl
SYSTEM RESET CONTROL l OUTPUT: CORES. COPRORES. SNORES.
~ SYSRES. MSHRE~ SSHRES

A B c D E F G H
- 11 --
8. SCHEMATIC DIAGRAMS
8-1. Schematic Diagram-1 [Main C.B- 1/6)

//~~r7~//~~~~r7-r~-r-rc~~r-------------~----~------------------------------~----~--------------------------------------------------------------------------~M~-<=>CA~ (?)
~----~-------------------------~--~----------------------------------------------------------~ss__~rnoos QD
~--~~---------------------------------t--~rf------------------------------------------------------------------------------~8~8 ~-c=>crwsc~rnQ~
-N

~~~~~~~~~~~~~~~~~~~~~~~~~~~
~~~~~~~~r7~
vee CCSl 77_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _:_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _~BB~~~ ~
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CKE r-~--:~""'7""---,-r7""":r7-:r7""7"""-----------------'BO!!!B-t--<= 88USC~rnQ
+------'.;...J FTC!
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R132 l c---it FTIII
OJO 27
029 1-25
CIJ29
~--~C02~B~ I !C3 ] S1il'i' tl
N--~CR~AS;,._ ~I;d7 ~
IISCK IOI< Rl 100 4 o-----yfr FTDA 028 l-2;;;l;-~CIJ2~7~1
.-.imm
lt!XD R2 100 101 SIX 027 I-22~--~CIJ2~6~1 ________ RASSO-RAM-4M CKE
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"Txo RJ 100 102 026 21 CIJ25
~--~CC~AS~--------~1~6 ~ ~~-
vee

7~0A(](I
025 19
024 17
C024
CIJ2l
~--~0~~0~---------i;l;.-14 l~ cs t>'-'18_ _ __, vee
00.:1 RICO !OK
DflEQI D2l 16 CIJ22
N--~o~~~--------~~~uoon 0011 RIO! !OK
8~ OACl<O 0012 RI02 !OK
{Q;u DR00
022 15
:: ll
C02!
C02COI90
@ CLK4 35 CLK
R9B ID!l R!Ol !OK
Of'O.....----~--------t---_,;1 ,;04;-t PLL vee 000 ~2---;;:co:c:o-1
!OK CRil Ri04 !OK
~ A2:~
CA2
'(_Lfj,...;.,;.;!l(l
~ uu I r'VIIIr-1f----~108;-! CAP!
019
018
II
10 COIB CAl 001 l+l---;;:CO<:;I_/1 1'--:C"'Ol"'l:---il"iiS'-f COl 1 MIREO ~ MIRQ CRAS RlOS !OK
CEI ~ CI~T~
o~
C2 I R4 9 ~
~
CAP2 !Cl Di7h;-9 --~CO:;!I!...
7 ,1 CA4 23 002 1-7-5 --i;iC02<T-/I I'--:C~O;<;JO:---il"i74i-l COlO 1'~~~~~::~~6~7~r.:~~~~~
016 1+8--~CO:;!I;;,-6,I OOJ ~6---;;:CO"'l-1 I'-'C~029~~1c;7l'-f CIJ29
~i :~
l r-a 470P* 3K CAS
l 106 PLL vss SH-2 (11) DIS ~7--~CO~I~S.J CA6 004 ~ 8 --;;:CIJ4~_,1 i'-'C~02~B;--;1"'71<-I C02B
eeSI
eesz
RIOB
RI09
!OK
!OK
2
014 1+5--~CO:;!I;_4, I ~
CA7 oos i-io9---i;icos<7--/l I'-'C"'02"'7__-il"i;69<-l C02l
AS eeSJ RIIO !OK
1 .6iP IQI(J ,._-+---:1:;;18<-! CKIO Oil 1+3--~CO:;!I;,-3,I CAB 006 ~II,_-;;:C06~-1 j'-;C"'02~6:_-;l'768~ C026
JO A6
~ L--_,.;1~12:-J OOI r-.,;;12,__--;;:CO~I-1
CIVECF Rill !OK
I+~--~~~:~~,1 l'l'~~~~~~~==~:~~tl
CKP!lEQ CA9
012 20 AI CBS Rll2 !OK
llOo--+:-J- CKPACK
CAIO 008 l-':il9__ -i;iC08~/I CIJ25
165 CIJ24
uoo---Ht-
10 ~
EXTAL
Dll
010
144
14l
COlO
CIJ9
CAll 19 :: 009 !-;i40,--i;iC09i7;;-/l
0010 J.-:;42,__--;;:C0;;-10~
C02l
Nc0<02~2---:176l~ CIJ2J ADIS ~15c..___,;:AD;;_I5~~
CRill
CVAIT
Rill
Rll4
!OK
NOT USED
XlAL
~ Nc'i<o2"'1---:17.62~ C022 CIRLO RIIS NOT USED
142 COB ----J- OOII ~-::;4lc_-;;:CO,;.I;,-I-1 ~:~:----~:~g_:;._;---.J
:~
vee AOU CIRLI Rll6 NOT USED
07 :~ : .....4 vee 0012 1-7.45,_--i;ico<i-12..,_,1 I'-'C"'02,;:0---ii'F;61<-I :~:; ~12:___.;:A0;;_12;.._~I ciRL2 Rill NOT USED
------J- vcco DOll 1-7.46,---i;ico;;-'l;--- 1 NC"'OI;.,9,.--;l7,59;..-t co 19
116
llS
Ill
ll6
cos
CIJ4 ~ o--M-
>----fr
VCCQ DOI4 ~46c_-;;:CO~I4;;..-'I 1'-'C~O!,;:IB:__,Ic;;SB'-f
1'-'C~O~il__-;1~56,.....
COI B AOll h'IOc..___,;:AO;;_I,;_I--~I
AOIO ~~----~~gi'!..O---..1
CIRLl
BRLS
Rll8
Rl19
NOT
NOT
USED
USED

9 04
Ol
OZ
llS
Ill
Ill
COl
C02
COl
y
~--.-~~~~~VeeQ
IIc12;Tc7 l:"ctJo
vcco 0015 I-"49___,C0,_15"-'l

TP96
i'-'CO~I6__-ii7Ss'-f
l'--:c"'D;-;15__-il~54i-l
COil
COl 6
COIS :~ !-;;..6____
5 ---,;:;;.--~1
,;:AA008~7--~I
BGl
BACK
BRfO
Rl20
Rl21
Rl22
!OK
NOT
!OK
USED

I HI TACH! ~: IJO COO l'fo!;TO.if '' 26


vss IN)~~ ~j~*~~~~~==j:~~~j ~:~ A07 i--<-
A116 !+~----~:~~---..1
~ vss IN) rE--j I'-'C"'D;;I2__-il.!i50<-l COI 2 AilS 1,..;.2____,;:A0~4--~I
~ vsso NC"'Olo\11__-:lc;: 48H COli
res A0 4 207 AOl
~ vsso 1'-'~~~9,_'o__-;:.:;:~,. . . : o l!S-5688 AOJ 206 A02
vee 3
A2001 1 47
vsso
vsso HITACI11
cOB
COl
145
l4l
COB
COl
scu ADZ 205
:~: 204
AOI
ADO RAS
' L.-----...,A~9 CD6 142 C06 IOKB 5
cos 141 cos AA 2S ~20~l--__,;!AA~2?-5--.. AOIS I r---"-
~~~ :~ ~~~~===j:~~~;=~: 1,....0~'=-0:o..;~--!;-;-1---\,M.r-e
~of
CCS3 C04 AA24
AA 2l .-45 AA22 AOI2 4

1
CIVV C02 ll6 :

9
COl
coo
IJS
134
COl
coo ::~! :~4:2a===~AAA~~A:I09I=~ ::~~~!.!:;.:;:~~~8~"!-~VINJI\r~
8BUSCI)j!R1JL c=::>-'88=--.....
AA 19 l-'l;;9------'A~A'-.;l8~1 1,..-':::=----!;-9-1---\,1\1\r-e
I'-~CA~24;-..cl~l3;...~ CA 24 AAIBI-JB~--...!A~A~II~I 1..--'=----'-+-vv\.4
I'--~BI;;,RL~2'--~====j~t=~c=~-,
I'-~CA'='2lf--il""l2~ CAZl
I'--7.CA~22;---il"'ll<-l CA22
AA17l-l~l---!A~A~I6--J 81~2 --.o
AAI6 1-'36~---'A~A~IS~I
I__BIRLI l'--7.cA~21;-_,.;I:,;:lOH CA2 I AA IS l-'lf'4------'A~A'-'14---1 Q
J'--7,CA7;20;-_,.;1'"'28;'-J CA20 AA 14 !-'3:;;;3------'A~A~IJ---,J vee
I'-~CA7.19;--il""26,..... CA 19 AA I J l-l~2---!A~A,.,I2--J
A2
@ CLK4 J5 CLK
r:
r:
r-U-o
rE-o 15
14
~==~~:;:~t=~:~~~~ ~::~
f'---;C"A~16c.._-71~23;..J CA
AAI2
AAII
~30------'A;;A~ll~l
1-29~---'A;;A~IO~I

l'-~cA71S,_-il'='22~
16 AAIO I-'2~8----'A~A9;;-,I vee 4
CA2
~ AO
DOC 2 C016 CA IS AA9 I-'2~6'-----'A~A8!__,1
RA4
CAl
CA4 2l AI DOl~~
D0 5 COIB
I'--'C;:;A~I4---717;20;..! CA 14 AA8 ~zs'-----'A;;A~7~I lOKB 5
00 130 coo 2 f'--...;C"A"'Il:---71.;.,:19;-t CAll ...----"+-
24 A2 AA 7 24 AA6 A07 I
OJ Ill COl CAS
DOlf-4-~ 1'-~CAC!-'12;----il'-"18'-f CAl 2
27 Al AA 6 23 AAS A06 2
02 Ill C02 CA6 D04 8 CIJ20 I'-~CA7.IIf--il~l6~ CA II AAS 22 AA4 3 -v
28 A4 I'--7.CA:,c10,__-il~l4;1 ADS
:~
CA7 DOS 9 C02!
Ol : 29 AS CAl O AA4 1-'2~0------'A;;A;.l~I
CAB 00611 C022
04 137 cos lO A6
l'--7.cA,;-9--_,.;lc.;;llH CA9 AAl ~18'---'A;;A;..2~I

=
CA9 D07 12 C02] AOJ
I'--7.CATB--...;1:7'121-1 CAB ~17:------'A~A;-.1--J
~ 138 C06 CAIO 20 A7 008 39 CIJ24 1'-~CA:;,-7---il:,oll<-1 CA 7
AA2
07 140 C07 CAll 19 :: I'--7.CA,._6---ii"'09;1 CA6 ::: ~16:_____,A~A,_O~I AD!
08 142 COB 1m :; I'--7.CA:.;-5---ii~OB0-1 CAS ADO
DOlO 4l CIJ27
16~ 09 143 CIJ9 r--:J- J'--7,CA;4--_,.;1~07;..-j CA 4 BIJ97~
~:~ ~s,_~CIJ28~-1
X!AI.. vee
Ill o---j#- EXTAI. OIO 144 COlO K vee I'-~CA7 J __-ii~06H CAl
Ill o---fH- CKPACK Oil ~I--~CO~I~I-'1
~2--~CO:;!I~2-1
f------ri.vcco DOn+-~ I'--7.CA:;.2---ii~OlH
I'--7.CA:;,I---ii~02;-t
CA2
012 ~ ~ vcco ~:~
CA I vee
@> IQI(J - - +----:.:.11=..8-1 CKP!lEO
CKIO IC2 Oil 1+3--~CO:;!I;-3-1
1+5--~CO:!!I;,-4-'1
y ~ ~ vcco 49 COli '-....::!.CA,_O---'1"'-01'--J CAO
014 .--...............~c.t vcco
,.,....___,____,_____,1---~106"'-1 Pll vss SH-2 !Sl t-;.7--~CO:;!i~S-1
fo ,. :!1.
DIS Rl24
_l_cs CE6
rf3 "'~~::::!::TI csP70PT, 7 ~09 !-;;..~--~~:;;:;.~-1 T 4/K
vee J: RS
016 tao. 26
vss 5
L2
100.
IOO. a 022Jo - '17 108 CAP2
'-<>-----~-------+-----''""04'--1
"'
:t vee
017
OIB
019
020
10
II
ll
IS
COIB
C019
C020
C02!
~ vss
f---To
~ vsso
VSSQ

+-----70rr-l DR00
~ 47 vsso
vsso
teo---.- OA(](O
OflEOI
:
023
16
17
C02C022l HJ1ACI11 z
1--MC\1__.<::1
Rl25
~7!(
88

AB '---'00~=>
~s~Txn*-________~R~I~~~~~ao~_1_9__
~~~~~~ 1 024 ~i ~ ~~~~~
AA8US

CD
~~~xn~----~---~RR~:~~~~~:~:~~4-----:~~~~ Rxn :~ 22 C026 '-...;...:,..:>....:>...::.....::.....::..._:,_..:...._________.:.___~882<:::> ABUSC(JfrnQ
~~~---r--~~~~---'~~ ~ ~
~
htn
y
FTDA
~!OK
~Rll4
=JIGK
21~
22~ FTIII
027
:: J-:;27,.-~C029CO~l0~ ~ SiPAsSCAPACJT~ rri"rCi------ ~ ~ Bir/:ssciPACir~ r!Jlrtz------ ~ r-----------------,
I 8YPA1S CAPACITOR F<Jl ICS I
FTC I 030 28 I VCC ,9. 21. 31 . 41. 55. 69. 79. 94. lOS. 117. I
@ SFTI ,._+_-..!.9'1!...j FTI HI!All11 Oll 29 COli 1 vee M2 1 ~i f~2.4Ma 54. 6a 67. 84. 9t. 1 1 vee t,J\~i ~~2.4Ma 54 60 67. 84. 9t. 1 121. 139. 149. !60. !Ia 184. 193. 208 I
1
I GilL!. 14. 2a 26. ll42. 50. 56. 69. 78. 8f>
I
I
91.98 115. 121. ll4. 141
vee
I
I
I
I G!IJ,6. !Ua 26. 3l 42. 50. 56. 69. 78. 86.
I
I
91.98. liS. 121. 134. 141
vee
I
I
I
I
1
IN) ~~1 lol9 d~: rfs.4 M21~
1\1.157.164. 112. 179.189. 199
al::v. ~
I
1
~,~~~~~~~~~~~~~~~~~~~~~~~ ~ I I I I I V I
j_ 6
J~
1_r.: T T I
~~ : d:C67
I o.,.
"Jc3 CE2 : : .G;-
:fa.,. J:C69
T~'
J:C6
TD.I CE4 : 1 C72
I ~;
*~71
I a. I
*CIO
I o. I
::;::C9
I 0. bo
CE7
I
1
I
~~~--~~-~~--~--~~ ~ ~MN-c I I a. ,. I 0.1 ,. I I I
~~~33~~~~~~~~<~~~~~~~~~~~ I 1 I
I 01P'l7 I I 1 I
L---------------JL---------------J L- ------- - ----J

~------~A~------~--------~B~------~---------~C~-------L--------~0~-------L--------~E--------~--------F~------~---------G~------~--------~H~------~
13 - 14-
8-2. Schematic Diagram-2 [Main C.B - 2/6]
@ EXIIC IB YIIEO@

GD~~~~ ~~~~~--~------------------------------------------------------------------------~~ OOTQ..K2


BIBJS 88 ~fUSED
1

,.....__.!i_ @ ,____1!_ ~~~ ~ ~ ~~-~~~'---------rn7R~----------------------~


nBb-~~========~FOeS
fOwt==========================~~
NTSC NTSCIPAL "'"'"'
rU( I IQK
1"0\l I)~
w 11a u~t:

@ STSRES ~ RESET !C12 @ IQ.KO 76 u IClS

F'mru ,60
Fnro l:l:;T--61-----~
FOR~S
FOCC~.~S------ii<lll CAS
t: mSD-RAM-2M ~
liE
Ln
J)~,.._---'
@
@
EXSL

STSilfS
~EX:
~ UT ~Wm ~-~:+1'5;-------F.'ii:::~---ii<Jr m'ill-Rt-:m ~ ~-
cs J)l,_B_ __, 18m RM.Ot ~ ' : : tD
FIUXJI "62 FIIWin 1_4 LOO~ @ExL ~WT RAL~ " ~ ~~-----'
FIILOJI 6J ~oWin uoc~ RALOI go_ RAWI I.()Qft Jl
FOCLK ~ FOCI cu: t ~26 @ EXSYI: ---.c Effiii RClJ( 140 RACLK , II: -H--o 48
t ~27 IC -"'-o 49
SCSI 11 ~ 8 IT ]~ R~AO 10 21 AO OOO 2 R~OO
FO~O !~ F,IAO 21 ~O 000 H----'.~',;---..,_0 ~ IO
R~
=~ 22 Al 4( RAAI lO 22 Al 1111 J
FOAl "' IAl 001 t-F--F.<ii;i-J Offii
_R( ijj
F0~2 1-_;':T------;;::;.<2:;------~-t ~2
1 002 1-7--=-J RrnW RAA2 J-+.<>-------j--im~------:5T1 A2 002 RA
2 0Tr RAAJ ~~--------+-~~---------f.HAJ
IROI
N~--------=:d
'-.-=: ll _ _ _ _ _ _ _2::!d; ~
BRil.:_:__
21
mo
~::~
FOAS ~:
49 ::!
lA~
:!
AS
0031+-~-J

: r'9;,--~FOII;;;-----.J
''
4'
~
VlNf
HINT
RAA4 ~~--------+-~~--------~MA4
RAAS 1-+.;~--------+--~RA~S-f----------~~
OU
~~--~~-.J
005 KA
8 :

FOA6 '' 1~6 ~6


fUll R~A6 ~T---------t--~KAA6~--------f,rl~6 006 -~
F0~7 ~~ ::! ~7
: : 12
008 39
FOD RAA7 ~7---------+--~RA~~7--------~~?
RAA8 1-T,-~----~-~RAAII;------'iH All
~l
Dll8
R~
RA
:::: 55 IA9 _1'1_ ~ 009 ! 40 RAA9 ~~--------~-~KAA9'----------~~9 IJQ9 KA
1 4
0010 1-' ;:;.---
2
---;,;;s-..J 0010 1-*----:~:;--..J
20 R~O
~! 'IIIUSO
)0
l'--i800
Sf.'--- - - -- ----!8 FOOO 1-:;7---~-~~:~~'-----. -----;;; vee 0011 l-'":F---;,;"*"..J
1

21
vuo R~O
RADl
0011 1-7____,~;\--.J
1'--'BO~l---------*-125 'IIIUSI 0012 1-';;---~*'-..l
4 5 0012 1-*--i~H

3.
,____ vee VDI R~l
1'--602~-------~ 27 '18US2 ::~ l-7i;-67_-;,;;
FOOii-2'.! vccc 14;r-
0013 1- 6 ~iif7--.J 22
Yll2 RA02
RA02
RAO:
001 J r.;-----,~7--..J
1'--i:~--------i<i;-1 28 'IIIUSJ FOOl 1-':T-::- -.;,;;
F00;7-l'.! LAC VCCI 0014 1-''411
:;-----;,;~..J 23
V03 R~J 0014 ..=.---:=;;-.J
I'--BO;<;;IJ5;;----- ---_l9_-;;;;-t '18US4 FOIJ4 f-*--i~~:~---.J I vee~ 0015 1-'14;_:_9___:_:::..:..:_-.J
80S
25
26
V04 RA04 "'"'
RAI
00151-'-'---'=-=-..J
l'--'eo""IJ60'-- - - -- - ---7Ju:<-l vaus5
~:~ l-'7i'i-2--:F~006-J J,, vcea VU5 RAOS

fo--i. +~;t:f~tf 26
lllJ6 21
('-- ...lll
U::i--1- - - -- - ---ili-il '18US6 V06 RAD6
IIlli 28
1'-~re:;,----------'<
JJM '18US7 IClO FOOl I-'7J.T---:-o&f~-J vss ll8 30
VU7 IC14 R~7
r-~:;;----------'<7-1 vaus8 V08 RAre
1'----lO::f.--- -- -- ---iH VBUS9
JIS-5689
VOPl
~:~ J-,7;:.;-6-~F009:.---J ~vss Jl
32
V09
315-5690
VOP2 R~
,10
1'-----.<iiirr-------- ---i;'-1 'IIIUSIO FOOlO l-'77ii;---;F~OO!O;:---J ~vsso J3
VDlO RADIO
3 1'-~;;.,;.---------'<:-1 'IIIUSll FOOl! IT.-~FODlC\--JI vssa ]4 VDll RADII
1'-~~--------'<:-1
r---;;;;:i-7------ --7i-l
('-_,BO~I4;__ _ __ _ _~ 40
'---'BO""'-'lS, ___ _ _ _ _ _ _~
'18US12
'IIIUSll
VBUS14
VBUSlS
roo12 1-'8<17---~~:~:~~~
FOOIJ I-;8~2-~F001~4I
~:~:~ 1-'8"'--
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ODl~'--J
~
vssa
vsso tEe
cs
BV
Btl
35
l7
J6
VD12
VDll
VOI4
VOIS
RADI2
RADIJ
R~l4
R~lS
i-
,--
t
115

_\'fS 14, YeS ~~,1~107~----'~~leS_;__ __ _ _ __ _ _ _ __ _ _, RBCS


I'Jil
llDCS -' RillE
.--------------~~~-----~~ 106 Fl\IE 1!1!'0 t::4
ICll :.C13 IC16
stRAn-2M ~ RSRAS I SO-RAn-2M ~
c3/ .. CKESIJ-Riolt-411 RAS j)ilc;-7_ _ _ _ _-iVmRAS_ ______+;IIl;<1, Vi!AS FTiUS j)i.lcc.;--D9_ _ __ F~IR~7-S-----T,II7<1,"ffi~ 1'-------i~QI~-----~ llllm ~-----f--~RBCA;:;..-S------,;;<:1
_2 ~
.___Y--:-:1 ~;E ru ~16 vc to: veE FICAS 110 ~~~~: 16; ru ;;or r:r.;- --' ~-~~-------~
49 E~I
48 EXBGO ffi
llllm OT-----+---;;;;;:;;:;--------;-;<:~ ru
CXE
~;E IY.f-----'
.___ __:_:lBQ; CS LOilft - 14 VLOOI1 8" VLOOM FlllXJ1 ~:~~ ~- LOlli! CS p1~
8 ---' ~-~~-------~~~EXBV2 RBL~ 1-T-------+-~
-6 ::L:!:;;-------.:i-1 LOCIIt fS !:>'-"------'
~:~ ~ uo,llft ~ ~~ ~- ~~n r;~ to6 ~ te J; ~~ t i J3 ~ 30
1'--~~------T.--1
~-~~-------~~; E~4
EXBGJ RBLOI
L __ _ _ _ __;<:. ~~ II: ~ 50
4 t~31 ~-~~-------~55E~5 t .l.!__Q 51
1'--~~------~~~~
o 1'--~~-------FH~~E~l
:~~
VR' 000 AD 21 VRAO
:~~ VRAM~O FIAO II FlAO 21 AO OOO ! 2 FIOD RBAO 1-;;-98- - - ------;<;Bi7i-AO_ _ _ _~cf ~0
Al -~ VRAl
VR 001
VRA2
VRAMAI Fil'i:<-Al_ _ __ _---i22;H
FIAI I-T,--f------;,;
~IA2
AI
~2 001 : 5 ~:~~ 1'-----1~;--------T.-1 EX8G8
I'--~~.1~
RBAl ~I
VR
VR
002
OOJ
A2 2 '
AJ 24 VRA; ::: vRAMA2
FIA2
FlAJ FlAl
2l
24 Al 002 I 6 FlOc 0 ------~~:E~9 ~::~ IAl :~ : : !-"--- -;;;;;
RBDii-3'.!
165 VRAMAJ IJQ3 I 8 F104 1'-t-~~7-------T.-t
60 EXBGIO
~::~ ~::~ ~~ :~
VHA4
~
VR 004 A4 , 27
VRAS ::~~ 120 004 I 9 FillS s--------~ 61 EXBGll RB~4 14 ::~ A4 004 19 :
9 005 !5 28 loo
~ 1116 "1T---- --7;.-.J
62 EXBG12

~i:~ :: ::: :~
VROb DlJ6 VRA6 167 FI A6 FlAb 29 A6 :
A6 29 :: 106
E~ ~~ ~:~
VRAMA6
VHU 007 A7 30 VRAI
VRAII~l FIA7 '" FIA7 30 ~~ 007 FIOi 007 12 lUI
VRII8 ]9 008 A8 20 VRAB FlAB 20 008 _FI 008 ]9 108
~::: 1'-~-~~7--------7i-! 65 E~15 ~::: R8~9
:o~Hi
_YRll9_ 40 009 VRA9 122 FIA9 19 ::

B
!9 19 009~-~..---.J ' i - ' ; - - - -- - - 7;'-1 19 ::
4 :::: 66 E~l6
~:~:o 0010
Fwo Fl oo
00101-7<- ;,;;;;-"-'1 ~---i~'i-i;--------;6TJB EXBGL 7
ic-- ..lli. VRA/100 86 ___!_ vee 0011 r.,;-;,;;;;;,--.,1 RS~O

P.
vee VI r--~~---------::;c-1 EXBGIB 142
VR012 45 OOI1
r-- 3~ ::~ :~~ OOI1 RB012
VROIJ 46 0012 vee

:~~~ E ~
144
";
VRAt10 1

~~~~
FIOI
F102
87
88
HOI
Fl02 9C vee
VCeQ ::~ t-4;r-6--T.iif7--.J
1'-~-~;;;;;;;;,;---------*--!
;~ EXBV19
~~o------------T,4
11 E~O RB02 144
RB
9 veco
0012
0013
R801!

+
VRDI4 48 lllll 1<t1 48 RB014
:~ F:~~ 0014 !=.:---:~~~ El ~~ E~l RIIOJ 145 veco
::~
~ :::~
F IOJ VCCQ 1-':
12
:~~~ 1t= :~:
_49 0015 1--'-'--:.=:-=--..j 147 vcea 49 RB015
y VIi :: Flll4 92 FI05 ,------~~>----ft"-'"'--1 :~~~ E~lG2l E~22 RII04
+~i.i. .
~:~ hH7--T.ifi---J f~li, f~' ~f~'i!fci:S
_fXON_ 74 ~J
f ~~l.f~'t:fK'f:fv--c.;~:-:; .;-~ ::: ~~~
RBOS 148 veco
5 3 26
RII06 CIJ6
vss '26 e:;
:~
VSS
vssa
f-
~
"
vR 155
VRAt109
VRAt1DIO
~:~
FIDlO
91
98 liD
t2!. vss
vss
VSSQ
::
RII09
RSOIO
.54
_55
RBDIO
RSDI :
'" Btl
26
vss
VSS
VSSO
VSSQ Vf< VRAt1011 FIDI I F_l_Ol! vsso RSO II _RBOI 2 vssa
VSSQ :: :~; VRAt1012 F1012 Dl< vsso RBOI2 lSI!_ ___Rilllll_ ~ YVSSSSOO
~H~lT-ACH_I_v_sso__,~ ::,l !58 :::~
FIOIJ
F1014
lUI.
lDI4
vsso NEe RSOIJ
=~:~
159 RHU14 f----='-
L...----,0,...,-14
tEe
C4 [,---"0=---'-16~
0 VRAt1015 fiOIS 1015_ 160 RBUI '

r------
I BYPASS
-- - - --- - -,I
CAP~Cl
TOO FOR lCIO r ----------------- - ----,I
I BYPASS CAPACITOR FOO le14
1 veed ~3~52.75.9~ 11 7. 1 l6. 159 1 I vee, 10. 29. 4l 75. 69. Ill. 13n 151 Avec2 B5 I
I GJJ fo; t[2.2 M\Ki!l 614l0 ~~~ 89. 9'- I I Gill ;-,~5.1~ ~55~4~\~ 97. 106. A002 81 I
I I I I
I ~ I I g ~~ I
6 I
: I I I I
y
CES
I
I
Vll'l -2 llf B8
II I I I I Q eEl2 ~ II
I
I
~
I
I 1 AIHI3 = ~~42 I

L- ------ ----- -- - ~ L--- -----------~- ------J

A B c 0 E F G H
- 15- - 16 -
8-3. Schematic Diagram-3 (Main C.B - 3/6]

@ STSRES

~ ~~
=-N
~~ ~::3V}
~~~
~ ~IS!
~~}A ~~ ~~
OOBUS 811

lllUSCOHROL
Ell

~!g ~
_,,...
~

o
~~

N
c; "''"'
--- ~ = ~ ~ ~~

@ rnK I ~ ti:QK ~~~ ~ ~~~ ;~~~~ MACK ~ SCSPCLK @ ICIB


68ECOOOFN 12
BOO
801
6
I
ti:CO
lOll
= I SCAS
802 6 69 SCAI l4o------% AO AS
a scoos
803 4 tlll2 SCAI AI UIJS
68 SCA2 33 9 SCLDS
IOJJ SCA2 A2 LDS
804 3 Bl SCAl 34
80S 2 IOJ4 SCAl
SCA4
Al SCR/\1
806 l
MC05 SCM
86
BS SCAS
J6 A4
37 RAI 10
10)6 SCAS AS
807 126 B4 SCA6 36 ll SCDIACK
lOll SCA6 A6 DTACK
Bl SCAI l9
BCSS l2S
tin
SCAI
SCAB 82 SCAB 40
AI
A8 00 L2S SCIPL2 2
8R!JYS 9 61 SCA9 41 26 SCIPLI
IRQS 10
ii:R!!i SCA9
19 SCA IO 42
A9 !PIT 21 SCIPLO
iWlT SCA IO
78 SCAli
AIO
43 All
IPLO
IC19 SCAli 77 23 SCAVEC
tt15 l4210AJ-I SCA l2
SCAl3
16
SCAl2
SCAll "
45
Al2
All
AVEC

Ill AS t:~l5 SCA ll


75 SCA14 46
Al4
ti:ASO
IUo
28
12
" 1lE
"CAS AO
16
17
MAO
MAl
32
33
MAO
SCA !5
SCA l6
14
73
72
SCA !S
SCAI6
SCAli
41
48
49
All
Al6
FCO
FCI
30
29
2B
SCFCO
SCFC I
SCFC2
IUo ll
Ul AI MAl SCAl i All FC2
{AI; A2 18 MA2 34
MA2 SCA l8
71 SCA I8 50
AlB vee
I 2 19 MAl 35 69 SCAI9 51
li' Al MAl SCAI9 Al9
C92 C9l ::!: A4
22
23
MA4
MAS
36
31
MA4 IC17 SCA20
68
67
SCA20
SCA2l
52
54
A20
19
IJilliJT
USED USED AS MAS l !S-5681 SCA2 l A21 t100E AVCet
24 MA6 39 66 SCA22 55
A6 MA6 SCSP SCA22 A22 RSO
AI 2S MA7 40
MA7 SCA2l
65 SCA23 56
A2l U R 44.97K 4 )!(
26 MAS 41
AB ltA8 BERR IC23
36~ t:
. 37c--ii NC 2 MOO 42 105 SCDO 6 13
TP!4
00 MOO SCDO 00 iiR
JBo--1! NC Ol
3
4
MDI 43
MD I SCOI
106 saJI 5
Dl 3
02 M02 44
lll2
lOB SC02 4
iiG 12
5 MOl 46 saJ2 02 41
Ol 109 S<Dl 3
7 MOl SCOJ Ol
M04 47 110 SC04 2
04 M04 saJ4 04
B MOl 4B Ill saJS 68 20
05
~SIJRES
9 IllS SC05 05 HALT

b
MOb 49 112 SC06 67
06
10 M07 so lll6 SC06
Ill saJI 66
06 RESET 2
01 M07 SCD7 07
ll MOB Sl 114 saJB 65
vee DB
32 M09
MOB SC08 06 rnK3
vee 09
53 11 6 saJ9 64 22
0 33 MalO M09 SC09 09 NC! 42 Rl43
vee 010 54 117 S<D!O 6l 510
MaiO saJIO 010
34 MDII 55 liB S<D II 62
CLK ~SCPUCLK
+ f20,+CEl7
0. I I 21
Oil
012
36
37
M012
MO ll
56
57
MOll
MDI2
saJII
5al l2
120
121
saJ I2
S<Dll
61
60
011
012

21
Rl44

p
VSS OIJ MOl3 saJl J Oll 510
38 M014 58 122 SCOl4 59
VSS 014 M014 YAMAHA SUl14 014
0 39 MD IS 60 123 saJIS 58
vss DIS MD IS saJ lS DIS ti:LK2
HITACH I "'z
o-
IIJTOROLA TP23
E305 ~~~~~~i ~g~ ac
"'"' ~~~ ~ai E29B sc
FB3
4- ----~~-<~~--~--------
F244 ~ ..-. @
v:x: ~
~
~ l<l ~ "'
=itt ..-. "'- C21
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Rl29 Rll O
SI.OOA TA @ J OOTSEL AVOOI
100 100
EX68KNMI @ SYSRES
IC20
OOTCLK
18

BB 3!5-SI4b TAB
MIDI IIF@ IN) Gill

@ O.AWIO IIF
IB IC33
74t 157
IP22
FB4
TEST SNlCLK
17
(l
(6
@ SCPUCLK ~~--- n~~~ ~~----~ SCI'eLK AV002
ILRCI: IS
ELRCK
2
3
AI
81
Tl
12
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HITACHI
AP02
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IBCK 5 9 JOK I IC24
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~ ~
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~
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10
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83 EXT OJ<
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SSEL ..14-I 84 T tJT
mUSED
SEL
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NCI4

1'
RIJS
IOK
I I vee , I I. I! 31. 45. 59. B ~ 99. l iS. 127 I vee , 14. IS. 53
I GNJ I
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USED
R2b
16K
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361(
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I
, 1. 11. ta JS. 61
I
AVCCI
C32
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.------- ----,1
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l!lo
I I 0.0 1 CAPACITOR
BYPASS Fa! IC2l24
BYPASS CAPAe!TIJl FOR IC33 vee I vee I I vee,l4 I
CJll
I vee I I I C33 C34 27P I 001 vcc VCC I
Fl65
I
I
1
I
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j_
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I
I
1
I
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I
I
I
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I
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USED
NOT
USED
:: ro.,.
~~ ~~ :
ro.J. :
I I I I Fl69
L - ------- - --1 L- - ------------- J L---------------J L-----------l 6

A B c D E F G H
- 17- - 18-
8-4. Schematic Dlagram-4 [Main C.B- 4/6)

TRCl. 118

18 -
118
1
IC3D
ECAaJS BB
ECABUS
74l5245
ECOIIUS BB
ECI8JS
CAl 2 18 r< IP43 ECAl
10 80
Cl2 3 17 r< IF44 ECA2
CAJ 4
II 81
16 [-< TNS ECAJ IC6
31S-5778
CA4 s 12 82
15 r- IF46 ECA4
CAS
CA6
CA7
6
7
8
AJ
A4
AS
83
84
8S
14.[:
13 r--
12 r
TP47
TP48
IP49
ECAS
ECA6
ECA7
@rm4 C65 :!::
Cll
81

27
CLK TEST!
TESTO
+--o
r---o
TP8J
75 ~14260
IC31
1-701
IC7
TCS742000
16 86 IJTJ AI
CAS 9
A7 87 II r:- IPSO ECA8 USED CA2
CAl
28
29
A2
AJ
OAO
OAI
6
7
OAO
011 DAO 76 o---H- AO I
II:
11:2 -i}-o 77
ECII
ECA2
9
8
10
AI
00
01
13
15
ECOO
ECDI
OAI 17
-n----o ECA3

~
CA4 30 012 7 ll ECD2
ii[
CAS 31
14 012 J--
9 OAJ OA2 18
AI
12
11:3
NC4 ~
78
79 ECA4 6
12
AJ
02
OJ
19 ECD3
CA6 AS 3A3 OAJ 19 ECAS
32 OA4 5 22 ECD4
OIR
CAl JJ
A6 014 ~-
II OAS DA4 22
A3
A4
ECA6 4
14 04
24 ECDS
A7 015 DA5 2J 15 05
G1952 CAB 34 12 016 ECA7 J 26 ECD6
A8 016 AS A6 06
CA9 JS lJ Oil DA6 24 ECA8 2 28 ECD7
2 CliO
19
36 110 017
14 DA8 DA7 25
16
ECA9 40
Al Dl
14 ECD8
IC29 CAll 31 All 018 018 26
11
2 ECDO ECAIO 39
A8 08
16 ECD9
74LS24S A8 DO 19 09
em 38 - 17 ORASO
01
J ECOl ECAII 38
A10 010
18 ECD10
CA9 2 18 r TP~ l m CAll 39 112 ORISO
18 ORIS! OUCAS 28 4 C02 ECAI2 37 20 ECDll
CAIO J
AO 80
17 r TP52 ECA!O CA14 42
All ORIS! IUAS 29
LOS 02
5 ECOJ ECA13 36
All 011
2l ECD12
CAll 4
11 81
16 r- TP~\3 ECAll CAIS 4l
A14 ORAS2 :>lJ---o 106 ORASO 14
LCAS OJ
7 ECD4 ECA14 J5
112 012
25 ECDIJ
CA12
12
s Al 82
15 r- 11'54 ECA12 CA16
115 ORAS3 ~101 OLCAS 1M 13
RAS 04
8 EC05 ECAIS J4
All Oi l
21 ECD14
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A4
83
84 14i--
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45
116
All
lli.CAS
OUCAS
21 OLCAS DOE 27
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05
06
9
10
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ECOl
ECAI6
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32
114
AIS
014
015
29 ECDI5
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12 r-
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8
9
16 86
11 r
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IPS8
ECAIS
ECI16
em
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41
48
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24 DOE
l NOT
USED
~T
l
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USED 08
ll
32
EC08
EC09
ECAI8
ECA I9
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2
9
A7 87
CA21 49
A20
A21
09
010
JJ ECOIO
Al8 lilt'
vee in
I

~--I @ @~:
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~
k
ii' CA22 50 A22 Oil iE
RME ECD12
OIR
CA2l
CA24
51
52
A2J
A24
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VCCI
012
013
36
ll ECDll 12
a: Gill
11 _To ,.
:bcsl, fcm
10.

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l8 EC014
SRI,.;E .Jl---- SRAI1CE VCC2
0 VCCJ
014
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G1953 CR/\1 58 RIJI\ii
DIS HITACHI
CRO 59 Rl)
tWl ~-tWl f~55,fti40
3 IC28 vee ccso 6J
0 1 I 21 G1569
74ACT245 m SlfCCE .J!-- SlfCCE VSS I
- ~0
CCSI 62
CSI VSS2
EXCEO ~82
CAll 2 18 rOIP5'! EeA17 ces2 61
AO 80 ,--< ~ VSSJ
CAIB 17 I-OTP60 EeA18
EXCE l ~-<l8J
J AI Bl R% R97 HITACHI
CA19 4 16 i-C TP6, ECA19 ()QH( 68
A2 82 ~T ~T
OQHO \lEI EXCE2 ~-<ll08
69
~ AJ BJ r-H--oNCI U$!'0 USED \lEO IOCE ~-<li09 G1363 ICB
(~II
78
~ 14 84 ~11:2 Rl60

@ooTQK2
...-+
8
15
A6
85 Ht-or~:J Ollttl
86
SFII BACK
79
71
~II
SF II
BACK
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IIlli
II ECDO
DOTQKI) EX8ACK
L ___.1.. 17 87
II DOTQKO
BRLS
72
7
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BIRL2
B!Rll
EeA2
EeAJ
9
8
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12
IJ
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ECD2
au
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ii'
O!R
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BREQ
EXBREQ
CIIAIT
75
76
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64
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EX8REG
IRED!

BEN -t-- OAO 84


~14260

o---H- AD I
II:
IC32
1-701
EC14
ECA5
ECA6
ECA7
7
6
5
12
A3
14
AS
1/0J
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1105
l/ 06
IS
16
17
ECDJ
ECD4
ECDS
wm BOIR NC2 -i}-o 89 ' 16 (/ 07 18 ECD6
G1980 CBS 84
~
OAI
OA2
17 AI NCJ -n----o 88
EeA8 J
A7 l/08 19 ECD7

~:
vee vee
CIIATIN 67 DAJ
18
19
A2 NC4 ~87 EeA9
ECAIO
25
24
A8
RAI IOKB iiiTii ' AJ 19
5 CNl2810 10 CI VECF 57 5 OA4 22 ECAII 21
4 fillr E\11 A4 AID
,....,_ r ,..... DECON ' OAS 23
AS
ECAI2 23
All
@ STSRES~ RESET OA6
OA7
24
25
A6 EeAIJ
EC114
2
26
Al2
TOSIII BA A7 All
OA8 26 2 EeOO ECI IS I
IC27 DCC G6
18 00
J EeOI
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74LS245 01
I 2 J 4 6 7 8 9 OUCAS 28 EC02
coo 2 18 r< IP67 ECDO OLCAS 29
LOS 02 '
5 ECOJ ,...___R
B?

COl J
AO
AI
80
81
17 r< IP68 ECDI ORASI 14
LCAS
RAS
OJ
04
7 EC04 @ SCE2 CE2 vee
28

C02 4 16__r: TP69 ECD2 1M ll 8 EC05 ffs'.fCEJ8


A2 82 ~ 05 0. I NOT
[~~~
COl 5
A3 Bl
15 r IP70 ECD3 DOE 27
ii' 06
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14
,),. USED
CD4 6
7
14 84 14r IP71 ECD4
r-- - ----- - ---- -------, ::!:~ 102
NOT
07
10
Jl
EC07
@ 27
CDS IJ r IP72 ECDS ECD8
CD6 8
AS 85
12 r IP73 ECD6 I I JuS!'o 06
32 EC09
lftiR ~ il
A6 86 BYPASS CAPACITOR FOR IC26. IC27. IC28. IC29. ICJO 09
Cll7 9
A? 87 11 r- IP74 ECD7 I VCC .20
GIIQ , (O
I
I 010
Jl ECOID IC
I 34 ECOII

k
19 I I Oil
36 ECD12
G3
ii[ 012
I vee vee vee vee vee I J7 ECOI J
VCCI Oil

ro.t, ~C91
~C87 ~CBS ~C89 ~C90
I vee vee I I l8 ECOI4
OIR VCC2 014
Rl2 IOK8 I I J9 EC015
5 CNl2810 VCCJ DIS
+~56'
G1955 5 10 I I
0. I =f Cl41
JOI JOL JD. I JO I
,.....-r< I I
I
I 21
I VSSI

IC26
~ -- - -- - --- -- ------ -- -~
I - ~0 VSS2
VSSJ
74LS245 I BYPASS CAPAC!TOR FOR le6
I 2 j 4 6 VCe l6. 21> 41. 56. 65. 90. 91 Hl TACH!
!19
CD6 2
AO 80 18 r< IP75 I ECD8 I GIIOS. IS. 25 40. 5160. 61> 70. 74. 82. 90. IOU
G1364
CD9 3
AI Bl 17 r- IP76 EC09 I
COlO
' A2 82 16 r- TP77 ECOID I vee
COil
CDI2
COil
5
6
7
8
A3
A4
IS
83
84
85
IS__i:::
14 r
IJ r
TP78
IP79
IPSO
ECDII
ECD12
ECDIJ
ECD14
I
I
I
lc57 l c i06
2 l c to7 lm8
CD" 12 r IPS I I
A6 86 10 I r o ,, r o. l. T O. I
CDIS 9 II [-< TP82 ECDIS I
A7 87
19 ii[
I
I
l 88
IIBUSC!>TROL
I
DIR
L- -- ---------- -------
6
G1954
,_

A B c D E F G H
- 19- -20-
8-5. Schematic Diagram-5 [Main C.B - 5/6]
e48
111 USED vee vee vee
10 vee
svec
IP65 svee
II J.3 R67 f-o J:~ ~ vee 5
RIJ IOK><8
ctll2UIO 10 5 RA6 IOKxB 10
IC35 ~X3 IC9 CN2XB
li 41ttz 1n
f-o~~~
315-5744

fit
lH ~ t>-t- I vee
R69
IOK
01
ISSI84
Rl37
lOOK ~9
111 USED
Jf'IO
r-oJPII.~
q RSO
b RSI
TEST
r-m R74
IOK
2
l
1014
II'
TH
!~lS r-}--o '
JPI2 7 R52 R70 12
R"l cso R68
f--o JPil 8
t+---o I 2 l 4 6 7 8 9 I 2 3 4 6 7 8 9 5 TR
S. IK
IN
47
l H475
f-r lJOK RSJ R71
R72
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6
7
TL
R!Qtl

l
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Sill~
"RES %our CSI
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1_32. 768KHz
r{ W94 II
13
OSCI
OSC2
R73
51
C!f'RORES
NC6
8
9
lFT
Gill
~OP
rl: W9S
X2 01 eRIGO -IJ
~112
H2311 f-()W96 14 200ioN I
Elt26 2 H498
XI D2
SlOES 211' _IJ
ECAIIUS
IB ' IS
REID
04
OS
55
5b
STSRES
nSHRES
@
2TH
2TR ~ E1127~ CN2B
L~oo~
06

(~
17 57 2TL 1Pl4
~ HSHNHI

t2f--~ll
07 _d
vee vee 18 2R1Qtl _IJ II vee
@ECIIIUS ~ 5 RA8 I OKx8 0. 0
IROY
49
Rl\j
INTVliOI
DB
09
58
59
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SSHRES
SSHNHI
2LEfl
Ell29
M
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IPlS
IP36
12
13
1014
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47
EXL Dl
53 SRES I 000 ~ l --'r= TP38
TPl9
14
IS
IH
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16
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45 2TR I
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r
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IP42
18 lF1
I 2 3 4 6 7 B 9 _r-- 19 Gill 2
ECAI
Rl45
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Rll8
IDK j 128
7~~
63

19
R62
Rbl
Pl048
PIOJB
PI02B
44
43
42
41
2TL
2Rlll1T
2LEfT
21014 vee vee ' FB9
H3

EeA2 AI PIOIB 211' TIT HSSl


20 40
EeAl A2 PIOOB RA7 IOKB
21 5 10
Al CN2XA
ECA4
EeAS
22
23
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39 ITH ...-.- I vee
EeA& 24 38 ITR 2 1014
Ab PIOSA l II'
37 Ill
ECDO Pl04A IRIQtT 4 TH
25 080 PIOJA
36
ECOI 26 35 IlF1 I 2 3 4 b 7 8 9 5 IR
EC02 OBI PI02A IIXMI vee 6 TL
27 l4
082 PIOIA
ECOl
EC04
28
29
083 PIODA
33
sv;:c 02
liP
<(_I rEnl7- l2 7
8
RIQtT
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ECDS
EC06
lO
ll
084
085
16
()
l ~2 0 IIXMI
NC7
t---Il
f.-
9
1-530
Gill

EC07 l2
086
087
vee

N~~.
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I
L~t--l
L!_
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?--- 3
~ INTil/013 Gill I
IlL
rEnl9
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HITACHI IR!Qtl ~: Elt20 ~ __c- lP2S
IP26
I vee
SHPC HS IC25
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2
l
1014
II'

@
S-80741AL -A7
IP? 9ee
lr
I

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6
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TP32
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7
8
RIQtl
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Hl41 J} ~ t-'i::;12 .___r- 9 Gill
Hllii0202A

I
PD6 HMJ202A
NCIS
I

TIT
FBIO

lfS5I
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1P24o-
' .----...__!!__ @ VIOEO
18
T BAT
TIT CR20l2
IC22
TDAI38bT vee
4
IISCI: TPIIl 12 24
SYSCLK Y!Dl
DRCK TPIII
I1RClJ( IP112
sex C62 TP4
AYCC2 vee oso TPIIO ws 23 IJ_ I
eSYNC
DATA VSSO
22
CI(Sl2 YREF IC21 .PI6
CI(Sll CEl2 RH CEll RISO OAI645n IJ_390HH
TEST!
21
10. 100 22,o SIQ
Sllll RED 23 Rl6 75 CE24 CN5
TES12 \UI RIN ROUT
vee
VIDA R45 GREEN GIN GOUT
22
Rl7 75
CE25 '
l S. RIQtl
20 lOOK 2 S.lFT
C61 FILleR
BLUE 21
Rl8 75 CE2b I c. srNC
0."' 19 BIN BOOT R
5
CEll VSSA FJLTQ RlO Rl9 75
llo IK 10
SYNC IN CYOUT
20 CE27 6 c
RISI
Aliil2 18 510 -= R40 75
7 B
Yl((O
V{J_ SIO.. AGNJl AQtDl lb CE28 8
10 YOU! 9 y
Y!Dl
R4b IS
R41 75
CE29 10 e
5
C61 AGIIll eOUJ
0. I 17 lOOK vee II CASE.!Ml
AI'PO
lb
VSSO N'PI
IS R42 13
N'P2 16KUIII
18
N'Pl Jf'21 BFOUT FO
Pill LIPS AI'P3
NTSCIPAL
17
Rl42 ITRAP
Rl57 2-2K em
JP20
IK @sc . SCIN
14
10. CN6
RISb NOT USED C41 YREF vee
'iP
rQPC
AYCCl niDUit
RISl
111 VCCI
n1o wn
lJS8)
VCC2
nrxo
@IEEII I REF CElO
6
7
IIRXD
ltSCI(
Rb6 AGIIl2 A!Hl2 100.
4.11: JM)J 8 Gill
srSREs@
Glll2
9 srxo 6
SONY 10 SRID
AGIIll II SSCIC
Alillll 12 Gill
@ nJDI 1/F
118
u
118
SERIAL 1/F

A B c D E F H
21 -22-
8-6. Schematic Diagram-& [Main C.B - 6/6)

@ XIMTA
@ O.AI.IIIOIIf
.!!!.
..!!. Rl48
vee
a.t2
.--
a.t3 LDl~
LBIOIEBI t

1
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2
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All
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I
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EXBGI8
EX8G20
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EXIIGIS ~
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53-
vee
r-
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OOTCI.KI 11:15
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rfr

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6 <DES

@ EXI>lll:llll -----w~~[j

A 8 c 0 E F G H
-23- -24-
8-7. Schematic Dlagram-7 [SH-1 C.B]
RIIO vee
4 1K _A RIDS
TPJ '--' I~
r-----~--------------------------------------------~~~_,--~ r-------------------------------4------~~~~ vee

_i ~ ~
o----,i=1~"' Rl04

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4. 71(
0
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IC102 SDt2 6 02 2.21:
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2
f"N\'1
COAT A
tllATA
CQIIEQ
3
4
5
~-
- l e126
NIT USED
ClllnK

RI06
~ DO
~ Dl
DIS
Dl4
l6
J7
Sllil4
511113
S1Jt6
SDt7
10
II
D6
07 X~~~ ~
XlOl
2tntz
~ ~ ~J
COtiU 6 41K 02
ClltSYt:
O~
DIJ l6 Sllil2 VSS EXTAl 7l
CIJIISOC 7
1-==----t DJ ~55
12 35 ~ '" " 72
GNJ 8
----m SIJt4 1 vee l34nr Sllill SDt9 14 08 IC101 vss lifm etol:!:
liCK 9 e12l
~SlitS ~
011
~ ~~ ~ l ~~41
1
=
GNJ 10
----m DIS
~01 B 010 JJ SlliiO vee >---+.=.------Tisi-1 tll64J7097 lOP
SIJt6 9 D9 l2 Slllt9 _ I SDtiD 16 DIO - 69 lllEOI
DAS II CXX ~ ~ ll S11iB ~~~rT SDtll 17 Oil IJlEQI 68 DACKI
~11 23
CKX 12 08
II'X vee II t: t: J0 fh- 18 012 67 lllEOO
II'X ll
GNJ 14 RI02 12 t: ffiS 29 ~:~ ; ; 14 ~ DIJ ~ ~ DACKO
2
----m-C2F
~A8 26~ L6~4---t--+--::----t-----H----------------,
IOK
C2F
SII'X
15
16
SII'X
SCXX
liAS :!15 Ws
t:
SRD
519
SIJtiS 21
22
Dl4
DIS
!lOCAl
rRifWT t-'6;i;J- -"Atv-+-- -t--Q
SCKX 17
SDAS ~ 10 Al 25 SA8 SAO mij- VSS ~ 62 Rill vee
~ II :~ 01 NI~T USED r,!(
SOAS 18
1-4.-:
1
GNJ 19 A6 24 Sl7 SAl 24 VSS
ACCESS 20 1m- ).#..-4 12 IS 23 SA6 Sl2 25 l2 ~ 160 m T
~~ 3 M 22 SIS Sl3 26 A3 R!j 59 RD
+-----1f+-~204Lv-ec_ _ _v_ss_.~ SA4 27 "" i.iiH 58 lo1lH
T Cl20 I '" SIS 28 AS I~ IoRI. 57 J. WRl Rll2
rJr 0. 01 -o,....~a:~o-~~~~~~~~~tl~e:~N u ~~~~~~:::l~o T~6 tKJT-
~~~-~-~ USED

Nl~~~r ()
vee 3
~~----------------------------------~~---------+-~-------------------------------,

Allllll

Ul.
4
AFel
AIRQ

112
1M
AA12
1114 e121 CIIS
l l l
Cll4 CIIS
l
Cll2
111 USED
47/6. J 0. 01 NIT USED NIT USED 5
ltYR2 ltYR7
IIYR4 ltYR5
ltYR2 ltYR3
IIYRI ltYRI
triG6 IIYG7

9
-
ltYG4 IIYG5
IIWG2 II'IG.l

l l l
IIGO triG I
IMI7
::!: ellt
IMI4
rnn12
IMI'.i
IMI
IMII
Cll9 CI08 CI09 etJO
l l '- 01
IIYBO 0. 01 I<T USED 0. 0 I NIT USED CliO
1111'111 GNJ I<T USED
DTW II'
YSYI: HSYI:

9
vee "J;
Cl29
NIT USED
/""\
YcC

A 8 c 0 E F G H

25- -26-
9. CIRCUIT BOARD DIAGRAMS
9-1. Main Circuit Board

~=--
~""-
.. __
. ...
~
-
j-......--

4 ,_
64.
D
Ct39

837-11493 IC BO SATURN MAIN VAO PAL


171-69638 PC BO SATURN MAIN VAO PAL
~~(M\ 26
27
@SEGA 1995
MADE IN JAPAN

5
CE46. CE45

43
.. IC32

44"
.DIRECTiON

.-'
FUSE

0
RA2

o~ -~-----eillj

D
6

A B c 0 E F G H

- 27~ 28
! TI'
TI'N TPte

Tl'a7

TPH
C70
D
Cl36
CJ ,0 2
0 OD
~~~
Ill"'

A B c D E F G H

29- -30-
11. PARTS SPECIFICATICIt.JS
9-2. SH-1 Circuit Board
IC1/2
IC H06417095F28 QFP HITACHI IG H06417095SF28 QFR HITACHt
Parts No.: 315-0922A Parts No. : 315-0998
1
Top View
108 73

109 72
i i
i i
! i
HD6417095 i
I
i i
i i
2 114 i i
37

38

Description
No. 1/0 Pin Name Function
1 Dll
2 1/0 012 Data bus
3 013 -
4 VCCl Power supply (SV)
3
5 1/0 014 Data bus
6 VSSI Power supply (OV)
7 015
8 016
---
9 l/0 017 Data bus
10 018
-
11 019
--
12 VCC2 Power supply (SV)
13 1/0 D20 Data bus
14 - VSS2 Power supply (OV)
15 D21
4
16 1/0 D22 Data bus
--
17 D23
18 VCC3 Power supply (SV)
19 1/0 D24 Data bus
20 - VSS3
- Power supply (OV)
21 D25
D26
-- Data bus
22 1/0 --
23 D27
-
24 - VCC4 Power supply (SV)
-
25 l/0 D28 Data bus
5 26 - VSS4 Power supply (OV)
27 D29
--
28 I!O D30 Data bus
29 031
30 AO
AI
--- Address bus
31 1/0
32 A2
33 - vsss Power supply (OV)
34 A3
A4
---
35
AS
--
36
1/0 A6
-- Address bus
6 37
A7
---
38
39 A8
- vccs - Power supply (SV)
40 .
A B c 0

- 31- -32-
No. 1/0 Pin Name Function
41 1/0 A9 Address bus
42 - YSS6 Power supply (OV)
43 A10
44 All
45 I/0 A12 Address bus
46 A13
47 Al4
48 - YCC6 Power supply (5Y)
49 1/0 A15 Address bus
50 - YSS7 Power supply (OY)
51 Al6
52 I/0 Al7 Address bus
53 A18
54 - VCC7 Power supply (5Y)
55 1/0 Al9 Address bus
56 - YSS8 Power supply(OY)
57 A20
58 1/0 A21 Address bus
59 A22
60 - VCC8 Power supply (5Y)
61 1!0 A23 Address bus
62 - VSS9 Power supply (OY)
63 A24
64 1/0 A25 Address bus
65 A26
66 0 DACKO DMACO acknowledge
67 - YCC9 Power supply (5Y)
68 0 DACK1 DMACl acknowledge
69 - VSSIO Power supply (OY)
70 I DREQO DMACO request
71 I DREQ1 DMAClrequest
72 0 cso I Chip select 0
73 0 CS1 Chip select I
74 0 CS2 Chip select 2
75 0 CS3 Chip select 3
76 I/0 BS Bus cycle start
77 1/0 RD/WR Read/write
78 - YSSll Power supply (OY)
79 0 RAS, CE RAS for DRAM/SDRAM, CE for PSRAM
80 0 CAS,OE CAS for SDRAM/OE for PSRAM
81 0 CASHH, DQMUU, WE3 Each memory most significant byte select signal
82 0 CASHL, DQMUL, WE2 Each memory 2nd significant byte select signal
83 0 CASLH, DWMLU, WEI Each memory 3rd significant byte select signal
84 - YCClO- Power supply (5Y)
85 0 CASLL, DQMLL, WEO Each memory least significant byte select signal
86 - YSS12 Power supply (OY)
87 0 RD Read pulse
88 0 CKE SDRAM clock enable control
89 I WAIT Hardware wait request
90 0 BEN Reserve
91 - YSS13 Power supply (OY)
92 I BACK, BRLS Bus right permission in slave mode/Bus right acknowledge in master mode.
93 0 BREQ,BGR Bus right request in slave mode/Bus right acknowledge in master mode
94 0 WDTOYF Watch dog timer output
95 0 FTOB Free-running timer output B
96 - VCC11 Power supply (SY)
97 0 FTOA Free-running timer output A
98 - VSS14 Power supply (OY)
99 I FTI Free-running timer input
100 I FTC! Free-running timer clock input
101 I RXD Serial data input
102 0 TXD Serial data output
103 1!0 SCK Serial clock input/output

-33-
No. 1/0 Pin Name Function
104 - VCC(PLL)I2 Power supply (5V) of built-in PLL
105 I MDO Operation mode pin
106 - VSS(PLL)I5 Power supply (OV) of built-in PLL
107 I MDI Operation mode pin
108 CAP!
0 External capacitor connection pin for PLL
109 CAP2
110 I MD2 Operation mode pin
Ill 0 CKPACKN Clock pause acknowledge output
112 I CKPREQN Clock pause request input
113 - VCC13 Power supply (5V)
114 - N.C Not connected.
115 - VSS16 Power supply (OV)
116 - N.C Not connected.
117 I MD3 Operation mode pin
118 I/0 CKIO System clock input/output
119 MD4
I Operation mode pin
120 MD5
121 - VSSI7 Power supply (OV)
122 I RES Reset
123 - VCC14 Power supply (5V)
124 0 IVECF Interrupt vector fetch cycle
125 I NMI Non-maskable interrupt request
126 IRL3
127 IRL2
I External interruput factor input
128 IRLI
129 IRLO
130 DO
I/0 Data bus
131 Dl
132 - VCC15 Power supply (5V)
133 I/0 D2 Data bus
134 - VSS18 Power supply (OV)
135 D3
136 D4
1/0 Data bus
137 D5
138 D6
139 - VCCI6 Power supply (5V)
140 1!0 D7 Data bus
141 - VSSI9 Power supply (OV)
142 D8
143 1!0 D9 Data bus
144 DIO

-34-
Block Diagram

~
MULT
(/)
::l
co
(/)
(/)
LU CPU
v-- a: (/)

CACHE TAG 1:==1 _~ ::l


co
<(
-~
LU-_/
::r:
C)
<(
C)
1-
<(
0
LU
::r:
i
EXCEPTION
A

C)
<( PROCESS
~ C)
-
~(I
INTERRUPT ..J
CACHE CONTROLLER - <(
z
CONTROLLER
"
u;
1-
16-bit
l=REE-RUNNING
0...
::l
a: I K=1 TIMER
ffi
h ~ k
1-
;;
..J
<(
(/)
::l
co
CACHE v BREAK
CONTROLLER
z
a:
LU
1-
(/)
(/)
LU
a:
SERIAL
COMMUNI-

()=~
DATA ;; 0 ~
0 1'-' CATIONS
<(
INTERFACE
(/)
co ..J ::l
~
<(
a: co

~i
<( <(
LU
0 ::r: 1-
<(
..J 0... 0
<(
z
VECTOR ADDRESS a:
LU
DIVU 1-~ a: 0... ..J WATCH DOG
~-y z1-
LU <(
a: TIMER
..J
<(
::r:
0...
z
a: a:
LU
LU I I 0...
~ 1- BUS STATE
_____/ ;;
DIRECT
MEMORY
- CONTROLLER

ACCESS
OpERATION
CONTROLLER
(X2 CHANNELS) r--; MODE
CONTROLLER
OSCILLATOR

""'/
EXTERNAL BUS
""'-/
INTERFACE

00

-35-
IC3/4/11 4-Mbit SDRAM
IC HM5241605TT-17 TSOP IC UPD4504161 GS-A12 TSOP IC HM5241605TT-15 TSOP
Parts No.: 315-0928-17 Parts No.: 315-1022-12 Parts No. : 315-0928-15

Top View & Pin Layout Pin Name


Vss Pin Name Function
1/015
1/014
Address inputs
Row addresses AO-A8
VssO A0-A9
Column addresses AO-A 7
1/013
Bank select address A9
1/012
I/00-I/015 Data inputs/outputs
VeeO
1/011 cs Chip select
1/05 1/010 RAS Row address strobe command
VssO 1Vssa CAS Column address strobe command
1/06 1/09
1/07 1/08
WE Write enable
VeeO DQMU High-order byte input/output mask
NC DQML Low-order byte input/output mask
DQMU
CLK Clock input
CAS 1 CLK
CKE CKE Clock enable
NC Ycc Power supply
GND Yss Ground
AS
YccO Power supply of l/0 pins
A7
A6 YssO Ground of I/0 pins
A5 NC Not connected
A4
Vee Vss

Block Diagram

AO -A7 AO -A9

0::: 0:::
w w
0 0
0 o8
MEMORY ARRAY 0 MEMORY ARRAY
(.) a:: (.)
w UJ BANKO w BANK1
0 il: 0
z ::; z
g_
::!!: :IE 512 X 256 X HI bit ::!!: 512 X 256 X 16 bit
::> < ::>
-' UJ -'
0 If) 0
(.) zUJ (.)
If)

CONTROL LOGIC &


TIMTING GENERATOR

-36-
ICS SCU {Custom Gate Array)
IC CUSTOM CHIP SCU QFP
Pans No.: 315-5688

Top View Block Diagram


157

156 INT
I f--

'---z:-----1~
I
A-Bus

52 105
CPU <nln. p-> 1/F

1/F DMA

53 104

TIMER
- .__ :: -

1-_:-+---ilB
B-Bus

1/F

DSP

Description
No. 1/0 Name Function
I - VSS GND
2 1!0 AD4 A-bus data bit 4
3 1/0 ADS A-bus data bit 5
4 1/0 AD6 A-bus data bit 6
5 1/0 AD7 A-bus data bit 7
6 I/0 AD8 A-bus data bit 8
7 I/0 AD9 A-bus data bit 9
8 1!0 ADIO A-bus data bit 10
9 - VDD Power supply +5V
10 I/0 ADII A-bus data bitll
11 - vss GND
12 I/0 AD12 A-bus data bit 12
13 I/0 AD13 A-bus data bit 13
14 1!0 AD14 A-bus data bit 14
15 1/0 ADIS A-bus data bit 15
16 0 AAO A-bus address bit 0
17 0 AAl A-bus address bit 1
18 0 AA2 A-bus address bit 2
19 - vss GND
20 0 AA3 A-bus address bit 3
21 - VDD Power supply +5V
22 0 AA4 A-bus address bit 4

-37-
No. 1/0 Pin Name Function
23 0 AA5 A-bus address bit 5
24 0 AA6 A-bus address bit 6
25 0 AA7 A-bus address bit 7
26 0 AA8 A-bus address bit 8
27 - VSS GND
28 0 AA9 A-bus address bit 9
29 0 AAIO A-bus address bit 10
30 0 AAll A-bus address bit 11
31 - VDD Power supply +5V
32 0 AA12 A-bus address bit 12
33 0 AA13 A-bus address bit 13
34 0 AA14 A-bus address bit 14
35 - vss GND
36 0 AA15 A-bus address bit 15
37 0 AA16 A-bus address bit 16
38 0 AA17 A-bus address bit 17
39 0 AA18 A-bus address bit 18
40 0 AA19 A-bus address bit 19
41 - VDD Power supply +5V
42 0 AA20 A-bus address bit 20
43 - vss GND
44 0 AA21 A-bus address bit 21
45 0 AA22 A-bus address bit 22
46 0 AA23 A-bus address bit 23
47 0 AA24 A-bus address bit 24
48 0 AFCO A-bus function code bit 0
49 0 AFCI A-bus function code bit 1
so 0 AAS A-bus address strobe
51 0 ACSO A-bus chip select 0
52 ' - VSS GND
53 0 ACSI A-bus chip select 1
54 0 ACS2 A-bus chip select 2
55 - VDD Power supply +5V
56 I AWAIT A-bus external wait
57 I All:) A-bus external interrupt factor
58 I TEST Test mode selection (normally, input "H")
59 0 ARD A-bus read pulse
60 0 AWRU A-bus byte 0 (AD15-8) write pulse
61 0 AWRL A-bus byte 1 (AD7-0) write pulse
62 - VSS GND
63 0 ATIMO A-bus external access timing 0
64 0 ATIM I A-bus external access timing 1
65 0 ATIM2 A-bus external access timing 2
66 1/0 BDO B-bus address/data bit 0
67 1/0 BDl B-bus address/data bit 1
68 1/0 BD2 B-bus address/data bit 2
69 - VDD Power supply +5V
70 1/0 BD3 B-bus address/data bit 3
71 - VSS GND
72 1/0 BD4 B-bus address/data bit 4
73 1/0 BD5 B-bus address/data bit 5
74 1/0 BD6 B-bus address/data bit 6
75 1/0 BD7 B-bus address/data bit 7
76 1/0 BD8 B-bus address/data bit 8
77 I/0 BD9 B-bus address/data bit 9
78 1/0 BDlO B-bus address/data bit 10
79 - VDD Power supply +5V
80 1/0 BOll B-bus address/data bit 11
81 - vss GND
82 I/0 BD12 B-bus address/data bit 12
83 1/0 BD13 B-bus address/data bit 13
84 I/0 BD14 B-bus address/data bit 14

-38-
No.
I 1/0 Pin Name
B-bus address/data bit 15
Functior:.
85 I I/0 BOIS
86 I IROL Light pen interrupt
87 I IRQV VDP2V blank interrupt
88 ' I IRQH VDP2H blank interrupt
89 I BRDY2 VDP2 data ready
90 0 BCS2 VDP2 chip select
91 0 BADDT B-bus address/data switching signal
92 - VSS GND
93 0 BDTEN B-bus data enable
94 - VDD +SV Power supply
95 0 BCSS SCSP chip select
96 I BRDYS SCSP data ready
97 I IRQS SCSP interrupt
98 0 BCSI VDPI chip select
99 I BRDY1 VDPI data ready
100 I IR1)1 VDPI interrupt
101 1/0 CAD C-bus address bit 0
102 1/0 CAl C-bus address bit 1
103 1/0 CA2 C-bus address bit 2
104 - vss GND
105 - VDD +SV Power supply
106 I/0 CA3 C-bus address bit 3
107 1/0 CA4 C-bus address bit 4
108 1/0 CAS C-bus address bit 5
109 1/0 CA6 C-bus address bit 6
110 - VSS GND
Ill 1/0 CA7 C-bus address bit 7
112 1/0 CAS C-bus address bit 8
113 1/0 CA9 C-bus address bit 9
114 1/0 CAlO C-bus address bit 10
115 - VSS GND
116 1/0 CAll C-bus address bit 11
117 - VDD +SV Power supply
118 1/0 CA12 C-bus address bit 12
119 1/0 CA13 C-bus address bit 13
120 1/0 CA14 C-bus address bit 14
121 - vss GND
122 I/0 CA15 C-bus address bit 15
123 I/0 CA16 C-bus address bit 16
124 I/0 CA17 C-bus address bit 17
125 I/0 CA18 C-bus address bit 18
126 I/0 CA19 C-bus address bit 19
127 - VDD +SV Power supply
128 l/0 CA20 C-bus address bit 20
129 - vss GND
130 1/0 CA21 C-bus address bit 21
131 1/0 CA22 C-bus address bit 22
132 l/0 CA23 C-bus address bit 23
133 1/0 CA24 C-bus address bit 24
134 1!0 coo C-bus data bit 0
135 l/0 CDl C-bus data bit 1
136 1/0 CD2 C-bus data bit 2
137 - VSS GND
138 1/0 CD3 C-bus data bit 3
139 - VDD +SV Power supply
140 1/0 CD4 C-bus data bit 4
141 1/0 CDS C-bus data bit 5
142 I/0 CD6 C-bus data bit 6
143 1/0 CD7 C-bus data bit 7
144 - vss GND
145 1/0 CDS C-bus data bit 8
146 1/0 CD9 C-bus data bit 9

-39-
No. 1/0 P.in"Name Function
147 1/0 COlO C-bus data bit I 0
148 1/0 COil C-bus data bit 11
149 - VOO +5V Power supply
ISO 1/0 CDI2 C-bus data bit 12
151 - VSS GNO
152 1/0 CDI3 C-bus data bit 13
153 1!0 CDI4 C-bus data bit 14
154 1/0 CDIS C-bus data bit 15
155 1/0 C016 C-bus data bit 16
!56 1/0 CDI7 C-bus data bit 17
157 - vss GND
!58 1/0 CDI8 C-bus data bit 18
!59 1!0 CDI9 C-bus data bit 19
160 - VOO +5V Power supply
161 1/0 C020 C-bus data bit 20
162 1/0 C02! C-bus data bit 21
163 1/0 C022 C-bus data bit 22
164 - VSS GND
165 1!0 CD23 C-bus data bit 23
166 1!0 C024 C-bus data bit 24
167 1/0 CD25 C-bus data bit 25
168 1/0 CD26 C-bus data bit 26
169 1!0 CD27 C-bus data bit 27
170 - VOO +5V Power supply
171 1/0 CD28 C-bus data bit 28
172 - VSS GNO
173 1!0 CD29 C-bus data bit 29
174 I/0 CD30 C-bus data bit 30
175 1/0 CD31 C-bus data bit 31
176 I CCSI C-bus chip select 1
177 I CCS2 C-bus chip select 2
178 0 CCS3 C-bus chip select 3
179 - VSS GND
180 I RESET Initial reset
181 I CLK28 System clock
182 1/0 CRDWR C-bus read/write
183 I CRO C-bus read pulse
184 - VDO +5V Power supply
185 1!0 CDQMUU SDRAM byte 0 (CD31-24) write pulse
186 IJO CDQMUL SDRAM byte I (C023-I6) write pulse
187 I/0 CDQMLU SDRAM byte 2 (CD! 5-8) write pulse
188 I/0 C:DQMLL SDRAM byte 3 (C07-0) write pulse
189 - VSS GND
190 0 RAS - SDRAMRAS
191 0 CAS SDRAMCAS
192 0 CWAIT C-bus external wait
193 - VDO +5V Power supply
194 I CIVECF C-bus interrupt vector fetch sycle
195 0 CIRLO C-bus external interrupt factor 0
196 0 CIRLI C-bus external interrupt factor 1
197 0 CIRL2 C-bus external interrupt factor 2
198 0 CIRL3 C-bus external interrupt factor 3
199 - VSS GND
200 0 CBREO C-bus right request
201 I CBACK C-bus right acknowiedge
202 I MIREQ System manager interrupt
203 0 AA25 A-bus address bit 25
204 I/0 ADO A-bus data bit 0
205 l/0 AD! A-bus data bit I
206 I/0 AD2 A-bus data bit 2
207 1!0 AD3 A-bus data bit 3
208 - VDO +5V Power supply

-40-
IC6 DCC
IC CUSTOM CHIP DCC QFP
Parts No. : 315-5778

Top View
80 51

81 50
I
I
!
I

100 31

30

Pin Name

No. 1/0 Name No. 1/0 Name No. 1/0 Name


I I
I I TESTl 35 I A9 69 I WEO
2 0 TESTO 36 I AlO 70 - vss
3 0 BEN 37 I All 71 0 BACK
4 0 BDIR 38 I Al2 72 0 EXBACK
5 - VSS 39 I A13 73 0 BRLS
6 0 DAO 40 - VSS 74 - VSS
7 0 DAI 41 - VDD 75 I BGR
8 I 0 DA2 42 I A14 76 I I BREQ
9 0 DA3 43 I Al5 77 I I EXBREQ
10 0 DA4 44 I Al6 78 0 MFT1
II 0 DAS 45 I A17 79 0 SFTl
12 0 DA6 46 I Al8 80 - VDD
13 0 DA7 47 I A19 81 I I CK
14 0 DA8 48 I A20 82 - VSS
15 - vss 49 I A2l 83 I RESET
16 - VDD 50 I A22 84 I BS
17 0 DRASO 51 I A23 85 I EWT
18 0 DRASl 52 I A24 86 0 IOCE
19 0 DRAS2 53 - vss 87 0 EXTCEO
20 0 DRAS3 54 0 IREQl 88 0 EXTCEI
21 0 DUCAS 55 0 IREQ2 89 0 EXTCE2
22 0 DLCAS 56 - VDD 90 - vss
23 0 DWE 57 I IVECF 91 - VDD
24 0 DOE 58 I RD/WR 92 I HINT
25 - vss 59 I RD 93 I VINT
26 - VDD 60 - vss 94 I DECON
27 I Al 61 I CS2 95 0 ROMCE
28 I A2 62 I CSl 96 0 SMPCCE
29 I A3 63 I cso 97 0 SRAMCE
30 I A4 64 0 WAIT 98 0 MOE
31 I A5 65 - VDD 99 0 MWR
32 I A6 66 - vss 100 - vss
33 I A7 67 I WTIN
34 I AS 68 I WEI

-41-
IC7 IPL ROM
OS SATURN IPL-ROM PAL DIP
Parts No.: EPR-17933
Parts No.: MPR-17933

Top View & Pin Layout Pin Name


AS A0-Al7 Address inputs
AS
CE Chip enable
A10
A11 OE Output enable
A12
GND Ground
A13
A14 BYTE
A15
DO-DIS Data inputs/outputs
A16
1 BY'i'E Vee +SV power supply
GND
D151A-1
07
014
06
013
05
010 012
03 D4
011

ICS BACKUP RAM


IC CXK58267 AM-1 OL SOP IC UPD43257B-1 OLL SOP IC M5M5255BFP-12LL SOP
Parts No. : 315-0948-10 Parts No. : 315-0930-10 Parts No.: 315-0964-10

IC SRM20257LLM1 0 SOP IC UM62257M-70LL SOP


Parts No. : 315-0965-10 Parts No.: 315-1002-70

II Block Diagram II Top View & Pin Layout


A14 vee
A14
WE
A13
A13
A12 Vee AS
A11 AS
MEMORY
AS MATRIX A11
AS 512 X 512
CE2
A7 GND
AS CE1
AS 1 IIOS
1101 1/07
1102 1106
1/03 1105
A 10 o+++.f':5l5:t==f GND
A4
A3 I!OGATE
COLUMN
A2 DECODER Description
A1
Name Function
AO
AO-Al4 Address inputs
1!01-I/08 Data inputs/outputs
CEl, CE2 Chip enable inputs
WE Write enable input

Vee +5V power supply


CE1 o----or-....,
CE20---t 1101 1108 GND Ground

-42-
IC9 SMPC
IC CUSTOM CHIP SMPC QFP
Parts No.: 315-5744

Top View
64 52

I 51
I

19 33

20 32

Description
No. 1/0 Name Function No. 1/0 Name Function
1 R70 33 PIOOA
- Not connected.
2 R71 34 Pl01A
3 R72 35 PI02A
1!0 Reset control
4 R73 36 I/0 PI03A Control pad
5 R50 37 PI04A
6 R51 38 PI OSA
I Jumper configuration input
7 R52 39 PI06A
8 R53 40 PIOOB
9 - TEST Not connected ~GND 41 PIOlB
10 OSCl 42 PI02B
I!O Clock 3
11 OSC2 43 I/0 PI03B Control pad
12 - GND Ground 44 PI04B
13 X2 45 PIOSB
1!0 Clock 4
14 XI 46 PI06B
15 RESET Master reset input 47 I EXL Input
16 - vee Power 48 I INTO/D13 Input
17 I cs Chip select input 49 INT2!R01 Backup RAM reset control
18 I R/W Read/write input 50 DO
l/0 Reset control
19 AI 51 Dl
20 A2 52 - D2 Not connected.
21 A3 53 D3
I/0 Address bus
22 A4 54 D4
23 AS 55 DS
24 A6 56 D6
1/0 Reset control
25 DBO 57 D7
26 DBI 58 D8
27 DB2 59 D9
28 DB3 60 DlO
l!O Data bus
29 DB4 61 R60
1/0 Reset control
30 DBS 62 R61
31 DB6 63 R62
- Not connected.
32 DB7 64 R63

-43-
IC10 VDP1
IC CUSTOM CHIP VDP1 QFP IC CUSTOM CHIP VDP1 S QFP
Parts No. : 315-5689 Parts No. : 315-5883

Top View
126 85

127 84
I
I
I
I

43

42

Description
No. 1/0 Name Function
I - Ne Not connected.
2 VRAMA7
3 0 VRAMA8 Address bus (VRAM)
4 VRAMA9
5 - VSS Ground for 1/0 pin
6 0 veLK Clock (VRAM)
7 0 VUDQM Upper byte input/output mask(VRAM)
8 0 VLDQM Lowerbyte input/output mask(VRAM)
9 - VSS Ground for internal circuit
10 0 veASN Column address asserted (VRAM)
11 0 VRASN Row address asserted (VRAM)
12 - vee Power supply
13 0 VWEN Write enable (VRAM)
14 0 veSN Chip select (VRAM)
15 I MeLK Master clock
16 RESETN Reset
17 - vss Ground for 1/0 pin
18 - esN Chip select
19 - ADN Address/data select
20 - DTEN Data enable
21 0 IRON Interrupt request
22 0 READYN Ready
23 VBUSO
24 0 VBUSl Address/data bus (Syscon)
25 VBUS2
26 - vss Ground for 1!0 pin
27 VBUS3
28 VBUS4
29 0 VBUS5 Address/data bus (Syscon)
30 VBUS6
31 VRUS7
'
32 - vee Power supply
33 VBUS8
34 VBUS9
0 Address/data bus (Syscon)
35 VBUSlO
36 VBUSll
37 - vss Ground for internal circuit
38 VBUS12
39 0 VBUS13 Address/data bus (Syscon)
40 VBUS14

-44-
No. I 110 Name Function
4! ! 0 VBUS15 Address/data bus (Syscon)
42 NC
- Not connected.
43 NC
44 FOAO
45 0 FOAl Address bus (FBO)
46 FOA2
47 I - VSS Ground for 1/0 pin
48 0 FOA3 Address bus (FBO)
49 I 0 FOA4 Address bus
50 0 FOAS Frame buffer (FBO)
51 0 FOA6 Address bus (FBO)
52 - vee Power supply
53 FOA7
54 0 FOA8 Address bus (FBO)
55 FOA9
56 0 FOCSN Chip select (FBO)
57 - vss Ground for internal circuit
58 0 FOWEN Write enable (FBO)
59 0 FOCLK Clock (FBO)
60 0 FRRASN Row address asserted (FBO)
6! 0 FOCASN Column address asserted (FBO)
62 0 FOLDQM Lower byte input/output mask (FBO)
63 0 FOUDQM Upper byte input? output mask (FBO)
64 - vss Groun for 1/0 pin
65 FODO
66 FODl
67 0 FOD2 Data bus (FBO)
68 FOD3
69 FOD4
70 - vss Ground for internal circuit
71 FODS
72 FOD6
0 Data bus (FBO)
73 FOD7
74 FOD8
75 - vee Power supply
76 FOD9
77 FODIO
0 Data bus (FBO)
78 FODll
79 FODI2
80 - vss Ground for I/0 pin
81 FOD13
82 0 FOD14 Data bus (FBO)
83 FOOlS
84 NC
- Not connected.
85 NC
86 FIDO
87 0 FlDl Data bus (FBI)
88 F1D2
89 - vss Ground for I/0 pin
90 FlD3
91 FID4
0 Data bus (FBI)
92 FIDS
93 FID6
94 - vee Power supply
95 FID7
96 FID8
0 Data bus (FBI)
97 FlD9
98 FIDlO
99 - vss Ground for internal circuit
100 FIDll
101 FID12
102 0 FID13 Data bus (FB 1)
103 FlD14
104 FID15

-45-
No. 1/0 N~me Function
105 - VSS Ground for 1/0 pin
106 0 FICLK Clock (FBI)
107 0 FICSN Chip select (FBI)
108 0 FIWEN Write enable (FBI)
109 0 FIRASN Row address asserted (FBI)
110 0 FICASN Column address asserted (FBI)
Ill 0 FlLDQM Lower byte input/output mask (FB 1)
112 - vss Data bus (FB l)
113 0 FIUDQM Lower byte input/output mask (FB 1)
114 FIAO
115 0 FlAl Address bus (FBI)
116 FIA2
117 - vee Power supply
118 FIA3
119 0 FIA4 Address bus (FBI)
120 FlA5
121 0 FIA6 Address bus (FB 1)
122 - VSS Ground for I/0 pin
123 0 FIA7
124 0 F1A8 Address bus (BF1)
125 0 FIA9
126
127
- NC Not connected.
128 - HTIMN Horizontal sync timing
129 - VTIMN Vertical sync timing
130 0 V2CLK Video clock (1!2 MCLK)
131 - vss Ground for 1/0 pin
132 0 VOUTO
133 0 VOUTI
Display start address/video data
134 0 VOUT2
135 0 VOUT3
136 - vee Power supply
137 0 VOUT4 Display start address/video output data
138 0 VOUT5
139 0 VOUT6 Video output data
140 0 VOUT7
141 - vss Ground for internal circuit
142 0 VRAMDO
143 0 VRAMDI
144 0 VRAMD2 VRAM data bus
145 0 VRAMD3
146 0 VRAMD4
147 - VSS Ground for 1!0 pin
148 0 VRAMD5
149 0 VRAMD6
150 0 VRAMD7
VRAM data bus
151 0 VRAMD8
152 0 VRAMD9
153 0 VRAMDlO
154 - VSS Ground for internal circuit
155 0 VRAMD11
156 0 VRAMD12
VRAM data bus
157 0 VRAMD13
158 0 VRAMD14
159 - vee Power suppiy
160 0 VRAMDI5 VRAM data bus
161 0 VRAMAO
162 0 VRAMAI
163 0 VRAMA2
164 0 VRAMA3 VRAM address bus
165 0 VRAMA4
166 0 VRAMA5
167 0 VRAMA6
168 - NC Not connected.

-46-
IC12/13/15/16
IC UPD4502161G5-A12 TSOP NEC IC HM5221605TT-17 TSOP HITACHI IC LC382161T-17 TSOP SANYO
Parts No.: 315-0910-12 Parts No.: 315-1017-17 Parts No. :315-1012-17

Top View & Pin Layout Pin Name


Vss A0-A9 Address inputs
0015
DQO-DQ5 Data inputs/outputs
0014
Vss CLK System clock input
0013
CKE Clock enable
0012
Vee 7 Vee cs Chip select
004 0011
RAS Row address strobe command
005 0010
1Vss CAS Col/ address strobe command
009 WE W ritre enable
008
Vee DQML,DQMU DQ mask enable
NC
Vee Supply voltage
OOMU
CAS 1 CLK Vss.GND Ground
CKE
NC No connection
NC
GNO
AS 1 GNO
A7
A6
AS
A3 A4
Vee Vss

Description
No. 1/0 Pin Name Function
l' 7, 13, 25, 38, 44,
50
- vee Power supply of internal circuits.

4, 10,26,41,47,50 - vss Ground pins.

2, 3, 5, 6, 8, 9, 11'
12, 39, 40, 42, 43, l/0 DQ1-DQ16 l/0 pins are the same as conventional DRAM.
45,46,48,49

DQMU controls upper byte and DQML controls lower byte input/output
buffers. In read mode, DQMU, DQML control output buffer impedance like
conventional OE. If DQMU, DQML is high, output buffers become high
impedance. If DQMU, DQML is low, output buffers become low imedance.
14,36 I DQML,DQMU
If DQMU, DQML is low, output buffers become low impedance.
And when device in write mode, DQMU, DQML control word mask. If
DQMU, DQML is high input data is not written to memory cell. If DQMU,
DQML is low input data is written to memory cell.

WE CAS RAS have the same names with conventional DRAM. But these pins
15, 16, 17 I WECASRAS have different definitions with conventional ones. All of these pins only define
command cycle definition. For detail information see command table.

CS low start the command input cycle. When CS is high, all input are not
18 I cs referenced. But even if CS is high, internal operations i.e. bank active or burst
are not changed.
A9 is bank select signal (BS). In command cycle, A9=low select bank A and
19 I A9
A9=high select bank B.

-47-
No. 1/0 Pin Name Function
Row address (AX0-AX6, AX8) is detennined by A0-A8 level at the bank
active command cycle CLK rising edge. (AX7 is don't care.)
Column address (A YO-A Y7) is detennined by AO-A 7 level at read or write
command cycle CLK rising edge. And this column address become bun;t
20,21-24,27-30 I AO-A8 access start address. A8 define precharge mode command cycle, both banks are
prechareged. But A8=low in when A8=high in precharge command cycle, only
one bank that is selected A9 (BS) is precharged. And when A8=high in read or
write command cycle, the precharge cycle start automatically after the last data
in bun;t accessing.
31,32 - GND Ground
33,37 - NC Not connected.
CKE detennine next CLK is valid or not. If CKE is high next CLK rising edge
is valid. But if CKE is low, next CLK is invalid. If CLK rising edge is invalid,
internal clock is not asserted and J.l PD4504161 becomes halt operation.
34 I CKE
And when J.l PD4502161 does not in bun;t mode and CKE is negated,
J.l PD4502161 enter power down mode. During power down mode CKE must
keep low level.
CLK is the master clock input pin. The other inputs signals are referenced at
35 I CLK
CLK rising edge.

IC14 VDP2
IC CUSTOM CHIP VDP2 QFP YAMAHA IC CUSTOM CHIP VDP2 QFP HH IC CUSTOM CP VDP2 S QFP YAMAHA
Parts No. : 315-5690 Parts No. : 315-5690-02 Parts No. : 315-5890

Top View Block Diagram


120 81 scu
121 80
I
I VDP2

I Bus control
~ " HN counter & timing generator r r--

160 Scroll picture block Video process


41
Normal Rotation
picture
t--<r- picture ;1- -A Color offset r---- Output data 1-- f-
40 coordinate coordinate '-.r-11 & shadow control
calculation calculation

i
Pattern Window Color
name fo-< f.- control computing 1-- Color RAM
control control

Character I-< f.- Line picture - Priority f---.- Color RAM


control control control control

VRAM
control r-1
Dot data
control
Sprite
control
I
VRAM Expanded VDP1
picture circuit

-48-
No. 1/0 "Pin Name Function
1 I 0 RBCS VRAM-B chip select
2 0 RBRAS VRAM-B row address strobe
3 0 RBCAS VRAM-B column address strobe r

4 0 RBWE VRAM-B write enable


5 - vss GND
6 0 RBLDM VRAM-B DQ low-order mask enable
7 0 RBUDM VRAM-B DQ high-order mask enable
8 0 RBAO VRAM-B address bit 0
9 I 0 RBA1 VRAM-B address bit 1
10 - VDD +5V power supply
11 I 0 I RBA2 VRAM-B address bit 2
12 0 RBA3 VRAM-B address bit 3
13 0 RBA4 VRAM-B address bit 4
14 0 RBA5 VRAM-B address bit 5
15 - VSS GND
16 0 RBA6 VRAM-B address bit 6
17 0 RBA7 VRAM-B address bit 7
18 0 RBA8 VRAM-B address bit 8
19 0 RBA9 VRAM-B address bit 9
20 1/0 VDO SYSCON interface data bit 0
21 1!0 VOl SYSCON interface data bit 1
22 1!0 VD2 SYSCON interface data bit 2
23 I/0 VD3 SYSCON interface data bit 3
24 - vss GND
25 I/0 VD4 SYSCON interface data bit 4
26 1!0 VD5 SYSCON interface data bit 5
27 1/0 VD6 SYSCON interface data bit 6
28 I/0 VD7 SYSCON interface data bit 7
29 - VDD +5V power supply
30 1!0 VD8 SYSCON interface data bit 8
31 1!0 VD9 SYSCON interface data bit 9
32 1/0 VDlO SYSCON interface data bit 10
33 1!0 VDll SYSCON interface data bit 11
34 1!0 VD12 SYSCON interface data bit 12
35 1!0 VDl3 SYSCON interface data bit 13
36 - vss GND
37 1!0 VD14 SYSCON interface data bit 14
38 1!0 VD15 SYSCON interface data bit 15
39 I AD SYSCON interface address/data selection
40 I DTEN SYSCON interface data enable
41 0 READY SYSCON interface data ready
42 I cs SYSCON interface chip select
43 - VDD +5V power supply
44 0 VINT SYSCON interface vertical interrupt
45 0 HINT SYSCON interface horizontal interrupt
46 I EXLAT External latch strobe input
47 I EXSYN External sync signal input
48 1!0 EXBGO External input data bit 0 I Test input/output (in test mode)
49 1!0 EXBG1 External input data bit 1 I Test input/output (in test mode)
50 1!0 EXBG2 External input data bit 2 I Test input/output (in test mode)
51 110 EXBG3 External input data bit 3 I Test input/output (in test mode)
52 - VSS GND
53 110 EXBG4 External input data bit 4 I Test input/output (in test mode)
54 l/0 EXBG5 External input data bit 5 I Test input/output (in test mode)
55 110 EXBG6 External input data bit 6 I Test input/output (in test mode)
56 110 EXBG7 External input data bit 7 I Test input/output (in test mode)
57 110 EXBG8 External input data bit 8 I Test input/output (in test mode)
58 1/0 EXBG9 External input data bit 9 I Test input/output (in test mode)
59 1/0 EXBG10 External input data bit 10 I Test input/output (in test mode)
60 1/0 EXBGII External input data bit 11/ Test input/output (in test mode)
61 1/0 EXBGI2 External input data bit 12/ Test input/output (in test mode)
62 1/0 EXBG13 External input data bit 13/ Test input/output (in test mode)
63 I/0 EXBG14 External input data bit 14 I Test input/output (in test mode)

-49-
No. 1/0 Pin Name Function
64 1!0 EXBGI5 External input data bit I5 I Test input/output (in test mode)
65 1/0 EXBGI6 External input data bit I6/ Test input/output (in test mode)
66 1/0 EXBG17 External input data bit 17 I Test input/output (in test mode)
67 - YSS GND
68 I 1/0 EXBG18 External input data bit 18/ Test input/output (in test mode)
69 I/0 EXBG19 External input data bit 19/ Test input/output (in test mode)
70 1/0 EXBG20 External input data bit 20 I Test input/output (in test mode)
71 1/0 EXBG21 External input data bit 21 I Test input/output (in test mode)
72 I/0 EXBG22 External input data bit 22 I Test input/output (in test mode)
73 I/0 EXBG23 External input data bit 23 I Test input/output (in test mode)
74 I EXON External input data display timing
75 - YDD +5Y power supply
76 I CLK Main clock input
77 0 EXSL External video select signal
78 I RESET Initial reset input
79 I NTSC NTSC/PAL selection
80 - YSS GND
81 - AYSS GND of linear RGB
82 0 R Linear R output
83 0 G Linear G output
84 0 B Linear B output
85 - AYDD +5Y power supply of linear RGB
86 0 CSYNC Composite sync signal output
87 0 YSYNC Vertical sync signal output
88 0 HSYNC Horizontal sync signal output
89 - YDD +5Y power supply
90 0 DCLK Dot clock output
91 0 HTIM YDP1 interface H timing
92 0 YTIM YDP1 interface Y timing
93 1/0 FBDO YDP1 interface data bit 0
94 1/0 FBDI YDPI interface data bit I
95 1/0 FBD2 YDP1 interface data bit 2
96 1/0 FBD3 YDPl interface data bit 3
97 - YSS GND
98 I/0 FBD4 YDPI interface data bit 4
99 1/0 FBD5 YDPl interface data bit 5
100 1/0 FBD6 YDPl interface data bit 6
101 I/0 FBD7 YDPI interface data bit 7
102 0 RAAO VRAM- A address bit 0
103 0 RAAl YRAM- A address bit I
104 0 RAA2 VRAM- A address bit 2
105 0 RAA3 VRAM- A address bit 3
106 - vss GND
107 0 RAA4 - VRAM- A address bit 4
108 0 RAA5 VRAM-A address bit 5
109 0 RAA6 VRAM- A address bit 6
110 0 RAA7 VRAM- A address bit 7
I II - VDD +5V power supply
112 0 RAA8 VRAM- A address bit 8
Il3 0 RAA9 YRAM- A address bit 9
-
114 0 RACS VRAM=A chip select
115 0 RARAS VRAM- A row address strobe
116 - vss GND
ll7 0 RACAS VRAM- A column address strobe
118 0 RAWE VRAM- A write enabie
119 0 RALDM VRAM- A DQ low- order mask enable
120 0 RAUDM VRAM- A DQ high- order mask enable
I2I I/0 RADO VRAM- A data bit 0
122 1/0 RADI VRAM- A data bit 1
123 1/0 RAD2 VRAM- A data bit 2
124 1/0 RAD3 VRAM- A data bit 3
125 - vss GND
126 I/0 RAD4 VRAM- A data bit 4

-50-
No. 1/0 Pin Name Function
I ~

127 1/0 i RAD5 YRAM - A data bit 5


128 I 1/0 RAD6 YRAM - A data bit 6
I
129 i 110 I RAD7 YRAM - A data bit 7
130 I - I VDD +5Y power supply
131 i 1/0 I RAD8 VRAM - A data bit 8
132 I 1/0 ! RAD9 YRAM - A data bit 9
133 j 1/0 I RADIO I YRAM - A data bit 10
134 1/0 I RADII VRAM - A data bit 11
135 ! - I VSS GND
136 I 1/0 RADI2 VRAM - A data bit 12
I
137 l 1/0 i RAD13 VRAM - A data bit 13
138 1/0 RAD14 YRAM - A data bit 14
139 I 1/0 RADI5 YRAM- A data bit 15
140 l 0 RCLK YRAM - AlB clock
141 I I TEST Test mode selection (normally, connected to VDD)
142 1!0 RBDO VRAM - B data bit 0
143 I 110 I RBD1 YRAM - B data bit 1
144 1/0 RBD2 YRAM - B data bit 2
145 1!0 RBD3 YRAM - B data bit 3
146 J - vss GND
!47 I 1/0 RBD4 VRAM - B data bit 4
148 1/0 RBD5 VRAM - B data bit 5
149 i 1/0 RBD6 VRAM - B data bit 6
150 1/0 RBD7 YRAM - B data bit 7
151 - VDD +5V power supply
152 1/0 RBD8 YRAM - B data bit 8
153 1!0 RBD9 VRAM - B data bit 9
154 1/0 RBDIO YRAM - B data bit 10
155 I/0 RBDI1 YRAM - B data bit 11
156 - vss GND
157 1!0 RBDI2 VRAM- B data bit 12
!58 1/0 RBDI3 YRAM - B data bit 13
159 1/0 RBD14 YRAM - B data bit 14
160 I 1/0 RBDIS VRAM- B data bit 15

-51-
IC17 SCSP
IC CUSTOM CHIP SCSP QFP YAMAHA
Parts No. : 315-5687

Top View
96 65

97 64

33

32

Description
No. 1/0 Pin Name Function
1 MCD6
2 MCD5
I/0 MCPU data bus
3 MCD4
4 MCD3
5 - vss GND
6 MCD2
7 1!0 MCDI MCPU data bus
8 MCDO
9 0 MCRDYN Ready signal to MCPU
10 0 MCINTN Interrupt request to MCPU
11 - VDD Power supply (Sv)
12 I RESETN SCSP reset input
13 - vss GND
14 I MACK SCSP master clock: 512fs (22.58MHz)
15 INT2N
16 I INTlN SCSP external interrupt request input
17 INION
18 - VDD Power supply (Sv)
19 I ESD Digital audio interface serial data input
20 I EBCK Digital audio interface BCK
21 I ELRCK Digital audio interface LRCK
22 I MIDIINP MIDI input
23 - VSS . GND
24 0 MIDI OUT MIDI output
25 0 MRASN RAS signal
26 0 MWEUN Write signal corresponding to MD[IS-8]
27 0 MWELN Write signal corresponding to MD[7-0]
28 MCASON
0 CAS signal
29 MCASIN
30 0 MOEN Sound memory data output enable
31 - VDD Power supply (Sv)
32 MAO
33 MAl
34 MA2
0 Sound memory address
35 MA3
36 MA4
37 MAS
38 - vss GND
39 MA6
40 0 MA7 Sound memory address
41 MAS
42 1!0 MDO Sound memory data

-52-
No. 1/0 . Pin Name Functior,.
43 MDI
1!0 Sound memo!)' data
44 MD2
45 - YDD Power supply (5Y) r

46 MD3
47 MD4
48 MD5
1/0 Sound memo!)' data
49 MD6
50 MD7
51 MD8
52 - vss GND
53 MD9
54 MDIO
55 MDII
1/0 Sound memo!)' data
56 MD12
57 MD13
58 MD14
59 - YDD Power supply (5Y)
60 l/0 MD15 Sound memo!)' data
61 0 DSD DAC interface serial data output
62 0 DBCK DAC interface BCK
63 0 DLRCK DAC interface LRCK
64 0 DSCK DAC interface system clock [256fs clock]
65 SCA23
66 SCA22
67 I SCA21 SCPU address bus
68 SCA20
69 SCA19
70 - YSS GND
71 SCA18
72 SCA17
73 SCA16
74 SCA15
75 I SCA14 SCPU address bus
76 SCA13
77 SCA12
78 SCAli
79 SCAlD
80 - YDD Power supply (5Y)
81 SCA9
82 SCAB
83 SCA7
84 SCA6
85 I SCA5 SCPU address bus
86 SCA4,
87 SCA3
88 SCA2
89 SCAI
90 - vss GND
91 SCFCO
92 I SCFCI SCPU status input
93 SCFC2
94 I SCWTN SCPU write
95 I SCLDSN SCPU SCD [7 -0] strobe
96 I SCUDSN SCPU SCD [15-8] strobe
97 I SCASN SCPU address strobe
98 - TESTN LSI test signal (Not connected)
99 - YDD Power supply (5Y)
100 0 SCDTAKN SCPU data acknowledge
101 0 SCAYECN SCPU auto vector interrupu specification
102 SCIPLON
103 0 SCIPLlN SCPU interrupt level specification
104 SCIPL2N
105 1/0 SCDO SCPU data bus

-53-
No. 1/0 Pin" Name Function
106 1!0 SCDI SCPU data bus
107 - vss GND
r
108 SCD2
109 SCD3
110 SCD4
Ill I/0 SCDS SCPU data bus
1!2 SCD6
1!3 SCD7
1!4 SCD8
!IS - VDD Power supply (SV)
116 SCD9
117 l/0 SCDIO SCPU data bus
118 SCDll
119 - vss GND
120 SCD12
121 SCD13
1/0 SCPU data bus
122 SCD!4
123 SCDIS
124 - vss GND
125 I MCCSN Select signal from MCPU
126 I MCCK 28 MHz clock from MCPU
127 - VDD Power supply (SV)
128 I/0 I MCD7 MCPU data bus

SCSP Chip Block Diagram

l SCPUI (SOUND CPU)


I I LFO (LOW FREQ OSCILLATOR) I
ALFO PLFO

I MCPUI (MAIN CPU}


I I
7f
I DMA
I IPLFO
PG(PITCH GENERATOR) I
I
:MIDI
I I ADP (ADDRESS POINTER)
I
l EXT(AUDIO INPUT)
I 7
I MEMCT
(MEMORY CONTROLLER) ~- DRAM
I 6
I +16 16
GENERAT~~
[EG (ENVELOPE

_t_1o
liNTER
(INTEPOLATOR}
t2o
I
l -lEG ALFOL PCM DATA
MULTI (MULTIPLIER)
I
~ ...... ,
: sous

. . l., I
2o
r- : . :-.. : . ::.:-------;: . ~-~ .-:. :,- -;. :i:::-.:;- 1
: EXTS : : MIXS : : MEMS:

I
T .....T.....
I
J

"DSP"
I
...... ! .... ,
~ L~~;~~.J
... J... ,
: SEL :
.:.r;-~---~--------
------------- I 16
I DIRECT EFFECT
OMIX (OUTPUT MIXER) I
I
t
DAC

-54-
IC18 SOUND CPU (68000)
IC MC68ECOOOFN12 PLCC MOTOROLA
Parts No.: 315-0941

Top View Signal Description


9 61
vee ADDRES!iBU s
)A2 3-Al
60 GND
DATA BUS
CLK
01 5-00

AS
FCO Rfii
FC1 uos
PROCESSOR{
STATUS >ASYNCHRONOUS
BUS CONTROL
FC2 Ios
26 44
MC68ECOOO DTACK

}
27 43 BR BUS
BG ARBITRATION
CONTROL

IPLO
BERR iPTI
INTERRUPT
SYSTEM{ RESET IPL2 >CONTROL
CONTROL HALT AVEC J

Description
I
No. 1/0 Name Function No. 1/0 Name Function
I - GND 35 - GND Ground
2 D4 36 A4
3 I D3 37 AS
4 l/0 D2 Data bus 38 A6
5 Dl 39 A7
6 DO 40 A8
.., r--;n
I AS Address strobe A9
8 UDS Upper data strobe 42 AlO
0
9 LDS Lower data strobe 43 All
10 RIW Read/write 44 0 Al2 Address bus
II I DTACK Data transfer acknowledge 45 Al3
12 0 BG Bus grant 46 A14
13 I BR Bus request 47 Al5
I4 48 Al6
IS
- vee Power
49 A17
16 I CLK Clock 50 Al8
17 51 Al9
- GND Ground
18 52 A20
19 I MODE 8 bit/16 bit select 53 - vee Power
20 1/0 HALT Halt 54 A21
21 l/0 RESET Reset 55 0 A22 Address bus
22 - NC Not connected 56 A23
23 I AVEC 57 - GND Ground
24 I BERR Bus error 58 DIS
25 IPL2 59 D14
26 I IPLI Interrupt control 60 Dl3
27 IPLO 61 D12
28 FC2 62 Dll
29 0 FCI Processor status 63 I/0 DIO Data bus
30 FCO 64 D9
31 AO 65 D8
32 AI 66 D7
0 Address bus
33 A2 67 D6
34 A3 68 D5

-55-
IC19 Sound DRAM
IC HM514270AJ-8 SOJ HITACHI IC UPD424270LE-70 SOJ NEC IC HM514270Aj-7 SOJ HITACHI
Parts No. : 315-0777-80 Parts No.: 315-0739-70 Parts No.: 315-0777-70
IC MN414270SJ-08 SOJ PANASONIC
Parts No. : 315-0822-80

Top View & Pin Layout

Vss
1/015
1/014
Input State Output
1/013 Operation Mode
11012 RAS CAS UWE LWE State
Vss H H D D Open Standby
1/0ll H L H H Valid Standby
11010 L L H H Valid Read cycle
IIOg L L L2) L2) Open Early write cycle
1 1108 L L L2) L 2) Underlined Delayed write cycle
NC L L H~L H--+L Valid Read modified write cycle
NC L H D D Open RAS onlY_ refresh 9:_cle
CAS H~L L D D Open CAS before !RAS refresh 9:_cle
oe L H~L H H Valid High-speed page mode read cycle
As L H--+L L2) L2) Open High-speed page mode early write cycle
A7 L H-+L L2) L2) Underlined High-speed page mode delayed write cycle
As L H~L H-+L H-+L Valid High-speed page mode read modified write cycle
As Note: H=High(inactive), L=Low(active), D=Don't care.
A4

IC20 PLL
IC CUSTOM CHIP PLL HQFP
Parts No.: 315-5746

II Top View
28

20

6 15

7 14 ~ ~
~--~4~--------------------~3~--~~~

OSIN1

NPSEL 1} - - - - - - 1 - - - - '

DO~EL 2r----------+~====~------------~~r-~
SYSRES 3

DVOD

OSIN2
OSOUT2

EXTCLK 1}----f---'
oscsw 7)-----4-----'

-56-
Description
No. 1/0 Name Fun-ction
1 NPSEL NTSC (SV)IPAL (OV) mode switching control
2 OOTSEL 320PIX (OV)I352PIX (5V) mode switching control
I
3 SYSRES Reset (OV reset)
4 TEST Test pin
5 I 0 I SCPCLK Clock signal output
6 EXTCLK External clock input I CMOS I with pull-down resistor incorporated
I Czystal oscillation/external clock signal input switching control (5V: Crystal
7 oscsw oscillation, OV: External clock signal) I CMOS I with pull-up resistor incorporated
8 - DGND Ground of digital circuits
9 0 OSOUT2 Czystal oscillator output (OSC2) I Oscillation output 0
I
10 I I I OSIN2 Czystal oscillator input (OSC2) I Oscillation input I
11 - OSVDD2 VDD of czystal oscillator (0SC2)
12 0 POOUT2 Phase detector (PD2) output
13 I VCOIN2 VC02 input I Analog I
14 -e;-,_ AC2 Phase compensator pin I Analog
15 0 AP02 VC02 amp output I Analog 0
16 - AVDD2 Analog VDD of VC02
17 SNDCLK Clock signal output
1/0
18 OOTCLK Clock signal output
19 - AVDDI Analog VDD ofVCOI
20 0 APOl VCOl amp output I Analog 0
21 I - ACl Phase compensator pin I Analog
22 I VCOIN1 VC01 input I Analog
23 0 POOUTl Phase detector (PD 1) output
24 - OSVDDl VDD of crystal oscillator (0SC1)
25 I OS!Nl Czystal oscillator input (OSCl) I Oscillation input I
26 I 0 OSOUTl Czystal oscillator output (0SC1) I Oscillation output 0
27 - DVDD VDD of digital circuits
28 I 0 FSC I Clock output signal

IC21
IC CXA 1645M SOP SONY
Parts No.: 315-5314

Block Diagram
GND2 ROUT GOUT CVOUT VCC2 FO YTRAP YOUT COUT VREF IREF

GND1 RIN GIN BIN NC SCIN NPIN BFOUT YCLPC SYNCIN NC VCC1

-57-
Description
No. 1/0 Pin Name Function

-
Ground of circuits other than RGB, composite video and Y/C output
1 GNDl circuits.
2 RIN
Analog RGB signal inputs. The signals should be input with 100%=1 Yp-p
3 I GIN (max.).
4 BIN
5 - NC Not connected.
6 I SCIN Subcarrier input
7 I NPIN NTSCIPAL mode switching pin
8 0 BFOUT BF pulse monitoring output
9 - YCLPC Time constant which determines the Y signal clamp is connected.
10 I SYNC IN Composite sync signal input. Receives it at the TTL leveL
II - NC Not connected.
12 - YCCI Power supply of circuit other than RGB, composite video and Y/C output
13 - !REF Pin to determine the internal reference current leveL
I4 - VREF Internal reference voltage pin.
I5 0 COUT Chroma signal output. Can drive a 75 Q load.
16 0 YOUT Y (luma) signal output. Can drive a 75 Q load.
Reduces cross-color caused by subcarrier frequency components contained
I7 - YTRAP
in the Y signaL
- Adjusts fo of the internal filter. Connect the following resistor between this
18 FO pin and ground depending on the NTSC or PAL mode.
19 - YCC2 Power supply of RGB, composite video and Y/C output circuits.
20 0 CYOUT Composite video signal output. This can drive a 75 Q load.
21 BOUT
22 0 GOUT Analog RGB signal outputs. These can drive a 75 Q load.
23 ROUT
24 - GND2 Ground ofRGB, composite video and Y/C output circuits.

IC22 DAC
IC TDA1386T SOP PHILIPS
Parts No.: 313-5313

II Top View Description


VDOO No. 1/0 Pin Name Function
Vss--. Vsso -
1 VDDA Analog sul'_ply voltage
Vm
2 - VSSA Analog ground
1 VCR 3 I TEST! Test input 1; pin should be connected to ground.
FILTCR 4 I BCK Bit clock input.
1 FILTCL 5 I WS Word select input.
VOL 6 I DATA Data input
APPo 7 I CKSLl Format selection 1.
1 APP1 8 I CKSL2 Format selection 2.
1 APP2 9 - YSSD Digital ground
TEST 11 APPL 10 - VDDD Digital supply voltage.
SYSCLK APP3 11 1 TEST2 Test input 2 ; pin should be connected to ground.
12 - SYSCLK System clock 256 fs
13 I APP3 Application mode 3 input.
14 I APPL Application mode selection input.
15 I APP2 Application mode 2 input.
16 I APPl Application mode 1 input.
17 I APPO Application mode 0 input.
tQ A
.u v VOL Left channel output.
Capacitor for left channel first-order filter function, should be
19 - FILTCL connected between pins 19 and 18.
- Capacitor for right channel first-order filter function, should be
20 FILTCR
connected between Pins 20 and 21.
21 0 YOR Right channel output.
22 - VREF Internal reference voltage for output channels (O.SV ooo typ. ).
23 - vsso Operational amplifier ground.
24 - VDDO Operational amplifier supply voltage.

-58-
Block Diagram

CKSL1 CKSL2

SYSCLK
6
DATA---t-"------1 SERIAL
5 4fs DIGITAL UP-SAMPLE
WS DATA
FILTER AND FEATURES APPL
BCK 4 INPUT
APPO
APP1
APP2
APP3
13

3
TEST1
11
TEST2
Vooo

9
Vsso

FILTCL 19 FILTCR
20
RCONV1
RCONV2
1 nF

VOL

10 IJ. F'l
VssA
.____231~1---11-21---
J

Vsso Vooo

-59-
IC23/24 74VHC04
IC 74VHC04 SOP 300MIL
Parts No. : 314-0632
II Top View & Pin Layout
1Y 2

2Y 4

3Y 6

4Y 8

SY 10

6Y 12

IC25
IC S-80741AL-AS CHIP
Parts No. : 313-5322
II Top View r----------------------------------,
Top View

1 OUT
2 VDD OUT
3 vss

2 3

_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ JI

IC26/27/29/30 74LS245
IC 74LS245 SOP 300MIL
Parts No. : 314-0563

II Top View & Pin Layout II Function Table

Enable !Direction
Control Operation
G DIR
L L B data to A bus
L H A data to B bus
H X Isolation

H : High level
L: Low level
X: "H" or "L"Ievel

-60-
IC28 OCTAL BUS TRANSCEIVER
IC 74ACT245 SOP 300MIL
Parts No. : 314-0649

BTopView B Logical Operation Circuit B Truth Value Table

OUTPUT
INPUT FUNCTION STATE
GIDIR ABUS I BBUS
LlL OUTPUT INPUT A=B

LIH INPUT OUTPUT B=A

H lx High impedance z
X: Don't care
Z: High impedance

IC31/32 DRAM
IC HM514260AJ-7 SOJ IC UPD424260LE-70-E2 SOJ NEC IC TC514260BJ-70 SOJ TOSHIBA
Parts No.: 315-0947-70 Parts No. : 315-0985-70 Parts No.: 315-0986-70

IC KM416C256BJ-7 SOJ SUMSUNG IC M8814260-70PJ-G SOJ FUJITSU IC HY514260BJC-70 SOJ HYUNDAI


Parts No.: 315-0983-70 Parts No. : 315-0984-70 Parts No.: 315-1030-70

BTop View

vee
1/015
1/014
1/013
1/012

Vss
1/011
1/010
1/09
1 1/0s
NC
LCAS
UCAS
OE'
AS
A7
AB
A5
A3 A4

-61-
iC33
IC 74HC157 SOP
Parts No. : 314-0634
II Top View liD escnptron
No. Name Function
I SEL Common data select input
2 AI Data inputs from source 0
3 81 Data inputs from source 1
4 Yl Multiplexer outputs
5 A2 Data inputs from source 0
6 82 Data inputs from source I
7 Y2 Multiplexer outputs
8 GND Ground (OV)
9 Y3 Multiplexer outputs
10 83 Data inputs from source 1
Y1 Y2 Y3 Y4
11 A3 Data inputs from source 0
4 7 9 12 12 Y4 Multiplexer outputs
13 84 Data inputs from source I
14 A4 Data inputs from source 0
15 G Enable input (active LOW)
16 Vee Positive supply voltage
IC34
IC UPC78L05T CHIP IC TA78L05F CHIP
Parts No. : 313-5323 Parts No. : 313-5323-01
II Top View

1. OUTPUT
2. COMMON
(SHIELD PLATE)
3.1NPUT

IC35
IC S-80723AN-DL CHIP
Parts No. : 313-5328

Top View
r---------------------~
I

1. OUT
2.VDD
3. vss

0 02 03
I
I
I I

L---------------------~

-62-
SH1 BOARD IC1 01 SHJ CPU
"
IC CUSTOM CHIP SHi QFP IC CUSTOM CHIP SH1 A QFP
Parts No.: 315-5785 Parts No. : 3l5-5785A

Top View 112 85

28

29 56
Description
No. 1/0 Pin Name Function
I
I i IROL Host command intenupt input (level detection)
2 IRQH CD-ROM sync detection, subcode sync detection intenupt input (level detection)
3 I VSS Ground
4 ADO
s ADI
6 ADZ
7 I AD3
I/0 Data input/output
8 AD4
9 ADS
10 AD6
11 AD7
12 - VSS Ground
13 ADS
I/0 Data input/output
14 AD9
15 - vee +SV
16 AD10
17 AD11
18 AD12
1/0 Data input/output
19 AD13
20 AD14
21. ADIS
22 - VSS Ground
23 AO
24
2S . A1
A2
26 A3
0 Address output
27 A4
28 AS
29 A6
30 A7
31 - VSS Ground
32 A8
33 A9
34 AIO
3S All
0 Address output
36 A12
37 Al3
38 AI4
39 AIS
40 - vss Ground
41 AI6
0 Address output
42 Al7
43 - vee +5V
44 AI8
45 Al9
0 Address output
46 A20
47 A21
48 0 NC Not connected.
49 0 CASH DRAM CASH output

-63-
r-
No. 1/0 Pin Name Function
50 0 CS2 CS2 output (GA, MPEG, other area 2 access)
51 0 CASL DRAM CASL output
52 vss Ground
53 l TIOCAO MPEG A data transfer (DMA3) request input (edge detection)
54 0 RAS DRAM CASL output
55 l/0 CS6 CS6 output (area 6 access)
56 - NC Not connected.
57 0 WRL WRLoutput
58 0 WRH WRH output
59 0 RD RD output
60 0 RESET GA reset output. Lo: RESET, Hi: Release
61 - VSS Ground
62 0 NC Not conncted.
63 0 IRQOUT Spare (Spare to output "Lo" during intenupt process)
64 I TIOCAI MPEG V data transfer (DMA2) request input (edge detection)
65 0 NC Not conncted.
66 0 DACKO DMAO (for CD-ROM sector data input) ACK output (toGA)
67 I DREOO DMAO (for CD-ROM sector data input) REQ input (from GA)
68 0 DACKI DMA1 (for host data input/output) ACK output (toGA)
69 I DROOl DMA1 (for host data input/output) REQ output (from GA)
70 - vee +SV
71 0 CK SH-1 system clock output (20MHz) (toGA)
72 - VSS Ground
73 I EXTAL A crystal oscillator is connected.
74 I XTAL A crystal oscillator is connected.
75 - vee +SV
76 I NMI +SV
77 - vss Ground
78 - NC Not conncted.
79 I RESET Reset input (reset at "Lo")
80 MOO
81 I MDI MCU operation mode setting pins. The built-in ROM is effective.
82 MD2
83 - vee +5V
84 - vee +5V
85 - vee +5V (power supply of analog circuits)
86 - VREF +5V (analog reference power supply)
87 NC
88 NC
- Ground (not used)
89 NC
90 NC
91 - AVSS Ground (analog ground)
92 - NC Ground (not used)
Input to detect whether VCD is connected or not.
93 I VCD Lo: CD drive connected, Hi: VCD connected.
94 - NC Ground (not used)
95 - NC Ground
96 - VSS Ground
97 I MPEGAIRQ MPEG A intenupt input (edge detection)
98 I MPEGVIRQ MPEG V intenupt input (edge detection)
99 - vee +5V
100 I COMSYNC CD communications start signal input. Lo: Start, Hi: In the middle
CD communications sync intenupt input (edge detection).
101 I COMREQ Lo: Duringclock transfer, Hi: During interval.
102 - NC Not conncted.
103 - NC Not conncted.
104 {"\
'-' DEMP Deemphasis output. Lo: DEMP OFF, Hi: DEMP ON
105 - NC No conncted.
106 - VSS Ground
107 I CDATA CD communications data input (SCKO used)
108 0 HDATA CD communications data output (SCKO used)
109 I TEST Test control input. Lo: Test mode, Hi: Normal mode
110 0 TDATA Test data output
Ill 0 COMCLK CD communications clock output (SCKO used)
ll2 0 TCLK Clock output for test data

-64-
SH1 BOARD IC1 02 DRAM
IC HM514260AJ-8 SOJ IC HM514260AJ-7 SOJ
Pans No.: 315-0947-80 Pans No.: 315-0947-70

Top View & Pin Layout Pin Name


Vss Pin Name Function
1/015 A0-A8 I address input
1/014
7 1/013 AO-A8 Refresh address input
1/012 1!01-1/04 Data input/output
Vss
1/011 RAS Row address strobe
1/0!0
CAS Column address strobe
1/0 9
1 1/08 WE Write enable
NC
OE Output enable
LCAS
liCAS Ycc Power suppply (+SY)
OE
Yss Ground
A8
A7
As
A5
A4

Block Diagram
RAS

1/0 1 1/0 2 1/0 3 1/0 4


I I I I
1110 BUFFER 1110 BUFFER
II
I
'(7
I
~7 ~~ 1
C/) a: C/) C/) a: C/)
:J w :J :J w :J
ID > ID ID > ID
C/) g a:0 g en en g a:0 g C/)
0 <1!1 <1!1
0 0 oo!! <1!1
0
:E <1!1 - :E :E <1!1 :::E
~ 256k en
0
a:
w
en
0
256k ~ ~ 256k en0 a:
w
en
0
256k ~
ti MEMORY :E 0 :E MEMORY ti ti MEMORY :E 0 :E MEMORY ti
:E
< CELL e:. 0
(.) e:. CELL :E
c(
:::E
c( CELL e:. 0
(.) e:. CELL :E
<
w ARRAY ti w ti ARRAY w w ARRAY ti w ti ARRAY w
0 :E :::E 0 :E
C/) :::E C/) C/)
z
C/)
z < z < zw zw < < zw
w w :::E w w :E w
C/)
C/)
z
:J_, C/)
z
C/) C/)
C/)
zw
_,
:J C/)
zw
C/)

w 0 w 0
C/) (.) C/) C/) (.) C/)

~ WORD L;'). WORD WORD -<~ WORD


jV DRIVER DRIVER DRIVER DRIVER

ROW ROW ROW ROW


DECODER DECODER DECODER DECODER

I
ROW ADDERSS BUFFER
I I
COLUMN ADDRESS BUFFER I
ir ~t
AO-A8 I
-65-
SH1 BOARD !C103
IC CUSTOM CHIP OCU YGR019A
Parts No. : 315-5873

IITopView
168 127

126

I
I
I
42 85

43 84

II Block Diagram
CD SIGNAL
SH uP
OESCRAMBLE T SUBCODE CD-ROM Data
PROCESSOR

IRQ 1
IRQ2
~'"'""I
Jf (Upper)
ROTECTO
~mrQ~b~ "" CO-DA
HD49232
~C(CRCC>!-H
l
L
GACTRL
CTRL ADR DATA (4M DRAM) CDIROMSKJ
(Upper) [ SPDATA 1- { L SUBCODE

W-r~t I GASTAT

:
.......... ~
= I==
--
=
18

=
~

F=
18 I-- 8

r--
v: ~

'7 '7 '"[> :~

"0
:za:
-' VIC:
VIW
we
:
18

~:~ I L ~
J
'7

J& ISH-FIF~<l v
!--;
rr: MPEG
Audio

a:o .......- DATA


-
.~
-~ \

~COMMANDd
:E:z eo CTRL - COUNTER
i=O ow CD I ROMS~ COl RQREQJ
(.) <e (Lower)
'7
(Lower) , REG. o-3 - v_ :
: ~
oo
-' VIC:
I LHI ROOREO] ~RESPONSE! I L - lsummj =~ MPEG
:za:
-~
:E:z
VIW
we
a:o
HI ROMSK
~ r- ~ r REG. o-a
DATA
STAT -r _<\t_ Video
i=O Ct.>
ow t-BUS FIF~
(.)
<e '\ '7 \7 J:
A-bus DATA
, COUNTER
SHDATA BUS
.,~ I I
II I.
ir (BufferedSUB)
18
II IRQ ~ 18 Auod
' RGB
'7 25
HOST SYSTEM

-66-
II Description
I
No. I
I 1/0 Name "Function
I I MVPRT Video transparency control signal
2 MVR7 '

3 MVR6
4 I MVR5 Video red color data
5 MVR4
6 MVR3
7 - vee Power supply
8 - VSS Ground
9 MVG7
10 MVG6
11 I MVG5 Video green color data
12 MVG4
13 MVG3
14 I MVB7 Video blue color data
15 - vss Ground
16 MVB6
17 MVB5
I Video blue color data
18 MVB4
19 MVB3
20 AAl
21 I AA2 A-BUS address bus
22 AA3
23 - VSS Ground
24 AA4
25 AA16
I A-BUS address bus
26 AA17
27 AA18
28 I AeS2 Chip select signal from A-BUS
29 I WTRS Wait control signal used to transfer MPEG video frame data
30 - vss Ground
31 0 FDACK MPEG video frame data transfer control signal
32 0 MVCS MPEG video chip select signal
33 0 MACS MPEG audio chip select signal
34 0 TP5 Test pin
35 - vee Power supply
36 - vss Ground
37 I RESET Gate array system reset signal
38 I MABieK Sync clock used to transfer MPEG audio serial data
39 I MASDATAI MPEG audio serial data signal
40 I MALRCLK Clock used to detect MPEG audio serial data L/R
41 I TP2 Test pin
42 I seS6 SH chip select 6
43 - vss Ground
44 SDLO
45 SDLI
46 I SDL2 SH uP subdata bus
47 SDL3
48 SDL4
49 - vee Power supply
50 - VSS Ground
51 SDLS
52 SDL6
53 SDL7
I SH uP subdata bus
54 SDLB
55 SDL9
56 SDLIO

-67-
..
No. 110 Name Function
57 - vss Ground
58 SDLll
59 SDL12
60 I SDL13 SH uP subdata bus
61 SDL14
62 SDL15
63 - vee Power supply
64 - vss Ground
65 SA21
66 SA20
67 I SA4 SH uP address bus
68 SA3
69 SA2
70 I SRD SH uP read enable signal
71 - vss Ground
72 I SHCK 20MHz clock
73 I SAl SH uP address bus
74 I IRQOUT SH uP interrupt factor generation signal
75 I SCS2 SH uP chip select 2
76 I DACKl Channel 1 DMA transfer response
77 - vee
78 - vss Ground
79 I DACKO Channel 0 DMA transfer response
80 CASH
I DRAM control signal
81 CASL
82 I SWRH SH uP upper byte write enable signal
83 I SWRL SH uP lower byte write enable signal
84 I SA19 SH uP address bus
85 I TP3 Test pin
86 - vss Ground
87 0 DSWR Delayed write cycle control signal
88 0 DREQ1 Channel 1 DMA transfer request
89 0 DREQO Channel 0 DMA transfer request
90 I SDH15 SH uP main data bus
91 - vee Power supply
92 - VSS Ground
. 93 SDH14
94 SDH13
95 I SDH12 SH uP main data bus
96 SDH11
97 SDH10
98 - VSS Ground
99 SDH9 Power supply
100 SDH8
101 I SDH7
SH uP main data bus
102 SDH6
103 SDH5
104 - vee Power supply
105 - vss Ground
106 SDH4
107 SDH3
108 I SDH2 SH uP main data bus
109 SDH1
110 SDHO
111 0 SIRQH SH uP upper byte (CD-ROM) interrupt signal
112 - vss Ground

-68-
No. 1/0 Name Functfon
113 0 I SIRQL SH uP lower byte (A-BUS) interrupt signal
114 I 0 BCK Audio serial data sync clock
115 0 LRCK Audio L!R channel switching signal
116 - vee I
Power supply
117 0 SD Audio serial data
118 i 0 SUBCK Subcode input clock
119 I - vee Power supply
120 I - vss Ground
121 I CFCKO Frame sync signal
122 I SUBOUT CD subcode data
123 I SI Subcode block sync signal
124 I DAS CD-DA audio serial data
125 I CKX CD audio serial data sync clock
126 I MPX
CD audio L!R channel switching signal
127 - VSS
128 I C2F C2 error flag
I ' SMPX CD-ROM data byte sync signal
129
130 I SDAS CD-ROM serial data
131 I SCKX CD-ROM serial data bit sync signal
132 - vss Ground
133 - vee Power supply
134 - vss Ground
135 ATIM1
I A-BUS timing control signal
136 ATIMO
137 I I ARD A-BUS read signal
138 - VSS Ground
139 I AFCO A-BUS timing control signal
140 I AWRO A-BUS lower byte write signal
141 I AWR1 A-BUS upper byte write signal
142 I AFCl A-BUS timing control signal
143 - vss Ground
144 0 AWAIT A-BUS wait control signal
145 0 AIRQ A-BUS interrupt signal
146 - T Test signal for scan pass
147 ADO
I A-BUS data bus
148 AD!
149 - vee Power supply
150 - vss Ground
151 AD2
152 AD3
I A-BUS data bus
153 AD4
154 ADS
155 - VSS Ground
!56 AD6
157 AD7
158 I AD8 A-BUS data bus
159 AD9
160 ADlO
161 - vee Power supply
162 - VSS Ground
163 ADII
164 AD12
165 I AD13 A-BUS data bus
166 ADI4
167 AD15
168 - vss Ground

-69-
LODEDVIEW & PARTS LIST
11. EXP loded View ~ 54
11-1. Exp I /_ - --:

1-2

5
21

r----
. -------~-- -----,
I
I
II
I
I
I
I
I
I

I
I
',
'I [__-- -=----_-_-_-_-:_-_ _I
I r
- - -::..::. =::..-::..::.. ~
I
I
. . .,."'""""' i ~~:2J
I
I I
I CNI I
.1--;-- I I
6 I I
I
I
I I
I I
L__ j

A B c 0
- 70 .~
11-2. Mechanical Parts List
Ref. Parts No. Description Ref. Parts No. Oeser ipt ion
No. No.

1 610-5862 ASSY TOP CASE SATURN EUR [1] 54 601-7815 STAELE PROTECTION SHEET SAT
1 610-5927 ASSY TOP CASE SATURN AUS [2]
1-1 610-5864 ASSY LID CD SATURN EUR
1-2 253-7015 TOP CASE SATURN EUR
1-3 253-7013 LID CRTG SATURN USA
1-4 253-6917-03 BUTTON OPEN SATURN USA
1-5 253-6919-03 BUTTON RESET SATURN USA
1-6 253-6920 BUTTON OPEN LEVER SATURN JPN
1-7 253-7012 MOUNT POWER UNIT PCB SAT USA
1-8 253-7010 PANEL DEC. FRONT SATURN USA
1-11 601-7774 OIL DUMPER SATURN
1-12 250-5404 BRACKET LEVER SATURN JPN
1-13 250-5423 BRACKET LID CD SPRING SAT USA
1-14 250-5424A BRACKET LID CD HOLDER SAT USA A
1-17 125-5125 SPRING LID CD SATURN JPN
1-18 125-5126 SPRING LID CRTG SATURN JPN
1-19 125-5127 SPRING ARM SATURN JPN
1-20 510-5068 DETECTOR SW SPPB11
1-21 600-6536 WIRE HARN 2P FOR DETECTOR USA
1-22 601-7726 PLATE SEVER SMALL SATURN JPN
2 610-5863 ASSY BOTTOM CASE SATURN USA
2-1 253-7016 BOTTOM CASE SATURN EUR
2-2 601-7658 RUBBER FOOT SATURN JPN
3 837-11492 ASSY IC BD SATURN VAO PAL
5 838-10834 IC BD SATURN SH1
6 610-5679-20 ASSY CD DRIVE UNIT SATURN
6 610-5679-21
7 400-5271 AC POWER UNIT SATURN EUR
7 400-5272 AC POWER UNIT SATURN EUR
e,.7-1 601-7672 INLET FOR UL/CSA SATURN
e,.7-2 514-5066 FUSE 1.6A 080026
10 253-6915-03 LID BATTERY SATURN EUR
11 253-6918-03 BUTTON POWER SATURN USA
11 253-6918A-03 BUTTON POWER SATURN USA A
12 253-6921 MOUNT MECHA SATURN JPN
13 253-6932 SLIDE RAIL SATURN JPN
14 510-5069 POWER SW SDDLD
15 601-7979 PLATE SEVER LARGE SATURN USA
16 600-6416 WIRE HARN 5P FOR ST CD
17 600-6560 WIRE HARN 2P FOR P.SW NEW
18 600-6431 FFC 20P L=180w.l
18 600-6431-01 FFC 20P L=180w.l
21 270-5094 FERRITE CORE BP53RB120070060M
21 270-5095 FERRITE CORE L6 T12.5X5.5X7
38 250-5417 BRACKET 9P CONN HOLDER
39 253-6922 BAT HOLDER SATURN MATSUSHITA
40 029-000034 B-TITE SCR PH 3X8
41 029-000034-0B B-TITE SCR PH BLK 3X8
42 029-000035 B-TITE SCR PH 3X10
43 029-000035-0B B-TITE SCR PH BLK 3X10
44 029-000036 8-TITE SCR PH 3X12
45 029-000049 B-TITE SCR BRH 2.6X8
46 029-000061 B-TITE SCR PH 3X14
47 029-000063 S-TITE SCR Bl H2X4
48 029-000049 B-TITE SCR BRH 2.6X8
49 029-000049-0B B-TITE SCR BRH BLK 2.6X8
50 029-000052 B-TITE SCR PH 2X8
51 029-000067-0B B-TITE SCR BRH BLK 2.6X6
52 029-000064 S-TITE SCR PH 2X8
53 401-0054 BATTERY CR2032/1F
[Note] (1]EUR [2]AUSTRALIA
-71-
11 =3. Electrical Parts List ..
Circuit Description Circuit Parts No. Description
Parts No. No.
No.
11-3-1. IC BD STATURN MAIN VAO USA IC31 315-0985-70 IC UPD424260LE-70-E2 SOJ NEC
IC31 315-0986-70 IC TC514260BJ-70 SOJ TOSHIBA
!Cl 315-0922A IC HD6417095F28 OFP H!TACH! IC31 315-0983-70 IC KM416C256BJ-7 SOJ SUMSUNG
!Cl 315-0998 IC HD6417095SF28 OFP HITACHI IC31 315-0984-70 IC M8814260-70PJ-G SOJ FUJITSU
IC31 315-1030-70 IC HY514260BJC-70 SOJ HYUNDAI
IC2 315-0922A IC HD6417095F28 OFP HITACHI
IC2 315-0998 IC HD6417095SF28 OFP HITACHI IC32 315-0947-70 IC HM514260AJ-7 SOJ
IC32 315-0985-70 IC UPD424260LE-70-E2 SOJ NEC
IC3 315-0928-17 IC HM5241605TT-17 TSOP HITACHI IC32 315-0986-70 IC TC514260BJ-70 SOJ TOSHIBA
IC3 315-1022-12 IC UPD4504161G5-Al2 TSOP NEC IC32 315-0983-70 IC KM416C256BJ-7 SOJ SUMSUNG
IC3 315-0928-15 IC HM5241605TT-15 TSOP HITACHI IC32 315-0984-70 IC MB814260-70PJ-G SOJ FUJITSU
IC32 315-1030-70 IC HY514260BJC-70 SOJ HYUNDAI
IC4 315-0928-17 IC HM5241605TT-17 TSOP HITACHI
IC4 315-1022-12 IC UPD4504161G5-A12 TSOP NEC IC33 314-0634 IC 74HC157 SOP
IC4 315-0928-15 IC HM5241605TT-15 TSOP HITACHI
IC34 313-5323 IC UPC78L05T CHIP NEC
IC5 315-5688 IC CUSTOM CHIP SCU OFP YAMAHA IC34 313-5323-01 IC TA78L05F CHIP TOSHIBA
IC6 315-5778 IC CUSTOM CHIP DCC OFP TOSHIBA
IC35 313-5328 IC S-80723AN-DL CHIP SEIKO
IC7 EPR-17933 OS SATURN IPL-ROM PAL DIP
IC7 MPR-17933 OS SATURN IPL-ROM PAL DIP CN1 209-5070 EDGE CONN 134P N630-9523-T006
CN1 209-5070A EDGE CONN 134P N630-9523-T006A
IC8 315-0948-10 IC CXK58267AM-10L SOP
IC8 315-0930-10 IC UPD43257B-10LL SOP CN2 209-5074 CONN 9P*2 CSS5018-0101R
ICB 315-0964-10 IC M5M5255BFP-12LL SOP CN2XA NOT USED NOT USED
ICB 315-0965-10 IC SRM20257LLM10 SOP CN2XB NOT USED NOT USED
IC8 315-1002-70 IC UM62257M-70LL SOP
CN3 212-5453 CONN 6P B5P6-VH
IC9 315-5744 IC CUSTOM CHIP SMPC QFP CN4 212-5440 CONN lOOP FX6A-100S-0.8SV2
IClO 315-5689 IC CUSTOM CHIP VDP1 QFP CN5 212-5431 MINI DIN CONN lOP FOR A/V HOSI
IC10 315-5883 IC CUSTOM CHIP VDPl S OFP CN5 212-5481 MINI DIN lOP TCS7716-432010
CN5X NOT USED NOT USED
ICll 315-0928-17 IC HM5241605TT-17 TSOP HITACHI
IC11 315-1022-12 IC UPD4504161G5-A12 TSOP NEC CN6 209-5075 CONN liP TCX3072-010100 HOSHID
IC11 315-0928-15 IC HM5241605TT-15 TSOP HITACHI CNB 212-5454 CONN 5P B4(5)B-PH-K-S
CN9 212-5454 CONN 5P B4(5)B-PH-K-S
IC12 315-0910-12 IC UPD4502161G5-A12 TSOP NEC CNlO NOT USED NOT USED
IC12 315-1017-17 IC HM5221605TT-17 TSOP HITACHI CNll NOT USED NOT USED
IC12 315-1012-17 IC LC382161T-17 TSOP SANYO
CN12 212-5457 CONN 3P SJ21-03WT
IC13 315-0910-12 IC UPD4502161G5-A12 TSOP NEC
IC13 315-1017-17 IC HM5221605TT-17 TSOP HITACHI Sl3 510-5063 TACT SYI SKEYAC ALPS
IC13 315-1012-17 IC LC382161T-17 TSOP SANYO
Dl 481-5072 DIODE CHIP 1SS184 TOSHIBA
IC14 315-5690 IC CUSTOM CHIP VDP2 OFP YAMAHA
IC14 315-5690-02 IC CUSTOM CHIP VDP2 OFP HH D2 481-5168 DIODE CHIP HRYI0202A HITACHI
IC14 315-5890 IC CUSTOM CP VDP2 S OFP YAMAHA D2 481-5199 DIODE CHIP 1SS377 TOSHOBA
D2 481-5201 DIODE CHIP RB415D ROHM
IC15 315-0910-12 IC UPD4502161G5-A12 TSOP NEC
IC15 315-1017-17 IC HM5221605TT-17 TSOP HITACHI D3 481-5168 DIODE CHIP HRW0202A HITACHI
IC15 315-1012-17 IC LC382161T-17 TSOP SANYO D3 481-5199 DIODE CHIP 1SS377 TOSHIBA
D3 481-5201 DIODE CHIP RB415D ROHM
IC16 315-0910-12 IC UPD4502161G5-A12 TSOP NEC
IC16 315-1017-17 IC HM5221605TT-17 TSOP HITACHI D4 481-5072 DIODE CHIP 1SS184 TOSHIBA
IC16 315-1012-17 IC LC38161T-17 TSOP SANYO D5 481-5179 DIODE CHIP MA153A MATSUSHITA
IC17 315-5687 IC CUSTOM CHIP SCSP QFP YAMAHA 06 481-5168 DIODE CHIP HRW0202A HITACHI
IC18 315-0941 IC MC68ECOOOFN12 PLCC MOTOROLA D6 481-5199 DIODE CHIP 1SS377 TOSHIBA
06 481-5201 DIODE CHIP RB415D ROHM
IC19 315-0777-80 IC HM514270AJ-8 SOJ HITACHI
IC19 315-0739-70 IC UPD424270LE-70 SOJ NEC TR1 482-5126 XSTR 2SC1623 L5 .. 7 CHIP NEC
IC19 315-0777-70 IC HM514270AJ-7 SOJ HITACHI TR2 482-5125-01 XSTR 2SA812 CHIP M5.. 6 NEC
IC19 315-0822-80 IC MN414270SJ-08 SOJ PANASONIC TR3 482-5260 XSTR 2SD2114K(V.W)CHIP ROHM
TR4 482-5260 XSTR 2SD2114K(V.YI)CHIP ROHM
IC20 315-5746 IC CUSTOM CHIP PLL HOFP
IC21 313-5314 IC CXAI645M SOP SONY L1 180-5137 CHIP INDUCTOR 100UH 10~ KOA
IC22 313-5313 IC TDA1386T SOP PHI Ll PS L1 180-5137-01 P.COIL CHIP 100UH ELJFA101KF
IC23 314-0632 IC 74VHC04 SOP 300MIL
IC24 314-0632 IC 74VHC04 SOP 300MIL L2 180-5137 CHIP INDUCTOR 100UH 10~ KOA
L2 180-5137-01 P.COIL CHIP 100UH ELJFA101KF
II"?~':
'"'""" 313-5322 IC S=80741AL=A5 CHIP SEIKO
IC26 314-0563 IC 74LS245 SOP 300MIL L3 180-5142 P.COIL CHIP IOOUH LOH3C101K04
IC27 314-0563 IC 74LS245 SOP 300MIL L3 180-5142-01 P.COIL CHIP lOOUH NLFC322522T
IC28 314-0649 IC 74ACT245 SOP 300MIL
IC29 314-0563 IC 74LS245 SOP 300MIL L4 180-5142 P.COIL CHIP 100UH LOH3C101K04
L4 180-5142-01 P.COIL CHIP 100UH NLFC322522T
IC30 314-0563 IC 74LS245 SOP 300MIL