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A B C D E

Calado Block Diagram Project code: 91.4X401.001


PCB P/N : 07227
REVISION : -1
4 Mobile CPU SYSTEM DC/DC 4
TPS51120 33
CLK GEN. 3 Merom 479 G792 PCB STACKUP INPUTS OUTPUTS
RTM875T-605 71.00875.C0W
(ICS 9LPRS502 71.09502.B0W)
Celeron M 20
2.0G : 71.MEROM.A0U TOP
5V_S5(6A)
2.33G : 71.MEROM.B0U DCBATOUT
4, 5 VCC 3D3V_S5(6A)

HOST BUS 667/800MHz@1.05V S

DDR2 S SYSTEM DC/DC


533/667MHz SVIDEO/COMP TPS51124 34
533/667 MHz Intel GM965/GL960 TVOUT 15 GND
AGTL+ CPU I/F INPUTS OUTPUTS
12,13 LVDS 14" WXGA BOTTOM
DDR Memory I/F
LCD 14 DCBATOUT
1D05V_S0(8A)
INTEGRATED GRAHPICS
DDR2 533/667MHz LVDS, CRT I/F RGB CRT
1D8V_S3(12A)

CRT 15
3 533/667 MHz 71.GL960.00U, SLA5V 6,7,8,9,10,11 GM965 : KI.96501.008 TPS51100(G2997) 35 3
12,13 DDR_VREF_S0
X4 DMI GL960 :KI.96501.010 1D8V_S3
C-Link0 (1.5A)
400MHz DDR_VREF_S3

GIGA LAN TXFM RJ45 APL5913 35


Codec AZALIA BCM5787MKMLG 23 23
ALC268 ICH8M 22 1D8V_S3 1D25V_S0
(1.5A)

MIC In 26 6 PCIe ports G909 28


PCI/PCI BRIDGE Mini Card
abgn/bg 24 5V_AUX_S5 3D3V_AUX_S5
25 ACPI 1.1 (100mA)

INT.MIC(Digital) 3 SATA
PCIex1 PWR SW APL5915 35
1 PATA 66/100
10 USB 2.0/1.1 ports
New card
24 P2231NFC
24 1D8V_S3 1D5V_S0
25 OP AMP ETHERNET (10/100/1000MbE)
(1.5A)

APA203127 High Definition Audio CHARGER


2 MAX8731 36 2
INT.SPKR LPC I/F LPC BUS
Serial Peripheral I/F INPUTS OUTPUTS
OP AMP Matrix Storage Technology(DO)
G1412 CHG_PWR
27
Active Managemnet Technology(DO)
KBC SPI I/F BIOS LPC 18V 4.0A
Line Out Winbond W25X80-VSS DCBATOUT
DEBUG UP+5V
WPC8763L 29 5V 100mA
(No-SPDIF) 28 CONN. 36
MODEM 71.ICH8M.C0U, SLA5Q, B3 CPU DC/DC
RJ1122 MDC Card ICH8 : 71.80101.024 16,17,18,19 MAX8770
21 Touch INT. 32
PWR BD
USB
SATA

PATA

Pad 29 KB 29 07563 INPUTS OUTPUTS

DCBATOUT
VCC_CORE_S0
0~1.3V
47A
1 HDD CDROM USB USB 5in1 BT <Core Design>
1
21 21 3 PORT 25
21
Cardreader 24 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

RTS5158 Title

BLOCK DIAGRAM
Size Document Number Rev
A3
Calado -1
Date: Thursday, September 13, 2007 Sheet 1 of 39
A B C D E
ICH8M Functional Strap Definitions
ICH8-M EDS 21762 2.0V1 page 16
ICH8M Integrated Pull-up Crestline Strapping Signals and
Signal Usage/When Sampled Comment and Pull-down Resistors Configuration Crestline EDS 20954
page 7
1.0
ICH8-M EDS 21762 2.0V1
HDA_SDOUT XOR Chain Entrance/ Allows entrance to XOR Chain testing when TP3 Pin Name Strap Description Configuration
PCIE Port Config1 bit1, pulled low.When TP3 not pulled low at rising edge
Rising Edge of PWROK of PWROK,sets bit1 of RPC.PC(Config Registers: SIGNAL Resistor Type/Value CFG[2:0] FSB Frequency Select 001 = FSB533
offset 224h) HDA_BIT_CLK PULL-DOWN 20K 011 = FSB667
010 = FSB800
HDA_RST# NONE others = Reserved
4 HDA_SYNC PCIE config1 bit0, This signal has a weak internal pull-down.
Sets bit0 of RPC.PC(Config Registers:Offset 224h) CFG[4:3] Reserved
4
Rising Edge of PWROK. HDA_SDIN[3:0] PULL-DOWN 20K
GNT2# PCIE config2 bit0, This signal has a weak internal pull-up. HDA_SDOUT PULL-DOWN 20K CFG5 DMI x2 Select 0 = DMI x2
Rising Edge of PWROK. Sets bit2 of RPC.PC2(Config Registers:Offset 0224h) 1 = DMI x4 (Default)
HDA_SYNC PULL-DOWN 20K CFG[8:6] Reserved
GPIO20 Reserved This signal should not be pulled high.
GNT[3:0] PULL-UP 20K 0 = Normal mode
GNT1#/ ESI Strap (Server Only) ESI compatible mode is for server platforms only. Low Power PCI Express 1 = Low Power mode (Default)
GPIO51 Rising Edge of PWROK This signal should not be pulled low for desttop GPIO[20] PULL-DOWN 20K ?
and mobile. 0 = Reverse Lanes,15->0,14->1 ect..
LDA[3:0]#/FHW[3:0]# PULL-UP 20K CFG9 PCI Express Graphics 1= Normal operation(Default):Lane
Lane Reversal Numbered in order
Top-Block Sampled low:Top-Block Swap mode(inverts A16 for LAN_RXD[2:0] PULL-UP 10K
GNT3# Swap Override. all cycles targeting FWH BIOS space).
Rising Edge of PWROK. Note: Software will not be able to clear the LDRQ[0] PULL-UP 20K CFG[11:10] Reserved
Top-Swap bit until the system is rebooted XOR/ALL Z test 00 = Reserved
without GNT3# being pulled down. LDRQ[1]/GPIO23 PULL-UP 20K
CFG[13:12] straps 01 = XOR mode enabled
PME# PULL-UP 20K 10 = All Z mode enabled
GNT0#/ Boot BIOS Destination Controllable via Boot BIOS Destination bit 11 = Normal Operation (Default)
SPI_CS1# Selection. (Config Registers:Offset 3410h:bit 11:10). PWRBTN# PULL-UP 20K
Rising Edge of PWROK. GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC. CFG[15:14] Reserved Reserved
SATALED# PULL-UP 15K
Integrated VccSus1_05, Enables integrated VccSus1_05, VccSus1_5 and CFG16 FSB Dynamic ODT 0 = Dynamic ODT Disabled
INTVRMEN VccSus1_5 and VccCL1_5 VccCL1_5 VRM's when sampled high SPI_CS1# PULL-UP 20K 1 = Dynamic ODT Enabled (Default)
VRM Enable/Disable.
Always sampled. SPI_CLK PULL-UP 20K
CFG[18:17] Reserved
3 Integrated VccLAN1_05 Enables integrated VccLAN1_05 and VccCL1_05 VRM's
SPI_MOSI PULL-UP 20K
0 = Normal operation (Default):lane 3
LAN100_SLP and VccCL1_05 VRM when sampled high SPI_MISO PULL-UP 20K CFG19 DMI Lane Reversal Numbered in order
Enable/Disable.
Always sampled. TACH_[3:0] PULL-UP 20K ? 1 =Reverse Lane,4->0,3->1 ect...

SPKR PULL-DOWN 20K 0 = Only SDVO or PCIE x1 is


PCI Express Lane Signal has weak internal pull-up. Sets bit 27 CFG20 SDVO/PCIE operational (Default)
SATALED# Reversal. Rising Edge of MPC.LR(Device 28:Function 0:Offset D8) TP[3] PULL-UP 20K Concurrent 1 =SDVO and PCIE x1 are operating
of PWROK. simultaneously via the PEG port
USB[9:0][P,N] PULL-DOWN 15K
SPKR No Reboot. If sampled high, the system is strapped to the SDVOCRTL SDVO Present 0 = No SDVO Card present (Default)
Rising Edge of PWROK. "No Reboot" mode(ICH8 will disable the TCO Timer CL_RST# PULL-UP 13K _DATA
system reboot feature). The status is readable 1= SDVO Card present
via the NO REBOOT bit.
NOTE: All strap signals are sampled with respect to the leading
TP3 XOR Chain Entrance. This signal should not be pull low unless using edge of the Crestline GMCH PWORK in signal.
Rising Edge of PWROK. XOR Chain testing.

GPIO33/ Flash Descriptor This signal has a weak internal pull-up.


History
HDA_DOCK Security Override Strap Sampled low:the Flash Descriptor Security will be
_EN# Rising Edge of PWROK overridden. If high,the security measures will be
in effect.This should only be used in manufacturing
environments.

2 2
ICH8M IDE Integrated Series
Termination Resistors
DD[15:0], DIOW#, DIOR#, DREQ,
approximately 33 ohm
DDACK#, IORDY, DA[2:0], DCS1#,
DCS3#, IDEIRQ

USB Table
PCIE Routing USB
LANE1 LAN Marvell Pair Device
LANE2 MiniCard WLAN 0 USB1
LANE3 NewCard WLAN 1 NC
2 USB2
3 NC
1 <Core Design>
1
4 USB3
5 BT Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
6 Cardreader Taipei Hsien 221, Taiwan, R.O.C.

7 MINICARD Title

8 CCD Reference
Size Document Number Rev
A3
9 NEW1
Volvi2 -1
Date: Monday, September 10, 2007 Sheet 2 of 39
A B C D E

3D3V_S0
3D3V_S0 R339
3D3V_S0 R71 0R0603-PAD
0R0603-PAD 0R0603-PAD 3D3V_CLKGEN_S0 1 2
1 2 3D3V_48MPWR_S0 3D3V_CLKPLL_S0 1 2

1
R72 C507

1
C223 C218 C493 DY C490 C496 C506 C500
DY C495 C498 C492 C491 C488 SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

2
SC4D7U6D3V3KX-GP SCD1U16V2ZY-2GP SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

2
SC1U16V3ZY-GP

4 4
3D3V_S0
U15

3D3V_CLKGEN_S0 2 55
VDDPCI SDATA SMBD_ICH 12,19
2

2
3D3V_48MPWR_S0 9 56
DY DY DY 16
VDD48 SCLK SMBC_ICH 12,19
R334 R336 R325 R321 VDD
53 VDDREF
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP DOTT_96/SRCCLKT0 13 DREFCLK 7
31 14 DREFCLK# 7
1

1
VDDSRC DOTC_96/SRCCLKC0
47 VDDCPU
PCLKCLK2 17 CLK_PCIE_NEW 24
PCLKCLK3 3D3V_CLKPLL_S0 SRCCLKT1/SE1
12 VDD96I/O SRCCLKC1/SE2 18 CLK_PCIE_NEW# 24
PCLKCLK4 20
PCLKCLK5 VDDPLL3I/O
26 VDDSRCI/O SRCCLKT2/SATACLKT 21 CLK_PCIE_SATA 16
37 VDDSRCI/O SRCCLKC2/SATACLKC 22 CLK_PCIE_SATA# 16
41 VDDCPUI/O
2

2
24
DY RTM TPAD30 TP142 PCLKCLK0 1
SRCCLKT3/CR#_C
25
CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7
R331 R333 R322 R326 PCICLK0/CR#_A SRCCLKC3/CR#_D
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP TPAD30 TP141 PCLKCLK1 3 27 CLK_PCIE_MINI1 24
PCICLK1/CR#_B SRCCLKT4
28 CLK_PCIE_MINI1# 24
1

TPAD30 TP169 PCLKCLK2 SRCCLKC4


4 PCICLK2/LTE
PCI_STOP#/SRCCLKT5 30 PM_STPPCI# 17
PCLKCLK3 5 29 PM_STPCPU# 17
PCICLK3 CPU_STOP#/SRCCLKC5
CL=20pF0.2pF 28 PCLK_KBC R320 2 1 22R2J-2-GP PCLKCLK4 6 33 CLK_PCIE_ICH 17
PCICLK4/SRC5_EN SRCCLKT6
SRCCLKC6 32 CLK_PCIE_ICH# 17
C236 17 PCLK_ICH R323 2 1 22R2J-2-GP PCLKCLK5 7
3 SC27P50V2JN-2-GP PCI_F5/ITP_EN 3
SRCCLKT7/CR#_F 36 DREFSSCLK 7
1 2 GEN_XTAL_IN R91 2 DY 1 10MR2J-L-GP 51 35 DREFSSCLK# 7
R90 X2 SRCCLKC7/CR#_E
1 2 0R0402-PAD GEN_XTAL_OUT 52 X1
1

X4 39 CLK_PCIE_LAN 22
X-14D31818M-44GP 17 R327 2 CPUCLKT2_ITP/SRCCLKT8
CLK48_ICH 1 22R2J-2-GP CLK48 10 USB_48MHZ/FSLA CPUCLKC2_ITP/SRCCLKC8 38 CLK_PCIE_LAN# 22
82.30005.951 4,7 CPU_SEL0 R324 2 1 2K2R2J-2-GP
4,7 CPU_SEL1 49 43 CLK_MCH_BCLK 6
2

GEN_XTAL_OUT_R FSLB/TEST_MODE CPUCLKT1


1 2 CPUCLKC1 42 CLK_MCH_BCLK# 6
4,7 CPU_SEL2 R332 2 1 2K2R2J-2-GP CPU_SEL2_R 54
C235 FSLC/TEST_SEL/REF0
CPUCLKT0 46 CLK_CPU_BCLK 4
SC27P50V2JN-2-GP 17 CLK_ICH14 R335 2 1 22R2J-2-GP 8 45 CLK_CPU_BCLK# 4
GNDPCI CPUCLKC0
11 GND48
15 GND
19 48 3D3V_CLKGEN_S0
GND CK_PWRGD/PD# CLK_PWRGD 17
23 GNDSRC
34 40 R330
GNDSRC NC#40
44 GNDCPU 1 DY 2
50 GNDREF 10KR2J-3-GP

ICS9LPRS502PGLFT-GP
71.09502.B0W
RTM:71.00875.C0W

PCLK_KBC 1 2 EC105
DY SC22P50V3JN-GP
2 CLK48_ICH 2
1 2 EC106
DY SC22P50V3JN-GP

EMI capacitor

ICS9LPR502HGLFT-GP setting table RTM875T-605 setting table


PIN NAME DESCRIPTION PIN NAME DESCRIPTION
Byte 5, bit 7 Byte 5, bit 7
0 = PCI0 enabled (default) 0 = PCI0 enabled (default) SEL2 SEL1 SEL0
1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair 1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair CPU FSB
PCI0/CR#_A Byte 5, bit 6 PCI0/CR#_A Byte 5, bit 6 FSC FSB FSA
0 = CR#_A controls SRC0 pair (default), 0 = CR#_A controls SRC0 pair (default),
1= CR#_A controls SRC2 pair 1= CR#_A controls SRC2 pair
1 0 1 100M X
Byte 5, bit 5 Byte 5, bit 5
0 = PCI1 enabled (default) 0 = PCI1 enabled (default) 0 0 1 133M X
1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair 1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair
PCI1/CR#_B Byte 5, bit 4 PCI1/CR#_B Byte 5, bit 4 0 1 1 166M 667M
0 = CR#_B controls SRC1 pair (default) 0 = CR#_B controls SRC1 pair (default)
1= CR#_B controls SRC4 pair 1= CR#_B controls SRC4 pair 0 1 0 200M 800M
1 <Core Design> 1
0 = Overclocking of CPU and SRC Allowed 0 = Overclocking of CPU and SRC Allowed
PCI2/TME 1 = Overclocking of CPU and SRC NOT allowed PCI2/TME 1 = Overclocking of CPU and SRC NOT allowed

0 = Pin29 as CPU_STOP# , pin 30 as PCI_STOP#. Wistron Corporation


PCI3/SRC-5_EN 1 = Pins29,30 as SRC-5 differential pair. 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
0 = Pin29 as CPU_STOP# , pin 30 as PCI_STOP#. 0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96#
PCI4/SRC5_EN 1 = Pins29,30 as SRC-5 differential pair. PCI4/27M_SEL 1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0# Title

0 =SRC8/SRC8# 0 =SRC8/SRC8# Clock Generator


PCI_F5/ITP_EN 1 = ITP/ITP# PCI_F5/ITP_EN 1 = ITP/ITP# Size Document Number Rev
Calado -1
Date: Wednesday, September 12, 2007 Sheet 3 of 39
A B C D E
A B C D E

H_A#[35..3]
6 H_A#[35..3]
H_DINV#[3..0]
H_DINV#[3..0] 6
U44A 1 OF 4 TP35 TPAD30 H_DSTBN#[3..0]
H_DSTBN#[3..0] 6
H_A#3 J4 H1 1D05V_S0 H_DSTBP#[3..0]
A3# ADS# H_ADS# 6 H_DSTBP#[3..0] 6
H_A#4 L5 E2 H_BNR# 6
H_A#5 A4# BNR# H_D#[63..0]
4 L4 A5# BPRI# G5 H_BPRI# 6 H_D#[63..0] 6 4

ADDR GROUP 0
H_A#6 K5 A6#

1
H_A#7 M3 H5 H_DEFER# 6
H_A#8 A7# DEFER# R34
N2 F21

CONTROL
A8# DRDY# H_DRDY# 6
H_A#9 J1 E1 56R2J-4-GP
A9# DBSY# H_DBSY# 6
H_A#10 N3
H_A#11 A10#
P5 F1 H_BREQ#0 6

2
H_A#12 A11# BR0# Place testpoint on
P2 A12#
H_A#13 L2 D20 H_IERR# H_IERR# with a GND
H_A#14 A13# IERR# 0.1" away
P4 A14# INIT# B3 H_INIT# 16
H_A#15 P1
H_A#16 A15#
R1 A16# LOCK# H4 H_LOCK# 6
M1 H_CPURST# 6,38 U44B 2 OF 4
6 H_ADSTB#0 ADSTB0#
6 H_REQ#[4..0] RESET# C1 H_RS#[2..0] 6
H_REQ#0 K3 F3 H_RS#0 H_D#0 E22 Y22 H_D#32
H_REQ#1 H2 REQ0# RS0# H_RS#1 H_D#1 D0# D32# H_D#33
REQ1# RS1# F4 F24 D1# D33# AB24
H_REQ#2 K2 G3 H_RS#2 H_D#2 E26 V24 H_D#34
H_REQ#3 J3 REQ2# RS2# H_D#3 D2# D34# H_D#35
REQ3# TRDY# G2 H_TRDY# 6 G22 D3# D35# V26
H_REQ#4 L1 H_D#4 F23 V23 H_D#36
REQ4# D4# D36#

DATA GRP0
DATA GRP2
G6 H_HIT# 6 H_THERMDA H_D#5 G25 T22 H_D#37
H_A#17 HIT# H_D#6 D5# D37# H_D#38
Y2 A17# HITM# E4 H_HITM# 6 E25 D6# D38# U25

1
H_A#18 U5 H_D#7 E23 U23 H_D#39
H_A#19 A18# C443 H_D#8 D7# D39# H_D#40
R3 A19# BPM0# AD4 K24 D8# D40# Y25
H_A#20 W6 XDP/ITP SIGNALS AD3 SC2200P50V2KX-2GP H_D#9 G24 W22 H_D#41

2
A20# BPM1# D9# D41#
ADDR GROUP 1

H_A#21 U4 AD1 H_THERMDC H_D#10 J24 Y23 H_D#42


H_A#22 A21# BPM2# H_D#11 D10# D42# H_D#43
Y5 A22# BPM3# AC4 J23 D11# D43# W24
H_A#23 U1 AC2 H_D#12 H22 W25 H_D#44
H_A#24 A23# PRDY# XDP_BPM#5 TP72 TPAD30 H_D#13 D12# D44# H_D#45
R4 A24# PREQ# AC1 F26 D13# D45# AA23
H_A#25 T5 AC5 XDP_TCK TP65 TPAD30 H_D#14 K22 AA24 H_D#46
3 H_A#26 A25# TCK XDP_TDI TP61 TPAD30 1D05V_S0 H_D#15 D14# D46# H_D#47 3
T3 A26# TDI AA6 H23 D15# D47# AB25
H_A#27 W2 AB3 XDP_TDO TP70 TPAD30 J26 Y26 H_DSTBN#2 6
A27# TDO 6 H_DSTBN#0 DSTBN0# DSTBN2#
H_A#28 W5 AB5 XDP_TMS TP64 TPAD30 H26 AA26 H_DSTBP#2 6
A28# TMS 6 H_DSTBP#0 DSTBP0# DSTBP2#
H_A#29 Y4 AB6 XDP_TRST# TP62 TPAD30 H25 U22 H_DINV#2 6
A29# TRST# 6 H_DINV#0 DINV0# DINV2#

1
H_A#30 U2 C20 XDP_DBRESET# TP37 TPAD30
H_A#31 A30# DBR#
V4 A31#
H_A#32 W3 R33 H_D#16 N22 AE24 H_D#48
H_A#33 A32# 56R2J-4-GP H_D#17 K25 D16# D48# H_D#49
AA4 A33# THERMAL D17# D49# AD24
H_A#34 AB2 H_D#18 P26 AA21 H_D#50

2
H_A#35 A34# CPU_PROCHOT#_R H_D#19 R23 D18# D50# H_D#51
AA3 A35# PROCHOT# D21 D19# D51# AB22
V1 A24 H_THERMDA 20 H_D#20 L23 AB21 H_D#52
6 H_ADSTB#1 ADSTB1# THRMDA D20# D52#
B25 H_THERMDC 20 H_D#21 M24 AC26 H_D#53
THRMDC D21# D53#

DATA GRP1
DATA GRP3
16 H_A20M# A6 H_D#22 L22 AD20 H_D#54
A20M# H_D#23 M23 D22# D54# H_D#55
16 H_FERR# A5 FERR# THERMTRIP# C7 PM_THRMTRIP-A# 7,16,30 D23# D55# AE22
ICH

16 H_IGNNE# C4 H_D#24 P25 AF23 H_D#56


IGNNE# H_D#25 P23 D24# D56# H_D#57
D25# D57# AC25
16 H_STPCLK# D5 H_D#26 P22 AE21 H_D#58
STPCLK# H_D#27 T24 D26# D58# H_D#59
16 H_INTR C6 LINT0 HCLK BCLK0 A22 CLK_CPU_BCLK 3 D27# D59# AD21
16 H_NMI B4 A21 CLK_CPU_BCLK# 3 H_D#28 R24 AC22 H_D#60
LINT1 BCLK1 H_D#29 L25 D28# D60# H_D#61
16 H_SMI# A3 SMI# D29# D61# AD23
PM_THRMTRIP# 1D05V_S0 H_D#30 T25 AF22 H_D#62
should connect to H_D#31 N25 D30# D62# H_D#63
M4 RSVD#M4 D31# D63# AC23

2
N5 ICH8 and MCH L26 AE25
RSVD#N5 6 H_DSTBN#1 DSTBN1# DSTBN3# H_DSTBN#3 6
T2 without T-ing R279 M26 AF24 H_DSTBP#3 6
RESERVED

RSVD#T2 ( No stub) Layout Note: 1KR2F-3-GP 6 H_DSTBP#1 DSTBP1# DSTBP3#


V3 RSVD#V3 6 H_DINV#1 N24 DINV1# DINV3# AC20 H_DINV#3 6
B2 "CPU_GTLREF0"
RSVD#B2 0.5" max length. CPU_GTLREF0 COMP0 R277 27D4R2F-L1-GP
C3 AD26 R26 1 2

1 1
RSVD#C3 GTLREF COMP0 COMP1 R278 54D9R2F-L1-GP
D2 RSVD#D2 C23 TEST1 MISC COMP1 U26 1 2
D22 D25 AA1 COMP2 R64 1 2 27D4R2F-L1-GP
2 RSVD#D22 R280 TEST2 COMP2 COMP3 R65 54D9R2F-L1-GP 2
D3 RSVD#D3 C24 TEST3 COMP3 Y1 1 2
F6 2KR2F-3-GP TPAD30 TP24 TEST4 AF26
RSVD#F6 TPAD30 TP77 TEST5 TEST4
AF1 TEST5 DPRSTP# E5 H_DPRSTP# 7,16,32
TPAD30 TP76 RSVD_CPU_B1 B1 TPAD30 TP23 TEST6 A26 B5 H_DPSLP# 16

2
KEY_NC TEST6 DPSLP#
DPWR# D24 H_DPWR# 6
BGA479-SKT6-GPU3 3,7 CPU_SEL0 B22 D6 H_PWRGD 16,30,38
BSEL0 PWRGOOD
62.10079.001 3,7 CPU_SEL1 B23 BSEL1 SLP# D7 H_CPUSLP# 6
3,7 CPU_SEL2 C21 BSEL2 PSI# AE6 PSI# 32
2nd source: 62.10053.401
1D05V_S0 BGA479-SKT6-GPU3

Layout Note:
Comp0, 2 connect with Zo=27.4 ohm, make
XDP_TMS R58 1 2 39R2F-GP trace length shorter than 0.5" .
Net "TEST4" as short as possible, Comp1, 3 connect with Zo=55 ohm, make
XDP_TDI R56 1 2 150R2F-1-GP trace length shorter than 0.5" .
make sure "TEST4" routing is
reference to GND and away other
noisy signals

1 <Core Design> 1

XDP_TCK R59 1 2 27D4R2F-L1-GP Wistron Corporation


21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
XDP_TRST# R57 1 2 649R2F-GP Taipei Hsien 221, Taiwan, R.O.C.

All place within 2" to CPU Title

CPU (1 of 2)
Size Document Number Rev

Calado -1
Date: Wednesday, September 12, 2007 Sheet 4 of 39
A B C D E
A B C D E

U44D 4 OF 4
VCC_CORE_S0
A4 VSS VSS P6
VCC_CORE_S0 VCC_CORE_S0 A8 P21
VSS VSS
4
VCC_CORE_S0
ENG A11 VSS VSS P24 4
U44C 3 OF 4 A14 R2
VSS VSS
A16 VSS VSS R5

1
A7 AB20 C122 C157 C155 C156 A19 R22
VCC VCC VSS VSS
A9 VCC VCC AB7 TC6 A23 VSS VSS R25

1
4
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
A10 AC7 960 960 960 DY TPAD30 TP69 CPU_AF2 AF2 T1

2
VCC VCC VSS VSS
A12 VCC VCC AC9 965 B6 VSS VSS T4
A13 VCC VCC AC12 B8 VSS VSS T23
A15 AC13 ST900U2D5VM-GP B11 T26
VCC VCC VSS VSS
A17 AC15 B13 U3

2
3
VCC VCC 77.E9071.001 VSS VSS
A18 VCC VCC AC17 B16 VSS VSS U6
A20 VCC VCC AC18 B19 VSS VSS U21
B7 VCC VCC AD7 B21 VSS VSS U24
B9 VCC VCC AD9 B24 VSS VSS V2
B10 VCC VCC AD10 C5 VSS VSS V5
B12 VCC VCC AD12 C8 VSS VSS V22
B14 VCC VCC AD14 C11 VSS VSS V25
B15 AD15 VCC_CORE_S0 C14 W1
VCC VCC VSS VSS
B17 VCC VCC AD17 C16 VSS VSS W4
B18 VCC VCC AD18 C19 VSS VSS W23
B20 VCC VCC AE9 C2 VSS VSS W26

1
C9 AE10 C163 C165 C178 C146 C149 C179 C126 C140 C21 C138 C133 C415 C168 C172 C22 Y3
VCC VCC VSS VSS
C10 VCC VCC AE12 960 960 960 960 960 960 C25 VSS VSS Y6

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP
C12 AE13 D1 Y21

2
VCC VCC VSS VSS
C13 VCC VCC AE15 DY DY DY DY DY DY DY DY D4 VSS VSS Y24
C15 VCC VCC AE17 D8 VSS VSS AA2
C17 VCC VCC AE18 D11 VSS VSS AA5
C18 VCC VCC AE20 D13 VSS VSS AA8
D9 VCC VCC AF9 D16 VSS VSS AA11
3 D10 AF10 D19 AA14 3
VCC VCC VSS VSS
D12 VCC VCC AF12 D23 VSS VSS AA16
D14 VCC VCC AF14 D26 VSS VSS AA19
D15 VCC VCC AF15 E3 VSS VSS AA22
D17 VCC VCC AF17 E6 VSS VSS AA25
D18 VCC VCC AF18 E8 VSS VSS AB1
E7 AF20 1D05V_S0 E11 AB4
VCC VCC VSS VSS
E9 VCC E14 VSS VSS AB8
E10 VCC VCCP G21 E16 VSS VSS AB11
E12 VCC VCCP V6 E19 VSS VSS AB13
E13 VCC VCCP J6 E21 VSS VSS AB16
E15 VCC VCCP K6 E24 VSS VSS AB19
1

E17 M6 C197 C194 F5 AB23


VCC VCCP SCD1U10V2KX-4GP VSS VSS
E18 VCC VCCP J21 F8 VSS VSS AB26
SCD1U10V2KX-4GP

E20 K21 F11 AC3


2

VCC VCCP 1D05V_S0 VSS VSS


F7 VCC VCCP M21 F13 VSS VSS AC6
F9 VCC VCCP N21 F16 VSS VSS AC8
F10 VCC VCCP N6 layout note: "1D5V_VCCA_S0" F19 VSS VSS AC11
F12 R21 F2 AC14
F14
VCC VCCP
R6 as short as possible F22
VSS VSS
AC16
VCC VCCP VSS VSS
F15 VCC VCCP T21 F25 VSS VSS AC19

1
F17 T6 C196 C98 C111 C92 C195 C99 G4 AC21
VCC VCCP 1D5V_VCCA_S0 1D5V_S0 VSS VSS
F18 VCC VCCP V21 G1 VSS VSS AC24

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
F20 W21 G23 AD2

2
VCC VCCP L19 VSS VSS
AA7 VCC G26 VSS VSS AD5
AA9 VCC VCCA B26 1 2 H3 VSS VSS AD8
AA10 C26 0R3-0-U-GP H6 AD11
VCC VCCA VSS VSS
1

AA12 VCC H21 VSS VSS AD13


AA13 AD6 H_VID0 32 VCC_CORE_S0 C433 C428 H24 AD16
VCC VID0 VSS VSS
SCD01U16V2KX-3GP

2 SC4D7U6D3V3KX-GP 2
AA15 AF5 H_VID1 32 J2 AD19
2

VCC VID1 VSS VSS


AA17 VCC VID2 AE5 H_VID2 32 J5 VSS VSS AD22
AA18 VCC VID3 AF4 H_VID3 32 J22 VSS VSS AD25
1

AA20 AE3 H_VID4 32 J25 AE1 CPU_AE1 TP78 TPAD30


VCC VID4 R52 VSS VSS
AB9 VCC VID5 AF3 H_VID5 32 K1 VSS VSS AE4
AC10 AE2 100R2F-L1-GP-U K4 AE8
VCC VID6 H_VID6 32 VSS VSS
AB10 VCC K23 VSS VSS AE11
AB12 K26 AE14
2

VCC VSS VSS


AB14 VCC VCCSENSE AF7 VCC_SENSE 32 L3 VSS VSS AE16
AB15 VCC L6 VSS VSS AE19
AB17 VCC L21 VSS VSS AE23
AB18 AE7 VSS_SENSE 32 L24 AE26 CPU_AE26 TP25 TPAD30
VCC VSSSENSE VSS VSS CPU_A2
M2 VSS VSS A2 TP71 TPAD30
1

Layout Note: M5 AF6


R53 VSS VSS
M22 VSS VSS AF8
BGA479-SKT6-GPU3 100R2F-L1-GP-U VCCSENSE and VSSSENSE lines M25 AF11
should be of equal length. VSS VSS
N1 VSS VSS AF13
N4 AF16
2

VSS VSS
N23 VSS VSS AF19
Layout Note: N26 AF21
Provide a test point (with VSS VSS CPU_A25
P3 VSS VSS A25 TP30 TPAD30
no stub) to connect a AF25 CPU_AF25
VSS TP29 TPAD30
differential probe
between VCCSENSE and
VSSSENSE at the location BGA479-SKT6-GPU3
where the two 54.9ohm
resistors terminate the
55 ohm transmission line.
1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (2 of 2)
Size Document Number Rev

Calado -1
Date: Wednesday, September 12, 2007 Sheet 5 of 39
A B C D E
A B C D E

U43A 1 OF 10
H_D#[63..0] H_A#[35..3]
4 H_D#[63..0] H_A#[35..3] 4
H_D#0 E2 J13 H_A#3
H_D#1 H_D#0 H_A#3 H_A#4
G2 H_D#1 H_A#4 B11
4 H_D#2 G7 C11 H_A#5 4
H_D#3 H_D#2 H_A#5 H_A#6
M6 H_D#3 H_A#6 M11
H_D#4 H7 C15 H_A#7
1D05V_S0 H_D#5 H_D#4 H_A#7 H_A#8
H_SWING routing Trace width and H3 H_D#5 H_A#8 F16
H_D#6 G4 L13 H_A#9
Spacing use 10 / 20 mil H_D#6 H_A#9

1
H_D#7 F3 G17 H_A#10
R285 H_D#8 H_D#7 H_A#10 H_A#11
N8 H_D#8 H_A#11 C14
221R2F-2-GP H_D#9 H2 K16 H_A#12
H_D#10 H_D#9 H_A#12 H_A#13
H_SWING Resistors and M10 H_D#10 H_A#13 B13
H_D#11 N12 L16 H_A#14

2
Capacitors close MCH H_D#12 N9
H_D#11 H_A#14
J17 H_A#15
H_SWING H_D#13 H_D#12 H_A#15 H_A#16
500 mil ( MAX ) H5 H_D#13 H_A#16 B14
H_D#14 P13 K19 H_A#17
H_D#14 H_A#17

1
H_D#15 K9 P15 H_A#18
H_D#15 H_A#18
1

R284 H_D#16 M2 R17 H_A#19


C437 100R2F-L1-GP-U H_D#17 H_D#16 H_A#19 H_A#20
W10 H_D#17 H_A#20 B16
SCD1U10V2KX-4GP H_D#18 Y8 H20 H_A#21
2

H_D#19 H_D#18 H_A#21 H_A#22


V4 L19

2
H_D#20 H_D#19 H_A#22 H_A#23
M3 H_D#20 H_A#23 D17
H_D#21 J1 M17 H_A#24
H_D#22 H_D#21 H_A#24 H_A#25
N5 H_D#22 H_A#25 N16
H_D#23 N3 J19 H_A#26
H_D#24 H_D#23 H_A#26 H_A#27
W6 H_D#24 H_A#27 B18
H_D#25 W9 E19 H_A#28
H_D#26 H_D#25 H_A#28 H_A#29
H_SCOMP and H_SCOMP# Resistors and N2 H_D#26 H_A#29 B17
H_D#27 Y7 B15 H_A#30
Capacitors close MCH 500 mil ( MAX ) H_D#28 Y9
H_D#27 H_A#30
E17 H_A#31
H_D#29 H_D#28 H_A#31 H_A#32
P4 H_D#29 H_A#32 C18
H_D#30 W3 A19 H_A#33
3 H_D#31 H_D#30 H_A#33 H_A#34 3
N1 H_D#31 H_A#34 B19
H_D#32 AD12 N19 H_A#35
1D05V_S0 H_D#33 H_D#32 H_A#35
AE3 H_D#33
H_D#34 AD9 G12

HOST
H_D#34 H_ADS# H_ADS# 4
1 2 H_SCOMP H_D#35 AC9 H_D#35 H_ADSTB#0 H17 H_ADSTB#0 4
R276 54D9R2F-L1-GP H_D#36 AC7 G20
H_D#36 H_ADSTB#1 H_ADSTB#1 4
1D05V_S0 H_D#37 AC14 C8 H_BNR# 4
H_D#38 H_D#37 H_BNR#
AD11 H_D#38 H_BPRI# E8 H_BPRI# 4
1 2 H_SCOMP# H_D#39 AC11 H_D#39 H_BREQ# F12 H_BREQ#0 4
R275 54D9R2F-L1-GP H_D#40 AB2 D6
H_D#40 H_DEFER# H_DEFER# 4
H_D#41 AD7 C10 H_DBSY# 4
H_D#42 H_D#41 H_DBSY#
AB1 H_D#42 HPLL_CLK AM5 CLK_MCH_BCLK 3
H_D#43 Y3 AM7 CLK_MCH_BCLK# 3
H_D#44 H_D#43 HPLL_CLK#
AC6 H_D#44 H_DPWR# H8 H_DPWR# 4
H_RCOMP routing Trace width and H_D#45 AE2 K7 H_DRDY# 4
H_D#46 H_D#45 H_DRDY#
AC5 E4 H_HIT# 4
Spacing use 10 / 20 mil H_D#47 AG3
H_D#46 H_HIT#
C6 H_HITM# 4
H_D#48 H_D#47 H_HITM#
AJ9 H_D#48 H_LOCK# G10 H_LOCK# 4
H_D#49 AH8 B7 H_TRDY# 4
H_D#49 H_TRDY#
1 2 H_RCOMP H_D#50 AJ14 H_D#50
R282 24D9R2F-L-GP H_D#51 AE9
H_D#52 H_D#51
AE11 H_D#52
H_D#53 AH12 H_DINV#[3..0]
H_D#53 H_DINV#[3..0] 4
H_D#54 AJ5 K5 H_DINV#0
H_D#55 H_D#54 H_DINV#0 H_DINV#1
AH5 H_D#55 H_DINV#1 L2
H_D#56 AJ6 AD13 H_DINV#2
H_D#57 H_D#56 H_DINV#2 H_DINV#3
Place them near to the chip ( < 0.5") H_D#58
AE7
AJ7
H_D#57 H_DINV#3 AE13
H_DSTBN#[3..0]
H_D#58 H_DSTBN#[3..0] 4
H_D#59 AJ2 M7 H_DSTBN#0
2 H_D#60 H_D#59 H_DSTBN#0 H_DSTBN#1 2
AE5 H_D#60 H_DSTBN#1 K3
H_REF Decoupling Crestline H_D#61 AJ3 AD2 H_DSTBN#2
H_D#62 H_D#61 H_DSTBN#2 H_DSTBN#3
AH2 AH11
close Crestline 100 mil H_D#63 AH13
H_D#62 H_DSTBN#3 H_DSTBP#[3..0]
H_DSTBP#[3..0] 4
H_D#63 H_DSTBP#0
H_DSTBP#0 L7
K2 H_DSTBP#1
H_SWING H_DSTBP#1 H_DSTBP#2
B3 H_SWING H_DSTBP#2 AC2
H_RCOMP C2 AJ10 H_DSTBP#3
1D05V_S0 H_RCOMP H_DSTBP#3
H_REQ#[4..0] 4
H_SCOMP W1 M14 H_REQ#0
H_SCOMP# H_SCOMP H_REQ#0 H_REQ#1
W2 H_SCOMP# H_REQ#1 E13
2

A11 H_REQ#2
R287 H_REQ#2 H_REQ#3
4,38 H_CPURST# B6 H_CPURST# H_REQ#3 H13
1KR2F-3-GP E5 B12 H_REQ#4
4 H_CPUSLP# H_CPUSLP# H_REQ#4
H_RS#[2..0] 4
E12 H_RS#0
1

H_AVREF H_RS#0 H_RS#1


B9 H_AVREF H_RS#1 D7
A9 D8 H_RS#2
H_DVREF H_RS#2
1

R286 C446
2KR2F-3-GP SCD1U16V2ZY-2GP
1
2

CRB v0.9 REQUEST


1 <Core Design> 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GMCH (1 of 6)
Size Document Number Rev

Calado -1
Date: Wednesday, September 12, 2007 Sheet 6 of 39
A B C D E
A B C D E

U43B 2 OF 10 3D3V_S0 1D05V_S0

P36 RSVD#P36 SM_CK0 AV29 M_CLK_DDR0 12

1
P37 RSVD#P37 SM_CK1 BB23 M_CLK_DDR1 12

8
7
6
5
R35 BA25 M_CLK_DDR2 12 R54
RSVD#R35 SM_CK3 RN32 24D9R2F-L-GP
N35 RSVD#N35 SM_CK4 AV23 M_CLK_DDR3 12
AR12 RSVD#AR12 SRN10KJ-6-GP
AR13 AW30 M_CLK_DDR#0 12 U43C 3 OF 10

2
RSVD#AR13 SM_CK#0
AM12 RSVD#AM12 SM_CK#1 BA23 M_CLK_DDR#1 12
AN13 AW25 M_CLK_DDR#2 12 14 L_BKLTCTL J40 N43 PEG_CMP

1
2
3
4
RSVD#AN13 SM_CK#3 L_BKLT_CTRL PEG_COMPI
J12 RSVD#J12 SM_CK#4 AW23 M_CLK_DDR#3 12 28 GMCH_BL_ON H39 L_BKLT_EN PEG_COMPO M43
AR37 LCTLA_CLK E39
RSVD#AR37 LCTLB_DATA L_CTRL_CLK
AM36 BE29 M_CKE0 12,13 E40

DDR MUXING
RSVD#AM36 SM_CKE0 L_CTRL_DATA
4 AL36 RSVD#AL36 SM_CKE1 AY32 M_CKE1 12,13 14 CLK_DDC_EDID C37 L_DDC_CLK PEG_RX#0 J51 4
AM37 RSVD#AM37 SM_CKE3 BD39 M_CKE2 12,13 14 DAT_DDC_EDID D35 L_DDC_DATA PEG_RX#1 L51
D20 RSVD#D20 SM_CKE4 BG37 M_CKE3 12,13 14 GMCH_LCDVDD_ON K40 L_VDD_EN PEG_RX#2 N47
PEG_RX#3 T45
BG20 M_CS0# 12,13 2 R51 1 LIBG L41 T50
SM_CS#0 2K4R2F-GP L_LVBG LVDS_IBG PEG_RX#4
SM_CS#1 BK16 M_CS1# 12,13 L43 LVDS_VBG PEG_RX#5 U40
BG16 M_CS2# 12,13 TPAD30 TP63 N41 Y44
SM_CS#2 LVDS_VREFH PEG_RX#6
H10 RSVD#H10 SM_CS#3 BE13 M_CS3# 12,13 N40 LVDS_VREFL PEG_RX#7 Y40
B51 RSVD#B51 14 GMCH_TXACLK- D46 LVDSA_CLK# PEG_RX#8 AB51

RSVD
BJ20 RSVD#BJ20 SM_ODT0 BH18 M_ODT0 12,13 14 GMCH_TXACLK+ C45 LVDSA_CLK PEG_RX#9 W49

LVDS
BK22 RSVD#BK22 SM_ODT1 BJ15 M_ODT1 12,13 D44 LVDSB_CLK# PEG_RX#10 AD44
BF19 RSVD#BF19 SM_ODT2 BJ14 M_ODT2 12,13 E42 LVDSB_CLK PEG_RX#11 AD40
BH20 RSVD#BH20 SM_ODT3 BE16 M_ODT3 12,13 PEG_RX#12 AG46
BK18 RSVD#BK18 14 GMCH_TXAOUT0- G51 LVDSA_DATA#0 PEG_RX#13 AH49
BJ18 BK31 SM_RCOMP_VOH 14 GMCH_TXAOUT1- E51 AG45
RSVD#BJ18 SM_RCOMP_VOH SM_RCOMP_VOL LVDSA_DATA#1 PEG_RX#14
BF23 RSVD#BF23 SM_RCOMP_VOL BL31 14 GMCH_TXAOUT2- F49 LVDSA_DATA#2 PEG_RX#15 AG41
BG23 RSVD#BG23 C48 LVDSA_DATA#3
BC23 BL15 M_RCOMPP TPAD30 TP66 GMCH_TXAOUT3- J50
RSVD#BC23 SM_RCOMP M_RCOMPN PEG_RX0
BD24 RSVD#BD24 SM_RCOMP# BK14 14 GMCH_TXAOUT0+ G50 LVDSA_DATA0 PEG_RX1 L50
14 GMCH_TXAOUT1+ E50 LVDSA_DATA1 PEG_RX2 M47
SM_VREF#AR49 AR49 14 GMCH_TXAOUT2+ F48 LVDSA_DATA2 PEG_RX3 U44
BH39 AW4 DDR_VREF_S3 C82 D47 T49
RSVD#BH39 SM_VREF#AW4 SCD1U10V2KX-4GP TPAD30 TP67 GMCH_TXAOUT3+ LVDSA_DATA3 PEG_RX4
AW20 RSVD#AW20 PEG_RX5 T41
BK20 RSVD#BK20 1 2 G44 LVDSB_DATA#0 PEG_RX6 W45
B47 LVDSB_DATA#1 PEG_RX7 W41
B42 DREFCLK B45 AB50

PCI_EXPRESS GRAPHICS
DPLL_REF_CLK DREFCLK# DREFCLK 3 LVDSB_DATA#2 PEG_RX8
B44 RSVD#B44 DPLL_REF_CLK# C42 DREFCLK# 3 PEG_RX9 Y48
C44 H48 DREFSSCLK AC45
RSVD#C44 DPLL_REF_SSCLK DREFSSCLK# DREFSSCLK 3 PEG_RX10
A35 RSVD#A35 DPLL_REF_SSCLK# H47 DREFSSCLK# 3 E44 LVDSB_DATA0 PEG_RX11 AC41
3 B37 1D8V_S3 A47 AH47 3
RSVD#B37 LVDSB_DATA1 PEG_RX12
B36 RSVD#B36 PEG_CLK K44 CLK_MCH_3GPLL 3 A45 LVDSB_DATA2 PEG_RX13 AG49
B34 K45 R289 AH45

CLK
RSVD#B34 PEG_CLK# CLK_MCH_3GPLL# 3 PEG_RX14
C34 M_RCOMPP 2 1 AG42
RSVD#C34 20R2F-GP PEG_RX15
R288 N45
M_RCOMPN PEG_TX#0
2 1 15 TV_DACA E27 TVA_DAC PEG_TX#1 U39
AN47 DMI_TXN0 20R2F-GP 15 TV_DACB G27 U47
DMI_RXN0 DMI_TXN1 DMI_TXN0 17 TVB_DAC PEG_TX#2
DMI_RXN1 AJ38 DMI_TXN1 17 15 TV_DACC K27 TVC_DAC PEG_TX#3 N51
3,4 CPU_SEL0 P27 AN42 DMI_TXN2 R50
CFG0 DMI_RXN2 DMI_TXN2 17 3D3V_S0 PEG_TX#4

TV
3,4 CPU_SEL1 N27 AN46 DMI_TXN3 F27 T42
CFG1 DMI_RXN3 DMI_TXN3 17 R37 RN31 TVA_RTN PEG_TX#5
3,4 CPU_SEL2 N24 CFG2 J27 TVB_RTN PEG_TX#6 Y43
C21 AM47 DMI_TXP0 2 150R2F-1-GP
1 TV_DACA 8 1 PM_EXTTS#1 L27 W46
DMI

CFG3 DMI_RXP0 DMI_TXP1 DMI_TXP0 17 PM_EXTTS#0 TVC_RTN PEG_TX#7


C23 CFG4 DMI_RXP1 AJ39 DMI_TXP1 17 7 2 PEG_TX#8 W38
F23 AN41 DMI_TXP2 R39 6 3 TV_DCONSEL0 M35 AD39
CFG5 DMI_RXP2 DMI_TXP3 DMI_TXP2 17 TV_DCONSEL0 PEG_TX#9
N23 CFG6 DMI_RXP3 AN45 DMI_TXP3 17 2 150R2F-1-GP
1 TV_DACB 5 4 TV_DCONSEL1 P33 TV_DCONSEL1 PEG_TX#10 AC46
G23 CFG7 PEG_TX#11 AC49
CFG

J20 AJ46 DMI_RXN0 R40 SRN10KJ-6-GP AC42


CFG8 DMI_TXN0 DMI_RXN1 DMI_RXN0 17 PEG_TX#12
C20 CFG9 DMI_TXN1 AJ41 DMI_RXN1 17 2 150R2F-1-GP
1 TV_DACC
PEG_TX#13 AH39
R24 AM40 DMI_RXN2 AE49
CFG10 DMI_TXN2 DMI_RXN3 DMI_RXN2 17 PEG_TX#14
L23 CFG11 DMI_TXN3 AM44 DMI_RXN3 17 PEG_TX#15 AH44
J23 R44
CFG12 DMI_RXP0
E23 CFG13 DMI_TXP0 AJ47 DMI_RXP0 17 2 150R2F-1-GP
1 GMCH_BLUE
PEG_TX0 M45
E20 AJ42 DMI_RXP1 15 GMCH_BLUE GMCH_BLUE H32 T38
CFG14 DMI_TXP1 DMI_RXP2 DMI_RXP1 17 R47 CRT_BLUE PEG_TX1
K23 CFG15 DMI_TXP2 AM39 DMI_RXP2 17 G32 CRT_BLUE# PEG_TX2 T46
M20 AM43 DMI_RXP3 2 150R2F-1-GP
1 GMCH_GREEN 15 GMCH_GREEN GMCH_GREEN K29 N50
CFG16 DMI_TXP3 DMI_RXP3 17 CRT_GREEN PEG_TX3
M24 CFG17 J29 CRT_GREEN# PEG_TX4 R51
L32 R38 15 GMCH_RED GMCH_RED F29 U43
CFG18 CRT_RED PEG_TX5

VGA
N33 CFG19 2 150R2F-1-GP
1 GMCH_RED E29 CRT_RED# PEG_TX6 W42
2 2
L35 Y47
GRAPHICS VID

CFG20 PEG_TX7
PEG_TX8 Y39
E35 15 GMCH_DDCCLK GMCH_DDCCLK K33 AC38
GFX_VID0 GMCH_DDCDATA G35 CRT_DDC_CLK PEG_TX9
GFX_VID1 A39 15 GMCH_DDCDATA CRT_DDC_DATA PEG_TX10 AD47
17 PM_BMBUSY# G41 C38 15 GMCH_VSYNC 1 2 GMCH_VS E33 AC50
PM_BM_BUSY# GFX_VID2 R49 33R2F-3-GP CRT_VSYNC PEG_TX11
4,16,32 H_DPRSTP# L39 PM_DPRSTP# GFX_VID3 B39 C32 CRT_TVO_IREF PEG_TX12 AD43
PM_EXTTS#0 L36 E36 15 GMCH_HSYNC 1 2 GMCH_HS F33 AG39
PM_EXT_TS#0 GFX_VR_EN CRT_HSYNC PEG_TX13
PM

PM_EXTTS#1 J36 R46 33R2F-3-GP AE50


PM_EXT_TS#1 PEG_TX14
17,20 PWROK AW49 PWROK PEG_TX15 AH43
RSTIN# AV20 1 2 CRT_IREF
RSTIN# 1D25V_S0 R36 1K3R2F-1-GP
N20 THERMTRIP#
17,28 PLT_RST1# 2 1 G36 DPRSLPVR

2
R35
100R2J-2-GP R309
AM49 1KR2F-3-GP FOR Calero: 255 ohm
CL_CLK CL_CLK0 17
BJ51 NC#BJ51 CL_DATA AK50 CL_DATA0 17 Crestline: 1.3k ohm
BK51 AT43
ME

PWROK 17,20
1
NC#BK51 CL_PWROK 1D8V_S3
BK50 NC#BK50 CL_RST# AN49 CL_RST#0 17 CRT_IREF routing Trace
BL50 AM50 MCH_CLVREF R298 1KR2F-3-GP
BL49
NC#BL50 CL_VREF
2 1 width use 20 mil
NC#BL49
1

BL3 3D3V_S0
4,16,30 PM_THRMTRIP-A# NC#BL3
1

17,32 PM_DPRSLPVR BL2 C480 R311 SM_RCOMP_VOH


NC#BL2
NC

BK1 392R2F-GP
NC#BK1
1

1
SCD1U10V2KX-4GP

BJ1 H35
2

NC#BJ1 SDVO_CTRL_CLK R55 R295 C465 C466


E1 K36
2

NC#E1 SDVO_CTRL_DATA CLK_3GPLLREQ# 10KR2J-3-GP 3K01R2F-3-GP SC2D2U6D3V3MX-1-GP


A5 G39

2
NC#A5 CLKREQ# SCD01U16V2KX-3GP
C51 NC#C51 ICH_SYNC# G40 MCH_ICH_SYNC# 17
B50
MISC

NC#B50 SM_RCOMP_VOL
1 A50 NC#A50 1
A49 NC#A49 TEST1 A37
2

1
BK2 NC#BK2 TEST2 R32 TEST2_GMCH
R292 C462 C461
Wistron Corporation
1

1KR2F-3-GP SC2D2U6D3V3MX-1-GP
2

2
R50 SCD01U16V2KX-3GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
20KR2J-L2-GP Taipei Hsien 221, Taiwan, R.O.C.
1

Title
2

GMCH (2 of 6)
Size Document Number Rev

Calado -1
Date: Wednesday, September 12, 2007 Sheet 7 of 39
A B C D E
A B C D E

4 4

U43D 4 OF 10
M_A_DQ[63..0] U43E 5 OF 10
12 M_A_DQ[63..0] M_B_DQ[63..0]
M_A_DQ0 AR43 BB19 M_A_BS#0 12,13
SA_DQ0 SA_BS0 12 M_B_DQ[63..0]
M_A_DQ1 AW44 BK19 M_A_BS#1 12,13 M_B_DQ0 AP49 AY17 M_B_BS#0 12,13
M_A_DQ2 SA_DQ1 SA_BS1 M_B_DQ1 SB_DQ0 SB_BS0
BA45 SA_DQ2 SA_BS2 BF29 M_A_BS#2 12,13 AR51 SB_DQ1 SB_BS1 BG18 M_B_BS#1 12,13
M_A_DQ3 AY46 M_A_CAS# 12,13 M_B_DQ2 AW50 BG36 M_B_BS#2 12,13
M_A_DQ4 SA_DQ3 M_B_DQ3 SB_DQ2 SB_BS2
AR41 SA_DQ4 SA_CAS# BL17 AW51 SB_DQ3 M_B_CAS# 12,13
M_A_DQ5 AR45 M_A_DM[7..0] M_B_DQ4 AN51 BE17
SA_DQ5 M_A_DM[7..0] 12 SB_DQ4 SB_CAS#
M_A_DQ6 AT42 AT45 M_A_DM0 M_B_DQ5 AN50 M_B_DM[7..0]
SA_DQ6 SA_DM0 SB_DQ5 M_B_DM[7..0] 12
M_A_DQ7 AW47 BD44 M_A_DM1 M_B_DQ6 AV50 AR50 M_B_DM0
M_A_DQ8 SA_DQ7 SA_DM1 M_A_DM2 M_B_DQ7 SB_DQ6 SB_DM0 M_B_DM1
BB45 SA_DQ8 SA_DM2 BD42 AV49 SB_DQ7 SB_DM1 BD49
M_A_DQ9 BF48 AW38 M_A_DM3 M_B_DQ8 BA50 BK45 M_B_DM2
M_A_DQ10 SA_DQ9 SA_DM3 M_A_DM4 M_B_DQ9 SB_DQ8 SB_DM2 M_B_DM3
BG47 SA_DQ10 SA_DM4 AW13 BB50 SB_DQ9 SB_DM3 BL39
M_A_DQ11 BJ45 BG8 M_A_DM5 M_B_DQ10 BA49 BH12 M_B_DM4
M_A_DQ12 SA_DQ11 SA_DM5 M_A_DM6 M_B_DQ11 SB_DQ10 SB_DM4 M_B_DM5
BB47 SA_DQ12 SA_DM6 AY5 BE50 SB_DQ11 SB_DM5 BJ7
M_A_DQ13 BG50 AN6 M_A_DM7 M_B_DQ12 BA51 BF3 M_B_DM6
M_A_DQ14 SA_DQ13 SA_DM7 M_A_DQS[7..0] M_B_DQ13 SB_DQ12 SB_DM6 M_B_DM7
BH49 SA_DQ14 M_A_DQS[7..0] 12 AY49 SB_DQ13 SB_DM7 AW2
M_A_DQ15 BE45 AT46 M_A_DQS0 M_B_DQ14 BF50 M_B_DQS[7..0]
SA_DQ15 SA_DQS0 SB_DQ14 M_B_DQS[7..0] 12
M_A_DQ16 AW43 BE48 M_A_DQS1 M_B_DQ15 BF49 AT50 M_B_DQS0
M_A_DQ17 SA_DQ16 SA_DQS1 M_A_DQS2 M_B_DQ16 SB_DQ15 SB_DQS0 M_B_DQS1
BE44 SA_DQ17 SA_DQS2 BB43 BJ50 SB_DQ16 SB_DQS1 BD50
M_A_DQ18 BG42 BC37 M_A_DQS3 M_B_DQ17 BJ44 BK46 M_B_DQS2
M_A_DQ19 SA_DQ18 SA_DQS3 M_A_DQS4 M_B_DQ18 SB_DQ17 SB_DQS2 M_B_DQS3
BE40 SA_DQ19 SA_DQS4 BB16 BJ43 SB_DQ18 SB_DQS3 BK39
M_A_DQ20 BF44 BH6 M_A_DQS5 M_B_DQ19 BL43 BJ12 M_B_DQS4
M_A_DQ21 SA_DQ20 SA_DQS5 M_A_DQS6 M_B_DQ20 SB_DQ19 SB_DQS4 M_B_DQS5
BH45 SA_DQ21 SA_DQS6 BB2 BK47 SB_DQ20 SB_DQS5 BL7
M_A_DQ22 BG40 AP3 M_A_DQS7 M_A_DQS#[7..0] M_B_DQ21 BK49 BE2 M_B_DQS6
SA_DQ22 SA_DQS7 M_A_DQS#[7..0] 12 SB_DQ21 SB_DQS6
M_A_DQ23 BF40 AT47 M_A_DQS#0 M_B_DQ22 BK43 AV2 M_B_DQS7 M_B_DQS#[7..0]
M_B_DQS#[7..0] 12
DDR SYSTEM MEMORRY A

M_A_DQ24 SA_DQ23 SA_DQS#0 M_A_DQS#1 M_B_DQ23 SB_DQ22 SB_DQS7 M_B_DQS#0


AR40 SA_DQ24 SA_DQS#1 BD47 BK42 SB_DQ23 SB_DQS#0 AU50
3 M_A_DQ25 AW40 BC41 M_A_DQS#2 M_B_DQ24 BJ41 BC50 M_B_DQS#1 3

DDR SYSTEM MEMORY B


M_A_DQ26 SA_DQ25 SA_DQS#2 M_A_DQS#3 M_B_DQ25 SB_DQ24 SB_DQS#1 M_B_DQS#2
AT39 SA_DQ26 SA_DQS#3 BA37 BL41 SB_DQ25 SB_DQS#2 BL45
M_A_DQ27 AW36 BA16 M_A_DQS#4 M_B_DQ26 BJ37 BK38 M_B_DQS#3
M_A_DQ28 SA_DQ27 SA_DQS#4 M_A_DQS#5 M_B_DQ27 SB_DQ26 SB_DQS#3 M_B_DQS#4
AW41 SA_DQ28 SA_DQS#5 BH7 BJ36 SB_DQ27 SB_DQS#4 BK12
M_A_DQ29 AY41 BC1 M_A_DQS#6 M_B_DQ28 BK41 BK7 M_B_DQS#5
M_A_DQ30 SA_DQ29 SA_DQS#6 M_A_DQS#7 M_B_DQ29 SB_DQ28 SB_DQS#5 M_B_DQS#6
AV38 SA_DQ30 SA_DQS#7 AP2 BJ40 SB_DQ29 SB_DQS#6 BF2
M_A_DQ31 AT38 M_A_A[14..0] M_B_DQ30 BL35 AV3 M_B_DQS#7
SA_DQ31 M_A_A[14..0] 12,13 SB_DQ30 SB_DQS#7
M_A_DQ32 AV13 BJ19 M_A_A0 M_B_DQ31 BK37 M_B_A[14..0]
SA_DQ32 SA_MA0 SB_DQ31 M_B_A[14..0] 12,13
M_A_DQ33 AT13 BD20 M_A_A1 M_B_DQ32 BK13 BC18 M_B_A0
M_A_DQ34 SA_DQ33 SA_MA1 M_A_A2 M_B_DQ33 SB_DQ32 SB_MA0 M_B_A1
AW11 SA_DQ34 SA_MA2 BK27 BE11 SB_DQ33 SB_MA1 BG28
M_A_DQ35 AV11 BH28 M_A_A3 M_B_DQ34 BK11 BG25 M_B_A2
M_A_DQ36 SA_DQ35 SA_MA3 M_A_A4 M_B_DQ35 SB_DQ34 SB_MA2 M_B_A3
AU15 SA_DQ36 SA_MA4 BL24 BC11 SB_DQ35 SB_MA3 AW17
M_A_DQ37 AT11 BK28 M_A_A5 M_B_DQ36 BC13 BF25 M_B_A4
M_A_DQ38 SA_DQ37 SA_MA5 M_A_A6 M_B_DQ37 SB_DQ36 SB_MA4 M_B_A5
BA13 SA_DQ38 SA_MA6 BJ27 BE12 SB_DQ37 SB_MA5 BE25
M_A_DQ39 BA11 BJ25 M_A_A7 M_B_DQ38 BC12 BA29 M_B_A6
M_A_DQ40 SA_DQ39 SA_MA7 M_A_A8 M_B_DQ39 SB_DQ38 SB_MA6 M_B_A7
BE10 SA_DQ40 SA_MA8 BL28 BG12 SB_DQ39 SB_MA7 BC28
M_A_DQ41 BD10 BA28 M_A_A9 M_B_DQ40 BJ10 AY28 M_B_A8
M_A_DQ42 SA_DQ41 SA_MA9 M_A_A10 M_B_DQ41 SB_DQ40 SB_MA8 M_B_A9
BD8 SA_DQ42 SA_MA10 BC19 BL9 SB_DQ41 SB_MA9 BD37
M_A_DQ43 AY9 BE28 M_A_A11 M_B_DQ42 BK5 BG17 M_B_A10
M_A_DQ44 SA_DQ43 SA_MA11 M_A_A12 M_B_DQ43 SB_DQ42 SB_MA10 M_B_A11
BG10 SA_DQ44 SA_MA12 BG30 BL5 SB_DQ43 SB_MA11 BE37
M_A_DQ45 AW9 BJ16 M_A_A13 M_B_DQ44 BK9 BA39 M_B_A12
M_A_DQ46 SA_DQ45 SA_MA13 M_A_A14 M_B_DQ45 SB_DQ44 SB_MA12 M_B_A13
BD7 SA_DQ46 SA_MA14 BJ29 BK10 SB_DQ45 SB_MA13 BG13
M_A_DQ47 BB9 M_B_DQ46 BJ8 BE24 M_B_A14
M_A_DQ48 SA_DQ47 M_B_DQ47 SB_DQ46 SB_MA14
BB5 SA_DQ48 SA_RAS# BE18 M_A_RAS# 12,13 BJ6 SB_DQ47
M_A_DQ49 AY7 AY20 SA_RCVEN# M_B_DQ48 BF4 AV16 M_B_RAS# 12,13
M_A_DQ50 SA_DQ49 SA_RCVEN# TP47 TPAD30 M_B_DQ49 SB_DQ48 SB_RAS# SB_RCVEN#
AT5 SA_DQ50 BH5 SB_DQ49 SB_RCVEN# AY18 TP44 TPAD30
M_A_DQ51 AT7 BA19 M_A_WE# 12,13 M_B_DQ50 BG1
M_A_DQ52 SA_DQ51 SA_WE# M_B_DQ51 SB_DQ50
AY6 SA_DQ52 BC2 SB_DQ51 SB_WE# BC17 M_B_WE# 12,13
M_A_DQ53 BB7 M_B_DQ52 BK3
2 M_A_DQ54 SA_DQ53 M_B_DQ53 SB_DQ52 2
AR5 SA_DQ54 Place Test PAD Near to Chip BE4 SB_DQ53
M_A_DQ55 AR8 M_B_DQ54 BD3 Place Test PAD Near to Chip
M_A_DQ56 SA_DQ55 as could as possible M_B_DQ55 SB_DQ54
AR9 SA_DQ56 BJ2 SB_DQ55 ascould as possible
M_A_DQ57 AN3 M_B_DQ56 BA3
M_A_DQ58 SA_DQ57 M_B_DQ57 SB_DQ56
AM8 SA_DQ58 BB3 SB_DQ57
M_A_DQ59 AN10 M_B_DQ58 AR1
M_A_DQ60 SA_DQ59 M_B_DQ59 SB_DQ58
AT9 SA_DQ60 AT3 SB_DQ59
M_A_DQ61 AN9 M_B_DQ60 AY2
M_A_DQ62 SA_DQ61 M_B_DQ61 SB_DQ60
AM9 SA_DQ62 AY3 SB_DQ61
M_A_DQ63 AN11 M_B_DQ62 AU2
SA_DQ63 M_B_DQ63 SB_DQ62
AT2 SB_DQ63

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GMCH (3 of 6)
Size Document Number Rev

Calado -1
Date: Wednesday, September 12, 2007 Sheet 8 of 39
A B C D E
A B C D E

VCC_NCTF + VCC=1573mA
1D05V_S0
U43F 6 OF 10
FOR VCC CORE AND VCC NCTF
FOR VCC CORE
1573mA AT35 T17 1D05V_S0
VCC VCC_AXG_NCTF
AT34 VCC VCC_AXG_NCTF T18
C186 C160 C104 C169 AH28 T19 U43G 7 OF 10
VCC VCC_AXG_NCTF
1

1
1D05V_S0
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AC32 VCC VCC_AXG_NCTF T21
AC31 VCC VCC_AXG_NCTF T22 AB33 VCC_NCTF
DY DY AK32 T23 AB36
2

2
VCC VCC_AXG_NCTF VCC_NCTF
AJ31 T25 AB37

VCC CORE
VCC VCC_AXG_NCTF VCC_NCTF

1
AJ28 U15 TC18 C150 C128 C175 C136 C97 AC33 T27
VCC VCC_AXG_NCTF VCC_NCTF VSS_NCTF
AH32 VCC VCC_AXG_NCTF U16 DY AC35 VCC_NCTF VSS_NCTF T37

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
4 AH31 U17 ST220U2D5VBM-5GP DY AC36 U24 4

2
VCC VCC_AXG_NCTF VCC_NCTF VSS_NCTF
AH29 VCC VCC_AXG_NCTF U19 AD35 VCC_NCTF VSS_NCTF U28
AF32 VCC VCC_AXG_NCTF U20 AD36 VCC_NCTF VSS_NCTF V31
C110 C184 C185 U21 AF33 V35
VCC_AXG_NCTF VCC_NCTF VSS_NCTF
1

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VCC_AXG_NCTF U23 AF36 VCC_NCTF VSS_NCTF AA19


U26 308 mils from AH33 AB17

VSS NCTF
R43 VCC_AXG_NCTF VCC_NCTF VSS_NCTF
DY V16 the Edge AH35 AB35
2

VCC_AXG_NCTF VCC_NCTF VSS_NCTF


1 2VCC_GMCH1R30 VCC VCC_AXG_NCTF V17 AH36 VCC_NCTF VSS_NCTF AD19
0R0402-PAD V19 AH37 AD37
VCC_AXG_NCTF VCC_NCTF VSS_NCTF
VCC_AXG_NCTF V20 Coupling CAP AJ33 VCC_NCTF VSS_NCTF AF17
VCC_AXG_NCTF V21 AJ35 VCC_NCTF VSS_NCTF AF35
VCC_AXG_NCTF V23 AK33 VCC_NCTF VSS_NCTF AK17
Coupling CAP 370 mils from the Edge VCC_AXG_NCTF V24 AK35 VCC_NCTF VSS_NCTF AM17
VCC_AXG_NCTF Y15 AK36 VCC_NCTF VSS_NCTF AM24
Y16 AK37 AP26
POWER VCC_AXG_NCTF
Y17 AD33
VCC_NCTF VSS_NCTF
AP28

VCC NCTF
1D8V_S3 VCC_AXG_NCTF VCC_NCTF VSS_NCTF
VCC_AXG_NCTF Y19 AJ36 VCC_NCTF VSS_NCTF AR15
AU32 VCC_SM VCC_AXG_NCTF Y20 AM35 VCC_NCTF VSS_NCTF AR19
AU33 VCC_SM VCC_AXG_NCTF Y21 AL33 VCC_NCTF VSS_NCTF AR28
AU35 VCC_SM VCC_AXG_NCTF Y23 AL35 VCC_NCTF
3138mA AV33
AW33
VCC_SM VCC_AXG_NCTF Y24
Y26
AA33
AA35
VCC_NCTF
VCC_SM VCC_AXG_NCTF VCC_NCTF
AW35 VCC_SM VCC_AXG_NCTF Y28 VCC_AXG_NCTF + VCC_AXG=7700mA AA36 VCC_NCTF
FOR VCC SM AY35
BA32
VCC_SM VCC_AXG_NCTF Y29
AA16
AP35
AP36
VCC_NCTF
VCC_SM VCC_AXG_NCTF VCC_NCTF
Place CAP where BA33 VCC_SM VCC_AXG_NCTF AA17 AR35 VCC_NCTF
LVDS and DDR2 taps BA35 VCC_SM VCC_AXG_NCTF AB16 AR36 VCC_NCTF
BB33 VCC_SM VCC_AXG_NCTF AB19 Y32 VCC_NCTF
BC32 VCC_SM VCC_AXG_NCTF AC16 Y33 VCC_NCTF
3 3
DY BC33 VCC_SM VCC_AXG_NCTF AC17 Y35 VCC_NCTF
1

C180 C173 C170 TC7 BC35 AC19 Y36


VCC_SM VCC_AXG_NCTF VCC_NCTF
POWER
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

ST220U2D5VBM-5GP

BD32 AD15 Y37


VCC SM

VCC GFX NCTF


VCC_SM VCC_AXG_NCTF VCC_NCTF

1
DY BD35 AD16 C147 C117 C176 T30
2

VCC_SM VCC_AXG_NCTF VCC_NCTF

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
BE32 AD17 SC4D7U10V5ZY-3GP T34 A3 NB_A3 TP136TPAD30

VSS SCB
VCC_SM VCC_AXG_NCTF VCC_NCTF VSS_SCB NB_B2
BE33 AF16 T35 B2 TP135TPAD30

2
VCC_SM VCC_AXG_NCTF VCC_NCTF VSS_SCB NB_C1
BE35 VCC_SM VCC_AXG_NCTF AF19 U29 VCC_NCTF VSS_SCB C1 TP134TPAD30
BF33 AH15 U31 BL1 NB_BL1 TP20 TPAD30
VCC_SM VCC_AXG_NCTF VCC_NCTF VSS_SCB NB_BL51
BF34 VCC_SM VCC_AXG_NCTF AH16 U32 VCC_NCTF VSS_SCB BL51 TP74 TPAD30
BG32 AH17 U33 A51 NB_A51 TP75 TPAD30
VCC_SM VCC_AXG_NCTF VCC_NCTF VSS_SCB
BG33 VCC_SM VCC_AXG_NCTF AH19 U35 VCC_NCTF
BG35 VCC_SM VCC_AXG_NCTF AJ16 U36 VCC_NCTF
BH32 VCC_SM VCC_AXG_NCTF AJ17 V32 VCC_NCTF
BH34 AJ19 V33 1D05V_S0
VCC_SM VCC_AXG_NCTF VCC_NCTF
1

1
C470 C471 C458 BH35 AK16 C131 C187 V36
VCC_SM VCC_AXG_NCTF VCC_NCTF
BJ32 VCC_SM VCC_AXG_NCTF AK19 V37 VCC_NCTF
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP

DY BJ33 AL16 AT33

VSS AXM
2

2
VCC_SM VCC_AXG_NCTF VCC_AXM
BJ34 VCC_SM VCC_AXG_NCTF AL17 VCC_AXM AT31
BK32
BK33
VCC_SM VCC_AXG_NCTF AL19
AL20
FOR VCC AXM NCTF AND VCC AXM VCC_AXM AK29
AK24
VCC_SM VCC_AXG_NCTF 1D05V_S0 VCC_AXM_S0 VCC_AXM
BK34 VCC_SM VCC_AXG_NCTF AL21 VCC_AXM AK23
BK35 AL23 R42 AJ26
VCC_SM VCC_AXG_NCTF 0R0603-PAD VCC_AXM
BL33 VCC_SM VCC_AXG_NCTF AM15 VCC_AXM AJ23
Place on the Edge AU30 VCC_SM VCC_AXG_NCTF AM16 1 2 AL24 VCC_AXM_NCTF
AM19 C154 C177 C181 C162 C167 C174 AL26
VCC_AXG_NCTF VCC_AXM_NCTF

1
SCD1U10V2KX-4GP
VCC_AXG_NCTF AM20 AL28 VCC_AXM_NCTF
1D25V_S0

SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AM21 AM26

VSS AXM NCTF


VCC_AXG_NCTF VCC_AXM_NCTF

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
R20 AM23 R48 DY DY AM28

2
VCC_AXG VCC_AXG_NCTF 0R6J-3-GP VCC_AXM_NCTF
T14 VCC_AXG VCC_AXG_NCTF AP15 AM29 VCC_AXM_NCTF
2 2
W13 VCC_AXG VCC_AXG_NCTF AP16 2 1 AM31 VCC_AXM_NCTF
W14 VCC_AXG VCC_AXG_NCTF AP17 DY AM32 VCC_AXM_NCTF
Y12 VCC_AXG VCC_AXG_NCTF AP19 AM33 VCC_AXM_NCTF
AA20 VCC_AXG VCC_AXG_NCTF AP20 AP29 VCC_AXM_NCTF
AA23 VCC_AXG VCC_AXG_NCTF AP21 AP31 VCC_AXM_NCTF
AA26 VCC_AXG VCC_AXG_NCTF AP23 AP32 VCC_AXM_NCTF
AA28 VCC_AXG VCC_AXG_NCTF AP24 Place on the Edge Coupling CAP AP33 VCC_AXM_NCTF
AB21 VCC_AXG VCC_AXG_NCTF AR20 AL29 VCC_AXM_NCTF
AB24
AB29
VCC_AXG VCC_AXG_NCTF AR21
AR23
VCC_AXM_NCTF + VCC_AXM=540mA AL31
AL32
VCC_AXM_NCTF
VCC GFX

VCC_AXG VCC_AXG_NCTF VCC_AXM_NCTF


AC20 VCC_AXG VCC_AXG_NCTF AR24 AR31 VCC_AXM_NCTF
AC21 VCC_AXG VCC_AXG_NCTF AR26 AR32 VCC_AXM_NCTF
AC23 VCC_AXG VCC_AXG_NCTF V26 AR33 VCC_AXM_NCTF
AC24 VCC_AXG VCC_AXG_NCTF V28
AC26 VCC_AXG VCC_AXG_NCTF V29
AC28 VCC_AXG VCC_AXG_NCTF Y31
AC29 VCC_AXG
AD20 VCC_AXG
AD23 VCC_AXG
AD24 AW45SM_LF1_GMCH
VCC SM LF

VCC_AXG VCC_SM_LF
AD28 VCC_AXG VCC_SM_LF BC39 SM_LF2_GMCH
AF21 VCC_AXG VCC_SM_LF BE39 SM_LF3_GMCH
AF26 VCC_AXG VCC_SM_LF BD17 SM_LF4_GMCH
AA31 VCC_AXG VCC_SM_LF BD4 SM_LF5_GMCH
1D05V_S0 AH20 AW8 SM_LF6_GMCH
VCC_AXG VCC_SM_LF
AH21 VCC_AXG VCC_SM_LF AT6 SM_LF7_GMCH
AH23 C83 C93 C79 C125 C189 C192 C193
VCC_AXG
1

AH24 VCC_AXG
1 AH26 VCC_AXG 1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SCD47U16V3ZY-3GP

SC1U10V3KX-3GP

SC1U10V3KX-3GP

AD31
2

VCC_AXG
1

AJ20 VCC_AXG
C481 C482 AN14 VCC_AXG Wistron Corporation
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title

GMCH (4 of 6)
Size Document Number Rev

Calado -1
Date: Monday, September 10, 2007 Sheet 9 of 39
A B C D E
A B C D E

1D05V_S0
Place on the edge
80mA 3D3VTVDAC
850mA

1
3D3V_S0 C112 C114 C427 C108 C119 C188
180ohm 100MHz

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC2D2U6D3V3MX-1-GP

SC4D7U6D3V3KX-GP

SCD1U10V2KX-4GP

SC10U6D3V5MX-3GP
1D25V_S0 C143
R308 2 R300 DY
1 DY

2
0R0603-PAD DY SCD1U10V2KX-4GP

2
1 2 M_VCCA_DPLLA BLM18HG102SN-1GP
R45
10mA

1
C475 0R0603-PAD U43H 8 OF 10
SC10U6D3V5MX-3GP C200
SCD1U10V2KX-4GP U13

1
R312 3D3V_SYNC_S0 VTT 1D25V_S0
4 J32 VCC_SYNC VTT U12 4
0R0603-PAD U11
VTT 200mA

1
1 2 M_VCCA_DPLLB C171 A33 U9
SCD1U10V2KX-4GP C468 VCCA_CRT_DAC VTT
B33 VCCA_CRT_DAC VTT U8
1

CRT
C485 SC2D2U6D3V3MX-1-GP U7 C123

2
VTT

1
SC10U6D3V5MX-3GP C484 U5 C106
VTT

SC1U10V3KX-3GP
SCD1U10V2KX-4GP M_VCCA_DAC_BG A30 U3
2

2
VCCA_DAC_BG VTT SC10U6D3V5MX-3GP
U2

2
3D3VTVDAC VTT
180ohm 100MHz B32 VSSA_DAC_BG VTT U1

VTT
T13
2 R296 1M_VCCA_DAC_BG 5mA VTT
VTT T11
T10
80mA M_VCCA_DPLLA VTT

1
C115 B49 T9 1D25V_S0
C467 VCCA_DPLLA VTT
T7
SCD1U10V2KX-4GP 80mA M_VCCA_DPLLB H49
VTT
T6 350mA

2
VCCA_DPLLB VTT

PLL
SC2D2U6D3V3MX-1-GP T5
120ohm 100MHz 50mA M_VCCA_HPLL AL2 VCCA_HPLL
VTT
VTT T3 C141

1
1D25V_S0

SC1U10V3KX-3GP
T2
L17 2nd source:68.00206.021 150mA M_VCCA_MPLL AM2 VCCA_MPLL
VTT
VTT R3 C139
FCM1608KF-121-GP 1D8V_TXLVDS_S3 R2 SC10U6D3V5MX-3GP

2
M_VCCA_HPLL VTT
1 2 R1
10mA POWER

A LVDS
VTT
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1 R301 21D8V_TXLVDS A41 VCCA_LVDS


1

1
C423 C472 0R0402-PAD
C424 C431 SC1KP50V2KX-1GP B41 AT23 1D25V_S0
SCD1U10V2KX-4GP 3D3V_S0 VSSA_LVDS VCC_AXD
DY AU28
2

2
VCC_AXD
VCC_AXD AU24
120ohm 100MHz K50 AT29
100mA

AXD
VCCA_PEG_BG VCC_AXD

1
VCC_AXD AT25

1
1 2 M_VCCA_MPLL K49 AT30 C158
400uA

A PEG
3 L18 C190 VSSA_PEG_BG VCC_AXD SCD1U10V2KX-4GP 3

2
1

FCM1608KF-121-GP SCD1U10V2KX-4GP AR29

2
C430 1D25V_S0 VCC_AXD_NCTF 1D8V_S3
2nd source:68.00206.021 SCD1U10V2KX-4GP 1D25V_RUN_PEGPLL U51
200mA
2

VCCA_PEG_PLL
VCC_AXF B23

AXF
VCC_AXF B21
1D25V_S0 C135 C109 C425 C429 AW18 A21
VCCA_SM VCC_AXF

1
SC10U6D3V5MX-3GP

SC1U10V3KX-3GP

SC1U10V3KX-3GP
220ohm 100MHz SC10U6D3V5MX-3GP AV19 C166 C182
VCCA_SM

SCD1U10V2KX-4GP
L23 AU19 AJ50 SC10U6D3V5MX-3GP
0R0603-PAD VCCA_SM VCC_DMI
DY AU18

2
1D25V_RUN_PEGPLL VCCA_SM
1 2 AU17 VCCA_SM
VCC_SM_CK BK24
AT22 BK23

A SM

SM CK
VCCA_SM VCC_SM_CK
1

C199 AT21 BJ24


SCD1U10V2KX-4GP 1D25V_S0 VCCA_SM VCC_SM_CK 1D8V_TXLVDS_S3 1D8V_S3
AT19 VCCA_SM VCC_SM_CK BJ23
3D3V_S0 3D3V_S0_DIS_LDO AT18
100mA
2

VCCA_SM R304 1
AT17 VCCA_SM 2
AR17 0R0603-PAD
VCCA_SM_NCTF
2

1
C145 C161 C159 AR16 A43 3D3V_S0
VCCA_SM_NCTF VCC_TX_LVDS
SC10U6D3V5MX-3GP

SC1U10V3KX-3GP

R417 R416 C473


3D3VTVDAC 0R3-0-U-GP 0R3-0-U-GP SCD1U10V2KX-4GP SC1KP50V2KX-1GP
100mA
2

2
180ohm 100MHz DY DY BC29 C40

A CK
VCCA_SM_CK VCC_HV

HV
L22 BB29 B40
1

VCCA_SM_CK VCC_HV Tahoe


1 2 1 2
FCM1608CF-1-GP M_VCCA_TVDACA 1D05V_S0
DY TC5 C25 VCCA_TVA_DAC
2nd source:68.00206.041 40mA M_VCCA_TVDACB B25 VCCA_TVA_DAC VCC_PEG AD51
1200mA
C27 VCCA_TVB_DAC VCC_PEG W50

TV

PEG
2 R291 1 M_VCCA_TVDACA ST330U6D3VDM-21GP B27 W51
40mA M_VCCA_TVDACC VCCA_TVB_DAC VCC_PEG

1
0R0402-PAD B28 V49 C151 C132
VCCA_TVC_DAC VCC_PEG
1

2 SC10U6D3V5MX-3GP 2
40mA A28 VCCA_TVC_DAC VCC_PEG V50 DY
C457 C456 SC10U6D3V5MX-3GP

2
SC2D2U6D3V3MX-1-GP 1D5V_S0 1D05V_S0
60mA VCCD_CRT
2

SCD1U10V2KX-4GP M32 AH50


250mA

TV/CRT
VCCD_CRT VCC_RXR_DMI

DMI
L29 AH51
60mA VCCD_TVDAC VCC_RXR_DMI
5mA

1
2 R293 1 M_VCCA_TVDACB 1D25V_S0 1D5VRUN_QDAC N28 C426 C75
0R0402-PAD VCCD_QDAC VTTLF1
A7
250mA

VTTLF
VTTLF
1

AN2 F2 VTTLF2 SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP

2
C460 C459 VCCD_HPLL VTTLF VTTLF3
AH1
SC2D2U6D3V3MX-1-GP 1D25V_RUN_PEGPLL 100mAU48 VTTLF
2

VCCD_PEG_PLL
1

SCD1U10V2KX-4GP
C73 C483 J41

LVDS
VCCD_LVDS

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP H42 C69 C432


150mA
2

VCCD_LVDS
2 R294 1 M_VCCA_TVDACC C444

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
0R0402-PAD SCD1U10V2KX-4GP

2
1

C464 C463 1D05V_S0


SC2D2U6D3V3MX-1-GP D22
2

SCD1U10V2KX-4GP 1 3D3V_S0
1D8V_S3 R310
R60
0R0603-PAD BAS16-1-GP 3 1D05V_HV_S0 2 1
2 11D8V_SUS_DLVDS ENG 83.00016.B11 10R3J-3-GP
1D5V_S0 R41 2
1

0R0603-PAD C191
1 2 VCCD_CRT C198 SC10U6D3V5MX-3GP 5V_S0 3D3V_S0_DIS_LDO
SCD1U10V2KX-4GP U42
2

2
1

C152 C164
1
C142 DY 3 4 1
SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP IN OUT
2 GND DY
2

1
1 SHDN# SET 5

1
R418 DY C455
Wistron Corporation
1

SC1U16V3ZY-GP
C449 16K5R2F-1-GP
1D5V_S0 DY DY
SC1U16V3ZY-GP

G913CF-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

2
L6 74.00913.A3F Taipei Hsien 221, Taiwan, R.O.C.
2

1 2
1 2 1D5VRUN_QDAC
FCM1608CF-1-GP I max = 300 mA Title
1

180ohm 100MHz R419


C148 DY 10KR2F-2-GP GMCH (5 of 6)
SCD1U10V2KX-4GP Size Document Number Rev
2

2 Calado -1
Date: Monday, September 10, 2007 Sheet 10 of 39
A B C D E
5 4 3 2 1

U43I 9 OF 10

A13 VSS VSS AW24


A15 AW29 U43J10 OF 10
U43J10
VSS VSS
A17 VSS VSS AW32
A24 VSS VSS AW5
AA21 VSS VSS AW7 C46 VSS VSS W11
AA24 VSS VSS AY10 C50 VSS VSS W39
AA29 VSS VSS AY24 C7 VSS VSS W43
AB20 VSS VSS AY37 D13 VSS VSS W47
AB23 VSS VSS AY42 D24 VSS VSS W5
AB26 VSS VSS AY43 D3 VSS VSS W7
D AB28 VSS VSS AY45 D32 VSS VSS Y13 D
AB31 VSS VSS AY47 D39 VSS VSS Y2
AC10 VSS VSS AY50 D45 VSS VSS Y41
AC13 VSS VSS B10 D49 VSS VSS Y45
AC3 VSS VSS B20 E10 VSS VSS Y49
AC39 VSS VSS B24 E16 VSS VSS Y5
AC43 VSS VSS B29 E24 VSS VSS Y50
AC47 VSS VSS B30 E28 VSS VSS Y11
AD1 VSS VSS B35 E32 VSS VSS P29
AD21 VSS VSS B38 E47 VSS VSS T29
AD26 VSS VSS B43 F19 VSS VSS T31
AD29 VSS VSS B46 F36 VSS VSS T33
AD3 VSS VSS B5 F4 VSS VSS R28
AD41 VSS VSS B8 F40 VSS
AD45 VSS VSS BA1 F50 VSS
AD49 VSS VSS BA17 G1 VSS
AD5 VSS VSS BA18 G13 VSS
AD50 VSS VSS BA2 G16 VSS VSS AA32
AD8 VSS VSS BA24 G19 VSS VSS AB32
AE10 VSS VSS BB12 G24 VSS VSS AD32
AE14 VSS VSS BB25 G28 VSS VSS AF28
AE6 VSS VSS BB40 G29 VSS VSS AF29
AF20 VSS VSS BB44 G33 VSS VSS AT27
AF23 VSS VSS BB49 G42 VSS VSS AV25
AF24 VSS VSS BB8 G45 VSS VSS H50
AF31 VSS VSS BC16 G48 VSS
AG2 VSS VSS BC24 G8 VSS
AG38 VSS VSS BC25 H24 VSS
AG43 VSS VSS BC36 H28 VSS
C AG47 BC40 H4 C
VSS VSS VSS
AG50 BC51 H45
AH3
AH40
VSS
VSS
VSS
VSS BD13
BD2
J11
J16
VSS
VSS VSS
AH41
AH7
VSS
VSS VSS VSS
VSS BD28
BD45
J2
J24
VSS
VSS
VSS VSS VSS
AH9 VSS VSS BD48 J28 VSS
AJ11 VSS VSS BD5 J33 VSS
AJ13 VSS VSS BE1 J35 VSS
AJ21 VSS VSS BE19 J39 VSS
AJ24 VSS VSS BE23 K12 VSS
AJ29 VSS VSS BE30 K47 VSS
AJ32 VSS VSS BE42 K8 VSS
AJ43 VSS VSS BE51 L1 VSS
AJ45 VSS VSS BE8 L17 VSS
AJ49 VSS VSS BF12 L20 VSS
AK20 VSS VSS BF16 L24 VSS
AK21 VSS VSS BF36 L28 VSS
AK26 VSS VSS BG19 L3 VSS
AK28 VSS VSS BG2 L33 VSS
AK31 VSS VSS BG24 L49 VSS
AK51 VSS VSS BG29 M28 VSS
AL1 VSS VSS BG39 M42 VSS
AM11 VSS VSS BG48 M46 VSS
AM13 VSS VSS BG5 M49 VSS
AM3 VSS VSS BG51 M5 VSS
AM4 VSS VSS BH17 M50 VSS
AM41 VSS VSS BH30 M9 VSS
AM45 VSS VSS BH44 N11 VSS
B B
AN1 VSS VSS BH46 N14 VSS
AN38 VSS VSS BH8 N17 VSS
AN39 VSS VSS BJ11 N29 VSS
AN43 VSS VSS BJ13 N32 VSS
AN5 VSS VSS BJ38 N36 VSS
AN7 VSS VSS BJ4 N39 VSS
AP4 VSS VSS BJ42 N44 VSS
AP48 VSS VSS BJ46 N49 VSS
AP50 VSS VSS BK15 N7 VSS
AR11 VSS VSS BK17 P19 VSS
AR2 VSS VSS BK25 P2 VSS
AR39 VSS VSS BK29 P23 VSS
AR44 VSS VSS BK36 P3 VSS
AR47 VSS VSS BK40 P50 VSS
AR7 VSS VSS BK44 R49 VSS
AT10 VSS VSS BK6 T39 VSS
AT14 VSS VSS BK8 T43 VSS
AT41 VSS VSS BL11 T47 VSS
AT49 VSS VSS BL13 U41 VSS
AU1 VSS VSS BL19 U45 VSS
AU23 VSS VSS BL22 U50 VSS
AU29 VSS VSS BL37 V2 VSS
AU3 VSS VSS BL47 V3 VSS
AU36 VSS VSS C12
AU49 VSS VSS C16
AU51 VSS VSS C19
AV39 VSS VSS C28
AV48 VSS VSS C29
A AW1 VSS VSS C33 A
AW12 VSS VSS C36
AW16 VSS VSS C41
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GMCH (6 of 6)
Size Document Number Rev

Calado -1
Date: Monday, September 10, 2007 Sheet 11 of 39
5 4 3 2 1
A B C D E

DM1 DM2

8,13 M_B_A[14..0]
M_B_A0 102 108 M_B_RAS# 8,13 MH1 MH2
M_B_A1 A0 RAS# MH1 MH2
101 A1 WE# 109 M_B_WE# 8,13 8,13 M_A_A[14..0]
M_B_A2 100 113 M_B_CAS# 8,13 M_A_A0 102 13 M_A_DQS0
M_B_A3 A2 CAS# M_A_A1 A0 DQS0 M_A_DQS1
99 A3 101 A1 DQS1 31 M_A_DQS[7..0] 8
M_B_A4 98 110 M_CS2# 7,13 M_A_A2 100 51 M_A_DQS2
M_B_A5 A4 CS0# M_A_A3 A2 DQS2 M_A_DQS3
97 A5 CS1# 115 M_CS3# 7,13 99 A3 DQS3 70
M_B_A6 94 M_A_A4 98 131 M_A_DQS4
M_B_A7 A6 M_A_A5 A4 DQS4 M_A_DQS5
92 A7 CKE0 79 M_CKE2 7,13 97 A5 DQS5 148
M_B_A8 93 80 M_CKE3 7,13 M_A_A6 94 169 M_A_DQS6
M_B_A9 A8 CKE1 M_A_A7 A6 DQS6 M_A_DQS7
91 A9 92 A7 DQS7 188
M_B_A10 105 30 M_CLK_DDR2 7 M_A_A8 93 11 M_A_DQS#0
M_B_A11 A10/AP CK0 M_A_A9 A8 DQS0# M_A_DQS#1
90 A11 CK0# 32 M_CLK_DDR#2 7 91 A9 DQS1# 29 M_A_DQS#[7..0] 8
M_B_A12 89 M_A_A10 105 49 M_A_DQS#2
4
M_B_A13 A12 M_A_A11 A10/AP DQS2# M_A_DQS#3 4
116 A13 CK1 164 M_CLK_DDR3 7 90 A11 DQS3# 68
M_B_A14 86 166 M_CLK_DDR#3 7 M_A_A12 89 129 M_A_DQS#4
M_B_A15 A14 CK1# M_A_A13 A12 DQS4# M_A_DQS#5
TPAD30 TP42 84 A15 M_B_DM[7..0] 8 116 A13 DQS5# 146
8,13 M_B_BS#2 85 10 M_B_DM0 M_A_A14 86 167 M_A_DQS#6
A16/BA2 DM0 M_B_DM1 M_A_A15 A14 DQS6# M_A_DQS#7
DM1 26 TPAD30 TP43 84 A15 DQS7# 186
8,13 M_B_BS#0 107 52 M_B_DM2 8,13 M_A_BS#2 85
BA0 DM2 M_B_DM3 A16_BA2
8,13 M_B_BS#1 106 BA1 DM3 67 M_A_DM[7..0] 8
130 M_B_DM4 10 M_A_DM0
DM4 M_B_DM5 DM0 M_A_DM1
DM5 147 8,13 M_A_BS#0 107 BA0 DM1 26
M_B_DQ0 5 170 M_B_DM6 8,13 M_A_BS#1 106 52 M_A_DM2
M_B_DQ1 DQ0 DM6 M_B_DM7 BA1 DM2 M_A_DM3
8 M_B_DQ[63..0] 7 DQ1 DM7 185 DM3 67
M_B_DQ2 17 M_A_DQ0 5 130 M_A_DM4
M_B_DQ3 DQ2 M_A_DQ1 DQ0 DM4 M_A_DM5
19 DQ3 8 M_A_DQ[63..0] 7 DQ1 DM5 147
M_B_DQ4 4 195 SMBD_ICH 3,19 M_A_DQ2 17 170 M_A_DM6
M_B_DQ5 DQ4 SDA 3D3V_S0 M_A_DQ3 DQ2 DM6 M_A_DM7
6 DQ5 SCL 197 SMBC_ICH 3,19 19 DQ3 DM7 185
M_B_DQ6 14 M_A_DQ4 4
M_B_DQ7 DQ6 M_A_DQ5 DQ4
16 DQ7 VDDSPD 199 6 DQ5 CK0 30 M_CLK_DDR0 7
M_B_DQ8 23 M_A_DQ6 14 32 M_CLK_DDR#0 7
M_B_DQ9 DQ8 M_A_DQ7 DQ6 CK0#
25 DQ9 SA0 198 16 DQ7 CK1 164 M_CLK_DDR1 7

1
M_B_DQ10 35 200 DDRB_SA02 1 M_A_DQ8 23 166 M_CLK_DDR#1 7
M_B_DQ11 DQ10 SA1 R245 C397 M_A_DQ9 DQ8 CK1#
37 DQ11 25 DQ9
M_B_DQ12 20 50 10KR2J-3-GP SCD1U16V2ZY-2GP M_A_DQ10 35 198

2
M_B_DQ13 DQ12 NC#50 M_A_DQ11 DQ10 SA0 3D3V_S0
22 DQ13 NC#69 69 37 DQ11 SA1 200
M_B_DQ14 36 83 M_A_DQ12 20
M_B_DQ15 DQ14 NC#83 M_A_DQ13 DQ12
38 DQ15 NC#120 120 22 DQ13 VDD_SPD 199
M_B_DQ16 43 163 M_A_DQ14 36
M_B_DQ17 DQ16 NC#163/TEST M_A_DQ15 DQ14
45 DQ17 38 DQ15

1
M_B_DQ18 55 M_A_DQ16 43 81
M_B_DQ19 DQ18 M_A_DQ17 DQ16 VDD C23
57 DQ19 VDD 81 45 DQ17 VDD 82
M_B_DQ20 44 82 M_A_DQ18 55 87 SCD1U16V2ZY-2GP

2
M_B_DQ21 DQ20 VDD M_A_DQ19 DQ18 VDD
46 87 57 88
REVERSE TYPE

REVERSE TYPE
3 M_B_DQ22 DQ21 VDD M_A_DQ20 DQ19 VDD 3
56 DQ22 VDD 88 44 DQ20 VDD 95
M_B_DQ23 58 95 M_A_DQ21 46 96
M_B_DQ24 DQ23 VDD M_A_DQ22 DQ21 VDD
61 DQ24 VDD 96 56 DQ22 VDD 103
M_B_DQ25 63 103 M_A_DQ23 58 104
M_B_DQ26 DQ25 VDD M_A_DQ24 DQ23 VDD
73 DQ26 VDD 104 61 DQ24 VDD 111
M_B_DQ27 75 111 M_A_DQ25 63 112 1D8V_S3
M_B_DQ28 DQ27 VDD 1D8V_S3 M_A_DQ26 DQ25 VDD
62 DQ28 VDD 112 73 DQ26 VDD 117
M_B_DQ29 64 117 M_A_DQ27 75 118
M_B_DQ30 DQ29 VDD M_A_DQ28 DQ27 VDD
74 DQ30 VDD 118 62 DQ28
M_B_DQ31 76 M_A_DQ29 64 2
M_B_DQ32 DQ31 M_A_DQ30 DQ29 VSS
123 DQ32 VSS 3 74 DQ30 VSS 3
M_B_DQ33 125 8 M_A_DQ31 76 8
M_B_DQ34 DQ33 VSS M_A_DQ32 DQ31 VSS
135 DQ34 VSS 9 123 DQ32 VSS 9
M_B_DQ35 137 12 M_A_DQ33 125 12
M_B_DQ36 DQ35 VSS M_A_DQ34 DQ33 VSS
124 DQ36 VSS 15 135 DQ34 VSS 15
M_B_DQ37 126 18 M_A_DQ35 137 18
M_B_DQ38 DQ37 VSS M_A_DQ36 DQ35 VSS
134 DQ38 VSS 21 124 DQ36 VSS 21
M_B_DQ39 136 24 M_A_DQ37 126 24
M_B_DQ40 DQ39 VSS M_A_DQ38 DQ37 VSS
141 DQ40 VSS 27 134 DQ38 VSS 27
M_B_DQ41 143 28 M_A_DQ39 136 28
M_B_DQ42 DQ41 VSS M_A_DQ40 DQ39 VSS
151 DQ42 VSS 33 141 DQ40 VSS 33
M_B_DQ43 153 34 M_A_DQ41 143 34
M_B_DQ44 DQ43 VSS M_A_DQ42 DQ41 VSS
140 DQ44 VSS 39 151 DQ42 VSS 39
M_B_DQ45 142 40 M_A_DQ43 153 40
M_B_DQ46 DQ45 VSS M_A_DQ44 DQ43 VSS
152 DQ46 VSS 41 140 DQ44 VSS 41
M_B_DQ47 154 42 M_A_DQ45 142 42
M_B_DQ48 DQ47 VSS M_A_DQ46 DQ45 VSS
157 DQ48 VSS 47 152 DQ46 VSS 47
M_B_DQ49 159 48 M_A_DQ47 154 48
M_B_DQ50 DQ49 VSS M_A_DQ48 DQ47 VSS
173 DQ50 VSS 53 157 DQ48 VSS 53
M_B_DQ51 175 54 M_A_DQ49 159 54
M_B_DQ52 DQ51 VSS M_A_DQ50 DQ49 VSS
158 DQ52 VSS 59 173 DQ50 VSS 59
M_B_DQ53 160 60 M_A_DQ51 175 60
2
M_B_DQ54 DQ53 VSS M_A_DQ52 DQ51 VSS 2
174 DQ54 VSS 65 158 DQ52 VSS 65
M_B_DQ55 176 66 M_A_DQ53 160 66
M_B_DQ56 DQ55 VSS M_A_DQ54 DQ53 VSS
179 DQ56 VSS 71 174 DQ54 VSS 71
M_B_DQ57 181 72 M_A_DQ55 176 72
M_B_DQ58 DQ57 VSS M_A_DQ56 DQ55 VSS
189 DQ58 VSS 77 179 DQ56 VSS 77
M_B_DQ59 191 78 M_A_DQ57 181 78
M_B_DQ60 DQ59 VSS M_A_DQ58 DQ57 VSS
180 DQ60 VSS 121 189 DQ58 VSS 121
M_B_DQ61 182 122 M_A_DQ59 191 122
M_B_DQ62 DQ61 VSS M_A_DQ60 DQ59 VSS
192 DQ62 VSS 127 180 DQ60 VSS 127
M_B_DQ63 194 128 M_A_DQ61 182 128
DQ63 VSS M_A_DQ62 DQ61 VSS
VSS 132 192 DQ62 VSS 132
M_B_DQS#0 11 133 M_A_DQ63 194 133
M_B_DQS#1 DQS0# VSS DQ63 VSS
8 M_B_DQS#[7..0] 29 DQS1# VSS 138 VSS 138
M_B_DQS#2 49 139 50 139
M_B_DQS#3 DQS2# VSS NC#50 VSS
68 DQS3# VSS 144 69 NC#69 VSS 144
M_B_DQS#4 129 145 83 145
M_B_DQS#5 DQS4# VSS NC#83 VSS
146 DQS5# VSS 149 120 NC#120 VSS 149
M_B_DQS#6 167 150 163 150
M_B_DQS#7 DQS6# VSS NC#163/TEST VSS
186 DQS7# VSS 155 VSS 155
VSS 156 7,13 M_CS0# 110 CS0# VSS 156
M_B_DQS0 13 161 7,13 M_CS1# 115 161
M_B_DQS1 DQS0 VSS CS1# VSS
8 M_B_DQS[7..0] 31 DQS1 VSS 162 7,13 M_CKE0 79 CKE0 VSS 162
M_B_DQS2 51 165 7,13 M_CKE1 80 165
M_B_DQS3 DQS2 VSS CKE1 VSS
70 DQS3 VSS 168 8,13 M_A_RAS# 108 RAS# VSS 168
M_B_DQS4 131 171 8,13 M_A_CAS# 113 171
M_B_DQS5 DQS4 VSS CAS# VSS
148 DQS5 VSS 172 8,13 M_A_WE# 109 WE# VSS 172
M_B_DQS6 169 177 177
M_B_DQS7 DQS6 VSS SMBC_ICH VSS
188 DQS7 VSS 178 197 SCL VSS 178
DDR_VREF_S3 183 SMBD_ICH 195 183
VSS DDR_VREF_S3 SDA VSS
7,13 M_ODT2 114 OTD0 VSS 184 VSS 184
7,13 M_ODT3 119 OTD1 VSS 187 7,13 M_ODT0 114 ODT0 VSS 187
1 190 119 190 1
VSS 7,13 M_ODT1 ODT1 VSS
1 VREF VSS 193 VSS 193
2 VSS VSS 196 1 VREF VSS 196
1

C208 DY C212
1

1
SC4D7U6D3V3KX-GP

SCD1U16V2ZY-2GP

DY C211
202 GND GND 201
C207
201 GND GND 202
Wistron Corporation
2

SC4D7U6D3V3KX-GP

SCD1U16V2ZY-2GP

MH1 MH2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


2

MH1 MH2 Taipei Hsien 221, Taiwan, R.O.C.


SKT-SODIMM20022U2GP
DDR2-200P-23-GP-U1 Title
62.10017.691
62.10017.A71
DDR2 Socket
Size Document Number Rev
High 9.2mm High 5.2mm
Calado -1
Date: Wednesday, September 12, 2007 Sheet 12 of 39
A B C D E
A B C D E

DDR_VREF_S0
PARALLEL TERMINATION
RN14 Put decap near power(0.9V) and pull-up resistor Decoupling Capacitor
8 1 M_CKE0 7,12
7 2 M_CKE1 7,12
6 3 M_A_BS#2 8,12
5 4 M_A_A12

SRN56J-5-GP Put decap near power(0.9V)


RN11 DDR_VREF_S0
8 1 M_B_A9
and pull-up resistor
4 7 2 M_B_A5 4
6 3 M_B_A8
5 4

1
C71 C86 C85 C103 C88 C78 C101 C121 C70 C100 C120

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SRN56J-5-GP
RN15 DY DY DY DY DY

2
8 1 M_CKE2 7,12
7 2 M_CKE3 7,12
6 3 M_B_BS#2 8,12
5 4 M_B_A12
SRN56J-5-GP
RN7
8 1 M_B_A3 M_A_A[14..0]
M_A_A[14..0] 8,12
7 2 M_B_A1
6 3 M_B_A10 M_B_A[14..0]
M_B_A[14..0] 8,12
5 4 M_B_WE# 8,12

1
C127 C89 C105 C144 C129 C153 C96 C116 C134 C74 C130

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SRN56J-5-GP
RN3 DY DY DY DY DY DY DY

2
8 1 M_B_A13
7 2 M_ODT2 7,12
6 3 M_ODT3 7,12
5 4 M_B_RAS# 8,12
SRN56J-5-GP

RN8
8 1 M_B_BS#1 8,12
3 M_B_A2 3
7
6
2
3 M_B_A0 1D8V_S3 Place these Caps near DM1
5 4 M_B_A4

SRN56J-5-GP

1
C84 C124 C102 C95
RN12 C107

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP
8 1 M_B_A14 SC2D2U6D3V3MX-1-GP

2
7 2 M_B_A6
6 3 M_B_A7
5 4 M_B_A11

SRN56J-5-GP

RN2
8 1 M_B_BS#0 8,12
7 2 M_B_CAS# 8,12
6 3 M_CS3# 7,12
5 4 M_CS2# 7,12

1
C77 C113 C118 C94

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SRN56J-5-GP
DY DY DY DY

2
RN4
8 1 M_A_A13
7 2 M_ODT0 7,12
6 3 M_CS0# 7,12
5 4 M_A_RAS# 8,12
SRN56J-5-GP
2 2

RN9
8 1 M_A_BS#1 8,12
7 2 M_A_A2
M_A_A0
6
5
3
4 M_A_A4 1D8V_S3 Place these Caps near DM2
SRN56J-5-GP

1
RN5 C445 C454 C72 C450 C137

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP
8 1 M_A_CAS# 8,12 SC2D2U6D3V3MX-1-GP
7 2
2

2
6 3 M_CS1# 7,12
5 4 M_ODT1 7,12
SRN56J-5-GP

RN10
8 1 M_A_A9
7 2 M_A_A8
6 3 M_A_A5
5 4 M_A_A3
1

1
C452 C80 C442 C447
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SRN56J-5-GP
DY DY DY DY
2

2
RN13
8 1 M_A_A6
7 2 M_A_A7
1 6 3 M_A_A11 1
5 4 M_A_A14

SRN56J-5-GP
Wistron Corporation
RN6 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
8 1 M_A_A1 Taipei Hsien 221, Taiwan, R.O.C.
7 2 M_A_A10
6 3 Title
M_A_BS#0 8,12
5 4 M_A_WE# 8,12
DDR2 Termination Resistor
SRN56J-5-GP Size Document Number Rev

Calado -1
Date: Wednesday, September 12, 2007 Sheet 13 of 39
A B C D E
26
26
DMIC_12
DMIC_CLK
DMIC_12
DMIC_CLK
R423 1 33R2J-2-GP
2 DMIC_12_1
R422 1 33R2J-2-GP
2 DMIC_CLK_1
LCD/INVERTER CONN LED Q26
LCDVDD GND 2

1
PD EC71
SC33P50V2JN-3GP EC72 3 OUT PWRLED#_DB on Front Panel
SC33P50V2JN-3GP LCD1 R2 5V_S0

1
IN R1 LED3
41 28 PWR_G_LED 1
40 1 C3 1 R411 2 FRONT_PWRLED#_R 3 1
ENG SC1U6D3V3KX-1GP CHDTA143ZUPT-GP 100R2J-2-GP 5V_S5

2
17 USBPN8 2 0R0402-PAD
1 R196 USB_8- 39 2 Power: 84.00143.J11
17 USBPP8 2 0R0402-PAD
1 R198 USB_8+ 38 3 Q25 1 R414 2 STDBY_LED#_R 4 2
37 4 BLON_5V BLUE : S0 GND 2 100R2J-2-GP
3D3V_S0 DMIC_12_1 LED-BO-4-GP
36 5 GMCH_TXAOUT2- 7 Orange : S3
DMIC_CLK_1 35 6 GMCH_TXAOUT2+ 7 3 OUT STDBY_LED#_DB
1DY 2 EC70 34 7 GMCH_TXAOUT1- 7 Orange Blinking : Enter S4 R2 83.00195.G70
SCD1U10V2MX-3GP CLK_DDC_EDID IN R1
33 8 GMCH_TXAOUT1+ 7 ODD CHANNEL 28 PWR_O_LED 1
DAT_DDC_EDID 32 9 GMCH_TXAOUT0- 7
31 10 GMCH_TXAOUT0+ 7 CHDTA143ZUPT-GP
7 L_BKLTCTL R200 1 2 CCD_PWR 30 11 GMCH_TXACLK- 7 84.00143.J11
0R2J-2-GP DY 29 12 GMCH_TXACLK+ 7
28 BRIGHTNESS R199 1 2 BRIGHTNESS_CN 28 13
28 BLON_OUT 0R2J-2-GP BLON_OUT 27 14 Q23
26 15 GND 2
1

25 16 EVEN CHANNEL
1

1
R197 C356 C355 DCBATOUT 24 17 3 OUT CHARGE_LED#_DB on Front Panel 3D3V_S5
SC100P50V2JN-3GP

10KR2J-3-GP DY DY F1 23 18 R2
R1
SC100P50V2JN-3GP

1 2 22 19 IN 1 LED2
2

28 CHARGE_LED
21 20 Charger: 1 R410 2 CHARGE_LED#_R 4 2
2

1
69.44001.041 42 CHDTA143ZUPT-GP 100R2J-2-GP
Green: Battary Full 84.00143.J11
C1 ACES-CONN40C-1-GP OFF : Battery or DC only Q24 1 R413 2 DC_BATFULL#_R 3 1
2

SC10U25V6KX-1GP 20.F1047.040 GND 2 100R2J-2-GP


Orange : Charging LED-GY-14-GP
Orange Blink : Battery low 3 OUT DC_BATFULL#_DB
R2
1nd source: 20.F1047.040 IN R1 83.00195.I70
28 DC_BATFULL 1

CHDTA143ZUPT-GP
3D3V_S0 84.00143.J11
ENG
5V_S0
ENG 5V_S5
Q1
1
2

RN29 U55 GND 2


DY R1 LED1
BLON_5V 1 VOUT VIN 5 3 OUT L-line_LED# 1 2 L-line_LED#_1 K A
2 R2 100R2J-2-GP
GND
1

SRN4K7J-8-GP C581 C582 BLON_OUT IN R1 LED-B-77-GP-U2


3 NC#3 EN/EN# 4 28 L-line_LED 1
SC4D7U10V5ZY-3GP

83.01221.I70
4
3

SCD1U10V2MX-3GP

DY DY CHDTA143ZUPT-GP
2

7 CLK_DDC_EDID
RT9711-APBG-GP U55 for LED panel 84.00143.J11
7 DAT_DDC_EDID 74.09711.A7F
1

EC74 DY
SC100P50V2JN-3GP R401 R396
LCDVDD 3D3V_S0 33R2J-2-GP 75R2J-1-GP
2
1

EC73 DY 1 2 WLAN_LED#_1 1 2 WLAN_LED#


SC100P50V2JN-3GP U1 24 WLAN_LED#_MC
2

1 6

D
OUT IN Q10
2 GND GND 5
7 GMCH_LCDVDD_ON 3 ON/OFF# IN 4 Q1 Q23 Q24 Q25 Q26 Q27 change to 84.00143.D1K

1
1

C4 C5 C7 G
SC1U6D3V3KX-1GP 28 WLAN_TEST_LED
DY

2
SC1U6D3V3KX-1GP

SCD1U10V2MX-3GP

AAT4280IGU-1-T1GP 2N7002-11-GP

S
2

3D3V_S0 74.04280.C9P ENG 84.27002.W31


F2
Q27
CCD_PWR 1 2 GND 2
1

69.50007.951 3 OUT BT_LED#


C2 C354 R2
SC4D7U6D3V5KX-3GP SCD1U10V2MX-3GP IN R1
1
2

5V_S0 3D3V_S0 28 BT_LED


CHDTA143ZUPT-GP
84.00143.J11

1
C378
C370 SC1U6D3V3KX-1GP

2
PWR BD SC1U6D3V3KX-1GP

21
CN1 A-BUTTON# EC78 1DY 2 SC100P50V2JN-3GP
PD WLAN_LED# EC94 1DY 2 SC100P50V2JN-3GP
1 BT_LED# EC93 1DY 2 SC100P50V2JN-3GP
2 PWRLED#_DB EC92 1DY 2 SC100P50V2JN-3GP
3D3V_S0 TP170 TPAD30 3 STDBY_LED#_DB EC91 1DY 2 SC100P50V2JN-3GP
3D3V_AUX_S5 5V_S5 4 MEDIA_LED# EC86 1DY 2 SC100P50V2JN-3GP
5V_S0 TP171 TPAD30 WLAN_LED# 5 NUM_LED# EC85 1DY 2 SC100P50V2JN-3GP
1 2 BT_LED# 6 CAP_LED# EC83 1DY 2 SC100P50V2JN-3GP
1

5V_S5 TP172 TPAD30 7


C367 PWRLED#_DB 8 INTERNET# EC82 1DY 2 SC100P50V2JN-3GP
WLAN_LED# TP173 TPAD30 R206 D16 SC1U6D3V3KX-1GP STDBY_LED#_DB 9 WIRELESS_BTN# EC79 1DY 2 SC100P50V2JN-3GP
BT_LED# TP175 TPAD30 10KR2J-3-GP 2 10 BT_BTN# EC76 1DY 2 SC100P50V2JN-3GP
PWRLED#_DB TP174 TPAD30 R207 21 ODD_LED# 3 MEDIA_LED# 11 MAIL# EC77 1DY 2 SC100P50V2JN-3GP
2

STDBY_LED#_DB TP177 TPAD30 470R2J-2-GP NUM_LED# 12 KBC_PWRBTN#_CNEC80 1DY 2 SC100P50V2JN-3GP


MEDIA_LED# TP176 TPAD30 KBC_PWRBTN#_CN 1 BAW56PT-U 28 NUM_LED# CAP_LED#
2 KBC_PWRBTN# 28 1 28 CAP_LED# 13
NUM_LED# TP179 TPAD30 16 SATA_LED# 83.00056.E11 14
CAP_LED# TP178 TPAD30 A-BUTTON# 15 <Core Design>
28 A-BUTTON#
1

A-BUTTON# TP180 TPAD30 INTERNET# 16


28 INTERNET#
2

INTERNET# TP182 TPAD30 G67 C358 WIRELESS_BTN# 17


WIRELESS_BTN# TP181 TPAD30 28 WIRELESS_BTN# BT_BTN#
GAP-OPEN 28 BT_BTN# 18
Wistron Corporation
SCD1U10V2MX-3GP

BT_BTN# TP183 TPAD30 MAIL# 19


1

MAIL# TP185 TPAD30 28 MAIL# KBC_PWRBTN#_CN 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
20
2

KBC_PWRBTN#_CN TP184 TPAD30 Taipei Hsien 221, Taiwan, R.O.C.

MLX-CON20-5GP Title

22
LCD CONN & LED & PWR BD
20.K0227.020 Size Document Number Rev

Calado -1
Date: Wednesday, September 12, 2007 Sheet 14 of 39
A B C D E

Layout Note:
Place these resistors
close to the CRT-out
Ferrite bead impedance: 22 ohm@100MHz
from 10 ohm change to 22 ohm for EMI D5
5V_S0 CRT I/F & CONNECTOR
connector
L5
2
1 2 CRT_R
7 GMCH_RED FCB1608CF-220T05-GP CRT_R 3 DY
1 CRT1
L4
17
1 2 CRT_G
7 GMCH_GREEN FCB1608CF-220T05-GP BAV99-5-GP
D4 6
4
5V_CRT_S0 CRT_R 1 11 4
L3 2
7
1 2 CRT_B CRT_G 3 DY CRT_G 2 12 DAT_DDC1_5
7 GMCH_BLUE FCB1608CF-220T05-GP 8

1
R251 R244 R234 C400 C392 C387 C401 C393 C388 1 CRT_B 3 13 CRT_HSYNC1 C395

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP
5V_CRT_S0 9 DY

1
SC6P50V2CN-1GP

SC6P50V2CN-1GP

SC6P50V2CN-1GP
150R2F-1-GP

150R2F-1-GP

150R2F-1-GP
4 14 CRT_VSYNC1 C391 SC100P50V2JN-3GP

2
BAV99-5-GP

1
DY DY DY D3 10

SC18P50V2JN-1-GP
2 C385 5 15 CLK_DDC1_5

2
1
2 SCD01U16V2KX-3GP C379

1
16 C377

SC18P50V2JN-1-GP
CRT_B 3 DY DY

2
SC100P50V2JN-3GP
2
1 3D3V_S0 SYN-CONN15-GP
Layout Note: 20.20326.015
BAV99-5-GP

1
* Must be a ground return path between this ground and the ground on R209 5V_S0 PD
D2
the VGA connector. 10KR2J-3-GP
2
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT R216

2
2 0R0402-PAD
1 CRT_DEC_R 3 DY
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN. 28 CRT_DEC#
change to 20.20378.015

1
C363 1

SC100P50V2JN-3GP
R210 DY
0R2J-2-GP

2
BAV99-5-GP
DY

2
3 3
Hsync & Vsync level shift

5V_S0

1
5V_S0
C359 ENG
SCD1U16V2ZY-2GP
2

2
D6
BAS16-1-GP
14

R220 5V_CRT_S0
2 CRT_HSYNC1_R 1
3 2CRT_HSYNC1
7 GMCH_HSYNC 0R2J-2-GP 3D3V_S0 F3

3
U5A 1 2
TSAHCT125PW-GP
14

7
4

FUSE-1A8V-GP

5
6
7
8
R219
5 6 CRT_VSYNC1_R 1 2CRT_VSYNC1 RN30
7 GMCH_VSYNC 0R2J-2-GP SRN10KJ-6-GP
1

C369 C368 U5B


SC18P50V2JN-1-GP

SC18P50V2JN-1-GP TSAHCT125PW-GP
DDC_CLK & DATA level shift
7
2

4
3
2
1
DY DY
2 3D3V_S0 2

TVOUT1
Q16
C438

TV CONN 1 DY2 SC33P50V2JN-3GP


L21
9

1
GND
7 GMCH_DDCDATA 4 3 DAT_DDC1_5

LUMA_1 GND
7 TV_DACB 1 2 4 LUMA 5 2
FCM1608K-151T06-GP 2 NC#2
1

C440 C441 5 6 1
R283 SC6P50V2CN-1GP SC6P50V2CN-1GP NC#5
7 COMP
150R2F-1-GP 6
2

CRMA 2N7002DW-1-GP
3 GND 7 GMCH_DDCCLK
84.27002.D3F CLK_DDC1_5
2

8 GND
C434
1 DY2 SC33P50V2JN-3GP MINDIN7-26-GP

L20 22.10021.J81
1 2 COMP_1 PD
7 TV_DACA FCM1608K-151T06-GP
1

C435 C436
R281 SC6P50V2CN-1GP SC6P50V2CN-1GP
150R2F-1-GP
change to 22.10021.H61
2

2
2

1 1
C420
1 DY2 SC33P50V2JN-3GP

L16 Wistron Corporation


1 2 CRMA_1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
7 TV_DACC FCM1608K-151T06-GP Taipei Hsien 221, Taiwan, R.O.C.
1

C421 C422
R274 SC6P50V2CN-1GP SC6P50V2CN-1GP Title
150R2F-1-GP
CRT/TV Connector
2

Size Document Number Rev


2

Ferrite bead impedance: 150 ohm@100MHz 100mA(min) design recommend Calado -1


Date: Thursday, September 13, 2007 Sheet 15 of 39
A B C D E
A B C D E

C560 SC12P50V2JN-3GP
1 2 RCT_X1

4
X5

1
3D3V_AUX_S5
D13 R371
2 RTC_AUX_S5 10MR2J-L-GP

2
4 X-32D768KHZ-38GPU 4

1
1 82.30001.691
C285

RTC_BAT_R
BAS40CW-GP SC1U16V3ZY-GP C559 SC12P50V2JN-3GP U49A 1 OF 6

2
83.00040.E81
RTC circuitry 1 2
AG25 E5
RTCX1 FWH0/LAD0 LPC_LAD0 28
RTC1 RCT_X2 AF24 F5
RTCX2 FWH1/LAD1 LPC_LAD1 28
R130 G8
FWH2/LAD2 LPC_LAD2 28
1 RTC_BAT 1 2 1 20KR2J-L2-GP
2 RTC_RST# AF23 F6
PWR RTCRST# FWH3/LAD3 LPC_LAD3 28
2

RTC
GND R382 INTRUDER# AD22
NP1 NP1 1 2 INTRUDER# FWH4/LFRAME# C4 LPC_LFRAME# 28

LPC
NP2 1KR2J-1-GP DY
NP2
2

1
R129 C300 INTVRMEN AF25 G9 LDRQ0#_SB 1 2 LDRQ0# 28
C568 1MR2J-1-GP SC1U16V3ZY-GP LAN100_SLP INTVRMEN LDRQ0# 3D3V_LDRQ1_S0 R76 0R2J-2-GP
AD21 E6
BAT-CON2-1-GP-U DY SCD1U16V2ZY-2GP
LAN100_SLP LDRQ1#/GPIO23 TP89 TPAD30 1D05V_S0
1

2
62.70001.011 B24 GLAN_CLK A20GATE AF13 KA20GATE 28

1
A20M# AG26 H_A20M# 4
TPAD30 TP87 LAN_RSTYNC D22 R148
LAN_RSTSYNC H_DPRSTP# 56R2J-4-GP
DPRSTP# AF26 H_DPRSTP# 4,7,32

LAN/GLAN
C21 LAN_RXD0 DPSLP# AE26 H_DPSLP# 4
B21

2
LAN_RXD1
C22 LAN_RXD2 FERR# AD24 H_FERR# 4

D21 LAN_TXD0 CPUPWRGD/GPIO49 AG29 H_PWRGD 4,30,38


3D3V_S5 E20 LAN_TXD1
C20 LAN_TXD2 IGNNE# AF27 H_IGNNE# 4
1D5V_S0
1 2 GLAN_DOCK# AH21 GLAN_DOCK#/GPIO13 INIT# AE24 H_INIT# 4
GLAN_COMP place within 500 mil of ICH8M R173 10KR2J-3-GP AC20 H_INTR 4 1D05V_S0
INTR
3 EMI capacitor 1 2 GLAN_COMP D25 GLAN_COMPI RCIN# AH14 KBRCIN# 28
3
2 R175 1 R109 24D9R2F-L-GP C25

CPU
21 ACZ_BTCLK_MDC GLAN_COMPO

2
22R2J-2-GP AD23 H_NMI 4
EC67 R176 1 ACZ_BIT_CLK NMI R158
26 ACZ_BITCLK 2 AJ16 HDA_BIT_CLK SMI# AG28 H_SMI# 4
2 1 ACZ_BTCLK_MDC 22R2J-2-GP AJ15 56R2J-4-GP
ACZ_SYNC_R HDA_SYNC
1 2 AA24
DYSC22P50V2JN-4GP 21,26 ACZ_SYNC
R185 22R2J-2-GP AE14
STPCLK# H_STPCLK# 4 R159

1
R184 2 0R0402-PAD ACZ_RST#_R HDA_RST# H_THERMTRIP_R
21,26 ACZ_RST# 1 THRMTRIP# AE27 1 DY 2 PM_THRMTRIP-A# 4,7,30
26 ACZ_SDATAIN0 AJ17 24D9R2F-L-GP
HDA_SDIN0 ICH_TP8 TP105 TPAD30
AH17 AA23

IHDA
21 ACZ_SDATAIN1 HDA_SDIN1 TP8
ACZ_SDIN2 AH15
TPAD30 TP115 ACZ_SDIN3 HDA_SDIN2
AD13 HDA_SDIN3 DD0 V1 IDE_PDD0 21
3D3V_S0 TPAD30 TP109 U2
DD1 IDE_PDD1 21
21,26 ACZ_SDATAOUT R177 1 2 ACZ_SDATAOUT_R AE13 V3 IDE_PDD2 21
39R2J-L-GP HDA_SDOUT DD2 Layout Note: R133 needs to placed
DD3 T1 IDE_PDD3 21
1 DY 2 HDA_DOCK_EN# AE10 V4 within 2" of ICH7, R334 must be placed
HDA_DOCK_EN#/GPIO33 DD4 IDE_PDD4 21
TPAD30 TP113 HDA_DOCK_RST# R146 8K2R2J-3-GP AG14 T5 within 2" of R169 w/o stub.
HDA_DOCK_RST#/GPIO34 DD5 IDE_PDD5 21
DD6 AB2 IDE_PDD6 21
14 SATA_LED# AF10 SATALED# DD7 T6 IDE_PDD7 21
DD8 T3 IDE_PDD8 21
21 SATA_RXN0 C338 1 2 SC3900P50V2KX-2GP SATA_RXN0_C AF6 R2 IDE_PDD9 21
C339 SC3900P50V2KX-2GP SATA_RXP0_C SATA0RXN DD9
21 SATA_RXP0 1 2 AF5 SATA0RXP DD10 T4 IDE_PDD10 21
21 SATA_TXN0 C341 1 2 SC3900P50V2KX-2GP SATA_TXN0_C AH5 V6 IDE_PDD11 21
C340 SC3900P50V2KX-2GP SATA_TXP0_C SATA0TXN DD11
21 SATA_TXP0 1 2 AH6 SATA0TXP DD12 V5 IDE_PDD12 21
DD13 U1 IDE_PDD13 21

IDE
AG3 SATA1RXN DD14 V2 IDE_PDD14 21
ENG AG4 SATA1RXP DD15 U6 IDE_PDD15 21
AJ4

SATA
SATA1TXN
AJ3 SATA1TXP DA0 AA4 IDE_PDA0 21
2 2
DA1 AA1 IDE_PDA1 21
AF2 SATA2RXN DA2 AB3 IDE_PDA2 21
AF1 SATA2RXP
AE4 SATA2TXN DCS1# Y6 IDE_PDCS1# 21
AE3 SATA2TXP DCS3# Y5 IDE_PDCS3# 21

3 CLK_PCIE_SATA# AB7 SATA_CLKN DIOR# W4 IDE_PDIOR# 21


3 CLK_PCIE_SATA AC6 SATA_CLKP DIOW# W3 IDE_PDIOW# 21
DDACK# Y2 IDE_PDDACK# 21
SATARBIAS AG1 Y3 INT_IRQ14 21
SATARBIAS# IDEIRQ
1 2 AG2 SATARBIAS IORDY Y1 IDE_PDIORDY 21
R163 24D9R2F-L-GP W5
DDREQ IDE_PDDREQ 21
Place within 500 mils of
ICH8 ball ICH8-M-1-GP-U-NF

Change to 24.9 1% ohm


when use SATA HD

RTC_AUX_S5 RTC_AUX_S5
1

1 <Core Design> 1
R142 R149
330KR2F-L-GP 330KR2F-L-GP
integrated VccSus1_05,VccSus1_5,VccCL1_5 Wistron Corporation
2

INTVRMEN LAN100_SLP INTVRMEN High=Enable Low=Disable 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
1

integrated VccLan1_05VccCL1_05
R141 R137 Title
DY 0R2J-2-GP DY 0R2J-2-GP LAN100_SLP High=Enable Low=Disable
ICH8-M (1 of 4)
Size Document Number Rev
2

Calado -1
Date: Wednesday, September 12, 2007 Sheet 16 of 39
A B C D E
A B C D E

U49D 4 OF 6
RN26
U49C3 OF 6 AJ26 AJ12 SATA0GP SATA2GP 1 8 3D3V_S0
19,24 SMB_CLK SMBCLK SATA0GP/GPIO21

GPIO
AD19 AJ10 SATA1GP ICH_GPIO37 2 7

SATA
19,24 SMB_DATA SMBDATA SATA1GP/GPIO19

SMB
D20 A4 PCI_REQ#0 SMB_LINK_ALERT#
AG21 AF11 SATA2GP SATA0GP 3 6
E19
AD0
AD1
PCI REQ0#
GNT0# D7 PCI_GNT#0 TP146 TPAD30 SMLINK0 AC17
LINKALERT#
SMLINK0
SATA2GP/GPIO36
GPIO37 AG11 ICH_GPIO37 SATA1GP 4 5
D19 E18 PCI_REQ#1 SMLINK1 AE19
AD2 REQ1#/GPIO50 PCI_GNT#1 TP86 TPAD30 SMLINK1 SRN8K2J-1-GP
A20 AD3 GNT1#/GPIO51 C18 CLK14 AG9 CLK_ICH14 3
PCI_REQ#2 PM_RI#

CLOCKS
D17 AD4 REQ2#/GPIO52 B19 AF17 RI# CLK48 G5 CLK48_ICH 3
A21 F18 PCI_GNT#2 TP92 TPAD30
AD5 GNT2#/GPIO53 PCI_GNT#3 TP147 TPAD30 TPAD30 TP95 PM_SUS_STAT#
A19 AD6 GNT3#/GPIO55 C10 F4 SUS_STAT#/LPCPD# SUSCLK D3 PM_SUS_CLK 20
C19 A11 PCI_REQ#3 TP81 TPAD30 DBRESET# AD15
AD7 REQ3#/GPIO54 SYS_RESET#
A18 AD8 SLP_S3# AG23 PM_SLP_S3# 24,28,30,34,35
4 B16 C17 PCI_C/BE#0 TP83 TPAD30 7 PM_BMBUSY# AG12 AF21 PM_SLP_S4# 24,28,34,35 4
AD9 C/BE0# PCI_C/BE#1 TP99 TPAD30 BMBUSY#/GPIO0 SLP_S4# SLPS5#
A12 AD10 C/BE1# E15 SLP_S5# AD18
E16 F16 PCI_C/BE#2 TP94 TPAD30 SMB_ALERT# AG22 TP110 TPAD30
AD11 C/BE2# PCI_C/BE#3 TP88 TPAD30 SMBALERT#/GPIO11 S4_STATE#
A14 AD12 C/BE3# E17 S4_STATE#/GPIO26 AH27
G16 3 PM_STPPCI# AE20 TP112 TPAD30
AD13 PCI_IRDY# STP_PCI# R178
A15 AD14 IRDY# C8 3 PM_STPCPU# AG18 STP_CPU# PWROK AE23 PWROK 7,20
B6 D9 PCI_PAR TP91 TPAD30 100R2J-2-GP
AD15 PAR

SYSGPIO
C11 G6 PCIRST# 1 2 PCIRST1# 21,22,24 AH11 AJ14 PM_DPRSLPVR_R 2 1 PM_DPRSLPVR 7,32
AD16 PCIRST# 28 PM_CLKRUN# CLKRUN# DPRSLPVR/GPIO16
A9 D16 PCI_DEVSEL# R186 1 2DY
AD17 DEVSEL# PCI_PERR# R112 PM_BATLOW#_R 100KR2J-1-GP
D11 A7 AE17 AE21

POWER MGT
AD18 PERR# 22,24 PCIE_WAKE# WAKE# BATLOW#
B12 A17 PCI_FRAME# 56R2J-4-GP AF12 D23
AD19 FRAME# 28 INT_SERIRQ SERIRQ
C12 B7 PCI_LOCK# 20 THRM# AC13 C2 PWRBTN#_ICH 1 BAS16-1-GP PM_PWRBTN# 28,38
AD20 PLOCK# PCI_SERR# 3D3V_S0 THRM# PWRBTN#
D10 AD21 SERR# F10
C7 C16 PCI_STOP# 32 VGATE_PWRGD AJ20 AH20 PLT_RST1# 3
AD22 STOP# PCI_TRDY# VRMPWRGD LAN_RST#
F13 AD23 TRDY# C9

10KR2J-3-GP
E11 R391 1 DY2 ICH_TP7 AJ22 AG27 RSMRST#_SB 2
AD24 TP7 RSMRST#

1
E13 AG24 PLT_RST# 2 0R0402-PAD
1 R171 0R2J-2-GP
AD25 PLTRST# PLT_RST1# 7,28

1
E12 B10 PCLK_ICH 3 R189 AJ8 E1 CLK_PWRGD 3
AD26 PCICLK TACH1/GPIO1 CK_PWRGD
D8 AD27 PME# G7 ICH_PME#_1 RTM AJ9 TACH2/GPIO6
A6 TP97 R167 28 ECSCI#_1 AH9 E3
AD28 TACH3/GPIO7 CLPWROK PWROK 7,20 3D3V_S5 3D3V_S0
E8 TPAD30 10KR2J-3-GP SB_ECSMI#AE16

GPIO
TPAD30 TP107

2
AD29 CLK_SEL28 GPIO8
D6 ECSWI# AC19 AJ25 PM_SLP_M#

2
AD30 PSW_CLR# GPIO12 SLP_M# TP118 TPAD30
A3 AD31 AG8 TACH0/GPIO17

1
ICH8_GPIO18 AH12 F23
GPIO18 CL_CLK0 CL_CLK0 7

2
G71 ICH8_GPIO20 R180 R345
INT_PIRQA# F9
Interrupt I/F F8 INT_PIRQE# R188 SCLOCK
AE11
AG10
GPIO20 CL_CLK1 AE18
3K24R2F-GP 3K24R2F-GP
PIRQA# PIRQE#/GPIO2 SCLOCK/GPIO22

2
10KR2J-3-GP
INT_PIRQB# B5 G11 INT_PIRQF# ICS AH25 F22 CL_DATA0 7

Controller Link
INT_PIRQC# PIRQB# PIRQF#/GPIO3 INT_PIRQG# R145 QRT_STATE0/GPIO27 CL_DATA0
C5 F12 AD16 AF19

2
INT_PIRQD# PIRQC# PIRQG#/GPIO4 INT_PIRQH# GAP-OPEN QRT_STATE1/GPIO28 CL_DATA1
A10 B3 DY 10R2J-2-GP AG13

1
3 PIRQD# PIRQH#/GPIO5 SATACLKREQ#/GPIO35 CL_VREF0_ICH 3
29 PCB_VER0 AF9 SLOAD/GPIO38 CL_VREF0 D24
AJ11 AH23 CL_VREF1_ICH

1
29 PCB_VER1 SDATAOUT0/GPIO39 CL_VREF1

1
ICH8-M-1-GP-U-NF SDATAOUT1 AD10
SDATAOUT1/GPIO48
RP4 3D3V_S0 AJ23 CL_RST#0 7
CL_RST#

1
PCI_IRDY# 1 10 RP5 26 ACZ_SPKR AD9 C343 R181 C515 R344
3D3V_S0 SPKR

1
INT_PIRQE# 2 9 INT_PIRQH# PCI_REQ#3 1 10 AJ27 CLGPIO0 TP120 TPAD30 453R2F-1-GP
CLGPIO0/GPIO24

453R2F-1-GP
PCI_LOCK# 3 8 PCI_REQ#0 INT_PIRQF# 2 9 INT_PIRQG# 7 MCH_ICH_SYNC# AJ13 AJ24 GPIO10

MISC

2
MCH_SYNC# CLGPIO1/GPIO10

SCD1U10V2KX-4GP
PCI_PERR# 4 7 INT_PIRQC# INT_PIRQA# 3 8 INT_PIRQD# AF22 GPIO14

2
CLGPIO2/GPIO14

SCD1U10V2KX-4GP
5 6 INT_PIRQB# PCI_TRDY# 4 7 SCLOCK ICH_RSVD AJ21 AG19 WOL_EN
3D3V_S0

2
ECSCI#_1 TPAD30 TP114 TP3 CLGPIO3/GPIO9 TP119
3D3V_S0 5 6

1
SRN8K2J-2-GP-U TPAD30 R170
RP6 SRN8K2J-2-GP-U ICH8-M-1-GP-U-NF R174 10KR2J-3-GP
3D3V_S0
PCI_REQ#2 1 10 100KR2J-1-GP DY
PCI_REQ#1 2 9 INT_SERIRQ
PCI_SERR# 3 8 PCI_DEVSEL#

2
PM_CLKRUN# 4 7 PCI_STOP# No Reboot Strap RP1 3D3V_S5
5 6 PCI_FRAME# SPKR LOW = Defaule SMB_LINK_ALERT# 1 10
3D3V_S0
U49B 2 OF 6 High=No Reboot SMB_ALERT# 2 9 ECSWI#
SRN8K2J-2-GP-U SMLINK1 3 8 USB_OC#0
22 PCIE_RXN1 P27 V27 DMI_RXN0 7 GPIO10 4 7 PM_BATLOW#_R
PERN1 DMI0RXN 3D3V_S0
22 PCIE_RXP1 P26 PERP1 DMI0RXP V26 DMI_RXP0 7 3D3V_S5 5 6
22 PCIE_TXN1 C534 SCD1U10V2KX-4GP
2 1 TXN1 N29 U29 DMI_TXN0 7
C535 SCD1U10V2KX-4GP TXP1 PETN1 DMI0TXN ACZ_SPKR R147 1 DY
22 PCIE_TXP1 2 1 N28 U28 DMI_TXP0 7 2 SRN10KJ-L3-GP
PETP1 DMI0TXP 1KR2J-1-GP
LAN M27 Y27 3D3V_S5 3D3V_S5
Direct Media Interface

24 PCIE_RXN2 PERN2 DMI1RXN DMI_RXN1 7


PCI-Express

24 PCIE_RXP2 M26 Y26 DMI_RXP1 7 SDATAOUT1 R140 1 2 RP2


PERP2 DMI1RXP 3D3V_S5
24 PCIE_TXN2 C531 SCD1U10V2KX-4GP
2 1 TXN2 L29 W29 DMI_TXN1 7 10KR2J-3-GP DY USB_OC#9 1 10 RP3
C533 SCD1U10V2KX-4GP TXP2 PETN2 DMI1TXN DBRESET# SMLINK0
24 PCIE_TXP2 2 1 L28 PETP2 DMI1TXP W28 DMI_TXP1 7 2 9 1 10
PM_RI# USB_OC#4 USB_OC#2 USB_OC#1
2 MINICARD K27 AB26 ICH8_GPIO18 R172 1 2 SB_ECSMI#
3
4
8
7 USB_OC#3 USB_OC#7
2
3
9
8 USB_OC#8 2
24 PCIE_RXN3 PERN3 DMI2RXN DMI_RXN2 7
24 PCIE_RXP3 K26 AB25 DMI_RXP2 7 10KR2J-3-GP DY 5 6 PCIE_WAKE# USB_OC#5 4 7
PERP3 DMI2RXP 3D3V_S5
24 PCIE_TXN3 C523 SCD1U10V2KX-4GP
2 1 TXN3 J29 AA29 DMI_TXN2 7 5 6 USB_OC#6
C521 SCD1U10V2KX-4GP TXP3 PETN3 DMI2TXN
24 PCIE_TXP3 2 1 J28 AA28 DMI_TXP2 7 SRN10KJ-L3-GP
PETP3 DMI2TXP
NEW CARD SRN10KJ-L3-GP
H27 PERN4 DMI3RXN AD27 DMI_RXN3 7
H26 AD26 1D5V_S0
PERP4 DMI3RXP DMI_RXP3 7
Layout Note: G29 AC29
PETN4 DMI3TXN DMI_TXN3 7
PCIE AC coupling caps G28 AC28 Place within 500 mils of ICH
PETP4 DMI3TXP DMI_TXP3 7
1

need to be within 250 mils of the driver.


F27 T26 CLK_PCIE_ICH# 3 R133
PERN5 DMI_CLKN 24D9R2F-L-GP 3D3V_S5
F26 PERP5 DMI_CLKP T25 CLK_PCIE_ICH 3
E29 PETN5
E28 Y23 R165
2

PETP5 DMI_ZCOMP

1
Y24 DMI_IRCOMP_R 0R2J-2-GP
DMI_IRCOMP R166
D27 1 2
D26
C29
PERN6/GLAN_RXN
PERP6/GLAN_RXP USBP0N G3
G2
USBPN0 21,38 USB Table 10KR2J-3-GP
PETN6/GLAN_TXN USBP0P USBPP0 21,38
C28 H5 USB D15

2
PETP6/GLAN_TXP USBP1N RSMRST#_SB
USBP1P H4 1
TPAD30 TP84 SPI_CLK C23 H2 USBPN2 21,38 Pair Device
TPAD30 TP149 SPI_CS0# SPI_CLK USBP2N
B23 SPI_CS0# USBP2P H1 USBPP2 21,38 28 RSMRST#_KBC 3 DY

1
SPI_CS#1 E22 J3 0 USB1 BAS16-1-GP
SPI_CS1# USBP3N R169
J2 BOOT BIOS Strap 2
SPI

TPAD30 TP90 SPI_MOSI USBP3P 100KR2J-1-GP


D23 SPI_MOSI USBP4N K5 USBPN4 21,38 1 NC PCI_GNT#0 SPI_CS#1 BOOT BIOS Location
TPAD30 TP93 SPI_MISO F21 K4 USBPP4 21,38
SPI_MISO USBP4P
K2 USBPN5 24 2 USB2 0 1 SPI

2
USB_OC#0 USBP5N
21 USB_OC#0 AJ19 OC0# USBP5P K1 USBPP5 24 1 0 PCI
1
USB_OC#1 AG16 L3 USBPN6 25 3 NC 1 1 LPC(Default) <Core Design> 1
USB_OC#2 OC1#/GPIO40 USBP6N
AG15 OC2#/GPIO41 USBP6P L2 USBPP6 25 A16 swap override strap
USB_OC#3 AE15 M5 4 USB3
USB_OC#4 OC3#/GPIO42 USB USBP7N USBPN7 24
PCI_GNT#3 low = A16 swap override enable
21,38 USB_OC#4
USB_OC#5
AF15
AG17
OC4#/GPIO43
OC5#/GPIO29
USBP7P
USBP8N
M4
M2
USBPP7
USBPN8
24
14 5 BT high = default Wistron Corporation
USB_OC#6 AD12 M1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
OC6#/GPIO30 USBP8P USBPP8 14
USB_OC#7 PCI_GNT#0 1 Taipei Hsien 221, Taiwan, R.O.C.
USB_OC#8
AJ18 OC7#/GPIO31 USBP9N N3 USBPN9 24 6 Cardreader
R342
DY 1KR2J-1-GP
2
AD14 OC8# USBP9P N2 USBPP9 24
USB_OC#9 R113 SPI_CS#1 Title
AH18 OC9# USB_RBIAS_PN 22D6R2F-L1-GP
7 MINICARD 1
R111
DY 1KR2J-1-GP
2
F2
USBRBIAS#
USBRBIAS F3 1 2 8 CCD PCI_GNT#3 1 DY 1KR2J-1-GP
2 ICH8-M (2 of 4)
R343 Size Document Number Rev

ICH8-M-1-GP-U-NF
9 NEW1
Calado -1
Date: Wednesday, September 12, 2007 Sheet 17 of 39
A B C D E
A B C D E

RTC_AUX_S5 U49E 5 OF 6
6uA in G3 AD25 VCCRTC
VCC1_05 A13
C304 T7 B13
V5REF VCC1_05

SCD1U10V2KX-4GP
C309 V5REF_S0 A16 C13
SCD1U10V2KX-4GP V5REF VCC1_05
VCC1_05 C14
V5REF_S5 1D05V_S0
DY G4 D14
1.13A

2
V5REF_SUS VCC1_05 Layout Note: Place near ICH8M
E14
657mA AA25 VCC1_5_B
VCC1_05
VCC1_05 F14
1D5V_S0 AA26 G14
VCC1_5_B VCC1_05

1
AA27 L11 C292 C273 C262 C263 C245 C508

CORE
VCC1_5_B VCC1_05

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AB27 L12 SC10U6D3V5MX-3GP
VCC1_5_B VCC1_05
AB28 L14 DY DY

2
VCC1_5_B VCC1_05

1
SC10U6D3V5MX-3GP
4 C516 C518 C267 C271 C282 C251 C317 C315 AB29 L16 4
VCC1_5_B VCC1_05

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
D28 VCC1_5_B VCC1_05 L17
DY DY D29 L18

2
VCC1_5_B VCC1_05
E25 VCC1_5_B VCC1_05 M11
E26 VCC1_5_B VCC1_05 M18
E27 VCC1_5_B VCC1_05 P11

1
F24 P18 C272 C293 C290
VCC1_5_B VCC1_05

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
F25 T11 1D5V_DMIPLL_ICH_S0
G24
VCC1_5_B VCC1_05
T18 DY 23mA 1D5V_S0

2
VCC1_5_B VCC1_05 L10 1
H23 VCC1_5_B VCC1_05 U11 2
*Within a given well, 5VREF needs to be up before the H24 U18 0R0603-PAD
VCC1_5_B VCC1_05

1
VCCA3GP
corresponding 3.3V rail J23 VCC1_5_B VCC1_05 V11
J24 V12 C536 C279
VCC1_5_B VCC1_05 SCD1U10V2KX-4GP SC10U6D3V5MX-3GP
K24 V14

2
VCC1_5_B VCC1_05
K25 VCC1_5_B VCC1_05 V16
3D3V_S0 L23 V17
5V_S0 VCC1_5_B VCC1_05 1D25V_S0
L24 VCC1_5_B VCC1_05 V18
L25 VCC1_5_B
1

1
M24 R29 C551 C331 C543
47mA VCC1_5_B VCCDMIPLL
2

SCD1U10V2KX-4GP

SC10U6D3V5MX-3GP
D24 M25 SC10U6D3V5MX-3GP
BAS16-1-GP R346 1D5V_S0 1D5V_APLL_S0 N23
VCC1_5_B
AE28 DY 50mA

2
100R2J-2-GP L12 VCC1_5_B VCC_DMI
N24 AE29
1mA 1 2 N25
VCC1_5_B VCC_DMI 1D05V_S0
P24
VCC1_5_B
AC23 1mA
3

VCC1_5_B V_CPU_IO

1
V5REF_S0 0R3-0-U-GP P25 AC24
C342 VCC1_5_B V_CPU_IO 3D3V_S0
R24 VCC1_5_B
1

1
SC10U6D3V5MX-3GP R25 AF29

2
VCC1_5_B VCC3_3

1
C517 R26 C269 C298
VCC1_5_B

SCD1U10V2KX-4GP
SCD1U10V2KX-4GP R27 AD2 C505 SCD1U10V2KX-4GP
2

2
3 VCC1_5_B VCC3_3 SCD1U10V2KX-4GP 3
T23

2
VCC1_5_B 3D3V_S0
T24 AC8

VCCP CORE
VCC1_5_B VCC3_3
T27 VCC1_5_B VCC3_3 AD8

1
T28 AE8
3D3V_S5 SATA+USB=1.56A T29
VCC1_5_B
VCC1_5_B
VCC3_3
VCC3_3 AF8 C510
Layout Note: 5V_S5 1D5V_S0 U24 SCD1U10V2KX-4GP

2
Place near ICH8 VCC1_5_B Layout Note:
U25 VCC1_5_B VCC3_3 AA3 3D3V_S0
1

1
V23 U7 3D3V_S0 PCI decoupling
VCC1_5_B VCC3_3
2

D12 V24 V7 C296 C288


VCC1_5_B VCC3_3
1

1
SCD1U10V2KX-4GP
BAS16-1-GP R115 C320 C319 V25 W1 SCD1U10V2KX-4GP 3D3V_S0

2
VCC1_5_B VCC3_3
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

100R2J-2-GP W25 W6 C509


1mA

IDE
VCC1_5_B VCC3_3

1
Y25 W7 SCD1U10V2KX-4GP
2

2
VCC1_5_B VCC3_3 C333
Y7
3

VCC3_3 3D3V_S0

SCD1U10V2KX-4GP
V5REF_S5 AJ6 DY
VCC3_3=278mA

2
VCCSATAPLL
VCC3_3 A8
1

AE7 VCC1_5_A VCC3_3 B15

1
C258 AF7 B18 3D3V_S0
SCD1U10V2KX-4GP 1D5V_S0 VCC1_5_A VCC3_3 C252 C511
AG7 B4
2

VCC1_5_A VCC3_3

SCD1U10V2KX-4GP
C512 DY SCD1U10V2KX-4GP

ARX
AH7 B9

PCI

2
VCC1_5_A VCC3_3

1
SCD1U10V2KX-4GP
AJ7 VCC1_5_A VCC3_3 C15
D13 C302
VCC3_3
1

AC1 D5 SCD1U10V2KX-4GP NO_STUFF

2
C337 C328 VCC1_5_A VCC3_3
AC2 VCC1_5_A VCC3_3 E10

ATX
SCD1U10V2KX-4GP SCD1U10V2KX-4GP AC3 E7
32mA
2

VCC1_5_A VCC3_3
AC4 VCC1_5_A VCC3_3 F11
AC5 VCC1_5_A
AC12 3D3V_S5
VCCHDA
AC10
AC9
VCC1_5_A
VCC1_5_A VCCSUSHDA AD11 32mA

1
2 2
1

AA5 J6 VccSus1_05[1] TP100 TPAD28 C249


C260 C268 C264 VCC1_5_A VCCSUS1_05 SCD1U10V2KX-4GP
AA6 AF20 VccSus1_05[2] TP111 TPAD28

2
SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP VCC1_5_A VCCSUS1_05
DY
2

G12 VCC1_5_A VCCSUS1_5 AC16 VccSus1_5[1] TP106 TPAD28


G17 VCC1_5_A
H7 J7 VccSus1_5[2] 3D3V_S5
VCC1_5_A VCCSUS1_5 TP104 TPAD28

AC7 VCC1_5_A VCCSUS3_3 C3


1D5V_S0 AD7
USBPLL=10mA VCC1_5_A

1
AC18 C248 C277
VCCSUS3_3

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
D1 AG20 C283
VCCUSBPLL VCCSUS3_3
VCCPSUS

AC21 DY SCD1U10V2KX-4GP

2
VCCSUS3_3
1

C261 C325 F1 AC22


VCC1_5_A VCCSUS3_3 177mA
USB CORE

SCD1U10V2KX-4GP C294 L6 AH28


SCD1U10V2KX-4GP SCD1U10V2KX-4GP VCC1_5_A VCCSUS3_3
L7
2

VCC1_5_A NO_STUFF 3D3V_S5


M6 VCC1_5_A VCCSUS3_3 P6
1D5V_S0 M7 P7
VCC1_5_A VCCSUS3_3
VCCSUS3_3 N7
3D3V_S5 W23 C1
VCC1_5_A VCCSUS3_3
1

1
18mA in S0;50mA in S3/S4/S5 VCCSUS3_3 P1
TPAD28 TP96 VccLan1_05[1] F17 R1 C255 C313 C316
VCCLAN1_05 VCCSUS3_3
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
TPAD28 TP98 VccLan1_05[2] G18 P2 DY SCD1U10V2KX-4GP
2

2
VCCLAN1_05 VCCSUS3_3
1

VCCPUSB

C310 P3
C311 1D5V_S0 VCCSUS3_3
F19 VCCLAN3_3 VCCSUS3_3 R3
SCD1U10V2KX-4GP SCD1U10V2KX-4GP G20 P4
23mA
2

VCCLAN3_3 VCCSUS3_3 NO_STUFF


VCCSUS3_3 P5
1 2 1D5VGLANPLL_ICH A24 R5
R341 VCCGLANPLL VCCSUS3_3
1 DY VCCSUS3_3 R6 1
1

0R0603-PAD C514 A26


C513 VCCGLAN1_5
DY SCD1U10V2KX-4GP A27 G22 VccSus1_05[3]
GLAN POWER

SCD1U10V2KX-4GP VCCGLAN1_5 VCCCL1_05 TP102 TPAD28


B26
Wistron Corporation
2

1D5V_S0 VCCGLAN1_5
B27 A22 VccSus1_5[3]
80mA B28
VCCGLAN1_5
VCCGLAN1_5
VCCCL1_5 TP148 TPAD28 3D3V_S5 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
F20 Taipei Hsien 221, Taiwan, R.O.C.
VCCCL3_3 3D3V_ICH_CL_S5
B25 VCCGLAN3_3 VCCCL3_3 G21 1 2
1

3D3V_S0 R114 Title


C308 DY C295 1mA 18mA 0R0603-PAD
SC4D7U6D3V3KX-GP SCD1U10V2KX-4GP ICH8-M-1-GP-U-NF ICH8-M (3 of 4)
2

Size Document Number Rev

Calado -1
Date: Monday, September 10, 2007 Sheet 18 of 39
A B C D E
A B C D E

U49F 6 OF 6

A23 VSS VSS K7


A5 VSS VSS L1
AA2 VSS VSS L13
AA7 VSS VSS L15
A25 VSS VSS L26
AB1 VSS VSS L27
AB24 VSS VSS L4
4 AC11 VSS VSS L5 4
AC14 VSS VSS M12
AC25 VSS VSS M13
AC26 VSS VSS M14
AC27 VSS VSS M15
AD17 VSS VSS M16
AD20 VSS VSS M17
AD28 VSS VSS M23
AD29 VSS VSS M28
AD3 VSS VSS M29
AD4 VSS VSS M3
AD6 VSS VSS N1
AE1 VSS VSS N11
AE12 VSS VSS N12
AE2 VSS VSS N13
AE22 VSS VSS N14
AD1 VSS VSS N15
AE25 VSS VSS N16
AE5 VSS VSS N17
AE6 VSS VSS N18
AE9 VSS VSS N26
AF14 VSS VSS N27
AF16 VSS VSS N4
AF18 VSS VSS N5
AF3 VSS VSS N6
AF4 VSS VSS P12
AG5 VSS VSS P13
AG6 VSS VSS P14
AH10 VSS VSS P15
3 AH13 P16 3
VSS VSS
AH16 VSS VSS P17
AH19 P23 3D3V_S5 3D3V_S0
VSS VSS
AH2 VSS VSS P28
AF28 VSS VSS P29
AH22 VSS VSS R11
AH24 VSS VSS R12
AH26 VSS VSS R13

8
7
6
5
AH3 VSS VSS R14
AH4 R15 RN27
VSS VSS SRN4K7J-10-GP
AH8 VSS VSS R16
AJ5 VSS VSS R17
B11 VSS VSS R18
B14 R28

1
2
3
4
VSS VSS
B17 VSS VSS R4
B2 VSS VSS T12
B20 VSS VSS T13
B22 VSS VSS T14
B8 T15 5V_S0
VSS VSS
C24 VSS VSS T16
C26 VSS VSS T17
C27 VSS VSS T2
C6 VSS VSS U12
D12 VSS VSS U13 Q15
D15 VSS VSS U14
D18 VSS VSS U15
D2 VSS VSS U16 17,24 SMB_CLK 3 4 SMBC_ICH 3,12
D4 VSS VSS U17
E21 VSS VSS U23 2 5
2 2
E24 VSS VSS U26
E4 VSS VSS U27 1 6 2N7002DW-1-GP
E9 VSS VSS U3
F15 VSS VSS U5
E23 VSS VSS V13 17,24 SMB_DATA
F28 VSS VSS V15 SMBD_ICH 3,12
F29 VSS VSS V28
F7 VSS VSS V29 Q12 connect SMLINK and SMBUS in S) for SMBus 2.0 compliance
G1 VSS VSS W2
E2 VSS VSS W26
G10 VSS VSS W27
G13 VSS VSS Y28
G19 Y29
G23
VSS
VSS
VSS
VSS Y4 SMBUS
G25 VSS VSS AB4
G26 VSS VSS AB23
G27 VSS VSS AB5
H25 VSS VSS AB6
H28 VSS VSS AD5
H29 VSS VSS U4
H3 VSS VSS W24
H6 VSS
J1 A1 SB_A1 TP143TPAD30
VSS VSS_NCTF SB_A2
J25 VSS VSS_NCTF A2 TP144TPAD30
J26 A28 SB_A28 TP150TPAD30
VSS VSS_NCTF SB_A29
J27 VSS VSS_NCTF A29 TP151TPAD30
J4 AJ28 SB_AJ28 TP116TPAD30
VSS VSS_NCTF SB_AH1
J5 VSS VSS_NCTF AH1 TP159TPAD30
1 K23 AH29 SB_AH29 TP117TPAD30 1
VSS VSS_NCTF SB_AJ1
K28 VSS VSS_NCTF AJ1 TP160TPAD30
K29 AJ2 SB_AJ2 TP161TPAD30
VSS VSS_NCTF SB_AJ29
K3
K6
VSS
VSS
VSS_NCTF
VSS_NCTF
AJ29
B1 SB_B1
TP121TPAD30
TP145TPAD30
Wistron Corporation
B29 SB_B29 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VSS_NCTF TP152TPAD30
Taipei Hsien 221, Taiwan, R.O.C.

ICH8-M-1-GP-U-NF Title

ICH8-M (4 of 4)
Size Document Number Rev

Calado -1
Date: Wednesday, September 12, 2007 Sheet 19 of 39
A B C D E
Digital Output Data Bits
TEMP.
Sign MSB LSB EXT
+127.875 0 111 1111 111
+126.375 0 111 1110 011
+25.5 0 001 1001 100
+1.75 0 000 0001 110 5V_S0
FAN1_VCC FAN1_VCC
+0.5 0 000 0000 100

1
+0.125 0 000 0000 001 ENG
R290

1
-0.125 1 111 1111 111 FAN1_VCC 10KR2J-3-GP
DY EC100
-1.125 1 111 1110 111
*Layout* 15 mil SCD1U25V2ZY-1GP

2
FAN1
-25.5 1 110 0110 100 4

3
C448 1
-55.25 1 100 1000 110 C451 SC4D7U6D3V3KX-GP
SCD1U16V2ZY-2GP 2

2
-65.000 1 011 1111 000 D21 FAN1_FG1 3
BAS16-1-GP 5

1
DY *Layout* 15 mil

2
C453 MLX-CON3-10-GP-U
SC1KP50V2KX-1GP 20.F1000.003

2
3D3V_S0 5V_S0
5V_S0 U46
*Layout* 30 mil
1 2 5V_G792_S0 6 1
VCC FAN1 FAN1_VCC 38
20 DVCC FG1 4 FAN1_FG1 38
1

R319 14 G792_32K
CLK
1

1
10R3J-3-GP C487 C477 DY 16 2.HW T8 sensor
SDA SMBD_G792 28

1
SC1U16V3ZY-GP

R318 C474 C476 7 18 SMBC_G792 28


2

21KR2F-GP R302 SCD1U10V2MX-3GP DXP1 SCL


9 19

2
10KR2J-3-GP SC4D7U6D3V5KX-3GP SCD1U16V2ZY-2GP DXP2 NC#19
11 DXP3 G792_DXP2

C
2

5 G792_DXP3 Q8

C
2

R305 2 ALERT# DGND Q17 MMBT3904-3-GP


17 THRM# 1 15 ALERT# DGND 17 B

1
DY 0R2J-2-GP V_DEGREE
13 THERM#
C478 C469 B MMBT3904-3-GP
C206
Setting T8 as 3 8

E
THERM_SET SGND1 G792_DXN2 C486 SC470P50V3JN-2GP
2 10

E
2

2
RESET# SGND2
1

90 Degree SGND3 12 G792_DXN3 SC2200P50V2KX-2GP SC470P50V3JN-2GP


R317 SC2200P50V2KX-2GP
49K9R2F-L-GP
3D3V_AUX_S5

GAP-CLOSE

GAP-CLOSE
V_DEGREE G792SFUF-GP 74.00792.A79 3.System Sensor,

2
=(((Degree-72)*0.02)+0.34)*VCC G68 G69
2

Put between CPU and NB.


1

R307
10KR2J-3-GP 1.For CPU Sensor

1
DXP1:108 Degree (CPU) H_THERMDA 4
2

28,30,38 PURE_HW_SHUTDOWN# DXP2:H/W Setting 100(System)

1
DXP3:105 Degree (SYSTEM) Place near chip as close C489
1 2 G792_RESET# as possible SC2200P50V2KX-2GP
7,17 PWROK

2
H_THERMDC 4
1

R316
R315 4K7R2F-GP
10KR2F-2-GP
2

32K suspend clock output

RUN_POWER_ON

R306
G

Q18 10R2F-L-GP

17 PM_SUS_CLK D S 32KHZ 1 2 G792_32K


1

20060810 2N7002-11-GP R303


100KR2F-L1-GP
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thermal/Fan Controllor
Size Document Number Rev

Calado -1
Date: Thursday, September 13, 2007 Sheet 20 of 39
SATA HD Connector ODD Connector 3D3V_S0 5V_S0

SATA1

5
6
7
8
23 RN25 ODD1
NP1 53
1 SRN10KJ-6-GP 51
2 1
2
3 4 3

4
3
2
1
4 ODD_LED# 6 5 HDDDRV#_5
5V_S0 16 IDE_PDD8
5 5V_S0 PDIAG 8 7 IDE_PDD7 16
16 IDE_PDD9
6 16 IDE_PDD10 10 9 IDE_PDD6 16
7 IDE_PDIORDY 12 11 IDE_PDD5 16
16 IDE_PDD11
INT_IRQ14

14

10
8 16 IDE_PDD12 14 13 IDE_PDD4 16
K

TC12 9 16 15 IDE_PDD3 16
16 IDE_PDD13
1

C336 SC10U6D3V5MX-3GP 10 R144 18 17 IDE_PDD2 16


16 IDE_PDD14
SCD1U10V2MX-3GP

D14 11 17,22,24 PCIRST1# 9 8 1 2 HDDDRV#_5 20 19 IDE_PDD1 16


16 IDE_PDD15
1

SSM24PT-GP 12 0R0402-PAD 16 IDE_PDDREQ 22 21 IDE_PDD0 16


2

13 U5C 16 IDE_PDIOR# 24 23
A

1
14 TSAHCT125PW-GP 26 25

7
R136 IDE_PDDACK# IDE_PDIOW# 16
15 16 IDE_PDDACK# 28 27 IDE_PDIORDY 16
10KR2J-3-GP 30 29
R143 1 PDIAG INT_IRQ14 16
16 DY 3D3V_S0 2 32 31 IDE_PDA1 16
16 SATA_RXP0 17 10KR2J-3-GP 16 IDE_PDA2 34 33
DY

2
5V_S0 IDE_PDA0 16
16 SATA_RXN0 18 16 IDE_PDCS3# 36 35 IDE_PDCS1# 16
19 38 37 ODD_LED# 14
16 SATA_TXN0 20 40 39

1
16 SATA_TXP0 21 C253 C259 C254 42 41 5V_S0

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
22 DY 44 43
NP2 46 45 R340

2
24 48 47 1 2
50 49 0R0402-PAD
ALP-CON22-GP-U1 52
20.F0754.022 54
SYN-CONN50-4R14GP

ENG 20.80967.050

PD

U56 5V_USB3_S0_1

USB On Board CONN(RIGHT) 5V_USB3_S0 1


2
OUT OC# 5 USB_OC#4
100 mil USB On Board CONN(LEFT)
GND

1
ENG 5V_S5 3 4 USB_PWR_EN# EC84 5V_USB2_S0
IN EN/EN#

SCD1U16V2ZY-2GP
TC2 DY F5

ST100U6D3VBM-9GP
1 2

2
5V_USB3_S0 G5250F2T1U-GP ENG
74.05250.C7F FUSE-2A8V-3GP 5V_USB2_S0_1
USB2
5V_USB3_S0 7
ENG RN34 5

2
F4
U4 1 2 1
5V_S5 PD
1
DY 5 FUSE-1A8V-GP USB_0- 2
17,38 USB_OC#4 FLG# VOUT 17,38 USBPN0
2 5V_USB3_S0_1 USB_0+ 3
GND 17,38 USBPP0
USB_PWR_EN# 3 4 5V_USB2_S0_1 4
28,38 USB_PWR_EN# EN/EN# VIN RN35 USB1 100 mil
1

DY 5 6
EC81 RT9711BPB-GP C362 1 8

3
1

1
SCD1U16V2ZY-2GP DY SCD1U16V3KX-3GP TC17 EC101
2

SCD1U16V2ZY-2GP
74.09711.B7F USB_4- 2 7 SE220U6D3VM-4GP DY
17,38 USBPN4 SKT-USB-152-GP-U4
17,38 USBPP4 4

2
USB_4+ 3 DLW21HN900SQ2LGP 22.10218.R31
6
5V_USB2_S0_1
SKT-USB-146-GP-U1
4

22.10218.Q41 5V_USB2_S0_1

USB3
DLW21HN900SQ2LGP 7
RN36 5

2
ENG U57
1
MDC 1.5 CONN 5V_USB2_S0

5V_S5
1
2
3
OUT
GND DY
OC# 5

4
USB_OC#0

USB_PWR_EN#
17,38 USBPN2
USB_2-
USB_2+
2
3
3D3V_S5 3D3V_S5 IN EN/EN# 17,38 USBPP2
4

G5250F2T1U-GP 6
MDC1 74.05250.C7F 8

3
1

13 15 5V_USB2_S0
NP1 14 R123
SKT-USB-152-GP-U4
1 2
0R0603-PAD DLW21HN900SQ2LGP 22.10218.R31
16,26 ACZ_SDATAOUT 3 4
2

5 6
16,26 ACZ_SYNC 7 8 U45
1 2ACSDATAIN1_A 9 10 5V_S5
16 ACZ_SDATAIN1 <Core Design>
R132
2 39R2J-L-GP
1 ACZ_RST#_1 11 12 1 5
16,26 ACZ_RST# R183 0R0402-PAD ACZ_BTCLK_MDC 16 17 USB_OC#0 FLG# VOUT
NP2 17 2 GND
1

C287 USB_PWR_EN#
16 18 28,38 USB_PWR_EN# 3 EN/EN# VIN 4
Wistron Corporation
1
SC4D7U6D3V5KX-3GP

C306 DY DY C301 R138


1

1
100KR2J-1-GP
SC22P50V2JN-4GP

SC22P50V2JN-4GP

EC65 DY 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


2

TYCO-CONN12A-2-GP SC22P50V2JN-4GP EC102 RT9711BPB-GP C479 Taipei Hsien 221, Taiwan, R.O.C.
2

DY SCD1U16V2ZY-2GP DY SCD1U16V3KX-3GP
20.F0917.012
2

2
74.09711.B7F Title

2nd source: 20.F0604.012 HDD / CDROM / USB / MDC


Size Document Number Rev

Calado -1
Date: Wednesday, September 12, 2007 Sheet 21 of 39
5 4 3 2 1

2D5V_LAN_S5

1D2V_LAN_S5 2D5V_LAN_S5

2
1 2 XTALVDD_G

1
R17 C18 C26 R25
1

1
C365 C48 C374 C376 C36 C20 C47 C49 C373 3D3V_S5 3D3V_LAN_S5 0R0603-PAD 0R0603-PAD
3D3V_LAN_S5

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
C50

2
SC4D7U6D3V5KX-3GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
1 2 C25 SCD1U10V2KX-4GP
2

VDDP 1

2
R16 SCD1U10V2KX-4GP R19
0R0603-PAD 2 1 0R0603-PAD
U34 1 2 BIASVDD_G
D R231 D

1
U10 1 8 10KR2J-3-GP
BCM5787MKMLG-GP A0 VCC EE_WP C38

15
19
56
61

17
68
2 A1 WP 7 1 2 3D3V_LAN_S5

6
71.05787.A03 3 6 SCLK SCD1U10V2KX-4GP

2
A2 SCL SO
4 5

VDDP
VDDP
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
BIASVDD_G GND SDA
1D2V_LAN_S5 5 VDDC BIASVDD 36

2
13 R18
VDDC AT24C64CN-SH-T-GP R218 R224 0R0603-PAD
20 VDDC
34 23 XTALVDD_G 72.24C64.F01 4K7R2J-2-GP 4K7R2J-2-GP 1 2 LAN_AVDD
VDDC XTALVDD
55 VDDC DY DY
part change to 71.05787.M02 60

1
VDDC

1
38 LAN_AVDD
AVDD C371 C37
45 SCD1U10V2KX-4GP

2
AVDD

SCD1U10V2KX-4GP
AVDD 52
AVDDL_G 39 AVDDL
44 AVDDL TRD3- 49 MDI3- 23
46 AVDDL TRD3+ 50 MDI3+ 23
51 AVDDL
Place PLLVDD/AVDDL
TRD2- 48 MDI2- 23 CKT as close to chip as
TRD2+ 47 MDI2+ 23 possible
GPHY_PLLVDD 35 GPHY_PLLVDD
TRD1- 42 MDI1- 23
43 3D3V_AUX_S5
TRD1+ MDI1+ 23
PCIE_PLLVDD 30 41 MDI0- 23
PCIE_PLLVDD TRD0-

1
TRD0+ 40 MDI0+ 23
C R12 C

LINKLED# 2 DY 10KR2J-3-GP 3D3V_LAN_S5


PCIE_SDSVDD 1 10M/100M/1G_LED# 23
SPD100LED#
27 67

2
PCIE_VDD SPD1000LED#

1
33 66 LAN_ACT_LED# 23 ENERGY_DET
C53 PCIE_VDD TRAFFICLED#

1
SCD1U10V2KX-4GP 24 8 GPIO2 C68 C35 C375
2
PCIE_GND GPIO2 TP132TPAD30 R226

SC4D7U6D3V5KX-3GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
DY 10KR2J-3-GP

2
17 PCIE_RXP1 SCD1U10V2KX-5GP 2 1 C52 PCIE_RXDP 26 9 UART_MODE
SCD1U10V2KX-5GP 2 PCIE_TXDP UART_MODE
17 PCIE_RXN1 1 C51 PCIE_RXDN 25 7 EE_WP TP133TPAD30

2
PCIE_TXDN GPIO1_SERIALDI GPIO0
17 PCIE_TXP1 31 PCIE_RXDP GPIO0_SERIALDO 4
17 PCIE_TXN1 32 TP131TPAD30
PCIE_RXDN
17,24 PCIE_WAKE# 12 WAKE#
17,21,24 PCIRST1# R14 2 0R0402-PAD
1 LAN_RST 10 R228 3D3V_LAN_S5
PERST# SCLK 4K7R2J-2-GP
3 CLK_PCIE_LAN 29 REFCLK+ SCLK 65
1

3 CLK_PCIE_LAN# 28 63 SI 2 DY 1
C31 REFCLK- SI SO C24 C33
SO 64

1
SCD1U10V2KX-4GP

SC4D7U10V5ZY-3GP
SC47P50V2JN-3GP 62 CS# 2 1
2

CS# R227
4K7R2J-2-GP

2
R225 3D3V_LAN_S5 1D2V_LAN_S5
3D3V_S0 3D3V_LAN_S0 3D3V_LAN_S0 1KR2J-1-GP 59
NC#59/(ENERGY_DET) ENERGY_DET 28
R217 1 VAUX_PRESENT54 2
VMAINPRSNT 53 VAUXPRSNT
1 2 2 1 VMAINPRSNT 2 1 AVDDL_G

3
1KR2J-1-GP LOW_PWR 3
28 LOW_PWR LOW_PWR
1

1
R211 2 R11 1DY 1 R8 C15 SC4D7U6D3V5KX-3GP
0R0603-PAD C364 0R2J-2-GP Q7 2D5V_LAN_S5 FCM1608K-601T03GP C27
SCD1U10V2KX-4GP 58 BCP69T1-1-GP DY SCD1U10V2KX-4GP
2

2
B R24 SMB_CLK B
57 SMB_DATA
200R2J-L1-GP 18 REGCTL25
REGCTL25

1
LAN_XO_R 1 2 2 1 GPHY_PLLVDD
X1 LAN_X0 22 C57 C58 C64
XTALO

1
SC10U10V5ZY-1GP
1 2 LAN_XI 21 SC4D7U6D3V5KX-3GP SCD1U10V2KX-4GP R23 C45 SC4D7U6D3V5KX-3GP

2
XTALI FCM1608K-601T03GP C42
1 2 RDAC 37 3D3V_LAN_S5 SCD1U10V2KX-4GP
XTAL-25MHZ-67GP

2
R20 RDAC
1

82.30020.571 14 REGCTL12
C56 C46 1K21R2F-2-GP REGCTL12 PCIE_PLLVDD
2 1

1
SC12P50V2JN-3GP SC15P50V2JN-2-GP C366 C372
2

1
SC4D7U10V5ZY-3GP

SCD1U10V2KX-4GP
11 R26 R28 C61 SC4D7U6D3V5KX-3GP
NC#11(CLK_REQ#) FCM1608K-601T03GP C54
16 0R0402-PAD
GND

2
REG_GND SCD1U10V2KX-4GP

2
3 1
69

ENG 2 R27 1 PCIE_SDSVDD


1 Q6 0R3-0-U-GP

1
BCP69T1-1-GP C60 SC4D7U6D3V5KX-3GP

2
1D2V_LAN_S5

2
1

1
C66 C19
R606 change to Bead
SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP
for Transmitter Distortion
2

2
A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LAN BCM5787
Size Document Number Rev
A3
Calado -1
Date: Wednesday, September 12, 2007 Sheet 22 of 39
5 4 3 2 1
A B C D E

Voltage
4401E 5789 5787
LAN Connector
Rail
RJ1
VDDIO_PCI 3D3V_LAN_S5 3D3V_S0 Don't Care SKT-JACK-222-GP
TIP_C 10
38 TIP_C
RING_C LAN_ACT_LED#
VDDC 1D8V_LAN_S5 1D2V_LAN_S5 38 RING_C
NP2
B2 LAN_ACT_LED# 22

B1 CONN_PWR_2
RJ45_8
4
VDDIO 3D3V_LAN_S5 3D3V_LAN_S5 RJ45_7
RJ45_8
RJ45_7 4
RJ45_6 RJ45_6
VESD 3D3V_LAN_S5 3D3V_S0 Don't Care REVERSE CHECK RJ45_5
RJ45_4
RJ45_5
RJ45_4
RJ45_3 RJ45_3
RJ45_2
VDDP Don't Care 2D5V_S5 PD RJ45_1
RJ45_2
RJ45_1
TRING1 A3 10M/100M/1G_LED# 10M/100M/1G_LED# 22
FCM1608K-601T03GP CONN_PWR_1
3D3V_2D5V_S5 3D3V_S5 2D5V_S5 3
1 RING_C L2
A2
A1
2 1 RING RJ11_2
TIP_C TIP
1D8V_1D2V_S5 1D8V_LAN_S5 1D2V_S5 4
2 2 1 RJ11_1
L1 NP1
JST-CON2-22-GP FCM1608K-601T03GP 9
ENG
21.E0024.102
22.10123.081
A3:Green
B2:YELLOW
LAN Link: Green(A3), behavior is the
GIGA Lan Transformer XF2 same for 10/100/1000 bits
2D5V_LAN_S5 1 12 RJ45_3 LAN Data: Yellow(B2), when LAN is
22 MDI1+ RD+ RX+
22 MDI1- 2 11 RJ45_6 transfering data.
RD- RX- MCT2
3 RDCT RXCT 10
3 4 9 MCT1 3
TDCT TXCT RJ45_1
22 MDI0+ 5 TD+ TX+ 8
22 MDI0- 6 7 RJ45_2
TD- TX-
1

1
C63 C62
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
XFORM-208-GP
2

2
68.68161.30A

XF1

22 MDI3+ 1 12 RJ45_7
RD+ RX+ RJ45_8
22 MDI3- 2 RD- RX- 11
3 10 MCT4
RDCT RXCT MCT3
4 TDCT TXCT 9
22 MDI2+ 5 8 RJ45_4
TD+ TX+ RJ45_5
22 MDI2- 6 TD- TX- 7

XFORM-208-GP
68.68161.30A
1

C55 C65
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

2 2

1.route on bottom as differential pairs.


2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends. 10M/100M/1G_LED#

4.pairs must be equal lengths.


5.6mil trace width,12mil separation. LAN_ACT_LED#

6.36mil between pairs and any other trace. 1 R62 CONN_PWR_1


3D3V_LAN_S5 470R2J-2-GP
7.Must not cross ground moat,except
RJ-45 moat. 3D3V_LAN_S5 1 R52 CONN_PWR_2
470R2J-2-GP

RJ11 signal must leave the other signal EC4 EC5 EC3 EC2

1
DY DY DY DY
or power plane 100mil. MCT1
MCT2

2
MCT4
DOC_TIP,DOC_RING,TIP,RING:

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP
MCT3
W/S : 10/100 @ Surface layers
4
3
2
1

10/20 @ Inner layers RN1


SRN75J-1-GP

1 10/100 LAN Transformer RJ45 PIN <Core Design> 1


5
6
7
8

LAN_TERMINAL 1 2

TD+ --> TX+ RJ45-1 C59


SC1KP2KV8KX-GP Wistron Corporation
TD- --> TX- RJ45-2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

RD+ --> RX+ RJ45-3 Title

RD- --> RX- RJ45-6 LAN Connector


Size Document Number Rev
A3
Calado -1
Date: Wednesday, September 12, 2007 Sheet 23 of 39
A B C D E
A B C D E

Mini Card Connector


3D3V_S0 3D3V_S5 1D5V_S0 3D3V_S0_MINI

NEWCARD Connector

1
MINIC1
R191 R190 53
SK1 0R5J-5-GP 0R5J-5-GP NP1
1 3 DY 2 1 MINI_WAKE# TP163 TPAD30
Reserve the symbol

2
for bottom side 4 3
4 2 4 6 5 4
connector NEW1 8 7
CARDBUS-SKT95-GP 10 9
NEW NP2 12 11 CLK_PCIE_MINI1# 3
26 14 13 CLK_PCIE_MINI1 3
21.H0153.001 25 16 15
17 PCIE_TXP3
17 PCIE_TXN3 24
ENG 23 R192
17 PCIE_RXP3 22 2 DY 1 18 17 E51_RxD 28
17 PCIE_RXN3 21 10KR2J-3-GP 20 19
28 WIRELESS_EN MINI_PCIRST1# E51_TxD 28
20 17,21,22 PCIRST1# 2 1 22 21
19 R187 3D3V_S5_MINIC1 24 23 PCIE_RXN2 17
3 CLK_PCIE_NEW

1
3D3V_NEW_S0 18 0R0402-PAD C345 26 25
3 CLK_PCIE_NEW# PCIE_RXP2 17
CPPE# 17 28 27
TP155 NEWCARD_TEST 16 SC100P50V2JN-3GP 30 29

2
15 32 31 PCIE_TXN2 17
1

DY EC64 14 34 33 PCIE_TXP2 17
3D3V_NEW_LAN_S5 TPS2231_PERST# 13 36 35
17 USBPN7
SCD1U10V2KX-4GP

12 17 USBPP7 38 37
2

1DY 2 PCIE_WAKE#_R 11 40 39 5V_S5


17,22 PCIE_WAKE#
R116 0R2J-2-GP 10 TP123TPAD28 1LED_WPAN1# 42 41
1D5V_NEW_S0
1

DY EC63 RN24 9 44 43
SMB_DATA_NEW 14 WLAN_LED#_MC
17,19 SMB_DATA 1 DY 4 8 TP122TPAD28 1LED_WPAN# 46 45
SCD1U10V2KX-4GP

2 3 SMB_CLK_NEW 7 48 47
17,19 SMB_CLK
2

CONN_TP1 6 50 49
TP154 SRN33J-5-GP-U CONN_TP2 5 52 51
TP153 CPUTSB# 4 NP2
3 54
17 USBPP9 2
3 17 USBPN9 SKT-MINI52P-13-GP 3
1 62.10043.461
NP1 NEW
FCI-CON26-5-GP
20.F0789.026 3D3V_S0 3D3V_S5
Place near MINIC1

1
ENG
1D5V_NEW_S0

R372 R182
0R5J-5-GP DY 0R5J-5-GP 1D5V_S0 3D3V_S5
1D5V_S0

2
3D3V_S0_MINI

1
TC14 C347 C353 C352 C348 C346 C322 C350 C351
1D5V_NEW_S0
1D5V_S0

SC10U6D3V5KX-1GP
SC1U6D3V3KX-1GP

SC1U6D3V3KX-1GP
ST100U6D3VBM-9GP

SC10U6D3V5KX-1GP

SCD1U10V2MX-3GP

SC10U6D3V5KX-1GP

SCD1U10V2MX-3GP

SCD1U10V2MX-3GP
DY DY DY DY

2
3D3V_NEW_LAN_S5
11
12
13
14
15

U30
3D3V_S5
NEW
1_5VOUT

AUXOUT
1_5VIN
NC#13
NC#14

2
3D3V_S5

R1601 DY 2100KR2J-1-GP CPPE# 10


NC#16 16
17
BLUETOOTH MODULE 1 2
R389 0R3-0-U-GP
DY 2

R1611 CPPE# AUXIN 3D3V_BT_S0 3D3V_S0


DY 2100KR2J-1-GP CPUTSB# 9 CPUSB# RCLKEN 18 C567
TPS2231_PERST# 8 19 U53 SC4D7U6D3V5KX-3GP
PERST# OC#
7 GND SHDN# 20 PM_SLP_S4# 17,28,34,35
6 21 3D3V_BT_S0 1 5 1 2
NEW_PCIRST1# SYSRST# GND VOUT VIN
2
3_3VOUT

GND
3 4
3_3VIN
STBY#

NC#3 EN/EN#

1
BLUETOOTH_EN 28
NC#5
NC#4

DY EC118
R162 SCD1U16V2ZY-2GP
17,21,22 PCIRST1# 2 0R0402-PAD
1 RT9711-APBG-GP

2
ENG
5
4
3
2
1
1

C334 W83L351YG-GP 74.09711.A7F


DY
SC100P50V2JN-3GP TPAD30 TP162 USB_5+
3D3V_NEW_S0
2

3D3V_S0

PM_SLP_S3# 17,28,30,34,35 EC21 put near TPAD30 TP165 USB_5-


BLUE1 / all

5
3D3V_S0 BLUE1
3D3V_NEW_S0 USB put one
1 3D3V_BT_S0
choke near
connector by 2
3 USB_5+ R194 1 0R0402-PAD
2
EMI request 4 USB_5- R195 1 0R0402-PAD
2
USBPP5 17
USBPN5 17
3D3V_S0 3D3V_NEW_S0 1D5V_NEW_S0 3D3V_NEW_LAN_S5

6
ACES-CON4-1-GP-U1
C556
1 ICS 1
2

SCD1U10V2MX-3GP C281 C278 C256 C265 C266


1

2
SC1U6D3V3KX-1GP

SCD1U10V2MX-3GP

SC1U6D3V3KX-1GP

SCD1U10V2MX-3GP

NEW SCD1U10V2MX-3GP 20.D0197.104


NEW NEW NEW NEW
Wistron Corporation
1

NEW 1st source:20.D0197.104


2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


2nd source:20.F0984.004 Taipei Hsien 221, Taiwan, R.O.C.

Title

Place them Near to Chip MINI CARD / NEW CARD/BT


Place them Near to Connector Size Document Number Rev

Calado -1
Date: Wednesday, September 12, 2007 Sheet 24 of 39
A B C D E
5 4 3 2 1

C237
SC27P50V2JN-2-GP
ENG

SD_DAT3/XD_WE#

SD_DAT4/XD_WP#
SD_DAT2/XD_RE#
2 1 12M_XI

MODE_SEL
R88

XD_R/B#
270KR2F-GP X3

XD_CLE

XD_CE#

XD_ALE
3D3V_D_S0 3D3V_S0 3D3V_A_S0 XTAL-12MHZ-11GP

RST#
82.30006.191

1
2 1 12M_XO
R87 R73
0R0603-PAD 0R0603-PAD C229
D D
SC27P50V2JN-2-GP

48

47

46

45

44

43

42

41

40

39

38

37
1 2 1 2 U16

XTLO

XTLI

AG_PLL

RST#
MODE_SEL

XD_CLE/CF_D3

XD_CE#/CF_D11

XD_ALE/CF_D4

SD_DAT2/XD_RE#/CF_D12

XD_RDY/CF_D13
SD_DAT3/XD_WE#/CF_D5

SD_DAT4/XD_WP#/CF_D6
2

2
C221 C226
SC1U10V3KX-3GP R77 SCD1U16V2ZY-2GP
0R0603-PAD

1
VREG 1 2 AV_PLL 1 36 SD_CMD
3D3V_A_S0 AV_PLL SD_CMD
2 1 RREF 2 RREF SD_DAT5/XD_D0/CF_D14 35 SD_DAT5/XD_D0
R80 6K19R2F-GP 3D3V_A_S0
3D3V_A_S0 3 34 SD_CLK/XD_D1/MS_CLK
AV33 SD_CLK/XD_D1/MS_CLK/CF_D7
2

1
C225 C219 2 1 USB_6- 4 33 3D3V_D_S0
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP 17 USBPN6 R79 0R0402-PAD DM D3V3

1
2 1 USB_6+ 5 32 R81
1

17 USBPP6 R78 0R0402-PAD DP DGND C250 100KR2J-1-GP


6 31 SD_DAT6/XD_D7/MS_D3 SCD1U16V2ZY-2GP

2
AG33 SD_DAT6/XD_D7/MS_D3/CF_D15 RST#
R74 7 30
A3V3_OUT CF_CS0#

1
0R0603-PAD C242
3D3V_S0 1 2 5V_VBUS_S0 8 29 MS_INS# SC1U10V3KX-3GP
5V_IN MS_INS#/CF_IORD#

2
CARD_3D3V_S0 9 28 SD_DAT7/XD_D2/MS_D2
CARD_3V3 SD_DAT7/XD_D2/MS_D2/CF_IOWR#
1

C C217 C224 C222 VREG 10 27 SD_DAT0/XD_D6/MS_D0 C


SC4D7U6D3V5KX-3GP SCD1U16V2ZY-2GP SC1U10V3KX-3GP VREG SD_DAT0/XD_D6/MS_D0/CF_RST#
DY 3D3V_D_S0 11 26 SD_DAT1/XD_D3/MS_D1_1
2

D3V3_OUT SD_DAT1/XD_D3/MS_D1/CF_IORDY

CF_D0/SM_WPM#/SD_WP
2
12 25 XD_D5/MS_BS
C228 DGND XD_D5/MS_BS/CF_A2
SCD1U16V2ZY-2GP
1

MODE_SEL

CF_D8/SM_CD#

CF_D1/XD_CD#

CF_A0/SD_CD#
R108

CF_A1/XD_D4

1
CF_DMACK#
Place close to controler IC 0R2J-2-GP

CF_DMARQ

1
SD_DAT1/XD_D3/MS_D1_1 2 1 SD_DAT1/XD_D3/MS_D1 C238 R97

CF_CD#

CF_D10
SC47P50V2JN 10KR2J-3-GP

CF_D9

CF_D2
GPIO0
R110

2
0R2J-2-GP

2
SD_CLK/XD_D1/MS_CLK 2 1 SD_CLK/XD_D1/MS_CLK_R XD_D4 2 DY 1
RTS5158-GP

13

14

15

16

17

18

19

20

21

22

23

24
R107
71.05158.00G 0R2J-2-GP
ENG
R421 LED4
68R2-GP LED-W-23-GP

XD_CD#

SD_CD#
SD_WP

XD_D4
3D3V_S0 1 2 VBUS_R A K VBUS_LED

DY DY

B B

4 IN1 CARD-READER (SD/SD IO/MMC/MMC4.0/MS/MS PRO/XD)

CN2

CARD_3D3V_S0 4 22 SD_DAT5/XD_D0
XD-VCC XD-DAT0 SD_CLK/XD_D1/MS_CLK_R
19 SD-VCC XD-DAT1 21
29 17 SD_DAT7/XD_D2/MS_D2
MS-VCC XD-DAT2 SD_DAT1/XD_D3/MS_D1
XD-DAT3 12
SD_DAT4/XD_WP# 28 11 XD_D4
SD_DAT5/XD_D0 MMC-DAT4 XD-DAT4 XD_D5/MS_BS
24 MMC-DAT5 XD-DAT5 9
SD_DAT6/XD_D7/MS_D3 13 7 SD_DAT0/XD_D6/MS_D0
SD_DAT7/XD_D2/MS_D2 MMC-DAT6 XD-DAT6 SD_DAT6/XD_D7/MS_D3
10 MMC-DAT7 XD-DAT7 6
CARD_3D3V_S0
XD_D5/MS_BS 14 32 SD_DAT4/XD_WP#
MS_INS# MS-BS XD-WP SD_DAT3/XD_WE#
23 MS-INS XD-WE 33
SD_CLK/XD_D1/MS_CLK_R 27 34 XD_ALE
SD_DAT0/XD_D6/MS_D0 MS-SCLK XD-ALE XD_CLE
18 MS-DAT0 XD-CLE 35
1

C344 C280 SD_DAT1/XD_D3/MS_D1 16 36 XD_CE#


SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP SD_DAT7/XD_D2/MS_D2 MS-DAT1 XD-CE SD_DAT2/XD_RE#
20 MS-DAT2 XD-RE 37
DY SD_DAT6/XD_D7/MS_D3 25 38 XD_R/B#
2

MS-DAT3 XD-R/-B XD_CD#


XD_CD 40
SD_CD# 1
SD_WP SD_CD
A 2 SD_WP NP1 NP1 A
SD_CLK/XD_D1/MS_CLK_R 15 NP2
SD_CMD SD-CLK NP2
26 SD-CMD
SD_DAT0/XD_D6/MS_D0 8 3
SD_DAT1/XD_D3/MS_D1 5
SD-DAT0
SD-DAT1
7IN1_GND
7IN1_GND 39 Wistron Corporation
SD_DAT2/XD_RE# 31 41 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SD_DAT3/XD_WE# SD-DAT2 7IN1_GND Taipei Hsien 221, Taiwan, R.O.C.
30 SD-DAT3 7IN1_GND 42

Title
MEMCARD-40P-GP-U2
USB Card Reader Controller - RTS5158
Size Document Number Rev
20.I0055.001
Calado -1
Date: Wednesday, September 12, 2007 Sheet 25 of 39
5 4 3 2 1
A B C D E

3D3V_S0 5VA_S0
"VAUX" Pull high to enable standby mode
RN33
4 5 C539

1
3 6 C526 SC10U10V5ZY-1GP

1
KBC_BEEP_1 2 7 AUDIO_BEEP 1 2AUDIP_PC_BEEP C529 C525 C541

SCD1U10V2KX-4GP
1 8 SC10U10V5ZY-1GP SCD1U10V2KX-4GP

2
C522 SC1U10V3KX-3GP ENG

2
4 SCD47U16V3ZY-3GP SRN47KJ-1-GP C527 4

1
28 KBC_BEEP 1 2
R347 C520
DY
1 2
10KR2J-3-GP SC100P50V2JN-3GP SC10P50V2JN-4GP R350

2
17 ACZ_SPKR 1 2 SPKR_SB_1 PESET# 1 2 ACZ_RST# 16,21 4K99R2F-L-GP
R348 0R2J-2-GP ACZ_SYNC 16,21

2
C519 ACZ_BITCLK 16 1 2 LINEOUT_JD# 27,38
SCD47U16V3ZY-3GP C530
DY
1 2

SC10P50V2JN-4GP ALC268_SENSE

C528 R352
DY 20KR2F-L-GP

25
38

12
11
10

33

44
43

34
13
1 2

1
9

6
U50 1 2 MIC_JD# 27,38
SC10P50V2JN-4GP

PCBEEP

BCLK

SENSE_B
SENSE_A
DVDD-IO

RESET#
AVDD1
AVDD2
DVDD

SYNC

NC#33

NC#44
NC#43
23 LINE1-L_PORT-C SDATA-OUT 5 ACZ_SDATAOUT 16,21
24 8 AC97_DATIN 1 2 ACZ_SDATAIN0 16
LINE1-R_PORT-C SDATA-IN R349 39R2J-L-GP
14 NC#14
15 NC#15
SPDIFO 48
29 47 G1410_SHDN# 27
LINE1-VREFO EAPD
31 GPIO1

3
27,38 AUD_MICIN_L
27,38 AUD_MICIN_R
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
1
1
2 C537 MIC1-L_PORT-B 21
2 C538 MIC1-R_PORT-B 22
MIC1-L_PORT-B
MIC1-R_PORT-B
ALC268 NC#45
DMIC-CLK
45
46 DMIC_CLK 14
3

16 MIC2-L_PORT-F
17 MIC2-R_PORT-F HP-OUT-L_PORT-A 39 SOUNDL 27
HP-OUT-R_PORT-A 41 SOUNDR 27
R356 1 2 2K2R2J-2-GP MIC1V_R 32
R355 1 MIC1-VREFO-R
2 2K2R2J-2-GP MIC1V_L 28 MIC1-VREFO-L LINE-OUT-L_PORT-D 35 FRONTL 27

DMIC-12/GPIO0
DMIC-34/GPIO3
30 MIC2-VREFO LINE-OUT-R_PORT-D 36 FRONTR 27

MONO-OUT
1

C550 C549

JDREF
AVSS1
AVSS2
DVSS
DVSS

VREF

CD-G
CD-R
CD-L
SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP
2

ALC268-GR-GP

26
42
4
7

27

40
37

2
3

18
20
19
JDREF
DMIC_12 14
MONO-OUT
VREF

1
TP158
1

TPAD30
1

C548 C545 R354


DY SC10U10V5ZY-1GP SCD47U16V3ZY-3GP 20KR2F-L-GP
2
2

2
2 2

POWER GENERATE *Layout*


5V_S0 U51
20 mil
5VA_S0
1 EN NC#5 5
2 GND
3 VIN VOUT 4
1

C544
1

1
SC1U10V3KX-3GP RT9198-4GPBG-GP C542 C540 ICS 1
SC1U10V3KX-3GP

74.09198.A7F
2

SC2D2U10V3ZY-1GP
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2nd:74.00923.C3F Title
(G923-475T1UF) AZALIA CODEC - ALC268
Size Document Number Rev
Calado -1
Date: Wednesday, September 12, 2007 Sheet 26 of 39
A B C D E
A B C D E

ENG
C575 R395
AUDIO OP AMPLIFIER
SC2700P50V3KX-1GP 56KR2J-L1-GP 3D3V_S0 SC47P50V2JN-3GP
C554
DY
26 SOUNDL 1 2 L_LINE_IN_1 1 2 L_LINE_IN U48 1 2

2
1 6 1410_VSS C546 SC1U16V3KX-2GP R357 R363
R394 5V_S0 G1410_SHDN# 2 IN OUT 20KR2J-L2-GP 18KR2F-GP
SHDN# C1+ 5 1 2
DY 0R2J-2-GP 3 GND C1- 4 1 2SOUND_L1 1 2 HP_L 1 2 SPKR_L+1
C524 26 FRONTL
DY NC#7 7

1
SC4D7U10V5ZY-3GP 1 2SOUND_R1 1 2 HP_R 1 2

1
4 R75 26 FRONTR SPKR_R+1 4
100KR2J-1-GP G5930RB1U-GP C547 SC1U16V3KX-2GP R358 R364
U54 74.05930.073 20KR2J-L2-GP 18KR2F-GP
5V_S0 ENG 1 2

2
16 VDD SHUTDOWN# 19 AMP_SHUTDOWN# 28 DY
10 BYPASS 1 2 C555
C579 C569 C578 BYPASS C570 SC1U16V3ZY-GP SC47P50V2JN-3GP
15 PVDD
1

1
SC4D7U10V5ZY-3GP

SC4D7U10V5ZY-3GP

SC1U16V3ZY-GP
6 9 LIN+ 2 1
PVDD LIN+ L_LINE_IN
LIN- 5
C571
2

GAIN0 2 18 SPKR_R+ SC1U16V3ZY-GP


GAIN1 GAIN0 ROUT+ SPKR_R-
3 GAIN1 ROUT- 14
SPKR_L+ 4 U52
SPKR_L- LOUT+
8 LOUT-
1 3D3V_S0 8 2 SPKR_L+1
RIN+ GND 1410_VSS PVDD OUTL SPKR_R+1
2 1 7 RIN+ GND 11 3 NVDD OUTR 4
R_LINE_IN 17 13 5V_S0 ENG C557 C563
RIN- GND

1
C572 20
GND

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP
SC1U16V3ZY-GP 12 21 HP_L 7 5 G1410_SHDN#
NC#12 GND 3D3V_S0 HP_R INL SHDN# G1410_SHDN# 26
6

2
INR

2
APA2031RI-TRLGP R385 R388 GAIN0 GAIN1 Av(dB) 9 NC#9 PGND 1 R353 R351

10KR2J-3-GP
74.02031.01G 10KR2J-3-GP 10KR2J-3-GP 0R2J-2-GP

2
DY C532 C558
ENG G1412RC1U-GP DY
0 0 6

1
SC1U6D3V3KX-1GP

SCD1U10V2MX-3GP
GAIN1 GAIN0 74.01412.AE3

1
0 1 10 AMP_SHUTDOWN# 28

2
26 SOUNDR 1 2R_LINE_IN_1 1 2 R_LINE_IN
3 R386 R387 3
1 0 15.6
2
C577 R407 0R2J-2-GP DY 0R2J-2-GP
SC2700P50V3KX-1GP 56KR2J-L1-GP R406
1 1 21.6
DY 0R2J-2-GP

1
1

R,L 2W Speaker

Internal Speaker
LOUT1

NP2 PD
NP1 ENG
5 LINEOUT_JD# LINEOUT_JD# 26,38
4
3 SPKR_R_A1 1 2 SPKR_R+1 38
6 56R2F-1-GP R405

5
2 SPKR_L_A1 1 2 SPKR_L+1 38 SPKR1
1 56R2F-1-GP R404
1
2

SPKR_L- 1
38 SPKR_L-
2

SHIELDING
EC122 C576 C580 RN28
2 PHONE-JK235-GP-U2 SC680P50V2KX-2GPDY SPKR_L+ 2
SRN1KJ-7-GP 38 SPKR_L+ 2
SC1KP50V2KX-1GP

SC680P50V2KX-2GP

22.10133.B21 DY SPKR_R- 3
1

38 SPKR_R- SPKR_R+
DY DY 38 SPKR_R+ 4
4
3

AUD_AGND

6
1
1
1
1
MICIN1 ACES-CON4-1-GP-U1
AUD_AGND AUD_AGND
NP2

2
2
2
2
NP1 DY DY DY DY 20.D0197.104
5 MIC_JD# MIC_JD# 26,38
4
3 AUD_MIC_R 1 R408 2 AUD_MICIN_R 26,38

EC120 SC100P50V2JN-3GP
EC119 SC100P50V2JN-3GP
EC117 SC100P50V2JN-3GP
EC115 SC100P50V2JN-3GP
6 1KR2J-1-GP
2 AUD_MIC_L 1 2 AUD_MICIN_L 26,38
1 R412
1
1

1KR2J-1-GP 1st source:20.D0197.104


2

SHIELDING
R409 R415
PHONE-JK233-GP-U2 EC121 EC125 EC126 DYDY 2nd source:20.F0984.004
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP

10KR2J-3-GP

10KR2J-3-GP

22.10133.B01 AUD_AGND DY SC1KP50V2KX-1GP


1

DY DY
2
2

PD

AUD_AGND
AUD_AGND 5V_S0
D26
PD ENG
1 2 ICS 1

SCD1U25V2ZY-1GP L24 3 DY
EC128 FCM1608KF-121-GP
1 2 1DY 2 1 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
EC129 SCD1U25V2ZY-1GP G78 AUD_AGND Taipei Hsien 221, Taiwan, R.O.C.
BAV99-5-GP
1 2 1 2
Title
GAP-CLOSE
AUDIO AMP AND JACK
AUD_AGND AUD_AGND Size Document Number Rev

Calado -1
Date: Wednesday, September 12, 2007 Sheet 27 of 39
A B C D E
A

3D3V_AUX_S5
D10
1 BAS16-1-GP 3D3V_S0
17 ECSCI#_1

8
7
6
5
3ECSCI#_KBC C214 82.30001.691 C215 KCOL[1..16] 29,38

1
RN18 1 DY 2 E51_RxD SC15P50V2JN-2-GP SC15P50V2JN-2-GP KROW[1..8] 29,38
SRN4K7J-10-GP 2 R96 10KR2J-3-GP
3 2

2
1 DY 2 E51_TxD
R100 10KR2J-3-GP
X2 R61
10KR2J-3-GP
1 1 2
2
3
4
BAT_SCL THER_SCL DY
BAT_SDA THER_SDA 1 2 E51_TxD 3D3V_AUX_S5 KBC_XO_14 1

1
4
R193 4K7R2F-GP R68 U14B 2 OF 2 4

33KR2J-3-GP X-32D768KHZ-38GPU
RN19

2
3D3V_AUX_S5
3D3V_S0 BLUETOOTH_EN 5 4 R67 1 2 1 2 KBC_XI 77 53 KCOL1

2
S5_ENABLE 10KR2J-3-GP R69 R70 32KX1/32KCLKIN KBSOUT0/JENK# KCOL2
6 3 KBSOUT1/TCK 52
7 2 10MR2J-L-GP 10MR2J-L-GP 51 KCOL3
KBSOUT2/TMS KCOL4
8 1 3D3V_S0 50

1
KBSOUT3/TDI

1
THER_SCL C205 C357 C204 C203 C213 KBC_XO 79 49 KCOL5
32KX2 KBSOUT4

SC10U6D3V5MX-3GP

SCD1U10V2MX-3GP

SCD1U10V2MX-3GP

SCD1U10V2MX-3GP

SCD1U10V2MX-3GP
22 LOW_PWR 30 48 KCOL6
SRN10KJ-6-GP CLKOUT/GPIO55 KBSOUT5/TDO KCOL7
Q9 47

2
KBSOUT6/RDY# KCOL8
29 KBC_CIR 63 TB1/GPIO14/HGPIO04 KBSOUT7 43
KCOL9
4 3
117
31
TA2/GPIO20 KBC KBSOUT8 42
41 KCOL10
TA1/GPIO56 KBSOUT9 KCOL11
26 KBC_BEEP 32 A_PWM0 KBSOUT10 40
5 2 118 39 KCOL12
A_PWM1/GPIO21 KBSOUT11 KCOL13
SMBC_G792 20 14 BRIGHTNESS 62 B_PWM0/GPIO13 KBSOUT12/GPIO64 38
THER_SDA 6 1 3D3V_S0 37 KCOL14
SMBD_G792 20 KBSOUT13/GPIO63
VBAT 36 KCOL15
KBSOUT14/GPIO62 KCOL16
KBSOUT15/GPIO61/XOR_OUT 35
2N7002DW-1-GP C227 3D3V_S0 13 34 TP68 TPAD28
37 BAT_IN# PSDAT3/GPIO12 KBSOUT16/GPIO60

1
84.27002.D3F C230 SCD1U10V2MX-3GP DY DY C216 RN20 12 33 TP73 TPAD28
SC10U6D3V5MX-3GP C202 SCD1U16V2ZY-2GP PSCLK3/GPIO25 KBSOUT17/GPIO57/HGPIO03
1 4 11 PSDAT2/GPIO27
SC10U10V5ZY-1GP 2 3 10

2
PSCLK2/GPIO26 KROW1
29 TPDATA 71 PSDAT1 KBSIN0 54
SRN10KJ-5-GP KROW2
FOR KBC DEBUG 29 TPCLK 72 PSCLK1 PS/2 KBSIN1 55
56 KROW3
KBSIN2 KROW4
KBSIN3 57
5V_AUX_S5 C344,C645 colse to Pin VDD C319,C657 colse to Pin102 58 KROW5
KBSIN4 KROW6
29 SPIDI 86 F_SDI KBSIN5 59
3D3V_S0 3D3V_AUX_S5 87 60 KROW7
29 SPIDO
3 3

TPAD28 TP14 F_SDO KBSIN6 KROW8


TPAD28 TP1 1 2
29 SPICS# 90
92
F_CS0# FIU KBSIN7 61
R63 29 SPICLK F_SCK
C209 0R0603-PAD ECRST#
VBAT
VCC_POR# 85
1

SCD1U16V2ZY-2GP
C210 3D3V_S0
RN22
R390 SC1U16V3ZY-GP
2

7,17 PLT_RST1# 2 0R0402-PAD


1 5 4 MAIL# WPC8763LDG-1-GP
102

115
INTERNET# 71.08763.A0G
80

19
46
76
88
6 3
1

C220 1 OF 2 U14A 7 2 BT_BTN#


SC470P50V2KX-3GP DY 8 1 A-BUTTON#
VBAT

VDD

AVCC

VCC
VCC
VCC
VCC
VCC
5V_S0 3D3V_S0 RN21
2

3D3V_AUX_S5 5 4 ECRST#
SRN10KJ-6-GP KBC_THERMALTRIP#
6 3
14 A-BUTTON# 124 104 7 2 KA20GATE
LPCPD#/GPIO10/HGPIO00 VREF

8
7
6
5

1
PLT_RST1#_1 7 3D3V_S0 8 1 KBRCIN# C241
LRESET#

SC1U10V3KX-3GP
RN17
2 A/D 97 AD_IA 36

E
3 PCLK_KBC LCLK AD0/GPI90 SRN10KJ-6-GP Q11
16 LPC_LFRAME# 3 98 MAIL# 14

2
LFRAME# AD1/GPI91
2

126 99 INTERNET# 14 SRN10KJ-6-GP 20,30,38 PURE_HW_SHUTDOWN# B


16 LPC_LAD0 LAD0 AD2/GPI92
R89 DY 127 100 DVR_1
16 LPC_LAD1 LAD1 AD3/GPI93
0R2J-2-GP 128 108 DVR_0 MMBT3906-3-GP
16 LPC_LAD2

1
2
3
4

C
LAD2 AD4/GPIO05 KBC_MATRIX0# TPDATA E-BUTTON# 84.03906.R11
16 LPC_LAD3 1
125
LAD3 LPC AD5/GPIO04 96
TPCLK WIRELESS_BTN#
17 INT_SERIRQ
1

SERIRQ
17 PM_CLKRUN# 8 CLKRUN#/GPIO11/HGPIO02
1 DY2 PCLK_KBC_RC 16 KBRCIN# 122 KBRST#
16 KA20GATE 121 GA20 DA0/GPI94 101 KBC_THERMALTRIP# 30
C234 ECSCI#_KBC 29 105 BRIGHT_SETTING
SC4D7P50V2CN-1GP ECSCI# DA1/GPI95 ENERGY_DET 3D3V_S0
9
123
SMI# D/A DA2/GPI96 106
107
ENERGY_DET 22
2

17 ECSWI# PWUREQ# DA3/GPI97 CRT_DEC# 15 2

R399 R400

1
10KR2J-3-GP
THER_SDA VR1 10KR2J-3-GP
THERMAL-----> THER_SCL
68 SDA2 GPIO01 64 PM_SLP_S3# 17,24,30,34,35
R392
67
69
SCL2 SMB GPIO03 95
93
KBC_PWRBTN# 14 4
1 100R2F-L1-GP-U
36,37 BAT_SDA SDA1 GPIO06/HGPIO06 AC_IN# 36
BATTERY-----> 70 94 LID_CLOSE# 29 NP1

2
36,37 BAT_SCL SCL1 GPIO07/HGPIO07 DVR_1_C DVR_1
GPIO23 119 PM_PWRBTN# 17,38 NP2 2 1 2
6 LDRQ0# 16 3 DVR_0_C 1 2 DVR_0
LDRQ#/GPIO24/HGPIO01 R393
GPIO30 109 NUM_LED# 14 5

1
100R2F-L1-GP-U
17,24,34,35 PM_SLP_S4# 81 SWD/GPIO66 SP GPIO31 120
65
CAP_LED# 14
VR-10M-GP-U1 C573
GPIO32 PWR_G_LED 14
66 17.10131.106 C574 SC100P50V2JN-3GP

2
GPIO33 PWR_O_LED 14 SC100P50V2JN-3GP
GPIO40 16 RSMRST#_KBC 17
29 E-BUTTON# 84 SPI_DI/GPIO77 GPIO42/TCK 17 AD_OFF 37
BLUETOOTH_EN
24 BLUETOOTH_EN 83 SPI_DO/GPIO76/SHBM SPI GPIO43/TMS 20 L-line_LED 14
24 WIRELESS_EN 82
91
SPI_SCK/GPIO75 GPIO GPIO44/TDI 21
22
CHARGE_LED 14
27 AMP_SHUTDOWN# GPIO81 GPIO45 BT_BTN# 14
GPIO46/TRST# 23 WLAN_TEST_LED 14 ENG H Big KB(17")
GPIO47/JEN0# 24
GPIO50/TDO 25 BT_LED 14
24 E51_TxD 111 SOUT_CR/GPIO83/BADDR1 GPIO51 26 WIRELESS_BTN# 14
113 27
24 E51_RxD
112
SIN_CR/CIRRX/GPIO87
GPIO84/HGPIO01/BADDR0
GPIO52/RDY#
GPIO53 28
BLON_OUT 14
GMCH_BL_ON 7
L Small KB (Biwa)
IRRX2_IRSL0/GPIO70 73
114 74 IRTX 3D3V_AUX_S5
14 DC_BATFULL CIRTX/GPIO16/HGPIO04 IRTX/GPIO71 MODEL_ID# 3D3V_S0
14 GPIO34/CIRRX2 IRRX1/GPIO72 75
30,33,38 S5_ENABLE 15 GPIO36 GPIO82/HGPIO00/TRIS# 110 USB_PWR_EN# 21,38

1
SER/IR
1
1 1

R95 R66 R62 R93 DY ICS


1

1
10KR2J-3-GP

R99 10KR2J-3-GP
10KR2J-3-GP

10KR2J-3-GP

VCORF 44 DY 10KR2J-3-GP DY
VCORF BT_LED
Wistron Corporation

2
1

R420 KBC_MATRIX0#
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
1
AGND

C201 BRIGHT_SETTING
GND
GND
GND
GND
GND
GND

Taipei Hsien 221, Taiwan, R.O.C.


2

1
10KR2J-3-GP

SCD1U16V2ZY-2GP DY
2

R92
Title
WPC8763LDG-1-GP R94 10KR2J-3-GP
KBC WPC8763L
103

5
18
45
78
89
116

71.08763.A0G 10KR2J-3-GP
2

Size Document Number Rev


2 A3
2

Calado -1
A
Date: Wednesday, September 12, 2007 Sheet 28 of 39
A B C D E

3D3V_AUX_S5

3D3V_AUX_S5 Hall Switch

1
LID1
SPI FLASH ROM VDD 1 R22
10KR2F-2-GP

5
6
7
8
3 GND
RN23 R21
8M Bits

2
2 COVER_SW# 2 0R0402-PAD
1
SRN10KJ-6-GP OUT LID_CLOSE# 28

1
4 ME268-002-GP C43 4
74.00268.07B SCD1U16V2ZY-2GP C41

4
3
2
1
SCD22U16V3KX-2-GP

2
SPI_HOLD# KBC_CIR 28 DY
2nd source: 74.09132.07B
R83 U17 R85 3D3V_AUX_S5
0R0402-PAD 0R0402-PAD
28 SPICS# 1 2 SPICS#_1 1 8 BIOS_VCC 1 2
SPIDI_1 CS# VCC SPI_HOLD#
28 SPIDI 1 2 2 DO HOLD# 7
R86 SPI_WP# 3 6 SPICLK_1 1R84 2 150R2J-L1-GP-U 3D3V_S0
WP# CLK SPICLK 28
150R2J-L1-GP-U 4 5 SPIDO_1 1 2 SPIDO 28
GND DIO
1

EC56 EC54 R82 150R2J-L1-GP-U


DY DY

1
SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

W25X80-VSSI-GP R402 R403


2

1
72.25X80.001 EC57 EC55 10KR2J-3-GP 10KR2J-3-GP
PlanarID DY
DY

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP
(1,0)

2
SA: 0,0 17 PCB_VER0
SB: 0,1 17 PCB_VER1

1
-1: 1,0 R397 DY R398
10KR2J-3-GP 10KR2J-3-GP
-2: 1,1

2
3 3

E-key
PD R201
470R2J-2-GP
LEFT1 E-BUTTON#_1 1 2 E-BUTTON# 28
1 3

1
5 EC46
DY

SC47P50V2JN-3GP
2 4

2
SW-TACT-119-GP
62.40009.671
KB1 20.K0192.025
MLX-CON25-1-GP

5V_S0
EMI Bypass cap.
Touch Pad CONN
27
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2

1
26

1
2 KCOL16 EC14 2
1 2SC220P50V2JN-3GP
KCOL15 EC15 1 2SC220P50V2JN-3GP C183
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9

KCOL14 EC17 1 2SC220P50V2JN-3GP SC1U16V3ZY-GP

2
KCOL13 EC18 1 2SC220P50V2JN-3GP ENG
TPAD1
PD
13
KCOL8 EC24 1 2SC220P50V2JN-3GP 1
KCOL7 EC25 1 2SC220P50V2JN-3GP
KCOL6
KCOL5
EC26
EC27
1
1
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP 28 TPDATA 1
RN16
4 TP_DATA
TP_CLK
2
3
Touch Pad Button
28 TPCLK 2 3 4
5
SRN100J-3-GP 6 LEFT2 TP_LEFT RIGHT1 TP_RIGHT

1
KCOL4 EC28 1 2SC220P50V2JN-3GP EC41 EC42 TP_RIGHT 7 1 3 1 3

SC47P50V2JN-3GP

SC47P50V2JN-3GP
KCOL3 EC29 1 2SC220P50V2JN-3GP 8
KCOL2 EC30 1 2SC220P50V2JN-3GP 9 5 5
2

2
KCOL1 EC31 1 2SC220P50V2JN-3GP 10
11 2 4 2 4
TP_LEFT 12
14 SW-TACT-119-GP SW-TACT-119-GP
KROW8 EC32 1 2SC220P50V2JN-3GP
KROW7 EC33 1 2SC220P50V2JN-3GP ACES-CON12-4-GP 62.40009.671 62.40009.671
KROW6 EC34 1 2SC220P50V2JN-3GP 20.K0228.012
KROW5 EC35 1 2SC220P50V2JN-3GP TP_RIGHT
KROW[1..8] TP_LEFT
KROW[1..8] 28,38
KCOL[1..16]
KCOL[1..16] 28,38
1

1
KROW4 EC37 1 2SC220P50V2JN-3GP EC49 EC50 ICS 1
SC47P50V2JN-3GP

SC47P50V2JN-3GP

KROW3 EC38 1 2SC220P50V2JN-3GP


Internal KeyBoard CONN KROW2 EC39 1 2SC220P50V2JN-3GP
2

KROW1 EC40 2SC220P50V2JN-3GP TP_DATA


1 25
1
38
38
TP_DATA
TP_CLK
TP_CLK Wistron Corporation
TP_RIGHT 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
........ 38 TP_RIGHT TP_LEFT Taipei Hsien 221, Taiwan, R.O.C.
KCOL12 EC19 1 2SC220P50V2JN-3GP 38 TP_LEFT
KCOL11 EC20 1 2SC220P50V2JN-3GP Title
KCOL10 EC21 1 2SC220P50V2JN-3GP
KCOL9 EC22 1 2SC220P50V2JN-3GP BUTTONs / KB / TOUCHPAD / BIOS
Size Document Number Rev
CHECK KB SPEC. AND PIN DEFINE
Calado -1
Date: Wednesday, September 12, 2007 Sheet 29 of 39
A B C D E
Aux Power 3D3V_AUX_S5

1D05V_S0
1D05V_S0

2
5V_AUX_S5 I max = 150 mA 3D3V_AUX_S5
R106
U7 2K2R2J-2-GP R105
56R2J-4-GP
1 5

1
VIN VOUT
2 GND 1 2 PM_THRMTRIP-A# 4,7,16
1 R432 2 3 4

B
SHDN# NC#4

1
C14 C244
1

SC1U16V3ZY-GP
C16 100KR2F-L1-GP SCD1U16V2ZY-2GP
SC1U16V3ZY-GP

G909-330T1U-GP PM_THRMTRIP-A# E C KBC_THERMALTRIP# 28 R104

E
2
C583 74.00909.03F 1KR2J-1-GP DY
2

Q13
SCD1U16V2ZY-2GP

DY 2H_PWRGD# B MMBT2222A-3-GP
2nd source:74.09198.G7F MMBT3904-3-GP 4,16,38 H_PWRGD 1
Q12
PD

C
1
C246 DY
SCD1U16V2ZY-2GP

2
2
D11
BAS16-1-GP 3 PURE_HW_SHUTDOWN# 20,28,38

S5_ENABLE 28,33,38

Run Power
5V_S0 5V_S5

C564 U29
DCBATOUT Q19 S D
TP0610T-T1-E3-GP RUN_POWER_ON
DY
1 2 1
S D
8
2 7
R376 SCD1U25V3KX-GP 3 S D 6
Z_12V G D
S

1 2 2 3 4 5
D

10KR2J-3-GP
K
1

C565 R378 AO4468-GP


3D3V_S0
SCD1U16V2ZY-2GP

100KR2J-1-GP

D25 84.04468.037
1

PDZ9D1B-GP
2
G
1

DY 2 1 Z_12V_G3 83.9R103.C3F
A
2

R384 R375
1
10KR2J-3-GP

100R5J-3-GP 330KR2F-L-GP R377


3D3V_S0 3D3V_S5
1

DY U19
3D3V_runpwr 2

R383 1 S D 8
100KR2J-1-GP 2 S D 7
2

3 S D 6
4 G D 5
2

AO4468-GP
Z_12V_D3

84.04468.037
Q21 Q20
2N7002-11-GP
D

2N7002-11-GP
DY DY

G Z_12V_D3 G
S

Q22
D

2N7002-11-GP
84.27002.W31

17,24,28,34,35 PM_SLP_S3# G
ICS
S

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
RUN POWER and 3D3V_AUX_S5
Size Document Number Rev

Calado -1
Date: Wednesday, September 12, 2007 Sheet 30 of 39
5 4 3 2 1

TPS51124
CPU_CORE
1D8V/1D05V
MAX8770
Input Power Output Power
5V_S0
VID Setting Output Signal VDD
H_VID0 1D8V_S3 (8.5A)
VID0(I / 1.05V) VGATE_PWRGD 1D8V (O)
H_VID1 PWRG(OD / 3.3V)
D VID1(I / 1.05V) DCBATOUT_8717 D
H_VID2 VCC
VID2(I / 1.05V) 1D05V_S0 (9.5A)
H_VID3 1D05V(O)
VID3(I / 1.05V)
H_VID4
VID4(I / 1.05V) Input Signal
H_VID5
VID5(I / 1.05V) Output Power PM_SLP_S4#
H_VID6 EN1
VID6(I / 1.05V) VCC_CORE_S0(Imax=47A)
VCC_CORE_PWR(O) PM_SLP_S3# 0D9V_S0
Input Signal EN2 5V_S5
PSI# VIN
PSI# (I / 3.3V)
CPUCORE_ON Output Signal 1D8V_S3 0D9V_S0 (1.5A)
SHDN#(I / 3.3V) CPUCORE_ON VLDOIN VTT
PM_DPRSLPVR PGOOD1
DPRSLPVR (I / 3.3V)
H_DPRSTP# PM_SLP_S3#
DPRSTP# (I / 3.3V) S3 0D9V_S3
VTTREF
PM_SLP_S4#
S5
Voltage Sense
VCC_SENSE
CCI(I / Vcore) TPS51100
C C
VSS_SENSE
GNDS(I / Vcore)

1D25V_S0
Input Power
DCBATOUT_6262
VCC(I) 1D8V_S0 1D25V_S0 (4A)
VIN 1D25V(O)
5V_S0
VCC(I)
PM_SLP_S3# CPUCORE_ON
5V_S0 EN POK
VDD(I)

APL5913

TPS51120 1D5V_S0
5V/3D3V
B
1D8V_S3 1D5V_S0 (4A) B
VIN 1D5V(O)
Input Signal Output Signal
PGOOD1(OD / 5V) CPUCORE_ON
PM_SLP_S3# CPUCORE_ON
EN POK
PGOOD2(OD / 5V) CPUCORE_ON
S5_ENABLE
ON3 APL5915
Output Power
S5_ENABLE Charger MAX8731
ON5
5V_S5 (6A)
PGOOD5(O) Input Signal Output Signal
CHGON#/OFF BT+SENSE
ICTL BATT
3D3V_S5 (7A)
PGOOD3(O)
Input Power BT_TH AC_IN
PKPRES ACOK

A DCBATOUT_51120 ICS A
VIN
Input Power Output Power
Wistron Corporation
AD+ BT+ 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
ACIN VOUT (O) Taipei Hsien 221, Taiwan, R.O.C.

Title
DCBATOUT
VOUT (O) Power Block Diagram
Size Document Number Rev
A3
Calado -1
Date: Monday, September 10, 2007 Sheet 31 of 39
5 4 3 2 1
1 2 3 4 5

G3
DCBATOUT 1 2 DCBATOUT_8770_1
GAP-CLOSE-PWR-2U
G5 ENG
1 2 DCBATOUT_8770_1

GAP-CLOSE-PWR-2U

1
G4 DCBATOUT_8770_2
1 2 DY TC19
ST15U25VDM-4-GP

2
GAP-CLOSE-PWR-2U

1
G6 EC7 EC8

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP
A 1 2 A
DY DY

2
GAP-CLOSE-PWR-2U
G11
1 2 DCBATOUT_8770_2
GAP-CLOSE-PWR-2U ENG
G15
1 2

1
GAP-CLOSE-PWR-2U
G13 TC20 TC19.TC20 changed 77.C1561.00L to 77.21561.00L
1 2 ST15U25VDM-4-GP
2
GAP-CLOSE-PWR-2U
G12
1 2 5V_S0

ENG GAP-CLOSE-PWR-2U
G79
1 2 DCBATOUT_8770_1
1

1
GAP-CLOSE-PWR-2U R269 C44
G80 10R3J-3-GP SC10U10V5KX-2GP

2
1 2
2

1
GAP-CLOSE-PWR-2U Id=13A
C417 8770_VCC DCBATOUT_8770_2 C383 C12 C384 DY C13 C382
Qg=10~14nC
1

5
6
7
8

5
6
7
8

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U25V3KX-GP
SC2D2U10V3KX-1GP

2
D
D
D
D

D
D
D
D
B 3D3V_S0 Rdson=9.4~12mohm B
965

1
2
1

U40 R262 U35 U6


R255 200KR2F-L-GP
2K2R2J-2-GP 19 25 AO4474-GP AO4474-GP
VCC VDD

G
S
S
S

G
S
S
S
2
8 8770_TON
2

4
3
2
1

4
3
2
1
TON C405
1 CLKEN# 0R0603-PAD SCD22U16V3KX-2-GP
2 30 8770_BST11 2 8770_BST1_11 2
17 VGATE_PWRGD PWRGD BST1 R253 VCC_CORE_S0
8770_D0 8770_DH1 L14
5 H_VID0 1
R2411
2
0R0402-PAD
2 8770_D1
31
32
D0 DH1 29 20061225 IND-D36UH-9-GP
5 H_VID1 R2401 0R0402-PAD 8770_D2 D1 8770_LX1
5 H_VID2 2 33 D2 LX1 28 1 2
R2381 0R0402-PAD
2 8770_D3 34
5 H_VID3 D3

1
R2391 0R0402-PAD
2 8770_D4 35 26 8770_DL1
5 H_VID4 R2371 0R0402-PAD 8770_D5 D4 DL1 R212 R215 TC15DY TC3 EC44
5 H_VID5 2 36 D5 DY

5
6
7
8

5
6
7
8

SE330U2VDM-6-GP

SE330U2VDM-6-GP
R2501 0R0402-PAD 8770_D6 2K1R2F-GP
2 37 27 0R2J-2-GP 960

2
5 H_VID6 D6 PGND1

D
D
D
D

D
D
D
D

SCD1U16V2ZY-2GP
R249 0R0402-PAD 18 U8 U36
8770_PSI# GND R213 R214
1 2 3 AO4456-GP AO4456-GP

1
4 PSI# R257 0R0402-PAD PSI#
1 2 1 2
1 2 8770_DPRSTP# 40 17 8770_CSP1 3K48R2F-GP
4,7,16 H_DPRSTP# R246 0R0402-PAD DPRSTP# CSP1 8770_CSN1 R263 C360 NTC-10K-9-GP
CSN1 16

G
S
S
S

G
S
S
S
1 2 8770_DPRSLPVR 39 100R2F-L1-GP-U 8770_CSP1 1 2
7,17 PM_DPRSLPVR R247 0R0402-PAD DPRSLPVR 8770_FB 1 R265 2 8770_FB_1 1 2

4
3
2
1

4
3
2
1
1 2 8770_SHDN# 38 3K65R2F-1-GP 8770_CSN1 SCD22U16V3KX-2-GP
33,34,35 CPUCORE_ON SHDN#
1
R248 0R0402-PAD Id=14.5A PANASONIC
PD C419
Qg=25~35nC 330uF / 2V / V size
2

C4111 2 8770_CCV 9 12 SC1000P50V3JN-GP DCBATOUT_8770_2


2

C R256 SC470P50V2KX-3GP CCV FB C


Rdson=5.9~7.25mohm ESR=6mohm / Iripple=3.7A
10KR2J-3-GP
C4141 2 8770_REF 11 VCC_SENSE 5
DY SCD22U10V2KX-1GP REF
10 8770_CCI C4121 2 8770_CCI_1 1 R264 2
1

CCI

1
SC470P50V2KX-3GP 20KR2F-L-GP

5
6
7
8

5
6
7
8
20 8770_BST21 2 8770_BST2_11 2 C39 DY C40 C410 C409 C408
BST2

D
D
D
D

D
D
D
D

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U25V3KX-GP
R270 0R0603-PAD C418 SCD22U16V3KX-2-GP 965

2
1 R261 2 8770_TIME 7 TIME DH2 21 8770_DH2
U12 U41
71K5R2F-1-GP 22 8770_LX2
LX2 AO4474-GP AO4474-GP

G
S
S
S

G
S
S
S
24 8770_DL2
1 R260 2 8770_THRM 6
DL2
Id=13A Circuit and components value need change
8770_VCC

4
3
2
1

4
3
2
1
THRM R266 DY
10KR2F-2-GP 23 1 2 5V_S0
Qg=10~14nC
PGND2 0R2J-2-GP Rdson=9.4~12mohm VCC_CORE_S0
14 8770_CSP2
CSP2
15 8770_CSN2 R271 L15
1D25V_S0 CSN2 100R2F-L1-GP-U IND-D36UH-9-GP
13 8770_GNDS 1 2 VSS_SENSE 5 1 2
GNDS
1 R259 2 8770_VRHOT# 5 VRHOT#
TC16 TC4 TC1 EC36
1

1
SE330U2VDM-6-GP

SE330U2VDM-6-GP

SE330U2VDM-6-GP

SCD1U16V2ZY-2GP
56R2J-4-GP 41 C416 R267 R268 DY
GND
5
6
7
8

5
6
7
8
1 R258DY2 8770_POUT 4 SC1000P50V3JN-GP 2K1R2F-GP 0R2J-2-GP
2

2
POUT
D
D
D
D

D
D
D
D
10KR2J-3-GP U39 U11
960 960 960

1
1

1 R272 2 1 R273 2
DY C407 MAX8770GTL-GP AO4456-GP AO4456-GP 3K48R2F-GP
D
SCD1U10V2KX-4GP ICS D
Id=14.5A NTC-10K-9-GP
2

G
S
S
S

G
S
S
Qg=25~35nC S C413
1 2
Wistron Corporation
4
3
2
1

4
3
2
1

G14 Rdson=5.9~7.25mohm
1 2 8770_CSP2 SCD22U16V3KX-2-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
GAP-CLOSE-PWR 8770_CSN2
Title

VCC_CORE_2
Size Document Number Rev
A3
Calado -1
Date: Wednesday, September 12, 2007 Sheet 32 of 39
1 2 3 4 5
A B C D E

G42 DCBATOUT_51120
DCBATOUT 1 2 DCBATOUT_51120
GAP-CLOSE-PWR-2U G66
G44 ENG TC21 changed 77.C1561.00L to 77.21561.00L 1 2

1
1 2 C274 C275

SC10U25V6KX-1GP

SC10U25V6KX-1GP
C270 GAP-CLOSE-PWR-2U

1
GAP-CLOSE-PWR-2U SCD1U50V3ZY-GP G55

2
G46 DY TC21 1 2

5
6
7
8
1 2 ST15U25VDM-4-GP

D
D
D
D
U28 GAP-CLOSE-PWR-2U
GAP-CLOSE-PWR-2U AO4468-GP G57
G62 1 2
51120_V5FILT
4 1 2 Id=9.2A Cyntec 7*7*3 5V Iomax=5A 4
GAP-CLOSE-PWR-2U
Qg=9~12nC DCR=37mohm, Irating=5.5A

G
S
S
S
GAP-CLOSE-PWR-2U
G60
R131 OCP>9A G56
Rdson=17.4~22mohm Isat=10A 1 2

4
3
2
1
51120_VREG5 1 5V_PWR 5V_PWR 5V_S5
1 2 2 L11
5D1R3F-GP 51120_DRVH1 GAP-CLOSE-PWR-2U

1
GAP-CLOSE-PWR-2U 51120_LL1 1 2 G59
G58 C297 1 2
1 2 SC1U16V3KX-2GP IND-4D7UH-88-GP

5
6
7
8
GAP-CLOSE-PWR-2U

1
D
D
D
D
GAP-CLOSE-PWR-2U U27 TC13 G61

1
51120_GND AO4712-GP ST220U6D3VDM-17GP 1 2

1
C276 DCBATOUT_51120 R152

2
51120_LL2 1 R117 2 51120_LL2_1 1 2 51120_VBST2 Id=9.1A C318DY DY 30KR3F-GP GAP-CLOSE-PWR-2U
SC33P50V3JN-GP KEMET 220uF G63

2
Qg=12nC

G
S
S
S
0R3-0-U-GP SCD1U50V3ZY-GP 1 2

2
ESR=25mohm

1
Rdson=15~18mohm

4
3
2
1
C326 C321 51120_VFB1 Iripple=2.2A GAP-CLOSE-PWR-2U
51120_LL1 1 R157 2 51120_LL1_1 1 2 51120_VBST1 SC1U25V5KX-1GP G64

1
5V_AUX_S5 1 2
G48 0R3-0-U-GP SCD1U50V3ZY-GP 51120_V5FILT 51120_DRVL1 R150
DY 7K5R3F-2-GP
1 2 51120_VREG5 GAP-CLOSE-PWR-2U
3D3V_AUX_S5 R433 R126
GAP-CLOSE-PWR-2U 1 2 51120_VREG3 51120_COMP2 1 2

2
1
SC10U10V5KX-2GP

0R2J-2-GP 0R2J-2-GP
1
SC10U10V5KX-2GP

C305 C286 51120_COMP1 1 2


PD R139 51120_GND
DY
2

0R2J-2-GP
2

U22 3D3V_S0

19
21

28
13

20
22

7
2
3 51120_GND 3
51120_GND

VREG3
VREG5

VBST1
VBST2

V5FILT

COMP2
COMP1
VIN

1
R164

R153
100KR2J-1-GP Vout=1V*(R1+R2)/R2
28,30,38 S5_ENABLE 1 2 0R2J-2-GP 51120_EN1 29 EN1 LL2 15 51120_LL2
R118 1 2 0R2J-2-GP 51120_EN2 12 26 51120_LL1

2
51120_VREG5 1 R120 0R2J-2-GP 51120_EN3 EN2 LL1
2 10 EN3
DCBATOUT_51120 R121 1 2 0R2J-2-GP 51120_EN5 9 EN5 51120_PGD1 R154 1
PGOOD1 30 2 0R2J-2-GP CPUCORE_ON 32,34,35
R128 1 2 0R2J-2-GP 51120_VFB2 6 11 51120_PGD2 R119 1 2 0R2J-2-GP
R135 1 VFB2 PGOOD2
51120_V5FILT 2 0R2J-2-GP 51120_VFB1 3 VFB1
DCBATOUT_51120
25 51120_DRVL1 G39
5V_PWR DRVL1 51120_DRVL2
1 VO1 DRVL2 16 1 2
EN3 to VREG5 and EN5 to VBAT. 3D3V_PWR 8 VO2 51120_DRVH1 GAP-CLOSE-PWR-2U
DRVH1 27

1
51120_VREF2 4 14 51120_DRVH2 C329 C330 G35
VREF2 DRVH2

SC10U25V6KX-1GP

SC10U25V6KX-1GP
C327 1 2
SKIPSEL
1

TONSEL

SCD1U50V3ZY-GP
PGND1
PGND2

2
C299 GAP-CLOSE-PWR-2U
GND
GND

CS1
CS2

G37
2

5
6
7
8
SC1000P50V3JN-GP 1 2
3D3V_PWR 3D3V_S5

D
D
D
D
U20
24
17
5
33

23
18

251120_SKIPSEL 32
31

51120_GND TPS51120RHBR-GPU1 AO4468-GP GAP-CLOSE-PWR-2U


Id=9.2A G45
Qg=9~12nC Cyntec 7*7*3 3D3V Iomax=6A 1 2
G75 R155
DCR=37mohm, Irating=5.5A

G
S
S
S
1 2 51120_TONSEL 1
0R2J-2-GP
2 51120_VREF2 Rdson=17.4~22mohm OCP>10A GAP-CLOSE-PWR-2U
G43
Isat=10A

4
3
2
1
2 GAP-CLOSE-PWR 51120_GND 3D3V_PWR 2
DY L9 1 2
51120_DRVH2
51120_GND 51120_LL2 1 2 GAP-CLOSE-PWR-2U
R156 G38
51120_V5FILT 0R2J-2-GP IND-3D3UH-57GP 1 2

5
6
7
8
ENG

1
D
D
D
D
1 R151 2 51120_CS1 U21 TC11 GAP-CLOSE-PWR-2U
1

16K5R3F-GP AO4712-GP ST220U6D3VDM-17GP G41

1
1 2

2
1
1 R124 2 51120_CS2 51120_GND Id=9.1A R122
13KR3F-GP C284 DY DY 30K9R3F-GP KEMET 220uF GAP-CLOSE-PWR-2U
Qg=12nC

G
S
S
S
ENG G40

2
Rdson=15~18mohm SC33P50V3JN-GP ESR=25mohm 1 2

4
3
2
1

2
Iripple=2.2A
51120_COMP1 51120_COMP2 51120_VFB2 GAP-CLOSE-PWR-2U
51120_DRVL2
1

1
GND VREF2 FLOAT V5FILT
R134 R127 DY R125
DY 30KR2F-GP DY 22KR2F-GP 13KR3F-GP
AUTOSKIP
SKIPSEL AUTOSKIP /FAULTS PWM PWM
2

2
1

1
51120_COMP1_PL

51120_COMP2_PL

OFF C307 C291


51120_GND
SC390P50V3JN-GP

SC390P50V3JN-GP
2

CURRENT D-Cap DY DY
COMP N/A N/A
MODE MODE
For TPS51120,
1
TONSEL 380k/CH1 290k/CH1 220k/CH1 180k/CH1 Vout=5V <Core Design> 1
1

590k/CH2 440k/CH2 330k/CH2 280k/CH2 DY


C303 DY C289 1. If you use a 6.8uH inductor, the minimum ESR is 70m ohm.
5V SC1000P50V3JN-GP SC680P50V2KX-2GP
2. If you use a 4.7uH inductor, the minimum ESR is 48m ohm. Wistron Corporation
2

VFB1 N/A not use ADJ. Fixed Output 3. If you use a 3.3uH inductor, the minimum ESR is 34m ohm. 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
3.3V Taipei Hsien 221, Taiwan, R.O.C.
VFB2 N/A not use ADJ. 51120_GND 51120_GND Vout=3.3V
Fixed Output 1. If you use a 4.7uH inductor, the minimum ESR is 51m ohm. Title

EN1,EN2 Switcher OFF not use Swither ON Switcher ON 2. If you use a 3.3uH inductor, the minimum ESR is 36m ohm. TPS51120_5V_3D3V
3. If you use a 2.5uH inductor, the minimum ESR is 27m ohm. Size Document Number Rev
A3
EN3,EN5 not use VREG3 on Calado -1
LDO OFF LDO ON Date: Wednesday, September 12, 2007 Sheet 33 of 39
A B C D E
A B C D E

1D8V_PWR 1D8V_S3

G21
DCBATOUT_51124 1 2
DCBATOUT DCBATOUT_51124
GAP-CLOSE-PWR-2U
G54 G28
1 2 1 2

1
ENG C324 C335

SC10U25V6KX-1GP

SC10U25V6KX-1GP
GAP-CLOSE-PWR-2U TC22.TC24 changed 77.C1561.00L to 77.21561.00L C314 GAP-CLOSE-PWR-2U
1

5
6
7
8
G49 SCD1U25V3ZY-1GP G22

2
D
D
D
D
TC24 1 2 U23 1 2
4 ST15U25VDM-4-GP AO4406-1-GP 4
2

GAP-CLOSE-PWR-2U GAP-CLOSE-PWR-2U
G53 G27
1 2 Id=9.6A 1D8V Iomax=12A 1 2

G
S
S
S
GAP-CLOSE-PWR-2U Qg=18~nC, Cyntec 10*10*4 GAP-CLOSE-PWR-2U
OCP>16A

4
3
2
1
G50 Rdson=13.5~16.5mohm G26
1 2 DCR=4.2mohm, Irating=16A 1 2
51124_DRVH1 Isat=33A 1D8V_PWR
GAP-CLOSE-PWR-2U ENG GAP-CLOSE-PWR-2U
G51 L7 Voutsetting=1.8046V G25
1 2 51124_LL1 1 2 1 2
ENG
GAP-CLOSE-PWR-2U 3D3V_S5 3D3V_S5 IND-1D5UH-34-GP GAP-CLOSE-PWR-2U

5
6
7
8
G52 G24

1
D
D
D
D
1 2 U24 C552 1 2
1

1
DY Id=13.2A R359

1
SC33P50V3JN-GP
TC22 GAP-CLOSE-PWR-2U AO4706-GP 64K9R2F-1-GP GAP-CLOSE-PWR-2U
ST15U25VDM-4-GP
DY DY Qg=27nC, DY
DY C247 TC8 G23
2

SCD1U50V3ZY-GP
R365 R366 Rdson=6.8~8.2mohm ST330U2D5VDM-9GP 1 2

2
G
S
S
S
2

2
10KR2J-3-GP 10KR2J-3-GP 51124_VFB1 GAP-CLOSE-PWR-2U

4
3
2
1
5V_S5

1
51124_DRVL1
R360
P/H CPU CORE PAGE 47KR3F-GP
G77 SANYO
1

1 2 CPUCORE_ON 32,33,35

2
R380 330uF, 2.5V

51124_PGD1
51124_PGD2
1

3 C349 3D3R3J-L-GP 1D05V_PWR GAP-CLOSE


G65 ESR=9mohm, V size 3
SC4D7U10V5ZY-3GP 1D8V_PWR 1 2
51124_VFB2 51124_GND
2

51124_VFB1 GAP-CLOSE
1

C566 Vout=0.758V*(R1+R2)/R2 1D05V_PWR 1D05V_S0

24
U31

2
5

1
6

7
SC1U16V3ZY-GP
2

VFB1
VFB2

VO1
VO2

PGOOD1
PGOOD2
R367
51124_GND 10KR2J-3-GP G36
1 2
51124_V5FILT 15 4 51124_TONSEL 1 DY 2 51124_V5FILT
V5FILT TONSEL DCBATOUT_51124 GAP-CLOSE-PWR-2U
16 V5IN

1
21 51124_DRVH1 G33
51124_EN1_1 DRVH1 51124_DRVH2 R368
17,24,28,35 PM_SLP_S4# 1 2 23 EN1 DRVH2 10 1 2
R3691 0R2J-2-GP 51124_EN2_1 0R2J-2-GP
17,24,28,30,35 PM_SLP_S3# 2 8 EN2 DY

1
R370 0R2J-2-GP 18 GAP-CLOSE-PWR-2U
51124_LL1 PGND1 C323 C332 C312 G32
20 13

2
LL1 PGND2

5
6
7
8

SC10U25V6KX-1GP

SC10U25V6KX-1GP
51124_LL2 11 25 U26 SCD1U25V3ZY-1GP 1 2

2
LL2 GND

D
D
D
D
GND 3
51124_GND AO4468-GP GAP-CLOSE-PWR-2U
DRVL1
DRVL2
VBST1
VBST2
TRIP1
TRIP2

G31
Id=9.2A 1D05V Iomax=8A 1 2
Qg=9~12nC, Cyntec 7*7*3 OCP>12A

G
S
S
S
TPS51124RGER-GPU1 GAP-CLOSE-PWR-2U
17
14

22
9

19
12

51124_GND Rdson=17.4~22mohm DCR=9mohm,Irating=11A G30

4
3
2
1
51124_TRIP1 Isat=22A 1D05V_PWR 1 2
51124_TRIP2 51124_DRVL2 51124_DRVH2
1

2 L8 GAP-CLOSE-PWR-2U 2
ENG Voutsetting=1.055V
1

R379 51124_LL2 1 2 G34


10KR3F-L-GP R381 51124_DRVL1 1 2
7K5R3F-2-GP
COIL-1UH-34-GP

5
6
7
8
GAP-CLOSE-PWR-2U
2

D
D
D
D
G29
2

1
51124_GND 51124_GND U25 DY 1 2
Id=13.2A C257 TC9

SCD1U50V3ZY-GP
51124_LL1 1 2 51124_LL1_1 1 2C561 51124_VBST1 AO4706-GP DY SE220U2VDM-8GP GAP-CLOSE-PWR-2U

2
R373 0R3-0-U-GP G76 Qg=27nC, C553 R362
29K4R2F-GP

G
S
S
S
SCD1U50V3ZY-GP 1 2 Rdson=6.8~8.2mohm SC33P50V3JN-GP Panasonic

2
4
3
2
1
GAP-CLOSE-PWR 220uF/ 2V

2
51124_LL2 1 2 51124_LL2_1 1 2 C562 51124_VBST2 51124_DRVL2 51124_VFB2 ESR=15mohm
R374 0R3-0-U-GP 51124_GND
SCD1U50V3ZY-GP

1
R361
Vtrip(mV)=Rtrip(Kohm)*10(uA) 75KR3F-GP
Iocp=(Vtrip/Rdson)+((1/(2*L*f))*((Vin-Vout)*Vout)/Vin))

2
GND OPEN V5FILT
51124_GND

TONSEL 240k/CH1 300k/CH1 360k/CH1


300k/CH2 360k/CH2 420k/CH2
1 ICS 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51124_1D8V_1D05V
Size Document Number Rev
A3
Calado -1
Date: Wednesday, September 12, 2007 Sheet 34 of 39
A B C D E
5 4 3 2 1

5V_S5
1D8V_S3
0D9V_S3
Iomax=0.5A

1
SCD1U16V2ZY-2GP
C502

1
SC10U10V5ZY-1GP
C504 C497
OCP=3A

2
1
SC10U6D3V5MX-3GP

2
DY DDR_VREF_PWR DDR_VREF_S0
D G72 D

2
U47
1 2

10 1 GAP-CLOSE-PWR-2U
VIN VDDQSNS
17,24,28,34 PM_SLP_S4# 1 R338 2 51100_S5 9
S5 VLDOIN 2 G74
0R0402-PAD 8 3 1 2
GND VTT
1 R337 2 51100_S3 7 S3 PGND 4
17,24,28,30,34 PM_SLP_S3# 0R0402-PAD 6 5 GAP-CLOSE-PWR-2U
VTTREF VTTSNS G70

GND
DDR_VREF_S3 1 2
TPS51100DGQ-1-GP GAP-CLOSE-PWR-2U
1D25V_S0

11
1

1
G73
C503 C499 C494 1 2
SCD1U16V2ZY-2GP SC10U10V5ZY-1GP SC10U10V5ZY-1GP Iomax=2A
2

2
GAP-CLOSE-PWR-2U

5V_S5 1D8V_S3
20061205 G16
1 2

C439 GAP-CLOSE-PWR-2U

1
G19

SC1U16V3ZY-GP
C87 C91 1 2
SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP

2
DY GAP-CLOSE-PWR-2U
G18
1 2

GAP-CLOSE-PWR-2U
U13

6
C
Vo(cal.)=1.2504V G17 C
1 2
OCP=4A

VCNTL
32,33,34 CPUCORE_ON 1 R32 25913_POK_U74 7 POK VIN 5
0R0402-PAD 9 1D25V_LDO GAP-CLOSE-PWR-2U 1D25V_S0
VIN G20
PM_SLP_S3#1 R29 2 5913_EN_U74 8 3
20061205 1 2
0R0402-PAD EN VOUT
VOUT 4
GAP-CLOSE-PWR-2U

1
C81 C90

1
2 5913_FB R31

GND
FB

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP
C67 DY 35K7R2F-GP

2
SCD1U16V2ZY-2GP C76

2
APL5913-KAC-1-GP SC56P-GP

2
SO-8-P
20061205

1
R30
63K4R2F-2-GP

Vo=0.8*(1+(R1/R2))

2
B B

1D8V_S3
5V_S5
1

C243 C231 C239


SC1U16V3ZY-GP
SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP
2

U18 1D5V_S0
6

Vo(cal.)=1.5096V
VCNTL

32,33,34 CPUCORE_ON 1 R102 2


0R0402-PAD
5912_POK_U74 7 POK VIN 5
9 1D5V_S0
Iomax=1.5A
VIN

17,24,28,30,34 PM_SLP_S3#
PM_SLP_S3#1 R103 2 5912_EN_U74 8 EN VOUT 3
20061205 OCP>1.8A
0R0402-PAD 4
VOUT
1

C233 C232
5912_FB R98 C240
20061205 2
GND

FB
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

A
26K7R3F-GP ICS A
2

2
SC82P50V3JN-GP

APL5915-KAI-TRL-GP
1

SO-8-P Wistron Corporation


1

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


R101 Taipei Hsien 221, Taiwan, R.O.C.
30K1R3F-GP
Title

0D9V/1D25V/1D5V
2

Vo=0.8*(1+(R1/R2)) Size Document Number Rev


A3
Calado -1
Date: Wednesday, September 12, 2007 Sheet 35 of 39
5 4 3 2 1
MAX8731_LDO

1
R236
10KR2F-2-GP
Q5

2
ACAV_IN
4 3 DCIN_GATE1

1 R235 ACAV_IN 5 2 ACAV_IN


15K4R2F-GP
AC_IN# 6 1
2

2N7002DW-1-GP
5V_AUX_S5 84.27002.D3F

1
R9
100KR2J-1-GP NEAR
Adaptor In Soft-Start Circuit
2

28 AC_IN#
AD+ Layout Trace 250mil
1

U3 Layout Trace 300mil


C380 D S AD+_TO_SYS DCBATOUT BT+
SC1U10V3KX-3GP
8
D S
1 Layout Trace 250mil
7 2 U33
2

6 D S 3 1 2 1 S D 8
5 D G 4 R2 2 S D 7
D01R2512F-4-GP 3 S D 6
2

AD+ 4 G D 5
R203 P2003EVG-GP
10KR2J-3-GP 2nd:A04433(84.04433.A37) AO4433-GP
G1 G2 2nd:A04407(84.04407.A37)

1
1

DC_IN_D R208
470KR2J-2-GP
R4
D

1
Q3 DCIN_GATE1 1 2 DCIN_GATE2 1 2 GAP-CLOSE-PWR GAP-CLOSE-PWR
NEAR INPUT AD+

2
2N7002-11-GP 49K9R2F-L-GP R3 100KR2J-1-GP

G
S

1
AD+
C402 C398
SCD1U25V3KX-GP SCD1U25V3KX-GP

2
MAX8731_CSSN
MAX8731_CSSP
1 R232 2
0R0402-PAD CHG_AGNDCHG_AGND CHG_AGND
1

1
R252 C389 U9 ENG

1
SC1U25V5KX-1GP C394
2

1
365KR3F-GP SC1U10V3KX-3GP C403 C399
ASNS

1
MAX8731_DCIN 22 28 R243
2

DCIN CSSP

5
6
7
8

SC10U25V6KX-1GP

SCD1U25V3KX-GP
C406 DY TC23
MAX8731_ACIN 33R2J-2-GP SC10U25V6KX-1GP SE100U25VM-7GPU

D
D
D
D
2

2
ACIN CHG_AGND
27

2
CSSN
1

R254 3D3V_AUX_S5 11 26 MAX8731_VCC D20 U37


VDD VCC
1

C404 R10 1 SI4800BDY-T1


1

0R0603-PAD
49K9R2F-L-GP SCD01U50V2ZY-1GP C17 25 MAX8731_BST 1 2MAX8731_BST1 3 1 2 C381
2

G
S
S
S
SCD1U25V3KX-GP BST MAX8731_LDO BAS16-1-GP
21
2

4
3
2
1
ACAV_IN LDO SC1U10V3KX-3GP
13 ACOK 2
2nd:FDS8884(84.8884.A37) BT+
CHG_AGND 24 MAX8731_DHI
CHG_AGND BAT_SCL DHI R242 CHG_PWR
10
NEAR KBC POWER 28,37 BAT_SCL SCL

LX 23 MAX8731_LX 1
1R3F-GP
2
1 2 C396
SCD1U25V3KX-GP MAX8731_LX1 1
L13
2 1 2
Layout Trace 300mil
1 2 C390 R7
BAT_SDA 9 SC220P50V2JN-3GP D01R2512F-4-GP
28,37 BAT_SDA SDA COIL-6D8UH-2-GP
20 MAX8731_DLO
DLO

5
6
7
8

1
C361 C10 C11

D
D
D
D
14 BATSEL PGND 19

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
G7 G8

2
2

2
18 MAX8731_CSIP U38
CHG_AGND CSIP SI4800BDY-T1
17 MAX8731_CSIN

G
S
S
S
CSIN
8

4
3
2
1

1
28 AD_IA INP GAP-CLOSE-PWR GAP-CLOSE-PWR

2nd:FDS8884(84.8884.A37)
1 2 MAX8731_CCV 6 CCV
1MAX8731_CCV1

R15 4K7R2F-GP MAX8731_CCI 5 16


MAX8731_CCS CCI FBSB
4 CCS
1

MAX8731_REF 3 R233
R13 MAX8731_DAC 7 REF 100R2F-L1-GP-U
DAC
1

C22 12 15 BAT_SENSE 1 2 BATT_SENSE


GND

GND FBSA BATT_SENSE 37


10KR2F-2-GP
1
SCD1U16V2ZY-2GP

C34 C29 C28 C32 C30


2

C386
ICS
29
SCD01U50V2ZY-1GP

SCD01U50V2ZY-1GP

SCD01U50V2ZY-1GP

SC1U10V3KX-3GP

SCD1U16V2ZY-2GP

MAX8731AETI-GP SCD01U50V2ZY-1GP
2

74.08731.A73
2

Wistron Corporation
1 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
G10 Taipei Hsien 221, Taiwan, R.O.C.
GAP-CLOSE-PWR
CHG_AGND Title

CHARGER MAX8731
Need Check MAXIM Sming Use MAX8731 or MAX8731A Size Document Number Rev
A3
Calado -1
Date: Wednesday, September 12, 2007 Sheet 36 of 39
A B C D E

Adaptor in to generate DCBATOUT

AD+
DC1
4 4 4

Layout Trace 250mil U2 Layout Trace 250mil


AD+_JK TP130 TPAD30 1 AD+_JK 1 S D 8
2 S D 7

K
3 S D 6
AD+_JK TP5 TPAD30 2 D1 AD+_2 4 G D 5

1
P4SSMJ24PT-GP ID = -10A/70deg
C6 200KR2F-L-GP P2003EVG-GP C8
Rds(ON) = 24mohm

1
3 SCD1U50V3ZY-GP SCD1U50V3ZY-GP

A
2

2
R204 SO-8

1
5 DY C9

SCD47U50V5ZY
6 EC1 2nd:A04433(84.04433.A37)
MH1 SCD1U50V3ZY-GP

2
R2
ENG E
DC-JACK115-GP B R1
22.10037.C51 C

PDTA124EU-1-GP
Change to 22.10037.E91

1
Q2
R202

C
100KR2F-L1-GP
28 AD_OFF B Q4
MMBT2222A-3-GP

2
1
84.02222.V11

E
R205
1KR2J-1-GP

2
3 3

3D3V_AUX_S5
BATTERY CONNECTOR
3D3V_AUX_S5

2
PD
D19 D17 D18

1
DY BAV99-5-GP DY BAV99-5-GP DY BAV99-5-GP BAT1
R223 83.00099.T11 83.00099.T11 83.00099.T11
470KR2J-2-GP 9
7

3
6

2
BATA_SCL_1 TP7 TPAD30 28 BAT_IN# 5
BATA_SDA_1 TP8 TPAD30 1 2 BATA_SDA_1 4
28,36 BAT_SDA
BAT_IN# TP9 TPAD30 R230
1 227R3F-GP BATA_SCL_1 3
28,36 BAT_SCL
BT+ TP11 TPAD30 R229 27R3F-GP 2
BT+ TP12 TPAD30
BT+ 1
2 Layout Trace 320mil 8
2

1
EC98 SYN-CON7-28-GP-U1

1
DY 20.F1152.007
EC88 DY EC96 EC97DY

SCD1U50V3ZY-GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP
ENG

2
MLVS0603M04-1-GP

2
G9
2 1
36 BATT_SENSE

GAP-CLOSE-PWR

1 ICS 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

AD/BATT CONN
Size Document Number Rev
A3
Calado -1
Date: Wednesday, September 12, 2007 Sheet 37 of 39
A B C D E
5 4 3 2 1

DCBATOUT VCC_CORE_S0
5V_S0

14

13

1
EC116 EC113 EC111 EC62 EC90 EC112 EC124 EC123 EC52 EC23 EC12 EC89 EC75 EC87 EC95 EC10 EC13 EC11 EC6 EC9

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
12 11 960 960 960 960 960

2
U5D
TSAHCT125PW-GP
7

D D

3D3V_AUX_S5 1D05V_S0 5V_S0 3D3V_S0 1D8V_S3

1
EC127 EC110 EC59 EC103 EC60 EC16 EC47 EC104 EC48 EC99 EC108 EC66 EC69 EC45 EC114 EC68 EC58 EC109 EC61 EC51 EC43 EC53
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY
2

2
ENG

FAN CONN
FAN1_VCC TP33 TPAD30
20 FAN1_VCC
FAN1_FG1 TP39 TPAD30
20 FAN1_FG1
PURE_HW_SHUTDOWN# TP82 TPAD30
C
20,28,30 PURE_HW_SHUTDOWN# C
PD

Audio Connector Internal KeyBoard CONN TRING CONN


Test Point
LINEOUT_JD# TP156 TPAD30
26,27 LINEOUT_JD# Test Point TIP_C TP2 TPAD30
23 TIP_C
SPKR_R+1 TP166 TPAD30 KCOL1 TP45 TPAD30 RING_C TP3 TPAD30
27 SPKR_R+1 23 RING_C
KCOL2 TP41 TPAD30

USB ZIF CONN 27 SPKR_L+1


SPKR_L+1 TP164 TPAD30 KCOL3
KCOL4
TP40
TP38
TPAD30
TPAD30
Test Point
TP79 TPAD30
26,27 MIC_JD#
MIC_JD#

AUD_MICIN_R
TP157 TPAD30

TP167 TPAD30
KCOL5
KCOL6
KCOL7
TP36
TP34
TP32
TPAD30
TPAD30
TPAD30
Touch Pad CONN
5V_S5 26,27 AUD_MICIN_R KCOL8 TP31 TPAD30
Test Point near TPAD1
5V_S5 TP6 TPAD30 AUD_MICIN_L TP168 TPAD30 KCOL9 TP28 TPAD30 5V_S0 TP10 TPAD30
26,27 AUD_MICIN_L KCOL10 TP26 TPAD30
USBPN0 TP59 TPAD30 KCOL11 TP22 TPAD30 TP_DATA TP54 TPAD30
17,21 USBPN0 KROW[1..8] 29 TP_DATA
28,29 KROW[1..8] KCOL12 TP21 TPAD30 TP_CLK TP53 TPAD30
17,21 USBPP0
USBPP0

USBPN2
TP60 TPAD30

TP138 TPAD30
Internal Speaker 28,29 KCOL[1..16]
KCOL[1..16]
KCOL13
KCOL14
KCOL15
TP19
TP18
TP16
TPAD30
TPAD30
TPAD30
29
29
29
TP_CLK
TP_RIGHT
TP_LEFT
TP_RIGHT
TP_LEFT
TP57
TP58
TPAD30
TPAD30
B 17,21 USBPN2 B
KCOL16 TP17 TPAD30
USBPP2 TP137 TPAD30 SPKR_L- TP124 TPAD30
17,21 USBPP2 27 SPKR_L-
USBPN4 TP101 TPAD30 SPKR_L+ TP126 TPAD30 KROW1 TP56 TPAD30
17,21 USBPN4 27 SPKR_L+
KROW2 TP55 TPAD30
USBPP4 TP103 TPAD30 SPKR_R- TP127 TPAD30 KROW3 TP52 TPAD30
17,21 USBPP4

17,21 USB_OC#4
USB_OC#4 TP108 TPAD30
27

27
SPKR_R-

SPKR_R+
SPKR_R+ TP128 TPAD30
KROW4
KROW5
KROW6
TP51
TP50
TP49
TPAD30
TPAD30
TPAD30
Check test point
USB_PWR_EN# TP80 TPAD30 KROW7 TP48 TPAD30
21,28 USB_PWR_EN#
3D3V_S0 TP4 TPAD30
KROW8 TP46 TPAD30
3D3V_AUX_S5 TP13 TPAD30
CPU NB MDC MINI CARD 3D3V_S5 TP15 TPAD30
GND3
SPRING-23-GP GND6 GND7 GND4 GND5 TP125 TPAD30
H5 H6 H8 H7 H9 H10 H11 H1 H2 5V_S5
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE SPRING-6 SPRING-6 SPRING-16 SPRING-16
TP140 TPAD30
17,28 PM_PWRBTN#
DY
TP85 TPAD30
1

1
4,16,30 H_PWRGD
1

TP139 TPAD30
1

28,30,33 S5_ENABLE
TP27 TPAD30
4,6 H_CPURST#
34.13B01.001 34.43E28.001
34.42Y01.011 34.42Y01.011 34.42Y01.011 34.4G502.001 Test PointDimm Door
A ICS A
GND8 GND9 GND10 GND11 GND12 GND13

H3 H4 H12 H13 H14 H15 H16 H17 H18 H19 H20 H21 H22 H23 SPRING-9-GP SPRING-9-GP SPRING-9-GP SPRING-9-GP SPRING-9-GP SPRING-9-GP
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
1

1
Title

EMI/Spring/Boss
1

34.49U23.001 Size Document Number Rev

Calado -1
Date: Thursday, September 13, 2007 Sheet 38 of 39
5 4 3 2 1
5 4 3 2 1

SA to SB
1.TC6 change to 900U
2.modify U42(change to G913 300mA) add R417 for TV CRT ripple.
3.add Q27 for BT LED signal
4.change LED1 to 83.01221.I70(right angle)
5.add U55 BLON_5V for LED panel
6.change U1 to 74.04280.C9P for source request
7.add polyswitch F3 for safety.
8.C338 C339 C341 C340 change to 0402 size for SATA signal.
D D
9.FAN1 change to 20.F1000.003 for ME.
10.USB1 swap pin3 pin4 signal.
11.USB2 USB3 change to 22.10218.R31 for ME.
12.add polyswitch F4 F5 for safety.
13.change U4 U45 to 74.09711.B7F ,U56 U57 74.05250.C7F for source request.
14.R20 change to 1.21K for IEEE.
15.C56 change to 12P for Oscillation report.
16.U53 change to 74.09711.A7F for source request.
17.NEW1 change to 20.F07890.026.SK1 change to 21.H0153.001 for ME
18.add R421 LED4 for CardReader test.
19.C237 C229 change to 27P for Oscillation report.
20.R350 change to 4.99K for jack detection.
21.R363 R364 change to 18K.R404 R405 change to 56 ohm for audio report.
22.add AUD_AGND.L24 for audio niose.
23.C575 C577 change to 2700p Cut frequency at 500HZ
24.add BT_LED to KBC GPIO50.
25.add TC19 TC20 TC21 TC22 TC23 TC24 for acoustic noise.
26.C419 change to 1000p for power team.
27.U21 change to 84.04712.037.L9 change to 68.3R310.20A for power team.
28.R151 change to 16.5K.R124 change to 13K for OCP.
C 29.L7 change to 68.1R510.10J for power team. C
30.R379 change to 10K.R381 change to 7.5K for OCP.
31,BAT1 change to 20.80977.007 for ME.
32.EC98 add 69.80007.031 for EC damaged.
33.R402 change to 10K.R397 DY for planar ID.
34.ODD1 change to 20.80967.050 for ME.
35.add G79.G80 for power.
36.R385.R386.R388.R387 change for Gain.R395.R407 change to 56K.
37.add EC6.EC9.EC10.EC11.EC13 to 960 for EMI.
38.add EC41.EC42.EC49.EC50.EC127 for EMI.
39.add R423.R422 for EMI.
40.add RN34.RN35.RN36 for EMI.
41.remove Golden finger
42.swap Touchpad pin define.
43.change L1 L2 to 68.00084.371.
44.change DC1 to 22.10037.E91 for ME.
45.change TVOUT1 to 22.10021.F41 for ME.
SB to -1
1.add AFTE test point for power board Conn.
2.add R432.C583 change G47 to R433 for 3D3V_AUX_S5 power option
3.change to 0 ohm pad for R45.R41.R216.R391.R183.R184.R14.R162.
B R78.R79.R74.R87.R73.R77.R390.R21.R194.R187 B

4.change SPKR1 to 20.D0197.104 for ME.


5.change TRING1 to 21.E0024.102 for ME.
6.remove D7.D8.D9 for EMI.
7.add EC116.EC113.EC111.EC62.EC90.EC112.EC124.EC123.EC52.EC23.EC12.EC89.EC75.EC87.EC95.
8.change R422.R423 to 33 ohm.add EC71.EC72 to 33P for EMI.
9.add EC128.EC129 for EMI.
10.change c419 to 78.10234.1BL for source OBSOLETED.
11.change LEFT1.LEFT2.RIGHT1 to 62.40009.671 for ME.
12.change TVOUT1 to 22.10021.H61 for ME.
13.change BAT1 to 20.F1152.007 for ME.
14.add D26 for EMI.
15.change TC17 to 79.22710.3AL for USB droop test fial.
16.change TC2.EC84 to 5V_USB3_S0_1,change TC17.EC101 to5V_USB2_S0_1 for UPT2 fail.
17.add GND6.GND7.GND8.GND9.GND10.GND11.GND12.GND13 fot EMI.
18.change CRT1 to 20.20378.015 for ME.
19.del GND1.GND2.

ICS
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Change List
Size Document Number Rev

Calado -1
Date: Thursday, September 13, 2007 Sheet 39 of 39

5 4 3 2 1

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