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Circuit makes simple high voltage inverter

Article May 2004

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design
ideas
Circuit makes simple high-voltage inverter
Francesc Casanellas, Aiguafreda, Spain
L1
simple high-voltage MOSFET in-

A
30 H
verter solves the problem of driving R1 D1
TO THE OTHER INVERTER
a high-side MOSFET, using a low- 340V
4.7 BYV26C
voltage transistor, Q1, and a special C1
+
C2
D2

arrangement involving D6 (Figure 1). 680 F 220 nF 12V

BYV26C R2 +
This inverter is much faster than those 22k
C3
D3 22 F D4
that optocouplers drive, so dead-time 1N4148 BYV28-50
problems are minimal. The inverter has Q1
D5
the usual blocking diodes D4 and D6, and C4
2N2907A
UF5406
the parallel diodes D5 and D8. Q3 provides 100 pF R3 R4
1M 22
the turn-off signal to Q2. When Q3 turns Q2
IRFP450
on, Q2s gate short-circuits to ground
through R4. R4 limits current and damp- D6 OUTPUT
ens oscillations. Q2s gate dis- BYV28-50
charges quickly; only the value Figure 1
D7
of R4 limits discharge time. Q1 stays off, 1N4148
D8
thanks to R2, and C3 charges to 12V This circuit is probably the Q3 UF5406
PWM
through D2. The gate pulse creates a cur- simplest high-voltage R5 IRFP450
rent through C4, and D3 protects the inverter you can build. 22

100 edn | May 27, 2004 www.edn.com

design
ideas
base-emitter junction of Q1. 12V inverter with 150% overload ca-
In the turn-on of Q2, the fol- pacity. If you change the MOS-
lowing scenario occurs: When FET, the value of C4 has to change
the control input, PWM, 1k
2N2222A according to the total gate charge
goes low, Q3 quickly turns Figure 2 plus the output capacitance of Q3,
off, thanks to D7. A displacement which is much lower and, in fact,
current, C4dV/dt, flows 2.2 nF 300
OUTPUT negligible. Q1 amplifies the ca-
through C4 to the base of Q1. Q1 1N4148 pacitor current, so C4 is propor-
charges the output capacitance tional to QG2hFE1. Make C4s val-
INPUT
of Q3 and the gate capacitance of 2.2k ue no higher than necessary,
2N2222A
Q2, and Q2 turns on. C3 supplies 560 because the base current in Q1
the collector current. If the pe- would be too high. To obtain all
riod is long, Q1 keeps conduct- the speed advantages of the cir-
ing and compensating the leak- cuit, the PWM signal should be
age of Q3. If D6 were a Schottky This buffer enhances speed at the PWM input of Figure able to quickly drive Q3. If neces-
diode, which is leaky, you would 1s circuit. sary, you can use a buffer circuit
have to reduce the value of R1. A (Figure 2). You can drive the cir-
short cross-conduction period exists be- current spikes. The inductor needs a cuit with a single CMOS gate. The circuit
tween the two MOSFETs, a phenomenon snubber comprising D1, R1, and C2. Note in Figure 1 is probably the simplest high-
that is more apparent when Q3 turns off that the inductor value is conservative voltage inverter you can design. It has
and Q2 turns on. A small inductor, L1, in and can be smaller. served in thousands of three-phase mo-
series with the main supply limits the The values are for a 370W, three-phase tor drives from 0.37 to 0.75 kW.

102 edn | May 27, 2004 www.edn.com

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