Hot ng ca b vi x l 80286

Cc tn hiu ra:

#INTA: tn hiu tr li ngt

#IOWC: phc v ghi thng tin vo cng vo ra I/O
#IORC: c thng tin thng qua cng I/O
#MWDC: ghi thng tin vo b nh
#MRDC: c thng tin t b nh (ROM, RAM)
DT/#R: nh hng truyn s liu (=1 truyn, =0 nhn)
DEN: ni vi b m knh d liu (ni vi #OE kim sot thnh tin), cho php
truyn d liu
ALE: cht thng tin v a ch cho i tng cn quy chiu, c trng thi trung gian
MCE: cho php chip iu khin ngt u tin PIC8259A ch cht a ch, h tr c
cu ni tng trong c ch ngt.
M/#IO: chn b nh hoc cng khi truy cp
CLK: ly xung nhp t MP
CEN/#AEN: cho php truyn lnh v thng tin a ch
CMDLY: gi chm lnh, ch trng thi lm vic
#Ready: khng nh trng thi sn sng.
MB: iu khin a knh, va lm vic vi MP va lm vic vi DMA
Chu k c thng tin t b nh #MRDC
Cc trng thi chuyn tip ca b vi x l khi hot ng bao gm:

Ti l trng thi ngh (idle)

Ts l trng thi pht cc tn hiu m chu k my (Status)
Tc l trng thi thc hin lnh (Command)
Th l trng thi treo ca knh (Hold), trng thi cng vo ra tr khng cao
Ti , Th ng vi trng hp khc; cn Ts , Tc ng vi chu k my.

Kt lun: t mt tp hp nh cc chu k my, cn c vo th t, s lng khc nhau

t hp li hnh thnh tp hp chu k lnh rt phong ph. C th m rng MP m
khng nh hng ti cu trc bn trong.
 m t hot ng ca b vi x l 80286 ta kho st hai chu k trn chu k c v
chu k ghi thng tin. Ta dng kho st bng th thi gian.

+ H thng ca c cu CLK:

+Nhp MP: CLK

+Nhp iu khin khc PCLK

Mt chu k c hai fa 1, 2
fa 1 ng vi logic 1, fa 2 ng vi logic 0
H thng tri di t fa A n fa F

+ Pha A: pha th 2 ca chu k my trc , ta pha ny a ch s xc nh gi tr trn knh

a ch

Cui pha c c tt c bit a ch trn knh

+M/#IO=1 c khng nh ngay

+Cold/#Inta =1 pht m lnh, hay chu k ngt (m lnh)

+ Pha B: bt u chu k c thng tin, trng thi pht thng tin v status: quy nh cc kiu
chu k my, cn thiu #S1, #S0 v trng thi #S1#S0 = 01, khng nh y l chu k my c
thng tin t b nh (chu k hin hnh).

+ Pha C (pha th 2 ca ts): tn hiu ALE phi c cung cp ngay, dng cht a ch vo
i tng, ch cn 1 pha cht.

Sau khi cht xong knh a ch c th ni t do -> cho chu k tip theo -> tng chu k
my ng k.

+ Pha D: pha u tin chu k thc hin lnh. l tn hiu #MRDC c pht ng (lnh
c), lnh c phi c nh hng, cho php ngay nn cc tn hiu DEN, DT/#R c pht
ng.

DT/#R = 0 (nhn thng tin)

+ Pha E: xc nhn tn hiu #Ready (dng iu khin c b vi x l khng nh khng ri

vo trng thi chuyn tip m thc hin, tn hiu ny rt quan trng)

#Ready = 0 lm vic bnh thng ( sn sng)

#Ready = 1 ch thm 1 tc na, pha th 2 ca tc xem #ready mc 0 cha, nu cha thm

tip tc, ko di hay khng ke di thao tc.

Lc d liu t ngn nh s c a lnh knh d liu. Pha E kt thc chu k hin

hnh.

+ Pha F: pha u tin ca chu k sau, d liu c chuyn an ton vo ni nhn (v d: thanh
ghi vi x l)

Tt c cc trng hp iu kin tr v trng thi th ng

 Cn knh a ch sn sng to ra gi tr quy chiu mi cho chu k tip theo.

Chu k ghi thng tin vo b nh MWR

+ Pha A: pha cui ca chu k my trc, thng tin v a ch c quy chiu s phi xc
nh, ng thi thng tin i tng c quy chiu M/#IO = 1, Cod/Intra = 1 xc nh.

+ Pha B: c s xut hin #S1,#S0 v xc nh y l chu k my ghi thng tin vo b nh.

+ Pha C: pha th 2 ca chu k hin hnh, d liu c, 16 bit tp kt trn knh d liu.
 ALE cht a ch (cht xong a ch khng cn na v c th s dng chu k tip theo)

+ Pha D: tn hiu #MWTC c pht ng ghi d liu. ng thi DEN,DT/R: xc nh

hng ra cho php

DT/R=1 pht d liu ra

+ Pha E: kim tra tn hiu #Ready: c sn sng hay khng

0: trng hp bnh thng

1: pht ng thm 1 tc na, kim tra tip. Thm tc l ch cho i tng cn ghi thng
tin.

+ Pha F: chu k my tip theo. Thu hi cc tn hiu iu khin v trng thi th ng.

tuy nhin i tng nm ngoi MP nn ko di 1pha na m bo d liu ghi vo mt

ngn nh mt cch an ton.

Qun l khng gian nh ca b vi x l

a. Qun l a ch thc

80286 dng cp thanh ghi mng v thanh ghi offset (seg: offset) qun l khng
gian nh thc ca h vi x l. Khng gian nh thc cc i s ph thuc vo s bt
ca knh a ch m b vi x l dnh cho ch ny. a ch vt l s bng thanh ghi
mng dch tri 4 bt cng vi c gi tr ca thanh ghi offset.

S :
 Phng php a ch ha
Trc tip: xc nh t segment:offset
Gin tip qua thanh ghi:
Seg:offset (SI, DI, hoc BX)

a ch tng i : offset = BX, BP + gi tr dch chuyn ghi trong lnh.

Ch s: offset = (SI, DI) + dch chuyn.

a ch tng i theo ch s: offset = (BX,BP) + (SI, DI)
Hn hp: offset = [BX,DX] + [SI,DI] + dch chuyn
b. Qun l khng gian nh theo a ch o (ch bo v)

Nhim v khi d liu ln, php tnh phc tp, giao tip mi trng bn ngoi phong ph, do
phng thc a ch thc khng qun l c, c phng php qun l a ch mi:

+ Nng s bit a ch: cng ngh kh, d nng cao cng khng

+ Chuyn sang khng gian nh o.

Khng gian nh o hnh thnh t 2 thnh phn:

Khng gian nh ca b nh trung tm (ROM, RAM)

Khng gian nh ca cc phng tin mang tin bn ngoi ( cng, a mm ...).
Kh khn :

Khng ng nht v mt thao tc: cng, mm(dng cc th nguyn sector, ri a CD-

ROM -> laze)

-> i ti gii php: ton b khng gian nh phi nh x vo b nh bn trong trc khi thao
tc.

-> Phi qun l c khng gian nh

- Qun l chung cho c b nh trong v b nh ngoi bng phng php s dng b m t

mng nh -> h qu: tc MP ln, to ra nhng h a nhim cho php pht ng nhng
tin trnh trong cng thi gian m khng b xung t

- C th:

C s :
 C cu con tr: c 2 thnh phn

+ RPL( Request privilege level): mc c quyn yu cc khi truy nhp( IORL:thanh ghi c),
khi truy nhp ti nguyn bn trong s yu cu mc c quyn trnh tranh chp
(0,1,2,3) :s liu cng nh th mc c quyn cng cao

+ TI: Table Indicator: ch s bng: tr ti bng cha cc b m t, l mt cng c quan trng

nht qun l khng gian b nh.

=0: Bng cha cc b m t ton cc GDT (Global Descriptor

Table)

C 2 dng bng

=1:Tr ti bng cha cc b m t cc b LDT (Local Descriptor Table)

cho 1tin trnh, nhim v

13 bit cho php 213 mng nh ton cc v 213 mng nh cc b -> 214 mng nh s c
truy cp

Ton b: mi mng nh c 216 offset qut -> qun l c 214.216 = 230 = 1GB = 1024MB,
qun l c 1GB b nh, tha mn mi bi ton ln.

B m t mng cha d liu

Cp pht 8 byte (4hng, mi hng 2byte)
+Gii thch: 3 byte a ch: A23 A0

2 byte dng m t kch thc mng truy cp L (kch thc cc i 64 KB)

Byte AR:byte c quyn truy nhp

P (s c mt) = 1: bng m cn truy cp c trong b nh trung tm
= 0: khng c trong b nh trung tm

B nh o: nh x -> cha c mt trong b nh trung tm. Cha c khng th thao tc c.

2 bit DPL:Mc c quyn ca b m t, mun truy cp vo n phi c mc c

quyn cao hn n.
M 1,0: b m t mng d liu.
Ed: Extension direction (hng pht trin a ch ngn nh bn trong mng)
Ed = 0: t thp ln cao - vng bnh thng

=1: t cao xung thp - vng stack (stack array)

W: Writeable = 0: ch c c c, khng ghi c

=1: va c va ghi

A: Access, thng bo tn sut truy cp vo mng d liu (C cu kim tra tn sut

m bao nhiu ln). Phc v cho vic iu khin cache
Nu tn sut ln -> dng cache

Nh -> khng dng

- > Bn cht ca vng nh trong ch a ch o n s c quy nh:

 + 3 byte a ch c s 24 bit

+ 2 byte kch thc

+ Byte cha gi tr c quyn thm nhp AR

Mc c quyn yu cu >= DPL th mi ly c d liu

Trong khng gian ny c d liu cha (bit P quy nh) Stack hay bnh thng(do AR quy
nh).

B m t mng cha m lnh

Cp pht 8 byte trong RAM

Byte AR

DPL:mc c quyn ca vng nh cha m lnh

11:b m t mng cha m lnh
A: Access
R = 0: ch thc hin (ch quyn chy)
1: c th sao chp, c ra Read

Chng sao chp, gn vng qun l n R=0, khng th copy c

 C: Confirm
= 0: chng trnh mng cha n chy vi mc c quyn ca b m t
qun l n

= 1: chng trnh chy vi mc c quyn cha chng trnh gi n

-> c th truy cp mt chng trnh c mc c quyn thp hn vo ti nguyn c mc c

quyn cao hn (xy dng chng trnh tn ph d liu nhau)

B m t mng h thng.

Byte AR
Kiu c 2 bit, gi tr 0,1,2,3.
Kiu 1: tr vo mng cha TSS (Task State Segment) mng ny th ng.

Task: nhim v, c mt chng trnh hoc nhiu chng trnh chy

Kiu 3: mng cha TSS ang chy, tt c cc TG tham gia vo h thng

Kiu 2: quy chiu ti mng cha thng tin h thng
Kiu 0:(khng s dng).
Kiu 2: h thng qun l GDT, LDT, c thanh ghi c bit

H thng: bng cha GDT, LDT

B m t mng giao dch

Byte AR
Kiu: 0,1,2,3 tng ng vi gi, by, ngt, chuyn nhim v -> cho php kch hot
cc chng trnh trong h thng.
c. Cc thanh ghi h tr qun l ch a ch o

+ Phn h:16 bit b chn, c th thay i gi tr b chn bng lnh

+ Phn kn: 48 bit, khng th truy cp bng lnh

Gi tr l c ch t ng

Ti nguyn cha trong bng cha cc b m t, do 2 TG qun l

-Thanh ghi GDTR: thanh ghi qun l bng cha cc b m t ton cc

-Thanh ghi LDTR: thanh ghi qun l bng cha cc b m t cc b

GDTR: ch c 1 bng, khi khi ng s t chc bng v a ch xc nh ngay t u.

Cn LDTR: mi nhim v mt bng,c thm b chn trong 16 bit

3 byte: nh v y, kt hp vi offset

2 byte: nh v nh

B vi x l x l tt c nhim v nn chy nh s di y

-
LDTR(GDTR) c gi tr xc nh nh v nh v vng RAM a ch xc nh. B chn
ti v tr hin hnh kt hp vi LDTR tham chiu vo (nhn vi 8) tr vo 8 byte b m
t mng i cn tm - > tm ra c b m t mng. Ton b thng tin y c sao chp
 vo phn kn cc TG qun l trng trnh, y l c ch t ng. AR b m t mng i
s sao vo AR phn kn, k c a ch v kch thc.
Sau khi sao chp xong, t phn kn MP phn tch v thao tc -> truy cp tip vng va ly,
n kt hp vi thanh ghi offset.

Kt lun: phn kn s lun sao chp b m t mng.

-> i tng tr thc s l MP ch khng phi l b nh

+ c im: qu trnh truy cp ch a ch o l n chm chp hn rt nhiu v kh khn

(sao i chp li ri li kim tra )

+ u im: nhiu tin trnh c th c pht ng trn 1 mi trng

kim sot c tranh chp (xung t)

d. Bo v b nh (bo v d liu cho b nh)

- Quy tc: mi thao tc vo d liu h thng phi tha mn RPL DPL

- Trong cc qu trnh thc hin c CPL(Current PL) CPL = DPL

+ Phng thc:

Thng qua ca giao dch chng ta s gia cng c RPL > CPL (cho php mc thp nn
ch dung ti nguyn mc cao hn), qui tc ca cc hacker

4. Khi ng h thng vi x l

Khi ng b vi x l Intel 80x86

-Khi Reset h thng lun bt u chy ch a ch thc

-(CS:IP) reset = F000:FFF0(hex)

- > lnh u tin ca h phi t ngn nh ny

- > Ci lnh far JMP th mi vit c trng trnh tht

Khi Reset tp hp cc TG = ? (bng 2.6 gio trnh)

- INTR b che

- PE =0: Ch bo v khng c khi ng, chuyn sang ch bo v th PE=1, khi

ng chm(ch PE)