Compal La-B511p r1.0 Schematics

A B C D E
Model Name : Z5W1M

File Name : LA-B511P
1 1
Compal Confidential
2 2
EA52_BM UMA M/B Schematics Document

Intel Bay Trail M
2014-03-13
3 3
REV:1.0
4 4
PCB@
DAX PCB 12R LA-B211P REV0 M/B
Part Number Description
DA60016I000 PCB 12R LA-B511P REV0 M/B
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Bay Trail M LA-B511P
Date: Thursday, March 13, 2014 Sheet 1 of 39
A B C D E
A B C D E
Memory BUS
One Channel 204pin DDR3L-SO-DIMM X1
P.13
1.35V DDR3L 1066/1333
Max speed of DDR3L to 1333MT/s for M sku. -- EDS
1 1
port 0 port 1 port 1 USB 3.0 Conn Touch Panel

P.21 Conn.
EDP LVDS-Translator P.15
RTD2132N P.14
P.16 CMOS Camera
DDI x2
HDMI Conn. P.15
LVDS
LCD Conn. P.15
eDP/LVDS USB3.0 x1
port 0 port 1 port 2 port 3
PCIe 2.0 x4
VALLEYVIEW-M USB2.0 x4
2
port 0 port 1 USB HUB 2
GL850G P.21
LAN(GbE) SOC
RTL8111GUS
P.17 WLAN HUB port1 HUB port2 HUB port3 HUB port4
RJ45 conn. MINI CARD P.18 FCBGA 1170 Pin
P.17 SATA II x2 HD Audio
Card Reader
port 0 port 1 P.20 RTS5170
page 05~12 BT
MINI CARD SD only
LPC BUS SPI
HDA Codec USB 2.0 Conn USB 2.0 Conn
ALC283 P.21
P.19
SATA ODD Conn. SPI ROM
EC
P.20
1.8V (8MB)
3
ENE KB9022 P.08 3
SATA HDD Conn. P.22

P.20
Int. Analog MIC
P.19
Universal Jack Sub Board
P.19
Int. Speaker
P.19
Touch Pad P.23 Int.KBD P.23
LS-B471P
RTC CKT. Card Reader
P.08 TPM RTS5170
NPCT650
P.18 2 in 1 (SD)
DC/DC Interface CKT.
P.24 USB 2.0
conn x1
4 4
USB port 2
Power Circuit DC/DC LED/Power On/Off
P.25~P.35 P.23 P.21

2013/04/12 2014/04/12 Title
Issued Date Deciphered Date Block Diagrams
Rev
Custom 1.0
A B C D E
A B C D E
Voltage Rails Board ID / SKU ID Table for AD channel

Power Plane Description S0 S3 S4/S5
Vcc 3.3V +/- 5%
VIN 19V Adapter power supply ON ON ON
1 Ra/Rc/Re 100K +/- 5% 1
BATT+ 12V Battery power supply ON ON ON
Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
B+ AC or battery power rail for power circuit. (19V/12V) ON ON ON
0 0 0 V 0 V 0 V
+RTCVCC RTC Battery Power ON ON ON
1 12K +/- 5% 0.347 V 0.354 V 0.360 V BOARD ID Table
+1.0VALW +1.0v Always power rail ON ON ON
2 15K +/- 5% 0.423 V 0.430 V 0.438 V
+1.8VALW +1.8v Always power rail ON ON ON
3 20K +/- 5% 0.541 V 0.550 V 0.559 V Board ID PCB Revision
+3VALW +3.3v Always power rail ON ON ON
+5VALW +5.0v Always power rail ON ON ON
4 27K +/- 5% 0.691 V 0.702 V 0.713 V 0 EVT
5 33K +/- 5% 0.807 V 0.819 V 0.831 V 1 DVT
+1.35V +1.35V power rail for DDR3L ON ON OFF
6 43K +/- 5% 0.978 V 0.992 V 1.006 V 2 PVT
+SOC_VCC Core voltage for SOC ON OFF OFF
7 56K +/- 5% 1.169 V 1.185 V 1.200 V 3 Pre-MP & MP
+SOC_VNN GFX voltage for SOC ON OFF OFF
8 75K +/- 5% 1.398 V 1.414 V 1.430 V 4
+0.675VS +0.675V power rail for DDR3L Terminator ON OFF OFF
9 100K +/- 5% 1.634 V 1.650 V 1.667 V 5
+1.0VS +1.0v system power rail ON OFF OFF
10 130K +/- 5% 1.849 V 1.865 V 1.881 V 6
11 160K +/- 5% 2.015 V 2.031 V 2.046 V
12 200K +/- 5% 2.185 V 2.200 V 2.215 V
13 240K +/- 5% 2.316 V 2.329 V 2.343 V
2 2
+3VS +3.3v system power rail ON OFF OFF
+5VS +5.0v system power rail ON OFF OFF 43 level BOM table
43 Level Description BOM Structure
4319TDBOL01 SMT MB AB511 Z5W1M UMA 2.17G N3520@/EMC@/AMIC@/EDP@/DBG@/TPM@/PCB@/TS@
4319TDBOL02 SMT MB AB511 Z5W1M UMA 1.86G N2920@/EMC@/AMIC@/LVDS@/DBG@/TPM@/PCB@/TS@
4319TDBOL03 SMT MB AB511 Z5W1M UMA 1.86G EPD HDMI N2920@/EMC@/AMIC@/EDP@/DBG@/TPM@/PCB@/TS@
4319TDBOL04 SMT MB AB511 Z5W1M UMA 2.17G LVDS HDMI N3520@/EMC@/AMIC@/LVDS@/DBG@/TPM@/PCB@/TS@
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
4319TDBOL05 SMT MB AB511 Z5W1M UMA 2.13G EPD HDMI N2820@/EMC@/AMIC@/EDP@/DBG@/TPM@/PCB@/TS@
4319TDBOL06 SMT MB AB511 Z5W1M UMA 2.13G LVDS HDMI N2820@/EMC@/AMIC@/LVDS@/DBG@/TPM@/PCB@/TS@
435MNVBOL01 SMT IO/B SB471 Z5W1M EMC@
3
BOM Option Table BOM Option Table 3
Item BOM Structure Item BOM Structure

Unpop @ CPU for N2920 pop N2920@
Connector CONN@ CPU for N3520 pop N3520@
EMC requirement EMC@ TPM support TPM@
EMC requirement unpop @EMC@ No supoort TPM NTPM@
IOAC support AC@ PCB PN PCB@
Choose Analog MIC pop AMIC@ CLEAN CMOS JUMP SP@
Backlight Keyboard BL@ Touch Screen function TS@
EDP panel select EDP@ EDP + Touch Screen ETS@
LVDS panel select LVDS@
Power Switch on board DBG@
Jump for transfer power JP@
4 4

2013/04/12 2014/04/12 Title
Issued Date Deciphered Date Notes List
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
A B C D E
A B C D E
2.2K 4.7K
2.2K
+1.8VS 4.7K +3V_TP
1 1
BG25 SOC_I2C2_DATA I2C2_SDA_TP
BJ25 SOC_I2C2_CLK
DMN63D8LDW Touch Pad
I2C2_SCL_TP
Dual channel NMOS

2.2K 2.2K
2.2K
+1.8VS 2.2K +5VS_TS
BH28
SOC BG28
SOC_I2C5_DATA
SOC_I2C5_CLK
I2C5_SDA_PNL
Touch Panel
DMN63D8LDW I2C5_SCL_PNL
Dual channel NMOS
2.2K
2.2K
+1.8VS
2 2
BH10 PCU_SMB_CLK
BG12 PCU_SMB_DATA
DMN63D8LDW
Dual channel NMOS

2.2K
2.2K
+3VALW_EC
77 EC_SMB_CK1 100 ohm 7

SCL1 BATTERY
78 EC_SMB_DA1 100 ohm 6
SDA1 CONN
2.2K
2.2K +3VS
79
SCL2 EC_SMB_CK2
KBC SDA2
80
EC_SMB_DA2
3 3
200
202 SMBUS Address [A0h]
DIMMA
KB9022
30
32
WLAN SMBUS Address [TBD]
4.7K
4.7K +3VS_TL
85 9
SCL3 EC_SMB_CK3
86
EC_SMB_DA3
10
DP-LVDS SMBUS Address [TBD]
SDA3
4 4

SMB/I2C
A B C D E
A B C D E
1 1
12000mA
+SOC_VNN
VR_ON ISL95833HRTZ-T
(PU801) 14000mA
+SOC_VCC
SPOK SY8208DQNC 325mA SUSP ME4856-G 2750mA

(PU601) +1.0VALWP +1.0VS
(U25)
ADAPTER SYSON RT8207MZQW 5250mA SUSP# 420mA

TPS22966DPUR
(PU501) +1.35VP +1.35VS
(U26)
+0.675VSP
2 2
BATTERY B+
EC_ON SY8208BQNC 4850mA SUSP# SY8003DFC_DFN8 458mA
(PU401) +3VALWP +1.5VSP
(PU701)
SUSP# APL5930KAI-TRG 1000mA
+1.05VSP
(PU602)
SPOK APL5930KAI-TRG 110mA SUSP# TPS22966DPUR 10mA
CHARGER +1.8VALWP +1.8VS
(PU702) (U26)
SUSP# TPS22966DPUR 1000mA
+3VS +3VS_WLAN
(U24)
LAN_PWR_EN G5243AT11U ENVDD G5243AT11U

+3V_LAN +LCDVDD
(U67) (U8)
3 3
EC_ON SY8208BQNC 10050mA SUSP# TPS22966DPUR 1000mA 1050mA

+5VALWP +5VS +VDDA
(PU402) (U24)
1500mA
+5VS_HDD
1500mA
+5VS_ODD
500mA
+HDMI_5V_OUT
USB_PWR_EN# SY6288D10CAC 1500mA

+USB3_VCCA
(U17)
4 4

2013/04/12 2014/04/12 Title
Issued Date Deciphered Date Power Rail
A B C D E
5 4 3 2 1
DDR_A_D[0..63] <14>
DDR_A_DQS[0..7] <14>
DDR_A_DQS#[0..7] <14>
USOC1A USOC1B
<14> DDR_A_MA[0..15] DDR_A_MA0 K45 M36 DDR_A_D0 AY45 BG38
DDR_A_MA1 H47 DRAM0_MA_0 DRAM0_DQ_0 J36 DDR_A_D1 BB47 DRAM1_MA_0 DRAM1_DQ_0 BC40
DDR_A_MA2 L41 DRAM0_MA_1 DRAM0_DQ_1 P40 DDR_A_D2 AW41 DRAM1_MA_1 DRAM1_DQ_1 BA42
DDR_A_MA3 H44 DRAM0_MA_2 DRAM0_DQ_2 M40 DDR_A_D3 BB44 DRAM1_MA_2 DRAM1_DQ_2 BD42
D DDR_A_MA4 H50 DRAM0_MA_3 DRAM0_DQ_3 P36 DDR_A_D4 BB50 DRAM1_MA_3 DRAM1_DQ_3 BC38 D
DDR_A_MA5 G53 DRAM0_MA_4 DRAM0_DQ_4 N36 DDR_A_D5 BC53 DRAM1_MA_4 DRAM1_DQ_4 BD36
DDR_A_MA6 H49 DRAM0_MA_5 DRAM0_DQ_5 K40 DDR_A_D6 BB49 DRAM1_MA_5 DRAM1_DQ_5 BF42
DDR_A_MA7 D50 DRAM0_MA_6 DRAM0_DQ_6 K42 DDR_A_D7 BF50 DRAM1_MA_6 DRAM1_DQ_6 BC44
DDR_A_MA8 G52 DRAM0_MA_7 DRAM0_DQ_7 B32 DDR_A_D8 BC52 DRAM1_MA_7 DRAM1_DQ_7 BH32
DDR_A_MA9 E52 DRAM0_MA_8 DRAM0_DQ_8 C32 DDR_A_D9 BE52 DRAM1_MA_8 DRAM1_DQ_8 BG32
DDR_A_MA10 K48 DRAM0_MA_9 DRAM0_DQ_9 C36 DDR_A_D10 AY48 DRAM1_MA_9 DRAM1_DQ_9 BG36
DDR_A_MA11 E51 DRAM0_MA_10 DRAM0_DQ_10 A37 DDR_A_D11 BE51 DRAM1_MA_10 DRAM1_DQ_10 BJ37
DDR_A_MA12 F47 DRAM0_MA_11 DRAM0_DQ_11 C33 DDR_A_D12 BD47 DRAM1_MA_11 DRAM1_DQ_11 BG33
DDR_A_MA13 J51 DRAM0_MA_12 DRAM0_DQ_12 A33 DDR_A_D13 BA51 DRAM1_MA_12 DRAM1_DQ_12 BJ33
DDR_A_MA14 B49 DRAM0_MA_13 DRAM0_DQ_13 C37 DDR_A_D14 BH49 DRAM1_MA_13 DRAM1_DQ_13 BG37
DDR_A_MA15 B50 DRAM0_MA_14 DRAM0_DQ_14 B38 DDR_A_D15 BH50 DRAM1_MA_14 DRAM1_DQ_14 BH38
DRAM0_MA_15 DRAM0_DQ_15 F36 DDR_A_D16 DRAM1_MA_15 DRAM1_DQ_15 AU36
<14> DDR_A_DM[0..7] DRAM0_DQ_16 DRAM1_DQ_16
DDR_A_DM0 G36 G38 DDR_A_D17 BD38 AT36
DDR_A_DM1 B36 DRAM0_DM_0 DRAM0_DQ_17 F42 DDR_A_D18 BH36 DRAM1_DM_0 DRAM1_DQ_17 AV40
DDR_A_DM2 F38 DRAM0_DM_1 DRAM0_DQ_18 J42 DDR_A_D19 BC36 DRAM1_DM_1 DRAM1_DQ_18 AT40
DDR_A_DM3 B42 DRAM0_DM_2 DRAM0_DQ_19 G40 DDR_A_D20 BH42 DRAM1_DM_2 DRAM1_DQ_19 BA36
DDR_A_DM4 P51 DRAM0_DM_3 DRAM0_DQ_20 C38 DDR_A_D21 AT51 DRAM1_DM_3 DRAM1_DQ_20 AV36
DDR_A_DM5 V42 DRAM0_DM_4 DRAM0_DQ_21 G44 DDR_A_D22 AM42 DRAM1_DM_4 DRAM1_DQ_21 AY42
DDR_A_DM6 Y50 DRAM0_DM_5 DRAM0_DQ_22 D42 DDR_A_D23 AK50 DRAM1_DM_5 DRAM1_DQ_22 AY40
DDR_A_DM7 Y52 DRAM0_DM_6 DRAM0_DQ_23 A41 DDR_A_D24 AK52 DRAM1_DM_6 DRAM1_DQ_23 BJ41
DRAM0_DM_7 DRAM0_DQ_24 C41 DDR_A_D25 DRAM1_DM_7 DRAM1_DQ_24 BG41
M45 DRAM0_DQ_25 A45 DDR_A_D26 AV45 DRAM1_DQ_25 BJ45
<14> DDR_A_RAS# M44 DRAM0_RAS# DRAM0_DQ_26 B46 DDR_A_D27 AV44 DRAM1_RAS# DRAM1_DQ_26 BH46
<14> DDR_A_CAS# H51 DRAM0_CAS# DRAM0_DQ_27 C40 DDR_A_D28 BB51 DRAM1_CAS# DRAM1_DQ_27 BG40
<14> DDR_A_WE# DRAM0_WE# DRAM0_DQ_28 B40 DRAM1_WE# DRAM1_DQ_28 BH40
DDR_A_D29
K47 DRAM0_DQ_29 B48 DDR_A_D30 AY47 DRAM1_DQ_29 BH48
<14> DDR_A_BS0 K44 DRAM0_BS_0 DRAM0_DQ_30 B47 DDR_A_D31 AY44 DRAM1_BS_0 DRAM1_DQ_30 BH47
<14> DDR_A_BS1 D52 DRAM0_BS_1 DRAM0_DQ_31 K52 BF52 DRAM1_BS_1 DRAM1_DQ_31 AY52
DDR_A_D32
<14> DDR_A_BS2 DRAM0_BS_2 DRAM0_DQ_32 K51 DRAM1_BS_2 DRAM1_DQ_32 AY51
DDR_A_D33
P44 DRAM0_DQ_33 T52 DDR_A_D34 AT44 DRAM1_DQ_33 AP52
<14> DDR_A_CS0# DRAM0_CS_0# DRAM0_DQ_34 T51 DDR_A_D35 DRAM1_CS_0# DRAM1_DQ_34 AP51
C P45 DRAM0_DQ_35 L51 DDR_A_D36 AT45 DRAM1_DQ_35 AW51 C
<14> DDR_A_CS2# DRAM0_CS_2# DRAM0_DQ_36 L53 DDR_A_D37 DRAM1_CS_2# DRAM1_DQ_36 AW53
DRAM0_DQ_37 R51 DDR_A_D38 DRAM1_DQ_37 AR51
C47 DRAM0_DQ_38 R53 DDR_A_D39 BG47 DRAM1_DQ_38 AR53
<14> DDR_A_CKE0 D48 DRAM0_CKE_0 DRAM0_DQ_39 T47 DDR_A_D40 BE46 DRAM1_CKE_0 DRAM1_DQ_39 AP47
F44 RESERVED_D48 DRAM0_DQ_40 T45 DDR_A_D41 BD44 RESERVED_BE46 DRAM1_DQ_40 AP45
<14> DDR_A_CKE2 E46 DRAM0_CKE_2 DRAM0_DQ_41 Y40 BF48 DRAM1_CKE_2 DRAM1_DQ_41 AK40
DDR_A_D42
RESERVED_E46 DRAM0_DQ_42 V41 DDR_A_D43 RESERVED_BF48 DRAM1_DQ_42 AM41
T41 DRAM0_DQ_43 T48 DDR_A_D44 AP41 DRAM1_DQ_43 AP48
<14> DDR_A_ODT0 DRAM0_ODT_0 DRAM0_DQ_44 T50 DDR_A_D45 DRAM1_ODT_0 DRAM1_DQ_44 AP50
P42 DRAM0_DQ_45 Y42 DDR_A_D46 AT42 DRAM1_DQ_45 AK42
<14> DDR_A_ODT2 DRAM0_ODT_2 DRAM0_DQ_46 AB40 DRAM1_ODT_2 DRAM1_DQ_46 AH40
DDR_A_D47
DRAM0_DQ_47 V45 DDR_A_D48 DRAM1_DQ_47 AM45
M50 DRAM0_DQ_48 V47 DDR_A_D49 AV50 DRAM1_DQ_48 AM47
<14> DDR_A_CLK0 M48 DRAM0_CKP_0 DRAM0_DQ_49 AD48 DDR_A_D50 AV48 DRAM1_CKP_0 DRAM1_DQ_49 AF48
<14> DDR_A_CLK0# DRAM0_CKN_0 DRAM0_DQ_50 AD50 DDR_A_D51 DRAM1_CKN_0 DRAM1_DQ_50 AF50
DRAM0_DQ_51 V48 DDR_A_D52 DRAM1_DQ_51 AM48
P50 DRAM0_DQ_52 V50 DDR_A_D53 DRAM1_DQ_52 AM50
<14> DDR_A_CLK2 P48 DRAM0_CKP_2 DRAM0_DQ_53 AB44 AT50 DRAM1_DQ_53 AH44
DDR_A_D54
<14> DDR_A_CLK2# DRAM0_CKN_2 DRAM0_DQ_54 Y45 DDR_A_D55 AT48 DRAM1_CKP_2 DRAM1_DQ_54 AK45
DRAM0_DQ_55 V52 DDR_A_D56 DRAM1_CKN_2 DRAM1_DQ_55 AM52
DRAM0_DQ_56 W51 DDR_A_D57 DRAM1_DQ_56 AL51
P41 DRAM0_DQ_57 AC53 DDR_A_D58 DRAM1_DQ_57 AG53
<14> DDR_A_RST# DRAM0_DRAMRST# DRAM0_DQ_58 AC51 AT41 DRAM1_DQ_58 AG51
DDR_A_D59
DRAM0_DQ_59 W53 DDR_A_D60 DRAM1_DRAMRST# DRAM1_DQ_59 AL53
DRAM0_DQ_60 Y51 DDR_A_D61 DRAM1_DQ_60 AK51
AF44 DRAM0_DQ_61 AD52 DDR_A_D62 DRAM1_DQ_61 AF52
+DDR_SOC_VREF DRAM_VREF 0.675V DRAM0_DQ_62 DRAM1_DQ_62
AD51 DDR_A_D63 AF51
DRAM0_DQ_63 DRAM1_DQ_63
100K_0402_5% 1 2 R1 DDR_TERMN0 AF42 J38 DDR_A_DQS0 BF40
100K_0402_5% 1 2 R2 DDR_TERMN1 AH42 ICLK_DRAM_TERMN_AF42 DRAM0_DQSP_0 K38 DDR_A_DQS#0 DRAM1_DQSP_0 BD40
ICLK_DRAM_TERMN_AH42 DRAM0_DQSN_0 C35 DDR_A_DQS1 DRAM1_DQSN_0 BG35
B DRAM0_DQSP_1 B34 DDR_A_DQS#1 DRAM1_DQSP_1 BH34 B
DRAM0_DQSN_1 D40 DDR_A_DQS2 DRAM1_DQSN_1 BA38
AD42 DRAM0_DQSP_2 F40 DDR_A_DQS#2 DRAM1_DQSP_2 AY38
<30> DDR_PWROK AB42 DRAM_VDD_S4_PWROK DRAM0_DQSN_2 B44 DDR_A_DQS3 DRAM1_DQSN_2 BH44
<9> DDR_CORE_PWROK DRAM_CORE_PWROK DRAM0_DQSP_3 C43 DRAM1_DQSP_3 BG43
DDR_A_DQS#3
DRAM0_DQSN_3 N53 DDR_A_DQS4 DRAM1_DQSN_3 AU53
23.2_0402_1% 1 2 R3 DDR_RCOMP0 AD44 DRAM0_DQSP_4 M52 DDR_A_DQS#4 DRAM1_DQSP_4 AV52
29.4_0402_1% 1 2 R4 DDR_RCOMP1 AF45 DRAM_RCOMP_0 DRAM0_DQSN_4 T42 DDR_A_DQS5 DRAM1_DQSN_4 AP42
162_0402_1% 1 2 R5 DDR_RCOMP2 AD45 DRAM_RCOMP_1 DRAM0_DQSP_5 T44 DDR_A_DQS#5 DRAM1_DQSP_5 AP44
DRAM_RCOMP_2 DRAM0_DQSN_5 Y47 DDR_A_DQS6 DRAM1_DQSN_5 AK47
DRAM0_DQSP_6 Y48 DDR_A_DQS#6 DRAM1_DQSP_6 AK48
Follow CRB v2.0 DRAM0_DQSN_6 DRAM1_DQSN_6
AF40 AB52 DDR_A_DQS7 AH52
AF41 RESERVED_AF40 DRAM0_DQSP_7 AA51 DDR_A_DQS#7 DRAM1_DQSP_7 AJ51
AD40 RESERVED_AF41 DRAM0_DQSN_7 DRAM1_DQSN_7
AD41 RESERVED_AD40
RESERVED_AD41 1 OF 13 2 OF 13
2 1 DDR_CORE_PWROK FH8065301546401_FCBGA131170 FH8065301546401_FCBGA131170

EMC@ C1 @ @
0.01U_0402_16V7K
Close To SOC Pin

USOC1 USOC1 USOC1
N3530@ N2830@ N2930@
+1.35V +DDR_SOC_VREF
A 1 2 S IC FH8065301728500 QG9T C0 2.17G FCBGA S IC FH8065301729601 QG9V C0 2.17G ABO! S IC FH8065301729501 QG9U C0 1.83G FCBGA A
R6 1 Part Number = SA00007QQ70 Part Number = SA00007QR30 Part Number = SA00007RV70
4.7K_0402_1%
C2
1 2 .1U_0402_16V7K
R7 2
4.7K_0402_1%
2013/04/12 2014/04/12 Title
Issued Date Deciphered Date VLV-M SOC Memory DDR3L
5 4 3 2 1
5 4 3 2 1
D D
USOC1C
AV3 AG3
<17> HDMI_TX2+ AV2 DDI0_TXP_0 DDI1_TXP_0 AG1 EDP_TXP0 <15,16>
<17> HDMI_TX2- DDI0_TXN_0 1.0V 1.0V DDI1_TXN_0 EDP_TXN0 <15,16>
AT2 AF3
<17> HDMI_TX1+ AT3 DDI0_TXP_1 DDI1_TXP_1 AF2 EDP_TXP1 <16>
<17> HDMI_TX1- AR3 DDI0_TXN_1 DDI1_TXN_1 AD3 EDP_TXN1 <16>
<17> HDMI_TX0+ AR1 DDI0_TXP_2 DDI1_TXP_2 AD2
<17> HDMI_TX0- AP3 DDI0_TXN_2 DDI1_TXN_2 AC3
<17> HDMI_CLK+ AP2 DDI0_TXP_3 DDI1_TXP_3 AC1 eDP Panel
HDMI <17> HDMI_CLK- DDI0_TXN_3 DDI1_TXN_3
AL3 1.0V AK3
DDI0_AUXP DDI1_AUXP EDP_AUXP <15,16>
AL1 1.0V AK2
DDI0_AUXN DDI1_AUXN EDP_AUXN <15,16>
D27 1.8V 1.8V K30
<17> HDMI_HPD# DDI0_HPD DDI1_HPD EDP_HPD# <16>
C26 1.8V 1.8V DDI1_DDCDATA P30 DDI1_ENABLE R8 1 2 2.2K_0402_5%
<17> HDMI_DDCDATA DDI0_DDCDATA +1.8VS
C28 1.8V 1.8V DDI1_DDCCLK G30
<17> HDMI_DDCCLK DDI0_DDCCLK
B28 1.8V N30 DDI1_ENVDD
C27 DDI0_VDDEN DDI1_VDDEN J30 DDI1_ENBKL
DDI0_BKLTEN 1.8V DDI1_BKLTEN
B26 1.8V M30 DDI1_PWM
DDI0_BKLTCTL DDI1_BKLTCTL
AH3
1 R9 2 DDI0_RCOMPP AK12 VSS_AH3 AH2
DDI0_RCOMP_P VSS_AH2
Follow CRB v2.0 0ohm till to GND
402_0402_1% DDI0_RCOMPN AK13
AM14 DDI0_RCOMP_N AH14
AM13 RESERVED_AM14 RESERVED_AH14 AH13
AM3 RESERVED_AM13 RESERVED_AH13 AF14
C AM2 VSS_AM3 RESERVED_AF14 AF13 C
Follow CRB v2.0 0ohm till to GND VSS_AM2 RESERVED_AF13
BA3
VGA_RED AY2
VGA_BLUE BA1
VGA_GREEN AW1
VGA_IREF AY3
VGA_IRTN
3.3V BD2
VGA_HSYNC BF2
3.3V VGA_VSYNC
3.3V BC1
VGA_DDCCLK BC2
3.3V VGA_DDCDATA
T2 T7
T3 RESERVED_T2 RESERVED_T7 T9
AB3 RESERVED_T3 RESERVED_T9 AB13
AB2 RESERVED_AB3 RESERVED_AB13 AB12
Y3 RESERVED_AB2 RESERVED_AB12 Y12
Y2 RESERVED_Y3 RESERVED_Y12 Y13
W3 RESERVED_Y2 RESERVED_Y13 V10
W1 RESERVED_W3 RESERVED_V10 V9
V2 RESERVED_W1 RESERVED_V9 T12
V3 RESERVED_V2 RESERVED_T12 T10
R3 RESERVED_V3 RESERVED_T10 V14
R1 RESERVED_R3 RESERVED_V14 V13
+1.8VS AD6 RESERVED_R1 RESERVED_V13 T14
AD4 RESERVED_AD6 RESERVED_T14 T13
AB9 RESERVED_AD4 RESERVED_T13 T6
RESERVED_AB9 RESERVED_T6
1
AB7 T4
@ Y4 RESERVED_AB7 RESERVED_T4 P14
R10 Y6 RESERVED_Y4 RESERVED_P14
B 10K_0402_5% V4 RESERVED_Y6 F34 B
V6 RESERVED_V4 GPIO_S0_NC_15 M32
2
GPIO_NC13 A29 RESERVED_V6 GPIO_S0_NC_16 D28

@ GPIO_NC14 C29 GPIO_S0_NC_13 GPIO_S0_NC_17 J28
eDP
T1 GPIO_S0_NC14 GPIO_S0_NC_18
1
AB14 K34
@ GPIO_NC12 B30 RESERVED_AB14 GPIO_S0_NC_19 D34
T2 C30 GPIO_S0_NC_12 GPIO_S0_NC_20 F32
R11
10K_0402_1% RESERVED_C30 GPIO_S0_NC_21 F28 +3VS
GPIO_S0_NC_22 K28 DDI1_ENBKL 1 @ 2
ENBKL <23>
2
GPIO_S0_NC_23 J34 0_0402_5% R13

GPIO_S0_NC_24 N32 ENVDD 1 2
GPIO_S0_NC_25 D32 Modify R02 4.7K_0402_5% R14
Follow CRB v2.0 3 OF 10 GPIO_S0_NC_26
INVT_PWM_SOC 1 2
FH8065301546401_FCBGA131170 @ +1.8VS 4.7K_0402_5% R15
From check list:
5
U2
GPIO_S0_NC[13] Multiplexed with Hardware Straps Pin:MDSI_DDCDATA 1
P
NC 4
Y ENVDD <16>
DDI1_ENVDD 2
A
G
NL17SZ07DFT2G_SC70-5
3
SA00004BV00
RP1
+1.8VS DDI1_ENBKL 8 1
DDI1_ENVDD 7 2
DDI1_PWM 6 3
5
U3 5 4
1
P
NC 4 100K_0804_8P4R_5%
A DDI1_PWM 2 Y INVT_PWM_SOC <15,16> A
A
G
NL17SZ07DFT2G_SC70-5
3
SA00004BV00

2013/04/12 2014/04/12 Title
Issued Date Deciphered Date VLV-M SOC Display
5 4 3 2 1
5 4 3 2 1
D D
USOC1D
BF6 AY7 PCIE_PTX_DRX_P0 .1U_0402_16V7K 1 2 C5

<21> SATA_PTX_DRX_P0 BG7 SATA_TXP_0 PCIE_TXP_0 AY6 PCIE_PTX_DRX_N0 PCIE_PTX_C_DRX_P0 <18>
.1U_0402_16V7K 1 2 C3
<21> SATA_PTX_DRX_N0 SATA_TXN_0 PCIE_TXN_0 PCIE_PTX_C_DRX_N0 <18>
HDD PCIE LAN
AU16 AT14 PCIE_PRX_DTX_P0
<21> SATA_PRX_DTX_P0 AV16 SATA_RXP_0 PCIE_RXP_0 AT13 PCIE_PRX_DTX_N0 PCIE_PRX_DTX_P0 <18>
<21> SATA_PRX_DTX_N0 SATA_RXN_0 PCIE_RXN_0 PCIE_PRX_DTX_N0 <18>
BD10 AV6 PCIE_PTX_DRX_P1 .1U_0402_16V7K 1 2 C4
<21> SATA_PTX_DRX_P1 BF10 SATA_TXP_1 PCIE_TXP_1 AV4 PCIE_PTX_DRX_N1 PCIE_PTX_C_DRX_P1 <19>
.1U_0402_16V7K 1 2 C6
<21> SATA_PTX_DRX_N1 SATA_TXN_1 PCIE_TXN_1 PCIE_PTX_C_DRX_N1 <19>
ODD WLAN
AY16 AT10 PCIE_PRX_DTX_P1
<21> SATA_PRX_DTX_P1 BA16 SATA_RXP_1 PCIE_RXP_1 AT9 PCIE_PRX_DTX_N1 PCIE_PRX_DTX_P1 <19>
<21> SATA_PRX_DTX_N1 SATA_RXN_1 PCIE_RXN_1 PCIE_PRX_DTX_N1 <19>
BB10 AT7
BC10 VSS_BB10 PCIE_TXP_2 AT6
Follow CRB V2.0 0ohm till to GND VSS_BC10 PCIE_TXN_2
SOC_SCI# BA12 AP12
<9> SOC_SCI# AY14 SATA_GP0 / GPIO_S0_SC_0 PCIE_RXP_2 AP10
DEVSLP_SOC
@ T3 SATA_GP1 / SATA_DEVSLP_0 / GPIO_S0_SC_1 PCIE_RXN_2
Modify R02 AY12
SATA_LED# / GPIO_S0_SC_2 AP6
C 1 R16 2 SATA_RCOMPP AU18 PCIE_TXP_3 AP4 C
402_0402_1% SATA_RCOMPN AT18 SATA_RCOMP_P PCIE_TXN_3
SATA_RCOMP_N AP9 +1.8VS
PCIE_RXP_3 AP7 RP2
AT22 PCIE_RXN_3 LAN_CLKREQ# 1 8
MMC1_CLK / GPIO_S0_SC_16 BB7 PCIE_CLKREQ_2# 2 7
AV20 VSS_BB7 BB5 PCIE_CLKREQ_3# 3 6
MMC1_D0 / GPIO_S0_SC_17 VSS_BB5
Follow CRB V2.0 0ohm till to GND
AU22 WLAN_CLKREQ# 4 5
AV22 MMC1_D1 / GPIO_S0_SC_18 BG3 LAN_CLKREQ#
AT20 MMC1_D2 / GPIO_S0_SC_19 PCIE_CLKREQ_0# / GPIO_S0_SC_3 BD7 WLAN_CLKREQ# LAN_CLKREQ# <18>
10K_0804_8P4R_5%
AY24 MMC1_D3 / GPIO_S0_SC_20 PCIE_CLKREQ_1# / GPIO_S0_SC_4 BG5 PCIE_CLKREQ_2# WLAN_CLKREQ# <19>
AU26 MMC1_D4 / GPIO_S0_SC_21 PCIE_CLKREQ_2# / GPIO_S0_SC_5 BE3 PCIE_CLKREQ_3#
AT26 MMC1_D5 / GPIO_S0_SC_22 PCIE_CLKREQ_3# / GPIO_S0_SC_6 BD5 RP3
AU20 MMC1_D6 / GPIO_S0_SC_23 SD3_WP / GPIO_S0_SC_7 HDA_SYNC 8 1
MMC1_D7 / GPIO_S0_SC_24 HDA_SYNC_AUDIO <20>
AP14 PCIE_RCOMPP 1 R17 2 HDA_SDOUT 7 2
PCIE_RCOMP_P HDA_SDOUT_AUDIO <20>
AV26 AP13 PCIE_RCOMPN 402_0402_1% HDA_BIT_CLK 6 3
MMC1_CMD / GPIO_S0_SC_25 PCIE_RCOMP_N HDA_BITCLK_AUDIO <20>
BA24 HDA_RST# 5 4
MMC1_RST# / SATA_DEVSLP_0 / GPIO_S0_SC_26 HDA_RST_AUDIO# <20>
BB4
AY18 RESERVED_BB4 BB3 33_0804_8P4R_5%
MMC1_RCOMP RESERVED_BB3 EMC@
AV10
BA18 RESERVED_AV10 AV9
AY20 SD2_CLK / GPIO_S0_SC_27 RESERVED_AV9 HDA_RCOMP R18 1 2 49.9_0402_1%
BD20 SD2_D0 / GPIO_S0_SC_28 BF20 HDA_RCOMP
BA20 SD2_D1 / GPIO_S0_SC_29 HDA_LPE_RCOMP BG22 HDA_RST# HDA_BITCLK_AUDIOC7 1 2 22P_0402_50V8J
BD18 SD2_D2 / GPIO_S0_SC_30 HDA_RST# / LPE_I2S0_CLK / GPIO_S0_SC_8 BH20 HDA_SYNC
BC18 SD2_D3_CD# / GPIO_S0_SC_31 HDA_SYNC / LPE_I2S0_FRM / GPIO_S0_SC_9 BJ21 HDA_BIT_CLK @EMC@
SD2_CMD / GPIO_S0_SC_32 HDA_CLK / LPE_I2S0_DATAOUT / GPIO_S0_SC_10 BG20 HDA_SDOUT
HDA_SDO / LPE_I2S0_DATAIN / GPIO_S0_SC_11 BG19 HDA_SDIN0
HDA_SDI0 / LPE_I2S1_CLK / GPIO_S0_SC_12 BG21 HDA_SDIN0 <20>
@
AY26 HDA_SDI1 / LPE_I2S1_FRM / GPIO_S0_SC_13 BH18 T4
@
AT28 SD3_CLK / GPIO_S0_SC_33 HDA_DOCKRST# / LPE_I2S1_DATAOUT / GPIO_S0_SC_14 BG18 T5
@
B BD26 SD3_D0 / GPIO_S0_SC_34 HDA_DOCKEN# / LPE_I2S1_DATAIN / GPIO_S0_SC_15 T6 B
SD3_D1 / GPIO_S0_SC_35 GPIO_S0_SC_63:
AU28 BF28
BA26 SD3_D2 / GPIO_S0_SC_36 LPE_I2S2_CLK / SATA_DEVSLP_1 / GPIO_S0_SC_62 BA30 GPIO_S0_SC_63 BIOS/EFI Boot Strap (BBS)
BC24 SD3_D3 / GPIO_S0_SC_37 LPE_I2S2_FRM / GPIO_S0_SC_63 BD28 0 = LPC
AV28 SD3_CD# / GPIO_S0_SC_38 LPE_I2S2_DATAIN / GPIO_S0_SC_64 BC30 GPIO_S0_SC_65
SD3_CMD / GPIO_S0_SC_39 LPE_I2S2_DATAOUT / GPIO_S0_SC_65
Follow CRB v2.0 1 = SPI
BF22 +1.8VS
BD22 SD3_1P8EN / GPIO_S0_SC_40 P34
SD3_PWREN# / GPIO_S0_SC_41 RESERVED_P34 N34 R20
BF26 RESERVED_N34 73.2_0402_1% GPIO_S0_SC_63 R19 2 1 10K_0402_5%
SD3_RCOMP AK9 1 2
RESERVED_AK9 +1.0VS
AK7
RESERVED_AK7
C24
PROCHOT# H_PROCHOT# <23>
4 OF 10 Internal PD 2K GPIO_S0_SC_65:
2 Security Flash Descriptors
FH8065301546401_FCBGA131170 @ @EMC@
C8 0 = Override
1
10P_0402_50V8J 1 = Normal Operation (Internal PU)
+1.8VS
1
R21
10K_0402_5%
EC programing :
2
GPIO_S0_SC_65 "High"for Flash BIOS
1
D
A 2 A
TXE_DBG <23>
G
S Q1
3
MESS138W-G_SOT323-3

2013/04/12 2014/04/12 Title
Issued Date Deciphered Date VLV-M SOC SATA/PCI-E/HDA
Rev
Custom 1.0
5 4 3 2 1
5 4 3 2 1
+3VS
+1.8VS
1
R22
5
XTAL_25M_IN USOC1E U4 4.7K_0402_5%
1.8V 1 3.3V
2
NC
1
XTAL_25M_IN AH12 AU34 R24 2 1 2.2K_0402_5% 4
ICLK_OSCIN SIO_UART1_RXD / GPIO_S0_SC_70 +1.8VALW Y PLT_RST_BUF# <18,19,21,23>
R23 XTAL_25M_OUT AH10 AV34 PMC_PLTRST# 2
ICLK_OSCOUT SIO_UART1_TXD / GPIO_S0_SC_71 A
G
Y1 1M_0402_5% BA34
25MHZ_10PF_7V25000014 AD9 SIO_UART1_RTS# / GPIO_S0_SC_72 AY34 PMC_ACIN D1 2 1 RB751V40_SC76-2 NL17SZ07DFT2G_SC70-5
ACIN <23,28>
3
RESERVED_AD9 SIO_UART1_CTS# / GPIO_S0_SC_73 SA00004BV00
2
10P_0402_25V8J
1 3 XTAL_25M_OUT ICLK_ICOMP AD14 BF34

1 3 ICLK_RCOMP AD13 ICLK_ICOMP SIO_UART2_RXD / GPIO_S0_SC_74 BD34
1 GND GND 1 ICLK_RCOMP SIO_UART2_TXD / GPIO_S0_SC_75 PLT_RST Buffer
C11
BD32 PLT_RST_BUF# 1 2
D C9 AD10 SIO_UART2_RTS# / GPIO_S0_SC_76 BF32 C10 @EMC@ D
2 4 10P_0402_25V8J AD12 RESERVED_AD10 SIO_UART2_CTS# / GPIO_S0_SC_77 0.01U_0402_16V7K
2 2 RESERVED_AD12
AF6
<18> CLK_PCIE_LAN# AF4 PCIE_CLKN_0 D26 +1.8VALW
LAN <18> CLK_PCIE_LAN PCIE_CLKP_0 PMC_SUSPWRDNACK / GPIO_S5_11 G24 PMC_SUSCLK T7 @ 32.768k output RP4
AF9 PMC_SUSCLK_0 / GPIO_S5_12 F18 PMC_PCIE_WAKE# 1 8
<19> CLK_PCIE_WLAN# AF7 PCIE_CLKN_1 PMC_SLP_S0IX# / GPIO_S5_13 F22 PMC_SLP_S4# PMC_BATLOW# 2 7
WLAN <19> CLK_PCIE_WLAN PCIE_CLKP_1 PMC_SLP_S4#
R25 1 2 4.02K_0402_1% ICLK_ICOMP D22 PMC_SLP_S3# GPIO_S5_14 3 6
R26 1 2 47.5_0402_1% ICLK_RCOMP PMC_SLP_S3# J20 GPIO_S5_14 4 5
AK4 GPIO_S5_14 D20 PMC_ACIN
AK6 PCIE_CLKN_2 PMC_ACPRESENT F26 PMC_PCIE_WAKE# 10K_0804_8P4R_5%
PCIE_CLKP_2 PMC_WAKE_PCIE_0# / GPIO_S5_15 K26 PMC_BATLOW#
AM4 PMC_BATLOW# J26 PMC_PWRBTN# EMC@
AM6 PCIE_CLKN_3 PMC_PWRBTN# / GPIO_S5_16 BG9 PMC_RSTBTN# T8 @ PMC_CORE_PWROK C12 1 2 0.01U_0402_16V7K
PCIE_CLKP_3 PMC_RSTBTN# F20 PMC_PLTRST#
AM9 PMC_PLTRST# J24 GPIO_S5_17 T9 @ EMC@
R03 modify AM10 RESERVED_AM9 GPIO_S5_17 G18 DDR_CORE_PWROK 1 2 0.01U_0402_16V7K
For XDP use RESERVED_AM10 PMC_SUS_STAT# / GPIO_S5_18
C13
+1.8VALW
EMC@
R27 1 @ 2 51_0402_5% XDP_H_PRDY# PMC_PLTRST# C14 1 2 .1U_0402_16V7K
R28 1 2 51_0402_5% XDP_H_TDO C11 RTC_TEST#
R29 1 @ 2 200_0402_5% XDP_H_PREQ_BUF# BH7 ILB_RTC_TEST# C12 RTC_RST#
BH5 PMC_PLT_CLK_0 / GPIO_S0_SC_96 ILB_RTC_RST# EC_RSMRST# R30 1 2 100K_0402_5%
RP5 @ BH4 PMC_PLT_CLK_1 / GPIO_S0_SC_97
4 5 XDP_H_TDI BH8 PMC_PLT_CLK_2 / GPIO_S0_SC_98 B10 EC_RSMRST# EMC@
3 6 XDP_H_TMS BH6 PMC_PLT_CLK_3 / GPIO_S0_SC_99 PMC_RSMRST# B7 PMC_CORE_PWROK EC_RSMRST# <23> 1 2 .1U_0402_16V7K
C15
2 7 XDP_H_TCK BJ9 PMC_PLT_CLK_4 / GPIO_S0_SC_100 PMC_CORE_PWROK
1 8 XDP_H_TRST# PMC_PLT_CLK_5 / GPIO_S0_SC_101 +1.0VS
RTC domain
C9 ILB_RTC_X1
51_0804_8P4R_5% XDP_H_TCK D14 ILB_RTC_X1 A9 ILB_RTC_X2
TAP_TCK ILB_RTC_X2
1
XDP_H_TRST# G12 B8 ILB_RTC_EXTPAD 1 2
C XDP_H_TMS F14 TAP_TRST# ILB_RTC_EXTPAD P22 C16 R31 +1.35VS C
XDP_H_TDI F12 TAP_TMS RTC_VCC_P22 .1U_0402_16V7K 73.2_0402_1%
TAP_TDI +RTCVCC
1
XDP_H_TDO G16 +3VALW
XDP_H_PRDY# D18 TAP_TDO R38
2
XDP_H_PREQ_BUF# F16 TAP_PRDY# B24 VR_SVID_ALERT#_SOC R32 1 2 20_0402_1%
TAP_PREQ# SVID_ALERT# VR_SVID_ALERT# <33> 10K_0402_5%
5
AT34 A25 VR_SVID_DATA_SOC R33 1 2 16.9_0402_1% U6
RESERVED_AT34 SVID_DATA C25 VR_SVID_DATA <33> 1
3.3V 1.35V
P
VR_SVID_CLK <33>
2
SOC_SPI_CS0# C23 SVID_CLK NC 4
C21 PCU_SPI_CS_0# 2 Y DDR_CORE_PWROK <6>
@ T10
PCU_SPI_CS_1# / GPIO_S5_21 <23> PMC_CORE_PWROK A
G
SOC_SPI_MISO B22 AU32
SOC_SPI_MOSI A21 PCU_SPI_MISO SIO_PWM_0 / GPIO_S0_SC_94 AT32 NL17SZ07DFT2G_SC70-5
3
SOC_SPI_CLK C22 PCU_SPI_MOSI SIO_PWM_1 / GPIO_S0_SC_95 SA00004BV00
PCU_SPI_CLK
ILB_RTC_X1
SOC_KBRST# B18 ILB_RTC_X2
1 @ 2 SOC_TS_INT# B16 GPIO_S5_0 K24 1 2 RP6
<16> TS_INT_R# 1 2R34 C18 GPIO_S5_1 / PMC_WAKE_PCIE_1 GPIO_S5_22 N24 1 8
0_0402_5% @ SOC_TP_INT# R35
<24> PCH_TP_INT# A17 GPIO_S5_2 / PMC_WAKE_PCIE_2 GPIO_S5_23 M20
0_0402_5% R36 10M_0402_5% PMC_SLP_S4# 2 7 EC_SLP_S4#
C17 GPIO_S5_3 / PMC_WAKE_PCIE_3 GPIO_S5_24 J18 3 6 EC_SLP_S4# <23>
modify R02 SOC_LID_OUT# SOC_KBRST# EC_KBRST#
C16 GPIO_S5_4 GPIO_S5_25 M18 SOC_LID_OUT# 4 5 EC_LID_OUT# EC_KBRST# <23>
32.768KHZ_12.5PF_Q13FC135000040
B14 GPIO_S5_5 / PMU_SUSCLK_1 GPIO_S5_26 K18 EC_LID_OUT# <23>
Y2 1 2
SOC_SMI# C15 GPIO_S5_6 / PMU_SUSCLK_2 GPIO_S5_27 K20 0_0804_8P4R_5%
GPIO_S5_7 / PMU_SUSCLK_3 GPIO_S5_28 M22
GPIO_S5_29 1 1
M24 RP7
GPIO_S5_30 C17 C18 1 8
C13 18P_0402_50V8J 18P_0402_50V8J SOC_SMI# 2 7 EC_SMI#
A13 GPIO_S5_8 2 2 3 6 EC_SMI# <23>
SOC_SCI# EC_SCI#
C19 GPIO_S5_9 AV32 <8> SOC_SCI# EC_SCI# <23>
PMC_PWRBTN# 4 5 PBTN_OUT#
GPIO_S5_10 SIO_SPI_CS# / GPIO_S0_SC_66 BA28 PBTN_OUT# <23>
SIO_SPI_MISO / GPIO_S0_SC_67 AY28 Modify R03 0_0804_8P4R_5%
GPIO_RCOMP N26 SIO_SPI_MOSI / GPIO_S0_SC_68 AY30
GPIO_RCOMP 5 OF 13 SIO_SPI_CLK / GPIO_S0_SC_69
2
B R213 +1.8VALW B
R37 FH8065301546401_FCBGA131170 @ 0_0402_5%
49.9_0402_1% SOC_SERIRQ 1 2 EC_SERIRQ PMC_SLP_S3# R116 2 1 2.2K_0402_5%
NTPM@ TPM@
NTPM@
1
PMC_SLP_S3# 1 2 EC_SLP_S3#
R214
0_0402_5%
+1.8VALW +3VALW_EC +1.8VALW
U27
1 6
2 VCCA VCCB 5
SOC_SERIRQ 3 GND EO 4
+BIOS_SPI +RTCVCC <10> SOC_SERIRQ A4 B4 EC_SERIRQ <21,23>
+BIOS_SPI Modify R03 +1.8VALW G2129TL1U_SC70-6
R39 1 2 3.3K_0402_5% SPI_CS0# R42 +1.8VALW TPM@
2 @ 1 20K_0402_1%
R41 1 2 3.3K_0402_5% SPI_WP# R40 0_0402_5% RTC_TEST# 2 1
C19 2 1 .1U_0402_16V7K
2
G
R43 1 2 3.3K_0402_5% SPI_HOLD# RTC_RST# 2 1
2 1 R44 20K_0402_1%
PMC_SLP_S3# 3 1
EC_SLP_S3# <23>
C20 C21
D
From EC
SPI ROM ( 8MByte ) 1.8V 1U_0402_6.3V6K 1U_0402_6.3V6K Q21 TPM@ Modify R02
1 2
(For share ROM) +BIOS_SPI
MESS138W-G_SOT323-3
RP8
EC_SPICS# 1 8 SPI_CS0# U7
<23> EC_SPICS# EC_SPICLK 2 7 SPI_CLK SPI_CS0# 1 8
<23> EC_SPICLK CS# VCC W=20mils trace width 10mil W=20mils
EC_MOSI 3 6 SPI_MOSI SPI_MISO 2 7 SPI_HOLD#
<23> EC_MOSI 4 5 3 DO(IO1) HOLD#(IO3) 6 +RTCBATT +CHGRTC +RTCVCC +RTCVCC
EC_MISO SPI_MISO SPI_WP# SPI_CLK RTC_TEST#
<23> EC_MISO 4 WP#(IO2) CLK 5 SPI_MOSI D2
22_0804_8P4R_5% GND DI(IO0) 2 1
1
A EMC@ W25Q64DWSSIG_SO8 D A
1
2 SP@ SP@ 1 C22

<23> CL_CMOS
RP9 G JCMOS1 JCMOS2 .1U_0402_16V7K
SOC_SPI_CLK 1 8 SPI_CLK @ SHORT PADS SHORT PADS 3 2
From CPU S
3
SOC_SPI_MOSI 2 7 SPI_MOSI Q19

SOC_SPI_MISO 3 6 SPI_MISO MESS138W-G_SOT323-3 Modify R03 BAS40-04_SOT23-3
SOC_SPI_CS0# 4 5 SPI_CS0# Reserve for EMI(Near SPI ROM)
22_0804_8P4R_5% Clear CMOS Security Classification Compal Secret Data Compal Electronics, Inc.
EMC@ SPI_CLK 1 2 2 1 2013/04/12 2014/04/12 Title
@EMC@ R47 @EMC@ C23
Close to RAM door Issued Date Deciphered Date VLV-M SOC CLK/PMU/SPI
33_0402_5% 10P_0402_50V8J
Rev
Custom 1.0
5 4 3 2 1
5 4 3 2 1
USOC1F
BIOS/EFI Top Swap
G2 M10
GPIO_S5_31 RESERVED_M10 M9
RESERVED_M9
D
While updating the BIOS/EFI boot sector in D
M3 P6
L1 GPIO_S5_32 RESERVED_P6 P7 flash, unexpected system power loss can
GPIO_S5_33 RESERVED_P7
K2
GPIO_S5_34
cause an incomplete write resulting in a
K3 R48
M2 GPIO_S5_35 M7 1.24K_0402_1%
corrupt boot sector.
N3 GPIO_S5_36 RESERVED_M7 M12 USB3_REXT0 1 2
P2 GPIO_S5_37 USB3_REXT0
L3 GPIO_S5_38 P10
Reference EDS v1.5 Page2294
GPIO_S5_39 RESERVED_P10 P12
RESERVED_P12
M4
J3 RESERVED_M4 M6
P3 GPIO_S5_40 RESERVED_M6
H3 GPIO_S5_41 D4
GPIO_S5_42 USB3_RXP0 PCH_USB3_RX0_P <22>
B12 E3
GPIO_S5_43 USB3_RXN0 PCH_USB3_RX0_N <22>
K6
USB3 Port 0
M16 USB3_TXP0 K7 PCH_USB3_TX0_P <22>
<22> USB20_P0 K16 USB_DP0 USB3_TXN0 PCH_USB3_TX0_N <22>
USB3.0 Connector <22> USB20_N0 USB_DN0
J14
<22> USB20_P1 G14 USB_DP1
USB Hub <22> USB20_N1 USB_DN1
K12
<16> USB20_P2 J12 USB_DP2
Touch Panel <16> USB20_N2 USB_DN2 BIOS/EFI Top Swap
K10
<16> USB20_P3 H10 USB_DP3 H8
+1.8VALW
Camera <16> USB20_N3 USB_DN3 RESERVED_H8 H7 +1.8VS
RESERVED_H7
R49 1 2 10K_0402_5% USB_OC0# 1K_0402_1% 1 2 R50 ICLK_USB_TERMP D10 Modify R02
ICLK_USB_TERMP
1
R51 1 2 10K_0402_5% USB_OC1# 1K_0402_1% 1 2 R52 ICLK_USB_TERMN F10 H4
C ICLK_USB_TERMN RESERVED_H4 H5 R53 C
RESERVED_H5
10K_0402_5%
C20
<22> USB_OC0# B20 USB_OC_0# / GPIO_S5_19
USB_OC1#
2
USB_OC_1# / GPIO_S5_20 GPIO_S0_SC_56
1
R54 1 2 USB_RCOMP D6 BD12 R55 @
45.3_0402_1% C7 USB_RCOMPO GPIO_S0_SC_55 BC12 GPIO_S0_SC_56
USB_RCOMPI GPIO_S0_SC_56 10K_0402_5%
BD14
@EMC@ GPIO_S0_SC_57 / PCU_UART_TXD BC14
2
C24 2 1 10P_0402_50V8J LPC_CLK_0 R56 1 @ 2 USB_PLL_MON M13 GPIO_S0_SC_58 BF14
0_0402_5% USB_PLL_MON GPIO_S0_SC_59 BD16
GPIO_S0_SC_60 BC16
GPIO_S0_SC_61 / PCU_UART_RXD
NOTE: Ref checklist rev1.2 p.24 BIOS/EFI Top Swap
B4
USB_PLL_MON is a single ended signal and should follow B5 USB_HSIC0_DATA BH12 SOC_SPKR
USB_HSIC0_STROBE ILB_8254_SPKR / GPIO_S0_SC_54 SOC_SPKR <20>
single ended signal routing requirements.
GPIO_S0_SC_56 * 1: DISABLED
E2 0: ENABLED
D2 USB_HSIC1_DATA
NOTE: Ref checklist rev1.2 p.25 USB_HSIC1_STROBE BH22
USB_HSIC_RCOMP must NOT float if they are not being used. SIO_I2C0_DATA / GPIO_S0_SC_78 BG23
1 2 HSIC_RCOMP A7 SIO_I2C0_CLK / GPIO_S0_SC_79
+1.8VS R57 45.3_0402_1% USB_HSIC_RCOMP
BG24
For Touch Screen
RP10 SIO_I2C1_DATA / GPIO_S0_SC_80 BH24 +1.8VS
5 4 PCU_SMB_CLK 49.9_0402_1%1 2 R58 LPC_RCOMP BF18 SIO_I2C1_CLK / GPIO_S0_SC_81 EDP@
6 3 PCU_SMB_DATA BH16 LPC_RCOMP / VGA_RCOMP SOC_I2C5_DATA R59 1 2 2.2K_0402_5%
7 2 PCU_SMB_ALERT# <21,23> LPC_AD0 BJ17 ILB_LPC_AD_0 / GPIO_S0_SC_42 BG25 SOC_I2C2_DATA
8 1 <21,23> LPC_AD1 BJ13 ILB_LPC_AD_1 / GPIO_S0_SC_43 SIO_I2C2_DATA / GPIO_S0_SC_82 BJ25 1
SOC_I2C2_CLK SOC_I2C5_CLK R60 EDP@2 2.2K_0402_5%
<21,23> LPC_AD2 BG14 ILB_LPC_AD_2 / GPIO_S0_SC_44 SIO_I2C2_CLK / GPIO_S0_SC_83
B <21,23> LPC_AD3 BG17 ILB_LPC_AD_3 / GPIO_S0_SC_45 +1.8VS B
2.2K_0804_8P4R_5%
<21,23> LPC_FRAME# ILB_LPC_FRAME# / GPIO_S0_SC_46
EMC@ 22_0402_5% 1 EMC@ 2 R61 LPC_CLK_0 BG15 BG26
<23> LPC_CLK_EC ILB_LPC_CLK_0 / GPIO_S0_SC_47 SIO_I2C3_DATA / GPIO_S0_SC_84
R02 modify 22_0402_5% 1 EMC@ 2 R62 LPC_CLK_1 BH14 BH26
<21> CLK_PCI_TPM LPC_CLKRUN# BG16 ILB_LPC_CLK_1 / GPIO_S0_SC_48 SIO_I2C3_CLK / GPIO_S0_SC_85
<21> LPC_CLKRUN# ILB_LPC_CLKRUN# / GPIO_S0_SC_49
5
BG13
+1.8VS <9> SOC_SERIRQ ILB_LPC_SERIRQ / GPIO_S0_SC_50 BF27
G
SIO_I2C4_DATA / GPIO_S0_SC_86 BG27 SOC_I2C5_DATA 4 3
SIO_I2C4_CLK / GPIO_S0_SC_87 I2C5_SDA_PNL <16>
D
EDP@ Q2A
2
DMN63D8LDW_SOT363-6
5
Pull High at EC side BH28 SOC_I2C5_DATA
G
PCU_SMB_DATA BG12 SIO_I2C5_DATA / GPIO_S0_SC_88 BG28 SOC_I2C5_CLK SOC_I2C5_CLK 1 6
G
3 4 PCU_SMB_CLK BH10 PCU_SMB_DATA / GPIO_S0_SC_51 SIO_I2C5_CLK / GPIO_S0_SC_89 I2C5_SCL_PNL <16>
D
PCU_SMB_CLK EDP@ Q2B
<14,19,23> EC_SMB_CK2 PCU_SMB_CLK / GPIO_S0_SC_52
D
Q4A PCU_SMB_ALERT# BG11 Modify R02 DMN63D8LDW_SOT363-6

PCU_SMB_ALERT# / GPIO_S0_SC_53
2
DMN63D8LDW_SOT363-6 BJ29
SIO_I2C6_DATA / GPIO_S0_SC_90 BG29
G
6 1 PCU_SMB_DATA SIO_I2C6_CLK / GPIO_S0_SC_91 / SD3_WP

<14,19,23> EC_SMB_DA2
D
ILB_LPC_CLK_0 : Output of 25MHz,

Q4B BH30 GPIO_S0_SC_92 T14 @
DMN63D8LDW_SOT363-6 Need Check with EC GPIO_S0_SC_092 BG30 GPIO_S0_SC_93 T15 @
For Touch Pad
6 OF 13 GPIO_S0_SC_093 +1.8VS
ILB_LPC_CLK_1 is for CLK_0 feedback.(Input)
FH8065301546401_FCBGA131170 @ SOC_I2C2_DATA R63 1 2 2.2K_0402_5%
Set to Outpot for Normal Usage PDA (Platform Debug Assistant) Test Points
SOC_I2C2_CLK R64 1 2 2.2K_0402_5%
+3VS +1.8VS
CPU Thermal sensor
1
5
C275
0.1U_0402_16V4Z
G
@ U28 @ SOC_I2C2_DATA 4 3
A EC_SMB_CK2 8 1 2 REMOTE1+ I2C2_SDA_TP <24> A
D
Q3A
SCLK VDD
2
2 DMN63D8LDW_SOT363-6
1
EC_SMB_DA2 7 2 REMOTE1+ C @
G
SDATA D+ @ C276 2 Q22 SOC_I2C2_CLK 1 6
6 3 I2C2_SCL_TP <24>
D
REMOTE1- 2200P_0402_50V7K B MMST3904-7-F_SOT323-3 Q3B
ALERT# D- 1 E Modify R02 DMN63D8LDW_SOT363-6
3
5 4 THERM# 1 @ 2
GND THERM# +3VS
R258 10K_0402_5% REMOTE1-
ADM1032ARMZ-2REEL_MSOP8 2013/04/12 2014/04/12 Title
Modify R03
Issued Date Deciphered Date VLV-M SOC USB/LPC/SMBus
Rev
Custom 1.0
5 4 3 2 1
5 4 3 2 1
D D
+1.35V_SOC +1.35V
12A +SOC_VCC USOC1G 20mil JP1 JP@
AA27 AD38
AA29 CORE_VCC_S0IX_AA27 DRAM_VDD_S4_AD38 AF38
AA30 CORE_VCC_S0IX_AA29 DRAM_VDD_S4_AF38 JUMP_43X118
AC27 CORE_VCC_S0IX_AA30 A48 C25 1 2 1U_0402_6.3V6K JP2 JP@
AC29 CORE_VCC_S0IX_AC27 DRAM_VDD_S4_A48 AK38 C26 1 2 .1U_0402_16V7K
AC30 CORE_VCC_S0IX_AC29 DRAM_VDD_S4_AK38 AM38
CORE_VCC_S0IX_AC30 DRAM_VDD_S4_AM38 AV41 JUMP_43X118
AD27 DRAM_VDD_S4_AV41 AV42
CORE_VCC_S0IX_AD27 DRAM_VDD_S4_AV42
1250mA
AD29 BB46
AD30 CORE_VCC_S0IX_AD29 DRAM_VDD_S4_BB46 BD49
AF27 CORE_VCC_S0IX_AD30 DRAM_VDD_S4_BD49 BD52
C AF29 CORE_VCC_S0IX_AF27 DRAM_VDD_S4_BD52 BD53 C
AG27 CORE_VCC_S0IX_AF29 DRAM_VDD_S4_BD53 BF44 +1.35V_SOC
AG29 CORE_VCC_S0IX_AG27 DRAM_VDD_S4_BF44 BG51
AG30 CORE_VCC_S0IX_AG29 DRAM_VDD_S4_BG51 BJ48 C27 2 1 2.2U_0402_6.3V6M
P26 CORE_VCC_S0IX_AG30 DRAM_VDD_S4_BJ48 C51 C28 2 1 2.2U_0402_6.3V6M
P27 CORE_VCC_S0IX_P26 DRAM_VDD_S4_C51 D44 C29 2 1 2.2U_0402_6.3V6M
U27 CORE_VCC_S0IX_P27 DRAM_VDD_S4_D44 F49 C30 2 1 2.2U_0402_6.3V6M
U29 CORE_VCC_S0IX_U27 DRAM_VDD_S4_F49 F52
V27 CORE_VCC_S0IX_U29 DRAM_VDD_S4_F52 F53
V29 CORE_VCC_S0IX_V27 DRAM_VDD_S4_F53 H46
V30 CORE_VCC_S0IX_V29 DRAM_VDD_S4_H46 M41
Y27 CORE_VCC_S0IX_V30 DRAM_VDD_S4_M41 M42 C31 1 2 10U_0603_6.3V6M
Y29 CORE_VCC_S0IX_Y27 DRAM_VDD_S4_M42 V38 C32 1 2 10U_0603_6.3V6M
Y30 CORE_VCC_S0IX_Y29 DRAM_VDD_S4_V38 Y38
CORE_VCC_S0IX_Y30 DRAM_VDD_S4_Y38
@ T16 TP2_CORE_VCC_S0iX AA22

TP2_CORE_VCC_S0IX
14A +SOC_VNN +1.35VS
420mA
AM22 AG18
AK32 UNCORE_VNN_S3_AM22 ICLK_V1P35_S3_F2_AG18 AJ19
AK30 UNCORE_VNN_S3_AK32 ICLK_V1P35_S3_F1_AJ19
AK29 UNCORE_VNN_S3_AK30
AK27 UNCORE_VNN_S3_AK29 BD1
AK25 UNCORE_VNN_S3_AK27 VGA_V1P35_S3_F1_BD1
AJ24 UNCORE_VNN_S3_AK22 AD36
AJ22 UNCORE_VNN_S3_AJ24 DRAM_V1P35_S0IX_F1_AD36
+SOC_VNN +SOC_VCC AG24 UNCORE_VNN_S3_AJ22 AG32
AG22 UNCORE_VNN_S3_AG24 UNCORE_V1P35_S0IX_F2_AG32 V36
B AF24 UNCORE_VNN_S3_AG22 UNCORE_V1P35_S0IX_F3_V36 U36 B
AF22 UNCORE_VNN_S3_AF24 UNCORE_V1P35_S0IX_F4_U36
UNCORE_VNN_S3_AF22
1
AD22 AA25
AC24 UNCORE_VNN_S3_AD22 UNCORE_V1P35_S0IX_F5_AA25
R67 R68 AC22 UNCORE_VNN_S3_AC24
100_0402_1% 100_0402_1% AA24 UNCORE_VNN_S3_AC22
AD24 UNCORE_VNN_S3_AA24
2
UNCORE_VNN_S3_AD24
AF19 C36 1 2 22U_0805_6.3V6M
BB8 UNCORE_V1P35_S0IX_F6_AF19 AG19 C37 1 2 1U_0402_6.3V6K
<33> VGFX_VSNS P28 UNCORE_VNN_SENSE UNCORE_V1P35_S0IX_F1_AG19 1 2
C38 1U_0402_6.3V6K
<33> VCORE_VSNS N28 CORE_VCC_SENSE_P28 7 OF 13 1 2
C39 1U_0402_6.3V6K
<33> VCORE_GSNS CORE_VSS_SENSE_N28 1 2
C40 1U_0402_6.3V6K
1
C41 1 2 1U_0402_6.3V6K
FH8065301546401_FCBGA131170 @ C42 1 2 1U_0402_6.3V6K
R70 C43 1 2 1U_0402_6.3V6K
100_0402_1% C44 1 2 1U_0402_6.3V6K
C45 1 2 1U_0402_6.3V6K
2
A A

2013/04/12 2014/04/12 Title
Issued Date Deciphered Date VLV-M SOC Power
Rev
Custom 1.0
5 4 3 2 1
5 4 3 2 1
D D
Follow CRBv1.15
USOC1H +1.05VS
325mA 1000mA
U22 AC32
+1.0VALW UNCORE_V1P0_G3_U22 CORE_V1P0_S3_AC32
V22 Y32
C48 1 2 1U_0402_6.3V6K C5 UNCORE_V1P0_G3_V22 CORE_V1P0_S3_Y32
UNCORE_V1P0_G3 1uF*4 C49 1 2 1U_0402_6.3V6K B6 UNCORE_V1P0_G3_C5 AA33
C46 1 2 1U_0402_6.3V6K UNCORE_V1P0_G3_B6 CORE_V1P05_S3_AA33 AF33
C50 1 2 1U_0402_6.3V6K Y19 CORE_V1P05_S3_AF33 AG33 C51 1 2 0.47U_0402_6.3V6K
C3 USB3_V1P0_G3_Y19 CORE_V1P05_S3_AG33 AG35
USB3_V1P0_G3 0.01uF*1 C47 1 2 0.01U_0402_16V7K USB3_V1P0_G3_C3 CORE_V1P05_S3_AG35 U33 C52 1 2 1U_0402_6.3V6K
CORE_V1P05_S3_U33 U35 C53 1 2 1U_0402_6.3V6K CORE_V1P05_S3 1uF*3
CORE_V1P05_S3_U35 V33 1 2 1U_0402_6.3V6K
2750mA CORE_V1P05_S3_V33
C54
V32
+1.0VS SVID_V1P0_S3_V32 +1.8VALW
BJ6
C AD35 VGA_V1P0_S3_BJ6 C
AF35 DRAM_V1P0_S0IX_AD35 U24
C55 1 2 1U_0402_6.3V6K AF36 DRAM_V1P0_S0IX_AF35 UNCORE_V1P8_G3_U24 V25
C56 1 2 1U_0402_6.3V6K AA36 DRAM_V1P0_S0IX_AF36 PCU_V1P8_G3_V25 N20 C57 1 2 1U_0402_6.3V6K PMC_V1P8_G3 1uF*1
DRAM_V1P0_S0iX 1uF*4 1 2 AJ36 DRAM_V1P0_S0IX_AA36 USB_V1P8_G3_N20 U25
C58 1U_0402_6.3V6K
DRAM_V1P0_S0IX_AJ36
65mA PMU_V1P8_G3_U25
C59 1 2 1U_0402_6.3V6K AK35 AA18
AK36 DRAM_V1P0_S0IX_AK35 UNCORE_V1P8_G3_AA18
Y35 DRAM_V1P0_S0IX_AK36 +1.8VS
1 2 Y36 DRAM_V1P0_S0IX_Y35
C60 1U_0402_6.3V6K
DRAM_V1P0_S0IX_Y36
10mA
C61 1 2 1U_0402_6.3V6K AK19 AM30
DDI_V1P0_S0iX 1uF*4 C62 1 2 1U_0402_6.3V6K AK21 DDI_V1P0_S0IX_AK19 UNCORE_V1P8_S3_AM30 AN32 C63 1 2 1U_0402_6.3V6K UNCORE_V1P8_S3 1uF*4
C64 1 2 1U_0402_6.3V6K AJ18 DDI_V1P0_S0IX_AK21 UNCORE_V1P8_S3_AN32 U38 C65 1 2 1U_0402_6.3V6K
AM16 DDI_V1P0_S0IX_AJ18 UNCORE_V1P8_S3_U38 C66 1 2 1U_0402_6.3V6K
AN29 DDI_V1P0_S0IX_AM16 C67 1 2 1U_0402_6.3V6K +1.5VS
AN30 VIS_V1P0_S0IX_AN29
VIS_V1P0_S0IX_AN30
58mA
C68 1 2 22U_0805_6.3V6M V24 AM32
UNCORE_V1P0_S0iX 22uF*3 C69 1 2 22U_0805_6.3V6M Y22 VIS_V1P0_S0IX_V24 HDA_V1P5_S3_AM32 C70 1 2 1U_0402_6.3V6K HDA_LPE_V1P5V1P8_S3 1uF*1
1uF*2 C71 1 2 22U_0805_6.3V6M Y24 VIS_V1P0_S0IX_Y22 +3VALW
C72 1 2 1U_0402_6.3V6K AF16 VIS_V1P0_S0IX_Y24
C73 1 2 1U_0402_6.3V6K AF18 UNCORE_V1P0_S3_AF16 N22 +3VALW_SOC 2 @ 1
UNCORE_V1P0_S3_AF18
Y18
UNCORE_V1P0_S3_Y18
50mA PCU_V3P3_G3_N22 R71 0_0402_5% Modify R02
PCIE_SATA_V1P0_S3 1uF*1 C74 1 2 1U_0402_6.3V6K G1 N18 C75 1 2 .1U_0402_16V7K USB_V3P3_G3 0.1uF*1
UNCORE_V1P0_S3 1uF*1 C76 1 2 1U_0402_6.3V6K AK18 UNCORE_V1P0_S3_G1 USB_V3P3_G3_N18 P18 C77 1 2 1U_0402_6.3V6K USB_ULPI_V1P8_S3 1uF*1
PCIE_V1P0_S3 1uF*1 C78 1 2 1U_0402_6.3V6K AM18 PCIE_V1P0_S3_AK18 USB_V3P3_G3_P18 C79 1 2 1U_0402_6.3V6K PCU_V3P3_G3 1uF*1
VGA_V1P0_S3 1uF*1 C80 1 2 1U_0402_6.3V6K AM21 PCIE_V1P0_S3_AM18 +3VS
USB_V1P0_S3 0.1uF*1 1 2 AN21 PCIE_V1P0_S3_AM21
C81 .1U_0402_16V7K
PCIE_V1P0_S3_AN21
33mA
USB3DEV_V1P0_S3 0.01uF*1 C82 1 2 0.01U_0402_16V7K AN18 AN24 +3VS_SOC 2 1 @
GPIO_V1P0_S3 1uF*1 C83 1 2 1U_0402_6.3V6K AN19 PCIE_SATA_V1P0_S3_AN18 VGA_V3P3_S3_AN24 R72 0_0402_5% Modify R02 VGA_V3P3_S3 1uF*1
SVID_V1P0_S3 1uF*1 C84 1 2 1U_0402_6.3V6K AF21 SATA_V1P0_S3_AN19 AN27 1 2 +3VS
AG21 UNCORE_V1P0_S0IX_AF21 SD3_V1P8V3P3_S3_AN27 C85 1U_0402_6.3V6K
M14 UNCORE_V1P0_S0IX_AG21 AM27 +1.8VS_3.3VS LPC 2 TPM@ 1 +1.8VS
U18 USB_V1P0_S3_M14 LPC_V1P8V3P3_S3_AM27 R73 0_0402_5%
B U19 USB_V1P0_S3_U18 2 NTPM@ 1 B
AN25 USB_V1P0_S3_U19
GPIO_V1P0_S3_AN25
35mA R74 0_0402_5%
V18 1 2
USB_HSIC_V1P2_G3_V18 C86 1U_0402_6.3V6K +1.0VALW
USB_HSIC_V1P2_G3 1uF*1
F1 AD16 C87 1 2 1U_0402_6.3V6K Disable HSIC
RESERVED_F1 VSS_AD16 AD18 @
T17 TP_CORE_V1P05_S4 AF30 VSS_AD18
Pop when use +1.2VALW If the USB HSIC is not used, pin V18 can be connected
TP_CORE_V1P05_S4_AF30
@ to either +V1P2A or +V1P0A.
8 OF 13
FH8065301546401_FCBGA131170 @
A A

VLV-M SOC Power
Rev
Custom 1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
USOC1I USOC1J USOC1K USOC1L USOC1M
A11 AC36 AG38 AH47 AT24 AY36 BF30 E8 K9 U3

A15 VSS_A11 VSS_AC36 AC38 AH4 VSS_AG38 VSS_AH47 AH48 AT27 VSS_AT24 VSS_AY36 AY4 BF36 VSS_BF30 VSS_E8 F19 L13 VSS_K9 VSS_U3 U30
A19 VSS_A15 VSS_AC38 AD19 AH41 VSS_AH4 VSS_AH48 AH50 AT30 VSS_AT27 VSS_AY4 AY50 BF4 VSS_BF36 VSS_F19 F2 L19 VSS_L13 VSS_U30 U32
A23 VSS_A19 VSS_AD19 AD21 AH45 VSS_AH41 VSS_AH50 AH51 AT35 VSS_AT30 VSS_AY50 AY9 BG31 VSS_BF4 VSS_F2 F24 L27 VSS_L19 VSS_U32 U40
A27 VSS_A23 VSS_AD21 AD25 AH7 VSS_AH45 VSS_AH51 AH6 AT38 VSS_AT35 VSS_AY9 BA14 BG34 VSS_BG31 VSS_F24 F27 L35 VSS_L27 VSS_U40 U42
A31 VSS_A27 VSS_AD25 AD32 AH9 VSS_AH7 VSS_AH6 AM44 AT4 VSS_AT38 VSS_BA14 BA19 BG39 VSS_BG34 VSS_F27 F30 M19 VSS_L35 VSS_U42 U43
A35 VSS_A31 VSS_AD32 AD33 AJ1 VSS_AH9 VSS_AM44 AM51 AT47 VSS_AT4 VSS_BA19 BA22 BG42 VSS_BG39 VSS_F30 F35 M26 VSS_M19 VSS_U43 U45
A39 VSS_A35 VSS_AD33 AD47 AJ16 VSS_AJ1 VSS_AM51 AM7 AT52 VSS_AT47 VSS_BA22 BA27 BG45 VSS_BG42 VSS_F35 F5 M27 VSS_M26 VSS_U45 U46
A43 VSS_A39 VSS_AD47 AD7 AJ21 VSS_AJ16 VSS_AM7 AN1 AU1 VSS_AT52 VSS_BA27 BA32 BG49 VSS_BG45 VSS_F5 F7 M34 VSS_M27 VSS_U46 U48
A47 VSS_A43 VSS_AD7 AE1 AJ25 VSS_AJ21 VSS_AN1 AN11 AU24 VSS_AU1 VSS_BA32 BA35 BJ11 VSS_BG49 VSS_F7 G10 M35 VSS_M34 VSS_U48 U49
AA1 VSS_A47 VSS_AE1 AE11 AJ27 VSS_AJ25 VSS_AN11 AN12 AU3 VSS_AU24 VSS_BA35 BA40 BJ15 VSS_BJ11 VSS_G10 G20 M38 VSS_M35 VSS_U49 U5
AA16 VSS_AA1 VSS_AE11 AE12 AJ29 VSS_AJ27 VSS_AN12 AN14 AU30 VSS_AU3 VSS_BA40 BA53 BJ19 VSS_BJ15 VSS_G20 G22 M47 VSS_M38 VSS_U5 U51
AA19 VSS_AA16 VSS_AE12 AE14 AJ3 VSS_AJ29 VSS_AN14 AN22 AU38 VSS_AU30 VSS_BA53 BB19 BJ23 VSS_BJ19 VSS_G22 G26 M51 VSS_M47 VSS_U51 U53
AA21 VSS_AA19 VSS_AE14 AE3 AJ30 VSS_AJ3 VSS_AN22 AN3 AU51 VSS_AU38 VSS_BB19 BB27 BJ27 VSS_BJ23 VSS_G26 G28 N1 VSS_M51 VSS_U53 U6
AA3 VSS_AA21 VSS_AE3 AE4 AJ32 VSS_AJ30 VSS_AN3 AN33 AV12 VSS_AU51 VSS_BB27 BB35 BJ31 VSS_BJ27 VSS_G28 G32 N16 VSS_N1 VSS_U6 U8
AA32 VSS_AA3 VSS_AE4 AE40 AJ33 VSS_AJ32 VSS_AN33 AN35 AV13 VSS_AV12 VSS_BB35 BC20 BJ35 VSS_BJ31 VSS_G32 G34 N38 VSS_N16 VSS_U8 U9
AA35 VSS_AA32 VSS_AE40 AE42 AJ35 VSS_AJ33 VSS_AN35 AN36 AV14 VSS_AV13 VSS_BC20 BC22 BJ39 VSS_BJ35 VSS_G34 G42 N51 VSS_N38 VSS_U9 V12
AA38 VSS_AA35 VSS_AE42 AE43 AJ38 VSS_AJ35 VSS_AN36 AN38 AV18 VSS_AV14 VSS_BC22 BC26 BJ43 VSS_BJ39 VSS_G42 H19 P13 VSS_N51 VSS_V12 V16
AA53 VSS_AA38 VSS_AE43 AE45 AJ53 VSS_AJ38 VSS_AN38 AN40 AV19 VSS_AV18 VSS_BC26 BC28 BJ47 VSS_BJ43 VSS_H19 H27 P16 VSS_P13 VSS_V16 V19
AB10 VSS_AA53 VSS_AE45 AE46 AK10 VSS_AJ53 VSS_AN40 AN42 AV24 VSS_AV19 VSS_BC28 BC32 BJ7 VSS_BJ47 VSS_H27 H35 P19 VSS_P16 VSS_V19 V21
AB4 VSS_AB10 VSS_AE46 AE48 AK14 VSS_AK10 VSS_AN42 AN43 AV27 VSS_AV24 VSS_BC32 BC34 C14 VSS_BJ7 VSS_H35 J1 P20 VSS_P19 VSS_V21 V35
AB41 VSS_AB4 VSS_AE48 AE50 AK16 VSS_AK14 VSS_AN43 AN45 AV30 VSS_AV27 VSS_BC34 BC42 C31 VSS_C14 VSS_J1 J16 P24 VSS_P20 VSS_V35 V40
AB45 VSS_AB41 VSS_AE50 AE51 AK33 VSS_AK16 VSS_AN45 AN46 AV35 VSS_AV30 VSS_BC42 BD19 C34 VSS_C31 VSS_J16 J19 P32 VSS_P24 VSS_V40 V44
AB47 VSS_AB45 VSS_AE51 AE53 AK41 VSS_AK33 VSS_AN46 AN48 AV38 VSS_AV35 VSS_BD19 BD24 C39 VSS_C34 VSS_J19 J22 P35 VSS_P32 VSS_V44 V51
AB48 VSS_AB47 VSS_AE53 AE6 AK44 VSS_AK41 VSS_AN48 AN49 AV47 VSS_AV38 VSS_BD24 BD27 C42 VSS_C39 VSS_J22 J27 P38 VSS_P35 VSS_V51 V7
AB50 VSS_AB48 VSS_AE6 AE8 AM12 VSS_AK44 VSS_AN49 AN5 AV51 VSS_AV47 VSS_BD27 BD30 C45 VSS_C42 VSS_J27 J32 P4 VSS_P38 VSS_V7 Y10
AB51 VSS_AB50 VSS_AE8 AE9 AM19 VSS_AM12 VSS_AN5 AN51 AV7 VSS_AV51 VSS_BD30 BD35 C49 VSS_C45 VSS_J32 J35 P47 VSS_P4 VSS_Y10 Y14
AB6 VSS_AB51 VSS_AE9 AF10 AM24 VSS_AM19 VSS_AN51 AN53 AW13 VSS_AV7 VSS_BD35 BE19 D12 VSS_C49 VSS_J35 J40 P52 VSS_P47 VSS_Y14 Y16
AC16 VSS_AB6 VSS_AF10 AF12 AM25 VSS_AM24 VSS_AN53 AN6 AW19 VSS_AW13 VSS_BE19 BE2 D16 VSS_D12 VSS_J40 J53 P9 VSS_P52 VSS_Y16 Y21
B AC18 VSS_AC16 VSS_AF12 AF25 AM29 VSS_AM25 VSS_AN6 AN8 AW27 VSS_AW19 VSS_BE2 BE35 D24 VSS_D16 VSS_J53 K14 T40 VSS_P9 VSS_Y21 Y25 B
AC19 VSS_AC18 VSS_AF25 AF32 AM33 VSS_AM29 VSS_AN8 AN9 AW3 VSS_AW27 VSS_BE35 BE8 D30 VSS_D24 VSS_K14 K22 U1 VSS_T40 VSS_Y25 Y33
AC21 VSS_AC19 VSS_AF32 AF47 AM35 VSS_AM33 VSS_AN9 AP40 AW35 VSS_AW3 VSS_BE8 BF12 D36 VSS_D30 VSS_K22 K32 U11 VSS_U1 VSS_Y33 Y41
AC25 VSS_AC21 VSS_AF47 AG16 AM36 VSS_AM35 VSS_AP40 AT12 AY10 VSS_AW35 VSS_BF12 BF16 D38 VSS_D36 VSS_K32 K36 U12 VSS_U11 VSS_Y41 Y44
AC33 VSS_AC25 VSS_AG16 AG25 AM40 VSS_AM36 VSS_AT12 AT16 AY22 VSS_AY10 VSS_BF16 BF24 E19 VSS_D38 VSS_K36 K4 U14 VSS_U12 VSS_Y44 Y7
AC35 VSS_AC33 VSS_AG25 AG36 M28 VSS_AM40 VSS_AT16 AT19 AY32 VSS_AY22 VSS_BF24 BF38 E35 VSS_E19 VSS_K4 K50 U21 VSS_U14 VSS_Y7 Y9
B2 VSS_AC35 9 OF 13VSS_AG36 B52 VSS_M28 10 OF 13 VSS_AT19 VSS_AY32 11 OF 13
VSS_BF38 VSS_E35 12 OF 13 VSS_K50 VSS_U21 13 OF 13 VSS_Y9
A6 VSS_B2 VSS_B52 B53
A52 VSS_A6 VSS_B53 BE1 FH8065301546401_FCBGA131170 FH8065301546401_FCBGA131170 FH8065301546401_FCBGA131170 FH8065301546401_FCBGA131170
A51 VSS_A52 VSS_BE1 BE53 @ @ @ @
A5 VSS_A51 VSS_BE53 BG1
A49 VSS_A5 VSS_BG1 BJ2
A3 VSS_A49 VSS_BJ2 BJ3
BH53 VSS_A3 VSS_BJ3 BJ5
BH52 VSS_BH53 VSS_BJ5 BJ49
BG53 VSS_BH1 VSS_BJ52 C1
E53 VSS_BG53 VSS_C1 C53
VSS_E53 VSS_C53 E1
VSS_E1
U16
AN16 USB_VSSA_U16
VSSA_AN16
FH8065301546401_FCBGA131170
@
A A

2013/04/12 2014/04/12 Title
Issued Date Deciphered Date VLV-M SOC GND
5 4 3 2 1
A B C D E
+DDR_A_VREF_DQ +1.35V_L CONN@ +1.35V_L

JDIMM1
1 2
3 VREF_DQ VSS 4 DDR_A_D4
5 VSS DQ4 6 DDR_A_DQS#[0..7] <6>
DDR_A_D0 DDR_A_D5
DDR_A_D1 7 DQ0 DQ5 8
9 DQ1 VSS 10 DDR_A_DQS#0 DDR_A_DQS[0..7] <6>
DDR_A_DM0 11 VSS DQS0# 12 DDR_A_DQS0
13 DM0 DQS0 14 DDR_A_D[0..63] <6>
DDR_A_D2 15 VSS VSS 16 DDR_A_D6
DDR_A_D3 17 DQ2 DQ6 18 DDR_A_D7 DDR_A_MA[0..15] <6>
19 DQ3 DQ7 20
DDR_A_D8 21 VSS VSS 22 DDR_A_D12 DDR_A_DM[0..7] <6>
DDR_A_D9 23 DQ8 DQ12 24 DDR_A_D13
1 25 DQ9 DQ13 26 1
DDR_A_DQS#1 27 VSS VSS 28 DDR_A_DM1
DDR_A_DQS1 29 DQS1# DM1 30
DQS1 RESET# DDR_A_RST# <6>
31 32
DDR_A_D11 35 DQ10 DQ14 36 DDR_A_D15
37 DQ11 DQ15 38
DDR_A_D16 39 VSS VSS 40 DDR_A_D20 DDR_A_RST# 1 2
DDR_A_D17 41 DQ16 DQ20 42 DDR_A_D21 C88
43 DQ17 DQ21 44 .1U_0402_16V7K
DDR_A_DQS2 47 DQS2# DM2 48 FOR EMI/ESD Require 01/15
49 DQS2 VSS 50 DDR_A_D22
DDR_A_D18 51 VSS DQ22 52 DDR_A_D23
DDR_A_D19 53 DQ18 DQ23 54
55 DQ19 VSS 56 DDR_A_D28
All VREF traces should DDR_A_D24 57 VSS DQ28 58 DDR_A_D29
have 10 mil trace width DDR_A_D25 59 DQ24 DQ29 60
61 DQ25 VSS 62 DDR_A_DQS#3
DDR_A_DM3 63 VSS DQS3# 64 DDR_A_DQS3
65 DM3 DQS3 66
DQ26 DQ30 Signal voltage level = 0.675 V
DDR_A_D27 69 70 DDR_A_D31
71 DQ27 DQ31 72 PLACE TWO 4.7K RESISTORS CLOSE TO
VSS VSS
DIMMS ON DIMM_VREF_CA / DIMM_VREF_DQ
73 74 Decoupling caps are needed; one 0.1 F placed close to VREF pins of each DDR3 SODIMM.
<6> DDR_A_CKE0 CKE0 CKE1 DDR_A_CKE2 <6>
75 76
77 VDD VDD 78 DDR_A_MA15
79 NC A15 80 DDR_A_MA14
<6> DDR_A_BS2 BA2 A14 +1.35V_L +DDR_A_VREF_DQ
81 82
DDR_A_MA12 83 VDD VDD 84 DDR_A_MA11
2 DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7 1 2 2
87 A9 A7 88 R75
DDR_A_MA8 89 VDD VDD 90 DDR_A_MA6 4.7K_0402_1%
A8 A6 1
DDR_A_MA5 91 92 DDR_A_MA4 1 2
93 A5 A4 94 R76 C89
DDR_A_MA3 95 VDD VDD 96 DDR_A_MA2 4.7K_0402_1%
A3 A2 .1U_0402_16V7K
DDR_A_MA1 97 98 DDR_A_MA0 2
99 A1 A0 100
101 VDD VDD 102
<6> DDR_A_CLK0 CK0 CK1 DDR_A_CLK2 <6>
103 104
<6> DDR_A_CLK0# CK0# CK1# DDR_A_CLK2# <6>
105 106
DDR_A_MA10 107 VDD VDD 108 +1.35V_L +DDR_A_VREF_CA
A10/AP BA1 DDR_A_BS1 <6>
109 110
<6> DDR_A_BS0 BA0 RAS# DDR_A_RAS# <6>
111 112 1 2
113 VDD VDD 114 R77
<6> DDR_A_WE# WE# S0# DDR_A_CS0# <6>
115 116 4.7K_0402_1% 1
<6> DDR_A_CAS# CAS# ODT0 DDR_A_ODT0 <6>
117 118 1 2
DDR_A_MA13 119 VDD VDD 120 R78 C90
121 A13 ODT1 122 DDR_A_ODT2 <6>
<6> DDR_A_CS2# 4.7K_0402_1% .1U_0402_16V7K
123 S1# NC 124 2
125 VDD VDD 126
TEST VREF_CA +DDR_A_VREF_CA
127 128
DDR_A_D33 131 DQ32 DQ36 132 DDR_A_D37
133 DQ33 DQ37 134
DDR_A_DQS4 137 DQS4# DM4 138
139 DQS4 VSS 140 DDR_A_D38
Layout Note:
DDR_A_D34 141 VSS DQ38 142 DDR_A_D39 Place near JDIMM1
DDR_A_D35 143 DQ34 DQ39 144 Modify R02
145 DQ35 VSS 146 DDR_A_D44
DDR_A_D40 147 VSS DQ44 148 DDR_A_D45 +1.35V_L +1.35VP
3 DDR_A_D41 149 DQ40 DQ45 150 +1.35V +1.35V_L +1.35V_L 3
151 DQ41 VSS 152 DDR_A_DQS#5 1 2
DDR_A_DM5 153 VSS DQS5# 154 DDR_A_DQS5 2 1 C91 1 2 10U_0603_6.3V6M L22
155 DM5 DQS5 156 L21 C92 1 2 10U_0603_6.3V6M HCB2012KF-221T50_0805
DDR_A_D42 157 VSS VSS 158 DDR_A_D46 HCB2012KF-121T50_0805 C93 1 2 10U_0603_6.3V6M EMC@
DDR_A_D43 159 DQ42 DQ46 160 DDR_A_D47 EMC@ C94 1 2 10U_0603_6.3V6M
161 DQ43 DQ47 162
DDR_A_D49 165 DQ48 DQ52 166 DDR_A_D53 C95 1 2 .1U_0402_16V7K
167 DQ49 DQ53 168 C96 1 2 .1U_0402_16V7K
DDR_A_DQS#6 169 VSS VSS 170 DDR_A_DM6 C97 1 2 .1U_0402_16V7K
DDR_A_DQS6 171 DQS6# DM6 172 C98 1 2 .1U_0402_16V7K
173 DQS6 VSS 174 DDR_A_D54 C99 1 2 .1U_0402_16V7K
DDR_A_D50 175 VSS DQ54 176 DDR_A_D55 C100 1 2 .1U_0402_16V7K
DDR_A_D51 177 DQ50 DQ55 178 C101 1 2 .1U_0402_16V7K
179 DQ51 VSS 180 DDR_A_D60 C102 1 2 .1U_0402_16V7K
DDR_A_D56 181 VSS DQ60 182 DDR_A_D61
DDR_A_D57 183 DQ56 DQ61 184
185 DQ57 VSS 186 DDR_A_DQS#7
DDR_A_DM7 187 VSS DQS7# 188 DDR_A_DQS7 +0.675VS
189 DM7 DQS7 190
DDR_A_D58 191 VSS VSS 192 DDR_A_D62 C103 1 2 10U_0603_6.3V6M
DDR_A_D59 193 DQ58 DQ62 194 DDR_A_D63
195 DQ59 DQ63 196
197 VSS VSS 198 C104 1 2 1U_0402_6.3V6K
199 SA0 EVENT# 200 C105 1 2 1U_0402_6.3V6K
+3VS VDDSPD SDA EC_SMB_DA2 <10,19,23>
201 202
203 SA1 SCL 204 EC_SMB_CK2 <10,19,23>
+0.675VS VTT VTT +0.675VS
205 206
GND1 GND2
2
1 R79 R80 207 208

BOSS1 BOSS2
Channel A
0_0402_5%
0_0402_5%
4 C106 @ @ 4
.1U_0402_16V7K LCN_DAN06-K4406-0100
Layout Note:
2
Part Number = SP07000WM10 Place near JDIMM1.203,204
1
FOX_AS0A621-H2R6-7H_204P
<Address: SA1:SA0=00 (A0H)> Security Classification Compal Secret Data Compal Electronics, Inc.
2013/04/12 2014/04/12 Title
Issued Date Deciphered Date DDR3L DIMMA
DIMM_1 STD H:4mm THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
A B C D E
A B C D E
LVDS Translator - RTD2132N
1 1
Close to Pin3 Close to L2 Close to Pin13 Close to Pin18 Close to L3 Close to Pin27 Close to Pin7
+DP_V33 +SWR_VDD +1.2V_TL
+3VS +3VS_TL
10U_0603_6.3V6M
C107
0.1U_0402_16V4Z
C108
0.1U_0402_16V4Z
C109
10U_0603_6.3V6M
C110
0.1U_0402_16V4Z
C111
22U_0805_6.3V6M
C112
0.1U_0402_16V4Z
C113
0.1U_0402_16V4Z
C114
10U_0603_6.3V6M
C115
0.1U_0402_16V4Z
C116
0.1U_0402_16V4Z
C117
0.1U_0402_16V4Z
C118
1 1 1 1 1 1 1 1 1 1 1 1
30mil 2 LVDS@ 1
30mil
LVDS@
LVDS@
LVDS@
LVDS@
LVDS@
LVDS@
LVDS@
LVDS@
LVDS@
LVDS@
LVDS@
LVDS@
R81 0_0603_5%
2 2 2 2 2 2 2 2 2 2 2 2
2 2
+3VS_TL +3VS_TL
U9 RP11
LVDS@ 19 TXOUT_CLK+ TXOUT_CLK+ <16> LVDS_SCL 1 8
L1 2 1 +DP_V33 TXEC+
40mil 3 DP_V33 TXEC-
20 TXOUT_CLK- TXOUT_CLK- <16> LVDS_SDA 2 7
HCB2012KF-221T30_0805 EC_SMB_CK3 3 6
LVDS@ 60mil13 SWR_VDD TXE2+
21 TXOUT2+ TXOUT2+ <16> EC_SMB_DA3 4 5
+1.2V_TL
Power
+3VS_TL L2 2 1 +SWR_VDD 18 22 TXOUT2- TXOUT2- <16>
LVDS
HCB2012KF-221T30_0805 PVCC TXE2- 2.2K_0804_8P4R_5%
L3 1 LVDS@ 2 +1.2V_TL_OUT 60mil12 23 TXOUT1+ TXOUT1+ <16> LVDS@
4.7UH_PG031B-4R7MS_1.1A_20% 11 SWR_LX TXE1+ 24 TXOUT1-
60mil 27 SWR_VCCK TXE1- TXOUT1- <16>
R02 modify
+1.2V_TL VCCK
7 25 TXOUT0+ TXOUT0+ <16>
DP_V12 TXE0+ 26
60mil TXE0-
TXOUT0- TXOUT0- <16> +3VS_TL
LVDS@ RTD2132N
<16,7> EDP_AUXP C134 1 2 0.1U_0402_16V7K EDP_AUXP_C_TL 2
AUX_P
2
C133 1 2 0.1U_0402_16V7K EDP_AUXN_C_TL 1 DP-IN 14
GPIO
<16,7> EDP_AUXN AUX_N GPIO(PWM OUT) TL_INVT_PWM <16> R85
LVDS@ LVDS@ 15 R84
GPIO(Panel_VCC) TL_ENVDD <16> 4.7K_0402_5% 4.7K_0402_5%
C135 1 2 0.1U_0402_16V7K EDP_TXP0_C_TL 5 16
<16,7> EDP_TXP0 LANE0P GPIO(PWM IN) INVT_PWM_SOC <16,7>
C136 1 2 0.1U_0402_16V7K EDP_TXN0_C_TL 6 17 @ LVDS@
<16,7> EDP_TXN0 LANE0N GPIO(BL_EN) TL_BKOFF# <16>
LVDS@
1
EC_SMB_CK3 9 LVDS 29 LVDS_SCL LVDS_SCL <16> MODE_CFG0
<23> EC_SMB_CK3 CIICSCL1 MIICSCL1
EC_SMB_DA3 10 28 LVDS_SDA MODE_CFG1
<23> EC_SMB_DA3 CIICSDA1 EDID MIICDA1 LVDS_SDA <16>
Other
2
<16> EDP_HPD R82 1 2 1K_0402_5% TL_HPD 32 ROM 31 MODE_CFG1 R86 R87
LVDS@ HPD MODE_CFG1 30 MODE_CFG0 4.7K_0402_5% 4.7K_0402_5%
8 MODE_CFG0 LVDS@ @
3 4 DP_REXT 33 3
1
DP_GND GND
2
LVDS@
R83 RTD2132N-CGT_QFN32_5X5
12K_0402_1% LVDS@
Modify R02,U9 Link CIS symbol
1
MODE_CFG0(PIN30)
0 1
0 X EP MODE
MODE_CFG1(PIN31)
1 ROM ONLY MODE* EEPROM MODE
4 4
Security Classification Compal Secret Data

LVDS Translator - RTD2132N
Custom 1.0
A B C D E
A B C D E
Place closed to JLVDS1

+3VS +LCDVDD
LCD POWER CIRCUIT 1 1

LCD/ LED PANEL Conn.
C119 C120
SM010014520 3000ma 0.1U_0402_16V4Z
0.1U_0402_16V4Z @
220ohm@100mhz 2 2
+3VS +LCDVDD DCR 0.04 R88 2 @ 1 0_0402_5%
1 U10 EMC@ <BOM Structure> 1
1
W=60mils B+ +INVPWR_B+
L4
5 VOUT HCB2012KF-221T30_2P JEDP1
VIN W=60mils 1 2
W=60mils W=60mils 1
1 +INVPWR_B+ 1
2 2 41
4 GND C121 3 2 G1 42
VIN 1 1 3 G2
1 4.7U_0603_6.3V6K @EMC@ @EMC@ 4 43
3 2 C122 C123 5 4 G3 44
C124 EN 68P_0402_50V8J 1000P_0402_50V7K INVTPWM 6 5 G4 45
1U_0402_6.3V6K G5243AT11U_SOT23-5 2 2 DISPOFF# 7 6 G5 46
2 EDP_HPD 8 7 G6
9 8
+LCDVDD 9
10
TS_EN 11 10
1 EDP@ 2 0_0402_5% <23> TS_EN TXOUT_CLK+ 12 11
R89
<7> ENVDD <15> TXOUT_CLK+ 13 12
TXOUT_CLK-
1 LVDS@ 2 0_0402_5% <15> TXOUT_CLK- TXOUT2+ 14 13
R90
<15> TL_ENVDD <15> TXOUT2+ TXOUT2- 15 14
<15> TXOUT2- 16 15
TS_RST#
<23> TS_RST# TXOUT1+ 17 16
<15> TXOUT1+ 18 17
TXOUT1-
<15> TXOUT1- TXOUT0+ 19 18
<15> TXOUT0+ TXOUT0- 20 19
<15> TXOUT0- I2C_SDA 21 20
I2C_SCL 22 21
23 22
+3VS 23
EDP@ 24
R97 1 EDP@ 2 0_0402_5% C125 1 2 .1U_0402_16V7K EDP_AUXN_C 25 24
<15,7> EDP_AUXN 25
<15,7> EDP_AUXP C126 1 2 .1U_0402_16V7K EDP_AUXP_C 26
EDP@ EDP@ 27 26
C128 1 2 .1U_0402_16V7K EDP_TXP0_C 28 27
+3VS <15,7> EDP_TXP0 28
C129 1 2 .1U_0402_16V7K EDP_TXN0_C 29
2 <15,7> EDP_TXN0 30 29 2
EDP@ EDP@
30
5
PU to +3VS at CPU side 10mils C131 1 2 .1U_0402_16V7K EDP_TXP1_C 31
2 <7> EDP_TXP1 31
EC_BKOFF# C132 1 2 .1U_0402_16V7K EDP_TXN1_C 32
P
1 EDP@ 2 0_0402_5% <23> EC_BKOFF# B 4 <7> EDP_TXN1 33 32
10mils<15,7> R92 INVTPWM DISPOFF# EDP@ TS_INT#
INVT_PWM_SOC TL_BKOFF# 1 Y 34 33
<15> TL_BKOFF# A +5VS_TS 34
G
2 USB20_P2_TS 35
35
2
2
10mils R93 1 LVDS@ 2 0_0402_5% U11 2 Modify R03 USB20_N2_TS 36
<15> TL_INVT_PWM
3
R94 C127 TC7SZ08FU SSOP 5P AND R95 2 @ 1 +3VS_Camcra 37 36
+3VS 37
100K_0402_5% 220P_0402_50V7K LVDS@ 100K_0402_5% C130 R96 0_0402_5% USB20_P3 38
1 <10> USB20_P3 USB20_N3 39 38
@ @EMC@ @ 220P_0402_50V7K
1 <10> USB20_N3 40 39
For reserve forfixed Voltage level. For reserve forfixed Voltage level. @EMC@
1
1
40
3
E-T_0871K-F40N-00L
SP010011Z00
D13
EDP_AUXN_C R99 2 @ 1 100K_0402_5% @EMC@
+LCDVDD
YSLC05CH_SOT23-3
1
EDP_AUXP_C 1 @ 2 100K_0402_5%
R100
Modify R02
Intel recommends having a pull-up resistor of 100 k for

AUXN and a pull-down resistor of 100 k for AUXP between
the AC capacitor and the connector, to assist source
detection by the sink device.
All reverse on before project.
3 3
For Select LVDS EDID or EDP I2C touch Touch Modify R02
+1.8VS +5VS_TS
1 @ 2
R107 0_0402_5%
1
+5VS +5VS_TS R101 2 ETS@ 1 2.2K_0402_5% I2C5_SDA_PNL

L5
R103 R102 2 ETS@ 1 2.2K_0402_5% I2C5_SCL_PNL USB20_P2 2 1 USB20_P2_TS
<10> USB20_P2 2 1
10K_0402_5% R105 1 TS@ 2 0_0603_5%
R104 1 TS@ 2 10K_0402_5% TS_INT#
2
USB20_N2 3 4 USB20_N2_TS
<7> EDP_HPD# <10> USB20_N2 3 4
1
R106 1 TS@ 2 10K_0402_5% TS_RST# WCM2012F2SF-670T04_0805

D @EMC@
Q6 2 EDP_HPD EDP_HPD <15>
2N7002K_SOT23-3 G 1 @ 2
1
S R108 0_0402_5%
3
R109
100K_0402_5%
2
R111 1 LVDS@ 2 0_0402_5% I2C_SDA

<15> LVDS_SDA
R112 1 LVDS@ 2 0_0402_5% I2C_SCL Solution Panel Touch BOM option
<15> LVDS_SCL
R113 1 ETS@ 2 0_0402_5%

Cable 1 eDP I2C,USB EDP@,TS@
<10> I2C5_SDA_PNL
+1.8VS R114 1 ETS@ 2 0_0402_5%
<10> I2C5_SCL_PNL
4 Cable 2 LVDS USB LVDS@ 4
1
TS@ R117
10K_0402_5%
2
G

2
TS_INT_R# 3 1 TS_INT#
<9> TS_INT_R#
S

TS@ Q7
MESS138W-G_SOT323-3
eDP CONN.
Rev
Custom 1.0
A B C D E
A B C D E
Modify R02,R-SHORT R118~R125
W=40mils R118 2 @ 1 0_0402_5%

+5VS +HDMI_5V_OUT
WCM-2012-900T_0805
HDMI_C_CLK- 1 2 HDMI_R_CK-
U12 1 2
1 3 HDMI_C_CLK+ 4 3 HDMI_R_CK+ 1
OUT L6 4 3 @
1
1
IN C137 R119 2 @ 1 0_0402_5%
2 .1U_0402_16V7K
GND 2
AP2330W-7_SC59-3 R120 2 @ 1 0_0402_5%
WCM-2012-900T_0805
HDMI_C_TX0- 4 3 HDMI_R_D0-
4 3
HDMI_C_TX0+ 1 2 HDMI_R_D0+
L7 1 2 @
R121 2 @ 1 0_0402_5%
C138 2 1 .1U_0402_16V7K HDMI_C_TX1-

<7> HDMI_TX1-
C139 2 1 .1U_0402_16V7K HDMI_C_TX1+
<7> HDMI_TX1+
C140 2 1 .1U_0402_16V7K HDMI_C_TX2- R122 2 @ 1 0_0402_5%
<7> HDMI_TX2-
C141 2 1 .1U_0402_16V7K HDMI_C_TX2+
<7> HDMI_TX2+
WCM-2012-900T_0805
C142 2 1 .1U_0402_16V7K HDMI_C_TX0- HDMI_C_TX1- 1 2 HDMI_R_D1-
<7> HDMI_TX0- 1 2
C143 2 1 .1U_0402_16V7K HDMI_C_TX0+
<7> HDMI_TX0+
C144 2 1 .1U_0402_16V7K HDMI_C_CLK-
<7> HDMI_CLK-
C145 2 1 .1U_0402_16V7K HDMI_C_CLK+ HDMI_C_TX1+ 4 3 HDMI_R_D1+
<7> HDMI_CLK+ 4 3 @
L8
R123 2 @ 1 0_0402_5%
2 2
R124 2 @ 1 0_0402_5%
+1.8VS WCM-2012-900T_0805
RP12 4 3
HDMI_C_TX2- HDMI_R_D2-
HDMI_DDCDATA 5 4 +HDMI_5V_OUT 4 3
HDMI_DDCCLK 6 3
HDMI_SDATA 7 2 HDMI_C_TX2+ 1 2 HDMI_R_D2+
HDMI_SCLK 8 1 L9 1 2 @
2.2K_0804_8P4R_5% R125 2 @ 1 0_0402_5%
+1.8VS
HDMI_C_TX1- R126 1 2 619_0402_1%

HDMI_C_TX1+ R127 1 2 619_0402_1%
5
HDMI_C_TX2- R128 1 2 619_0402_1%

HDMI_C_TX2+ R129 1 2 619_0402_1%
G
4 3 HDMI_SCLK
HDMI_GND
<7> HDMI_DDCCLK 1 2
S
Q8A HDMI_C_TX0- R130 619_0402_1%

2
DMN63D8LDW_SOT363-6 HDMI_C_TX0+ R131 1 2 619_0402_1%

HDMI_C_CLK- R132 1 2 619_0402_1%
G
1 6 HDMI_SDATA HDMI_C_CLK+ R133 1 2 619_0402_1%

<7> HDMI_DDCDATA
S
Q8B
DMN63D8LDW_SOT363-6
3 3
3
5
D
+3VS
G
Q9A
S DMN65D8LDW-7 2N SOT363-6
4
+1.8VS
1
R134 HDMI connector

10K_0402_5% JHDMI1
HDMI_HPD 19
18 HP_DET
+HDMI_5V_OUT
2
17 +5V
<7> HDMI_HPD# DDC/CEC_GND
HDMI_SDATA 16
SDA
6
HDMI_SCLK 15
Q9B
D
G 2 HDMI_HPD 14 SCL
Utility
3
DMN65D8LDW-7 2N SOT363-6 S 13
CEC
1
HDMI_R_CK- 12
1
R135 11 CK-
HDMI_R_CK+ 10 CK_shield
100K_0402_5% CK+
HDMI_R_D0- 9
8 D0-
2
D3 HDMI_R_D0+ 7 D0_shield
@EMC@ HDMI_R_D1- 6 D0+
YSLC05CH_SOT23-3 5 D1-
1
HDMI_R_D1+ 4 D1_shield 20
HDMI_R_D2- 3 D1+ GND 21
ZZZ 2 D2- GND 22
Reserved for ESD HDMI_R_D2+ 1 D2_shield GND 23
4 D2+ GND 4
ACON_HMR2J-AK120C
CONN@ DC021201210 symbol,
ACON_HMR2J-AK120C_19P-T
HDMI_ROYALTY pop DC232003E00
ROYALTY HDMI W/LOGO+HDCP DC021201210
RO0000003HM
45@
HDMI CONN.
Rev
Custom 1.0
A B C D E
A B C D E
+3VALW +3V_LAN
JP10@
1 2
W=60mils 1 2 W=60mils
JUMP_43X39 ( Should be place within 200 mils ) Close to Pin 3,8,22,30
U19 @ Close to U20 Pin23 Close to Pin 24 1uF reserved for Pin 22 Close to Pin 11,32
1 1 1
5 OUT
IN
SWR mode W=60mils
2 +3V_LAN
4 GND +LAN_VDD +3V_LAN
IN W=60mils W=60mils
2 From EC L13
3 +REGOUT 1 2
@ C188 EN 2.2UH +-5% NLC252018T-2R2J-N
C193
1U_0402_6.3V6K
C194
0.1U_0402_16V7K
C195
0.1U_0402_16V7K
C196
0.1U_0402_16V7K
C197
0.1U_0402_16V7K
C198
4.7U_0603_6.3V6K
C199
4.7U_0603_6.3V6K
C200
0.1U_0402_16V7K
C201
0.1U_0402_16V7K
1U_0402_6.3V6K G5243T11U_SOT23-5 LAN_PWR_EN 2
LAN_PWR_EN <23>
1
1
SA000028Y10 IDC=1200mA 1 1 1 1 1 1
1
C189 C190
Modify R02 4.7U_0603_6.3V6K 0.1U_0402_16V7K
2
1 C191 C192 @ @ @
2
4.7U_0603_6.3V6K 2 2 2 2 2 2
0.1U_0402_16V7K
+3V_LAN Rising time request: 0.5~100mS
SA000028Y10
High active. close to pin 22
EN threshold voltage :1.2~2.0V
Current limit threshold :1.5~2.8A
Output turn-on rising time: 1.3~2.7ms
U20
2 2
close to Pin 17, 18
LAN_MIDI0+ 1 17 PCIE_PRX_C_DTX_P0 C202 1 2 0.1U_0402_16V7K PCIE_PRX_DTX_P0
2 MDIP0 HSOP 18 1 2 0.1U_0402_16V7K PCIE_PRX_DTX_P0 <8>
LAN_MIDI0- PCIE_PRX_C_DTX_N0 C203 PCIE_PRX_DTX_N0 SJ10000E800
+LAN_VDD 3 MDIN0 HSON 19 PLT_RST_BUF# PCIE_PRX_DTX_N0 <8>
Y4
LAN_MIDI1+ 4 AVDD10 PERSTB 20 ISOLATEB PLT_RST_BUF# <19,21,23,9> 25MHZ_10PF_7V25000014
LAN_MIDI1- 5 MDIP1 ISOLATEB 21 LAN_PME# R158 2 @ 1 0_0402_5%
LAN_MIDI2+ 6 MDIN1 LANWAKEB 22 +LAN_VDD EC_PME# <23> XTLI 1 3 XTLO
LAN_MIDI2- 7 MDIP2 DVDD10 23 +3V_LAN 1 3
+LAN_VDD 8 MDIN2 VDDREG 24 +REGOUT GND GND
AVDD10 REGOUT EC_PME# pull high 10K to +3VALW at EC 1 1
LAN_MIDI3+ 9 25 1 @
10 MDIP3 LED2 26 T19 GPO 2 4
LAN_MIDI3- C204 C205
PU to +3VS at PCH side +3V_LAN 11 MDIN3 LED1/GPIO 27 1 @ 10P_0402_50V8J
AVDD33 LED0 T20 XTLO 10P_0402_50V8J
LAN_CLKREQ# 12 28 2 2
<8> LAN_CLKREQ# PCIE_PTX_C_DRX_P0 13 CLKREQB CKXTAL1 29 XTLI
<8> PCIE_PTX_C_DRX_P0 PCIE_PTX_C_DRX_N0 14 HSIP CKXTAL2 30 +LAN_VDD +3V_LAN
R159
<8> PCIE_PTX_C_DRX_N0 15 HSIN AVDD10 31 1 2
CLK_PCIE_LAN LAN_RST Modify R02
<9> CLK_PCIE_LAN 16 REFCLK_P RSET 32
CLK_PCIE_LAN# +3V_LAN 2.49K_0402_1%
<9> CLK_PCIE_LAN# REFCLK_N AVDD33
1
33
GND R160
10K_0402_5%
Consider VCC33 may be connected to Main
Power or chipset/bios's GPO, the pull-low
2
GPO R200 2 @ 1 0_0402_5%
LAN_GPO <23> resistor R14 can be NC only when Main Power
RTL8111GS-CG_QFN32_4X4 or chipset/bios's GPO can ensure to drive the
Modify R02
SA00006ML00 ISOLATEB pin to a voltage level < 0.8V at the
system state S3~S5.
Use 8111GS symbol , pop 8111GUS part
LAN Connector +3VS
3 JRJ45 3
RJ45_MIDI0+ 1
PR1+
2
RJ45_MIDI0- 2
PR1- R161
RJ45_MIDI1+ 3 1K_0402_5%
PR2+
RJ45_MIDI2+ 4
1
PR3+
T21 RJ45_MIDI2- 5 ISOLATEB
PR3- <BOM Structure>
1
LAN_TERMAL 1 24 RJ45_MIDI1- 6
LAN_MIDI0+ 2 TCT1 MCT1 23 RJ45_MIDI0+ PR2- R162
LAN_MIDI0- 3 TD1+ MX1+ 22 RJ45_MIDI0- RJ45_MIDI3+ 7 9 15K_0402_5%
TD1- MX1- PR4+ GND 10
4 21 RJ45_MIDI3- 8 GND
2
LAN_MIDI1+ 5 TCT2 MCT2 20 RJ45_MIDI1+ PR4- JP4
LAN_MIDI1- 6 TD2+ MX2+ 19 RJ45_MIDI1- SANTA_130456-291 B88069X9231T203_4P5X3P2-2
TD2- MX2- CONN@ @EMC@2 1 <BOM Structure>
7 18 40mil
LAN_MIDI2+ 8 TCT3 MCT3 17 RJ45_MIDI2+ DC234008800
LAN_MIDI2- 9 TD3+ MX3+ 16 RJ45_MIDI2- RJ45_GND 1 2 LANGND
TD3- MX3- C206
10 15 40mil 10P_0402_50V8J
LAN_MIDI3+ 11 TCT4 MCT4 14 RJ45_MIDI3+
LAN_MIDI3- 12 TD4+ MX4+ 13 RJ45_MIDI3- LANGND
TD4- MX4-
1
@
JUMP_43X118
JP11 JP5
75_0402_1%
75_0402_1%
75_0402_1%
75_0402_1%
GST5009-E @EMC@
1
1 SP050006B10 D5 B88069X9231T203_4P5X3P2-2
MESC5V02BD03_SOT23-3
2
4
R163
R164
R165
R166
C207 EMC@ 4
Place close to TCT pin 2

0.1U_0402_16V7K
2
1
<BOM Structure>
<BOM Structure>
<BOM Structure>
<BOMRJ45_GND
Structure>

LAN_RTL8111GUS-CG
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom Bay Trail M LA-B511P 1.0
A B C D E
A B C D E
For Wireless LAN
1 1
+3VS_WLAN
+3VS 60mil +3VS_WLAN
JP3 JP@
JMINI1
2 1 1 1
JUMP_43X118 @ 1
<23> WLAN_PME# 1
C146 C147 C148 C149 3 2
4.7U_0603_6.3V6K .1U_0402_16V7K .1U_0402_16V7K 5 3 2 4
470P_0402_50V7K 5 4
1 2 2 2 7 6
EMC@ <8> WLAN_CLKREQ# 7 6
9 8
11 9 8 10
<9> CLK_PCIE_WLAN# 13 11 10 12
<9> CLK_PCIE_WLAN 15 13 12 14
15 14 16
16
17
19 17 18
21 19 18 20
23 21 20 22 WL_OFF# <23>
<8> PCIE_PRX_DTX_N1 23 22 PLT_RST_BUF# <18,21,23,9>
25 24
<8> PCIE_PRX_DTX_P1 25 24
27 26
29 27 26 28
31 29 28 30 MINI1_SMBCLK R137 1 @ 2 0_0402_5%
+3VS_WLAN <8> PCIE_PTX_C_DRX_N1 31 30 EC_SMB_CK2 <10,14,23>
33 32 MINI1_SMBDATA R138 1 @ 2 0_0402_5%
+3VALW <8> PCIE_PTX_C_DRX_P1 33 32 EC_SMB_DA2 <10,14,23>
35 34
U13 AC@ 37 35 34 36
1 39 37 36 38 USB20_HUB_N1 <22>
5 VOUT W=60mils +3VS_WLAN
41 39 38 40 USB20_HUB_P1 <22>
VIN 43 41 40 42
2 45 43 42 44
2 4 GND 47 45 44 46 2
VIN R139 0_0402_5% 1 @ 2 49 47 46 48
1 <23> E51TXD_P80DATA 49 48
AC@ 3 R140 0_0402_5% 1 @ 2 51 50
EN WLAN_ON <23> <23> E51RXD_P80CLK 51 50 52
C150
53 52
1U_0402_6.3V6K AP2821KTR-G1_SOT23-5 GND1
1
2 54
GND2
R141 BELLW_80053-1021
100K_0402_5% CONN@
DC040009P00
2
3 3
Lid Switch
Hall sensor (Hall Effect Switch)
+3VLP
U14
APX9132GAI-TRG_SOT23-3
2 3 LID_SW#
GND
VDD VOUT LID_SW# <23>

2
C152 1
1
0.1U_0402_16V4Z C151
@EMC@
1 10P_0402_50V8J
2
Modify R02,U14 Link CIS symbol

4 4

Mini PCIE(WLAN)
Rev
Custom 1.0
A B C D E
A B C D E
HD Audio Codec +5VS

JP12
+VDDA Int. Speaker Conn.
40mil 1 2 40mil 40mil JSPK1
1 SPKR+ R167 1 @ 2 0_0603_5% SPK_R+ 1
+PVDD_HDA SPKR- 1 2 SPK_R- 2 1
60mil JUMP_43X118 4.75V R168 @ 0_0603_5%
2
C208 @ SPKL+ R169 1 @ 2 0_0603_5% SPK_L+ 3 5
1 @ 2 0.1U_0402_16V4Z SPKL- R170 1 @ 2 0_0603_5% SPK_L- 4 3 G1 6
+VDDA 2 (output = 300 mA) 4 G2
10U_0603_6.3V6M
0.1U_0402_16V4Z
@EMC@
R255 1 ACES_88266-04001
2
C209
C210
0_0805_5% GND
GND SP02000K200
2
2
D6 @EMC@
D7 @EMC@
+AVDD1_HDA
1 1
Place near Pin41

20mil 1 @ 2
+1.5VS_DVDDIO +VDDA
4.7U_0603_6.3V6M
0.1U_0402_16V4Z
GND 1
1
1
R171
20mil
C213
C214
1 @ 2 0_0603_5%
+1.5VS
1U_0603_6.3V6M
0.1U_0402_16V4Z
2
R254 2 GND GND
1 1
C273
C274
0_0603_5%
+MICBIAS2
2 2 C214,C219 by Vendor command use 4.7uF cap
Place near Pin26 GNDA
Vendor reserve Int. MIC Reserve
2
Place near Pin9 +3VS_DVDD +1.5VS_VDDA 1 @ 2 R174
GND +1.5VS
4.7U_0603_6.3V6M
2.2K_0402_5%
20mil
C219
1 @ 2 +3VS_DVDD R173 AMIC@ 15mil 15mil
+3VS
1U_0603_6.3V6M
0.1U_0402_16V4Z
0_0603_5% EMC@ AMIC1
1
R172 1 1 INT_MIC_R 1 2 INT_MIC_R_1 1
2
+
C215
C216
0_0603_5% R175
1 0_0603_5% 2
C220 -
2 2 @EMC@ KINGSTATE KEEG1542SBL
Place near Pin40 GNDA 220P_0402_50V7K CONN@
2
CY000002U00
41
46
26
40
1
9
Place near Pin1 GND U21
Omnidirectional
DVDD-IO
PVDD1
PVDD2
AVDD1
AVDD2
DVDD
By Vendor command. GNDA
Internal MIC Reserve LINE1-L 22
LINE1-R 21 LINE1-L(PORT-C-L) 43 SPKL-
2 INT_MIC_R 2
R176
AMIC@1 INT_MIC C221 1
1K_0402_5%
2 LINE2_C_L
AMIC@ 4.7U_0603_6.3V6K 24
LINE1-R(PORT-C-R) SPK-OUT-L-
SPK-OUT-L+
42 SPKL+ Digital MIC Conn. 2
C2221 2 C223 1 2 LINE2_C_R 23 LINE2-L(PORT-E-L) 45 SPKR+ +3VS Modify R03

GNDA LINE2-R(PORT-E-R) SPK-OUT-R+
@EMC@ 1000P_0402_50V7K AMIC@ 4.7U_0603_6.3V6K 44 SPKR- JDMIC1 Footprint -S
RING2 17 SPK-OUT-R- 1
SLEEVE 18 MIC2-L(PORT-F-L) /RING2 DMIC_DATA R177 1 @EMC@2 0_0603_5% DMIC1_DATA 2 1
Combo MIC MIC2-R(PORT-F-R) /SLEEVE 2
40mil 32 HP_LEFT DMIC_CLK R178 1 @EMC@2 0_0603_5% DMIC1_CLK 3 5
+MICBIAS 31 HPOUT-L(PORT-I-L) 33 HP_RIGHT 4 3 G1 6
+MICBIAS LINE1-VREFO-L HPOUT-R(PORT-I-R) 4 G2
+MICBIAS2 30
+MICBIAS2 LINE1-VREFO-R
3
10 HDA_SYNC_AUDIO CONN@
SYNC HDA_SYNC_AUDIO <8>
DMIC_DATA 2 6 HDA_BITCLK_AUDIO
3 GPIO0/DMIC-DATA BCLK HDA_BITCLK_AUDIO <8>
DMIC_CLK GND GND
GPIO1/DMIC-CLK 1 @EMC@2 1 2 C224 @EMC@ D8
GND
R179 0_0402_5% 22P_0402_50V8J MESC5V02BD03_SOT23-3
EC_MUTE# 47 5 HDA_SDOUT_AUDIO @EMC@
HDA_RST_AUDIO# 11 PDB
RESETB
ALC283-CG SDATA-OUT
SDATA-IN
8 HDA_SDIN0_AUDIO 1 2
HDA_SDOUT_AUDIO
HDA_SDIN0 <8>
<8>
R180 33_0402_5%
48
+MIC2_VREFO
1
MONO_IN 12 SPDIF-OUT/GPIO2
PCBEEP 16
Close codec MONO-OUT
HP_PLUG# R181 2 1 39.2K_0402_1% SENSE_A 13 GND
14 SENSE A 4.7U_0603_6.3V6M 2 1 C225
10mil SENSE B 29
GND Add R182 is The main consideration
1 MIC2-VREFO
37
CBP
is shut down after the discharge rate +MIC2_VREFO
C226 35 7 4.7U_0603_6.3V6M 2 1 C227 GNDA
2.2U_0402_6.3V6M CBN LDO3-CAP 39 can be improved boot pop noise.
2 LDO2-CAP 27 4.7U_0603_6.3V6M2 1 C228 HPOUT_L_2
LDO1-CAP GNDA
36 HPOUT_R_2 R02 modify
+3VS_DVDD CPVDD
1
1 R182 2 10mil
2
28 CODEC_VREF 100K_0402_5% R184 R185
VREF
20 2.2K_0402_5% 2.2K_0402_5%
CPVREF
D10 @EMC@
15 20K_0402_1% 1 2 R183 GNDA
3 4.7U_0603_6.3V6M2 1 C230 19 JDREF 34 CPVEE L19 EMC@ 3
GNDA 1 1
2
MIC-CAP CPVEE
0.1U_0402_16V4Z
C229
2.2U_0402_6.3V6M
C231
Close codec BLM15PX330SN1D 0402
1 SLEEVE_L 1 2 SLEEVE
4 RING2_L 1 2 RING2
DVSS
3
49 25 C233 2 2
Thermal PAD AVSS1 38 2.2U_0402_6.3V6M BLM15PX330SN1D 0402
2 2
1
AVSS2 2 C277 C278 L20 EMC@
ALC283-CG_MQFN48_6X6 Place next pin27 GND 680P_0402_50V7K 680P_0402_50V7K

GND D9 EMC@ 1 1 EMC@
GND AZ5123-02S.R7G 3P C/A SOT23
R186 GNDA GNDA EMC@
47K_0402_5% GND GND
Headphone Out
1
2 @ 1 BEEP#_R 1 2 MONO_IN
<23> BEEP# +3VLP Modify R03
C234 Modify R03 GND JHP1
R189 @EMC@ 1 1U_0402_6.3V6K RING2_L 3
100K_0402_5%
47K_0402_5% HP_LEFT 1 @ 2 HPOUT_L_1 1 R187 2 HPOUT_L_2 1

2
100P_0402_50V8J
C235
2 1 60.4_0603_1%
<10> SOC_SPKR
R191
R188
2 RING2 0_0603_5% HP_PLUG# 5
HP_RIGHT 1 @ 2 HPOUT_R_1 1 R193 2 6

DMN65D8LDW-7 2N SOT363-6
1
GNDA 60.4_0603_1%
5 2
D
G R192 HPOUT_R_2
@ Q18A 0_0603_5%
S
6
2 R194 1 LINE1-L C236 1 2 4.7U_0603_6.3V6K 2 2 SLEEVE_L 4

<23> EC_MUTE#
4
2 7
D
10K_0402_5% G
C238 C239
2 R195 1 S Q18B LINE1-R C237 1 2 4.7U_0603_6.3V6K @EMC@ @EMC@
<8> HDA_RST_AUDIO#
10K_0402_5% 330P_0402_50V7K 330P_0402_50V7K
1
+MICBIAS D11 1 1 SINGA_2SJ3080-001111F

JP13 JP14 2 2 R196 1 GNDA CONN@
4 JUMP_43X39 JUMP_43X39 4.7K_0402_5% 4
GNDA DC23000B300
1 2 1 2 1
@ 1 2 @ 1 2
DC23000B300 symbol,
JP15 JP16 3 2 R197 1 GNDA
JUMP_43X39 JUMP_43X39 GNDA 4.7K_0402_5% same with DC23000B610.
1 2 1 2 BAT54A-7-F_SOT23-3
@ 1 2 @ 1 2
JP17 JP18
JUMP_43X39 JUMP_43X39 To solve the background noise while combo jack Security Classification Compal Secret Data Compal Electronics, Inc.
1 2 1 2 connecting to an active 2013/04/12 2014/04/12 Title
Issued Date Deciphered Date
@ 1 2 @ 1 2
speaker and system entry into S3/S4/S5 without analog
HD Audio Codec_ALC283-CG
power Size Document Number Rev
GND GNDA GND GNDA Custom 1.0
A B C D E
A B C D E
1
SATA HDD1 Conn. SATA ODD Conn. 1
JODD1
JHDD1
1 1
SATA_PTX_DRX_P0 C159 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P0 2 GND C160 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P1 2 GND
<8> SATA_PTX_DRX_P0 RX+ <8> SATA_PTX_DRX_P1 A+
<8> SATA_PTX_DRX_N0
SATA_PTX_DRX_N0 C156 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N0 3
<8> SATA_PTX_DRX_N1 C161 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N1 3
4 RX- 4 A-
SATA_PRX_DTX_N0 C162 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N0 5 GND C158 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N1 5 GND
<8> SATA_PRX_DTX_N0 TX- <8> SATA_PRX_DTX_N1 B-
SATA_PRX_DTX_P0 C157 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P0 6 C163 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P1 6
<8> SATA_PRX_DTX_P0 7 TX+ <8> SATA_PRX_DTX_P1 7 B+
GND GND
8 +5VS
9 3.3V 8
10 3.3V 1 2
60mils +5VS_ODD 9 DP
@
11 3.3V 10 +5V 14
+5VS 12 GND R142 ODD_MD 11 +5V GND 15
60mils 13 GND 1 1
12 MD GND 16
0_0603_5% T18
1 @ 2 +5VS_HDD 14 GND Modify R03 C164 C165 @ 13 GND GND 17
15 5V 10U_0603_6.3V6M .1U_0402_16V7K GND GND
R143 16 5V 2 2
5V
10U_0603_6.3V6M
C153
1U_0402_6.3V6K
C154
.1U_0402_16V7K
C155
0_0603_5% 1 1 1 17 SANTA_201302-1
18 GND 23 CONN@
Modify R03 19 Reserved GND1 24
2
@
2 2
20 GND
12V
GND2 DC021311120
21
22 12V
12V
ALLTO_C166KH-122H9-L
CONN@
2 2
SP011310171
TPM +3VALW
R144
+3VALW_TPM +3VS
R145
+3VS_TPM
1 2 1 2
FAN1 Conn
10U_0603_6.3V6M
0.1U_0402_16V4Z
10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0_0603_5% 0_0603_5%
C166 TPM@
C167 TPM@
C168 TPM@
C169 TPM@
C170 TPM@
C171 TPM@
TPM@ 1 1 TPM@ 1 1 1 1
+5VS C172
near pin5 near pin10, 19, 24 4.7U_0603_6.3V6K
2 2 2 2 2 2 1 2
U15
1 8
2 EN GND 7
3 +VCC_FAN1 3 VIN GND 6 3
4 VOUT GND 5
+3VS_TPM <23> EN_DFAN1 VSET GND
APE8875M_SO8
SA000050J00
2 1 LPC_CLKRUN#
R257
10K_0402_5%
TPM@
U16 TPM@
5 +3VS C173
VSB +3VALW_TPM
1 10 4.7U_0603_6.3V6K
GPIO0/XOR_OUT VDD +3VS_TPM
2 19 1 2
GPIO3/BADD with Internal PH (default) GPIO1 VDD
1
6 24
0_0402_5% 1 @ 2 R146 TPM_BADD 9 GPIO2/GPX VDD R147
LPC_CLKRUN# 15 GPIO3/BADD 8
<10> LPC_CLKRUN# GPIO4/CLKRUN# TEST 10K_0402_5%
LPC_AD0 26
40mil JFAN1
<10,23> LPC_AD0
2
LPC_AD1 23 LAD0/MISO +VCC_FAN1 1
<10,23> LPC_AD1
LPC_AD2 20 LAD1/MOSI 3
BADD SELECTION 2 1 4
<10,23> LPC_AD2 17 LAD2/SPI_IRQ# NC 12 <23> FAN_SPEED1 3 2 GND 5
LPC_AD3
<10,23> LPC_AD3 LAD3 NC 13
0 EEh - EFh 3 GND
NC 1
14 EMC@
LPCPD# had internal PH 28
LPCPD#
NC
* 1 7Eh - 7Fh C174 ACES_88231-03041
CLK_PCI_TPM 21 .1U_0402_16V7K CONN@
<10> CLK_PCI_TPM 22 LCLK/SCLK 2
LPC_FRAME# SP020020710
<10,23> LPC_FRAME# PLT_RST_BUF# 16 LRFAME#/SCS# 4
<18,19,23,9> PLT_RST_BUF# EC_SERIRQ 27 LRSET#/SPI_RST# GND 11
<23,9> EC_SERIRQ 7 SERIRQ GND 18
PP GND 25
GND
4 SERIRQ PH 10K to +3VS at PCH side 4
NPCT650AA0WX_TSSOP28
SA00007IO00

CLK_PCI_TPM R148 1 2 33_0402_5% C175 1 2 22P_0402_50V8J

HDD/ODD/TPM/FAN
@EMC@ @EMC@ DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom Bay Trail M LA-B511P 1.0
A B C D E
A B C D E
USB3.0 (Port 0)
SM070000S80 WCM2012F2SF-670T04 67ohm L10 EMC@
CMMI21T-900Y-N_4P
2 1 PCH_USB3_TX0_P_C 3 4 U3TXDP0
<10> PCH_USB3_TX0_P 3 4 +USB3_VCCA
C176 .1U_0402_16V7K For ESD request
2 1 PCH_USB3_TX0_N_C 2 1 U3TXDN0 D4 W=100mils
<10> PCH_USB3_TX0_N 2 1 1 1
SF000002Y00
C178 .1U_0402_16V7K U3RXDN0 10 9 U3RXDN0
SM070003K00 220U 6.3V OSCON
220U_6.3V_M
C179
1000P_0402_50V7K
C180
.1U_0402_16V7K
C181
U3RXDP0 2 2 9 8 U3RXDP0
1 ESR 17mohm@100Khz 1
1 2 2
L11 EMC@ U3TXDN0 4 4 7 7 U3TXDN0
CMMI21T-900Y-N_4P +
USB3.0 Conn.
@EMC@
@EMC@
PCH_USB3_RX0_P 3 4 U3RXDP0 U3TXDP0 5 5 6 6 U3TXDP0
<10> PCH_USB3_RX0_P 3 4 1 1
3 3 2
PCH_USB3_RX0_N 2 1 U3RXDN0
<10> PCH_USB3_RX0_N 2 1 8 JUSB1
SM070003K00 @EMC@ 1
L05ESDL5V0NA-4 SLP2510P8 USB20_N0_L 2 VBUS
USB20_P0_L 3 D-
4 D+
U3RXDN0 5 GND
U3RXDP0 6 StdA-SSRX- 10
7 StdA-SSRX+ GND 11
1 2@ U3TXDN0 8 GND-DRAIN GND 12
R150 0_0402_5% U3TXDP0 9 StdA-SSTX- GND 13
SM070001E00 StdA-SSTX+ GND
DLW21SN900HQ2L_0805 ACON_TARAC-9V1391
2 1 USB20_P0_L +5VALW +USB3_VCCA CONN@
<10> USB20_P0 2 1
U17 W=60mils DC23300AG00
3 4 USB20_N0_L 1 2 1 8
<10> USB20_N0 3 4 2 GND OUT 7
C177 @EMC@
L17 @EMC@ .1U_0402_16V7K 3 IN OUT 6
USB_PWR_EN# 4 IN OUT 5 1 @ 2
1 2 EN/ENB OCB USB_OC0# <10>
@ R149 0_0402_5%
R151 0_0402_5% SY6288D10CAC_MSOP8 +USB3_VCCA
1
EMC@
2 C272 2
0.1U_0402_16V4Z
2
R248
1 @ 2
0_0402_5% D12
USB2.0 Conn.
SM070001E00 U2DN2_L 3 6
DLW21SN900HQ2L_0805 I/O2 I/O4 JUSB3
USB20_HUB_P2 2 1 U2DP2_L +USB3_VCCA 1 5
2 1 U2DN2_L 2 VBUS G1 6
2 5 U2DP2_L 3 D- G2 7
USB20_HUB_N2 3 4 U2DN2_L GND VDD 4 D+ G3 8
3 4 GND G4
L18 @EMC@ ACON_UARC9-4K1986
U2DP2_L 1 4 CONN@
1 @ 2 I/O1 I/O3
R249 0_0402_5% @EMC@ DC23300AH00
USB_HUB Modify R02
+3V_HUB
1 2 +3VALW +3V_HUB
C279 .1U_0402_16V7K C276
C280
close
close
to
to
U31
U31
pin5
pin9
Modify R03
U31
USB/B
3 1 2 2 @ 1 5 1 3
C283 close to U31 pin14 AVDD DM0 USB20_N1 <10>
C280 .1U_0402_16V7K 9 2
C284 close to U31 pin21 AVDD DP0 USB20_P1 <10>
10U_0603_6.3V6M
.1U_0402_16V7K
1 R259 1 14
1 2 0_0603_5% 21 AVDD 3 +5VALW
DVDD DM1 USB20_HUB_N1 <19>
C282
C281
C283 .1U_0402_16V7K 27 4 JUSB2

28 V5 DP1 USB20_HUB_P1 <19> To BT 1
1 2 2 2 V33 6 USB20_HUB_N2 2 1
C284 .1U_0402_16V7K DM2 7 USB20_HUB_P2 3 2
18 DP2 USB_PWR_EN# 4 3
26 TEST/SCL 12 <23> USB_PWR_EN# 5 4
USB20_HUB_N3
PWREN1#/SDA DM3 13 USB20_HUB_P3 USB20_HUB_N3 6 5
+3V_HUB RESET# 17 DP3 USB20_HUB_P3 7 6
RESET# 15 USB20_HUB_N4 8 7
1 2 PSELF HUB_XIN 10 DM4 16 USB20_HUB_P4 USB20_HUB_N4 9 8
R261 100K_0402_5% HUB_XOUT 11 X1 DP4 USB20_HUB_P4 10 9
1 2 OVCUR2# X2 25 11 10
R265 10K_0402_5% PSELF 22 OVCUR1#/SMC 24 OVCUR2# ON/OFF 12 11
1 2 OVCUR3#
Port2,3 is removable. PGANG 23 PSELF OVCUR2#/SMD 20 OVCUR3# <23,24> ON/OFF 13 12 15
R266 10K_0402_5% PGANG OVCUR3# 19
Port2,3 is removable. +3VS
14 13 GND 16
OVCUR4# 14 GND
1 2 PGANG 29 8 RREF 2 1 ACES_51524-0140N-001
R267 100K_0402_5% GND RREF R260 680_0402_1% CONN@
R02 Modify
GL850G-OHY31_QFN28_5X5 Modify R03
Modify R03
+3V_HUB SA000066310, S IC GL850G-OHY32 QFN 28P USB2.0 HUB

USB HUB Port
1
Port1 BT
R263 Y5
10K_0402_5% HUB_XIN 1 4 Port2 USB2.0
1
4
1 Port3 USB2.0 4
C287 C286 Port4 Card Reader
2
RESET# 20P_0402_50V8 20P_0402_50V8

2 3 2 HUB_XOUT
2 2
C285 12MHZ_18PF_7V12000001
1U_0402_6.3V6K
1
USB Conn & GL850G-OHY32
Rev
Custom 1.0
A B C D E
A B C D E
+3VLP +3VALW_EC L15 +EC_VCCA

BLM15AG121SN1D_L0402_2P
1 @ 2 1 2 +EC_VCCA +1.8VALW +1.8VALW_EC
+1.8VALW_EC +3VALW_EC
1
.1U_0402_16V7K
C240
.1U_0402_16V7K
C241
.1U_0402_16V7K
C242
.1U_0402_16V7K
C243
1000P_0402_50V7K
C244 @EMC@
1000P_0402_50V7K
C245 @EMC@
R198 1 1 1 1 2 2
+VCC_LPC
0_0805_5% C246 1 @ 2
.1U_0402_16V7K
1 Modify R03 2 R199 1
1
2 2 2 2 1 1
@
0_0805_5%
ECAGND <27>
R201 R202
0_0603_5% 0_0603_5%
111
125
22
33
96
67
NTPM@ TPM@
9
+3VALW_EC Modify R02 U22
2
EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/AVCC
R251 2 TPM@ 1 2.2K_0402_5% EC_SLP_S3#
+VCC_LPC
R203 1 2 100K_0402_5% EC_PME#
1 21 +3VALW_EC
2 GATEA20/GPIO00 GPIO0F 23 BEEP#
<9> EC_KBRST# 3 KBRST#/GPIO01 BEEP#/GPIO10 26 BEEP# <20> LID_SW# R204 1 2 47K_0402_5%
+3VALW_EC <21,9> EC_SERIRQ 4 SERIRQ GPIO12 27
<10,21> LPC_FRAME# 5 LPC_FRAME# ACOFF/GPIO13 CL_CMOS <9>
RP13 WLAN_PME# R256 1 2 4.7K_0402_5%
1 8 <10,21> LPC_AD3 7 LPC_AD3
EC_SMB_CK1 PWM Output C248 2 1 100P_0402_50V8J ECAGND
2 7 EC_SMB_DA1 <10,21> LPC_AD2 8 LPC_AD2 63 BATT_TEMP
3 6 EC_SMB_CK2 <10,21> LPC_AD1 10 LPC_AD1 BATT_TEMP/AD0/GPIO38 64 VCIN1_BATT_DROP BATT_TEMP <27>
<10,21> LPC_AD0 LPC_AD0LPC & MISC AD1/GPIO39 VCIN1_BATT_DROP <27>
4 5 EC_SMB_DA2 65 ADP_I
+3VS ADP_I/AD2/GPIO3A ADP_I <27,28>
12 AD Input 66 AD_BID0
<10> LPC_CLK_EC 13 CLK_PCI_EC AD3/GPIO3B 75 +3VS
2.2K_0804_8P4R_5% WLAN_PME#
<18,19,21,9> PLT_RST_BUF# EC_RST# 37 PCIRST#/GPIO05 AD4/GPIO42 76 EC_PME# WLAN_PME# <19>
<25> EC_RST# 20 EC_RST# IMON/AD5/GPIO43 EC_PME# <18>
+1.8VALW_EC <9> EC_SCI# 38 EC_SCII#/GPIO0E EC_MUTE# R207 1 @ 2 10K_0402_5%
<19> WLAN_ON GPIO1D
68 LAN_PWR_EN
1 2 10K_0402_5% EC_SMI# DAC_BRIG/GPIO3C 70 EN_DFAN1 LAN_PWR_EN <18>
R208 DA Output EN_DFAN1/GPIO3D EN_DFAN1 <21>
R209 1 2 10K_0402_5% EC_SCI# KSI0 55 71 TP_EN
KSI0/GPIO30 IREF/GPIO3E TP_EN <24>
R211 1 2 10K_0402_5% EC_LID_OUT# KSI1 56 72 KBL_EN# CL_CMOS R253 2 @ 1 100K_0402_5%
57 KSI1/GPIO31 CHGVADJ/GPIO3F KBL_EN# <24>
KSI2
KSI3 58 KSI2/GPIO32 83 EC_MUTE#
KSI4 59 KSI3/GPIO33 EC_MUTE#/GPIO4A 84 USB_PWR_EN# EC_MUTE# <20>
2 KSI5 60 KSI4/GPIO34 USB_EN#/GPIO4B 85 EC_SMB_CK3 USB_PWR_EN# <22> 2
1 2 PLT_RST_BUF# KSI6 61 KSI5/GPIO35 CAP_INT#/GPIO4C 86 EC_SMB_DA3 EC_SMB_CK3 <15> R02 Modify
KSI6/GPIO36 PS2 Interface EAPD/GPIO4D EC_SMB_DA3 <15>
R212
C249 @EMC@ KSI7 62 87 TP_CLK 0_0402_5%
39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_CLK <24> 2 1
0.01U_0402_16V7K KSO0 TP_DATA H_PROCHOT#_EC @
KSO1 40 KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <24>
ESD request KSO1/GPIO21
KSO2 41
KSI[0..7] KSO3 42 KSO2/GPIO22 97 ENBKL
2 1 EMC@ <24> KSI[0..7] 43 KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 98 ENBKL <7>
PMC_CORE_PWROK KSO4 TP_PWR_EN R210
KSO[0..17] KSO5 44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 TP_PWR_EN <24> R02 Modify
KSO5/GPIO25 Int. K/B
C250 0_0402_5%
<24> KSO[0..17] KSO6 45 ME_EN/GPXIOA02 109 VCIN0_PH TXE_DBG <8> 2 1
0.01U_0402_16V7K @ H_PROCHOT# <8>
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 VCIN0_PH <27> <33> VR_HOT#
KSO7/GPIO27 SPI Device Interface
KSO8 47
KSO9 48 KSO8/GPIO28 119 EC_MISO
KSO10 49 KSO9/GPIO29 SPIDI/GPIO5B 120 EC_MOSI EC_MISO <9>
KSO11 50 KSO10/GPIO2A SPIDO/GPIO5C 126 EC_SPICLK EC_MOSI <9>
KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58 EC_SPICLK <9>
Default unpop, KSO12 51 128 EC_SPICS#
52 KSO12/GPIO2C SPICS#/GPIO5A EC_SPICS# <9>
KSO13
EC select LVDS EP mode to solve EMI when pop the resister. KSO14 53 KSO13/GPIO2D
KSO15 54 KSO14/GPIO2E 73
KSO16 81 KSO15/GPIO2F ENBKL/AD6/GPIO40 74 EC_TP_INT#
KSO16/GPIO48 PECI_KB930/AD7/GPIO41 EC_TP_INT# <24>
R252 1 2 100K_0402_5% LVDS_EPMODE KSO17 82 89 R216 2 @ 1 0_0402_5%
ACIN <28,9>
@EMC@ KSO17/GPIO49 FSTCHG/GPIO50 90 BATT_BLUE_LED#
BATT_CHG_LED#/GPIO52 91 BATT_BLUE_LED# <24>
77 CAPS_LED#/GPIO53 92 PWR_LED EC_ACIN 2 1 100P_0402_50V8J
<27,28> EC_SMB_CK1 EC_SMB_CK1/GPIO44 GPIO PWR_LED#/GPIO54 PWR_LED <24> C251
Charger and BATT 78 93 BATT_AMB_LED#
<27,28> EC_SMB_DA1 79 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 95 SYSON BATT_AMB_LED# <24>
<10,14,19> EC_SMB_CK2 SM
EC_SMB_CK2/GPIO46 Bus SYSON/GPIO56 SYSON <30>
EMC@
To SOC 80 121 VR_ON
<10,14,19> EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 127 VR_ON <33>
PM_SLP_S4#/GPIO59
EC_RSMRST# 1 2
6 100 EC_RSMRST# C254 EMC@
<9> EC_SLP_S3# 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 EC_LID_OUT# EC_RSMRST# <9>
.1U_0402_16V7K
3 15 PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 102 EC_LID_OUT# <9> 3
VCIN1_PROCHOT
<9> EC_SMI# 16 EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 103 VCIN1_PROCHOT <27>
H_PROCHOT#_EC For ESD request
<16> TS_RST# 17 GPIO0A H_PROCHOT#_EC/GPXIOA06 104 MAINPWON H_PROCHOT#_EC <27>
<16> TS_EN GPIO0B VCOUT0_PH/GPXIOA07 MAINPWON <27,29>
18 GPO 105 EC_BKOFF#
<19> WL_OFF# GPIO0C BKOFF#/GPXIOA08 EC_BKOFF# <16>
LVDS_EPMODE 19 GPIO 106 LAN_GPO
25 GPIO0D PBTN_OUT#/GPXIOA09 107 LAN_GPO <18>
<29,31,32> SPOK 28 EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 108
<21> FAN_SPEED1 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11 Modify R02
29
30 EC_PME#/GPIO15
+3VALW_EC <19> E51TXD_P80DATA 31 EC_TX/GPIO16 110 EC_ACIN
<19> E51RXD_P80CLK 32 EC_RX/GPIO17 AC_IN/GPXIOD01 112 EC_ON
Board ID <9> PMC_CORE_PWROK
<24> PWR_SUSP_LED#
34 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 114 ON/OFF
EC_ON <29>
SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 ON/OFF <22,24>
2
Analog Board ID definition, 36 GPI 115 LID_SW#

NUM_LED#/GPIO1A LID_SW#/GPXIOD04 116 SUSP# LID_SW# <19>
Ra R219 Please see page 3. SUSP#/GPXIOD05 117 VGATE
SUSP# <25,30,31,32>
GPXIOD06 118 VGATE <33> +1.8VALW_EC
100K_0402_5%
PECI_KB9012/GPXIOD07
AGND/AGND
122
<9> PBTN_OUT#
1
AD_BID0 123 XCLKI/GPIO5D 124 +V18R 1 @ 2

GND/GND
GND/GND
GND/GND
GND/GND
<9> EC_SLP_S4# XCLKO/GPIO5E V18R

1
GND0
1 R220 For 9022 +V18R, +EC_VCCLPC can be

R221 @ 0_0603_5% changed to 1.8V if supports 1.8V I/F
Rb 20K_0402_1% C252
.1U_0402_16V7K S IC KB9022QC LQFP 128P
11
24
35
94
113
69
2 Part Number = SA000075S20 Modify R03

Modify R10 20mil
2
ECAGND 1 2
L16
BLM15AG121SN1D_L0402_2P
4 4

EC ENE KB9022
A B C D E
A B C D E
To TP/B Conn.
+3VALW +3V_TP
KB Conn. 1
R264
@ 2
0_0603_5%
Modify R03
+3V_TP C255 H1 H2 H3 H4 H5 H6
KB_pitch 1.0 KB_pitch 0.8 JTP1 .1U_0402_16V7K H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0
U30 1 1 2
JKB1 1 1 2 TP_CLK
JKB2 5 VOUT 2 3 TP_CLK <23>
1 TP_DATA
TP_DATA <23>
1
KSO0 1 KSO0 1 VIN C288 3 4
KSO1 2 1 KSO1 2 1 2 4.7U_0603_6.3V6K 4 5 I2C2_SDA_TP
KSO2 3 2 KSO2 3 2 4 GND 5 6 I2C2_SCL_TP I2C2_SDA_TP <10>
4 3 4 3 SS 2 6 7 I2C2_SCL_TP <10> @ @ @ @ @ @
KSO3 KSO3 1 EC_TP_INT#
1 KSO4 5 4 KSO4 5 4 C289 3 7 8 TP_EN 1
5 5 EN 8 TP_EN <23>
KSO5 6 KSO5 6 1U_0402_6.3V6K 9 H10 H11 H12
KSO6 7 6 KSO6 7 6 TP_PWR_EN <23> GND 10
AP2821KTR-G1_SOT23-5 H_4P1 H_4P1 H_4P1
KSO7 8 7 KSO7 8 7 2 GND
KSO8 9 8 KSO8 9 8 ACES_50578-0080N-001
KSO9 10 9 KSO9 10 9 CONN@
1
KSO10 11 10 KSO10 11 10
KSO11 12 11 KSO11 12 11 +1.8VS SP010010M00
KSO12 13 12 KSO12 13 12
KSO13 14 13 KSO13 14 13 @ @ @
KSO14 15 14 KSO14 15 14
KSO15 16 15 KSO15 16 15 TP_CLK
16 16
1
KSO16 17 KSO16 17 TP_DATA
KSO17 18 17 KSO17 18 17 R230
KSI0 19 18 KSI0 19 18 2.2K_0402_5% H8 FD1 FD2
19 19 1 1
2
G
KSI1 20 KSI1 20 @EMC@ @EMC@ H_3P0
KSI2 21 20 KSI2 21 20 C256 C257
2
KSI3 22 21 KSI3 22 21 PCH_TP_INT# 3 1 EC_TP_INT# 100P_0402_50V8J @ @
<9> PCH_TP_INT# EC_TP_INT# <23> 100P_0402_50V8J
1
KSI4 23 22 KSI4 23 22 2 2
1
KSI5 24 23 KSI5 24 23 27 Q11 FIDUCIAL_C40M80 FIDUCIAL_C40M80
KSI6 25 24 27 KSI6 25 24 G1 28 MESS138W-G_SOT323-3
KSI7 26 25 G1 28 KSI7 26 25 G2 FD3 FD4
26 G2 26 @
HB_A802619-SBHR21
E-T_6905-E26N-01R CONN@ Modify R03 H9 @ @
1
CONN@ +3V_TP H_3P2N
SP01000IJ00
SP01001ID00 FIDUCIAL_C40M80 FIDUCIAL_C40M80
Modify R03
Event PCH_TP_INT# EC_TP_INT# TP_CLK R205 1 2 4.7K_0402_5%
Footprint -S
Default use JKB1
1
TP_DATA R206 1 2 4.7K_0402_5%
S0 Interrupt X I2C2_SDA_TP 1 2 2.2K_0402_5%
2 R223 @ 2
KSI[0..7] I2C2_SCL_TP 1 2 2.2K_0402_5%
KSI[0..7] <23> S3 X Wake R225
KSO[0..17] EC_TP_INT# 2 1 10K_0402_5%
KSO[0..17] <23>
1. Clamshell closed or Lid closed R227
2. Tablet mode for Convertible design X X

3. Disable TP function by hot-key
LED
ON/OFF BTN KB BackLight Conn.
Modify R03
LED1 +3VALW
BATT_BLUE_LED# 1 2 1 2
<23> BATT_BLUE_LED# B R231 100_0402_5%
BATT_AMB_LED# 3 4 1 2
+3VLP <23> BATT_AMB_LED# A R232 470_0402_5%
BL@
Q12 LTST-C295TBKF-CA_AMBER-BLUE
2
+5VS DMG2301U-7_SOT23-3 CONN@ LED2

R237 JBL1
3 3 1 4 6 1 2 1 2 3
S
D
SW1 @ 100K_0402_5% +5VS_BL PWR_LED#
TJE-532QR5_6P 3 4 G2 5 B R233 100_0402_5%
1 3 +5VALW 2 3 G1
1
1 2 PWR_SUSP_LED# 3 4 1 2 JP19@
G
<23> PWR_SUSP_LED#
2
2 4 ON/OFF 1 2 KBL_EN_R 1 A R234 470_0402_5% JUMP_43X39

ON/OFF <22,23> 1 2
R235 BL@ ACES_50504-0040N-001
100K_0402_5% SP01000Z300 LTST-C295TBKF-CA_AMBER-BLUE 1 2
5
6
Modify R03
.1U_0402_16V7K
C259
Footprint -S Need check CIS Symbol JP20@
1 JUMP_43X39
1 2
1 @ 2 1 2
<23> KBL_EN#
@
R236 2 JP21@
Modify R03 SW2 @ 0_0402_5% JUMP_43X39
TJE-532QR5_6P 1 2
1 3 PWR_LED# 1 2
1
2 4 JP22@
D JUMP_43X39
2 Q13 1 2
<23> PWR_LED
5
6
G 1 2
2N7002K_SOT23-3
2
S
R238 JP23@
3
100K_0402_5% JUMP_43X39
1 2
1 2
1
GND GND
4 4

KB/TP/LED/Screw Hole
A B C D E
A B C D E
VIH=1.2~5.5V Rise Time:

3.3V@100k/0.1uF=3.538ms 3.3V@330pF = 889.68us
U24 JP6 JP@
3.3V@120k/0.1uF=4.272ms 1 14 +3VS_OUT 5.0V@330pF = 1348us
1 +3VALW VIN1 VOUT1 +3VS 1
R239 2 13
100K_0402_5% VIN1 VOUT1 C260 JUMP_43X118
SUSP# 2 1 3VS_ON 3 12 2 1 330P_0402_50V7K
ON1 CT1
C261 2 1 4 11
+1.0VALW TO +1.0VS 1
.1U_0402_16V7K
2
+5VALW
5VS_ON 5
VBIAS GND
10 2 1
R240 ON2 CT2 330P_0402_50V7K
0708:Change to SB00000PZ00 / need apply footprint 0701 update 120K_0402_5% 6 9 C262 JP7 JP@
+5VALW VIN2 VOUT2
1 2 7 8 +5VS_OUT
+1.0VALW VIN2 VOUT2 +5VS
U25 +1.0VS C263
ME4856_SO8 .1U_0402_16V7K 15 JUMP_43X118
8 1 GPAD
2 7 2 2 APE8990GN3B DFN 14P DUAL LOAD SW
C264 6 3 C265 Modify R02
4.7U_0603_6.3V6K 5 4.7U_0603_6.3V6K
1 1
4
2
@
R241 VIH=1.2~5.5V Rise Time:
470_0603_5% 3.3V@82k/0.1uF=3.042ms 1.8V@330pF = 485.28us
+5VALW Modify R03 U26 JP8 JP@
3.3V@47k/0.1uF=1.893ms 1.35V@330pF = 363.96us
1
1 14 +1.8VS_OUT
+1.8VALW VIN1 VOUT1 +1.8VS
2 1 1.0VS_GATE +1.0VS_R R243 2 13
VIN1 VOUT1
1
R242 82K_0402_5% C266 JUMP_43X79
1K_0402_5% 1 D SUSP# 2 1 1.8VS_ON 3 12 2 1 330P_0402_50V7K
ON1 CT1
1
C268 2 SUSP
D .1U_0402_16V7K G C267 1 2 4 11
+5VALW VBIAS GND
SUSP 2 S Q14 @ 0701 update .1U_0402_16V7K
G 2 2N7002K_SOT23-3 2 1 1.35VS_ON 5 10 2 1
3
Q15 R244 ON2 CT2 330P_0402_50V7K
S
2 2N7002K_SOT23-3 Modify R03 47K_0402_5% 6 9 C269 JP9 JP@ 2
+1.35V
3
1 2 7 VIN2 VOUT2 8 +1.35VS_OUT

VIN2 VOUT2 +1.35VS
C270
.1U_0402_16V7K 15 JUMP_43X79
GPAD
APE8990GN3B DFN 14P DUAL LOAD SW
Modify R02
Reset Button / Battery discharge screw hole

Follow VA52_HB design
SW3
1 2 BI_GATE
Reset Button BI_GATE <27> +5VALW
3 SKPMAME010_2P 3
2
R245
100K_0402_5%
1
+3VLP
SUSP
<30> SUSP
1
2
D
R247 2
EC_RST# <23> <23,30,31,32> SUSP#
10K_0402_5% G Q16
1
S 2N7002K_SOT23-3
R246
1
3
6
D
10K_0402_5%
BI_GATE# 2 G
S Q17B
2
1
3
1
5
D
BI_GATE PH to +RTCVCC at PWR side BI_GATE G

C271
S 0.1U_0402_16V4Z
Q17A
4
DMN65D8LDW-7 2N SOT363-6 2
4 4

DC INTERFACE
Rev
Custom 1.0
A B C D E
A B C D
1 1
@ PJP101 EMI@ PL101

VIN
ACES_50305-00441-001_4P HCB2012KF-121T50_0805
DC_IN_S1 1 2
1
2
3
4
GND
1
GND
1
EMI@ PC102
100P_0603_50V8 EMI@ PC103
2
1000P_0603_50V7K
2
2 2
3 3
@PR111
@ PR111
0_0402_5%
1 2
+3VLP +CHGRTC
- PBJ101 @ + PR112
560_0603_5%
PR113
560_0603_5%
2 1 1 2 1 2
+RTCBATT
ML1220T13RE
4 4

DCIN / RTC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
Bay Trail M LA-B511P 1.0

A B C D
A B C D
Ezel battery conn

+3VLP
PJP201 EC_SMB_DA1 <23,28>
1
1 2 PR209 100_0402_1%
2 3 EC_SMDA 1 2 EC_SMB_CK1 <23,28>
3 4 EC_SMCK 1 2
4 5
1
TH PR208 100_0402_1% 2 1
5 6 +3VLP
BI_1 PR201 @ PC202
6 7 BATT_S1 6.49K_0402_1% 0.1U_0603_25V7K
2
7 8 1 2
8 9 BATT_TEMP <23>
1
PR210
1
GND 10 1K_0402_1% PR211
1
GND 0_0402_5% @ PR204 @ PR205

ACES_50458-00801-001 1 2 BI 10K_0402_1% 10K_0402_1%
2
1
Conn@ @ PU201
@ PR206 1 8
100K_0402_1% VCC TMSNS1
2 7 2 1
GND RHYST1
2
EMI@ PL201 MAINPWON 3 6 @ PR207
OT1 TMSNS2
1
HCB2012KF-121T50_0805 47K_0402_1%
1 2 BATT+ +RTCVCC 4
OT2 RHYST2
5
@ PH201
G718TM1U_SOT23-8 S THERM_ 100K 1% 0402 B25/50 4250K
<45,47>
2
1
EMI@ PC201
1000P_0402_50V7K
2
PR212
100K_0402_1%
1
D
BI_GATE 2
<25> BI_GATE G PQ205
2N7002KW_SOT323-3
S
3
2
For KB9012 For KB9022 Need confirm the setting 2
OTP OTP

For KB9022
sense 20m
Active Recovery
92 1.2V 1.0V
56 1.2V 1.0V
PR216 22.6K ohm32.4K ohm

40W 42.8W,0.43V 34.4W,0.43V
PR227 26.1K ohm30.9K ohm
+EC_VCCA
ADP_I <23,28>
3 3
1
PR216
16.9K_0402_1%
PR202
10K_0402_1%
2
<23> VCIN0_PH
B+ @ PR227
26.1K_0402_1%
<23,29> MAINPWON
1 2 VCIN1_PROCHOT <23>
@ PR223
@9022@ 162K_0402_1%
1
PR230 1 2 H_PROCHOT#_EC <23>

80.6K_0402_1%
B value:4250K1%
@9022@ PR231
2
0_0402_5%
1
1 2
VCIN1_BATT_DROP <23> PH202
S THERM_ 100K 1% 0402 B25/50 4250K
1
2
@9022@ PC203
2
1
PR203
0.1U_0402_25V6 @9022@ PR229 44.2K_0402_1%
1
2
10K_0402_1%
2
4 4
<23> ECAGND

BATTERY CONN / OTP
Custom Bay Trail M LA-B511P 1.0

A B C D
A B C D
Protection for reverse input
Vgs = 20V
1
PQ301 D
2 Vds = 60V B+
G Id = 250mA
S 2N7002KW _SOT323-3
3
PR301 PR302
1 2 1 2 Rds(on) typ = 35mohm max
1
Vgs = 20V Rds(on) = 35mohm max 1
1M_0402_5% 3M_0402_5% max Power loss 0.22W for 90W;0.12W for 65W system Vgs = 20V
Need check the SOA for inrush Vds = 30V CSR rating: 1W Vds = 30V
ID = 7.7A (Ta=70C)
VIN VACP-VACN spec < 80.64mV ID = 7.7A (Ta=70C)
P1 P2
1 1 8 PR303 EMI@ PL301 CHG_B+
2 2 7 0.02_1206_1% 1UH_NRS4018T1R0NDGJ_3.2A_30% 8 1
5 3 3 6 1 4 1 2 7 2
5 Isat: 4A 6 3
2200P_0402_25V7K
10U_0805_25V6K
10U_0805_25V6K
2 3 5
2200P_0402_50V7K
0.1U_0402_25V6
DCR: 27mohm
0.1U_0402_25V6
4
@EMI@ PC306
1
1
PC303
PC304
EMI@ PC305
PQ302 0_0402_5% PQ303
0.01U_0402_50V7K
PC301
@ PR304
4
1
1
AON6414AL_DFN8-5 AO4406AL_SO8 VIN PQ304
PC302
PC307
AO4406AL_SO8
2
2
VF = 0.5V
2
2
3
2
PD301
BQ24725A_ACDRV_1 BAS40CW _SOT323-3
0.1U_0402_25V6
BQ24725A_BATDRV 1 2BQ24725A_BATDRV_1
0.1U_0402_25V6
Rds(on) = 30mohm max
1
1
PC308
PR305
PC310
Vgs = 20V
1 1
1 2
10_1206_1%
PC311 4.12K_0603_1%
0.047U_0402_25V7K Vds = 30V
PR306
2
PC309 1 2
0.1U_0402_25V6
ID = 7A (Ta=70C)
VF = 0.37V
5
2.2_0603_5%
PR307
PD302 PQ305
BQ24725A_VCC2
RB751V-40_SOD323-2
PR308 7X7X3 Power loss: 0.32W for 3.5A
BQ24725A_ACP
0_0603_5%
BQ24725A_REGN
Isat: 3.8A CSR rating: 1W
BQ24725A_BST2
2
2
DH_CHG 1 2 4 2
BQ24725A_LX
VSRP-VSRN spec < 81.28mV
4.12K_0603_1%
4.12K_0603_1%
1
PC312 BATT+
PR309
PR310
DH_CHG
1 2
AON7408L_DFN8-5 PL302 PR311
3
2
1
1U_0603_25V6K 1 2 10UH_3.5A_20%_7X7X3_M 0.01_1206_1%
BQ24725A_ACN
BQ24725A_LX 1 2 CHG 1 4
2
PC313
5
1U_0603_25V6K 2 3
20
19
18
17
16
PU301 PQ306
CSON1
CSOP1
1
680P_0402_50V7K 4.7_1206_5%
VCC
PHASE
HIDRV
BTST
REGN
10U_0805_25V6K
10U_0805_25V6K
21
@EMI@ PC319 @EMI@ PR312

PAD
0.1U_0402_25V6
0.1U_0402_25V6
PC314
PC315
1
1
1 15 DL_CHG 4
ACN LODRV
PC316
PC317
2
2
2 14
ACP GND PR313 AON7408L_DFN8-5
3
2
1
2
1
BQ24725ARGRR_QFN20_3P5X3P5 10_0603_1%
BQ24725A_CMSRC 3 13 SRP1 2 CSOP1
CMSRC SRP
1
PR314
2
6.8_0603_1%
BQ24725A_ACDRV 4 12 SRN1 2 CSON1
2
ACDRV SRN PC318
0.1U_0603_16V7K
1 2 5 11 BQ24725A_BATDRV **Design Notes**
+3VLP ACOK BATDRV
PR315 100K_0402_1%
ACDET
#For 65 /90W system, 3S1P/3S2P battery
IOUT
SDA
SCL
ILIM
Maximum Charging current 3.5A
<23,9> ACIN Maximum Battery discharge power 55W.
#Register Setting
6
10
+3VALW
3 3
1. 0X12 bit8 set 0 (default 1) to disable IFAULT HI if add ISN choke
BQ24725A_ACDET
BQ24725A_ILIM 1 2 #Circuit Design

BQ24725A_IOUT
PR316
1. ACOK,ILIM pull high voltage need base on 3/5V enable control
100K_0402_1%
316K_0402_1%
0.01U_0402_25V7K
1
2. Use 10X10 choke and 3X3 H/L Side MOSFET
PC320
PR317
1
PR318 Charge current 3.5A
422K_0402_1%
1 2 Power loss : 1.82W
VIN
2
Power density : 0.81 (15X15)
2
3. If use 4S per cell 4.35V battery, need additional circuit

for ACDET(PR218/PR220/PR222 change to 0.1%, parallel resistors
with PR222 for ACDET setting)
4. PC223 0.22U can't be changed. (Wrong adapter concern)
5. For the design, need double confirm PQ202,PQ203,PQ204 rating
#Protect function
0.22U_0402_16V7K
66.5K_0402_1%
Vin Dectector EC_SMB_CK1 <23,27> 1. ACOVP : ACDET voltage > 3.14V

100P_0402_50V8J
1
2. Charger timeout : No communication within 175s(default)

PC321
1
PC322
PR319
Min. Typ Max. 3. ACOC : 3.33 X Input current DAC setting(default)

L-->H 17.16V 17.63V 18.12V 4. CHGOCP : 3/4.5/6A based on current current setting
2
EC_SMB_DA1 <23,27>
2
H-->L 16.76V 17.22V 17.70V @ PR320 5. BATOVP : 103-106%

2
0_0402_5% 6. BATLOWV : 2.5V

1 2
ADP_I <23,27> 7. TSHUT : 155C
VILIM = 20*ILIM*Rsr
1
ILIM = 3.3*100/(100+316)/20/0.01 8. IFAULT HI : 750mV (default)

@ PC323
= 3.966 A 9. IFAULT LOW : 150mV (default)
100P_0402_50V8J
2
4
Close EC chip 4

Charger

A B C D
A B C D E
1 1
EN1 and EN2 dont't floating

PR402
499K_0402_1%
ENLDO_3V5V 1 2
B+
1
150K_0402_1%
PU401
B+
PR404
EMI@ PL401 7 1 3V5V_EN PC402 PR403
HCB2012KF-121T50_0805 EN2 EN1 0.022U_0402_25V7K 1K_0402_5%
2200P_0402_50V7K
1 2 3V_VIN 8 3 3V_FB 1 2 1 2
IN FB PR401 PC403
2
10U_0805_25V6K
10U_0805_25V6K
@EMI@ PC401
EMI@ PC404
0.1U_0402_25V6
6 1
BST_3V 2 1 2
BS
1
1
PC406
1_0603_5%
PC405
0.1U_0603_25V7K
PL402
2
2
10 LX_3V 1 2
@ LX +3VALWP
9 4 1.5UH_PCMB053T-1R5MS_6A_20%
GND OUT
@EMI@
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
PR405
1
1
680P_0603_50V7K 4.7_1206_5%
2 5
+3VALWP PG LDO +3VLP
@ PC407
PC408
PC409
PC410
1
SY8208BQNC_QFN10_3X3
2
PC411
1 3V_SN
4.7U_0603_6.3V6M
2
1
PR412
100K_0402_5% 3.3V LDO 150mA~300mA
@EMI@
PC412
2
2
2 2
Vout is 3.234V~3.366V
<23,31,32> SPOK
TDC=6A
@ PJ401
+3VALWP 1 2 +3VALW
1 2
JUMP_43X118
B+ EMI@ PL403 EN1 and EN2 dont't floating
HCB2012KF-121T50_0805
1 2 5V_VIN
@ PJ402
+5VALWP 1 2 +5VALW
1 2
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
PU402 PC413 PR406 JUMP_43X118

8 1 3V5V_EN 6800P_0402_25V7K 1K_0402_5%
Vout is 4.998V~5.202V
IN EN 1 2 1 2
1
1
PC414
PC415
EMI@ PC417
@EMI@ PC418
3 5V_FB @ PR407 PC416

FB 0_0603_5% 0.1U_0603_25V7K
TDC=6A
6 BST_5V 1 2 1 2
2
BS
@
PL404
9 10 LX_5V 1 2 +5VALWP
GND LX
@EMI@ PC425 @EMI@ PR408

VCC_3V 5 4 1.5UH_PCMB053T-1R5MS_6A_20%
VCC OUT
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
680P_0603_50V7K 4.7_1206_5%
1
SPOK 2 7
PG LDO VL
1
PC419
PC420
PC421
PC422
PC423
3 3
4.7U_0603_6.3V6M
SY8208CQNC_QFN10_3X3
2
1 5V_SN
2
2
1
PC424
4.7U_0603_6.3V6M
2
PR409
2.2K_0402_5%
1 2 5V LDO 150mA~300mA
<23> EC_ON
@PR410
@ PR410
1 2
<23,27> MAINPWON 0_0402_5%
3V5V_EN
1M_0402_1%
4.7U_0402_6.3V6M
1
EC VDD0 is +3VL, PC426 UNPOP

1
PR411
PC426
EC VDD0 is +3VALW, PC426 POP

VC 0/1 controlled by SW method so pop.
2
2
4 4

3VALW/5VALW
A B C D E
5 4 3 2 1
D D
Pin19 need pull separate from +1.35VP.

If you have +1.35V and +0.675V sequence question, 0.675Volt +/- 5%
EMI@ PL501 you can change from +1.35VP to +1.35VS. TDC 0.84A
HCB2012KF-121T50_0805
B+ 1 2 1.35V_B+ PR501 Peak Current 1.2A
2.2_0603_5%
BST_1.35V 1 2 BOOT_1.35V
+1.35VP
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
1
1
@EMI@ PC502 DH_1.35V +0.675VSP
EMI@ PC503
PC504
PC505
2
1
PC501 SW _1.35V
10U_0805_6.3V6K
10U_0805_6.3V6K
0.1U_0603_25V7K
1
PC506
PC507
5
16
17
18
19
20
C PU501 C
2
VLDOIN
PHASE
UGATE
BOOT
VTT
21
COMMON PART PQ501
AON7408L_DFN8-5 4 DL_1.35V 15
LGATE VTTGND
PAD
1
14 2
PL502 PR502 PGND VTTSNS
1
2
3
1UH_11A_20%_7X7X3_M 9.1K_0402_1%
1 2 1 2 CS_1.35V 13 3
+1.35VP PC508 CS RT8207MZQW _W QFN20_3X3 GND
1
1U_0603_10V6K
1 2 12 4 VTTREF_1.35V
VDDP VTTREF
5
@EMI@ PR503 PR504
SF000002Z00 H=4.5
1
1 4.7_1206_5% 5.1_0603_5%
COMMON PART
330U_2.5V_ESR17M_6.3X4.5
1 2 VDD_1.35V 11 5 PC510
+5VALW +1.35VP
1 2
+ VDD VDDQ 0.033U_0402_16V7K
PGOOD
PC509
2
ESR=15m ohm
TON
1
@EMI@ PC512 4
FB
S5
S3
2 680P_0402_50V7K PC513
+5VALW
2
1U_0603_10V6K
10
6
PQ502
1 2
+1.35VP
1
2
3
FB_1.35V
AON7506_DFN33-8-5
EN_0.675VSP
EN_1.35V
PR505 100K_0402_5% PR506
TON_1.35V
8.06K_0402_1%
<6> DDR_PW ROK 2 1 +1.35VP
PR507
B 887K_0402_1% B
MOSFET: 3x3 DFN 1.35V_B+ 1 2
1
Co-Lay H/S Rds(on): 27mohm(Typ), 34mohm(Max)
Idsm: 7.5A@Ta=25C, 5.5A@Ta=70C PR509 PR508
680K_0402_1% 10K_0402_1%
1 2
<23> SYSON
2
Mode Level +0.675VSP VTTREF_1.35V L/S Rds(on): 9.9mohm(Typ), 13mohm(Max)
S5 L off off Idsm: 13.5A@Ta=25C, 11A@Ta=70C
1
@ PC514
S3 L off on 0.1U_0402_16V7K
S0 H on on Choke: 7x7x3
2
Rdc=8.3mohm(Typ), 10mohm(Max)
Note: S3 - sleep ; S5 - power off PR510
200K_0402_1%
Switching Frequency: 285kHz 1 2
Ipeak=10A <23,25,31,32> SUSP#
Iocp~13A
1
PC515
OVP: 110%~120% D
1
0.1U_0402_16V7K
VFB=0.75V, Vout=1.515V 2
2
<25> SUSP G
MOSFET footprint: SIS412DN
S
3
PQ503 @ PJ503
2N7002KW _SOT323-3 1 2
+0.675VSP 1 2 +0.675VS
A
JUMP_43X39 A

1.35VP/0.675VSP

5 4 3 2 1
5 4 3 2 1
D D
EN pin don't floating

If have pull down resistor at HW side, pls delete PR2
PR602
10K_0402_1%
1 2 SPOK
SPOK <23,29,32>
C C
1
PC602
PR603 0.1U_0402_16V7K
1M_0402_1%
2
2
@EMI@ PR604 @EMI@ PC603
4.7_1206_5% 680P_0603_50V7K
EMI@ PL601 1 2SNB_1.0V 1 2
HCB2012KF-121T50_0805 PU601
B+ 1 2 B+_1.0V 8
IN EN
1 @ PR601
0_0603_5%
PC601
0.1U_0603_25V7K
TDC 8A
10U_0805_25V6K
10U_0805_25V6K
6 BST_1.0V1 2 1 2 PL602
0.1U_0402_25V6
2200P_0402_50V7K
BS
1
1.5UH_PCMC063T-1R5MN_9A_20%
PC606
PC604
PC607
LDO_3V 9 10 LX_1.0V 1 2
+1.0VALWP
PC605
GND LX
@EMI@
2
2
EMI@
@
COMMON PART
13.7K_0402_1%
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
330P_0402_50V7K
1
1
4
PR606
@ PR605 FB
PC608
PC609
PC610
PC611
PC612
0_0402_5% ILMT_1.0V 3 7
Rup
+3VALW
2
ILMT BYP
2
2
4.7U_0603_6.3V6K
ILMT_1.0V
+3VALW 1 2 +1.0V_PGOOD 2 5 LDO_3V
4.7U_0603_6.3V6K
PG LDO
1
PR608
PC614
1
10K_0402_5% SY8208DQNC_QFN10_3X3
PC613
@ PR607 FB = 0.6V
2
1
0_0402_5%
2
PR609
Rdown
2
20K_0402_1%
2
Pin 7 BYP is for CS. VFB=0.6V
B
The current limit is set to 8A, 12A or 16A when this pin Common NB can delete +3VALW and PC614 B
is pull low, floating or pull high Vout=0.6V* (1+Rup/Rdown)
Vout=1.011V +1.0VALWP PJ601
1 2 +1.0VALW
1 2
JUMP_43X118 @
+3VS PR610
2.55K_0402_1%
+1.05VSP_ON 1 2
SUSP# <23,25,30,32>
1
0.1U_0402_16V7K
@ PR611
PC615
100K_0402_5% @ PR612
1M_0402_5%
Note:Iload(max)=2.5A
2
PU602
9
1 PGND 8
FB SGND
2 7 PL603
@ PJ602 PG EN 1UH_2.8A_30%_4X4X2_F
+3VALW 1 2 3 6 LX_1.05V 1 2
1 2 IN LX +1.05VSP
COMMON PART
1
JUMP_43X79 4 5
68P_0402_50V8J
PGND NC
1
PC616
@EMI@ PR613
4.7_0603_5%
22U_0805_6.3VAM
PC617
22U_0603_6.3V6M
22U_0603_6.3V6M
2
SY8003DFC_DFN8_2X2 PR614
15K_0402_1%
Rup
PC618
PC619
2
2
@ PJ603
FB_1.05V 1 2
A +1.05VSP 1 2 +1.05VS A
JUMP_43X79
1
1
FB=0.6V
@EMI@ PC620
680P_0402_50V7K
Note:Iload(max)=3A PR615
Rdown
20K_0402_1%
2

1.05VS/1.0VALW
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C Bay Trail M LA-B511P 1.0

5 4 3 2 1
5 4 3 2 1
+3VALW
1
1
@ PJ701
JUMP_43X79
2
2
D
Ultra Low Dropout 0.23V(typical) at 3A Output Current D
1
@ PC702
1U_0402_6.3V6K
2
PC703 PU701
1
4.7U_0805_6.3V6K APL5930KAI-TRG_SO8
6
5 VCNTL 3
PJ702
2
PR701 9 VIN VOUT 4 @
51K_0402_1% VIN VOUT
+1.5VSP +1.5VSP 1
1 2
2 +1.5VS
20K_0402_1%
SUSP# 1 2 8
<23,25,30,31> SUSP#
7 EN
1
1 2 2 JUMP_43X79
+3VS
GND
POK FB
PR703
PC704
@ PR702 Rup 0.01U_0402_25V7K
2
1
1
PC701 100K_0402_5% PC705
2
0.15U_0402_10V6K @ PR704 22U_0603_6.3V6M
22K_0402_5%
2
2
1
PR705
Rdown 22.6K_0402_1%
2
C C
+3VALW
Vout=0.8V* (1+Rup/Rdown)=1.507V
1
Ultra Low Dropout 0.23V(typical) at 3A Output Current
1
@ PJ703
JUMP_43X79 2
2
@ PC706
1U_0402_6.3V6K
2
PC707 PU702
1
4.7U_0805_6.3V6K APL5930KAI-TRG_SO8
6
B 5 VCNTL 3 B
PJ704
2
PR706 9 VIN VOUT 4 @

20K_0402_1% VIN VOUT
+1.8VALWP +1.8VALWP 1
1 2
2 +1.8VALW
20K_0402_1%
1 2 8
<23,29,31> SPOK
7 EN
1
1 2 2 JUMP_43X79
+3VS
GND
POK FB
PR708
PC709
1
@ PR707 0.01U_0402_25V7K
0.1U_0402_16V7K
Rup
1
PC708
@ PR709 100K_0402_5% PC710

1
2
22K_0402_5% 22U_0603_6.3V6M
2
2
2
1
PR710
Rdown 15.8K_0402_1%
2
Vout=0.8V* (1+Rup/Rdown)=1.81V
A A

1.5VSP/1.8VALWP

5 4 3 2 1
A B C D E
Layout Note
Reduce Acoustic Noise
1. The AL bulk capacitor of B+ should be very
1
@ PC802 close to CPU_CORE MOSFET.
1000P_0402_50V7K 2. Input ceramic caps must place on symmetry
<11> VGFX_VSNS
2
same location on top side and bottom side.
1
+CPU_B+
PC803
0.01UF_0402_25V7K
10U_0805_25V6K
10U_0805_25V6K
1
1
PC805
PC806
1 1
2
5
PC804
6800P_0402_25V7K
OCP setting=21A
1 2 PR804
2K_0402_1%
1
PC807 PC808 0_0603_5%
120P_0402_50V8 470P_0402_50V7K UGA_GFX 1 2 UGA_GFX-1 4 0.36uH DCR= 1.4+-5% m ohm, Idc~Isat= 16.8~24A
PR802
1 2 1 2 1 2
Close GFX choke PR803
PQ803
AON7518_DFN8-5
PR805 PC809 499_0402_1% PL802 +SOC_VNN
2
COMMON PART 324_0402_1% 1000P_0402_50V7K 0.36UH_PDME064T-R36MS_24A_20%
3
2
1
VSUMG- 1 2 1 2 1 2 1 2
PR806 PHASEA_GFX 1 4
1
PH802 137K_0402_1% PR807
@EMI@ PR813
4.7_1206_5%
0.1U_0402_16V7K
10K_0402_1%_B25/50 3370K 2.05K_0402_1% PC813 2 3
5
21K_0402_1%
PR808 BOOTA_GFX 1 2 1 2
0.1U_0402_16V7K
1
1
11K_0402_1%
PC810
PR809
0.047U_0402_25V7K
2K_0402_1% PR812
Design Note
1
2.2_0603_5% 0.1U_0603_25V7K
PC811
2
1 2
1
This circuit is for ULV 1+1 17W.
PC812
PR811
2
2.61K_0402_1%
2
1
1
CPU: IccMax=33A, TDC=16A(TDP NOM) +3VALWP
PC814 LGA_GFX 4
1 2
1
680P_0402_50V7K
PQ804
PR810
1000P_0402_50V7K
Loadline: -2.9 m V/A
@EMI@ PC815
AON6554_DFN5X6-8-5 PR814 PR815
3.65K_0603_1%
1.91K_0402_1%
1_0402_5%
Output Cap. follow Intel PDDG
1
VSUMG+
3
2
1
2
330uF/9m*3, 22uF_0805*12, 2.2uF_0402*16 Rds=13.5m(Typ)
2
GFX(GT2): IccMax=33A, TDC=21.5A 16.5m(Max)
VSUMG+
VSUMG-
2
Loadline: -3.9 m V/A
Output Cap. follow Intel PDDG
PR816
BOOTA_GFX
330uF/9m*2, 22uF_0805*6, 10uF_0603*6 , 1uF_0402*11 UGA_GFX
PHASEA_GFX
Close GFX L/S MOS LGA_GFX +5VALW
PR817 PU801
33
32
31
30
29
28
27
26
25
27.4K_0402_1% PR817 and PR826
1 2
ISUMPG
ISUMNG
RTNG
FBG
COMPG
PGOODG
BOOTG
UGATEG
PAD
27.4K ohm for 100 degree
1U_0402_6.3V6K
2 NTCG_1 2
PH803 PR818 61.9K ohm for 110 degree
1
3.83K_0402_1%
1
1 2 1 2 1 24 @ PR819 PR821
@PR819
PC816
NTCG PHASEG
@PR820
@
1
PR820
2
COMMON PART 2 23
0_0402_5% 1_0402_5%
+CPU_B+
2
<23> VR_ON 470K_0402_5%_B25/50 4700K VR_ON LGATEG EMI@ PL801
2
2
0_0402_5% 1 PR843 2 3 22 HCB2012KF-121T50_0805
<9> VR_SVID_CLK SCLK VCCP 1 2
20_0402_1% B+
1U_0402_6.3V6K
PR844 SVID_ALERT# 4 ISL95833BHRTZ-T_TQFN32_4X4 21
<9> VR_SVID_ALERT# ALERT# VDD
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
16.9_0402_1% 1
33U_25V_M
2200P_0402_50V7K
@EMI@ PC823
EMI@ PC821
PC822
1 2 SVID_DATA 5 20
<9> VR_SVID_DATA SDA PWM2
1
PC819
PC820
+
PC817
6 19
Height 8 mm
LG1_CPU
<23> VR_HOT# VR_HOT# LGATE1 100u_SF000000I80
2
NTC 7 18 PHASE1_CPU 2@
NTC PHASE1 Height 6 mm
For VR_HOT#, already @PR823
@ PR823
1 2 8 17 UG1_CPU 68u_SF000000W00
PGOOD
BOOT1
pull high at power side.
ISUMN
ISUMP
COMP
ISEN2 ISEN1 UGATE1
69.8_0402_1%
499_0402_1%
69.8_0402_1%
RTN
1
@ PC818 0_0402_5% BOOT_CPU
FB
PR801
PR824
PR825
3.83K_0402_1%
47P_0402_50V8J
1
+5VALW
2
10
11
12
13
14
15
16
PR829
@
2
VGATE <23>
1 2 +1.8VALW
+1.0VS
1
27.4K_0402_1%
1
PR826
PR827
@PC801
@ PC801 1.91K_0402_1%
0.1U_0402_16V7K
2
+CPU_B+
2
PH801
470K_0402_5%_B25/50 4700K
COMMON PART
5
Close CPU L/S MOS
3
OCP setting=18A 3
PR828
0_0603_5%
VDD source use +5VS and PGOOD source use +3VS UG1_CPU 1 2 UG1_CPU-1 4 0.36uH DCR= 1.4+-5% m ohm, Idc~Isat= 16.8~24A
PQ801
Please confirm power on and down sequence, AON7518_DFN8-5
make sure VGATE after CPU_CORE on. PL803 +SOC_VCC
0.36UH_PDME064T-R36MS_24A_20%
3
2
1
PC826 PR834 PR835 VSUM+ PHASE1_CPU 1 4
2.61K_0402_1%
680P_0402_50V7K 2K_0402_1% 66.5K_0402_1%
680P_0402_50V7K 4.7_1206_5%
1 2 1 2 1 2 PC824 2 3
5
PR836
@EMI@ PR831
BOOT_CPU 1 2 1 2
11K_0402_1%
PR830
2K_0402_1%
0.047U_0402_25V7K
2.2_0603_5% 0.1U_0603_25V7K
1
PR838
PC827 PC828
0.1U_0402_16V7K
2
1
PC829
470P_0402_50V7K 120P_0402_50V8
1
1
3.65K_0603_1%
1 2 1 2 1 2 LG1_CPU 4
PC830
1
1
280_0402_1%
PR837 PQ802
Close CPU choke
1
PR839
PR832
499_0402_1% AON6554_DFN5X6-8-5 PR833
2
1
PR840
@EMI@ PC825
1_0402_5%
2
6800P_0402_25V7K
PH804
3
2
1
2
1
PC832
PR841 PC831 10K_0402_1%_B25/50 3370K Rds=13.5m(Typ)

2
2
1.78K_0402_1% 1000P_0402_50V7K
1 2 1 2 1 2
COMMON PART 16.5m(Max)
VSUM+
2
VSUM-
PR842
137K_0402_1% VSUM-
0.1U_0402_16V7K
1
PC833
Layout Note <11> VCORE_VSNS @ PC834

SVID routing 330P_0402_50V7K
2
1 2
1. Alert# signal must be routed between
the Clock and Date lines to reduce the cross
talk between them. Signal order arrangement: 1 2 Cn = L/((Rntcnet*Rsum)/(Rntcnet+Rsum))*DCR)
mobile order is Clock-Alert-Date. PC835
If Cn is correctly selected, when the load current has a
4 4
0.01UF_0402_25V7K square change, the output voltage also has a square response.
2. SVID spacing requirement is 18mils(0.475mm).
<11> VCORE_GSNS
3. Maximum total microstrip routing length of

each SVID signal must not exceed 6000mils(152.4mm).
4. The SVID bus must be ground reference, It cannot be
referenced to input (Vbat or 12V) power plans as they can
couple noise into the SVID bus as power states change.
5. Avoid routing under noisy circuit, e.g. switch node , Security Classification Compal Secret Data Compal Electronics, Inc.
Gate driver, B+, Vin, high speed signal. Issued Date 2013/9/25 Deciphered Date 2014/09/25 Title
6. When SVID signal changes Layer, GND return path
CPU_CORE/GFX_CORE
may be changed also. We need add GND via for GND AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size
R&D Document Number Rev
reference.

A B C D E
5 4 3 2 1
3 X 330u/9m(47W)
PWR Rule
SPEC. 2 X 330u/9m(37W)
24 pcs 22uF and reserve 4 pcs
2013/08/16
Modify 8/6.
D D
+SOC_VCC =+CPU_CORE +SOC_VNN =+VGFX_CORE

+SOC_VNN
+SOC_VCC
PC913 1 2 22U_0603_6.3V6M
PC903 1 2 22U_0603_6.3V6M PC914 1 2 22U_0603_6.3V6M
PC904 1 2 22U_0603_6.3V6M PC915 1 2 22U_0603_6.3V6M
Output Cap PC905 1 2 22U_0603_6.3V6M Output Cap PC916 1 2 22U_0603_6.3V6M
PC906 1 2 22U_0603_6.3V6M
(330uF*2+22uF*4) (330uF*3+22uF*4) PC917 2 1 330U_D2_2V_Y
PC901 2 1 330U_D2_2V_Y
+
PC918 2 1 330U_D2_2V_Y
+
PC902 2 1 330U_D2_2V_Y
+
@ PC919 2 1 330U_D2_2V_Y
+
+SOC_VCC
+
Package Edge Cap PC929 1 2 22U_0603_6.3V6M
(22uF*3) PC907 1 2 22U_0603_6.3V6M +SOC_VNN
PC930 1 2 22U_0603_6.3V6M
PC920 1 2 10U_0603_6.3V6M
C PC908 1 2 10U_0603_6.3V6M Package Edge Cap PC921 1 2 10U_0603_6.3V6M C
PC922 1 2 10U_0603_6.3V6M
Back Side Cap PC909 1

PC910 1
2 10U_0603_6.3V6M
2 10U_0603_6.3V6M
(22uF*3)
(10uF*1+4.7uF*2+2.2uF*2) PC911 1
PC912 1
2 2.2U_0402_6.3V6M
2 2.2U_0402_6.3V6M PC923 1 2 1U_0402_6.3V6K
PC924 1 2 1U_0402_6.3V6K
PC925 1 2 1U_0402_6.3V6K
Back Side Cap

@ PC926 1 2 0.1U_0402_16V7K
(1uF*3) @ PC927 1
@ PC928 1
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
B B
A A

CPU/GFX capacitor

5 4 3 2 1
5 4 3 2 1
Version change list (P.I.R. List) Page 1 of 2

for PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
1 Improve ripple voltage 30 Change PL602 from SH00000YE00 to SH000008800 12/30 DVT
2 Improve part rating 33 Change PC901,PC902,PC917,PC918 from
D
SGA000026800 to SGA20331E10 12/31 DVT D
3 HW request Use bead(L22) individ 29 Delete PJ501, PJ502 01/07 DVT

4 Unify VC0/VC1 setting 26 Change PR202, PR203, PR216 01/08 DVT
5 Raise part rating 32 Change PR814, PR832 size from 0402 to 0603 01/10 DVT
6 Prevent burn issue 27 Change PQ303, PQ304 from AO4466L to AO4406AL 01/10 DVT
7 Customer request 26 Change PR211 from 100 to 0 01/29 PVT
8 VC 0/1 controlled by sw method 28 Pop PC426 01/29 PVT
9 Meet EC request 32 Change +1.8VALW for VGATE pull high 02/18 PVT
10
11
12
13
14
C
15 C
B B
12
13
14
15
16
A 17 A

PWR_PIR
5 4 3 2 1
5 4 3 2 1
Z5W1M_DVT Power Sequence AC mode

2014-02-21
BIOS:v0.07
EC:v0.07 G3->S0 S0->S3 S3->S0 S0->S5
ACIN
ACIN
+3VLP
+3VLP 220us
EC_ON
EC_ON 1.14ms
D D
+3VALW
+5VALW 2.14ms
+5VALW
+3VALW
SPOK
SPOK 5.84ms
+1.0VALW
+1.0VALW 6.66ms
+1.8VALW
+1.8VALW
ON/OFF
ON/OFF 11ms
232ms EC_RSMRST#
EC_RSMRST#
123ms PBTN_OUT#
PBTN_OUT#
23.6ms EC_SLP_S4#
EC_SLP_S4#
23.6ms EC_SLP_S3#
EC_SLP_S3#
204ms
217.6ms SYSON
SYSON 2.4ms
3.29ms
+1.35V
C
+1.35V 4.8ms
C
3.29ms
92.00ms DDR_PWROK
DDR_PWROK 24.9ms 22.32ms 36.20ms
VR_ON
VR_ON 2.52ms 2.40ms
9.00ms 10.8ms
+SOC_VCC
+SOC_VCC 2.52ms 2.40ms
26.00ms
34.00ms +SOC_VNN
+SOC_VNN 2.52ms 2.52ms
VGATE
VGATE 27.7ms 27.30ms
40.80ms 48.8ms
SUSP#
SUSP# 140us 31.12us
10.20ms 9.50ms
+1.0VS
+1.0VS 1.90ms 1.8ms
4.2ms 4.6ms
+1.05VS
+1.05VS 1.48ms 1.46ms
18.90ms 12.4ms
+1.35VS
+1.35VS 2.42ms 2.42ms
22.20ms 21.70ms
+1.5VS
+1.5VS 2.26ms 2.22ms
16.30ms 16.20ms
+1.8VS
+1.8VS 3.08ms 3.04ms
56.40ms
50.7ms +3VS
+3VS 4.00ms 3.92ms
B 41.18ms 30.50ms B
+5VS
+5VS 8.1ms 8.16ms
5.00ms
1.6ms +0.675VS
+0.675VS 32ms 39.36ms
149.6ms
152.4ms KBRST#
KBRST# 92ms 60.20ms
172.4ms
PMC_CORE_PWROK
PMC_CORE_PWROK 93ms 60.20ms
172.4ms
20.4ms DDR_CORE_PWROK
DDR_CORE_PWROK 99.4ms 116ms
8.8ms SUSP#
PMC_PLTRST#
PMC_PLTRST#
44.3ms
A A

Power Sequence
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C Bay Trail M LA-B511P 1.0

5 4 3 2 1
5 4 3 2 1
Version Change List ( P. I. R. List ) Page 1

Request
Item Page# Title Date Issue Description Solution Description Rev.
Owner
1 P.08 12/17 HW SLP_S3# leak voltage Change Q21 direction 0.2
D D
2 P.09 12/17 HW GPIO_S0_SC_56 pull down no vedio. Pop R53, unpop R55 0.2
Touch screen and touch pad SMbus net fail Change Q2.1 to SOC_I2C5_CLK
Change Q3.1 to SOC_I2C2_CLK
NO support CPU Thermal sensor Unpop U28
3 P.14 1/6 HW U9 DP to LVDS chip old symbol Link CIS for SA00007A300 0.2
4 P.18 1/6 HW U14 Lid switch old symbol Link CIS for SA000079D00 0.2
5 P.19 1/6 HW Vendor request to meet Acer spec Change R188,R192 from 47ohm to 60.4ohm 0.2
ESD ESD test Fail Add C277,C278,L19,L20 for RING2 & SLEEVE
Change D9 pin2.3 name to RING2_L & SLEEVE_L
C R13,R71,R72,R118,R119,R120,R121,R122, C
6 P.6,8,11,15, 1/6 HW 0 ohm R-short
R123,R124,R125,R34,R36,R200,R254,R255, 0.2
16,17,19,22
R172,R187,R193,R167,R168,R169,R170,
R187,R193,R107,R108,R212
7 P.17 1/6 HW Change LAN power Unpop U19,C188 0.2

Pop R160,R200
change R200.2 from LAN_PWR_EN to LAN_GPO
Change C204,C205 from 12pF to 10pF
8 P.22 1/6 HW Add EC GPIO Add LAN_GPO for U22.pin106 0.2

Board ID Change R211 to 12K
9 P.15 1/6 ESD Add D13 0.2

B B
10 P.21
1/6 HW Change USB HUB to GL850S Delete U18,R152~R157,C182~C187,Y3 0.2
Add U29,R259~R263,C279~C287,Y5
11 P.19
1/6 HW BOM Change C215,C273 from SE107105ML0 to SE080105K80
0.2
Change R34.2 from TS_INT#_CPU to SOC_TS_INT#

12 P.8 1/6 HW
Change R36.2 from TP_INT#_CPU to SOC_TP_INT# 0.2
Add L21,L22 for EMI

13 P.13 1/7 EMI
Change net name to +1.35V_L 0.2
C91~C102,R77,R75,(JDIMM1 pin75,76,81,82,87,88,
A
93,94,99,100,105,106,111,112,117,118,123,124) A
14 P.23 1/7 HW Add U30,C288,C289,R264 for +3V_TP

0.2
Change JTP1.8,R233.2,R225.2,R227.2 to +3V_TP
EE P.I.R (1)
5 4 3 2 1
5 4 3 2 1

Request
Owner
15 P.24 01/07 HW BOM Change U24,U26 to SA00006FD00 0.2
D D
16 P.9,23 01/08 HW BOM Delete TP@ BOM structure ==> 0.2

C255,Q11,R223,R225,R227,R230,R63,R64,Q3
R-short==>R34,R36,R200,R254,R255,R172,R187,
17 P.8,15,17 01/08 HW BOM 0.2
R193,R167,R168,R169,R170,R187,R193,R107,R108,
19,22
R212,R150,R151,R248,R249
Pop U30,C288,C289
18 P.23 01/08 HW BOM 0.2
Unpop R264
Pop U30,C288,C289
P.08
Unpop R264
C 19 P.23 01/08 HW Change U30.3 from SYSON to TP_PWR_EN 0.2 C
P.22 Add U22.98 TP_PWR_EN
20 P.21 01/08 ME JUSB2 Link CIS symbol ==> ACES_51524-0140N-001 0.2
21 P.21 01/13 HW USB2.0 port0

USB2.0 port1

USB3.0
USB HUB
conn. 0.2
22 P.9,14 01/14 HW Change RP10,RP11 to 2.2K_0804_8P4R 0.2
23 P.15 01/14 HW BOM ETS@ BOM structure ==> R101,R102,R113,R114 0.2

B B
24 P.21 01/16 HW BOM BOM structure==>Add U16,R257 to TPM@ 0.2
25 P.09 02/18 HW BOM For +1.8VS abnormal voltage 0.3

Pop R28
26 P.20 02/18 HW For HP pop noise 0.3
Change R188,R192 to 0ohm
Change R187,R193 to 60.4ohm
For TP
27 P.24 02/18 HW 0.3
Change R205,R206 to +3V_TP
Change JTP1 pin define
For Board ID
28 P.23 02/18 HW 0.3
Pop R219
Change R221 to 15K
A For +1.0 VS A
29 P.25 02/18 HW 0.3
Pop C268, Change R242 to 1K
unpop SW2
30 P.24 02/18 HW 0.3
EE P.I.R (2)
5 4 3 2 1
5 4 3 2 1

Request
Owner
D
31 P.20,24 02/21 ME JKB2,JBL1,JDMIC1 .
Change footprint to XXXX-S
0.3
D
32 P.9,21,22,23 02/21 HW R-short R40,R96,R143,R142,R259,R198,R199,R220 0.3
32 P.9 02/21 HW Add JCMOS2 0.3
33 P.24 02/21 ME Chang

R231,R233 to 100 ohm 0.3
Change R232,R234 to 470 ohm
34 P.22 02/24 HW Change USB HUB to GL850G 0.3

Add U31,R265,R266,R267
Delete U29,R262
35 P.09 02/25 HW 32.768KHz 0.3
C Change C17,C18 to 18pF C
36 P.17,20,25 02/26 HW Change Q9,Q17,Q18 from SB00000DH00 0.3

to SB00000ZU00
37 P.16 03/12 HW R-short R88 1.0
38 P.23 03/13 HW For Board ID 1.0

Change R221 from 15K to 20K
39 P.24 03/13 HW Change SW1 from DBG@ to @ 1.0
B B
A A

EE P.I.R (2)
5 4 3 2 1
www.s-manuals.com

Compal La-B511p r1.0 Schematics

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Compal La-B511p r1.0 Schematics

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A B C D E

Model Name : Z5W1M

EA52_BM UMA M/B Schematics Document

port 0 port 1 port 1 USB 3.0 Conn Touch Panel

SATA HDD Conn. P.22

Security Classification Compal Secret Data Compal Electronics, Inc.

Voltage Rails Board ID / SKU ID Table for AD channel

Item BOM Structure Item BOM Structure

Security Classification Compal Secret Data Compal Electronics, Inc.

BG25 SOC_I2C2_DATA I2C2_SDA_TP

Dual channel NMOS

Dual channel NMOS

Dual channel NMOS

77 EC_SMB_CK1 100 ohm 7

Security Classification Compal Secret Data Compal Electronics, Inc.

SPOK SY8208DQNC 325mA SUSP ME4856-G 2750mA

ADAPTER SYSON RT8207MZQW 5250mA SUSP# 420mA

LAN_PWR_EN G5243AT11U ENVDD G5243AT11U

EC_ON SY8208BQNC 10050mA SUSP# TPS22966DPUR 1000mA 1050mA

USB_PWR_EN# SY6288D10CAC 1500mA

Security Classification Compal Secret Data Compal Electronics, Inc.

2 1 DDR_CORE_PWROK FH8065301546401_FCBGA131170 FH8065301546401_FCBGA131170

Close To SOC Pin

GPIO_NC13 A29 RESERVED_V6 GPIO_S0_NC_16 D28

GPIO_S0_NC_23 J34 0_0402_5% R13

From check list:

Security Classification Compal Secret Data Compal Electronics, Inc.

BF6 AY7 PCIE_PTX_DRX_P0 .1U_0402_16V7K 1 2 C5

Security Classification Compal Secret Data Compal Electronics, Inc.

1 3 XTAL_25M_OUT ICLK_ICOMP AD14 BF34

2 SP@ SP@ 1 C22

SOC_SPI_MOSI 2 7 SPI_MOSI Q19

Pull High at EC side BH28 SOC_I2C5_DATA

3 4 PCU_SMB_CLK BH10 PCU_SMB_DATA / GPIO_S0_SC_51 SIO_I2C5_CLK / GPIO_S0_SC_89 I2C5_SCL_PNL <16>

Q4A PCU_SMB_ALERT# BG11 Modify R02 DMN63D8LDW_SOT363-6

6 1 PCU_SMB_DATA SIO_I2C6_CLK / GPIO_S0_SC_91 / SD3_WP

ILB_LPC_CLK_0 : Output of 25MHz,

@ T16 TP2_CORE_VCC_S0iX AA22

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

A11 AC36 AG38 AH47 AT24 AY36 BF30 E8 K9 U3

Security Classification Compal Secret Data Compal Electronics, Inc.

+DDR_A_VREF_DQ +1.35V_L CONN@ +1.35V_L

1 R79 R80 207 208

LVDS Translator - RTD2132N

Security Classification Compal Secret Data

Place closed to JLVDS1

LCD POWER CIRCUIT 1 1

Intel recommends having a pull-up resistor of 100 k for

+5VS +5VS_TS R101 2 ETS@ 1 2.2K_0402_5% I2C5_SDA_PNL

R106 1 TS@ 2 10K_0402_5% TS_RST# WCM2012F2SF-670T04_0805

R111 1 LVDS@ 2 0_0402_5% I2C_SDA

R113 1 ETS@ 2 0_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

Modify R02,R-SHORT R118~R125

W=40mils R118 2 @ 1 0_0402_5%

AP2330W-7_SC59-3 R120 2 @ 1 0_0402_5%

C138 2 1 .1U_0402_16V7K HDMI_C_TX1-

2.2K_0804_8P4R_5% R125 2 @ 1 0_0402_5%

HDMI_C_TX1- R126 1 2 619_0402_1%

HDMI_C_TX2- R128 1 2 619_0402_1%

Q8A HDMI_C_TX0- R130 619_0402_1%