Internal Use Only

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LCD TV
SERVICE MANUAL
CHASSIS : LD91D

MODEL : 32LH7000 32LH7000-ZA

CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
 CONTENTS

CONTENTS .............................................................................................. 2

PRODUCT SAFETY ..................................................................................3

SPECIFICATION ........................................................................................6

ADJUSTMENT INSTRUCTION ...............................................................10

TROUBLE SHOOTING ............................................................................15

BLOCK DIAGRAM...................................................................................19

EXPLODED VIEW .................................................................................. 20

SVC. SHEET ...............................................................................................

Copyright 2009 LG Electronics. Inc. All right reserved. -2- LGE Internal Use Only
Only for training and service purposes
 SAFETY PRECAUTIONS

IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance Leakage Current Hot Check (See below Figure)

An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1W), keep the resistor 10mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
AC Volt-meter

always perform an AC leakage current check on the exposed

metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical Good Earth Ground
such as WATER PIPE,
shock. CONDUIT etc.
To Instrument's
0.15uF
exposed
Leakage Current Cold Check(Antenna Cold Check) METALLIC PARTS
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC 1.5 Kohm/10W
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc. When 25A is impressed between Earth and 2nd Ground
If the exposed metallic part has a return path to the chassis, the for 1 second, Resistance must be less than 0.1
measured resistance should be between 1M and 5.2M. *Base on Adjustment standard
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Copyright 2009 LG Electronics. Inc. All right reserved. -3- LGE Internal Use Only
Only for training and service purposes
 SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the
following servicing precautions and any of the safety precautions on
page 3 of this publication, always follow the safety precautions.
Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board
module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug or
other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an
explosion hazard.
2. Test high voltage only by measuring it with an appropriate high
voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10% (by volume) Acetone and 90% (by
volume) isopropyl alcohol (90%-99% strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication of
contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks are
correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test fixtures specified in this
service manual.
CAUTION: Do not connect the test fixture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily
by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some field-effect transistors and
semiconductor "chip" components. The following techniques
should be used to help reduce the incidence of component
damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which should be removed to
prevent potential shock reasons prior to applying power to the
Copyright 2009 LG Electronics. Inc. All right reserved. -4-
Only for training and service purposes
unit under test.
2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or
exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES
devices.
4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as "anti-static" can generate
electrical charges sufficient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges sufficient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads
electrically shorted together by conductive foam, aluminum foil
or comparable conductive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material
to the chassis or circuit assembly into which the device will be
installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged
replacement ES devices. (Otherwise harmless motion such as
the brushing together of your clothes fabric or the lifting of your
foot from a carpeted floor can generate static electricity
sufficient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate
tip size and shape that will maintain tip temperature within the
range or 500F to 600F.
2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
bristle (0.5 inch, or 1.25cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500F to 600F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suction-
type solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500F to 600F)
b. First, hold the soldering iron tip and solder the strand against
the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there
only until the solder flows onto and around both the
component lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.
LGE Internal Use Only
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent flat against the
circuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by gently
prying up on the lead with the soldering iron tip as the solder
melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing the
IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close as
possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining
on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as
possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Copyright 2009 LG Electronics. Inc. All right reserved. -5-
Only for training and service purposes
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever
this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC
connections).
1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the good
copper pattern. Solder the overlapped area and clip off any
excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly
connected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.
LGE Internal Use Only
 SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.

1. Application range 3. Test method

This specification is applied to the LCD TV used LD91D 1) Performance: LGE TV test method followed
chassis. 2) Demanded other specification
- Safety: CE/IEC specification
2. Requirement for Test - EMC: CE/IEC
Each part is tested as below without special appointment.

1) Temperature : 255C (779F), CST : 405C

2) Relative Humidity : 6510%
3) Power Voltage : Standard input voltage(100~240V@50/60Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.

4. General specification
No Item Specification Remark
1 Display Screen Device 32 wide Color Display Module LCD
2 Aspect Ratio 16:9
3 LCD Module 32 TFT LCD FHD 100Hz LGD
4 Operating Environment Temp. : 0 ~50 deg
Humidity : 20 ~90 %
5 Storage Environment Temp. : -20 ~60 deg
Humidity : 10 ~90 %
6 Input Voltage AC100-240V~, 50/60Hz
7 Power consumption Power on (White)
32 LGD Typ : 110, Max : 120 LCD(Module) + Backlight(Lamp)
8 Module Size 32 LGD 760.0(H) x 450.0(V) x 48.00mm(D) With inverter
9 Pixel Pitch 32 LGD 0.36375(H) x 0.36375(V)
10 Backlight 16 EEFL
11 Display Colors 1.06B(true) colors
12 Coating 3H(Hard coating)

Copyright 2009 LG Electronics. Inc. All right reserved. -6- LGE Internal Use Only
Only for training and service purposes
5. Chroma& Brightness
(1) Module optical specification
No. Item Specification Min. Typ. Max. Remark
1. Viewing Angle<CR>10> Right/Left/Up/Down 89/89 CR>10
89/89
2. Luminance Luminance (cd/m2) 400 500 PSM:Vivid,CSM:Cool,
White(100IRE)
Dynamic contrast :off
Dynamic color L off
Variation 1.3 MAX /MIN
3. Contrast Ratio CR 900 1300
4. CIE Color Coordinates White Wx Typ 0.279 Typ PSM:Vivid,CSM:Cool,
Wy -0.03 0.292 +0.03 White(85IRE)
RED Xr 0.638 Dynamic contrast :off
Yr 0.334 Dynamic color L off
Xg 0.291
Green Yg 0.607
Xb 0.145
Blue Yb 0.062

1) Stable for approximately 60 minutes in a dark environment at 25C

2) Operating Ambient Humidity : Min 10, Max 90 %RH
3) Supply Voltage : 24V
4) Frame Frequency : 120Hz

(2) Chroma (PSM: Vivid, Color Temperature: Cool)

- except RGB PC Mode PSM:Standard,Color Temperature:Medium
**The W/B Tolerance is 0.002 for Adjustment, but for DQA 0.015
No Item Min Typ Max Remark
1. Cool White Balance,X axis 0.274 0.276 0.278 DQA :0.015
White Balance,Y axis 0.281 0.283 0.285 DQA :0.015
2. Medium White Balance,X axis 0.283 0.285 0.287 DQA :0.015
White Balance,Y axis 0.291 0.293 0.295 DQA :0.015
3. Warm White Balance,X axis 0.311 0.313 0.315 DQA :0.015
White Balance,Y axis 0.327 0.329 0.331 DQA :0.015

(3) SET Optical Feature

1) General feature
Luminance (min) C/R(min)
No Item Module Remark
AV,COMPONENT,HDMI AV,COMPONENT,HDMI
1. 32 inch LGD 400cd/m2 900 except from the PC mode.

* Measurement Condition: Full white/Dynamic) -> Measure the black luminance after 30 seconds.

2) Special feature (Dynamic CR 15000:1)

No Item Min typ Max Inch Power Board P/N Remark
1 Dynamic CR 10000 15000 32 EAY58473201 HDMI 720p Full Black Pattern
(Only HDMI mode)

Copyright 2009 LG Electronics. Inc. All right reserved. -7- LGE Internal Use Only
Only for training and service purposes
6. Component Video Input (Y, PB, PR)
Specification
No Remark
Resolution H-freq(kHz) V-freq(Hz)
1. 720x480 15.73 60.00 SDTV,DVD 480i
2. 720x480 15.63 59.94 SDTV,DVD 480i
3. 720x480 31.47 59.94 480p
4. 720x480 31.50 60.00 480p
5. 720x576 15.625 50.00 SDTV,DVD 625 Line
6. 720x576 31.25 50.00 HDTV 576p
7. 1280x720 45.00 50.00 HDTV 720p
8. 1280x720 44.96 59.94 HDTV 720p
9. 1280x720 45.00 60.00 HDTV 720p
10. 1920x1080 31.25 50.00 HDTV 1080i
11. 1920x1080 33.75 60.00 HDTV 1080i
12. 1920x1080 33.72 59.94 HDTV 1080i
13. 1920x1080 26.97/27 23.97/24 HDTV 1080p
14. 1920x1080 33.716/33.75 29.976/30.00 HDTV 1080p
15. 1920x1080 56.250 50 HDTV 1080p
16. 1920x1080 67.43/67.5 59.94/60 HDTV 1080p

7. RGB PC INPUT
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720x400 31.468 70.08 28.321
2. 640x480 31.469 59.94 25.17 VESA
37.684 75.00 31.50
3. 800x600 37.879 60.31 40.00 VESA
46.875 75.00 49.50
4. 832x624 49.725 74.55 57.283 Macintosh
5. 1024x768 48.363 60.00 65.00 VESA(XGA)
56.470 70.00 75.00
60.123 75.029 78.75
6. 1280x768 47.78 59.87 79.5 WXGA
7. 1360x768 47.72 59.8 84.75 WXGA
8. 1366x768 47.56 59.6 84.75 WXGA
9. 1280x1024 63.595 60.0 108.875 SXGA
10. 1920x1080 66.647 59.988 138.625 WUXGA

Copyright 2009 LG Electronics. Inc. All right reserved. -8- LGE Internal Use Only
Only for training and service purposes
8. HDMI Input (PC/DTV)
(1) DTV Mode
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1 720x480 15.734 /15.6 59.94 /60 27.00 SDTV 480I
2 720x480 31.469 /31.5 59.94 /60 27.00/27.03 SDTV 480P
3 720x576 15.625 50 27(54) SDTV 576
4 720x576 31.25 50 54 SDTV 576P
5 1280x720 37.500 50 74.25 HDTV 720P
6 1280x720 44.96 /45 59.94 /60 74.17/74.25 HDTV 720P
7 1920x1080 33.72 /33.75 59.94 /60 74.17/74.25 HDTV 1080I
8 1920x1080 28.125 50.00 74.25 HDTV 1080I
9 1920x1080 26.97 /27 23.97 /24 74.17/74.25 HDTV 1080P
10 1920x1080 33.716 /33.75 29.976 /30.00 74.25 HDTV 1080P
11 1920x1080 56.250 50 148.5 HDTV 1080P
12 1920x1080 67.43 /67.5 59.94 /60 148.35/148.50 HDTV 1080P

(2) PC Mode
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1 720x400 31.468 70.08 28.321 HDCP
2 640x480 31.469 59.94 25.17 VESA HDCP
37.684 75.00 31.50
3 800x600 37.879 60.31 40.00 VESA HDCP
46.875 75.00 49.50
4 832x624 49.725 74.55 57.283 Macintosh HDCP
5 1024x768 48.363 60.00 65.00 VESA(XGA) HDCP
56.470 70.00 75.00
60.123 75.029 78.75
6 1280x768 47.78 59.87 79.5 WXGA HDCP
7 1360x768 47.72 59.8 84.75 WXGA HDCP
8 1366x768 47.56 59.6 84.75 WXGA HDCP
9 280x1024 63.595 60.0 108.875 SXGA HDCP
10 1920x1080 66.647 59.988 138.625 WUXGA HDCP

Copyright 2009 LG Electronics. Inc. All right reserved. -9- LGE Internal Use Only
Only for training and service purposes
 ADJUSTMENT INSTRUCTION
1. Application Range 4) Click Connect tab. If Cant is displayed, Check
connection between computer, jig, and set.
This specification sheet is applied to all of the LCD TV with
LD91D chassis.
(1) (4)

2. Designation
1) The adjustment is according to the order which is
designated and which must be followed, according to the plan
which can be changed only on agreeing.
2) Power Adjustment: Free Voltage
3) Magnetic Field Condition: Nil.
4) Input signal Unit: Product Specification Standard Please Check the Speed :
5) Reserve after operation: Above 5 Minutes (Heat Run) To use speed between
from 200KHz to 400KHz
Temperature : at 255C
Relative humidity : 6510%
Input voltage : 220V, 60Hz
6) Adjustment equipments: Color Analyzer (CA-210 or CA- 5) Click Auto tab and set as below
110), Pattern Generator(MSPG-925 series or Equivalent) 6) Click Run.
DDC Adjustment Jig equipment, SVC remote controller 7) After downloading, check OK message.
7) Push The IN STOP KEY - For memory initialization.
(5)
Case1 : Software version up filexxx.bin
1. After downloading S/W by USB , TV set will reboot (5)
automatically
2. Push In-stop key (7) .OK
3. Push Power on key
4. Function inspection (6)
5. After function inspection, Push I n-stop key.
Case2 : Function check at the assembly line
1. When TV set is entering on the assembly line, Push
In-stop key at first.
2. Push Power on key for turning it on. * USB DOWNLOAD
-> If you push Power on key, TV set will recover channel 1) Put the USB Stick to the USB socket.
information by itself. 2) Automatically detecting update file in USB Stick.
3. After function inspection, Push In-stop key. - If your downloaded program version in USB Stick is
Low, it didnt work. But your downloaded version is
High, USB data is automatically detecting.
3) Show the message Copying files from memory.
3. Main PCB check process
* APC - After Manual-Insult, executing APC

* Boot file Download

1) Execute ISP program Mstar ISP Utility and then click
Config tab.
2) Set as below, and then click Auto Detect and check
OK message
If Error is displayed, Check connection between
computer, jig, and set.
3) Click Read tab, and then load download file (XXXX.bin)
by clicking Read

(3)

fi lexxx.bin

Copyright 2009 LG Electronics. Inc. All right reserved. - 10 - LGE Internal Use Only
Only for training and service purposes
 4) Updating is staring. 3.1. ADC Process
(1) External ADC (Only adjust in the component mode 480I)
Input the Signal in the Component 1 -Component 480I
(Adjusted only this mode)
MODEL: 209 in Pattern Generator(480i Mode)
PATTERN : 65 in Pattern Generator( MSPG-925 Series)

<Adjustment pattern(PC)>

After enter Service Mode by pushing ADJ key,

Enter the 5 item and then Push the Start button

(2) Internal ADC(Only adjust in the RGB mode)

After enter Service Mode by pushing ADJ key
Enter ADC Calibration mode by pushing G key at 5.
ADC Calibration
Push the Start button

(3) Function Check

- Check display and sound
Check Input and Signal items. (cf. work instructions)
1) TV
2) AV (SCART1/SCART2/ CVBS)
3) COMPONENT (480i)
5) Fishing the version uploading, you have to put USB stick 4) RGB (PC : 1024 x 768 @ 60hz)
and AC Power off. 5) HDMI
6) After putting AC Power on and check updated version 6) PC Audio In
on your TV. * Display and Sound check is executed by Remote
* If downloading version is more high than your TV have, TV controller.
can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didnt
have a DTV/ATV test on production line.
4. Total Assembly line process
* After downloading, have to adjust TOOL 4.1. Adjustment Preparation
OPTION again. W/B Equipment condition
1) Push "IN-START" key in service remote controller CA210 : CH 9, Test signal : Inner pattern (85IRE)
2) Select Tool Option 1 and Push OK button. Above 5 minutes H/run in the inner pattern. (power on key
3) Punch in the number. (Each model hax their number) of adjust remote control)

Tool 1 2 3 4 Cool 11,000k K X=0.276(0.002)

Option 13824 3382 56744 2304 Y=0.283(0.002) <Test Signal>
Medium 9,300k K X=0.285(0.002) Inner pattern
4) Completed selecting Tool option.
Y=0.293(0.002) (216gray,85IRE)
Warm 6,500k K X=0.313(0.002)
Y=0.329(0.002)

Copyright 2009 LG Electronics. Inc. All right reserved. - 11 - LGE Internal Use Only
Only for training and service purposes
 * Connecting picture of the measuring instrument * After done all adjustments, Press In-start button and
(On Automatic control ) compare Tool option and Area option value with its BOM, if it
Inside PATTERN is used when W/B is controlled. Connect to is correctly same then unplug the AC cable. If it is not same,
auto controller or push Adjustment R/C POWER ON -> then correct it same with BOM and unplug AC cable.
Enter the mode of White-Balance, the pattern will come out. For correct it to the models module from factory JIG model.
* Push The IN STOP key after completing the function
inspection.

Full White Pattern CA-210

4.2. DPM operation confirmation
COLOR
ANALYZER
(Only Apply for MNT Model)
TYPE: CA-210 Check if Power LED Color and Power Consumption operate
as standard.
Set Input to RGB and connect D-sub cable to set
RS-232C Communication Measurement Condition: (100~240V@ 50/60Hz)
Confirm DPM operation at the state of screen without Signal.
<Connecting picture ( On Automatic Control)>

*Auto-control interface and directions
1) Adjust in the place where the influx of light like floodlight
around is blocked. (illumination is less than 10ux).
2) Adhere closely the Color Analyzer (CA210) to the module
less than 10cm distance, keep it with the surface of the
Module and Color Analyzers Prove vertically.(80~100).
3) Aging time
- After aging start, keep the power on (no suspension of
power supply) and heat-run over 15minutes.
- Using no signal or full white pattern or the others,
check the back light on.
4.3. DDC EDID Write (RGB 128Byte )
Write EDID DATA to EEPROM (24C02) by using DDC2B
protocol.
Check whether written EDID data is correct or not.
* For SVC main Assy, EDID have to be downloaded to Insert
Process in advance.
4.4. DDC EDID Write (HDMI 256Byte)
Check whether written EDID data is correct or not.
* For SVC main Assy, EDID have to be downloaded to Insert
Process in advance.

Auto adjustment Map(RS-232C)

4.5. EDID DATA
RS-232C COMMAND CENTER 1) All Data : HEXA Value
[CMD ID DATA] (DEFAULT) 2) Changeable Data :
*: Serial No : Controlled / Data:01
Cool Mid Warm MIN Cool Mid Warm MAX
**: Month : Controlled / Data:00
R Gain jg Ja jd 00 172 192 192 255 ***:Year : Controlled
G Gain jh Jb je 00 172 192 192 255 ****:Check sum

B Gain ji Jc jf 00 192 192 172 255 - Auto Download

R Cut 64 64 64 128 After enter Service Mode by pushing ADJ key,
G Cut 64 64 64 128 Enter EDID D/L mode.
Enter START by pushing OK key.
B Cut 64 64 64 128 * Caution
- Never connect HDMI & D-sub Cable when the user
** Caution ** downloading .
Color Temperature : COOL, Medium, Warm. - Use the proper cables below for EDID Writing.
One of R Gain/G Gain/ B Gain should be kept on 0xC0, and
adjust other two lower than C0.
(when R/G/B Gain are all C0, it is the FULL Dynamic Range
of Module)

* Manual W/B process using adjusts Remote control.

After enter Service Mode by pushing ADJ key,
Enter White Balance by pushing G key at 3. White
Balance.

Copyright 2009 LG Electronics. Inc. All right reserved. - 12 - LGE Internal Use Only
Only for training and service purposes
 * Edid data and Model option download (RS232) * Detail EDID Options are below
NO. Item CMD1 CMD2 Data 0
Product ID
Enter Download When transfer the Mode In,
Product ID HEX EDID Table DDC Function
download MODE A E 0 0 Carry the command.
ModeIn
40450 0x9E02 029E Analog
Edid data and Download A E *Note1*Note2
Model option
Automatically download
(The use of a internal Data)
40451 0x9E03 039E Digital
download

Adjust Mode Out A E 9 0 Serial No: Controlled on production line.

Adjustment To check Download
Confirmation A E 9 9 on Assembly line. Month, Year : Controlled on production line:
ex) Monthly : 09 -> 09
- Manual Download Year : 2006 -> 10
* Caution Model Name(Hex):
Use the proper signal cable for EDID Download MODEL MODEL NAME(HEX)
- Analog EDID : Pin3 exists
- Digital EDID : Pin3 exists 42LH7000 00 00 00 FC 00 34 32 4C 48 37 30 30 30 0A 20 20 20 20

For Analog EDID For HDMI EDID

D-sub to D-sub DVI-D to HDMI or HDMI to HDMI Checksum: Changeable by total EDID data.
Vendor Specific(HDMI)
INPUT MODEL NAME(HEX)
HDMI1 67030C001000B82D
HDMI2 67030C002000B82D
No. Item Condition Hex Data HDMI3 67030C003000B82D
1 Manufacturer ID GSM 1E6D
HDMI4 67030C004000B82D
2 Version Digital : 1 01
3 Revision Digital : 3 03
4.6. Outgoing condition Configuration
When pressing IN-STOP key by SVC remocon, Red LED
(1) Analog Data 128Byte (2Bi) are blinked alternatively. And then Automatically turn off.
(Must not AC power OFF during blinking)
0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F

0x00 00 FF FF FF FF FF FF 00 1E 6D a b
0x01 c 01 03 08 46 27 78 EA D9 B0 A3 57 49 9C 25 4.7. Internal pressure
11 49 4B A5 6E 00 31 40 45 40 61 40 81 80 90 40
0x02
(D1) (C0) (01) (01) Confirm whether is normal or not when between power
0x03 D1
(01)
C0
(01)
01 01 01 01 1A
(1B)
36
(21)
80
(50)
A0
(A0)
70
(51)
38
(00)
1F
(1E)
40
(30)
30
(48)
20
(88)
board's ac block and GND is impacted on 1.5kV(dc) or
0x04 35 00 E8 26 32 00 00 1A DA 2F 78 E0 51 1A 25 40 2.2kV(dc) for one second
(BC) (86) (21) (1C) (26) (36) (80) (A0) (70) (38) (1F) (40)
0x05 58 98 14 00 E8 26 32 1A 00 00 00 FD 00 39
(50) (20) (85) (00) (BC) (86) (21) 00 00 (18) (00) (00) (00) (FC) (00) (33)
4B 1F 54 12 00 0A 20 20
0x06 20 20 20 20 d
(32) (4C) (47) (35) (35) (30) (30) (0A)

0x07 d 00 e

(2) DIGITAL DATA(HDMI-1/2/3/4) 256Byte

0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F

0x00 00 FF FF FF FF FF FF 00 1E 6D a b

0x01 c 01 03 80 46 27 78 EA D9 B0 A3 57 49 9C 25

0x02 11 49 4B A5 6E 00 31 40 45 40 61 40 81 80 90 40
(D1) (C0) (01) (01)
0x03 A9 40 D1 C0 01 01 1A 36 80 A0 70 38 1F 40 30 20
(01) (01) (01) (01) (02) (3A) (80) (18) (71) (38) (2D) (40) (58) (2C)
0x04 35 00 E8 26 32 00 00 1A 1B 21 50 A0 51 00 1E 30
(45) (00) (C4) (8E) (21) (00) (00) (1E)
00 00 00 FD 00 39
0x05 48 88 35 00 BC 86 21 00 00 1C
(00) (00) (00) (FC) (00) (33)
0x06 4B 1F 54 12 00 0A 20 20 20 20 20 20 d
(32) (4C) (47) (35) (35) (30) (30) (0A)
0x07 d 01 e

0x00 02 03 23 F1 4E 81 02 03 15 12 13 04 14 05 20 21
(21) (02) (11) (01) (03) (21) (1F)
0x01 22 1F 10 23 09 07 07 83 01 00 00
(20) (22) f

0x02 f 01 1D 00 80 51 D0 1C 20 40 80 35 00 BC
(00) (BC) (52) (D0) (1E) (20) (B8) (28) (55) (40) (C4) (8E) (21)
0x03 88 21 00 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96
(00) (00) (1E) (01) (1D) (00) (72) (51) (D0) (1E) (20) (6E) (28) (55) (00) (C4)
0x04 00 13 8E 21 00 00 18 02 3A 80 18 71 38 2D 40 58
(8E) (21) (00) (00) (1E) (01) (1D) (80) (D0) (72) (1C) (16) (20) (10) (2C) (25)
0x05 2C 45 00 06 44 21 00 00 1E 01 1D 80 18 71 1C 16
(80) (C4) (8E) (21) (00) (00) (9E) (8C) (0A) (D0) (90) (20) (40) (31) (20) (0C)
0x06 20 58 2C 25 00 C4 8E 21 00 00 9E 4E 1F 00 80 51
(40) (55) (00) (C4) (8E) (21) (00) (00) (18) (4E) (1F) (00) (80) (51) (00) (1E)
0x07 00 1E 30 40 80 37 00 BC 88 21 00 00 18 00 00 e
(30) (40) (80) (37) (00) (BC) (88) (21) (00) (00) (18) (00)

Copyright 2009 LG Electronics. Inc. All right reserved. - 13 - LGE Internal Use Only
Only for training and service purposes
5. Serial number D/L
press Power on key of service remocon.
(Baud rate : 115200 bps)
Connect RS232 Signal Cable to RS-232 Jack.
Write Serial number by use RS-232.
Must check the serial number at the Diagnostics of SET UP
menu. (Refer to below).

5.1. Signal TABLE

CMD LENGTH ADH ADL DATA_1 ... Data_n CS DELAY

CMD : A0h
LENGTH : 85~94h (1~16 bytes)
ADH : EEPROM Sub Address high (00~1F)
ADL : EEPROM Sub Address low (00~FF)
Data : Write data
CS : CMD + LENGTH + ADH + ADL + Data_1 + + Data_n
Delay : 20ms

5.2. Command Set

No. Adjust mode CMD(hex) LENGTH(hex) Description

1 EEPROM WRITE A0h 84h+n n-bytes Write (n = 1~16)

* Description
FOS Default write : <7mode data> write
Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0,
Phase
Data write : Model Name and Serial Number write in
EEPROM,.

5.3. method & notice

(1) Serial number D/L is using of scan equipment.
(2) Setting of scan equipment operated by Manufacturing
Technology Group.
(3) Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatory
by D-book 4.0

Copyright 2009 LG Electronics. Inc. All right reserved. - 14 - LGE Internal Use Only
Only for training and service purposes
 TROUBLESHOOTING
1. TV/CATV doesnt display
NO Could you measu re voltag e of IC104 in the NO
Check IC104. You shou ld check power line
Jack Bo ard & IIC lin es?
Can you see t he normal signal? & IIC lines.
Are they all normal?
YES

YES
You should rep lace Jack Board .

Check the output of TRQ105 in th e Jack NO

You sh ou ld decid e to rep lace
Board.
TR Q105 in the Jack Board or not.
Can you see t he normal wavefo rm?

YES

Check the output of Main IC(IC100). NO

Esp ecially you sh ould ch eck After checking th e Power of Main IC(IC100) you
The H,V sync and cloc k. should decide to replace Main IC or not .
Can you see t he normal wavefo rm?

YES

This bo ard has b ig problem becau se Main

IC(IC100) have some troubles.
Afte r checking thoroughly all path once again,
You sh ou ld decid e to rep lace Main Bo ard or not.

2. DTV doesnt display

Check th e outp ut data o f IC104 in th e Jack NO Could you measu re voltag e of IC104 in the NO You sh ou ld ch eck p ower lin e
Bo ard Pin 52. Jack Bo ard & IIC lin es?
& IIC li nes.
Can you see t he normal sign al? Are they all normal?
YES

You sh ou ld rep lace Jack Bo ard .

YES

Check th e output of Main IC(IC100). NO

Esp ecially you sh ould ch eck After ch eckin g th e Power of Main IC(IC100) you
The H,V sync and c loc k. should decide to replace Main IC or not .
Can you see t he normal wavefo rm?

YES

This bo ard has b ig problem becau se Main

IC(IC100) have some troubles.
Afte r c hecking thoro ugh ly all pa th onc e again,
You sh ou ld decid e to rep lace Main Bo ard or no t.

Copyright 2009 LG Electronics. Inc. All right reserved. - 15 - LGE Internal Use Only
Only for training and service purposes
3. AV 1/2 doesnt display
NO
Check JK 200, JK20 1 JK20 0, JK20 1 may have problem. Rep lace th is
Can you see t he normal wavefo rm? Jack.

YES

Check th e output of Main IC(IC100). NO

Esp ecially you sh ould ch eck After ch eckin g th e Power of Main IC(IC100) you
The H,V sync and c loc k. should decide to replace Main IC or not .
Can you see t he normal wavefo rm?

YES

This bo ard has b ig problem becau se Main

IC(IC100) have some troubles.
Afte r c hecking thoroughly all path once again,
You sh ou ld decid e to rep lace Main Bo ard or no t.

4. Component doesnt display

NO
Check JK 304 JK30 4
Can you see t he normal wavefo rm? may have problem. Rep lace th is Jack.

YES

Check th e in pu t o f Compo nent Audio NO Afte r c hecking the Power of compone nt Audio
switch (IC405 in th e Jack Bo ard ), switch, y ou should decide to replace component
Can you see t he normal wavefo rm? Audio s witch or not.

YES

NO Afte r c hecking the Power of compone nt Audio

Check th e output of Comp on ent Audio
switch (IC405 in th e Jack Bo ard ) , switch y ou should decide to replace component
Can you see t he normal wavefo rm? Audio s witch or not.

YES

Check th e output of Main IC(IC100). NO

Esp ecially you sh ould ch eck After ch eckin g th e Power of Main IC(IC100) you
The H,V sync and c loc k. should decide to replace Main IC or not.
Can you see t he normal wavefo rm?

YES

This bo ard has b ig problem becau se Main

IC(IC100) have some troubles.
Afte r c hecking thoro ugh ly all pa th onc e again,
You sh ou ld decid e to rep lace Main Bo ard or no t.

Copyright 2009 LG Electronics. Inc. All right reserved. - 16 - LGE Internal Use Only
Only for training and service purposes
5. RGB PC doesnt display
NO
Check P30 0 , JP300
Can you see t he normal wavefo rm? may have problem. Rep lace th is Jack.

YES

Check th e in pu t o f RGB Audio NO After ch eckin g th e Power of RGB Audio sw itc h,

switch (IC405 in th e Jack Bo ard ) , you should decide to replace RGB Audio s witch
Can you see t he normal wavefo rm? or not.
YES

NO After ch eckin g th e Power of RGB Audio sw itc h

Check th e output of RGB Audio
switch (IC405 in th e Jack Bo ard ) , you should decide to replace RGB Audio s witch
Can you see t he normal wavefo rm? or not.

YES

Check th e output of Main IC(IC100). NO

Esp ecially you sh ould ch eck After ch eckin g th e Power of Main IC(IC100) you
The H,V sync and c loc k. should decide to replace Main IC or not .
Can you see t he normal wavefo rm?

YES

This bo ard has b ig problem becau se Main

IC(IC100) have some troubles.
Afte r c hecking thoroughly all path once again,
You sh ou ld decid e to rep lace Main Bo ard or no t.

Copyright 2009 LG Electronics. Inc. All right reserved. - 17 - LGE Internal Use Only
Only for training and service purposes
6. HDMI doesnt display

Check input c onnect JK600, JK601, JK602, NO

JK60 0, JK60 1, JK602, JK 603
JK60 3
may have problem. Rep lace th is Jack.
Can you see t he normal wavefo rm?

YES

NO
Check DD C commu nication lin es(IC600, After ch eckin g th e Power of th is ch ip , you
IC601) should decide to replace this or not.

YES
NO
Check HD CP co mmu nicatio n lin es(IC601) After ch eckin g th e Power of th is ch ip , you
should decide to replace this or not.

YES

Check th e in pu t o f HDMI Switch (IC600) NO After ch eckin g th e trace o f TMDS lin es and power of
This sign al is TMDS. HDMI Switch, you should decide to replace HDMI
Can you see t he normal wavefo rm? Switch or not .

YES
NO
Check th e output of HDMI Switc h(IC600). After ch eckin g th e Power of HDMI Switch y ou
Can you see t he normal wavefo rm? should decide to replace HDMI S witch or not.

YES

Check th e output of Main IC(IC100). NO

Esp ecially you sh ould ch eck After ch eckin g th e Power of Main IC(IC100) you
The H,V sync and c loc k. should decide to replace Main IC or not .
Can you see t he normal wavefo rm?

YES

This bo ard has b ig problem becau se Main

IC(IC100) have some troubles.
Afte r c hecking thoroughly all path once again,
You sh ou ld decid e to rep lace Main Bo ard or no t.

Copyright 2009 LG Electronics. Inc. All right reserved. - 18 - LGE Internal Use Only
Only for training and service purposes
 <JACK BOARD > DDR2 (128MB * 2)
CLK,ERR,SYN,DATA[0] FHD 100Hz
IC1000/1001 Panel
XC5000

IC502
Buffer
IC102

74LVC541A
CI_TS_DATA[0:7]
URSA_A/B[10bit]
SIF CI_DATA[0:7], Control,

Only for training and service purposes

FRC
Address[8:14] (LGE7329A)
DRX3913K IC900 URSA_C/D[10bit]

CI Slot
(P500)
IC104 Address[0:7]
FE_TS_DATA[0:7

IC501
Buffer
]
DDR2 Data[0:15] DDR2 SDRAM

74LCX244
CVBS
IC100 (256MB)
DDR2 Address[0:12]
TUNER V_OUT IC300

Copyright 2009 LG Electronics. Inc. All right reserved.

(LGE3369A)
F-SCART DDR2 Data[0:15] DDR2 SDRAM
DDR2 Address[0:12] (128MB)
CVBS
IC301
H-SCART DTV/MNT_V_OUT
Host Address[0:7] NAND Flash
CVBS HYNIX EEPROM
IC402 AT24C512
AV3 CVBS, Y/C

- 19 -
SCART-RGB SERIAL FLASH
COMPONENT IC103
YPbPr

RGB I2S Digital amp L/R

PC RGB, H/V SYNC
(NTP3100)
IC701
DP, DM USB
BLOCK DIAGRAM

F-SCART L/R, H-SCART L/R

AV L/R, COMP L/R L/R HDMI1
TMDS[0:7] TDA9996 HDMI2

IC405
PC L/R IC600 HDMI3

TEA6420D
HDMI4

Head L/R TPA6110A MC74HC4006

Phone
DP, DM
IC700 IC702 Bluetooth
RS-232C
L (Audio) Assy
MAX3232CDR
IC300
SPDIF_OUT IR Assy
SPDIF LED Assy Local Key
& RGB Sensor

LGE Internal Use Only

 EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
400

A2
820

540

570
805

530

830

806
804

A10
801

900
550
803

802

910
A5
200

122
123
120
560

301
510

580

310
500
300

Copyright LG Electronics. Inc. All right reserved. - 20 - LGE Internal Use Only
Only for training and service purposes
 IC102
+3.3V HY27US08121B-TPCB +3.3V
NAND FLASH MEMORY
S6_Reset
NC_1 NC_28
1 48
/PF_CE0 NAND FLASH
NC_2 NC_27
H : Serial Flash 2 47 IC100
L : NAND Flash PCM_A[0-7] C111
NC_3 NC_26 LGE3369A (Saturn6 Non RM)
/PF_CE1 3 46
H : 16 bit NC_4
L : 8 bit NC_25 20pF
4 45 R193

1K
AR102 PCM_D[0-7]
MCU BOOT STRAP D4 B3 1M

X100

3.9K
NC_5 I/O7 PCM_A[7] HWRESET

12MHz
5 44 XIN C112
ISP Port for MEMC A3 R172 0
NC_6 I/O6 PCM_A[6] OPT XOUT
6 43 PCM_D[0] AC16 20pF
10 : BOOT 51 P102 PCMD0/CI_D0
R/B I/O5 PCM_A[5] PCM_D[1] AA15 E6 R173 0

R111

R1540
7 42 11 : BOOT RISC PCMD1/CI_D1 TESTPIN/GND
/F_RB SMW250-04 PCM_D[2] AA16
RE I/O4 PCM_A[4] +3.3V PCMD2/CI_D2
8 41 PCM_D[3] AC6
/PF_OE PCMD3/CI_D3
CE NC_24 22 PCM_D[4] Y10 AE11 R1524 33 SPI_DI
/PF_CE0 9 40 PCMD4/CI_D4 SPI_DI
R198 1K 1 PCM_D[5] Y11 AF12 SPI_DO
NC_7 NC_23 PCMD5/CI_D5 SPI_DO
10 39 C105 OPT PCM_D[6] Y12 AE12 R1525 33 SPI_CS

1K
10uF 6.3V PWM0 PCMD6/CI_D6 /SPI_CS
NC_8 PRE R199 1K PCM_A[0-14] PCM_D[7] Y13 AD11 R1526 33 SPI_CK
11 38 2 PCMD7/CI_D7 SPI_CK

OPT
R1501 1K

0.1uF
VCC_1 VCC_2 OPT

C103
PWM1 PCM_A[0] AB16
12 37 ISP_RXD_TR

R112
PCM_A[1] PCM_A0/CI_A0 USB_DP
VSS_1 VSS_2 C106 0.1uF R1500 1K 3 AC15
+3.3V OPT 13 36 PCM_A[2] PCM_A1/CI_A1 USB_DM
AC14
R105 NC_9 NC_22 PCM_A[3] PCM_A2/CI_A2 USB
AB14
OPT
14 35

15K
R197
15K
OPT

1K 4 PCM_A[4] PCM_A3/CI_A3
AC12 B5

R196
NC_10 NC_21
15 34 PCM_A[5] PCM_A4/CI_A4 USB_DP_1
ISP_TXD_TR AB8 A5
CLE NC_20 PCM_A[6] PCM_A5/CI_A5 USB_DM_1
AC13 AC10

10K
/PF_CE1 16 33 R178 0 BT_DM
AR103 PCM_A[7] PCM_A6/CI_A6 USB_DM_2
ALE I/O3 PCM_A[3] AA9 AB10 R179 0
17 32 PCM_A[8] PCM_A7/CI_A7 USB_DP_2 BT_DP
PF_ALE AB5
+3.3V_ST +3.3V_ST

Only for training and service purposes

WE I/O2 PCM_A[2] PCM_A[9] PCM_A8/CI_A8
18 31 AA4

R103
R151 /PF_WE PCM_A9/CI_A9
PCM_A[10] V4
0 WP I/O1 PCM_A[1]
19 30 PCM_A[11] PCM_A10/CI_A10 PM GPIO Assignment Recommended by MStar
Y4
R158 C NC_11 I/O0 PCM_A[0] PCM_A11/CI_A11
PCM_A[12]
10K

R195

OPT 20 29 AB9
PCM_A[13] PCM_A12/CI_A12 SUB_WARM_ST

R1539
1K
B Q100 NC_12 NC_19 22 AA7
PF_WP KRC103S 21 28 PCM_A13/CI_A13 R182 100 DBG_TX
PCM_A[14] AD6
OPT NC_13 NC_18 PCM_A14/CI_A14
E INV_CTL
22 27
NC_14 NC_17 R1510 33 AA14 E5 R181 100 PANEL_CTL
23 26 PCM_RST PCM_RST/CI_RST GPIO_PM0/GPIO134 R186
R1511 33 AB18 F5 100 POWER_ON_PM4
NC_15 NC_16 /PCM_CD PCM_CD/CI_CD GPIO_PM1/GPIO135
24 25 R1512 33 Y5 G5 R184 100
/PCM_OE /PCM_OE GPIO_PM2/GPIO136 DBG_RX
R1513 33 AB15 H5 R185 100
/PCM_REG PCM_REG/CI_CLK GPIO_PM3/GPIO137
R1514 33 AA10 F6 R180 100
/PCM_WAIT PCM_WAIT/CI_WACK GPIO_PM4/GPIO138 POWER_DET
R1515 33 AC8 G6
/PCM_IRQA /PCM_IRQA GPIO_PM5/INT1/GPIO139
R1516 33 AC7 H6
/PCM_WE /PCM_WE GPIO_PM6/INT2/GPIO140
R1517 33 AA5 AC17 R188 100 BT_ON/OFF Interrupt for ISP Wake up in STB Mode
/PCM_IOWR PCM_IOWR/CI_WR GPIO131/LDE/SPI_WPn1
R1518 33 W4 AB17 R167 100 FE_BOOSTER_CTRL
AR100 /PCM_IORD PCM_IOR/CI_RD GPIO130/LCK
R1519 33 T4 AF11 R159 100 Flash_WP_1
/PCM_CE /PCM_CE GPIO132/LHSYNC/SPI_WPn
/PF_CE0 AE6 AA18 R1535 0 SDA1
+3.3V_ST /PF_CE0 GPIO60/PCM2_RESET/RX1
+5V_ST /PF_CE1 AF6 AA17 R1536 0 SCL1
POWER DETECT /PF_CE1 GPIO62/PCM2_CD_N/TX1
/PF_OE AA12
/PF_OE

Copyright 2009 LG Electronics. Inc. All right reserved.

+24V +12V R119 R110 22 AA11
/PF_WE AR101
0 OPT /PF_WE
+3.3V_ST PF_ALE AC9
PF_ALE
PF_WP Y14
+5V_GENERAL PF_AD15 R1537
POWER_ON_DELAY /F_RB AB11 E7 0 FE_TUNER_SCL
R1566 R1541 R1544 22 F_RBZ LHSYNC2/I2S_OUT_MUTE/RX1
R1554 AC18 R1534 22
30K OPT OPT MAX810RTR LVSYNC/GPIO133 OPC_EN
+12V 10K C 0 F8 C6 R1538 0
1/10W EEPROM_SCL R162 FE_TUNER_SDA
R1563 UART2_TX/SCKM GPIO79/LVSYNC2/TX1
R1552 1% VCC IC106 RESET B Q105 EEPROM_SDA R163 0 D11 F9
POWER_DET 3 2 UART2_RX/SDAM UART2_RX/GPIO84 FE_ANT5V_MONITOR
10K 22 2SC3052 R164 0 AB21 F10
R114 SDA0 DDCR_DA UART2_TX/GPIO85 USB_OCD 5V Tolerance
C 1 0 AC21 A6 22
4.7K E R165 R169
R1550 R1553 GND SCL0 DDCR_CK UART1_RX/GPIO86 HP_AU_SW
B Q103 B6 R170 22
12K 2SC3052 UART1_TX/GPIO87 BT_AU_SW
R1532 R140 22 J1 AF5
C 1K ISP_RXD PCM_5V_CTL
1% DDCA_CLK GPIO42/PCM2_CE_N CI_TS_DATA[0-7]

3
1
R1549 E R141 22 J2 AF10 TP125
B Q102 R1561 OPT ISP_TXD DDCA_DA GPIO43/PCM2_IRQA_N
MAX810 : CMOS R142 22 W5
2SC3052 2.2K +3.3V_ST OPT DBG_RX UART_RX2
1K IC107 R143 22 V5 AA8 CI_TS_DATA[0]
NCP810 : Open Drain DBG_TX UART_TX2 TS0_D0
R1551 E NCP803SN293 Y8 CI_TS_DATA[1]

4
2
1.1K TS0_D1
Y9 CI_TS_DATA[2]
RESET VCC TS0_D2
2 3 R117 100 AB7 CI_TS_DATA[3]
TS0_D3
1 AA6 CI_TS_DATA[4]
C113 C TS0_D4
R1565 R1567 AB6 CI_TS_DATA[5]
GND 0.1uF R118
5.1K B Q107 TS0_D5
OPT 16V U4 CI_TS_DATA[6]
1/10W 2SC3052 TS0_D6
OPT 10K AC5 CI_TS_DATA[7]
5% TS0_D7
E AC4 CI_TS_SYN
C107 TS0_SYNC
S6_Reset AD5 CI_TS_VAL
4.7uF C108 TS0_VLD
R116 AB4
10V 10uF CI_TS_CLK
10K TS0_CLK
6.3V
AB19 BUF_TS_DATA[0]
TS1_D0
AA20 BUF_TS_SYN
TS1_SYNC
Serial FLASH MEMORY PWM0 AB13 AC19
BUF_TS_VAL_ERR
PWM0 TS1_VLD
for BOOT EEPROM PWM1 AB12 AA19 BUF_TS_CLK
PWM1 TS1_CLK
PWM2 AD12
+3.3V IC103 +3.3V PWM2
AA13 C10 TP155
MX25L3205DM2I-12G TP153 PWM3 ET_TXD0
L102 B11 100 R177
+3.3V ET_TXD1 SC_RE2
KEY1 A4 A9 100 R183
BLM18PG121SN1D SAR0 ET_TX_CLK

R1533
4.7K
SC_RE1
Flash_WP_1 KEY2 B4 C11
CS# VCC SAR1 ET_RXD0 SIDE_HP_MUTE
SPI_CS 1 SPI_Boot_Mem 8 L103 R148 0 F4 C9
IC105 LED_ON SAR2 ET_RXD1 HP_DET
+3.3V R150 0 E4 B10 R190 100
M24512-WMW6 SB_MUTE SAR3 ET_TX_EN VGA_EEPROM_WP
R1530 SO HOLD# R146 0 C4 A10
SPI_DO 2 7 IR

0.1uF
IRIN ET_MDC
B9

C104
E0 VCC

10K
33 1 8 ET_MDIO MODEL_OPT_3

R104
C100
A11
R101 WP# SCLK 0.1uF ET_COL
0 3 6 SPI_CK AC11
E1 WC
C 2 7 TP154 GPIO44
SCHEMATIC DIAGRAM

R102 0 B GND SI R156 100 D9

4 5 SPI_DI E2 SCL SC2_MUTE
3 6 R1571 22 EEPROM_SCL GPIO96
AMP_RST R157 100 D10
OPT R100 GPIO88 +3.3V
Q101 E SDA R189 0 D7
KRC103S 0 VSS 4 5 R1572 22 MODEL_OPT_1 GPIO90/I2S_OUT_MUTE
EEPROM_SDA R168 0 E11 MODEL OPTION
MODEL_OPT_2 GPIO91
C101 C102 R160 100 E8
ERROR_OUT
8pF 8pF GPIO97
NTP_MUTE R166 100 E10
1K

OPT

OPT

GPIO98
OPT
R1609

R1605
R1607

R1603

D6
MODEL_OPT_0 GPIO99
D5
GPIO103/I2S_OUT_SD3 MODEL_OPT_0
C5
GPIO102
MEMC_RESET R1600 100 MODEL_OPT_1
PULL UP is applied on the FRC
I2C FE_AGC_SPEED_CTL R1601 100 MODEL_OPT_2
+3.3V +5V_GENERAL +3.3V
R144 10K
A_DIM PWM0 R1602 0
/FE_RESET MODEL_OPT_3
C109 PULL UP is applied on the JACK
2.2uF

R1505
1.2K
R1506
1.2K
R1507
1.2K
OPT
OPT

R1504
1.2K
R1503
1.2K
R1502
1.2K
R124
2.7K

R1508
R1509
R125
2.7K
+3.3V
R108 R106
10K 1K
R154
R133 0 PCM_A[11] JTINT OPT
OPT

FE_TUNER_SDA
OPT
OPT

4.7K

R1604
R1608
R1610

R1606

R134 0 PCM_D[5] /JTRST R153 100 R149 0 PWM2

FE_TUNER_SCL PWM_DIM
R113 R135 0 PCM_D[7] JTCK
MEMC_SDA R130 0
10K SDA0 C110
OPT R136 0 /PCM_CE JTMS MEMC_SCL R131 0 1uF
SCL0
OPT
R137 0 /PCM_OE JTDO FE_DEMOD_SDA R122 0
SDA0
R138 0 FE_DEMOD_SCL R123 0 SCL0 MODEL_OPT_0 (D6) : LCD (H) / PDP (L)
PCM_A[10] JTDI
EEPROM_SDA MODEL_OPT_1 (D7) : FRC (H) / NO FRC (L)
R139 0
PCM_D[6] /RST EEPROM_SCL MODEL_OPT_2 (E11) : LED NORMAL (H)
R109 A7 R192 100 NO LED NORMAL (L)
GPIO67 USB_CTL
10K TDA9996_SDA R126 0 B8 R155 100 SC1_MUTE
SDA1 GPIO68 MODEL_OPT_3 (B9) : FHD (H) / HD (L)
R127 0 SCL1
TDA9996_SCL
SDA_SUB/AMP R128 0
SDA1
SCL_SUB/AMP R129 0 SCL1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS MSD3369GV Platform 08/12/19 (MP)
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. FLASH/EEPROM/GPIO 1 10

LGE Internal Use Only

 EU_SCART / EU_HP [OPT] +1.26V_VDDC
Audio Mute
+3.3V +3.3V_ST
C240 C243 C246 C249 C252 C257 C264 C275 C281 C289 C294 C297 C2000 C2001 C2003 C2005
R200 330uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF

R274
10K
D200

EU_SCART
10K 4V

10K
ENKMC2838-T112

R275
A1

EU_SCART
SB_MUTE
C
SCART2_MUTE
EU_SCART A2
004:AL14 SC2_MUTE
D201
ENKMC2838-T112
A1
SB_MUTE +1.26V_VDDC
C
SCART1_MUTE
EU_SCART A2
004:AK23 SC1_MUTE
D202
ENKMC2838-T112 C2031 C2032 C2033 C2034 C2035 C2036 C2037 C2038 C2039 C2040 C2041 C2042 C2043
A1 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF
SB_MUTE
C 16V
AMP_MUTE
A2
007:Y15 NTP_MUTE
D203
ENKMC2838-T112
A1
SB_MUTE
C
HP_MUTE +3.3V
EU_HP A2 +1.8V_DDR +3.3V_VDDP
007:H7;007:Q5 SIDE_HP_MUTE L210
BLM18PG121SN1D

C242 C245 C248 C251 C254 C259 C266 C277 C283 C291 C296 C2027 C241 C244 C247 C250 C253 C258 C265 C276 C2026 C2004
C2010 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
330uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF
4V

IC100

Only for training and service purposes

LGE3369A (Saturn6 Non RM) IC100 +1.26V_VDDC
LGE3369A (Saturn6 Non RM)
VDDC : 970mA
F1 RXACKP AE16
LVA0P MEMC_RXE0+ 002:Z22;009:S28 E16 VDDC_1 D16
F2 RXACKN AD16 GND_2
LVA0M MEMC_RXE0- 002:Z22;009:S28 E17 VDDC_2 D17
G2 RXA0P AD15 GND_3
LVA1P MEMC_RXE1+ 002:Z23;009:R28 E18 VDDC_3 D18
G3 RXA0N AF16 GND_4
LVA1M MEMC_RXE1- 002:Z22;009:R28 F7 VDDC_4 D19
H3 RXA1P AF15 GND_5
LVA2P MEMC_RXE2+ 002:Z23;009:R28 L9 VDDC_5 D20
G1 RXA1N AE15 GND_6
LVA2M MEMC_RXE2- 002:Z23;009:R28 L10 VDDC_6 H18
H1 RXA2P AD13 GND_7
LVA3P MEMC_RXE3+ 002:Z25;009:Q28 L11 VDDC_7 H19
H2 RXA2N AF14 GND_8
LVA3M MEMC_RXE3- 002:Z25;009:Q28 VDDC_8 H20
A1 DDCD_A_DA AF13
LVA4P MEMC_RXE4+ 002:Z26;009:Q28 VDDC_9 J20
B2 DDCD_A_CK AE13
LVA4M MEMC_RXE4- 002:Z25;009:Q28 L12 VDDC_10 K20
A2 HOTPLUG_A GND_9
L13 VDDC_11 L20
AE14 GND_10
LVACKP MEMC_RXEC+ 002:Z24;009:Q28 L14 VDDC_12 M20
C3 RXBCKP AD14 GND_11
HDMI_CLK+ LVACKM MEMC_RXEC- 002:Z24;009:R28 L15 VDDC_13 P7
B1 RXBCKN GND_12
HDMI_CLK- L16 VDDC_14 R7
C1 RXB0P AE20 GND_13
HDMI_RX0+ LVB0P MEMC_RXO0+ 002:Z17;009:U28 L17 T7

Copyright 2009 LG Electronics. Inc. All right reserved.

C2 AD20 GND_14 VDDC_15
HDMI_RX0- RXB0N MEMC_RXO0- L18 T22
LVB0M 002:Z17;009:V28 GND_15
D2 RXB1P AD19 VDDC_16
HDMI_RX1+ LVB1P MEMC_RXO1+ 002:Z18;009:U28 M9 GND_16 U7
D3 RXB1N AF20 VDDC_17
HDMI_RX1- LVB1M MEMC_RXO1- 002:Z18;009:U28 U20
E3 RXB2P AF19 VDDC_18
HDMI_RX2+ LVB2P MEMC_RXO2+ 002:Z18;009:U28 M10 GND_17 U22
D1 RXB2N AE19 VDDC_19
HDMI_RX2- LVB2M MEMC_RXO2- 002:Z18;009:U28 M11 GND_18 V7
R201 0 E1 DDCD_B_DA AD17 VDDC_20
HDMI_SDA LVB3P MEMC_RXO3+ 002:Z20;009:T28 M12 V22
R202 0 F3 DDCD_B_CK AF18 GND_19 VDDC_21
HDMI_SCL LVB3M MEMC_RXO3- 002:Z20;009:T28 M13 W11
E2 HOTPLUG_B AF17 GND_20 VDDC_22
LVB4P MEMC_RXO4+ 002:Z21;009:S28 M14 W12
AE17 GND_21 VDDC_23
LVB4M MEMC_RXO4- 002:Z21;009:T28 M15 W19
AE8 RXCCKP GND_22 VDDC_24
M16 W20
AD8 RXCCKN AE18 GND_23 VDDC_25
LVBCKP MEMC_RXOC+ 002:Z19;009:T28 M17 W22

HDMI
AD9 RXC0P AD18 GND_24 VDDC_26
LVBCKM MEMC_RXOC- 002:Z19;009:T28 Y22
AF8 RXC0N VDDC_27
M18
AF9 RXC1P GND_25
N4 +3.3V_VDDP VDDP : 102.3mA
AE9 RXC1N GND_26
N9 H9
AE10 RXC2P AA3 C229 2.2uF GND_27 VDDP_1
AUR0 AV_R_OUT 004:J15 N10 H10
AD10 RXC2N Y1 C230 2.2uF GND_28 VDDP_2
AUL0 AV_L_OUT 004:J15 N11 H11
AE7 DDCD_C_DA AE1 C2006 2.2uF GND_29 VDDP_3
AUR1 FE_AM_AUDIO 004:C16 N12 H12
AF7 DDCD_C_CK AF3 C2007 2.2uF GND_30 VDDP_4
AUL1 N13 N20
AD7 HOTPLUG_C AE3 C2008 2.2uF GND_31 VDDP_5
AUR2 SUB_SPK_MONO 004:U5 N14 P20
R204 100 J3 CEC AUL2 AE2 C2009 2.2uF GND_32 VDDP_6
HDMI_CEC W9
AA1 C2011 2.2uF VDDP_7
AUR3 N15 W10
AB1 C2012 2.2uF GND_33 VDDP_8
AUL3 N16 +3.3V
AB2 C2013 2.2uF GND_34 AVDD_AU : 36.11mA
AUR4 N17 L209
N2 HSYNC0/SC1_ID AC2 C2014 2.2uF GND_35 BLM18PG121SN1D
SC1_ID AUL4 N18 W7
R210 47 N1 VSYNC0/SC1_FB AB3 C2015 2.2uF GND_36 AVDD_AU
SC1_FB AUR5 P4 +1.8V_DDR
R211 47 C200 0.047uF P2 RIN0P/SC1_R AC3 C2016 2.2uF GND_37
COMP_Pr AUL5 P9 C284 C293
R212 47 C201 0.047uF R3 GIN0P/SC1_G GND_38
COMP_Y P10 G12
R213 47 C202 0.047uF R1 BIN0P/SC1_B GND_39 AVDD_DDR_1 0.1uF 0.1uF
COMP_Pb G13
R214 470 C203 1000pF P3 SOGIN0/SC1_CVBS AVDD_DDR_2

SCART
H13
R215 47 C204 0.047uF P1 RINM W3 C231 0.1uF R241 47 AVDD_DDR_3
SIF0P FE_SIF 004:C13 P11 H14
R216 47 C205 0.047uF T3 BINM W2 C232 0.1uF R242 47 GND_40 AVDD_DDR_4
SIF0M P12 H15
R217 47 C206 0.047uF R2 GINM GND_41 AVDD_DDR_5
P13 H16
GND_42 AVDD_DDR_6 AVDD_DDR : 18.31mA
R243 R244 P14 W14
F11 GND_43 AVDD_DDR_7
10K 10K SPDIF_IN P15 W15
R246 22 K3 HSYNC1/DSUB_HSYNC E9 R230 100 GND_44 AVDD_DDR_8
DSUB_HSYNC SPDIF_OUT SPDIF_OUT 004:C12 P16 W16
R245 22 K2 VSYNC1/DSUB_VSYNC GND_45 AVDD_DDR_9
DSUB_VSYNC P17 W17
R218 47 C212 0.047uF L1 RIN1P/DSUB_R GND_46 AVDD_DDR_10 +3.3V AVDD_MEMPLL : 23.77mA
DSUB_R P18 W18
R219 47 C207 0.047uF L3 GIN1P/DSUB_G GND_47 AVDD_DDR_11
DSUB_G L205
R220 47 C213 0.047uF K1 BIN1P/DSUB_B BLM18PG121SN1D
DSUB_B R4 H17

DSUB
R221 470 C208 1000pF L2 SOGIN1 AF1 R237 100 GND_48 AVDD_MEMPLL_1
AUOUTR0/HP_ROUT HP/BT_ROUT R9 T20
AF2 R238 100 GND_49 AVDD_MEMPLL_2 C262 C269 C273 C285
AUOUTL0/HP_LOUT HP/BT_LOUT R10 V20
AD3 R239 100 GND_50 AVDD_MEMPLL_3
AUOUTR1/SC1_ROUT SCART1_Rout R11
R222 0.047uF V1 AD1 100 GND_51 0.1uF 0.1uF 0.1uF 0.1uF
47 C214 RIN2P/COMP_PR+ R240 SCART1_Lout
SC1_R AUOUTL1/SC1_LOUT R12 +3.3V AVDD_LPLL : 4.69mA
R223 47 C215 0.047uF V2 GIN2P/COMP_Y+ AC1 R250 100 SCART2_Rout GND_52
SC1_G AUOUTR2/SC2_ROUT R13
R224 47 C216 0.047uF U1 BIN2P/COMP_PB+ AD2 R251 100 SCART2_Lout GND_53
SC1_B AUOUTL2/SC2_LOUT R14 L207
R225 470 C209 1000pF V3 SOGIN2 GND_54 BLM18PG121SN1D
SC1_CVBS_IN R15 R20
J 5 VSYNC2 GND_55 AVDD_LPLL
470

R252
22K
R253
22K
R254
22K
R255
22K
R256
22K

R258

C2017
0.01uF
C2018
0.01uF
C2020
0.01uF
C2021
0.01uF
C2022
0.01uF
C2023
0.01uF
R257
22K

R247 0 +3.3V_AVDD_MPLL
CH_COMP_SOG R16 C279 C288
A8 R231 22 GND_56
SC2_ID I2S_OUT_MCK AUDIO_MASTER_CLK 007:K22 R17 H7
B7 R232 22 GND_57 AVDD_MPLL 0.1uF 0.1uF
R205 47 C210 0.047uF U3 CVBS1/SC1_CVBS I2S_OUT_WS MS_LRCK 007:K16 R18
SC1_CVBS_IN C7 R233 22 GND_58 C255 C2025
R206 47 C211 0.047uF U2 CVBS2/SC2_CVBS I2S_OUT_BCK MS_SCK 007:K16 T5
SC2_CVBS_IN D8 R234 22 GND_59 10uF
R226 47 C217 0.047uF T1 CVBS3/SIDE_CVBS I2S_OUT_SD MS_LRCH 007:K17 T9
AV_CVBS_IN C8 R276 GND_60 0.1uF 10V AVDD_MPLL : 7.76mA
R227 47 C218 0.047uF T2 VCOM1 I2S_IN_SD C236 C237 C238 C239 T10

CVBS
100 OPT 22pF 22pF 22pF 22pF GND_61
T11 +3.3V AVDD_33 : 281mA
OPT OPT OPT OPT GND_62
T12 L206
R207 47 C219 0.047uF M1 +3.3V C235 GND_63 BLM18PG121SN1D
S_Y_IN CVBS4/S-VIDEO_Y J7
C223
R208 47 C220 0.047uF M2 CVBS6/S-VIDEO_C K4 0.1uF AVDD_33_1
S_C_IN VCLAMP T13 K7
H4 C233 0.1uF GND_64 AVDD_33_2 C260 C267 C286
T14 L7 C263 C271 C274
REFP

S-VID
R235 47 C2024 0.047uF N3 CVBS5 J4 GND_65 AVDD_33_3
REFM 0.1uF T15 M7 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
R236 47 C2019 0.047uF M3 G4 R229 390 C234 GND_66 AVDD_33_4
CVBS7 T16 N7
REXT
1% GND_67 AVDD_33_5
T17
R228 100 C221 0.047uF W1 Check 0.1uF GND_68 +3.3V
FE_VMAIN CVBS0/RF_CVBS T18
R209 100 C222 0.047uF Y3 VCOM0 AE5 C224 0.1uF GND_69
AUCOM U5 W8 L208 AVDD_DM : 0.03mA
AE4 GND_70 AVDD_DM
AUVRM W13 +3.3V BLM18PG121SN1D
Y2 CVBSOUT0/SC2_MNTOUT AF4 C225 10uF 10V GND_71 C287 C292
DTV/MNT_VOUT AUVRP Y21 L202 AVDD_OTG : 22.96mA
AA2 AD4 C226 0.1uF GND_72 BLM18PG121SN1D

TV/MNT
CVBSOUT1 AA23 H8
AUVAG 0.1uF
C227 1uF GND_73 AVDD_USB 0.1uF
C228 4.7uF C272
C256

0.1uF 0.1uF

Close to IC
as close as possible

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS MSD3369GV Platform 08/12/19 (MP)
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. AV IN/OUT/LVDS/POWER 2 10

LGE Internal Use Only

 DDR2 1.8V By CAP - Place these Caps near Memory
+1.8V_DDR +1.8V_S_DDR
L300
BLM18PG121SN1D

C302 C323
0.1uF 0.1uF

C325
C327
C329
10uF
C330
C331
C332
C334
C336
C337
C338
C339
C340
C341

C324
C326
C328
C342
C345

C314
10uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF

C303
10uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
10uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF

C304
C305
C306
C307
C308
C310
C312
C313
C315
C316
C317
C318
C319
C320
0.1uF
0.1uF
PI Result

+1.8V_S_DDR
+1.8V_S_DDR +1.8V_S_DDR

1K 1%

Only for training and service purposes

R345
1K
1%

R301
R321
1% 1K 1%
C333 C335

0.1uF

0.1uF
IC300 IC100 0 . 1 u F 1000pF IC301

R322
R343
1K
1%

1000pF

1K
HYB18TC1G160C2F-2.5 LGE3369A (Saturn6 Non RM) HYB18TC512160B2F-2.5

R302 1K 1%
C311

C301
C309

C300 1000pF
SDDR_D[0] DQ0 G8 J2 VREF AR300 D15 VREF J2 G8 DQ0 TDDR_D[0]
SDDR_A[5] ADDR2_A[5] A_MVREF
SDDR_D[1] DQ1 G2 AR303 G2 DQ1 TDDR_D[1]
SDDR_A[3] ADDR2_A[3] BDDR2_A[9] TDDR_A[9]
SDDR_D[2] DQ2 H7 H7 DQ2 TDDR_D[2]
M8 A0 SDDR_A[0] SDDR_A[1] ADDR2_A[1] ADDR2_A[0] C13 T26 BDDR2_A[0] BDDR2_A[3] TDDR_A[3] TDDR_A[0] A0 M8
SDDR_D[3] DQ3 H3 A_DDR2_A0 B_DDR2_A0 H3 DQ3 TDDR_D[3]
A1 SDDR_A[1] SDDR_A[10] 56 56 ADDR2_A[10] ADDR2_A[1] A22 AF26 BDDR2_A[1] BDDR2_A[1] TDDR_A[1] TDDR_A[1] A1
DQ4 M3 M3 DQ4
SDDR_D[4] H1 A_DDR2_A1 B_DDR2_A1 H1 TDDR_D[4]
M7 A2 SDDR_A[2] ADDR2_A[2] B13 T25 BDDR2_A[2] BDDR2_A[10] 56 TDDR_A[10] TDDR_A[2] A2 M7
SDDR_D[5] DQ5 AR301 A_DDR2_A2 B_DDR2_A2 DQ5 TDDR_D[5]
H9 A3 C22 AF23 BDDR2_A[3] AR304 A3 H9
N2 SDDR_A[3] SDDR_A[9] ADDR2_A[9] ADDR2_A[3] TDDR_A[3] N2
SDDR_D[6] DQ6 F1 A_DDR2_A3 B_DDR2_A3 F1 DQ6 TDDR_D[6]
N8 A4 SDDR_A[4] SDDR_A[12] ADDR2_A[12] ADDR2_A[4] A13 T24 BDDR2_A[4] TDDR_A[4] A4 N8

Copyright 2009 LG Electronics. Inc. All right reserved.

SDDR_D[7] DQ7 A_DDR2_A4 B_DDR2_A4 BDDR2_A[5] TDDR_A[5] DQ7 TDDR_D[7]
F9 A5 AE23 BDDR2_A[5] A5 F9
N3 SDDR_A[5] SDDR_A[7] ADDR2_A[7] ADDR2_A[5] A23 BDDR2_A[12] TDDR_A[12] TDDR_A[5] N3
SDDR_D[8] DQ8 C8 A_DDR2_A5 B_DDR2_A5 C8 DQ8 TDDR_D[8]
N7 A6 SDDR_A[6] AR302 ADDR2_A[6] C12 R26 BDDR2_A[6] 56 TDDR_A[6] A6 N7
SDDR_D[9] DQ9 SDDR_A[0] ADDR2_A[0] A_DDR2_A6 B_DDR2_A6 BDDR2_A[7] TDDR_A[7] DQ9 TDDR_D[9]
C2 A7 B23 AD22 BDDR2_A[7] A7 C2

SDDR_A[0-12]
TDDR_D[0-15]

P2 SDDR_A[7] ADDR2_A[7] AR305 TDDR_A[7] P2

SDDR_D[10] DQ10 SDDR_A[2] ADDR2_A[2] A_DDR2_A7 B_DDR2_A7 BDDR2_A[0] TDDR_A[0] DQ10 TDDR_D[10]

SDDR_D[0-15]
D7 D7

ADDR2_A[0-12]
P8 A8 SDDR_A[8] ADDR2_A[8] B12 R25 BDDR2_A[8] TDDR_A[8] A8 P8
SDDR_D[11] DQ11 D3 SDDR_A[4] ADDR2_A[4] A_DDR2_A8 B_DDR2_A8 BDDR2_A[2] TDDR_A[2] D3 DQ11 TDDR_D[11]
A9 SDDR_A[9] ADDR2_A[9] C23 AC22 BDDR2_A[9] TDDR_A[9] A9
TDDR_A[0-12]

DQ12 P3 SDDR_A[6] 56 ADDR2_A[6] A_DDR2_A9 B_DDR2_A9 TDDR_A[4] P3 DQ12

SDDR_D[12] D1 BDDR2_A[4] D1 TDDR_D[12]

BDDR2_A[0-12]
M2 A10/AP SDDR_A[10] ADDR2_A[10] B22 AD23 BDDR2_A[10] TDDR_A[10] A10/AP M2
SDDR_D[13] DQ13 SDDR_A[11] R319 56 ADDR2_A[11] A_DDR2_A10 B_DDR2_A10 BDDR2_A[6] 56 TDDR_A[6] DQ13 TDDR_D[13]
D9 A11 R24 BDDR2_A[11] A11 D9
P7 SDDR_A[11] ADDR2_A[11] A12 TDDR_A[11] P7
SDDR_D[14] DQ14 B1 SDDR_A[8] R320 56 ADDR2_A[8] A_DDR2_A11 B_DDR2_A11 BDDR2_A[11] R325 56 TDDR_A[11] B1 DQ14 TDDR_D[14]
R2 A12 SDDR_A[12] ADDR2_A[12] A24 AE22 BDDR2_A[12] TDDR_A[12] A12 R2
SDDR_D[15] DQ15 B9 A_DDR2_A12 B_DDR2_A12 BDDR2_A[8] R326 56 TDDR_A[8] B9 DQ15 TDDR_D[15]

+1.8V_S_DDR +1.8V_S_DDR
L2 BA0 SDDR_BA[0] 56 R303 ADDR2_BA[0] C24 AC23 BDDR2_BA[0] R327 56 TDDR_BA[0] BA0 L2
A_DDR2_BA0 B_DDR2_BA0
L3 BA1 SDDR_BA[1] 56 R304 ADDR2_BA[1] B24 AC24 BDDR2_BA[1] R328 56 TDDR_BA[1] BA1 L3
VDD5 A1 A_DDR2_BA1 B_DDR2_BA1 A1 VDD5
L1 BA2 SDDR_BA[2] R305 ADDR2_BA[2] D24 AB22 BDDR2_BA[2] R329 OPT TDDR_BA[2] NC4 L1
VDD4 E1 OPT A_DDR2_BA2 B_DDR2_BA2 0 E1 VDD4
R350 56 R306 ADDR2_MCLK B14 V25 BDDR2_MCLK R330
VDD3 J9 A_DDR2_MCLK B_DDR2_MCLK R351 J9 VDD3
22 22
VDD2 CK SDDR_CK TDDR_MCLK CK VDD2
M9 J8 J8 M9

OPT
OPT

150
R300
R344
150

VDD1 R1 K8 CK /SDDR_CK 22 R307 /ADDR2_MCLK A14 V24 /BDDR2_MCLK R331 22 /TDDR_MCLK CK K8 R1 VDD1
/A_DDR2_MCLK /B_DDR2_MCLK
K2 CKE SDDR_CKE 56 R308 ADDR2_CKE D23 AB23 BDDR2_CKE R332 56 TDDR_CKE CKE K2
A_DDR2_CKE B_DDR2_CKE
+1.8V_S_DDR +1.8V_S_DDR
R346 OPT R348 OPT
VDDQ10 A9 K9 ODT SDDR_ODT 56 R309 ADDR2_ODT D14 U26 BDDR2_ODT R333 56 ODT K9 A9 VDDQ10
R347 A_DDR2_ODT B_DDR2_ODT
VDDQ9 C1 L8 CS OPT R349 OPT CS L8 C1 VDDQ9
VDDQ8 C3 K7 RAS /SDDR_RAS 56 R310 /ADDR2_RAS D13 U25 /BDDR2_RAS R334 56 /TDDR_RAS RAS K7 C3 VDDQ8
/A_DDR2_RAS /B_DDR2_RAS
VDDQ7 C7 L7 CAS /SDDR_CAS 56 R311 /ADDR2_CAS D12 U24 /BDDR2_CAS R335 56 /TDDR_CAS CAS L7 C7 VDDQ7
/A_DDR2_CAS /B_DDR2_CAS
VDDQ6 C9 K3 WE /SDDR_WE 56 R312 /ADDR2_WE D22 AB24 /BDDR2_WE R336 56 /TDDR_WE WE K3 C9 VDDQ6
/A_DDR2_WE /B_DDR2_WE
VDDQ5 E9 E9 VDDQ5
VDDQ4 G1 G1 VDDQ4
F7 LDQS SDDR_DQS0_P 56 R313 ADDR2_DQS0_P B18 AB26 BDDR2_DQS0_P R337 56 TDDR_DQS0_P LDQS F7
VDDQ3 G3 A_DDR2_DQS0 B_DDR2_DQS0 G3 VDDQ3
B7 UDQS SDDR_DQS1_P 56 R314 ADDR2_DQS1_P C17 AA26 BDDR2_DQS1_P R338 56 TDDR_DQS1_P UDQS B7
VDDQ2 G7 A_DDR2_DQS1 B_DDR2_DQS1 G7 VDDQ2
VDDQ1 G9 G9 VDDQ1
F3 LDM SDDR_DQM0_P 56 R315 ADDR2_DQM0_P C18 AC25 BDDR2_DQM0_P R339 56 TDDR_DQM0_P LDM F3
A_DDR2_DQM0 B_DDR2_DQM0
B3 UDM SDDR_DQM1_P 56 R316 ADDR2_DQM1_P A19 AC26 BDDR2_DQM1_P R340 56 TDDR_DQM1_P UDM B3
A_DDR2_DQM1 B_DDR2_DQM1
VSS5 A3 A3 VSS5
VSS4 E3 E8 LDQS SDDR_DQS0_N 56 R317 ADDR2_DQS0_N A18 AB25 BDDR2_DQS0_N R341 56 TDDR_DQS0_N LDQS E8 E3 VSS4
A_DDR2_DQSB0 B_DDR2_DQSB0
VSS3 J3 A8 UDQS SDDR_DQS1_N 56 R318 ADDR2_DQS1_N B17 AA25 BDDR2_DQS1_N R342 56 TDDR_DQS1_N UDQS A8 J3 VSS3
A_DDR2_DQSB1 B_DDR2_DQSB1
VSS2 N1 N1 VSS2
AR306 AR310
VSS1 P9 SDDR_D[11] ADDR2_D[11] ADDR2_D[0] B15 W25 BDDR2_D[0] BDDR2_D[11] TDDR_D[11] P9 VSS1
R3 NC4 A_DDR2_DQ0 B_DDR2_DQ0 NC5 R3
SDDR_D[12] ADDR2_D[12] ADDR2_D[1] A21 AE26 BDDR2_D[1] BDDR2_D[12] TDDR_D[12]
R7 NC5 A_DDR2_DQ1 B_DDR2_DQ1 NC6 R7
SDDR_D[9] ADDR2_D[9] ADDR2_D[2] A15 W24 BDDR2_D[2] BDDR2_D[9] TDDR_D[9]
A_DDR2_DQ2 B_DDR2_DQ2
SDDR_D[14] 56 ADDR2_D[14] ADDR2_D[3] B21 AF24 BDDR2_D[3] BDDR2_D[14] TDDR_D[14]
VSSQ10 B2 A_DDR2_DQ3 B_DDR2_DQ3 AR311 B2 VSSQ10
NC1 AR307 ADDR2_D[4] C21 AF25 BDDR2_D[4] 56 NC1
VSSQ9 A2 SDDR_D[4] ADDR2_D[4] A_DDR2_DQ4 B_DDR2_DQ4 BDDR2_D[4] TDDR_D[4] A2 VSSQ9
B8 NC2 C14 V26 NC2 B8
E2 SDDR_D[3] ADDR2_D[3] ADDR2_D[5] BDDR2_D[5] BDDR2_D[3] TDDR_D[3] E2
VSSQ8 A7 A_DDR2_DQ5 B_DDR2_DQ5 A7 VSSQ8
R8 NC3 ADDR2_D[6] C20 AE25 BDDR2_D[6] NC3 R8
VSSQ7 SDDR_D[1] ADDR2_D[1] A_DDR2_DQ6 B_DDR2_DQ6 BDDR2_D[1] TDDR_D[1] VSSQ7
D2 C15 W26 D2
SDDR_D[6] 56 ADDR2_D[6] ADDR2_D[7] BDDR2_D[7] BDDR2_D[6] 56 TDDR_D[6]
VSSQ6 D8 A_DDR2_DQ7 B_DDR2_DQ7 D8 VSSQ6
AR308 ADDR2_D[8] C16 Y26 BDDR2_D[8] AR312
VSSQ5 E7 VSSDL SDDR_D[15] ADDR2_D[15] A_DDR2_DQ8 B_DDR2_DQ8 BDDR2_D[15] TDDR_D[15] VSSDL E7 VSSQ5
J7 ADDR2_D[9] C19 AD25 BDDR2_D[9] J7
VSSQ4 F2 SDDR_D[8] ADDR2_D[8] A_DDR2_DQ9 B_DDR2_DQ9 BDDR2_D[8] TDDR_D[8] +1.8V_S_DDR F2 VSSQ4
+1.8V_S_DDR ADDR2_D[10] B16 Y25 BDDR2_D[10]
BDDR2_D[0-15]

VSSQ3 F8 SDDR_D[10] ADDR2_D[10] A_DDR2_DQ10 B_DDR2_DQ10 BDDR2_D[10] TDDR_D[10] F8 VSSQ3

ADDR2_D[0-15]
ADDR2_D[11] B20 AE24 BDDR2_D[11]
VSSQ2 H2 SDDR_D[13] 56 ADDR2_D[13] A_DDR2_DQ11 B_DDR2_DQ11 BDDR2_D[13] TDDR_D[13] H2 VSSQ2
AR309 ADDR2_D[12] A20 AD26 BDDR2_D[12] AR313 56
VSSQ1 H8 J1 VDDL A_DDR2_DQ12 B_DDR2_DQ12 VDDL J1 H8 VSSQ1
SDDR_D[7] ADDR2_D[7] ADDR2_D[13] A16 Y24 BDDR2_D[13] BDDR2_D[7] TDDR_D[7]
SDDR_D[0] ADDR2_D[0] A_DDR2_DQ13 B_DDR2_DQ13 BDDR2_D[0] TDDR_D[0]
ADDR2_D[14] B19 AD24 BDDR2_D[14]
SDDR_D[2] ADDR2_D[2] A_DDR2_DQ14 B_DDR2_DQ14 BDDR2_D[2] TDDR_D[2]
ADDR2_D[15] A17 AA24 BDDR2_D[15]
SDDR_D[5] ADDR2_D[5] A_DDR2_DQ15 B_DDR2_DQ15 BDDR2_D[5] 56 TDDR_D[5]
56

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS MSD3369GV Platform 08/12/19 (MP)
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. DDR2 3 / 10

LGE Internal Use Only

 TUNER JACK PIN Audio Out Amp
EU_SCART [OPT]
IC403
[SCART2 PIN 8] LM324D
+12V
R491 R496
EU_SCART [OPT] 1K 1 14 1K
TV_L_OUT 1 14 DTV/MNT_R_OUT
L402 P400 +12V
MLB-201209-0120P-N2 C793 R445 R455 C792
GF05C-96S C433 2 13 C435
10uF 6800pF 33K 33K 6800pF 10uF
2 13
16V 50V 50V 16V
C421
22uF C427
+12V C429

R447
10K
R453
10K
16V 1 33pF 3 12 33pF
1 R415 R443 3 12
2 2 10K R417 R419 C 5.6K R457
3 0 SCART1_Lout SCART2_Rout
3 0 B Q402 4 11
R408 4 11 5.6K
4 4 2SC3052
DSUB_HSYNC 4.7K R418 C426
5 5 R444 R458
DSUB_VSYNC E 0.1uF 5 10
6 12K 5.6K 5.6K
6 16V SCART1_Rout 5 10 SCART2_Lout
7 7
S_C_IN C
8 R446 R456
8 33K 6 9 33K
B Q401 6 9
9 9 SC_RE1
S_Y_IN 2SC3052
10 R410
10
C430

R448
10K
R454
10K
11 1K E C428 33pF 7 8 33pF
DSUB_B 11 R490 7 8 R497
12 12 1K 1K
13 C TV_R_OUT DTV/MNT_L_OUT
DSUB_G 13
14 B Q400 C434 C791
14 SC_RE2 C794 C436
2SC3052 REC_8 10uF 6800pF 10uF
15 15 R411 6800pF
DSUB_R 16V 50V 16V
16 50V
16 1K E
17 17
COMP_Pr
18 18
19

Only for training and service purposes

COMP_Pb 19
20 20
TV_L_OUT
21 21
COMP_Y
22 22
23 Q426 R449
AV_CVBS_IN 23
24 2SC3052
24 2K
25 25 1/16W
SC1_B
26 26 Q430
27 27
SC2_CVBS_IN [ PC ] RT1P141C-T112
28 28 TV_R_OUT
SCART1_MUTE
29 29
SC1_CVBS_IN 3 1
30 30 R451
+5V_VGA +5V_ST C431
31 31 D400 Q427 2
SC1_R 2K 0.1uF
32 ENKMC2838-T112
32 A1 2SC3052 1/16W
33 33
SC1_G C
34 34 A2
35 35
DBG_RX IC400
36 36 DTV/MNT_L_OUT
M24C02-RMN6T C400
DBG_TX
37 0.1uF

Copyright 2009 LG Electronics. Inc. All right reserved.

37
SC2_ID E0 VCC
16V
38 38 1 8
REC_8 Q428 R450
39 39 R404 R406 VGA_EEPROM_WP
E1 WC R412 R416 2SC3052
SC1_FB 2 7 4.7K
40 40 4.7K 10K 100 2K
SC1_ID E2 SCL 1/16W
41 41 3 6
ISP_RXD RT1P141C-T112
42 42
AV_L_OUT VSS SDA Q431
4 5
43 ISP_TXD
43 DTV/MNT_R_OUT
44 SCART2_MUTE
AV_R_OUT 44 C401 C402 3 1
45 45 18pF 18pF
46 50V 50V R452 C432
DTV/MNT_L_OUT 46 2
Q429 0.1uF

R409
0
47

R413
0
47 2K
48 48 2SC3052 1/16W
DTV/MNT_R_OUT
49 49
50

DDC_SCL/UART_RX
50

DDC_SDA/UART_TX
TV_L_OUT
51 51
52 52
TV_R_OUT
53 53
54 54
HP_DET
55 55
DDC_SCL/UART_RX +12V
56 56 [SCART2 DTV/MNT_VOUT]
DDC_SDA/UART_TX
57 L418
/FE_RESET 57
CIC21J501NE
58 58 [CONTROL IR & LED] EU_SCART [OPT]
FE_AGC_SPEED_CTL
59 59
FE_BOOSTER_CTRL
60 60 C440 C439 C437
61 22uF 0.1uF 0.1uF
HP_R_OUT 61 16V
16V 16V
62 62 +3.3V_ST
63 63 E
HP_L_OUT R465
64 64 470
R423 ISA1530AC1
65 65 0 P402 Q417 B
DTV/MNT_V_OUT
66 SCL_SUB/AMP
66 12507WR-14L
D403 C
R441 47 67 67 R405 R424 R467
FE_TS_SYN R407 CDS3C05HDMI1 47K
68 4.7K 4.7K 0
R468 33 68 SDA_SUB/AMP 5.6V Q418 C438
FE_TS_SERIAL_D
69 R402 47uF
FE_TS_DATA[0] 69 100 1% 2SC3052 C
AR401 33 70 1 3.3V_SCL 6.3V
70 KEY1 B
FE_TS_DATA[1] L404
71 R466 DTV/MNT_VOUT
FE_TS_DATA[2] 71 R403 BLM15BD121SN1 750
72 72 100 1%
FE_TS_DATA[3] KEY2 2 3.3V_SDA E
73 73 AMOTECH R463
FE_TS_DATA[4] L403 D404 DTV/MNT_V_OUT R462 15K
AR400 33 74 74 ZD401 750
FE_TS_DATA[5] BLM15BD121SN1 CDS3C05HDMI1
75 5.6V 5.6V 3 GND R464
FE_TS_DATA[6] 75 120
76 76
FE_TS_DATA[7] +5V_ST ZD400 500mVpp => 2.14Vpp
77

0.1uF
0.1uF

C407
C408
77 5.6V 4 KEY1
R440 47 78 78 AMOTECH
FE_TS_CLK
79 79
R442 47 80 5 KEY2
FE_TS_VAL_ERR 80
81 L401
SPDIF_OUT 81 BLM18PG121SN1D
82 82
+5V_VGA 6 5V_ST
83 83
USB
FE_DEMOD_SCL C403
84 84 0.1uF C405 +3.3V
FE_DEMOD_SDA 1000pF
85 16V 50V 7 GND
85 IC401
+5V_EXT
86 86 L405 MIC2009YM6-TR R478
FE_SIF L411 L412
87 BLM15BD121SN1 4.7K
87 8 IR MLB-201209-0120P-N2 MLB-201209-0120P-N2
IR VOUT VIN
88 88 6 1
FE_VMAIN AMOTECH
89 89 120-ohm ILIMIT GND
5.6V 5 $0.18 2
C410 +3.3V_ST 9 GND USB_CTL C422
90 90 100pF ZD402 C423
FE_TUNER_SCL FAULT/ ENABLE 10uF
L400 4 3
91 50V JK400 10V 0.1uF
FE_TUNER_SDA 91 BLM18PG121SN1D C416 C415
R438
180

92 22uF 10uF +5V_GENERAL

92 +3.3V_ST 10 3.3V_ST KJA-UB-0-0037
+3.3V_ST 16V 6.3V
93 93
FE_ANT5V_MONITOR C406 C409 R475
L413 94 1000pF 10K R470
94 R483 0.1uF 47 USB_OCD
BLM18PG121SN1D 16V 50V 11 WARM_ST
95 95 OPT 1
96 R482 4.7K 001:AI16
FE_AM_AUDIO 96 SUB_WARM_ST
C424 C425
0.1uF 0.1uF R480 12 POWER ON
120K AMOTECH 2 USB_DM
97 OPT C412 5.6V AMOTECH
0.1uF D405 5.6V

97
16V D406 13 SPK N
OPT 3 USB_DP
+3.3V_ST OPT OPT
R439 0
SUB_SPK_MONO 14 SPK P
R428 4 D401
BREATHING_SPK D402
OPT CDS3C05HDMI1 CDS3C05HDMI1
R473 4.7K 15
LED_ON 5.6V
5

5.6V

C411
0.1uF
16V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS MSD3369GV Platform 08/12/19 (MP)
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. AV INPUT/SCART/IR/USB 4 10

LGE Internal Use Only

 EU_CI[OPT]
DVB-CI SLOT
+5V_CI_ON

CI_DATA[0-7]
EU_CI[OPT]
DVB-CI TS INPUT

+5V_GENERAL AR506 FE_TS_DATA[7]

33
C505 CI_MDI[7] FE_TS_DATA[6]
10uF
CI_MDI[6] FE_TS_DATA[5]
10V EU_CI
CI_MDI[5] FE_TS_DATA[4]
EAG41860102

10K
CI_MDI[4]

CI_DATA[0-7]

R505
P500
AR507 FE_TS_DATA[3]
/CI_CD1 33
C501 10067972-000LF CI_MDI[3] FE_TS_DATA[2]
0.1uF CI_MDI[2] FE_TS_DATA[1]
16V 35 CI_MDI[1]

FE_TS_DATA[0-7]
FE_TS_DATA[0]
R511 100 36 CI_DATA[3]
CI_MDI[0]
37 3 CI_DATA[4]
AR500
33 38 4 CI_DATA[5]

R517
10K
CI_TS_DATA[4] FE_TS_DATA[0-7]
39 5 CI_DATA[6]
CI_TS_DATA[5]
40 6 CI_DATA[7] AR513
CI_TS_DATA[6] 33
CI_TS_DATA[7] 41 7 R515 47 CI_MISTRT FE_TS_SYN
/PCM_CE
42 8 CI_ADDR[10] CI_MIVAL_ERR FE_TS_VAL_ERR
R508 10K 43 9 CI_OE
44 10 CI_ADDR[11] CI_MCLKI FE_TS_CLK
CI_IORD
45 11 CI_ADDR[9] +5V_GENERAL
CI_IOWR
46 12 CI_ADDR[8]
47 13 CI_ADDR[13]
CI_MDI[0]
CI_ADDR[14]

10K

R518
CI_MDI[1] 48 14
CI_MDI[2] 49 15 CI_WE
50 16 R516 100
CI_MDI[3] /PCM_IRQA
C503 0.1uF

Only for training and service purposes

51 17
R513 0 R514 0 C509
52 18 C508
GND 0.1uF
OPT 53 19 OPT 0.1uF
CI_MDI[4] 16V
GND
CI_MDI[5] 54 20 EU_CI[OPT]
55 21 CI_ADDR[12]
CI_MDI[6] DVB-CI HOST I/F
CI_ADDR[7] GND
CI_MDI[7] 56 22
R509 10K 57 23 CI_ADDR[6]
R503 47 58 24 CI_ADDR[5]
PCM_RST
R500 47 59 25 CI_ADDR[4] CI_DET
/PCM_WAIT
AR503 60 26 CI_ADDR[3]
REG
33 61 27 CI_ADDR[2]
CI_TS_CLK
CI_TS_VAL 62 28 CI_ADDR[1]
CI_TS_SYN 63 29 CI_ADDR[0] IC501 +3.3V
64 30 CI_DATA[0] C511
65 31 CI_DATA[1] 0.1uF
CI_ADDR[0-14] 1OE VCC 16V
CI_TS_DATA[0] 66 32 CI_DATA[2] 1 20
33 TOSHIBA
CI_TS_DATA[1] 67 33
CI_TS_DATA[2] 68 34 1A1 2OE

Copyright 2009 LG Electronics. Inc. All right reserved.

CI_TS_DATA[3] PCM_A[0] 2 19

0
AR504 2
G2 69 1
G1 0ITO742440D

OPT
2Y4 1Y1
R510 100 CI_ADDR[7] 3 18 CI_ADDR[0]
/CI_CD2

R512
+5V_GENERAL GND
1A2 2A4

10K
R507
PCM_A[1] 4 17 PCM_A[7]
GND
2Y3 1Y2
CI_ADDR[6] 5 16 CI_ADDR[1]
R506 GND
1A3 2A3
10K C502 6 15
PCM_A[2] PCM_A[6]
0.1uF
16V
2Y2 1Y3
TC74LCX244FT

CI_ADDR[5] 7 14 CI_ADDR[2]
CI_MISTRT
CI_MIVAL_ERR 1A4 2A2
PCM_A[3] 8 13 PCM_A[5]

CI_MCLKI 2Y1 1Y4

CI_ADDR[4] 9 12 CI_ADDR[3]

GND 2A1
10 11 PCM_A[4]

EU_CI[OPT]
DVB-CI DETECT
DVB-CI SERIAL BUFFER TS

+3.3V_CI +3.3V_CI CI_DATA[0] AR508 PCM_D[0]

+3.3V_CI 33
IC500
CI_DATA[1] PCM_D[1]
KIC7SZ32FU
CI_DATA[2] PCM_D[2]
IN_B 1 5 VCC
/CI_CD2 CI_DATA[3] PCM_D[3]
IN_A 2
/CI_CD1

10K

0.1uF
R520
GND 3 4 OUT_Y

C510
16V
CI_DATA[4] AR509 PCM_D[4]
33
CI_DATA[0-7]

IC502 CI_DATA[5] PCM_D[5]

GND
R519 CI_DATA[6] PCM_D[6]
74LVC541A(PW)
PCM_D[0-7]

CI_DET
CI_DATA[7] PCM_D[7]
47
R521
/PCM_CD
47 OE1 VCC
1 20
PCM_D[0-7]
0.1uF
C512

A0 OE2 CI_DATA[0-7]
FE_TS_CLK 2 19

CI POWER ENABLE CONTROL A1 Y0

FE_TS_VAL_ERR 3 18 BUF_TS_CLK
AR514 AR510
EU_CI[OPT] 33
A2 Y1 CI_ADDR[8] PCM_A[8]
+5V_CI_ON FE_TS_SYN 4 17 BUF_TS_VAL_ERR CI_ADDR[9] PCM_A[9]
+5V_CI Q501 L500 CI_ADDR[10] PCM_A[10]
RSR025P03 CIC21J501NE A3 Y2
S FE_TS_SERIAL_D 5 16 CI_ADDR[11] PCM_A[11]
D BUF_TS_SYN

R522 33
BUFFER

C506 10K A4 Y3
G C507 6 15 BUF_TS_DATA[0]
0.1uF 10uF 0.1uF AR511

C500
33

C504
16V

0.1uF
R504 10V 16V R523
A5 Y4 CI_ADDR[12] PCM_A[12]
22K 16V 10K
R530 R532 7 14 CI_ADDR[13] PCM_A[13]
OPT 10K
CI_ADDR[14] PCM_A[14]
A6 Y5 REG /PCM_REG
C 8 13
R502
R529 10K B Q500
2SC3052 A7 Y6
0 9 12
E AR512
33
C CI_OE /PCM_OE
GND Y7
R531 B Q502
10 11 CI_WE /PCM_WE
PCM_5V_CTL 2SC3052 CI_IORD /PCM_IORD
OPT OPT
E CI_IOWR /PCM_IOWR
R533
OPT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS MSD3369GV Platform 08/12/19 (MP)
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. CI 5 10

LGE Internal Use Only

 5V_HDMI_1

20 R612
0
HPD1
20

OPT
19 5V_HDMI_3

R615
C600 5V_HDMI_2 5V_HDMI_4
OPT 5V_HDMI_1
18
+3.3V_HDMI
17

OPT

R600
R610 0
16 DDC_SDA_1

15 0 DDC_SCL_1
R611

14
R607 0 R646 R649 R628 R630 R648 R650
CEC_REMOTE 47K
13 R626 R629 47K 47K 47K 47K 47K
47K 47K
CK-_HDMI1 DDC_SDA_4
12 DDC_SDA_3
DDC_SDA_1 DDC_SDA_2
11
CK+ DDC_SCL_1 DDC_SCL_2 DDC_SCL_3 DDC_SCL_4
10 CK+_HDMI1
D0-
9

0.1uF
C609
0.1uF
C610
0.1uF
C611
0.1uF
C612
0.1uF
C613
D0-_HDMI1

0.1uF
C614

EAG59023302
D0_GND
8
D0+
7 D0+_HDMI1
D1-
6 D1-_HDMI1
D1_GND
5
D1+
4 D1+_HDMI1

HPD4
D2-

D2-_HDMI4
D1-_HDMI4

D2+_HDMI4
D1+_HDMI4
CK+_HDMI4

HDMI_CLK-
HDMI_CLK+
HDMI_RX0-
HDMI_RX0+
HDMI_RX1-
HDMI_RX1+
3

D0-_HDMI4
CK-_HDMI4

D0+_HDMI4

HDMI_RX2-
HDMI_RX2+
D2-_HDMI1 C616

DDC_SCL_4
DDC_SDA_4

HDMI_SCL
HDMI_SDA
D2_GND
2 HDCP EEPROM +3.3V 0.1uF
D2+ C617
1 D2+_HDMI1

Only for training and service purposes

+3.3V_HDMI 0.1uF
C618
IC601 R643
CAT24WC08W-T 4.7K
0.1uF
R640
4.7K R675 C619
A0 VCC
1 8 2K
A1 WP 0.1uF
UI_HW_PORT1 2 7 5V_HDMI_4
JK600 EEPROM_SCL
A2 SCL 22 R676
3 6 R641 2K
VSS SDA
4 5
R642 22 EEPROM_SDA C630
C603 0.1uF
5V_HDMI_2 16V
+1.8V_HDMI
0.1uF

20 R613
0
C624 C625
HPD2 C623
20 0.1uF 0.1uF
0.1uF
16V 16V
16V
19 C601

OPT
R616
OPT

Copyright 2009 LG Electronics. Inc. All right reserved.

18
+3.3V_ST
5V_HDMI_3
17

OPT
R603 0

R601
OUT_D0-
OUT_D0+
VSS_12
OUT_D1-
OUT_D1+
VDDO[1V8]
OUT_D2-
OUT_D2+
VSS_11
VDDC[1V8]_3
RXD_D2+
RXD_D2-
VDDH[3V3]_8
RXD_D1+
RXD_D1-
VSS_10
RXD_D0+
RXD_D0-
VDDH[3V3]_7
RXD_DC+
RXD_DC-
RXD_DDC_CLK
RXD_DDC_DAT
RXD_5V
RXD_HPD

16 DDC_SDA_2
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76

DDC_SCL_2
100

15 R604 0 R639 R637 VSS_1 1 75 VDDH[1V8]_2

68K 5V_HDMI_1 R671 C631
9.1K OUT_C+ 2 74 R12K
14 0.1uF
R605 0 OUT_C- 3 73 VSS_9 12K 1% 16V
CEC_REMOTE MMBD301LT1G
13 Q600 VDDO[3V3] 4 72 RXC_D2+
SSM6N15FU D2+_HDMI3
D605 OUT_DDC_CLK RXC_D2-
CK-_HDMI2 5 71 D2-_HDMI3
12 30V C628
OUT_DDC_DAT 6 70 VDDH[3V3]_6
R644 0.1uF
11 0 SOURCE1 DRAIN1 16V VSS_2 7 69 RXC_D1+
CK+ HDMI_CEC 1 6 D1+_HDMI3
10 CK+_HDMI2 CEC_REMOTE VDDC[1V8]_1 RXC_D1-
8 68 D1-_HDMI3
D0- RXA_HPD IC600 VSS_8
9 9 67
D0-_HDMI2 GATE1 GATE2 HPD1
2 5 RXA_5V 10 66 RXC_D0+
D0_GND D0+_HDMI3
8

EAG59023302
RXA_DDC_DAT 11 TDA9996HL 65 RXC_D0-
D0-_HDMI3
D0+ DDC_SDA_1 RXA_DDC_CLK VDDH[3V3]_5
7 DRAIN2 SOURCE2 12 64
D0+_HDMI2 3 4 DDC_SCL_1
C606 RXA_C- 13 63 RXC_C+
D1- CK+_HDMI3
6 0.1uF CK-_HDMI1 RXA_C+ RXC_C-
D1-_HDMI2 14 62 CK-_HDMI3
D1_GND 16V CK+_HDMI1 VDDH[3V3]_1 15 61 RXC_DDC_CLK
5 DDC_SCL_3
RXA_D0- 16 60 RXC_DDCC_DAT
D1+ DDC_SDA_3
4 R627 0 GND D0-_HDMI1 RXA_D0+ RXC_5V
D1+_HDMI2 17 59
D2- D0+_HDMI1 VSS_3 RXC_HPD
3 18 58
D2-_HDMI2 OPT HPD3
RXA_D1- 19 57 CEC
D2_GND CEC_REMOTE
2 D1-_HDMI1 RXA_D1+ VSS_7 OPT
20 56 R665
D2+ D1+_HDMI1 VDDH[3V3]_2 VDDS[3V3]
1 21 55
D2+_HDMI2
RXA_D2- 22 54 CDEC_STBY
D2-_HDMI1 RXA_D2+ INT/HP_CTRL R662
23 53
D2+_HDMI1 VDDH[1V8]_1 XTAL_OUT
24 52 OPT
NC 25 51 XTAL_IN
+5V_ST
C620
0.1uF

R663 R661
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50

0 OPT
UI_HW_PORT2 C615
0.1uF
PD

JK601
TEST
VSS_4
VSS_5
VSS_6
MODE

RXB_C-
0

RXB_5V
RXB_C+
RXB_D0-
RXB_D1-
RXB_D2-

RXB_D0+
RXB_D1+
RXB_D2+
SCL/SEL0

RXB_HPD
SDA/SEL1

VDDC[3V3]

CDEC_DDC
VDDC[1V8]_2

VDDH[3V3]_3
VDDH[3V3]_4
R669

RXB_DDC_CLK

R666
RXB_DDC_DAT

+1.8V_HDMI

OPT
22

5V_HDMI_3 5V_HDMI_4 C632 C633

C622 0.1uF 0.1uF
C626 C621
0.1uF 16V 16V
0.1uF 0.1uF
22

20 R614 20 R636 006:AK24 16V 16V 16V

R679

0 006:AG11 0 5V_HDMI_2
HPD3 HPD4
20 20
R670
C629
R680

OPT
0

R617
OPT
R638
19 C602 19 C605 0.1uF
OPT OPT 16V
18 18

17 17

OPT
OPT
R608 0 R633 0

R602
R631
16 DDC_SDA_3 16 DDC_SDA_4
R634 0
15 DDC_SCL_3 15 DDC_SCL_4
R606 0 +3.3V +3.3V_HDMI
HPD2

14 14
R609 R635 0 L602
TDA9996_SDA
TDA9996_SCL

0
CEC_REMOTE CEC_REMOTE BLM18PG121SN1D
DDC_SCL_2

13 13
D0-_HDMI2
D1-_HDMI2
D2-_HDMI2

DDC_SDA_2
CK-_HDMI2
D0+_HDMI2
D1+_HDMI2
D2+_HDMI2

CK+_HDMI2

CK-_HDMI3 CK-_HDMI4
12 12
C634
11 11 0.1uF
CK+ CK+
10 10 CK+_HDMI4
CK+_HDMI3
D0- D0-
9 9
D0-_HDMI3 D0-_HDMI4
D0_GND D0_GND
8 8

EAG59023302
EAG59023301
D0+ D0+
7 7
D0+_HDMI3 D0+_HDMI4
D1- D1- +1.8V_AMP +1.8V_HDMI
6 6
D1-_HDMI3 D1-_HDMI4
D1_GND D1_GND L601
5 5 BLM18PG121SN1D
D1+ D1+
4 4
D1+_HDMI3 D1+_HDMI4 C635
D2- D2- C627 10uF
3 3
D2-_HDMI3 D2-_HDMI4 0 . 1 u F 6.3V
D2_GND D2_GND
2 2
D2+ D2+
1 1
D2+_HDMI3 D2+_HDMI4

UI_HW_PORT4
UI_HW_PORT3
JK602 JK603

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS MSD3369GV Platform 08/12/19 (MP)
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HDMI 6 / 10

LGE Internal Use Only

 +24V +24V_AMP

L703
CIC21J501NE

C725
68uF/35V
105 For protect Peak noise

L704 SPK_L+ 007:AA18

+24V_AMP D704 AD-8770 P700
R792 R725 EAP60684501 C755
1N4148W 0.01uF SMAW250-04Q
12 12 2S 2F 50V
100V R730
OPT C749 R734
C741 0.1uF 4.7K
390pF 50V 3.3
50V 1S 1F C745 1
0.47uF SPEAKER_L 007:AG19 SPK_R-
OPT OPT 50V
C720
0.1uF C728 C729 C733 C742 15uH R735
50V 0.1uF 0.1uF 0.1uF 390pF
50V 50V 50V 50V C750 3.3 2
D705 0.1uF R731 007:AG22 SPK_R+
1N4148W 50V C756
R790 R726 4.7K 0.01uF
100V 12 12 50V
C716 OPT 3
SPK_L- 007:AA18 007:AG24 SPK_L-
22000pF
50V C726
22000pF
50V
007:AG26 SPK_L+ 4

C727
0.1uF 5
R704 50V
100
001:AA9 AMP_RST

PGND1A_2
PGND1A_1
OUT1A_2
OUT1A_1
PVDD1A_2
PVDD1A_1
PVDD1B_2
PVDD1B_1
OUT1B_2
OUT1B_1
PGND1B_2
PGND1B_1
BST1B
VDR1B
C707
1000pF
50V

56
55
54
53
52
51
50
49
48
47
46
45
44
43
R740
0 BST1A 42 NC C730
002:V8
AUDIO_MASTER_CLK C713 1 SPK_R+ 007:AA17
50V0 . 1 u F

Only for training and service purposes

VDR1A 2 41 VDR2A C732
0 . 1 u F 50V RESET BST2A 22000pF D706
+3.3V 3 40
+1.8V_AMP 50V 1N4148W R791 R727 L705 C757
AD 4 39 PGND2A_2 12 12
+1.8V_AMP 100V AD-8770 0.01uF
DVSS_1 5 38 PGND2A_1 OPT EAP60684501 C746 C751 R732
C709 0.47uF 50V
0.1uF VSS_IO 6 IC701 37 OUT2A_2 C743 2S 2F 50V 0.1uF 4.7K R736
390pF 50V BLUETOOTH
CLK_I 7 36 OUT2A_1 50V 3.3 SPEAKER_R
L701 C708
1000pF VDD_IO 8 35 PVDD2A_2
50V EAN60664001 C744 1S 1F R737
L700 C705 DGND_PLL 9 34 PVDD2A_1 390pF
R708 D707 50V 3.3 +5V_GENERAL
100pF AGND_PLL 10 33 PVDD2B_2 15uH C752 R733
3.3K 1N4148W C758
50V LFM PVDD2B_1 R793 R728 0.1uF 4.7K
G

11 NTP-3100L 32 100V 0.01uF

12

BLM18PG121SN1D
AVDD_PLL OUT2B_2 OPT 12 50V 50V
12 31 SPK_R- 007:AA17
DVDD_PLL OUT2B_1

BLM18PG121SN1D
13 30
S
D

TEST0 14 29 PGND2B_2 C771 1uF

C736 C700 C702 C737 C706 +24V_AMP
10uF 10uF 0.1uF 10uF C704
10V 10uF 0.1uF

15
16
17
18
19
20
21
22
23
24
25
26
27
28
10V
Q706

16V 10V 10V 16V

OPT OPT
47K
RTR030P02

R746
L781 +5V_GENERAL

SCL
SDA
+1.8V_AMP

BCK
WCK
CIC21J501NE R747

DVDD
C734 C735

BST2B
C762 BLUETOOTH Audio TR Amp

FAULT
VDR2B

SDATA

DVSS_2

Copyright 2009 LG Electronics. Inc. All right reserved.

0.1uF 0.1uF 68uF/35V 0

PGND2B_1
50V 50V 105 C785

MONITOR_0
MONITOR_1
MONITOR_2
0.1uF C R748 R749
MCLK SDATA WCK BCK TP is necessory C760 C724 0
10uF C715 0.1uF 16V B 4.7K
0.1uF 50V C731
10V
OPT

16V +12V 2SC3052

R745
0

22000pF L780 Q705 BT_ON/OFF

50V CIC21J501NE E
R722 100 R783 P701
002:V8 MS_LRCH +3.3V_ST OPT 12507WR-08L
C721 1K
R720 100 E C783 C784
002:V8 MS_LRCK 0.1uF OPT
R719 0.1uF 0.1uF 1
R721 100 16V 2SA1504S 16V
002:V8 MS_SCK POWER_DET 16V
Q780 B 2
R709 100 0
1
0 0 1 : L 3 ; 0 0 4 : Y 1 SDA_SUB/AMP R724 R756
R718 C 3
R710 100 10K BT_DM
0 0 1 : L 3 ; 0 0 4 : Y 1 1SCL_SUB/AMP R785
47K 0
C 4
100 Q781
R729 C781 R757
C712 C714 B 5
Q701 AMP_MUTE 2SC3052 C 10uF BT_DP
33pF 33pF R717 6.3V 0
33K OPT 2SC3052 10K 6
50V 50V B
E 002:C25 C780 BT_LOUT
7
22uF BT_LOUT_AMP
16V R781
3K E 8
R786 C782
BT_LOUT_AMP 15K 9
0.1uF
R780 R784 16V
47K R782 470 OPT
OPT 3K

EARPHONE AMP
EU_HP[OPT] BT & HP AUDIO SWITCH

HP_LOUT IC700
TPA6110A2DGNRG4
002:Y10 +5V_GENERAL
R711 C717 +5V_GENERAL
R712 0.22uF R743
BYPASS IN1- 20K 20K IC702
1 8 680K
MC74HC4066ADR2G
C701 16V HP/BT_LOUT
1uF C773
GND VO1 C718 C770 R744 0.1uF +5V_GENERAL
10V 2 7 HP_L_OUT 2.2uF XA VCC
680K 1 14 16V
100uF 16V
16V R714 C723 R753
SHUTDOWN VDD 1000pF 10K
3 6 1K OPT YA CONTROL_A
2 13 0 R750
C703 HP_LOUT HP_AU_SW
HP_ROUT 0.22uF R702
16V 20K IN2- VO2
4 5 HP_R_OUT YB CONTROL_D
3 12
C722 BT_LOUT
002:Y10 C719 R715
100uF 1000pF
1K OPT XB XD
+5V_EARPHONE 16V 4 11
R706
20K C710 +5V_GENERAL
+5V_EARPHONE C711 C790 +5V_GENERAL CONTROL_B YD
R701 0.1uF 10uF 10uF +5V_EARPHONE 5 10
10K D708 HP_ROUT
16V 10V 10V R741
360mVrms(8mW) => 450mVrms(13mW) ENKMC2838-T112
A1 10K R742
R713 CONTROL_C YC 0
C BT_AU_SW 6 9 R754
10K
C A2 0
R700 B GND XC
Q700 7 8
10K 2SC3052
+3.3V_ST
E +5V_GENERAL

R751
R705
C 680K
OPT
R707 B HP/BT_ROUT
Q707
HP_MUTE R752 C772
10K 2SC3052
680K 2.2uF
E 16V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS MSD3369GV Platform 08/12/26 (MP)
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. AUDIO/BT/FAN 7 10

LGE Internal Use Only

 +12V

CIC21J501NE
FROM LIPS & POWER B/D +5V_+12V L823
+12V
+5V_ST L810 +5V_GENERAL
MLB-201209-0120P-N2 +5V_GENERAL IC808
+5V_ST MP2305DS
L817

OPT
C841 C868

D801
+3.3V_ST C842

100V
RT1P141C-T112 C854 MLB-201209-0120P-N2
L801 C845 0.1uF

100K
R848
BLM15BD121SN1 Q801 0.01uF 10uF BS SS 50V
0.1uF 16V 0.1uF C862 C865 1 8
25V 50V
R804 10uF 0.1uF

1N4148W_DIODES
Q806
3 1 10K SI4925BDY C872
R805 +5V_ST IN EN 1000pF
P800 R807 2 7
33K 2 10K OPT
+5V_CI C848
R834 OPT S1 1 8 D1_2
FM20020-24 OPT 0.01uF
+3.3V_ST C846 COMP
C R802 L818 C839 50V SW
10K 3 6
10K 10uF G1 2 7 D1_1 CIC21J501NE C835
Q800 B 10uF C860 R852
POWER_ON/RL_ON 0.47uF 9.1K
2SC3052 16V GND FB 5600pF Vout=0.923*(1+R1/R2)
C831 C867 C869 25V 50V
S2 3 6 D2_2 4 5
R835 22uF 10uF
E 560 0.1uF +5V_EXT
R851 R2

10K
10V 16V

R856
Q803 12K
G2 4 5 D2_1
1 2 2SC3052 C R847 1%
C847 R1 56K
B R842 10uF PANEL_POWER 1%
3 4 10K 16V
R829
POWER_ON/RL_ON 10K
E C853
C887 L819
5 6 +5V_ST R837 C858 C864
22uH C863
10uF 22K 22uF 22uF
L806 1uF 0.1uF
6.3V C859 16V 16V
7 8 OPT OPT 25V 16V
C885 C812 0.1uF 3225 3225
MLB-201209-0120P-N2 C824 R843 16V
100uF 100uF 22uF 560
9 10 16V 16V 16V C1130
+12V
C Placed on SMD-TOP
11 12 R832 10K B Q805
L807

Only for training and service purposes

MLB-201209-0120P-N2 2SC3052
13 14 OPT
C E
C820 C826 C890 R833
C818 47uF 0.1uF 10K B
15 16 0.1uF 22uF PANEL_CTL R839
50V 25V 50V 16V 22K
OPT +24V 001:AK20 R870
+1.8V_MEMC for DDR
17 18 L804 Q804 E POWER_ON/RL_ON
MLB-201209-0120P-N2 2SC3052 0 +12V +5V_GENERAL
POWER_ON_PM4
19 20
C819 C821 C832 C813 R871 OPT
21 22 68uF/35V 68uF/35V 0.1uF 0.1uF CIC21J501NE R854
50V 50V 0 10K
105 105 POWER_ON_DELAY L822
OPT 1/10W
23 24 C866
1000pF
+5V_GENERAL
+5V_GENERAL OPT
R e p l a c e d P a r t C878
OPT
25 1000pF
R818 +3.3V_ST Close to IC
Vout=0.8*(1+R1/R2) R849
10K
+3.3V_MEMC
R814 CIC21J501NE 12K
L811 C833 OPT Close to IC IC807
1/8W R838
100 R822 L815 MP2212DN 400 mA + 600 mA
1%

Copyright 2009 LG Electronics. Inc. All right reserved.

C 10K BLM18PG121SN1D 20K
1000pF R1

OPT
R821 1/10W
Q802 B 10K R809
INV_CTL C851
2SC3052 FB EN/SYNC
R823 10K C825 0.1uF 1 8

R815 6.8K
16V R850 R836
E 10K Vout=0.8*(1+R1/R2) 1/10W 0.1uF 9.1K L809 +1.8V_MEMC
OPT 16V R2 2.7K
1/8W GND SW_2 2.2uH About 1.84V
1/10W
R840 1% 2 $0.24 7
Close to IC IC804 +3.3V
56K +3.3V_CI SP-7850_2.2
MP2212DN 1/10W C OUT
L800 IN SW_1
R1 1% 3 6
BG2012B080TF $0.07 L814 C875 C873
A_DIM BLM18PG121SN1D +5V_GENERAL
FB EN/SYNC 4.9A 0.0150OHM 34MHZ 22uF 22uF
R803 001:W12 1 8 D802 OPT BS VCC R811 16V 16V
C804 0 R841 4 5 C874
C805 18K L808
16V 1uF C IN C857 C861 10 10nF
1/10W R2 3.6uH 100V
0.1uF 25V GND SW_2 22uF 22uF 1/10W 50V
1% 2 7 1N4148W_DIODES
OPT OPT $0.24 1%
NR8040T3R6N R863 Placed on SMD-TOP
R857 IN SW_1
22 3 6 47
Placed on SMD-TOP Placed on SMD-TOP
OPC_OUT2 R806 ERROR_OUT
OPT C810 C834
C892 D800 OPT BS VCC C844 C850 C852
C807 4.7K OPT 4 5 C830 10uF 1uF
OPT R855 0.1uF 22uF 0.1uF
R808 0.1uF C829 C855 10nF 6.3V 10V
16V OPT 100V 16V 16V
OPT 22uF
0 16V 1N4148W_DIODES 50V
OPT
R810
OPC_DISABLE
R859 R858 47
22 Placed on SMD-TOP
PWM_DIM 10 C828
L805 C823 1/10W
1uF 1uF
BG2012B080TF R860 1% 10V
25V 22 +1.26V Core for MEMC
OPT OPC_OUT1
OPC_ENABLE

Vout=0.8*(1+R1/R2)
IC806
+5V_GENERAL
APE8953MP 1% 1% +1.26V_MEMC
1/10W 1/10W
30K 27K 600 mA
1.5mA EN GND R846 R853
Stand-by +3.3V S6 core 1.26 volt 8 1
+1.8V_MEMC C881
C884 R2 R845
1uF POK FB
OPT 33K R1
10V 7 2
1/10W
VCNTL VOUT_1 1%
+5V_GENERAL 6 3
BLM18PG121SN1D
465 mA @85% efficiency L821 25V
VIN VOUT_2 0.01uF
5 4
+5V_ST +3.3V_ST +3.3V C882

+3.3V_ST C876 C896

10uF 10uF
IC801 6.3V
+3.3V_AVDD_MPLL 6.3V
AP1117E33G-13
L803 R831 MAX 3A
BLM18PG121SN1D 1/10W R844
IN ADJ/GND 10K 1K
3 1 CIC21J501NE
C880 OPT
C802 C803 2 C806 C808 L812
C815
10uF 0.1uF 10uF 0.1uF OPT 1000pF
OUT 0.1uF +1.26V_VDDC C898 C879
10V 16V 6.3V 16V R830
16V 10uF 10uF
C891 6.3V 6.3V
10K
R824 1/10W Close to IC 0.1uF
R825 16V
1/10W 22K 24K 1%
IC805 1/8W 1600 mA
1%
MP2212DN
$0.07
4.9A 0.0150OHM 34MHZ
FB EN/SYNC 3A, DCR=0.025 ohm
1 8
R827
75K L813 L816 +1.8V_DDR
1/8W GND SW_2 3.6uH BLM18SG121TN1D +3.3V
1% 2 $0.24 7 +1.8V_DDR
+3.3V NR8040T3R6N
IC802
C OUT SC4215ISTRT
IN SW_1
Placed on SMD-TOP 3 6 C856
IC803 C843 C849
+1.8V_AMP 0.1uF
AP1117E18G-13 22uF 22uF
D803 OPT BS VCC 16V 16V BLM18PG121SN1D NC_1 GND R816
4 5 C836 L820 1 8 15K
C IN C837 C838 10nF 1%
IN 3 1 ADJ/GND 100V
22uF 50V Placed on SMD-TOP R813
OPT 1N4148W_DIODES 10K EN ADJ
2 2 7
C816 C814 C827 R862 C871
OUT C822
10uF 0.1uF 10uF 0.1uF 0.1uF
R826 47 16V VIN VO
10V 16V 6.3V 16V 3 6
OPT
10 C840
1/10W 1uF NC_2 NC_3 R819 C897 C877
1% C883 C895 C870 4 5 12K 22uF 0.1uF
10V
10uF 0.1uF 4.7uF 1% 16V 16V
10V 16V 10V

R1/R2 : 27K / 20K => Vout=1.88

R1/R2 : 15K / 12K => Vout=1.80
R1/R2 : 12K / 9.1K => Vout=1.85

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS MSD3369GV Platform 08/12/19 (MP)
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Power 8 10

LGE Internal Use Only

 SPI FLASH +3.3V_MEMC

PANEL_POWER
IC902

MEMC_RXE4-
MEMC_RXE3-
MEMC_RXE2-
MEMC_RXE1-
MEMC_RXE0-
MEMC_RXO4-
MEMC_RXO3-
MEMC_RXO2-
MEMC_RXO1-
MEMC_RXO0-

MEMC_RXEC-

MEMC_RXE4+
MEMC_RXE3+
MEMC_RXE2+
MEMC_RXE1+
MEMC_RXE0+
MEMC_RXOC-

MEMC_RXO4+
MEMC_RXO3+
MEMC_RXO2+
MEMC_RXO1+
MEMC_RXO0+

MEMC_RXEC+
MEMC_RXOC+
W25X20AVSNIG

0.1uF

C903
R925 56 CS VCC R928 R929 L907
1 8
M_SPI_CZ SPI_FRC MLB-201209-0120P-N2
R926 56 DO HOLD 100 100
2 7
M_SPI_DO
R927 10K WP CLK

M_XTALI
3 6
R947 56 R930 R931

M_XTALO
M_SPI_CK
GND DIO R948 56 100 100
4 5
M_SPI_DI
R935 R936 +3.3V_MEMC
0.1uF

C951
C952
C953
1000pF

100 100
10uF16V

URSA_B0P
URSA_B1P

URSA_A0P
URSA_A1P
URSA_A2P
URSA_A3P
URSA_A4P
URSA_B0M
URSA_B1M

URSA_A0M
URSA_A1M
URSA_A2M
URSA_A3M
URSA_A4M
+3.3V_MEMC R945 R946

URSA_ACKP
URSA_ACKM
100 100 BLM18PG121SN1D
P900
R938 R939 TF05-51S
PI Result L905
BLM18PG121SN1D 100 100 +3.3V_MEMC
+1.26V_MEMC 1

Placed on SMD-TOP R942 R943 2

1uF

C904
C906
L904

0.1uF
3
BLM18PG121SN1D 100 100
4

L906
5

L903 6

16V
22uF
C931
C940

10uF
C908
C910
10uF
C930
C937
0.1uF
BLM18PG121SN1D
7

0.1uF
0.1uF

0.1uF
C939
0.1uF
C962 C963 8

10uF 10V
0.1uF 9
0.1uF C901 10uF
10

C914
C956 0 . 1 u F

C912
URSA_B4M 11

R954 C907 10uF +3.3V_MEMC URSA_B4P 12

PI Result URSA_B3M 13

820 URSA_B3P 14

15
R990 0 C905 10uF
ISP_RXD_TR URSA_BCKM 16
R991 0

RE4P
RE4N
RE3P
RE3N
RECKP
RECKN
RE2P
RE2N
RE1P
RE1N
RE0P
RE0N
AVDD_LVDS_1
GND_6
RO4P
RO4N
RO3P
RO3N
ROCKP
ROCKN
RO2P
RO2N
RO1P
RO1N
RO0P
RO0N
AVDD_LVDS_2
GND_5
GPIO_13
GPIO_14
XOUT
XIN
GPIO_2
GPIO_1
SDAM
SCLM
GPIO[25]
GPIO_12
GPIO_9
GPIO_8
GND_2
AVDD_PLL
LVA0P
LVA0M
LVA1P
LVA1M
LVA2P
LVA2M
LVACKP
LVACKM
LVA3P
LVA3M
LVA4P
LVA4M
GPIO_6
GPIO_4
LVB0P
LVB0M
LVB1P
LVB1M
REXT
+3.3V_MEMC URSA_BCKP 17
ISP_TXD_TR

470
3.3K

OPT
18
C942 0.1uF URSA_B2M 19

B1
C1
C2
B2
B3
C3
C4
B4
B5
C5
C6
B6
B7
C7
C8
B8
B9
C9

A1
A2
A3
A4
H8
A5
A6
A7
A8
H7
D4
D3
D5
D6
N7
G8
A9
D9
D7
V4 LGD BIT SEL
OPT
OPT

URSA_B2P

F11
F10

E11
20

B14
C10
B10
B11
C11
C12
B12
B13
C13
C14

G11
K15
K16
A14
D13
D11
A10
A11
A12
A13
D12
R992 100 SDAS GPIO_5

Only for training and service purposes

R949 1K E1 D8
MEMC_SDA URSA_B1M 21
R993 100 SCLS GPIO_7 H or NC : 10 bit
MEMC_SCL D1 D10 URSA_B1P 22
C943
OPC_ENABLE
R980
R982 OPT

0.1uF L : 8 bit
R970
R972
R978

+3.3V_MEMC GPIO[8] F1 E10 GPIO_11 URSA_B0M 23

GPIO[9] GPIO_10 URSA_B0P 24

G1 E3 R955
C928 0.1uF BIT_SEL 25
GND_14 K8 [E1] D2 GPIO_3 C948 0.1uF
R950 1K OPT 26

OPT VDDC_1 E5 [D1] C15 LVB2P URSA_B2P URSA_A4M 27

R958 GPIO[10] E2 LVB2M URSA_B2M URSA_A4P 28

BIT_SEL B15
OPT URSA_A3M 29
R956 GPIO[11] F2 A15 LVBCKP URSA_BCKP
LVDS_SEL URSA_A3P 30
LVBCKM URSA_BCKM OPT
OPT 31
GPIO[12] F3 A16
R974 22 URSA_ACKM
GPIO[13] G2 LVB3P URSA_B3P 32
AFLC_EN B16 OPC_OUT2
URSA_ACKP 33
GPIO[22] M4 C16 LVB3M URSA_B3M R969 22 34
LVB4P URSA_B4P OPC_EN
+3.3V_MEMC
GPIO[23] M5 D15 URSA_A2M 35

R957 1K R961 1K LVB4M URSA_B4M OPC_ENABLE OPTION URSA_A2P 36

L902 GPIO[14] G3 D16
R965 URSA_A1M 37
GPIO[15] E4 F9 AVDD_33_2 C949 22
OPC_OUT1 URSA_A1P 38

BLM18PG121SN1D GPIO[16] F4 G10 GND_4 URSA_A0M 39

C960 C961 GPIO[17] G4 LVC0P URSA_C0P URSA_A0P 40

E15

10V
0.1uF R966 41
0.1uF GPIO[18] H4 E16 LVC0M 0.1uF URSA_C0M 22
PWM_DIM 42
+1.8V_MEMC 16V 16V LVC1P URSA_C1P 43
GPIO[19] J 4 E14
44

C917 10uF
LVC1M URSA_C1M

C916 10uF
GPIO[20] K4 F14 R967
45
GPIO[21] L4 F16 LVC2P URSA_C2P LVDS_SEL

Copyright 2009 LG Electronics. Inc. All right reserved.

PI Result OPT 46
L900 C929 VDDP_2 LVC2M URSA_C2M
J6 F15 AFLC_EN 47
0

GND_7 LVCCKP URSA_CCKP 48

H9 G15 R968 OPT
OPT

49
0

OPT
OPT
OPT

BLM18PG121SN1D GND_15K9 LVCCKM URSA_CCKM

G16

16V
0.1uF 0.1uF
50

22uF

0.1uF
0.1uF
10uF
G14 LVC3P URSA_C3P 51
V4 LGD LVDS SEL
VDDC_2 F6 H14 LVC3M URSA_C3M 52
R971
R981

R973
R975
R979
R983

C926 L or NC : VESA
URSA_DQ[20] MDATA[20] H1 H16 LVC4P URSA_C4P
H : JEIDA

C911
URSA_DQ[19] MDATA[19] LVC4M URSA_C4M

C954
H2 H15

C955
C909
J15 LVD0P URSA_D0P
Placed on SMD-TOP URSA_DQ[17] MDATA[17] H3 J16 LVD0M URSA_D0M
V4 LGD OPC

URSA_DQ[0-31]
URSA_DQ[22] MDATA[22] J1
IC900 J14 LVD1P URSA_D1P
LVD1M URSA_D1M L or NC : DISABLE
K14
URSA_DQ[27] MDATA[27] H : ENABLE
J2
URSA_DQ[28] MDATA[28] J3 C950 P901
C919 GND_3 TF05-41S
0.1uF G9
URSA_DQ[25] MDATA[25] K1
LGE7329A L14 LVD2P URSA_D2P
1
URSA_DQ[30] MDATA[30] K2 L15 LVD2M 0.1uF URSA_D2M
2
AVDD_DDR_2 K6 L16 LVDCKP URSA_DCKP URSA_D4M 3

DQM[3] LVDCKM URSA_DCKM URSA_D4P 4

URSA_DQM3 K3 M16 URSA_D3M 5
DQM[2] L1 F8 AVDD_33_1 URSA_D3P
URSA_DQM2 6
C920 0.1uF GND_10 J8 M15 LVD3P URSA_D3P 7

DQS[2] LVD3M URSA_D3M URSA_DCKM 8

URSA_DQS2 L2 M14 URSA_DCKP 9
DQSB[2] L3 N16 LVD4P URSA_D4P
URSA_DQSB2 10
AVDD_DDR_4 L6 N15 LVD4M C947 URSA_D4M URSA_D2M 11

VDDP_3 URSA_D2P 12
L8 URSA_D1M 13
GND_8 H10 H6 VDDC_5 URSA_D1P 14
DQS[3] GPIO[24] 0.1uF +3.3V_MEMC URSA_D0M
C927 0.1uF M1 N6 15
URSA_DQS3 URSA_D0P
DQSB[3] GPIO[7] 16
URSA_DQSB3 M2 E12
17
AVDD_DDR_5 L7 D14 GPIO[6]
18
URSA_DQ[31] MDATA[31] M3 F12 GPIO[5] URSA_C4M 19

URSA_DQ[24] MDATA[24] GPIO[4] URSA_C4P 20

N1 E13 URSA_C3M 21
C921 0.1uF GND_11 J9 F13 GPIO[3] URSA_C3P 22
1K
1K

URSA_DQ[26] MDATA[26] N2 G13 GPIO[2] 23

R959
R963

URSA_DQ[29] MDATA[29] GPIO[1] URSA_CCKM 24

N3 H13 URSA_CCKP 25
AVDD_DDR_6 L10 J13 GPIO[0]
26
URSA_DQ[23] MDATA[23] P1 K12 PWM0 URSA_C2M 27

URSA_DQ[16] MDATA[16] PWM1 URSA_C2P 28

R1 [N13] L12 URSA_C1M 29
URSA_DQ[18] MDATA[18] T1 K13 CSZ URSA_C1P
+3.3V_MEMC [L9] M_SPI_CZ 30
[N12] URSA_C0M
URSA_DQ[21] MDATA[21] T2 [N5] M12 SDO 31
PI Result M_SPI_DO URSA_C0P
MCLK[0] SDI 32
R2 [N4] M13
1K
1K

URSA_MCLK M_SPI_DI 33
OPT
OPT

R960
R964

MCLKZ[0] P2 L13 SCK

URSA_MCLKZ M_SPI_CK 34
BLM18PG121SN1D C925 0.1uF GND_1 G7 N14 GPIO[30] 35

AVDD_MEMPLL GPIO[29] 36

L901 L9 N13 37
MVREF GPIO[28]
N5 N12 38
ODT 39
URSA_ODT N4
40
0.1uF C922

C913
10uF
C915
C957
0.1uF
0.1uF
41

T3
R3
P3
T4
R4
J10
P4
T5
R5
P5
T6
R6
P6
T7
L11
R7
P7
T8
R8
P8
N8
K10
F7
T9
R9
K7
P9
T10
K11
R10
P10
T11
R11
J11
P11
T12
R12
P12
J7
H11
T13
R13
P13
T14
R14
P14
T15
R15
P15
T16
R16
P16
N11
M11
G6

42
0.1uF

WEZ

RASZ
CASZ
GND_9
RESET

DQS[0]
DQS[1]

C923

MCLKE
DQM[1]
DQM[0]

GND_12
GND_16
GND_13
GND_17

VDDP_1

VDDC_3
DQSB[0]
DQSB[1]
VDDC_4

BADR[1]
BADR[0]
GPIO[26] N9
GPIO[27] N10

MCLK[1]

MADR[0]
MADR[2]
MADR[4]
MADR[6]
MADR[8]
MADR[1]
MADR[5]
MADR[9]
MADR[7]
MADR[3]

MADR[11]
MADR[10]
MADR[12]
MCLKZ[1]

MDATA[4]
MDATA[3]
MDATA[1]
MDATA[6]
MDATA[9]
MDATA[8]
MDATA[7]
MDATA[0]
MDATA[2]
MDATA[5]

MDATA[11]
MDATA[12]
MDATA[14]
MDATA[15]
MDATA[10]
MDATA[13]

AVDD_DDR_7
AVDD_DDR_3
AVDD_DDR_1

+3.3V_MEMC
C944

C938
0.1uF

0.1uF
0.1uF

C941
0.1uF

R994
10K
C945

10K
C932
C933
C934
C935

R951
C936
XTAL R934 1M MEMC_RESET
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
0

R953

M_XTALO M_XTALI
X900
C900 12MHz C902 GPIO8 PWM1 PWM0

1uF

10K
C918

R952
0.1uF
URSA_A[0]
URSA_A[2]
URSA_A[4]
URSA_A[6]
URSA_A[8]
URSA_A[11]
URSA_A[1]
URSA_A[10]
URSA_A[5]
URSA_A[9]
URSA_A[12]
URSA_A[7]
URSA_A[3]

C924
15pF 15pF
I2C HIGH LOW HIGH

EEPROM HIGH HIGH LOW

URSA_DQ[4]
URSA_DQ[3]
URSA_DQ[1]
URSA_DQ[6]
URSA_DQ[11]
URSA_DQ[12]
URSA_DQ[9]
URSA_DQ[14]
URSA_DQ[15]
URSA_DQ[8]
URSA_DQ[10]
URSA_DQ[13]
URSA_DQ[7]
URSA_DQ[0]
URSA_DQ[2]
URSA_DQ[5]

URSA_DQ[0-31] SPI HIGH HIGH HIGH

URSA_BA1
URSA_BA0

URSA_WEZ
URSA_DQS0
URSA_DQS1

URSA_RASZ
URSA_CASZ
URSA_DQM1
URSA_DQM0
URSA_DQSB0
URSA_DQSB1

URSA_A[0-12]
URSA_MCLK1

URSA_MCLKE
URSA_MCLKZ1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS MSD3369GV Platform 08/12/19 (MP)
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MST7329N(FRC) MAIN 9 10

LGE Internal Use Only

 DDR2 1.8V By CAP - Place these Caps near Memory

+1.8V_MEMC +1.8V_FRC_DDR +1.8V_FRC_DDR +1.8V_FRC_DDR

BLM18PG121SN1D
L1000

10V
10V

0.1uF
0.1uF
0.1uF
C1024
C1026
C1028
10uF
C1029
C1031
C1033
C1034
C1035
C1036
C1037
C1038
C1039
C1040

C1042
C1043
C1044
0.1uF
C1021
C1025
C1027
C1041

C1000
C1013
0.1uF
C1023
10uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF

C1002
10uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
10uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF

C1003
C1004
C1005
C1006
C1007
C1009
C1011
C1012
C1014
C1015
C1016
C1017
C1018
C1019
C1020
C1022
0.1uF
0.1uF

C1001
10uF

10uF
PI Result

Only for training and service purposes

+1.8V_FRC_DDR +1.8V_FRC_DDR

1K1%

R1001
R1037
1K1%
URSA_DQ[0-31] URSA_DQ[0-31]

URSA_A[0-12]
IC1000 IC1001

1K 1%
R1038
1K1%
AR1000 AR1004

R1002
C1030
0.1uF
C1032

C1010
0.1uF

C1008
1000pF

1000pF
URSA_DQ[27] DDR_DQ[27] DDR_DQ[15] URSA_DQ[15]
URSA_DQ[28] DDR_DQ[28]
HYB18TC256160BF-2.5 HYB18TC256160BF-2.5 DDR_DQ[8] 56 URSA_DQ[8]
URSA_DQ[25] 56 DDR_DQ[25] DDR_DQ[10] URSA_DQ[10]
URSA_DQ[30] DDR_DQ[30] DDR_DQ[13] URSA_DQ[13]
DDR_DQ[16] DQ0 G8 J2 VREF VREF J2 G8 DQ0 DDR_DQ[0]

Copyright 2009 LG Electronics. Inc. All right reserved.

AR1001 DDR_DQ[17] DQ1 G2 G2 DQ1 DDR_DQ[1] AR1005
URSA_DQ[22] DDR_DQ[22] DDR_DQ[7] URSA_DQ[7]
DDR_DQ[18] DQ2 URSA_A[3] AR1010 DDRA_A[3] DQ2 DDR_DQ[2]
URSA_DQ[17] DDR_DQ[17] H7 A0 DDRB_A[0] DDRA_A[0] A0 H7 DDR_DQ[0] URSA_DQ[0]
M8 DDRB_A[10] AR1013 URSA_A[10] URSA_A[1] 22 DDRA_A[1] M8 56
DDR_DQ[19] DQ3 H3 H3 DQ3 DDR_DQ[3]
URSA_DQ[19] 56 DDR_DQ[19] M3 A1 DDRB_A[1] DDRA_A[1] A1 M3 DDR_DQ[2] URSA_DQ[2]
DDR_DQ[20] DQ4 DDRB_A[1] 22 URSA_A[1] URSA_A[10] DDRA_A[10] DQ4 DDR_DQ[4]
URSA_DQ[20] DDR_DQ[20] H1 A2 DDRB_A[2] DDRA_A[2] A2 H1 DDR_DQ[5] URSA_DQ[5]
DDR_DQ[21] DQ5 M7 DDRB_A[3] URSA_A[3] M7 DQ5 DDR_DQ[5]
H9 A3 DDRB_A[3] DDRA_A[3] A3 H9
AR1002 DDR_DQ[22] DQ6 N2 DDRB_A[9] URSA_A[9] URSA_A[9] DDRA_A[9] N2 DQ6 DDR_DQ[6] AR1006
URSA_DQ[31] DDR_DQ[31] F1 A4 DDRB_A[4] DDRA_A[4] A4 F1 DDR_DQ[11] URSA_DQ[11]
DDR_DQ[23] DQ7 N8 DDRB_A[12] AR1014 URSA_A[12] URSA_A[12] AR1011 DDRA_A[12] N8 DQ7 DDR_DQ[7]
URSA_DQ[24] DDR_DQ[24] F9 A5 DDRB_A[5] DDRA_A[5] A5 F9 DDR_DQ[12] 56 URSA_DQ[12]
DDR_DQ[24] DQ8 N3 DDRB_A[7] 22 URSA_A[7] URSA_A[7] 22 DDRA_A[7] N3 DQ8 DDR_DQ[8]
C8 C8

DDR_DQ[16-31]
DDR_DQ[0-15]

URSA_DQ[26] 56 DDR_DQ[26] N7 A6 DDRB_A[6] DDRA_A[6] A6 N7 DDR_DQ[9] URSA_DQ[9]

DDR_DQ[25] DQ9 DDRB_A[5] URSA_A[5] URSA_A[5] DDRA_A[5] DQ9 DDR_DQ[9]

DDRB_A[0-12]
URSA_DQ[29] DDR_DQ[29] C2 A7 DDRB_A[7] DDRA_A[7] A7 C2 DDR_DQ[14] URSA_DQ[14]

DDRA_A[0-12]
DDR_DQ[26] DQ10 P2 DDRB_A[0] URSA_A[0] URSA_A[2] DDRA_A[2] P2 DQ10 DDR_DQ[10]
D7 A8 DDRB_A[8] DDRA_A[8] A8 D7
AR1003 DDR_DQ[27] DQ11 P8 DDRB_A[2] AR1015 URSA_A[2] URSA_A[0] AR1012 DDRA_A[0] P8 DQ11 DDR_DQ[11] AR1007
URSA_DQ[23] DDR_DQ[23] D3 A9 DDRB_A[9] DDRA_A[9] A9 D3 DDR_DQ[6] URSA_DQ[6]
DDR_DQ[28] DQ12 P3 DDRB_A[4] 22 URSA_A[4] URSA_A[6] 22 DDRA_A[6] P3 DQ12 DDR_DQ[12]
URSA_DQ[16] DDR_DQ[16] D1 A10/AP DDRB_A[10] DDRA_A[10] A10/AP D1 DDR_DQ[1] 56 URSA_DQ[1]
DDR_DQ[29] DQ13 M2 DDRB_A[6] URSA_A[6] URSA_A[4] DDRA_A[4] M2 DQ13 DDR_DQ[13]
URSA_DQ[18] 56 DDR_DQ[18] D9 A11 DDRB_A[11] DDRA_A[11] A11 D9 DDR_DQ[3] URSA_DQ[3]
DDR_DQ[30] DQ14 P7 AR1017 AR1019 P7 DQ14 DDR_DQ[14]
URSA_DQ[21] DDR_DQ[21] B1 A12 DDRB_A[12] B_URSA_RASZ URSA_RASZ URSA_RASZ A_URSA_RASZ DDRA_A[12] A12 B1 DDR_DQ[4] URSA_DQ[4]
DDR_DQ[31] DQ15 R2 R2 DQ15 DDR_DQ[15]
B9 B_URSA_CASZ URSA_CASZ URSA_CASZ A_URSA_CASZ B9
DDRB_A[11] URSA_A[11] URSA_A[8] 22 DDRA_A[8]
+1.8V_FRC_DDR L2 BA0 DDRB_A[8] URSA_A[8] URSA_A[11] DDRA_A[11] BA0 L2
B_URSA_BA0 A_URSA_BA0 +1.8V_FRC_DDR
L3 BA1 22 BA1 L3
VDD_5 B_URSA_BA1 A_URSA_BA1 VDD_5
A1 R1005 22 R1024 22 A1
VDD_4 URSA_MCLK 009:J11 009:AB4 URSA_MCLK1 VDD_4
E1 E1
VDD_3 J9 J8 CK CK J8 J9 VDD_3

OPT
150
150
OPT

R1000
R1039

VDD_2 M9 K8 CK R1006 22 R1025 22 CK K8 M9 VDD_2

URSA_MCLKZ 009:J10 009:AB4 URSA_MCLKZ1
VDD_1 R1 K2 CKE CKE K2 R1 VDD_1
B_URSA_MCLKE 010:T10 010:V9 A_URSA_MCLKE

K9 ODT R1008 22 R1027 22 ODT K9

URSA_ODT 010:Y14;009:J10 0 1 0 : Q 1 4 ; 0 0 9 : J 1 0URSA_ODT
VDDQ_10 A9 L8 CS CS L8 A9 VDDQ_10
VDDQ_9 C1 K7 RAS RAS K7 C1 VDDQ_9
B_URSA_RASZ 010:R16 010:X16 A_URSA_RASZ
VDDQ_8 C3 L7 CAS CAS L7 C3 VDDQ_8
B_URSA_CASZ 010:R16 010:X16 A_URSA_CASZ
VDDQ_7 C7 K3 WE WE K3 C7 VDDQ_7
B_URSA_WEZ 010:T10 010:V8 A_URSA_WEZ
VDDQ_6 C9 C9 VDDQ_6
VDDQ_5 E9 E9 VDDQ_5
F7 LDQS R1012 56 R1031 56 LDQS F7
VDDQ_4 URSA_DQS2 009:J14 009:X4 URSA_DQS0 VDDQ_4
G1 UDQS R1013 56 R1032 56 UDQS G1
VDDQ_3 B7 URSA_DQS3 URSA_DQS1 B7 VDDQ_3
G3 009:J13 009:Y4 G3
VDDQ_2 G7 G7 VDDQ_2
VDDQ_1 G9 F3 LDM R1014 56 R1033 56 LDM F3 G9 VDDQ_1
URSA_DQM2 009:J15 009:X4 URSA_DQM0
B3 UDM R1015 56 R1034 56 UDM B3
URSA_DQM3 009:J15 009:W4 URSA_DQM1

VSS_5 A3 E8 LDQS R1016 56 R1035 56 LDQS E8 A3 VSS_5

URSA_DQSB2 009:J14 009:X4 URSA_DQSB0
VSS_4 E3 A8 UDQS R1017 56 R1036 56 UDQS A8 E3 VSS_4
URSA_DQSB3 009:J13 009:Y4 URSA_DQSB1
VSS_3 J3 J3 VSS_3
VSS_2 N1 N1 VSS_2
L1 NC_4 AR1016 NC_4 L1
VSS_1 P9 P9 VSS_1
NC_5 B_URSA_BA0 URSA_BA0 010:T9;009:S4 NC_5
R3 R3
NC_6 B_URSA_BA1 URSA_BA1 010:T9;009:R4 NC_6
R7 R7
010:Q14 B_URSA_MCLKE URSA_MCLKE 010:T9;009:T4
VSSQ_10 010:Q13 B_URSA_WEZ URSA_WEZ 010:T8;009:R4 VSSQ_10
B2 NC_1 22 NC_1 B2
VSSQ_9 A2 A2 VSSQ_9
B8 NC_2 AR1018 NC_2 B8
VSSQ_8 E2 E2 VSSQ_8
A7 NC_3 010:V10;009:S4 URSA_BA0 A_URSA_BA0 NC_3 A7
R8 010:AA15 R8
VSSQ_7 D2 +1.8V_FRC_DDR D2 VSSQ_7
+1.8V_FRC_DDR 010:V10;009:R4 URSA_BA1 A_URSA_BA1 010:AA15
VSSQ_6 D8 D8 VSSQ_6
0 1 0 : V 1 0 ; 0 0 9 : T 4URSA_MCLKE A_URSA_MCLKE 010:Z14
VSSQ_5 E7 VSSDL VSSDL E7 VSSQ_5
J7 010:V10;009:R4 URSA_WEZ A_URSA_WEZ 010:Y13 J7
VSSQ_4 22 VSSQ_4
F2 F2
VSSQ_3 F8 F8 VSSQ_3
VSSQ_2 H2 H2 VSSQ_2
VSSQ_1 H8 J1 VDDL VDDL J1 H8 VSSQ_1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS MSD3369GV Platform 08/12/19 (MP)
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MST7323S DDR2 10 10

LGE Internal Use Only

 Attenuation Rev(4)
+3.3V_TUNER +3.3V_TUNER
R180 4.7K FE_RESET DVB-CI DETECT
OPT
845 OHM 1%
R182R181 +3.3V_TUNER
22 820 OPT C110
R106 0.1uF
RF_ATTENUATION
10 16V
OPT OPT
FE_AGC_SPEED_CTL IC105
NL17SZ08DFT2G
OPT OPT OPT (TUNER RESET GPIO OPTION)
C184 C185 C186
TU_RESET FE_TS_VAL 1 5
BAP70-02

OPT
R183
0
0.1uF 0.1uF 2200pF
PIN Diode 10 C151
R104 FE_TS_ERR 2
0.1uF
D101 3 4
16V
50V
BAP70-02
OPT GND
TUNER RESET 16V FE_TS_VAL_ERR
Active High 0.1uF R149
for Attenuation at least 3mA : ACTIVE LOW (SOFT RESET) C130 47
C134
0.1uF
16V
0.1uF
C131 D_3.3V

NEED TO VERY CLOSE TO RF LINE

BECAUSE THIS POINT MAKE ATTENUATOR +1.8V_TUNER

0.1uF
0.1uF

0.1uF
+3.3V_TUNER

0.1uF
4.99K

1000pF
+5V_TUNER +3.3V_TUNER +5V_TUNER

TU_RESET
+1.8V_TUNER

1%
C128
C133
C117 0.1uF

0
C_+3.3V

0
+1.2V

C122
C124
C126
R118
C152 C155

OPT
Rev(9)

R185

R184
15pF 15pF C152,155
50V 50V 18pF=>13pF=>15pF
X102

Only for training and service purposes

L115

OPT
4.7K
R160

VDDA_8
VDDC_9
GND_9
VDDA_7
REXT
VDDC_8
VDDC_7
VREF_P
VREF_N
VDDC_6
VI2C
RESET
OPT
R159
4.7K
6.8nH=>12 nH =>6.8nH 20.25MHz
KCN-ET-0-0094 For Attenuation
JK102

48
47
46
45
44
43
42
41
40
39
38
37
C109 C112 A_1.2V A_3.3V
L115 C116 1000pF VDDA_1 1 36 GND_8
56pF 39pF 0603CS-6N8XGLW2% IN1 SDA

I2S_DA
I2S_CL
I2C_SCL2
I2C_SDA2
TDI
TCK
TMS
TDO
VDDL_4
VSSL_4
VSSH_4
VDDH_4
VDDAH_OSC
VSSAH_OSC
XO
XI

1 2 35 R129 100 FE_TUNER_SDA

2 6.8nH GND_1 3 34 SCL R130 C_+3.3V
5% 5% 100 FE_TUNER_SCL
C137 C140

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49

D102 IN2 4 33 VDDD_2

RCLAMP0502B 18pF C142 C143
GND_2 IC102 EXTREF 0.1uF 18pF 18pF I2S_WS 48 PDN C158 0.1uF
5 32 1
L106 50V 50V

2%
OPT
C114 0.1uF EXTCHOKE X1 VDDL_1 PDP C159 0.1uF

2%

L103
6 31 2 47

270nH
XC5000

C144
L105

6.8pF
390nH
820nH 2% GND_3 7 30 GND_7 X101 VSSL_1 3 46 VDDAL_AFE2

R144
4.7K
C111 1008CS-821XGLC VDDA_2 8 29 X2 31.875MHz GPIO1 4 45 VSSAL_AFE2
120pF R140

0603CS-R39XGLW
C120 0.1uF VDDA_3 9 28 ADDRSEL C141 Rev(6) 47 MSTRT 5 44 SIF
FE_TS_SYNC

0603CS-R27XGLW
5% DEVELOPE OPT C140,141
C119 0.1uF VDDC_1 DDI2 X103 18pF R141 47 MERR 43 CVBS
10 27 C138 32.0MHz 33pF=>13pF=>15pF=>18pF 6 IC104
X-TAL_1 GND_2 FE_TS_ERR
GND_4 VDDC_5 1 4 VSSH_1 VDDAH_CVBS
Rev(5) 11 26 GND_1 X-TAL_2
R142 47 7 42
C111 2 3
FE_TS_SERIAL DRX3913K-XK
C121 0.1uF VDDC_2 12 25 DDI1 0.1uF VDDH_1 8 41 VSSAH_CVBS
C166
1000pF
50V

150pF->120pF R132 TUNER_CVBS_IF_P

47 MCLK 9 40 INP

13
14
15
16
17
18
19
20
21
22
23
24
FE_TS_DATA_CLK R143 47 MVAL INN
10 39
FE_TS_VAL FE_TS_DATA[0] R133 47 MD0 VSSAH_AFE1
11 38
TUNER_SIF_IF_N

SIF

VIF
FE_TS_DATA[1] R134 MD1 VDDAH_AFE1
+3.3V_TUNER +1.8V_TUNER 47 37
50V

12

Copyright 2009 LG Electronics. Inc. All right reserved.

VAGC
FE_TS_DATA[2] R135 MD2 VDDAL_AFE1
47 R152

GND_5
GND_6
13 36
C167
1000pF

L107

VDDC_3
VDDC_4

VDDA_4
VDDA_5
VDDA_6
FE_TS_DATA[3] R136
47 MD3 35 VSSAL_AFE1 6.8K
+1.8V_TUNER LQH32MN2R2K23L 2.2uH 14

TESTMODE
VSSL_2 15 34 IF_AGC
IF_AGC
VDDL_2 16 33 RF_AGC

0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0 . 1 u F VDDD_1
C136 C139 C163
0.1uF 0.1uF 0.027uF
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

16V

C123
C125
C127
C129
C132
C135
MD4
MD5
MD6
MD7
RSTN

GPIO2
VSYNC
VSSL_3

VSSH_2
VSSH_3
VDDL_3

VDDH_2
VDDH_3
SAW_SW

I2C_SCL1
I2C_SDA1

R155
1K C_+3.3V
IF_AGC
C175 FE_TS_DATA[4] R137 47
0.1uF FE_TS_DATA[5] R138
50V 47 R150
+5V_TUNER FE_TS_DATA[6] R139
47 4.7K
FE_TS_DATA[7] R131 47
R151
FE_RESET
C104 100
R121 0.1uF
390 16V C156
C_+3.3V 0.1uF
TUNER_SIF_IF_N R147 R148 16V
1:C9 OPT 100 100
R145
4.7K 50V 50V
E FE_TS_DATA[0-7] 10pF 10pF
R153 C150 C153
680 Q105
ISA1530AC1 R146
L111 B 4.7K
MLF1608A2R7J OPT
C176 C
2.7uH 5%
10pF
50V

Place the Buffer close to Tuner

[SCART1 TV VOUT] +5V_TUNER
P_+12V
L101
MBW3216-501TF

C174 +1.2V A_1.2V

C102 C103 R122 0.1uF
C106 390
0.1uF 0.1uF 10uF 16V L109
16V 16V 16V CIC21J501NE
TUNER_CVBS_IF_P
E
FE_DEMOD_SCL

R109
FE_DEMOD_SDA

470 C160 C164 C168

ISA1530AC1 Rev(5) 0.1uF 0.1uF C170 C172
E 10uF 16V
B Q103 R154 C160 MLCC 16V 16V 0.1uF 0.1uF
680 Q106 +5V_TUNER 16V 16V
C ISA1530AC1
R107 L112 B
47K MLF1608A2R7J
C107 C177 C
2.7uH 5% 6.8pF
47uF C
R158 16V 50V C179
0 Q102
B R178 0.1uF
2SC3052
390 16V +3.3V_TUNER A_3.3V
R113 FE_VOUT
CVBS_SCART_OUT E 390
R108 CVBS_SCART_OUT L110
15K CIC21J501NE
R179
R110 390
180 E
Rev(8) Q109 16V 16V 16V 16V
R110 16V 16V
ISA1530AC1 +5V_TUNER 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
220=>560=>180 B +1.2V
C161 C162 C165 C169 C171 C173
R113,179
1.5K=>1.3K=>200=>390 C

0
(SC1_TV_VOUT_MUTE GPIO OPTION)

R115
Q101 IC103
L113

SC1_VIDEO_MUTE RT1P141C-T112 R114

2K Q104 AZ1117H-1.2TRE1 +3.3V_TUNER C_+3.3V
CIC21J501NE

2SC3052 +3.3V_TUNER D_3.3V

16V 1 3 L116
IN OUT
0.1uF CIC21J501NE L108
C105 2 ADJ/GND CIC21J501NE
C146 C148 C149
C147
100uF 100uF 0.1uF
0.1uF C181
16V 16V 50V C182 C180 C183
50V C154 C157
0.1uF 0.1uF 0.1uF 0.1uF
16V 16V 16V 0.1uF 0.1uF
16V
16V 16V

EAX58326901(4) PCB revision

Xceive strong channel attenuation solution_ IC102 pin2 p-i-n diode ap
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS LH7000 Venus Jack B/D 2008.10.6
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Tuner 1 4

LGE Internal Use Only

 +5V_GENERAL
+5V_GENERAL
R218
10K

SCART1_DET
D219 R219 R230
1K 10K
5.6V C207
OPT 0.1uF SCART2_DET
16V R232
C215 1K
D201 D221
0.1uF
30V D212 5.6V
16V
OPT SC1_CVBS_IN 23 30V OPT
23
R215 C206 OPT
0 220pF SC2_CVBS_IN
R209 23

Only for training and service purposes

23
75 50V R227 C214
OPT 0 220pF
22 R226
22 22 75 50V
22 OPT
GND 21
21 21
21
20 20
20 20
FE_VOUT DTV/MNT_V_OUT
19 19 R222
19 R e v ( 4 ) R207 19
C205 D215 75 C210
D206 R207 75 18 100uF
18 30V 68=>75 100uF 18 30V Rev(4)
18 D202 16V
16V OPT R222
5.6V OPT 17 68=>75
17 17
17 OPT
16 SC1_FB 16
R214 16
16 22
15 SC1_R 15
15 15
D203 R206
14 30V R204 75 14
14 75 14
OPT

Copyright 2009 LG Electronics. Inc. All right reserved.

13 13
13 13
12 12
12 12
11 SC1_G 11
11 D204 R205 11
R201 0 . D222
30V 10
. 10 75 KDS184
OPT
. 9
. 9
A1
SC1_ID 0 0 2 : P 1 3 SC2_ID 8 R221 C
SC_ID 8 R216 R228 REC_8
R217 75 0
SC1_B 62K . 7 D218 A2
B 7 11K 30V SC2_ID
D209 R202
6 L_IN 6 OPT R229
LIN D220 30V 75 62K R231
30V OPT 11K
5 GND 5 Rev(3)
GND
OPT R229 Rev(3)
4 L202
4 GND 56K=>62K R231
GND R233 120-ohm R237 18K=>11K
10K 10K
3 L_OUT 3 SC2_L_IN
L_OUT SC1_L_IN
L201 C203
2 R_IN 2
R_IN R203 120-ohm 330pF R234 D216 C208 C211 R238
D208 C201 12K R224 12K
470K 50V 5.6V OPT 330pF
1 5.6V OPT R_OUT 1 470K
R_OUT OPT 50V
OPT

JK201 L203
JK200 R235 120-ohm R239
10K 10K
SC1_R_IN 002:P11 SC2_R_IN
L200 C202
D207 120-ohm R240
R200 330pF R236 C209 C212 12K
5.6V 12K D217 330pF
OPT 470K C200 50V OPT
OPT 5.6V R225 50V
470K
OPT

TV_L_OUT 002:P7

DTV/MNT_L_OUT
D205 R241
5.6V 470K
D214 R243
OPT
5.6V 470K
OPT

TV_R_OUT 002:P7

D200 R242 DTV/MNT_R_OUT

5.6V 470K
OPT
D213 R244
5.6V 470K
OPT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS MStar
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Full/Half SCART 2 4

LGE Internal Use Only

 AV RS232C
+3.3V_ST
S_C_IN
D308 R306 R320
C305 +5V_GENERAL C314
30V 0 75 0.1uF
47pF 50V
AMOTECH 50V COMPONENT
R327
JK300 10K
R329 C317
PMJ029-01 1K 0.1uF C318
S_Y_IN COMP_DET 0.1uF
R310 001:AC19 50V
6 [S-VHS]GROUND_TER D309 0 R321 C307 D316 50V
75 47pF JK304 C319
30V +5V_GENERAL 5.6V 0.1uF
50V
AMOTECH RCA-517HA-00A-01 AMOTECH 50V
7A [S-VHS]C_LUG_L1
2A [GN]1P_CAN

C2-
C1-

V-
7B [S-VHS]C_LUG_L2

RIN2
C2+
C1+

10K
V+

DOUT2

R309
R314 4A [GN]CONTACT

8
7
6
5
4
3
2
1

1K
7C [S-VHS]C_LUG_L3 S_DET R328
D310 3A [GN]O_SPRING 0 IC300
7D [S-VHS]C_LUG_L4 5.6V COMP_Y 002:E5
AMOTECH D311 R330 MAX3232CDR
2B [BL]1P_CAN 30V 75
8 [S-VHS]0_SPRING AMOTECH
R304
0 5B [BL]C_LUG_L
10
11
12
13
14
15
16

9
AV_CVBS_IN COMP_Pb 002:E4
2A [YL]1P_CAN
C306 D312 R331
D307 R317 2C [RD]1P_CAN1 75
75 47pF 30V
GND
VCC

3A [YL]0_SPRING 30V 50V AMOTECH

Only for training and service purposes

DIN2
DIN1
RIN1

AMOTECH +5V_GENERAL +3.3V_ST

ROUT2
ROUT1
DOUT1

5C [RD]C_LUG_L
COMP_Pr 002:E4
4A [YL]CONTACT C320
D313 R332 0.1uF
R305 2D [WH]1P_CAN 75 50V
10K 30V
2B [WH]1P_CAN AMOTECH
R336 R339
AV_CVBS_DET 10K 0
R315 5D [WH]C_LUG_L
C302 1K COMP_L_IN 002:P10
5B [WH]C_LUG_L
D304 0.1uF C309
5.6V D314 R333 R347 R350
16V 2E [RD]1P_CAN2 1000pF D325
AMOTECH 5.6V 470K 4.7K 4.7K R353 R355

R338
12K
2C [RD]1P_CAN 50V ADUC30S03010L_AMODIODE
AMOTECH 100 0 30V
R354
100

4E [RD]CONTACT OPT
3C [RD]0_SPRING DBG_TX
AV_L_IN R335 R340
R322 3E [RD]O_SPRING 10K 0
COMP_R_IN 002:P10 DBG_RX
4C [RD]CONTACT D305 C304 10K R324 D326 OPT
R316 C310
5.6V 470K 100pF 12K D315 R334 ADUC30S03010L_AMODIODE
AMOTECH 50V 5.6V 1000pF C315 220pF 50V 30V
470K

R337
12K
50V
AMOTECH
C316 220pF 50V
AV_R_IN
R323
D306 10K R325
5.6V C303 12K JK306

Copyright 2009 LG Electronics. Inc. All right reserved.

R312 KCN-DS-1-0088
AMOTECH 470K 100pF
50V
6
7
8
9
10

1
2
3
4
5

PC AUDIO
JK301
PEJ024-01 PC
3 E_SPRING

6A T_TERMINAL1

7A B_TERMINAL1
PC_R_IN 002:P9
D302 R307 R318
4 R_SPRING AMOTECH C300 10K 0
100pF R302
5.6V 470K R311
OPT 50V
T_SPRING 12K
5 +5V_VGA
SPDIF OPTIC JACK
7B B_TERMINAL2
PC_L_IN 002:P9 DDC_SCL/UART_RX
D303 R308 R319
T_TERMINAL2 AMOTECH C301 R303 10K 0 +5V_GENERAL+5V_GENERAL DDC_SDA/UART_TX
6B 100pF
5.6V 470K OPT
OPT 50V
R313 D317 OPT C321
8 SHIELD_PLATE 12K D318 0.1uF
EPCOS
5.6V EPCOS R346 16V
R326
1K 5.6V 22 R348
22
JK303
R356
0 JST1223-001 0 R341 D323
SPDIF_OUT 002:E9 DSUB_VSYNC ADUC30S03010L_AMODIODE
30V
GND 0 R342
OPT

1
002:P13 002:E9 DSUB_HSYNC
OPT D322
ADUC30S03010L_AMODIODE +5V_GENERAL
C324
OPT VCC L300 30V
HEAD PHONE 8pF 2 OPT
50V ZD300 BLM18PG600SN1D
R351
+3.3V_TUNER C308 002:E7 DSUB_B 10K
0.1uF VINPUT
Fiber Optic

50V R345 D319

C311 AMOTECH R352 1K
4

75 OPT DSUB_DET
30V
SHIELD_PLATE 8
C322 FIX_POLE R349 D324 C323
D300 R301 0 0.1uF
AMOTECH 0.1uF AMOTECH
10K L301 OPT 5.6V 50V
5.6V 16V T_TERMINAL2 6B BLM18PG600SN1D OPT
HP_L_OUT 002:E7 DSUB_G
B_TERMINAL2 7B
001:AC17 R343 C312 D320
75 OPT AMOTECH
T_SPRING 5 30V
HP_DET
11
12
13
14
15

R300
001:AC17 1K 4
R_SPRING
16

6
7
8
9
10

L302
HP_R_OUT
BLM18PG600SN1D
1
2
3
4
5

B_TERMINAL1 7A
001:AC17 D301 002:E8 DSUB_R
AMOTECH
5.6V T_TERMINAL1 6A R344 C313 JK305
75 OPT D321 KCN-DS-1-0089
AMOTECH
E_SPRING 3 30V

PEJ024-01
JK302

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS MStar
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. IN/OUT 3 4
INTERFACE

LGE Internal Use Only

 AUDIO SWITCH
TUNER JACK PIN
97

+5V_GENERAL
+9V_GENERAL 97

POWER 96 96
P_+12V
95 95
94 94
93 93
DSUB_HSYNC
92 92
P_+12V IC405 R430 DSUB_VSYNC
10K 91 91
90 90
S_C_IN
GND SDA 89
1 28 FE_DEMOD_SDA 89
+9V_GENERAL 88 88
IC400 R431 S_Y_IN

L406
KA7809ERTM 100 87 87
CAPACITANCE SCL
2 27 86
C444 FE_DEMOD_SCL DSUB_B 86

CB3216PA501E
R432 85
I 1 3 O 22uF 100 85
16V VS ADDR 84
C414 3 26 DSUB_G 84
2 C408
C400 C402 100uF C443 83 83
0.1uF 0.01uF
G

Only for training and service purposes

100uF 0.1uF 50V 82
16V L1 R1 DSUB_R 82
16V 4 25 81
SC1_L_IN SC1_R_IN 81
C438 R414 C447
4.7uF R433 4.7uF 80 80
100 100 COMP_Pr
16V L2 R2 16V 79
5 24 79
SC2_L_IN C448 SC2_R_IN 78
C439 R415 R434 COMP_Pb 78
4.7uF 100 100 4.7uF
16V 77 77
16V L3 R3
COMP_L_IN 6 23 COMP_R_IN 76

L407
C440 COMP_Y 76
R416 C449
4.7uF 100 R435 4.7uF 75 75
16V 100
NC1 NC4 16V 74

CB3216PA501E
IC401 7 TEA6420D 22 AV_CVBS_IN 74
R406 73
MP2305DS 100K 73
72 72
NC2 ADDR 9A NC3 SC1_B
8 21 71
+5V_GENERAL 71
BS SS 70
1 8 SC2_CVBS_IN 70
L4 R4 69
C413 9 20 69
PC_L_IN PC_R_IN
IN EN 0.1uF L404 C441 C450 68 68
R417 R436 4.7uF SC1_CVBS_IN
2 7 50V 4.7uF 100 100 67
16V L5 R5 16V 67
C405
BLM18PG121SN1D OPT AV_L_IN 10 19 AV_R_IN 66
OPT 0.01uF C442 SC1_R 66
COMP C427 C431 C436 R418 R437 C451
C404 50V SW 3 6 4.7uF 100 65 65
C452 C401 0.1uF 4.7uF 100uF 100 4.7uF
22uF 22uF 0.47uF 16V LOUT1 ROUT4 64
C410 R408 16V 10V 16V 11 18 16V 64
50V 16V 25V AV_L_OUT SC1_G

Copyright 2009 LG Electronics. Inc. All right reserved.

5600pF 9.1K 63
GND FB +5V_TUNER R419 63
4 5 50V 100 62 62
ROUT1 LOUT4 DBG_RX
R409 12 17 61
12.4K AV_R_OUT 61
DBG_TX
R405 1% R420 60
56K 100 SC2_ID 60
1% LOUT2 ROUT3 59
L405 13 16 REC_8 59
58 58
SC1_FB
L401 57 57
BLM18PG121SN1D OPT ROUT2 LOUT3 SC1_ID
22uH C409 C428 C437 14 15 56
C424 22uF C412 C435 56
0.1uF 16V 100uF 0.1uF 4.7uF 100uF 55
16V AV_L_OUT 55
16V 16V 10V 16V
54 54
53 53
AV_R_OUT
52 52
R448 DTV/MNT_L_OUT 51 51
0
50 50
49 49
DTV/MNT_R_OUT
48 48
IC402 47 47
TV_L_OUT
46 46
AP1117E33G-13 TV_R_OUT
45 45
44 44
43 43
HP_DET
DDC_SCL/UART_RX 42 42
IN 3 1 ADJ/GND DDC_SDA/UART_TX 41 41
40 40
FE_RESET
39 39
C403 2 (TUNER RESET)FE_AGC_SPEED_CTL
0.1uF RF_ATTENUATION 38 38
16V 37
+3.3V_TUNER 37
OUT 36 36
HP_R_OUT
35 35
R451 34
0 HP_L_OUT 34
33 33
1/10W C422 +5V_GENERAL 32
C420 I/O EXPANSION DTV/MNT_V_OUT 32
5% 100uF
0.1uF 31 31
16V 16V
30 30
FE_TS_SYNC
29 29
FE_TS_SERIAL
IC404 FE_TS_DATA[0] 28
FE_TS_DATA[0-7] 28
IC406 FE_TS_DATA[1] 27
C445 C446 27
AP1117E18G-13 JLC1562BFEL FE_TS_DATA[2] 26
0.1uF 47uF 26
ADDR 71 50V 16V FE_TS_DATA[3] 25 25
FE_TS_DATA[4] 24 24
1 A0 VDD16 FE_TS_DATA[5] 23 23
IN ADJ/GND R447 FE_TS_DATA[6] 22
3 1 22
0 FE_TS_DATA[7]
2 A1 SDA 15
FE_DEMOD_SDA 21 21
+1.8V_TUNER R428 20
22 20
C407
2 3A2 SCL 14
FE_DEMOD_SCL FE_TS_DATA_CLK
19 19
0.1uF R429 +5V_GENERAL 18 18
16V 22
OUT 4 D0 VDAC 13 R449 17
AV_CVBS_DET 10K FE_TS_VAL_ERR 17
R421 16
GND SPDIF_OUT 16
100
5D1 D712 SC1_VIDEO_MUTE +5V_VGA 15 15
S_DET
R422 R446 FE_DEMOD_SCL R438 47 14 14
100 22
6D2 D611 R439 47 13
C423 C425 DSUB_DET FE_DEMOD_SDA 13
0.1uF 100uF R423 R425 OPT 12
100 (TUNER SIF) 12
16V 16V 100
COMP_DET 7D3 D510 SCART1_DET 11 11
TUNER_SIF_IF_N
R424 R426 10
100 10
100
8 Vss D4 9 SCART2_DET 9 9
TUNER_CVBS_IF_P
R427 (TUNER CVBS) 8 8
100 R440 47 7 7
FE_TUNER_SCL
R441 47 6 6
FE_TUNER_SDA
5 5
R452 47 4 4
OPT 3 3
2 2
+3.3V_ST
1 1
TUNER_SIF_IF_N

GF05C-96S
P400

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS MStar
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. IN/OUT 4 4

LGE Internal Use Only

 Feb., 2009
P/NO : MFL58858405 Printed in Korea