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AbstractA new transformerless buckboost converter [4][6]. Interleaved converters can achieve high step-up or step-
with simple structure is proposed in this study. Compared down conversion ratio with low-voltage stress, while their oper-
with the traditional buckboost converter, the proposed ating mode, converter structure, and control strategy are com-
buckboost converters voltage gain is squared times of the
formers and its output voltage polarity is positive. These plicated [7][10]. Quadratic converters can achieve the voltage
advantages enable it to work in a wider range of positive gain of cascade converters with fewer switches; however, the
output. The two power switches of the proposed buck efficiency of these converters are low [11], [12]. Additionally,
boost converter operate synchronously. In the continuous some switched networks are added into the basic converters to
conduction mode (CCM), two inductors are magnetized and obtain the high-voltage step-up or step-down gain, at the price
two capacitors are discharged during the switch-on period,
while two inductors are demagnetized and two capacitors of complicating construction and increasing cost [13][23].
are charged during the switch-off period. The operating Compared with the above-mentioned converter topologies
principles, the steady-state analyses, and the small-signal which can only step-up or step-down voltage, the voltage
model for the proposed buckboost converter operating bucking/boosting converters, which can regulate output voltage
in CCM are presented in detail. The power electronics under wider range of input voltage or load variations, are pop-
simulator (PSIM) and the circuit experiments are provided
to validate the effectiveness of the proposed buckboost ular with the applications such as portable electronic devices,
converter. car electronic devices, and so on. The traditional buckboost
converter with simple structure and high efficiency, as we all
Index TermsContinuous conduction mode (CCM), new
transformerless buckboost converter, positive output
known, has the drawbacks such as limited voltage gain, neg-
voltage. ative output voltage, and floating power switch, meanwhile
discontinuous input and output currents. The other three basic
I. I NTRODUCTION
nonisolated converters: 1) Cuk converter; 2) Sepic converter;
Vgs1,Vgs2
t
VS1 Vin
1 D
t
VS2 1
V0
D
t
VD1
Vin
1 D
Fig. 1. Proposed transformerless buckboost converter. t
VD0 1
V0
D
t
Especially, in order to obtain high-voltage step-up or step- iin
down gain, these converters must be operating under extremely t
high or low duty cycle, and this point is too hard to realize due iL1
to the practical constraints. Hence, exploring new topology of
t
buckboost converter to overcome the drawbacks of the con- iL2
ventional ones for satisfying the increasingly requirements in
t
industrial applications is very important and valuable. NT
(N+D)T
In this study, by inserting an additional switched network (N+1)T
into the traditional buckboost converter, a new transformerless Fig. 2. Typical time-domain waveforms for the proposed buckboost
buckboost converter is proposed. The main merit of the pro- converter operating in CCM.
posed buckboost converter is that its voltage gain is quadratic
of the traditional buckboost converter, so that it can operate
in a wide range of output voltage, i.e., the proposed buck
boost converter can achieve high or low voltage gain without
extreme duty cycle. Moreover, the output voltage of this new
transformerless buckboost converter is common-ground with
the input voltage, and its polarity is positive.
This paper is organized as follows. In Section II, the structure
of the new transformerless buckboost converter is presented
in detail. The basic operating principles in CCM and the corre-
sponding analyses are provided in Section III. The small-signal
model is derived in Section IV. Comparisons among the tra-
ditional converters and the proposed buckboost converter are
shown in Section V. The PSIM simulations are presented for
confirmation preliminary in Section VI. The circuit experimen-
tal results are showed in Section VII. Some concluding remarks
and comments are given in Section VIII. Finally, the effects
of parasitic elements on the proposed buckboost converter are
presented in Appendix.
State 1 (N T < t < (N + D)T ): During this time interval, The voltage stress of the two power switches (S1 and S2 ) and
the switches S1 and S2 are turned on, while D1 and D0 are two diodes (D1 and D0 ) can also be derived
reverse biased. From Fig. 3(a), it is seen that L1 is magnetized
1 1D
from the input voltage Vin while L2 is magnetized from the VS1 = Vin = V0 (8)
input voltage Vin and the charge pump capacitor C1 . Moreover, 1D D2
D 1
the output energy is supplied from the output capacitor C0 . VS2 = 2 Vin = D V0 (9)
Thus, the corresponding equations can be established as (1 D)
1 1D
VD1 = Vin = V0 (10)
VL1 = Vin (1) 1D D2
VL2 = Vin + VC1 . (2) D 1
VD0 = 2 Vin = D V0 . (11)
(1 D)
State 2 ((N + D)T < t < (N + 1)T ): During this time
interval, the switches S1 and S2 are turned off, while D1 and From (8) and (10), it can be seen that the voltage stress of
D0 are forward biased. From Fig. 3(b), it is seen that the energy the power switch S1 and the diode D1 are both equal to the
stored in the inductor L1 is released to the charge pump capac- voltage stress on the power switch in the traditional buckboost
itor C1 via the diode D1 . At the same time, the energy stored in converter with the same input voltage. Similarly, under the same
the inductor L2 is released to the charge pump capacitor C1 , the output voltage condition, from (9) and (11), it can be concluded
output capacitor C0 , and the resistive load R via the diodes D0 that the voltage stress of the power switch S2 and the diode D0
and D1 . The equations of the state 2 are described as follows: are the same as the voltage stress on the diode in the traditional
buckboost converter.
VL1 = VC1 (3)
VL2 = (VC1 + V0 ). (4)
C. Current Stress
If applying the voltage-second balance principle on the If the circuit loss is ignored, the input power and output
inductor L1 , then the voltage across the charge pump capacitor power can be described as Pin = P0 , namely,
C1 is readily obtained from (1) and (3) as
Vin Iin = V0 I0 . (12)
D
VC1 = Vin . (5)
1D Based on the voltage gain obtained in (6), the relationship
between the dc input current and the dc output current is
Here, D is the duty cycle, which represents the proportion of presented here
the power switches turn-on time to the whole switching cycle.
2
Similarly, by using the voltage-second balance principle on I0 1D
the inductor L2 , the voltage gain of the proposed buckboost = . (13)
Iin D
converter can be obtained from (2), (4), and (5) as
2 The Ohms law for the resistive load R is
V0 D
M= = . (6) V0 = RI0 .
Vin 1D (14)
From (6), it is apparent that the proposed buckboost con- By using the ampere-second balance principle on the output
verter can step-up the input voltage when the duty cycle is capacitor C0 , we can show that the dc current ID0 through the
bigger than 0.5, and step-down the input voltage when the duty diode D0 , equals I0 . Accordingly, the relationship among the
cycle is smaller than 0.5. dc currents IL1 , IL2 , Iin , and I0 can be depicted as follows:
The current stress of the two power switches (S1 and S2 ) and inductor current iL1 is continuous and only take the inductor
two diodes (D1 and D0 ) is L2 as an example. The dc current of the inductor L2 is
D4 Vin Vin + VC1
IS1 = D(IL1 + IL2 ) = (19) IL2 = DTS . (27)
(1 D) R
4 2L2
D3 Vin In addition, defining the normalized inductor time constant
IS2 = DIL2 = 3 (20)
(1 D) R on the inductor L2 as
D3 Vin L2 f S
ID1 = (1 D) (IL1 + IL2 ) = 3 (21) L2 = . (28)
(1 D) R R
D2 Vin From (5), (6), (14), (16), and (27), then, the boundary
ID0 = (1 D)IL2 = 2 . (22)
(1 D) R condition about the inductor L2 can be derived as
2
From (19) to (22), it is found that the current stress of the (1 D)
L2B = . (29)
power switch S2 and the diode D1 is both equal to the current 2D
stress on the power switch in the traditional buckboost con- It is clear from (28) and (29) that when L2 > L2B , the
verter with the same output current, and the current stress of proposed buckboost converter operates in CCM. Otherwise,
the diode D0 equals to I0 is the same as the current stress on it operates in DCM.
the diode in the traditional buckboost converter, whereas the
current stress on S1 in the proposed buckboost converter is
high. G. Efficiency Analyses
To simplify calculating, the voltage and current ripples across
D. Current Ripples of Inductors the inductors and the capacitors are ignored. rDS1 and rDS2 are
the MOSFETs (S1 and S2 ) ON-resistances. VF 1 and VF 0 are the
The ripples of the inductor current iL1 and iL2 can be given diodes (D1 and D0 ) threshold voltage. rL1 , rL2 , rC1 , and rC0
as are the equivalent series resistances of the inductors (L1 and
VL1 DVin L2 ) and the capacitors (C1 and C0 ), respectively.
iL1 = DTS = (23) The switches conduction losses can be calculated as follows:
L1 L1 f s
VL2 DVin
iL2 = DTS = (24) PSW(cond) = IS1(rms) 2 rDS1 + IS2(rms) 2 rDS2
L2 (1 D)L2 fs
D3 P0 rDS1 DP0 rDS2
where fs is the switching frequency. = 4 + 2 . (30)
(1 D) R (1 D) R
If the inductor current ripple, the input voltage Vin , the duty
cycle D, and the switching frequency fs are known, the induc- The switches commutation losses are
tance of L1 and L2 can be calculated from (23) and (24), 1 1
so that the appropriate inductors can be selected in practical PSW(off) = IS1 VS1 toff1 fs + IS2 VS2 toff2 fs
2 2
engineering.
1 D2 V0 (1 D)V0 1 DV0 V0
= 2 2
toff1 fs + toff2 fs .
2 (1 D) R D 2 (1 D)R D
E. Voltage Ripples of Capacitors (31)
The ripples of the voltage across the capacitors C1 and C0 , The diodes conduction losses can be derived as follows:
i.e., vC1 and vC0 are
Q DVo PD = VF 1 ID1 + VF 0 ID0
vC1 = = (25) D
C (1 D)RC1 fs = VF 1 I 0 + VF 0 I 0 . (32)
Q DV0 1D
vC0 = = . (26)
C RC0 fs The inductors losses are
If the capacitor voltage ripples, the output voltage V0 , the PL = IL1(rms) 2 rL1 + IL2(rms) 2 rL2
duty cycle D, the resistive load R, and the switching frequency 2
fs are known, the capacitance of C1 and C0 can be calculated (2D 1) P0 rL1 P0 rL2
= 4 + 2 . (33)
based on (25) and (26). (1 D) R (1 D) R
The capacitors losses are
F. Boundary Condition
PC = IC1(rms) 2 rC1 + IC0(rms) 2 rC0
For a converter operating in the boundary condition mode
DP0 rC1 DP0 rC0
(BCM), the current of inductor just reduces to zero at the end = 3 + . (34)
of each switching cycle. Note that, here, we assume that the (1 D) R (1 D)R
MIAO et al.: NEW TRANSFORMERLESS BUCKBOOST CONVERTER WITH POSITIVE OUTPUT VOLTAGE 2969
TABLE I
C OMPARISONS A MONG THE C ONVERTERS
Fig. 4. Comparisons about the voltage gain among the traditional buck
According to the average method [28], (36), (37), the average
boost converter, the KY buckboost converter, and the proposed buck model of the proposed buckboost converter operating in CCM
boost converter. (a) Step-up mode. (b) Step-down mode. can be obtained as follows:
diL1 vin vC1
dt = L1 d L1 (1 d)
Thus, the efficiency can be calculated as follows: diL2 = vin d + vC1 (2d 1) v0 (1 d)
dt L2 L2 L2
(38)
P0 dvdtC1 = iCL1 (1 d) + iCL2 (1 2d)
= . (35)
dv0 iL2
1
v0
1
P0 + PSW(cond) + PSW(off) + PD + PL + PC dt = C0 (1 d) C0 R
2970 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 63, NO. 5, MAY 2016
where iL1 , iL2 , vC1 , v0 , and vin are the average val- V. C OMPARISONS
ues of iL1 , iL2 , vC1 , v0 , and vin , respectively, and d is the duty Table I shows the comparisons about the number of compo-
cycle. nents, the voltage gain, the voltage stress, and the complexity
Then, the perturbations are added as follows: of small-signal models among the traditional buckboost con-
iL1 = IL1 + iL1
iL1 IL1 verter [3], the KY buckboost converter [25], and the proposed
buckboost converter. The curves of the voltage gain against the
i = IL2 + iL2
i IL2
L2 L2 duty cycle among these three converters are shown in Fig. 4.
vC1 = VC1 + vC1 vC1 VC1
with . (39) For the step-up mode as shown in Fig. 4(a), the voltage gain
v 0 = V 0 + v 0
v0 V0
of the proposed buckboost converter is the maximum one. For
v = Vin + vin
v Vin
in in the step-down mode as shown in Fig. 4(b), the proposed buck
d=D+d dD
boost converters step-down gain is the minimum one. In other
Substituting (39) into (38), separating the perturbations out, words, under the same input voltage, the proposed buckboost
omitting the higher order small signal terms, and using the converter can operate in a wide range of output voltage.
Laplace transform, the control to output transfer function can In general, comparing to the traditional buckboost converter
be derived as follows: and the KY buckboost converter, the proposed buckboost
b0 s 3 + b 1 s 2 + b 2 s + b 3 converter has the best performance.
Gvd (s) = (40)
a0 s4+ a1 s 3 + a2 s 2 + a3 s + a4
where VI. PSIM S IMULATIONS
a 0 = L1 L2 C 1 C 0 R
a2 = L2 C0 R(1D)2 +L1 C0 R(12D)2 +L1 C1 R(1D)2 be constructed for the PSIM simulations to confirm the afore-
a3 = L2 (1 D)2 + L1 (1 2D)2 mentioned analyses in Section III preliminary. Note that circuit
+L1 R(IL1 2IL2 )(1 D)(2D 1) the currents of the two inductors L1 and L2 , and the driving
+R(Vin + VC1 )(1 D)2 (2D 1). operating in step-up mode when the duty cycle is 0.6. Since the
MIAO et al.: NEW TRANSFORMERLESS BUCKBOOST CONVERTER WITH POSITIVE OUTPUT VOLTAGE 2971
VIII. C ONCLUSION
This paper has proposed a new transformerless buckboost
converter as a fourth-order circuit, which realizes the optimiza-
tion between the topology construction and the voltage gain
to overcome the drawbacks of the traditional buckboost con-
verter. The operating principles, steady-state analyses, small
signal modeling, and comparisons with other converters are
presented. From the theoretical analyses, the PSIM simula-
tions, and the circuit experiments, it is proved that the new
transformerless buckboost converter possesses the merits such
as high step-up/step-down voltage gain, positive output volt-
age, simple construction, and simple control strategy. Hence,
the proposed buckboost converter is suitable for the industrial
applications requiring high step-up or step-down voltage gain.
A PPENDIX
Fig. 13 shows the simplified circuit with parasitic parameters.
Here, rDS1 , rDS2 , rD1 , rD0 , rL1 , rL2 are the parasitic parame-
ters of the MOSFETs (S1 and S2 ), the diodes (D1 and D0 ), and
Fig. 12. Dynamic behaviors of the proposed buckboost converter in the inductors (L1 and L2 ), respectively. VD1 and VD0 are the
step-down mode due to the load change from 14.29 to 20 . (Top: v0 ,
middle: iL2 , bottom: vg .) (a) Time (2 ms/div), v0 (10 V/div), iL2 (1 A/div), diodes threshold voltage. Then, the equations of inductor volt-
vg (10 V/div). (b) Time (200 s/div), v0 (10 V/div), iL2 (1 A/div), vg age with parasitic parameters can be derived as in (A1) and
(10 V/div). (A2), which are shown at the bottom of the page.
Applying the voltage-second balance principle on the induc-
it is obvious that the efficiency in step-up mode is higher than tor L1 , the voltage across the charge pump capacitor C1 with
step-down mode and the experimental highest efficiency can be parasitic parameters can be derived in (A3), which is shown at
reached 92.05%. the bottom of the page.
VL1 = Vin IS1 rDS1 IL1 rL1
= (1D)4 Vin RD4 Vin rDS14D2 (2D1)Vin rL1
(1D) R
(A1)
V L2 = V in I S1 rDS1 IL2 rL2 IS2 rDS2 + VC1
(1D)4 Vin R+(1D)4 VC1 RD4 Vin rDS1 D2 (1D)Vin rL2 D3 (1D)Vin rDS2
= (1D)4 R
VL1 = IL1 rL1 VC1 ID1 rD1 VD1
= D2 (2D1)Vin rL1 (1D)4 VC1 RD 3
(1D)Vin rD1 (1D)4 VD1 R
(1D)4 R
(A2)
VL2 = IL2 rL2 VD0 ID0 rD0 V0 VC1 VD1 ID1 rD1
D2 (1D)Vin rL2 (1D)4 VD0 RD2 (1D)2 Vin rD0 (1D)4 V0 R(1D)4 VC1 R(1D)4 VD1 RD3 (1D)Vin rD1
= (1D)4 R
4 2 5
(1 D) DVin R D5 Vin rDS1 D2 (2D 1)Vin rL1 D3 (1 D) Vin rD1 (1 D) VD1 R
VC1 = 5 (A3)
(1 D) R
2974 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 63, NO. 5, MAY 2016
V0 =
D(1D)4 RVinD 5 Vin rDS1 D 2 (1D)Vin rL2 (1D)D 4 Vin rDS2 +(2D1)(1D)4 RVC1 (1D)5 R(VD0 +VD1 )D 2 (1D)3 Vin rD0D 3 (1D)2 Vin rD1
(1D)5 R
(A4)
V0
M = =
Vin
(1D)6 VD0 R D(1D)5 VD1 R
(1D)4 D 2 RD 6 rDS1 D 4 (1D)2 rDS2 D 4 (1D)2 rD1 D 2 (1D)4 rD0D 2 (2D1)2 rL1 D 2 (1D)2 rL2 Vin Vin
(A5)
(1D)6 R
Faqiang Wang (M11) received the B.S. Xikui Ma was born in Shaanxi, China, in
degree in automation from Xiangtan University, 1958. He received the B.Sc. and M.Sc. degrees
Xiangtan, China, in 2003, and the M.S. and in electrical engineering from Xian Jiaotong
Ph.D. degrees in electrical engineering from University, Xian, China, in 1982 and 1985,
Xian Jiaotong University, Xian, China, in 2006 respectively.
and 2009, respectively. In 1985, he joined, as a Lecturer, the
From 2009 to 2011, he was a Lecturer Faculty of Electrical Engineering, Xian Jiaotong
with the School of Electrical Engineering, Xian University, where he became a Professor in
Jiaotong University, where he has been an 1992. During the academic year 19941995, he
Associate Professor since 2011. His research was a Visiting Scientist at the Department of
interests include modeling, analysis, and control Electrical and Computer Engineering, University
of power electronics. of Toronto, Toronto, ON, Canada. He has authored/coauthored more
than 140 scientific and technical papers on his research subjects,
and is also the author of five books in the electromagnetic fields. His
research interests include electromagnetic field theory and its appli-
cations, analytical and numerical methods in solving electromagnetic
problems, chaotic dynamics and applications in power electronics, and
applications of digital control to power electronics.