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General Description
The HT93214 are dialer series designed for low cost ing. An on-chip oscillator is built-in to work with an exter-
telephone set applications with expandable features nal 3.58Mhz crystal or ceramic resonator for accurate
such as Lock function, keytone and LCD display inter- timing. The HT93214 provides 300ms (F1 key) and
face. With a 44 keyboard, it performs normal 600ms (F2 key) of flash time; Tone dialing and 10pps,
tone/pulse switchable dialing, and provides one-key 20pps selection with 1/2 M/B ratio for pulse dialing.
redialing function with a 32-digit memory for speed dial-
Selection Table
HT93214 series
Block Diagram
F S M C o n tro l C h e c k
C 1
K e y
C o lu m n W R M T o n e T o n e
K e y S R A M D T M F
C o u n te r E n c o d e r O u t
F u n c tio n
C 3 E n c o d e r
P u ls e P O
A D D R L C o n v e rte r
O u t
X M U T E
R 1
E n c o d e r
K e y R o w H K S
F la s h /M o d e H F H F I
R 4 C lo c k
D e b o u n c e C o n tro l H F O
X 1 C lo c k M O D E O
D iv id e r G e n e ra to r M /B T im e r
X 2 M O D E
K e y to n e
G e n e ra to r K T
Pin Assignment
H F O 1 1 8 H F I H K S 1 1 8 R 4
H K S 1 1 6 R 4 H K S 2 1 7 R 4 M O D E 2 1 7 R 3
M O D E 2 1 5 R 3 M O D E 3 1 6 R 3 X 1 3 1 6 R 2
X 1 3 1 4 R 2 X 1 4 1 5 R 2 X 2 4 1 5 R 1
X 2 4 1 3 R 1 X 2 5 1 4 R 1 V S S 5 1 4 C 3
V S S 5 1 2 C 3 V S S 6 1 3 C 3 V D D 6 1 3 C 2
V D D 6 1 1 C 2 V D D 7 1 2 C 2 D T M F 7 1 2 C 1
D T M F 7 1 0 C 1 D T M F 8 1 1 C 1 X M U T E 8 1 1 P O
X M U T E 8 9 P O X M U T E 9 1 0 P O M O D E O 9 1 0 K T
H T 9 3 2 1 4 A H T 9 3 2 1 4 B H T 9 3 2 1 4 A T
1 6 D IP -A 1 8 D IP -A 1 8 D IP -A
Keyboard Information
C 1 C 2 C 3 H K S
R 1 1 2 3 F 1
R 2 4 5 6 F 2
R 3 7 8 9 P
R 4 * /T 0 # R
Pin Description
Internal
Pin Name I/O Description
Connection
These pins along with the HKS form a 44 keyboard matrix which can perform key-
board input detection. When on-hook (HKS=high) all the pins are set high. While
off-hook the column group (C1~C3) is set low and the row group (R1~R4) remains
C1~C3 CMOS
I/O high for input detection.
R1~R4 I/O
Pressing a key connects a single row to a single column HKS and actuates the sys-
tem oscillator that results in a dialing signal output. If more than two keys are
pressed at the same time, no response occurs. The key-in debounce time is 20ms.
X1 I The system oscillator consists of an inverter, a bias resistor and the necessary load
capacitor on chip. Connecting a standard 3.579545MHz crystal or ceramic resona-
OSC tor to the X1 and X2 terminals can implement the oscillator function. The oscillator is
X2 O turned off in the standby mode, and is actuated whenever a keyboard entry is de-
tected.
NMOS open drain structure pulled to VSS during dialing signal transmission. Other-
NMOS
XMUTE O wise, it is an open circuit. This pin is used to mute the speech circuit when transmit-
Open Drain
ting the dial signal.
This pin is used to monitor the status of the hook-switch and its combination with
HFI can control the PO pin output to make or break the line.
HKS=VDD: On-hook state (PO=low). Except for HFI (hand-free control input), other
HKS I CMOS
functions are all disabled.
HKS=VSS: Off-hook state (PO=high). The chip is in the stand-by mode and ready
to receive the key input.
NMOS open drain output structure, which by receiving the HKS and HFO signals,
control the dialer so as to connect or disconnect the telephone line.
PO is pulled to VSS when HKS is high (on-hook) and HFO is low.
PO O NMOS PO is an open circuit which make the line connection when HKS is low (off-hook) or
HFO is high.
During the off-hook state, this pin also outputs the dialing pulse train in pulse mode
dialing. While in the tone mode, this pin is always an open circuit.
This is a tri-state input/output pin, used for dialing mode selection, either Tone
mode or Pulse mode, 10pps/20pps
MODE=VDD: Pulse, 10pps, M/B=1/2
MODE I/O CMOS
MODE=Floating: Pulse, 20pps, M/B=1/2
MODE=VSS: Tone.
The MODE selection is checked each time a key input is received.
This pin is active only when the chip transmits tone dialing signals. Otherwise, it al-
ways outputs a low. The pin outputs tone signals to drive the external transmitter
DTMF O CMOS
amplifier circuit. The load resistor (to VSS) should not be less than 5kW and any DC
load connected to VDD is not allowed.
NMOS open drain structure for keytone output. It outputs 34ms of 600Hz tone burst
KT O NMOS when any key is pressed in the pulse mode or when a function key is pressed in the
tone mode.
Pulled-high, this pin is a Schmitt trigger input structure. Active low. Applying a nega-
tive going pulse to HFI can toggle the HFO once and hence control the hand-free
HFI I CMOS
function. The pull-high resistance of HFI is about 200kW typ. An external RC net-
work is recommended for input debouncing.
The HFO pin is a CMOS output structure. Its output is toggle- controlled by a nega-
tive transition on HFI pin. When HFO is high, the hand-free function is enabled and
HFO O CMOS PO outputs a high to connect the line.
The hand-free function can be released by an on-off-hook operation or by another
HFI input. Refer to the functional description for the hand-free functional operation.
VDD Positive power supply, 2.0V~5.5V for normal operation
VSS Negative power supply, ground
NMOS open drain output pin pulled to VSS during tone output and is an open circuit
MODEO O NMOS
during pulse output.
C M O S IN /O U T N M O S O U T C M O S IN C M O S O U T C M O S IN
P u ll- H ig h
V D D V D D
C M O S IN O S C IL L A T O R
P u ll- L o w
X 1 X 2
2 0 P 1 0 M 1 0 P
E N
Note: These are stress ratings only. Stresses exceeding the range specified under Absolute Maximum Ratings may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those
listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil-
ity.
Test Conditions
Symbol Parameter Min. Typ. Max. Unit
VDD Conditions
VDD Operating Voltage 2 5.5 V
Pulse Off-hook 0.2 1 mA
IDD Operating Current 2.5V
Tone Keypad entry 0.6 2 mA
On-hook, no load
ISTB Standby Current 1V 1 mA
No entry
VR Memory Retention Voltage 1 5 V
IR Memory Retention Current 1V On-hook 0.1 0.2 mA
VIL Input Low Voltage VSS 0.2VDD V
VIH Input High Voltage 0.8VDD VDD V
VXMUTE=12V
IXMO XMUTE Leakage Voltage 1 mA
No entry
IOLXM XMUTE Sink Current 2.5V VXMUTE=0.5V 1 mA
IHKS HKS Pin Input Current 2.5V VHKS=2.5V 0.1 mA
RHFI HFI Pull- High Resistance 2.5V VHFI=0V 200 kW
IOH1 Keypad Pin Source Current 2.5V VOH=0V -4 -40 mA
IOL1 Keypad Pin Sink Current 2.5V VOL=2.5V 200 400 mA
IOH2 HFO Pin Source Current 2.5V VOH=2V -1 mA
IOL2 HFO Pin Sink Current 2.5V VOL=0.5V 1 mA
IOL3 MODEO Sink Current 2.5V VOL=0.5V 0.6 3.5 mA
Test Conditions
Symbol Parameter Min. Typ. Max. Unit
VDD Conditions
TFP Pause Time After Flash 2.5V 800 ms
TRP One-key Redialing Pause Time 2.5V 800 ms
FOSC System Frequency 3.58 MHz
TDB Key-in Debounce Time 2.5V 20 ms
TBRK Break Time For One-key Redialing 2.5V 2.2 s
10pps 800
THKDL Off-hook Delay Time 2.5V ms
20pps 500
Test Conditions
Symbol Parameter Min. Typ. Max. Unit
VDD Conditions
IPOH PO Output Source Current 2.5V VOH=2V -0.2 mA
IPOL PO Output Sink Current 2.5V VOL=0.5V 0.2 0.6 mA
MODE pin is
10
PR Pulse Rate connected to VDD pps
MODE pin is opened 20
M/B Make/Break Ratio 33:66 %
M/B=33:66 (10 pps) 33
TPDP Pre-digit-pause Time ms
M/B=33:66 (20 pps) 17
10 pps 800
TIDP Inter-digit-pause Time ms
20 pps 500
10 pps, M/B=1/2 33.3
TM Pulse Make Duration ms
20 pps, M/B=1/2 16.7
10 pps, M/B=1/2 66.6
TB Pulse Break Duration ms
20 pps, M/B=1/2 33.3
TP Pause Time 2.2 s
Test Conditions
Symbol Parameter Min. Typ. Max. Unit
VDD Conditions
VTDC DTMF Output DC Level No load 0.45VDD 0.7VDD V
ITOL DTMF Sink Current 2.5V VDTMF=0.5V 0.1 mA
Row group,
VTAC DTMF Output AC Level 0.12 0.155 0.18 Vrms
RL=5kW
RL DTMF Output Load 2.5V THD-23dB 5 kW
ACR Column Pre-emphasis 2.5V Row group=0dB 1 2 3 dB
THD Tone Signal Distortion 2.5V RL=5kW -30 -23 dB
TTMIN Minimum Tone Duration Auto-redial 94 ms
TITPM Minimum Inter-Tone Pause Auto-redial 96 ms
THD (Distortion) (dB) = 20 log ( V12 + V22 + ....+ Vn2 / Vi2 + Vh2 )
Vi, Vh: Row group and column group signals
V1, V2, ... Vn: Harmonic signals (BW=300Hz~3500Hz)
Functional Description
Keyboard matrix Flash
C1~C3, HKS and R1~R4 form a keyboard matrix. To- Two flash keys are provided, namely F1, F2 for both se-
gether with a standard 44 keyboard, the keyboard ries. All the flash key function as control key with differ-
matrix is used for dialing entries. The keyboard ar- ent break duration. Whenever a flash key is pressed the
rangement of the HT93214 series is shown in the Key- PO pin will be forced low for a TF duration and the trans-
board Information. mission of the new digit key inputs will be further de-
layed for a TFP after TF. See the following table for flash
Tone frequency duration selection.
Tone Output Frequency (Hz) Item F1 F2
% Error
Name Specified Actual
HT93214 300ms 600ms
R1 697 699 +0.29%
R2 770 766 -0.52%
Key definition
R3 852 847 -0.59% 0,1,2,3,4,5,6,7,8,9 keys
R4 941 948 +0.74% These are dialing number input keys for both the
C1 1209 1215 +0.50% pulse mode and the tone mode operation.
C3 1477 1472 -0.34% This key executes the PT function and waits a TPT
duration in the pulse mode. On the other hand, the */T
Note: % Error does not contain the crystal frequency key executes the * function in the tone mode. The */T
drift key will occupy one memory digit in either tone or
pulse mode.
Dialing specification selection
#
The specifications are selected by the MODE pin. This is a dialing signal key for the tone mode only, no
MODE Tone/Pulse Dial Rate M/B Ratio response in the pulse mode.
VDD Pulse 10pps 1/2 F1, F2
VSS Tone Pressing one of the flash keys will force the PO pin to
become low for the TF duration. To transmit the dial
Floating Pulse 20pps 1/2 signals of the key input that are entered after the F
key, a wait period TFP (sec) after PO pin returns from
The MODE pin status is checked whenever a digit key
low is provided.
is pressed, however the M/B and pulse rate are deter-
mined at the first key entry. P
Pause key. The execution of this key pauses the out-
Hand-free function operation put for the TP duration (2.2s).
When HFO is low, a falling edge triggers the HFI, en- R
abling the Hand-free function (HFO becomes high). Redial key. It executes redialing as well as one-key re-
Reset Hand-free function dial function.
When HFO is high, the Hand-free function is enabled
and can be reset by:
Off-hook
Applying a falling edge to HFI
Hand-free function table
Keyboard Operation
The following operations are described under an on-off- hook or on-hook condition with the hand-free active condition.
N o r m a l d ia lin g
- P u ls e m o d e - T o n e m o d e
( a ) w ith o u t * /T ( a ) w ith o u t * /T
K e y b o a r d in p u t: D 1 D 2 ... D n K e y b o a r d in p u t: D 1 D 2 ... D n
D ia lin g o u tp u t: D 1 D 2 ... D n D ia lin g o u tp u t: D 1 D 2 ... D n
R M : D 1 D 2 ... D n R M : D 1 D 2 ... D n
( b ) w ith * /T ( b ) w ith * /T
K e y b o a r d in p u t: D 1 D 2 ... D n * /T D n + 1 ... K e y b o a r d in p u t: D 1 D 2 ... D n * /T D n + 1 ...
D m D m
D ia lin g o u tp u t: D 1 D 2 ... D n T P T D n + 1 ... D m D ia lin g o u tp u t: D 1 D 2 ... D n * D n + 1 ... D m
P u ls e T o n e R M : D 1 D 2 ... D n * D n + 1 ... D m
R M : D 1 D 2 ... D n * /T D n + 1 ... D m
R e d ia l
- P u ls e m o d e - T o n e m o d e
( a ) w ith o u t * /T ( a ) w ith o u t * /T
R M c o n te n t: D 1 D 2 ... D n R M c o n te n t: D 1 D 2 ... D n
K e y b o a r d in p u t: R K e y b o a r d in p u t: R
D ia lin g o u tp u t: D 1 D 2 ... D n D ia lin g o u tp u t: D 1 D 2 ... D n
R M : U n c h a n g e d R M : U n c h a n g e d
( b ) w ith * /T ( b ) w ith * /T
R M c o n te n t: D 1 D 2 ... D n * /T D n + 1 ... D m R M c o n te n t: D 1 D 2 ... D n * /T D n + 1 ... D m
K e y b o a r d in p u t: R K e y b o a r d in p u t: R
D ia lin g o u tp u t: D 1 D 2 ... D n T P T D n + 1 ... D m D ia lin g o u tp u t: D 1 D 2 ... D n * D n + 1 ... D m
P u ls e T o n e R M : U n c h a n g e d
R M : U n c h a n g e d
O n e - k e y r e d ia l
- P u ls e m o d e - T o n e m o d e
( a ) w ith o u t * /T ( a ) w ith o u t * /T
K e y b o a r d in p u t: D 1 D 2 ... D n R K e y b o a r d in p u t: D 1 D 2 ... D n R
D ia lin g o u tp u t: D 1 D 2 ... D n T B R K T R P D ia lin g o u tp u t: D 1 D 2 ... D n T B R K T R P D 1 D 2
D 1 D 2 ... D n ... D n
R M : D 1 D 2 ... D n R M : D 1 D 2 ... D n
( b ) w ith * /T ( b ) w ith * /T
K e y b o a r d in p u t: D 1 D 2 ... D n * /T D n + 1 ... K e y b o a r d in p u t: D 1 D 2 ... D n * /T D n + 1 ...
D m R D m R
D ia lin g o u tp u t: D 1 D 2 . . . D n T P T D n + 1 ... D m D ia lin g o u tp u t: D 1 D 2 ... D n * D n + 1 ... D m
P u ls e T o n e T B R K T R P D 1 D 2 ... D n * D n + 1
T B R K T R P D 1 D 2 ... D n T P T ... D m
P u ls e
R M : D 1 D 2 ... D n * D n + 1 ... D m
D n + 1 ... D m
T o n e
R M : D 1 D 2 ... D n * /T D n + 1 ... D m
F la s h P a u s e
- F la s h a s a c o n tr o l k e y K e y b o a r d in p u t: D 1 D 2 ... D n P D n + 1 ... D m
K e y b o a r d in p u t: D 1 D 2 ... D n F D n + 1 ... D ia lin g o u tp u t: D 1 D 2 ... D n T P D n + 1 ... D m
D m R M : D 1 D 2 ... D n P D n + 1 ... D m
D ia lin g o u tp u t: D 1 D 2 ... D n T F T F P D n + 1 ...
D m
R M : D n + 1 ... D m N o te
N o te : T F : b r e a k a fla s h tim e R M : R e d ia l m e m o r y
D 1 D 2 ... D n : 0 ~ 9
D n + 1 ... D m : 0 ~ 9 , * , #
Timing Diagrams
Normal dialing
Pulse mode
H ig h Im p e d a n c e
H K S
K E Y IN D 1 D 2 R
T D B T D B T D B
X M U T E
T ID P -T M
T ID P -T M T ID P -T M
T P D P T P D P T ID P T M
P O
T B T M T M
D T M F
K T
T K T T K T T K T 6 0 0 H z c a r r ie r T ID P -T M
X 2
2 0 m s 2 0 m s
Tone mode
H ig h Im p e d a n c e
H K S
K E Y IN D 1 D 2 R
T D B T D B T D B
X M U T E
P O
T IT P M T IT P M T IT P M
D T M F
T T M IN T IT P M
K T
X 2
2 0 m s 2 0 m s
M O D E O
H ig h Im p e d a n c e
H K S
K E Y IN D 1 D 2 P D 3
T D B
T P + T P D P
X M U T E
T ID P - T M T ID P - T M
T P D P T ID P T M T M
P O
D T M F
T ID P -T M
K T
T K T T K T 6 0 0 H z c a r r ie r
X 2
2 0 m s
Tone mode
H ig h Im p e d a n c e
H K S
K E Y IN D 1 D 2 P D 3
T D B T P
X M U T E
P O
T T M IN T IT P M T IT P M
D T M F
T IT P M
K T
X 2
2 0 m s
M O D E O
H ig h Im p e d a n c e
H K S
K E Y IN F
T D B
X M U T E
P O
T F T F P
D T M F
K T
T K T 6 0 0 H z c a r r ie r
X 2
2 0 m s
H ig h Im p e d a n c e
H K S
K E Y IN D 1 D 2 * /T D 3
T D B T ID P T P T
X M U T E
T ID P + T P D P
T P D P
P O
T IT P M
D T M F
T T M IN
K T 1 .2 k H z c a r r ie r
T K T 6 0 0 H z c a r r ie r
X 2
2 0 m s
M O D E O
H ig h Im p e d a n c e
H K S
K E Y IN D 1 D 2 R
T D B T D B T D B T IT P M
T IT P M T IT P M
X M U T E
P O
T IT P M
T B R K T R P
D T M F
K T
T K T
X 2
2 0 m s
M O D E O
October 2, 2002
2 2 M W
T ip
A 9 2 1 0 0 k W
O ff-h o o k
1 0 0 k W
R in g 1 A b r id g e
H A N D -F R E E
O n -h o o k
2 .2 k W
S P E E C H N E T W O R K
N E T W O R K
3 .3 k W
1 .5 k W 1 m F
A 4 2 1 5 0 W
1 N 4 1 4 8 2 2 0 k W
H F O V D D
1 N 4 1 4 8
5 .1 V 2 7 0 k W
4 7 k W
0 .1 m F 1 0 0 m F V D D
1 m F
1 0 0 k W
13
P O V D D H K S D T M F X M U T E H F O M O D E O
1 2 3 F 1 R 1
4 5 6 F 2 R 2
H T 9 3 2 1 4 S e r ie s
7 8 9 P R 3
* /T 0 # R R 4
C 3 C 2 C 1 V S S M O D E X 1 X 2 H F I K T
V D D
V D D
M /B = 2 /3 3 .5 8 M H z
re s o n a to r
M /B = 1 /2
T o n e
3 9 p F 3 9 p F
Application Circuits
1 0 p F
* U n s p e c ifie d tr a n s is to r s a r e o f 8 0 5 0 ty p e
* A m F c a p a c ito r b e tw e e n X M U T E a n d V S S ( G N D ) is r e c o m m e n d e d
Rev. 1.10
HT93214 Series
Package Information
16-pin DIP (300mil) outline dimensions
1 6 9
B
1 8
D
a
E G I
F
Dimensions in mil
Symbol
Min. Nom. Max.
A 745 775
B 240 260
C 125 135
D 125 145
E 16 20
F 50 70
G 100
H 295 315
I 335 375
a 0 15
1 8 1 0
B
1 9
D
a
E G I
F
Dimensions in mil
Symbol
Min. Nom. Max.
A 895 915
B 240 260
C 125 135
D 125 145
E 16 20
F 50 70
G 100
H 295 315
I 335 375
a 0 15