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1 2 3 4 5 6 7 8

PCB STACK UP
LAYER 1 : TOP
LAYER 2 : GND
ZQZ SYSTEM DIAGRAM
LAYER 3 : IN1
DDR3- SODIMM2 DDR3- SODIMM1 DDR3 HDMI
PAGE 7 PAGE 6 HDMI PAGE 14
LAYER 4 : IN2 Channel A AMD Brazos CRT
LAYER 5 : VCC CRT PAGE 13
A
LAYER 6 : BOT FAN SCH. FT1 TDP~18W LVDS A
CPU (PROCHOT) LVDS PAGE 13
E.C. (CPUFAN#) 19mmX19mm 413pin BGA
eDP@ -----> eDP panel
32.768KHz eDP PAGE 13
lvds@ -----> lvds panel 25MHz PAGE 23
UMA only
CPU SideBand TemperatureSense I2C PAGE 3,4,5

HT3
1.8GHz

PCI-Expresss

B
P0 AMD B

LAN Hudson-M3
Atheros
AR8151 24.5mmX24.5mm, 656pin BGA

(10/100/1000) TDP~4.7W
PAGE 16
25MHz

RJ45
PAGE 16

P0 P9 P13

FFC
USB2.0 Port Blue Tooth Web-Camera
SATA - HDD SATA0 150MB
C on board x1 C
CHARGER (BQ24707A) 3 Gb/s
PAGE 18 PAGE 21 PAGE 21 PAGE 13 USB BOARD
PAGE 26
P4 P10 USB2.0 Ports x2
SATA - ODD SATA1 150MB
AMD CPU CORE (OZ8380) PAGE
CPU 3 Gb/s PAGE 8,9,10,11,12 Mini Card CardReader
PAGE 28 PAGE 18
PCLK_DEBUG WLAN & Debug AU6435
LPC Azalia & mSATA PAGE 15
1.-05V (TPS51211)
PAGE30 NB CLK_PCI_775
Winbond KBC Audio CODEC
NPCE885 Conexant PAGE 17 12MHz
DDR 1.5V(TPS51216) CPU SideBand TemperatureSense I2C CX20584-11Z
PAGE 31 PAGE 24 PAGE 19

SYSTEM 5V/3V (RT8223M)


PAGE 27
D D

Keyboard SPI ROM INT MIC AUDIO CONN Speaker CN


1.1V(TPS51211)
TouchPad (H.P./ MIC)
PAGE 29
PAGE 23 PAGE 10 PAGE 20 PAGE 20 PAGE 20
Quanta Computer Inc.
Discharge /Thermal protec PROJECT : ZQZ
PAGE 31 Size Document Number Rev
Block Diagram 1A

Date: Thursday, February 23, 2012 Sheet 1 of 32


1 2 3 4 5 6 7 8
5 4 3 2 1

INDEX
Power Sequence 02
PAGE# DESCRIPTION NOTE
AC IN
1 BLOCK DIAGRAM Hudson M1 SM BUS
3V/5VPCU
2 SYSTEM INFORMATION
SB820 SMBUS Pin NO. SMBUS Function Define
3 ONTARIO MEM & PCIE I/F(1/3) NBSWON#
D D
PCLK_SMB AD22
4 ONTATIO DISPLAY/CLK/MI(2/3) DDR / RFID
DNBSWON# PDAT_SMB AE22
5 ONTARIO POWER & DECOUP(3/3) (+3V)
S5_ON/S5
6 DDR3 SO-DIMM (STD) SB_SMBCLK1 F5
not used
SB_SMBDATA1 F4
7 DDR3 SO-DIMM (STD) RSMRST#
(+3V_S5)
8 08 -- FCH 1/5(GPIO/USB/AZ)
SB_SCLK2 D25
PCIE_WAKE# not used
9 09 -- FCH 2/5(ACPI/PCI/CLK) SB_SDATA2 F23
(+3V_S5)
10 10 -- FCH 3/5(SATA/VGA/GND/SPI) SUSC
SB_SCLK3 B26
11 11 -- FCH 4/5(POWER) not used
SUSB SB_SDATA3 E26
12 12 -- FCH 5/5(Strap/PWRGD) (+3V_S5)
SUSON
13 13-- CRT/LVDS&CCD SB_SCLK3 B26
not used
SB_SDATA3 E26
14 14 -- HDMI_CONN MAINON
(+3V_S5)
15 15 -- CardReader AU6435-GDL
VR_ON
C C
16 16 -- LAN AR8151
CPU_CORE
17 17 -- MINI PCIE
KBC(EC) SM BUS
18 18 -- SATA-HDD/ODD VRM_PWRGD
KBC SMBUS Pin NO. SMBUS Function Define
19 19--Codec(CX20584-21Z)
HWPG
20 20--AUDIO-JACK/MDC/MIC MBCLK 110
Battery
ECPWROK MBDATA 111
21 21 -- INT&EXT USB/BT
(+3VPCU)
22 22 -- LED/ EMI/ Screw Hole& Nut SB_PWRGD_IN
MBCLK_THRM 115
Thermal
23 23 -- KB/TP/FAN MBDATA_THRM 116
CPU RESET
(+3VPCU)
24 24 -- NPCE885/FLASH
CPU POWER OK
25 25 -- NPCE895L

26 26 -- Charger (BQ24707A)

27 27 -- SYSTEM 5V/3V (RT8223M)


B B
28 28 -- CPU_CORE_Brazos (OZ8380)

29 29 -- +1.1V_S5(TPS51211)

30 30 -- +1.05V(TPS51211)

31 31 -- DDR 1.5V(TPS51216)

32 32 -- +1.8V/Discharge /Thermal

33 33--CHANGE LIST

A A

Quanta Computer Inc.


PROJECT : ZQZ
Size Document Number Rev
System Information 1A

Date: Thursday, February 23, 2012 Sheet 2 of 32


5 4 3 2 1
1 2 3 4 5 6 7 8

{6,7} M_A_A[15:0]
M_A_A0
M_A_A1
R17 M_ADD0
ONTARIO (2.0)
U16E

M_DATA0 B14 M_A_DQ0


M_A_DQ1
M_A_DQ[0..63] {6,7} +1.5VSUS {4,5,6,7,10,11,23,30}
VDD_10 {5} 03
H19 M_ADD1
PART 1 OF 5
M_DATA1 A15
M_A_A2 J17 A17 M_A_DQ2
M_A_A3 H18
M_ADD2
M_ADD3
M_DATA2
M_DATA3 D18 M_A_DQ3 This page is different AMD Nile
M_A_A4 H17 M_ADD4 M_DATA4 A14 M_A_DQ4
M_A_A5 G17 M_ADD5 M_DATA5 C14 M_A_DQ5
M_A_A6 H15 M_ADD6 M_DATA6 C16 M_A_DQ6
A M_A_A7 M_A_DQ7 A
G18 M_ADD7 M_DATA7 D16
M_A_A8 F19 M_ADD8
U16A
M_A_A9 E19 M_ADD9 M_DATA8 C18 M_A_DQ8 AA6 P_GPP_RXP0 P_GPP_TXP0 AB6 PCIE_TXP0_LAN_C C361 0.1u/10V_4 PCIE_TXP0_LAN {16}
{16} PCIE_RXP0_LAN
M_A_A10 T19 M_ADD10 M_DATA9 A19 M_A_DQ9 Y6 P_GPP_RXN0 P_GPP_TXN0 AC6 PCIE_TXN0_LAN_C C362 0.1u/10V_4 PCIE_TXN0_LAN {16}
LAN
{16} PCIE_RXN0_LAN
M_A_A11 F17 M_ADD11 M_DATA10 B21 M_A_DQ10 ONTARIO (2.0)
M_A_A12 E18 M_ADD12 M_DATA11 D20 M_A_DQ11 AB4 P_GPP_RXP1
PART 2 OF 5
P_GPP_TXP1 AB3 PCIE_TXP1_C C354 0.1u/10V_4 PCIE_TXP1 {17}
{17} PCIE_RXP1 WLAN
M_A_A13 W17 M_ADD13 M_DATA12 A18 M_A_DQ12 AC4 P_GPP_RXN1 P_GPP_TXN1 AC3 PCIE_TXN1_C C355 0.1u/10V_4 PCIE_TXN1 {17}
{17} PCIE_RXN1
M_A_A14 E16 M_ADD14 M_DATA13 B18 M_A_DQ13
M_A_A15 G15 M_ADD15 M_DATA14 A21 M_A_DQ14 AA1 P_GPP_RXP2 P_GPP_TXP2 Y1
{6,7} M_A_BS[2..0]
M_DATA15 C20 M_A_DQ15 AA2 P_GPP_RXN2 P_GPP_TXN2 Y2

PCIE I/F
M_A_BS0 R18 M_BANK0
M_A_BS1 T18 M_BANK1 M_DATA16 C23 M_A_DQ16 VDD_10 Y4 P_GPP_RXP3 P_GPP_TXP3 V3
M_A_BS2 F16 M_BANK2 M_DATA17 D23 M_A_DQ17 Y3 P_GPP_RXN3 P_GPP_TXN3 V4
{6,7} M_A_DM[7..0]
M_DATA18 F23 M_A_DQ18
M_A_DM0 D15 M_DM0 M_DATA19 F22 M_A_DQ19 R335 2K/F_4 ON_ZVDD Y14 P_ZVDD_10 P_ZVSS AA14 ON_ZVSS R345 1.27K/F_4
M_A_DM1 B19 M_DM1 M_DATA20 C22 M_A_DQ20
M_A_DM2 D21 M_DM2 M_DATA21 D22 M_A_DQ21
M_A_DM3 H22 M_DM3 M_DATA22 F20 M_A_DQ22
M_A_DM4 P23 M_DM4 M_DATA23 F21 M_A_DQ23 {9} UMI_RXP0 AA12 P_UMI_RXP0 P_UMI_TXP0 AB12 UMI_TXP0_C C386 0.1u/10V_4 UMI_TXP0 {9}
M_A_DM5 V23 M_DM5 {9} UMI_RXN0 Y12 P_UMI_RXN0 P_UMI_TXN0 AC12 UMI_TXN0_C C387 0.1u/10V_4 UMI_TXN0 {9}
M_A_DM6 AB20 M_DM6 M_DATA24 H21 M_A_DQ24
M_A_DM7 AA16 M_DM7 M_DATA25 H23 M_A_DQ25 {9} UMI_RXP1 AA10 P_UMI_RXP1 P_UMI_TXP1 AC11 UMI_TXP1_C C380 0.1u/10V_4 UMI_TXP1 {9}
M_DATA26 K22 M_A_DQ26 {9} UMI_RXN1 Y10 P_UMI_RXN1 P_UMI_TXN1 AB11 UMI_TXN1_C C384 0.1u/10V_4 UMI_TXN1 {9}

UMI I/F
A16 M_DQS_H0 M_DATA27 K21 M_A_DQ27
B {6,7} M_A_DQSP0 B
B16 M_DQS_L0 M_DATA28 G23 M_A_DQ28 {9} UMI_RXP2 AB10 P_UMI_RXP2 P_UMI_TXP2 AA8 UMI_TXP2_C C373 0.1u/10V_4 UMI_TXP2 {9}
{6,7} M_A_DQSN0
B20 M_DQS_H1 M_DATA29 H20 M_A_DQ29 {9} UMI_RXN2 AC10 P_UMI_RXN2 P_UMI_TXN2 Y8 UMI_TXN2_C C376 0.1u/10V_4 UMI_TXN2 {9}
{6,7} M_A_DQSP1
A20 M_DQS_L1 M_DATA30 K20 M_A_DQ30
{6,7} M_A_DQSN1
E23 M_DQS_H2 M_DATA31 K23 M_A_DQ31 {9} UMI_RXP3 AC7 P_UMI_RXP3 P_UMI_TXP3 AB8 UMI_TXP3_C C366 0.1u/10V_4 UMI_TXP3 {9}
{6,7} M_A_DQSP2
{6,7} M_A_DQSN2 E22 M_DQS_L2 {9} UMI_RXN3 AB7 P_UMI_RXN3 P_UMI_TXN3 AC8 UMI_TXN3_C C371 0.1u/10V_4 UMI_TXN3 {9}
MEMORY I/F

J22 M_DQS_H3 M_DATA32 N23 M_A_DQ32


{6,7} M_A_DQSP3
J23 M_DQS_L3 M_DATA33 P21 M_A_DQ33 SP@FT1_ONTARIO
{6,7} M_A_DQSN3
R22 M_DQS_H4 M_DATA34 T20 M_A_DQ34
{6,7} M_A_DQSP4
P22 M_DQS_L4 M_DATA35 T23 M_A_DQ35
{6,7} M_A_DQSN4
W22 M_DQS_H5 M_DATA36 M20 M_A_DQ36
{6,7} M_A_DQSP5
V22 M_DQS_L5 M_DATA37 P20 M_A_DQ37
{6,7} M_A_DQSN5
AC20 M_DQS_H6 M_DATA38 R23 M_A_DQ38
{6,7} M_A_DQSP6
AC21 M_DQS_L6 M_DATA39 T22 M_A_DQ39
{6,7} M_A_DQSN6
{6,7} M_A_DQSP7 AB16 M_DQS_H7
AC16 M_DQS_L7 M_DATA40 V20 M_A_DQ40 +M_VREF +1.5VSUS
{6,7} M_A_DQSN7
M_DATA41 V21 M_A_DQ41
M17 M_CLK_H0 M_DATA42 Y23 M_A_DQ42
{6} M_A_CLKP0
M16 M_CLK_L0 M_DATA43 Y22 M_A_DQ43
{6} M_A_CLKN0
M19 M_CLK_H1 M_DATA44 T21 M_A_DQ44 R368 +1.5VSUS R372 *2.2K_4
{6} M_A_CLKP1
M18 M_CLK_L1 M_DATA45 U23 M_A_DQ45 1K/F_4
{6} M_A_CLKN1
N18 M_CLK_H2 M_DATA46 W23 M_A_DQ46
{7} M_A_CLKP2

2
N19 M_CLK_L2 M_DATA47 Y21 M_A_DQ47 +1.5VSUS R369 *1K/F_4 Q20
{7} M_A_CLKN2
L18 M_CLK_H3 *MMBT3904
{7} M_A_CLKP3
C {7} M_A_CLKN3 L17 M_CLK_L3 M_DATA48 Y20 M_A_DQ48 M_A_EVENT# 1 3 R370 *0_4
APU_MEMHOT# {8} C
M_DATA49 AB22 M_A_DQ49
{6,7} M_A_RST# L23 M_RESET_L M_DATA50 AC19 M_A_DQ50 R367 C404 C403
M_A_EVENT# N17 M_EVENT_L M_DATA51 AA18 M_A_DQ51 1K/F_4
{6,7} M_A_EVENT#
M_DATA52 AA23 M_A_DQ52 0.1u/10V_4 1000p/50V_4
M_DATA53 AA20 M_A_DQ53
M_A_CKE0 F15 M_CKE0 M_DATA54 AB19 M_A_DQ54
{6,7} M_A_CKE0
M_A_CKE1 E15 M_CKE1 M_DATA55 Y18 M_A_DQ55
{6,7} M_A_CKE1
M_DATA56 AC17 M_A_DQ56
M_DATA57 Y16 M_A_DQ57
{6} M_A_ODT0 W19 M0_ODT0 M_DATA58 AB14 M_A_DQ58 Brazos APU B0 CKE Race condition issue
{6} M_A_ODT1 V15 M0_ODT1 M_DATA59 AC14 M_A_DQ59 workaround : a resistor of 68 ohms between M_CKE [ 1:0 ] and ground eliminates the floating signal .
{7} M_A_ODT2 U19 M1_ODT0 M_DATA60 AC18 M_A_DQ60
{7} M_A_ODT3 W15 M1_ODT1 M_DATA61 AB18 M_A_DQ61 M_A_CKE0
M_DATA62 AB15 M_A_DQ62
{6} M_A_CS#0 T17 M0_CS_L0 M_DATA63 AC15 M_A_DQ63 M_A_CKE1
{6} M_A_CS#1 W16 M0_CS_L1

{7} M_A_CS#2 U17 M1_CS_L0


V16 M1_CS_L1 M_VREF M23 +M_VREF R113 R125
{7} M_A_CS#3
*68_4 *68_4
{6,7} M_A_RAS# U18 M_RAS_L

{6,7} M_A_CAS# V19 M_CAS_L


V17 M_WE_L M_ZVDDIO_MEM_S M22 39.2/F_4 R366 +1.5VSUS
D
{6,7} M_A_WE# D
SP@FT1_ONTARIO ?
P/N Item Description
AJ01200TT00 CPU(413P)EM1200GBB22GV 1.4G(BGA)
AJ01200TT01 CPU(413P)EM1200GBB22GV 1.4G(BGA)STN BSQ Quanta Computer Inc.
AJ01800VT00 CPU(413P)EM1800GBB22GV 1.7G(BGA)
AJ01800VT01 CPU(413P)EM1800GBB22GV 1.7G(BGA)STN BSQ PROJECT : ZQZ
Size Document Number Rev
ONTARIO MEM & PCIE I/F(1/3) 1A

Date: Thursday, February 23, 2012 Sheet 3 of 32


1 2 3 4 5 6 7 8
1

+1.8V

R208 1K/F_4 APU_SVC


+1.8V
+3V
{5,23,31}
{5,6,7,8,9,10,11,12,13,14,15,17,18,19,20,22,23,24,26,27,28,29,30,31} 04
R207 1K/F_4 APU_SVD

R199 300_4 LDT_RST#


U16B

R298 300_4 APU_PWRGD ANALOG/DISPLAY/MISC


0.1u/10V_4 C367 PEG_HDMI_TXDP2 A8 TDP1_TXP0 DP_ZVSS H3 R221 150/F_4
+3V {14} TX2_HDMI+
0.1u/10V_4 C372 PEG_HDMI_TXDN2 B8 TDP1_TXN0
{14} TX2_HDMI-
DP_BLON G2 R237 *Short_4 INT_LVDS_BLON {13}

DP MISC
0.1u/10V_4 C375 PEG_HDMI_TXDP1 B9 TDP1_TXP1 DP_DIGON H2 R204 *Short_4 INT_LVDS_DIGON {13}
{14} TX1_HDMI+
R303 1K/F_4 APU_THERMTRIP# 0.1u/10V_4 C378 PEG_HDMI_TXDN1 A9 TDP1_TXN1 DP_VARY_BL H1 R222 *Short_4
INT_LVDS_PWM {13}

DISPLAYPORT 1
{14} TX1_HDMI-
R214 1K/F_4 APU_ALERT# R205 100K_4
0.1u/10V_4 C379 PEG_HDMI_TXDP0 D10 TDP1_TXP2
{14} TX0_HDMI+
0.1u/10V_4 C381 PEG_HDMI_TXDN0 C10 TDP1_TXN2 TDP1_AUXP B2
{14} TX0_HDMI- HDMI_DDCCLK {14}
TDP1_AUXN C2 HDMI_DDCDATA {14}
0.1u/10V_4 C382 PEG_HDMI_TXCP A10 TDP1_TXP3
{14} TXC_HDMI+
0.1u/10V_4 C385 PEG_HDMI_TXCN B10 TDP1_TXN3 TDP1_HPD C1 INT_HDMI_HPD {14}
{14} TXC_HDMI-
R302 1K/F_4 H_PROCHOT#
{13} INT_TXLOUTP2 B5 LTDP0_TXP0 LTDP0_AUXP A3 INT_EDIDCLK {13}
{13} INT_TXLOUTN2 A5 LTDP0_TXN0 LTDP0_AUXN B3 INT_EDIDDATA {13}

{13} INT_TXLOUTP1 D6 LTDP0_TXP1 LTDP0_HPD D3 INT_eDPI_HPD INT_eDPI_HPD {13}


{13} INT_TXLOUTN1 C6 LTDP0_TXN1

DISPLAYPORT 0
DAC_RED C12 INT_CRT_RED {13}
{13} INT_TXLOUTP0 A6 LTDP0_TXP2 DAC_REDB D13
{13} INT_TXLOUTN0 B6 LTDP0_TXN2 DAC_GREEN A12 INT_CRT_GRE {13}
DAC_GREENB B12
INT_CRT_RED R338 150/F_4 {13} INT_TXLCLKP D8 LTDP0_TXP3 DAC_BLUE A13 INT_CRT_BLU {13}
INT_CRT_GRE R339 150/F_4 C8 LTDP0_TXN3 DAC_BLUEB B13
{13} INT_TXLCLKN
INT_CRT_BLU R343 150/F_4
{9} CLK_APU_P V2 CLKIN_H DAC_HSYNC E1 INT_CRT_HSYNC {13}

VGA DAC
{9} CLK_APU_N V1 CLKIN_L DAC_VSYNC E2 INT_CRT_VSYNC {13}
+3V

CLK
{9} CLK_DP_P D2 DISP_CLKIN_H DAC_SCL F2 INT_DDCCLK {13}
lvds@4.7K/F_4 R314 INT_EDIDCLK D1 DISP_CLKIN_L DAC_SDA D4
{9} CLK_DP_N INT_DDCDATA {13}
lvds@4.7K/F_4 R304 INT_EDIDDATA
APU_SVC J1 SVC DAC_ZVSS D12 DAC_RSET R75 499/F_4
APU_SVD J2 SVD
TEST4 R1 APU_THERMDA
T30
APU_SIC APU_THERMDC

SER
P3 SIC TEST5 R2 T28
+3V APU_SID P4 SID TEST6 R6 APU_TEST6_DIRECRACKMON
T2
TEST14 T5 APU_BP0_TSTCLK_USCLK0
T4
R255 *Short_4 LDT_RST#_R T3 RESET_L TEST15 E4 T16
{9,23} LDT_RST#
R297 *Short_4 APU_PWRGD_R T4 PWROK TEST16 K4 APU_BP3_SCANSHIFTEND_USDATA1
T27
{9,23} APU_PWRGD APU_BP2_SCANSHIFTEN_USDATA0
TEST17 L1 T31
H_PROCHOT# U1 L2 TEST18 R217 1K/F_4

CTRL
PROCHOT_L TEST18
{9,24} H_PROCHOT#
R44 APU_THERMTRIP# U2 THERMTRIP_L TEST19 M2 TEST19 R220 1K/F_4
1K/F_4 APU_ALERT# T2 ALERT_L TEST25_H K1 R226 510/F_4
TEST25_L K2 R209 510/F_4
+1.8V
2

TEST
N2 APU_TDI
TDI TEST28_H L5 APU_TEST28_H_PLLCHARZ
T26
N1 APU_TDO
TDO TEST28_L M5 APU_TEST28_L_PLLCHARZ
T3
R37 *0_4 3 1 APU_SIC P1 APU_TCK
TCK TEST31 M21 APU_TEST31_MEM_TEST
{8} SB_SCLK3 T36
P2 APU_TMS
TMS TEST33_H J18 APU_TEST33_H_M_CLKTST_H C187 0.1u/10V_4 R81 51/F_4

JTAG
Q6 *2N7002K M4 APU_TRST#
TRST_L TEST33_L J19 APU_TEST33_H_M_CLKTST_L C176 0.1u/10V_4 R76
UNNAMED_7_CAP_I337_B
51/F_4
{24} APU_SIC_EC R43 *Short_4 M3 DBRDY
DBRDY TEST34_H U15 APU_TEST34_H_TSTCLKIN_H T20
R42 *Short_4 M1 DBREQ_L TEST34_L T15 APU_TEST34_L_TSTCLKIN_L
T22
TEST35 H4 APU_TEST35 R223 *1K/F_4
F4 VDDCR_NB_SENSE TEST36 N5 APU_TEST36 R210 1K_4
+3V +1.8V
G1 VDDCR_CPU_SENSE TEST37 R5 APU_TEST37_GIO_TSTDTM0_CLKINIT T1
APU_TDI F3 VDDIO_MEM_S_SENSE
APU_TDO
APU_TCK F1 VSS_SENSE
APU_TMS TEST38 K3 APU_FDO T29
R45 APU_TRST# B4 RSVD_1 DMAACTIVE_L T1 ON_DMAACTIVE# R300 *Short_4 ALLOW_LDTSTP {9}
1K/F_4 DBRDY W11 RSVD_2
ONTARIO (2.0)
DBREQ# V5 RSVD_3
2

PART 3 OF 5

SP@FT1_ONTARIO ? R206 R299


R35 *0_4 3 1 APU_SID 1K/F_4 1K/F_4
A
{8} SB_SDATA3 A
VSS_SENSE R295 *Short_4
CPU_VDD0_FB_L {27} +1.8V
Q7 *2N7002K VDDCR_CPU_SENSE R296 *Short_4
CPU_VDD0_FB_H {27} +1.8V
{24} APU_SID_EC R41 *Short_4 +1.8V R215 *10K/F_4 CNTR_VREF
R40 *Short_4 0831---follow AMD request for HDMI function
VDDIO_SUS_SENSE R259 *0_4 R202
+1.5VSUS {3,5,6,7,10,11,23,30}

2
+3V Q12 *1K/F_4
VSS_SENSE R294 *Short_4 *MMBT3904
CPU_VDDNB_FB_L {27}
VDDCR_NB_SENSE R293 *Short_4 LDT_RST# 1 3 CPU_LDT_RST_HTPA#
CPU_VDDNB_FB_H {27}
R262
10K/F_4 Can remove on MP------>LX
DIFFERENTIAL ROUTING
2

Q14
MMST3904-7-F
R291 *Short_4 3 1 APU_THERMTRIP#
{25,26,31} SYS_SHDN#
VID Override Circuit
+1.8V
+3V

R292
*10K/F_4
R48 R47 R258
*300_4 *300_4 *2.2K/F_4
2

Q15
*MMST3904-7-F APU_SVC R225 0_4
CPU_SVC {27}
{8} FCH_THERMTRIP# R309 *0_4 3 1
APU_SVD R224 0_4 CPU_SVD {27}
APU_PWRGD R256 *0_4 CPU_PWRGD_SVID_REG
CPU_PWRGD_SVID_REG {27}

R49 R46 R257


for normal operation *220/F_4 *220/F_4 *220/F_4
open all switches
+3V

0830---add circuit
R211
10K/F_4
+1.8V +1.8V

HDT+ Connector
2

Q11 +1.8V
MMST3904-7-F
{23,24} SML1ALERT# R230 *Short_4 3 1 APU_ALERT#

R212 HDT+ HEADER / PLACE ON TOP +1.8V +1.8V


1K/F_4 C350
+3V CN9 U15 0.1u/10V_4

5
1 2 APU_TCK R201 1K/F_4
CPU_VDDIO CPU_TCK
APU_TMS R213 1K/F_4 VCC
3 GND
4
CPU_TMS APU_TDI R216 1K/F_4
5 GND CPU_TDI
6
R301 7 GND CPU_TDO
8 APU_TDO LDT_RST#_R 1 1A 1Y 6 LDT_RST#_BUF R265 1K/F_4
*10K/F_4 APU_TRST# R231 *Short_4 HDT_TRST# 9 10 APU_PWRGD_BUF
CPU_TRST_L CPU_PWROK_BUF
R254 10K_4 11 CPU_DBRDY3 CPU_RST_L_BUF 12
LDT_RST#_BUF
R285 10K_4 13 14 DBRDY APU_PWRGD 3 2A 2Y 4 APU_PWRGD_BUF R264 1K/F_4
2

CPU_DBRDY2 CPU_DBRDY0
Q13 R310 10K_4 15 16 DBREQ# R315 1K/F_4
CPU_DBRDY1 CPU_DBREQ_L
*MMST3904-7-F 17 18 R219 *Short_4
SML1ALERT# R234 *0_4 3 1 H_PROCHOT# 19
GND
CPU_VDDIO
CPU_PLLTEST0
CPU_PLLTEST1
20
J108_PLLTST0
J108_PLLTST1 R218 *Short_4
TEST19
TEST18 GND *SN74LVC2G07DCKR Quanta Computer Inc.

2
*HDP+
PROJECT : ZQZ
Size Document Number Rev
ONTATIO DISPLAY/CLK/MI(2/3) 1A

Date: Thursday, February 23, 2012 Sheet 4 of 32


1
1

+VCORE +1.5VSUS {3,4,6,7,10,11,23,30}

U16C
+1.05V
+1.8V
+3V
{23,29}
{4,23,31}
{4,6,7,8,9,10,11,12,13,14,15,17,18,19,20,22,23,24,26,27,28,29,30,31}
+VCORE {23,27}
+NBCORE {27}
05
11A 440mil viax22 2A 80mil viax4 VDD_10 {3}
E5 U8 VDD_18 R200 *short_8
E6
VDDCR_CPU_1
VDDCR_CPU_2
VDD_18_1
VDD_18_2 W8
+1.8V +VCORE This page is different AMD Nile
F5 VDDCR_CPU_3 VDD_18_3 U6 1u/6.3V_4 10u/6.3V_8 0.1u/10V_4
F7 VDDCR_CPU_4 VDD_18_4 U9 1u/6.3V_4
G6 VDDCR_CPU_5 VDD_18_5 W6 C70 C71 C97 C341 C80 C79
G8 VDDCR_CPU_6 VDD_18_6 T7 C65
H5 VDDCR_CPU_7 VDD_18_7 V7 1u/6.3V_4 0.1u/10V_4 1u/6.3V_4 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8
H7 VDDCR_CPU_8
J6 VDDCR_CPU_9 C337 C93 C340 C339 C338 C75 C120
J8 VDDCR_CPU_10 10u/6.3V_8
L7 VDDCR_CPU_11 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8
M6 VDDCR_CPU_12
+VCORE
M8 VDDCR_CPU_13 150mA 10mil viax1
N7 VDDCR_CPU_14 VDDAN_18_DAC L10
+NBCORE +1.8V
R8 VDDCR_CPU_15
BLM18PG221SN1D(220_1.4A)_6
10A 400mil viax20 C19 +VCORE
E8 W9 C58 C59 C107 1u/6.3V_4
E11
VDDCR_NB_1
VDDCR_NB_2
VDD_18_DAC
C18 10u/6.3V_8 10u/6.3V_8 1u/6.3V_4 1u/6.3V_4
E13 VDDCR_NB_3 C87 C74 C91 C63
F9 VDDCR_NB_4 1u/6.3V_4 1u/6.3V_4
ONTARIO (2.0)
F12 VDDCR_NB_5 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
PART 4 OF 5
G11 VDDCR_NB_6 C89
G13 VDDCR_NB_7 C67 C92 C98 C64 C66 C88 C83 C68
H9 VDDCR_NB_8
+1.05V 0.1u/10V_4
H12 VDDCR_NB_9 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
T15
K11 VDDCR_NB_10 200mA 10mil viax1
K13 VDDCR_NB_11
L10 U11 VDDPL_10 R325 *short_6
POWER
VDDCR_NB_12 VDDPL_10
L12 VDDCR_NB_13
+NBCORE +NBCORE
L14 VDDCR_NB_14 0.1u/10V_4
M11 VDDCR_NB_15
M12 VDDCR_NB_16 C364 C111 C110
M13 VDDCR_NB_17
N10 VDDCR_NB_18 10u/6.3V_8 1u/6.3V_4 +1.05V 10u/6.3V_8 10u/6.3V_8 1u/6.3V_4 1u/6.3V_4
N12 VDDCR_NB_19
VDD_10
N14 VDDCR_NB_20 C76 C144 C62 C147 C129 C112 C118 C130 C90 C116
P11 VDDCR_NB_21 5.5A 220mil viax11 10u/6.3V_8 1u/6.3V_4
P13 VDDCR_NB_22 VDD_10_1 U13 R347 *short_8 10u/6.3V_8 10u/6.3V_8 1u/6.3V_4 1u/6.3V_4
+1.5VSUS VDD_10_2 W13 R340 *short_8
2A 80mil viax4 VDD_10_3 V12 10u/6.3V_8 0.1u/10V_4 0.1u/10V_4
G16 VDDIO_MEM_S_1 VDD_10_4 T12
G19 VDDIO_MEM_S_2 C393 C159 C134 C133 C135 C132
E17 VDDIO_MEM_S_3
J16 VDDIO_MEM_S_4 10u/6.3V_8 1u/6.3V_4 1u/6.3V_4 +NBCORE
L16 VDDIO_MEM_S_5
L19 VDDIO_MEM_S_6
N16 VDDIO_MEM_S_7
R16 VDDIO_MEM_S_8
+3V
R19 VDDIO_MEM_S_9 500mA 20mil viax1 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
W18 VDDIO_MEM_S_10 C143
U16 VDDIO_MEM_S_11 VDD_33 A4 C114 C102 C119 C113 C139 C142 C141 C122
0.1u/10V_4
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
SP@FT1_ONTARIO ?

C356
1u/6.3V_4

+1.5VSUS
GND +1.5VSUS

1u/6.3V_4
A C190 C209 C210 A
C153 C160 C180 10u/6.3V_8 10u/6.3V_8
1u/6.3V_4 180P/50V_4 1u/6.3V_4

U16D
+1.5VSUS

A7 VSS_1 ONTARIO (2.0) VSS_50 N13


B7 VSS_2 PART 5 OF 5 VSS_51 N20
B11 VSS_3 VSS_52 N22
B17 VSS_4 VSS_53 P10 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
B22 VSS_5 VSS_54 P14 C208
C4 VSS_6 VSS_55 R4 C156 C152 C177 C157 C155 C165 C188 C181
D5 VSS_7 VSS_56 R7 180P/50V_4 0.1u/10V_4
D7 VSS_8 VSS_57 R20 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
D9 VSS_9 VSS_58 T6
D11 VSS_10 VSS_59 T9
D14 VSS_11 VSS_60 T11
B15 VSS_12 VSS_61 T13
D17 VSS_13 VSS_62 U4
D19 VSS_14 VSS_63 U5
E7 VSS_15 VSS_64 U7
E9 VSS_16 VSS_65 U12 place capacitors under BGA
E12 VSS_17 VSS_66 U20 EMC CAPS
E20 VSS_18 VSS_67 U22
F8 VSS_19 VSS_68 V8 +1.5VSUS +VCORE +NBCORE +1.5VSUS
F11 VSS_20 VSS_69 V9
F13 VSS_21 VSS_70 V11
G4 VSS_22 VSS_71 V13
G5 VSS_23 VSS_72 W1
G7 VSS_24 VSS_73 W2
G9 VSS_25 VSS_74 W4 180P/50V_4 180P/50V_4 0.1u/10V_4
GROUND

G12 VSS_26 VSS_75 W5 C154 C172 C69 C72 C115 C128 C151 C189
G20 VSS_27 VSS_76 W7 180P/50V_4 180P/50V_4 180P/50V_4 180P/50V_4 0.1u/10V_4
G22 VSS_28 VSS_77 W12
H6 VSS_29 VSS_78 W20
H11 VSS_30 VSS_79 Y5
H13 VSS_31 VSS_80 Y7
J4 VSS_32 VSS_81 Y9 VDD_18 VDDAN_18_DAC VDD_10 VDDPL_10 +3V
J5 VSS_33 VSS_82 Y11
J7 VSS_34 VSS_83 Y13
J20 VSS_35 VSS_84 Y15
K10 VSS_36 VSS_85 Y17
K14 VSS_37 VSS_86 Y19
L4 VSS_38 VSS_87 AA4
L6 VSS_39 VSS_88 AA22 C96 C82 C106 C131 C109 C351
L8 VSS_40 VSS_89 AB2 180P/50V_4 180P/50V_4 180P/50V_4 180P/50V_4 180P/50V_4 0.1u/10V_4
L11 VSS_41 VSS_90 AB5
L13 VSS_42 VSS_91 AB9
L20 VSS_43 VSS_92 AB13
L22 VSS_44 VSS_93 AB17
M7 VSS_45 VSS_94 AB21
N4 VSS_46 VSS_95 AC5
N6 VSS_47 VSS_96 AC9
N8 VSS_48 VSS_97 AC13
N11 VSS_49 VSSBG_DAC A11

SP@FT1_ONTARIO ?

GND
GND

Quanta Computer Inc.


PROJECT : ZQZ
Size Document Number Rev
ONTARIO POWER & DECOUP(3/3) 1A

Date: Thursday, February 23, 2012 Sheet 5 of 32


1
1 2 3 4 5 6 7 8

0830--P/N and footprint are follow ZR7B


+1.5VSUS

+0.75V_DDR_VTT {7,30}
+3V
{3,4,5,7,10,11,23,30}

{4,5,7,8,9,10,11,12,13,14,15,17,18,19,20,22,23,24,26,27,28,29,30,31}
06
CN15A M_A_DQ[0..63] {3,7}
{3,7} M_A_A[0..15]
M_A_A0 98 5 M_A_DQ0
M_A_A1 A0 DQ0 M_A_DQ1
97 7
M_A_A2 A1 DQ1 M_A_DQ7 +1.5VSUS
96 A2 DQ2 15
M_A_A3 95 17 M_A_DQ3
A M_A_A4 A3 DQ3 M_A_DQ4 CN15B A
92 A4 DQ4 4
M_A_A5 91 6 M_A_DQ5 75 44
M_A_A6 A5 DQ5 M_A_DQ6 VDD1 VSS16
90 A6 DQ6 16 76 VDD2 VSS17 48
M_A_A7 86 18 M_A_DQ2 81 49
M_A_A8 A7 DQ7 M_A_DQ8 VDD3 VSS18
89 21 82 54
M_A_A9 A8 DQ8 M_A_DQ9 VDD4 VSS19
85 A9 DQ9 23 87 VDD5 VSS20 55
M_A_A10 107 33 M_A_DQ14 88 60
M_A_A11 A10/AP DQ10 M_A_DQ11 VDD6 VSS21
84 A11 DQ11 35 93 VDD7 VSS22 61
M_A_A12 83 22 M_A_DQ13 94 65
M_A_A13 A12/BC# DQ12 M_A_DQ12 VDD8 VSS23
119 24 99 66
M_A_A14 A13 DQ13 M_A_DQ10 VDD9 VSS24
80 A14 DQ14 34 100 VDD10 VSS25 71
M_A_A15 78 36 M_A_DQ15 105 72
A15 DQ15 M_A_DQ20 VDD11 VSS26
{3,7} M_A_BS[0..2] DQ16 39 106 VDD12 VSS27 127

PC2100 DDR3 SDRAM SO-DIMM


M_A_BS0 M_A_DQ17

PC2100 DDR3 SDRAM SO-DIMM


109 BA0 DQ17 41 111 VDD13 VSS28 128
M_A_BS1 108 51 M_A_DQ22 112 133
M_A_BS2 BA1 DQ18 M_A_DQ23 VDD14 VSS29
79 BA2 DQ19 53 117 VDD15 VSS30 134
{3} M_A_CS#0 M_A_CS#0 114 40 M_A_DQ21 118 138
M_A_CS#1 S0# DQ20 M_A_DQ16 VDD16 VSS31
{3} M_A_CS#1 121 S1# DQ21 42 123 VDD17 VSS32 139
{3} M_A_CLKP0 M_A_CLKP0 101 50 M_A_DQ18 124 144
M_A_CLKN0 CK0 DQ22 M_A_DQ19 VDD18 VSS33
{3} M_A_CLKN0 103 52 145
M_A_CLKP1 CK0# DQ23 M_A_DQ24 VSS34
{3} M_A_CLKP1 102 57 +3V 199 150
M_A_CLKN1 CK1 DQ24 M_A_DQ29 VDDSPD VSS35
{3} M_A_CLKN1 104 59 151
M_A_CKE0 CK1# DQ25 M_A_DQ27 VSS36
{3,7} M_A_CKE0 73 67 77 155
M_A_CKE1 CKE0 DQ26 M_A_DQ26 NC1 VSS37
{3,7} M_A_CKE1 74 CKE1 DQ27 69 122 NC2 VSS38 156
{3,7} M_A_CAS# M_A_CAS# 115 56 M_A_DQ28 125 161
M_A_RAS# CAS# DQ28 M_A_DQ25 NCTEST VSS39
{3,7} M_A_RAS# 110 RAS# DQ29 58 VSS40 162
{3,7} M_A_WE# M_A_WE# 113 68 M_A_DQ31 {3,7} M_A_EVENT# R106 *Short_4 MEM_A_HOT# 198 167
R89 10K/F_4 DIMM0_SA0 WE# DQ30 M_A_DQ30 EVENT# VSS41
197 SA0 DQ31 70 {3,7} M_A_RST# 30 RESET# VSS42 168
R90 10K/F_4 DIMM0_SA1 201 129 M_A_DQ36 172
PCLK_SMB SA1 DQ32 M_A_DQ37 VSS43
{7,8,17,23} PCLK_SMB 202 131 173
B PDAT_SMB SCL DQ33 M_A_DQ39 VSS44 B
{7,8,17,23} PDAT_SMB 200 SDA DQ34 141 {7} +DDR_VREF2 1 VREF_DQ VSS45 178
143 M_A_DQ34 {7} +DDR_VREF +DDR_VREF 126 179
M_A_ODT0 DQ35 M_A_DQ32 VREF_CA VSS46
{3} M_A_ODT0 116 ODT0 DQ36 130 VSS47 184
{3} M_A_ODT1 M_A_ODT1 120 132 M_A_DQ33 185
ODT1 DQ37 M_A_DQ38 C242 0.1u/10V_4 VSS48
{3,7} M_A_DM[0..7] 140 2 189
M_A_DM0 DQ38 M_A_DQ35 VSS1 VSS49
11 DM0 DQ39 142 3 VSS2 VSS50 190
M_A_DM1 28 147 M_A_DQ40 C243 1000p/50V_4 8 195
M_A_DM2 DM1 DQ40 M_A_DQ45 VSS3 VSS51

(204P)
46 DM2 DQ41 149 9 VSS4 VSS52 196
M_A_DM3 63 157 M_A_DQ43 13
(204P)
M_A_DM4 DM3 DQ42 M_A_DQ42 VSS5
136 159 14
M_A_DM5 DM4 DQ43 M_A_DQ44 C212 0.1u/10V_4 +DDR_VREF2 VSS6
153 DM5 DQ44 146 19 VSS7
M_A_DM6 170 148 M_A_DQ41 20
M_A_DM7 DM6 DQ45 M_A_DQ46 C216 *1000p/50V_4 VSS8
187 DM7 DQ46 158 25 VSS9 600mA
{3,7} M_A_DQSP[7:0] 160 M_A_DQ47 26 203 +0.75V_DDR_VTT
M_A_DQSP0 DQ47 M_A_DQ48 VSS10 VTT1
12 163 31 204
M_A_DQSP1 DQS0 DQ48 M_A_DQ52 VSS11 VTT2
29 165 32
M_A_DQSP2 DQS1 DQ49 M_A_DQ54 VSS12 C232 C231 C226
47 175 37
M_A_DQSP3 DQS2 DQ50 M_A_DQ50 VSS13
64 177 38
M_A_DQSP4 DQS3 DQ51 M_A_DQ53 VSS14 4.7u/6.3V_6 0.1u/10V_4 4.7u/6.3V_6
137 164 43

GND

GND
M_A_DQSP5 DQS4 DQ52 M_A_DQ49 VSS15
154 166
M_A_DQSP6 DQS5 DQ53 M_A_DQ51
171 DQS6 DQ54 174
M_A_DQSP7 188 176 M_A_DQ55 DDR3-DIMM1_H=9.2_STD
{3,7} M_A_DQSN[7:0]

205

206
M_A_DQSN0 DQS7 DQ55 M_A_DQ60
10 DQS#0 DQ56 181
M_A_DQSN1 27 183 M_A_DQ61
M_A_DQSN2 DQS#1 DQ57 M_A_DQ63
45 191
M_A_DQSN3 DQS#2 DQ58 M_A_DQ62
62 DQS#3 DQ59 193
M_A_DQSN4 135 180 M_A_DQ56
M_A_DQSN5 DQS#4 DQ60 M_A_DQ57
SM_MEM BUS ADDRESS 152 DQS#5 DQ61 182
M_A_DQSN6 169 192 M_A_DQ58
M_A_DQSN7 DQS#6 DQ62 M_A_DQ59 +1.5VSUS
C
SO-DIMM0 1010 000 186
DQS#7 DQ63
194
C
SO-DIMM1 1010 001
DDR3-DIMM1_H=9.2_STD
BUS1_A2
R152
3mA +SMDDR_VREF
1K/F_4

+1.5VSUS {7,30} +SMDDR_VREF R150 *0_6 +DDR_VREF

+1.5VSUS R146
1K/F_4
C239 C222 C237 C252 C219

0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 C225 C218 C233 C249 C234 C220 C254
0.1u/10V_4 0.1u/10V_4
4.7u/6.3V_6 4.7u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4

+1.5VSUS
+1.5VSUS

C224 C223 C236 C238 C217


D C241 C221 C253 D
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 C235
0.1u/10V_4 180P/50V_4 0.1u/10V_4 0.1u/10V_4

Quanta Computer Inc.


PROJECT : ZQZ
Size Document Number Rev
DDR3 SO-DIMM (STD) 1A

Date: Thursday, February 23, 2012 Sheet 6 of 32


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

07
0830--P/N and footprint are follow ZR7B +1.5VSUS {3,4,5,6,10,11,23,30}
+0.75V_DDR_VTT {6,30}
+3V {4,5,6,8,9,10,11,12,13,14,15,17,18,19,20,22,23,24,26,27,28,29,30,31}
CN17A M_A_DQ[0..63] {3,6}
{3,6} M_A_A[0..15]
M_A_A0 98 5 M_A_DQ0
M_A_A1 A0 DQ0 M_A_DQ1
97 7
M_A_A2 A1 DQ1 M_A_DQ7
96 15
M_A_A3 A2 DQ2 M_A_DQ3
95 17
M_A_A4 A3 DQ3 M_A_DQ4
92 4
M_A_A5 A4 DQ4 M_A_DQ5
91 6
M_A_A6 A5 DQ5 M_A_DQ6 +1.5VSUS
90 16
M_A_A7 A6 DQ6 M_A_DQ2
86 18
M_A_A8 A7 DQ7 M_A_DQ8 CN17B
A 89 21 A
M_A_A9 A8 DQ8 M_A_DQ9
85 23 75 44
M_A_A10 A9 DQ9 M_A_DQ14 VDD1 VSS16
107 33 76 48
M_A_A11 A10/AP DQ10 M_A_DQ11 VDD2 VSS17
84 35 81 49
M_A_A12 A11 DQ11 M_A_DQ13 VDD3 VSS18
83 22 82 54
M_A_A13 A12/BC# DQ12 M_A_DQ12 VDD4 VSS19
119 24 87 55
M_A_A14 A13 DQ13 M_A_DQ10 VDD5 VSS20
80 34 88 60
M_A_A15 A14 DQ14 M_A_DQ15 VDD6 VSS21
78 36 93 61
A15 DQ15 M_A_DQ20 VDD7 VSS22
{3,6} M_A_BS[2..0] 39 94 65
M_A_BS0 DQ16 M_A_DQ17 VDD8 VSS23

PC2100 DDR3 SDRAM SO-DIMM


109 41 99 66
M_A_BS1 BA0 DQ17 M_A_DQ22 VDD9 VSS24
108 51 100 71
M_A_BS2 BA1 DQ18 M_A_DQ23 VDD10 VSS25
79 53 105 72
M_A_CS#2 BA2 DQ19 M_A_DQ21 VDD11 VSS26
{3} M_A_CS#2 114 40 106 127
M_A_CS#3 S0# DQ20 M_A_DQ16 VDD12 VSS27
121 42 111 128

PC2100 DDR3 SDRAM SO-DIMM


{3} M_A_CS#3 S1# DQ21 VDD13 VSS28
{3} M_A_CLKP2 M_A_CLKP2 101 50 M_A_DQ18 112 133
M_A_CLKN2 CK0 DQ22 M_A_DQ19 VDD14 VSS29
{3} M_A_CLKN2 103 52 117 134
M_A_CLKP3 CK0# DQ23 M_A_DQ24 VDD15 VSS30
{3} M_A_CLKP3 102 57 118 138
M_A_CLKN3 CK1 DQ24 M_A_DQ29 VDD16 VSS31
{3} M_A_CLKN3 104 59 123 139
M_A_CKE0 CK1# DQ25 M_A_DQ27 VDD17 VSS32
{3,6} M_A_CKE0 73 67 124 144
M_A_CKE1 CKE0 DQ26 M_A_DQ26 VDD18 VSS33
{3,6} M_A_CKE1 74 69 145
M_A_CAS# CKE1 DQ27 M_A_DQ28 VSS34
{3,6} M_A_CAS# 115 56 +3V 199 150
M_A_RAS# CAS# DQ28 M_A_DQ25 VDDSPD VSS35
{3,6} M_A_RAS# 110 58 151
M_A_WE# RAS# DQ29 M_A_DQ31 VSS36
{3,6} M_A_WE# 113 68 77 155
R148 10K/F_4 DIMM1_SA0 WE# DQ30 M_A_DQ30 NC1 VSS37
+3V 197 70 122 156
R149 10K/F_4 DIMM1_SA1 SA0 DQ31 M_A_DQ36 NC2 VSS38
201 129 125 161
PCLK_SMB SA1 DQ32 M_A_DQ37 NCTEST VSS39
{6,8,17,23} PCLK_SMB 202 131 162
PDAT_SMB SCL DQ33 M_A_DQ39 R147 *Short_4 MEM_B_HOT# VSS40
{6,8,17,23} PDAT_SMB 200 141 {3,6} M_A_EVENT# 198 167
SDA DQ34 M_A_DQ34 EVENT# VSS41
143 {3,6} M_A_RST# 30 168
M_A_ODT2 DQ35 M_A_DQ32 RESET# VSS42
{3} M_A_ODT2 116 130 172
M_A_ODT3 ODT0 DQ36 M_A_DQ33 VSS43
{3} M_A_ODT3 120 132 173
B ODT1 DQ37 M_A_DQ38 +DDR_VREF2 VSS44 B
{3,6} M_A_DM[0..7] 140 {6} +DDR_VREF2 1 178
M_A_DM0 DQ38 M_A_DQ35 +DDR_VREF VREF_DQ VSS45
11 142 {6} +DDR_VREF 126 179
M_A_DM1 DM0 DQ39 M_A_DQ40 VREF_CA VSS46
28 147 184
M_A_DM2 DM1 DQ40 M_A_DQ45 VSS47
46 149 185
M_A_DM3 DM2 DQ41 M_A_DQ43 C277 0.1u/10V_4 VSS48
63 157 2 189

(204P)
M_A_DM4 DM3 DQ42 M_A_DQ42 VSS1 VSS49
136 159 3 190
M_A_DM5 DM4 DQ43 M_A_DQ44 C276 1000p/50V_4 VSS2 VSS50
153 146 8 195
M_A_DM6 DM5 DQ44 M_A_DQ41 VSS3 VSS51

(204P)
170 148 9 196
M_A_DM7 DM6 DQ45 M_A_DQ46 VSS4 VSS52
187 158 13
DM7 DQ46 M_A_DQ47 VSS5
{3,6} M_A_DQSP[7:0] 160 14
M_A_DQSP0 DQ47 M_A_DQ48 C246 0.1u/10V_4 +DDR_VREF2 VSS6
12 163 19
M_A_DQSP1 DQS0 DQ48 M_A_DQ52 VSS7
29 165 20
M_A_DQSP2 DQS1 DQ49 M_A_DQ54 C259 *1000p/50V_4 VSS8
47 175 25
M_A_DQSP3 DQS2 DQ50 M_A_DQ50 VSS9
64 177 26 203 +0.75V_DDR_VTT
M_A_DQSP4 DQS3 DQ51 M_A_DQ53 VSS10 VTT1
137 164 31 204
M_A_DQSP5 DQS4 DQ52 M_A_DQ49 VSS11 VTT2
154 166 32
M_A_DQSP6 DQS5 DQ53 M_A_DQ51 VSS12 C264 C266 C245
171 174 37
M_A_DQSP7 DQS6 DQ54 M_A_DQ55 VSS13
{3,6} M_A_DQSN[7:0] 188 176 38
M_A_DQSN0 DQS7 DQ55 M_A_DQ60 VSS14 4.7u/6.3V_6 0.1u/10V_4 4.7u/6.3V_6
10 181 43

GND

GND
M_A_DQSN1 DQS#0 DQ56 M_A_DQ61 VSS15
27 183
M_A_DQSN2 DQS#1 DQ57 M_A_DQ63
45 191
M_A_DQSN3 DQS#2 DQ58 M_A_DQ62 DDR3-DIMM0_H=5.2_Standard
62 193

205

206
M_A_DQSN4 DQS#3 DQ59 M_A_DQ56
135 180
M_A_DQSN5 DQS#4 DQ60 M_A_DQ57
152 182
M_A_DQSN6 DQS#5 DQ61 M_A_DQ58
SM_MEM BUS ADDRESS 169
DQS#6 DQ62
192
M_A_DQSN7 186 194 M_A_DQ59
DQS#7 DQ63
SO-DIMM0 1010 000
DDR3-DIMM0_H=5.2_Standard
C
SO-DIMM1 1010 001 BUS1_A2 C
+1.5VSUS

R153
3mA +SMDDR_VREF
1K/F_4

{6,30} +SMDDR_VREF R142 *0_6 +DDR_VREF2


+1.5VSUS
+1.5VSUS
R133
1K/F_4
C268 C279 C247 C284 C255 C280 C267
C278 C271 C273 C274
4.7u/6.3V_6 4.7u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4

+1.5VSUS

+1.5VSUS

D C250 C275 C269 C251 C256 D


C281 C272 C270 C283 C240
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4

Quanta Computer Inc.


PROJECT : ZQZ
Size Document Number Rev
DDR3 SO-DIMM (STD) 1A

Date: Thursday, February 23, 2012 Sheet 7 of 32


1 2 3 4 5 6 7 8
5 4 3 2 1

08
+3V_S5
NC,no install by default
R61 *2.2K_4 FCH_TEST0
U17A
remove pull hi ( chip internal APU_MEMHOT# AB6 G8
{3} APU_MEMHOT# PCIE_RST2#/GEVENT4# USBCLK/14M_25M_48M_OSC
R65 *2.2K_4 FCH_TEST1 have pull hi ) GEVENT22# R2
T5 RI#/GEVENT22#
ODD_PLUGIN# W7 B9 USB_RCOMP_SB R326 11.8K/F_6
{18} ODD_PLUGIN# SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP
SUSB# T3
{23,24} SUSB# SLP_S3#
R66 *2.2K_4 FCH_TEST2 SUSC# W2 H1
{23,24} SUSC# T8

MISC
SLP_S5# USB_FSD1P/GPIO186

USB
D DNBSWON# R239 *short_4
PWR_BTN# J4 H3 D
{23,24} DNBSWON# PWR_BTN# USB_FSD1N T10
FCH_PW RGD N7 Note: USB P/N pairs with trace lengths up to 10"
{12} FCH_PW RGD PWR_GOOD HUDSON-M3 USB_FSD0P/GPIO185
H6 T32
FCH_TEST0 T9 Part 4 of 5 H5
+3V TEST0 USB_FSD0N T12
FCH_TEST1 T10

USB
FCH_TEST2 TEST1/TMS

1.1
V9 H10

ACPI / WAKE UP
R393 2.2K_4 PCLK_SMB TEST2 USB_HSD13P
AE22 G10

R386 2.2K_4 PDAT_SMB


For Dimm, WLAN, TP {24} SIO_A20GATE
{24} SIO_RCIN#
SIO_RCIN# AG19
R9
GA20IN/GEVENT0#
KBRST#/GEVENT1#
USB_HSD13N
K10
{24} SIO_EXT_SCI#

EVENTS
SIO_EXT_SMI# PME#/GEVENT3# USB_HSD12P
{24} SIO_EXT_SMI# C26 J12
R375 *10K_4 GPIO65 LPC_SMI#/GEVENT23# USB_HSD12N
T5
SYS_RST# U4
LPC_PD#/GEVENT5#
SYS_RESET#/GEVENT19# USB_HSD11P
G12 HUB3
PCIE_WAKE# K1 F12
{16} PCIE_WAKE# WAKE#/GEVENT8# USB_HSD11N
GEVENT20# V7
T18 IR_RX1/GEVENT20#
FCH_THERMTRIP# R10 K12 USBP10+ USBP10+ {21}
{4} FCH_THERMTRIP# THRMTRIP#/SMBALERT#/GEVENT2# USB_HSD10P
+3V R358 10K/F_4 W D_PW RGD AF19 K13 USBP10- USBP10- {21} USB2.0 co-lay USB3.0 port
+3V_S5 C99 33P/50V_4 WD_PWRGD USB_HSD10N
PCH_RSMRST#_R U2 B11
RSMRST# USB_HSD9P
D11
USB_HSD9N
AG24
R63 *2.2K_4 VGA_PD PCIE_REQ_LAN# CLK_REQ4#/SATA_IS0#/GPIO64
{16} PCIE_REQ_LAN# AE24 E10
R246 2.2K_4 SCLK1 BOARD_ID8 CLK_REQ3#/SATA_IS1#/GPIO63 USB_HSD8P
{10} BOARD_ID8 AE26 F10
R245 2.2K_4 SDATA1 BOARD_ID9 SMARTVOLT1/SATA_IS2#/GPIO50 USB_HSD8N
{10} BOARD_ID9 AF22
R38 *10K/F_4 SB_SCLK3 CLK_REQ0#/SATA_IS3#/GPIO60 USBP7+
AH17 C10 USBP7+ {17}
R36 *10K/F_4 SB_SDATA3 SATA_IS4#/FANOUT3/GPIO55 USB_HSD7P USBP7-
AG18
SATA_IS5#/FANIN3/GPIO59 USB_HSD7N
A10 USBP7- {17} WLAN HUB2
SPKR AF24
{19} SPKR SPKR/GPIO66
PCLK_SMB AD26 H9 USBP6+ USBP6+ {13}
+3V_S5 {6,7,17,23} PCLK_SMB SCL0/GPIO43 USB_HSD6P
PDAT_SMB AD25 G9 USBP6- USBP6- {13} CCD on LVDS
{6,7,17,23} PDAT_SMB

USB
SCLK1 SDA0/GPIO47 USB_HSD6N
T7

2.0
R67 10K_4 FCH_THERMTRIP# SDATA1 SCL1/GPIO227 USBP5+
R7 A8 USBP5+ {15}
R288 10K_4 OC_1# GPIO62 SDA1/GPIO228 USB_HSD5P USBP5-
T37 AG25
CLK_REQ2#/FANIN4/GPIO62 USB_HSD5N
C8 USBP5- {15} Card Reader
R55 10K_4 OC_0# PCIE_REQ_WLAN# AG22

GPIO
{17} PCIE_REQ_WLAN# CLK_REQ1#/FANOUT4/GPIO61
R273 10K_4 FCH_JTAG_TCK J2 F8
GPIO51 IR_LED#/LLB#/GPIO184 USB_HSD4P
T38 AG26 E8
VGA_PD for power control VGA_PD SMARTVOLT2/SHUTDOWN#/GPIO51 USB_HSD4N
V8
DDR3_RST#/GEVENT7#/VGA_PD USBP3+
W8 C6 USBP3+ {21}
SPI_HOLD# GBE_LED0/GPIO183 USB_HSD3P USBP3-
{10} SPI_HOLD# Y6
SPI_HOLD#/GBE_LED1/GEVENT9# USB_HSD3N
A6 USBP3- {21} USB2.0 daughter
C V10 C
GBE_LED2/GEVENT10# USBP2+
AA8 C5
Integrated 8.2-k PU GPIO65 AF25
GBE_STAT0/GEVENT11#
CLK_REQG#/GPIO65/OSCIN/IDLEEXIT#
USB_HSD2P
USB_HSD2N
A5 USBP2-
USBP2+
USBP2-
{21}
{21} BT HUB1
C1
FCH_BLINK USB_HSD1P
T17 M7 C3
GEVENT6# BLINK/USB_OC7#/GEVENT18# USB_HSD1N
T6 R8
GEVENT17# USB_OC6#/IR_TX1/GEVENT6# USBP0+
T7 T1 E1 USBP0+ {21}
ODD_EJ USB_OC5#/IR_TX0/GEVENT17# USB_HSD0P USBP0-
{18} ODD_EJ P6
USB_OC4#/IR_RX0/GEVENT16# USB_HSD0N
E3 USBP0- {21} USB2.0 debug port daughter
+3V_S5 R242 10K_4 PCIE_WAKE# FCH_JTAG_TDO F5
T33 USB_OC3#/AC_PRES/TDO/GEVENT15#
R267 *2.2K_4 PWR_BTN# FCH_JTAG_TCK P5 C16 USBSS_CALRP R329 U3@1K/F_4
USB_OC2#/TCK/GEVENT14# USBSS_CALRP

USB
R289 *short_4 FCH_JTAG_TDI J7 A16 USBSS_CALRN R334 U3@1K/F_4

OC
{21} OC_1# USB_OC1#/TDI/GEVENT13# USBSS_CALRN +FCH_VDD_11_SSUSB_S
{21} OC_0# R59 *short_4 FCH_JTAG_RST# T8
USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#
A14
GEVENT12# ~18# USB_SS_TX3P
C14
USB_SS_TX3N
are +3V_S5
HDaudio ACZ_BCLK_R AB3 C12
Note:LLB#, WAKE# and PWR_BTN need pull up to +3VPCU only if S5+ mode is supported ACZ_SDOUT_R AZ_BITCLK USB_SS_RX3P
interface AB1 A12
ACZ_SDIN0 AZ_SDOUT USB_SS_RX3N
are 5 6 AA2
ACZ_SDIN1 AZ_SDIN0/GPIO167
4 7 Y5 D15
+3V_S5 ACZ_SDIN2_R AZ_SDIN1/GPIO168 USB_SS_TX2P
3 8 Y3 B15
ACZ_SDIN3_R AZ_SDIN2/GPIO169 USB_SS_TX2N
2 9 Y1
R228 PCH_RSMRST#_R ACZ_SYNC_R AZ_SDIN3/GPIO170
{23,24} PCH_RSMRST# 1 10 AD6 E14
*short_4 ACZ_RST#_R AZ_SYNC USB_SS_RX2P
AE4 F14
R263 *10KX8 AZ_RST# USB_SS_RX2N

USB
R247 111207: F15

AUDIO

3.0
USB_SS_TX1P
10K_4 Vender suggestioin 10k {10} BOARD_ID10 K19 G15
PS2_DAT/SDA4/GPIO187 USB_SS_TX1N

HD
T21 J19
PS2_CLK/CEC/SCL4/GPIO188
J21 H13
SPI_CS2#/GBE_STAT2/GPIO166 USB_SS_RX1P
G13
+3V_S5 USB_SS_RX1N
D21 J16 USB3_TXP0 USB3_TXP0 {21}
PS2KB_DAT/GPIO189 USB_SS_TX0P USB3_TXN0
C20 H16 USB3_TXN0 {21}
PS2KB_CLK/GPIO190 USB_SS_TX0N
D23
R229 PS2M_DAT/GPIO191 USB3_RXP0
C22
PS2M_CLK/GPIO192 USB_SS_RX0P
J15 USB3_RXP0 {21} USB3.0
10K_4 K15 USB3_RXN0 USB3_RXN0 {21}
USB_SS_RX0N
B F21 B
SYS_RST# KSO_0/GPIO209 SMB_EC_CLK R350 *0_4 MBCLK
2 1 E20 H19 MBCLK {24,25}
KSO_1/GPIO210 SCL2/GPIO193 SMB_EC_DAT R346 *0_4 MBDATA
F20
KSO_2/GPIO211 SDA2/GPIO194
G19 MBDATA {24,25} GPIO193 ~196
G1 *SHORT_PAD A22 G22 are +3V_S5
KSO_3/GPIO212 SCL3_LV/GPIO195 SB_SCLK3 {4}
E18 G21 SB_SDATA3 {4}
KSO_5 KSO_4/GPIO213 SDA3_LV/GPIO196
A20 E22
+3V_S5 KSO_5/GPIO214 EC_PWM0/EC_TIMER0/GPIO197
J18 H22
KSO_6/GPIO215 EC_PWM1/EC_TIMER1/GPIO198 EC_PWM2
H18 J22 EC_PWM2 {12}
KSO_7/GPIO216 EC_PWM2/EC_TIMER2/WOL_EN/GPIO199
G18 H21
Provided test points from checklist KSO_8/GPIO217 EC_PWM3/EC_TIMER3/GPIO200
B21
R349 KSO_9/GPIO218
K18 K21
KSO_10/GPIO219 EMBEDDED KSI_0/GPIO201
*10K_4 D19 K22
KSO_11/GPIO220 CTRL KSI_1/GPIO202
G3 A18 F22
KSO_12/GPIO221 KSI_2/GPIO203
C18 F24
KSO_5 KSO_13/GPIO222 KSI_3/GPIO204
2 1 B19 E24
KSO_14/XDB0/GPIO223 KSI_4/GPIO205
B17 B23
KSO_15/XDB1/GPIO224 KSI_5/GPIO206
A24 C24
*SHORT_PAD KSO_16/XDB2/GPIO225 KSI_6/GPIO207
D17 F18
KSO_17/XDB3/GPIO226 KSI_7/GPIO208

EC FCH Device I2C_Device(S)


?
I2Ce_1(M) I2Cf_2(M) Charger Battery ALL/S5 EC will Conflict with FCH,
did not mount R315&R318
I2Ce_2(M) EEPROM APU ALL
To Azalia
I2Ce_3(M) VGA Thermal
ACZ_SDOUT_R R232 33_4 ACZ_SDOUT_AUDIO
ACZ_SDOUT_AUDIO {19}
I2Cf_3(M) APU S5
ACZ_SYNC_R R235 33_4 ACZ_SYNC_AUDIO
ACZ_SYNC_AUDIO {19}
ACZ_BCLK_R R279 33_4 ACZ_BITCLK_AUDIO I2Cf_1(M) Lan WLan S5
ACZ_BITCLK_AUDIO {19}

A A
C345 *22P/50V_4 I2Cf_0(M) Dimm Clk Gen S0

ACZ_RST#_R R236 33_4 ACZ_RESET#_AUDIO


ACZ_RESET#_AUDIO {19}
ACZ_SDIN0 ACZ_SDIN0 {19}

Quanta Computer Inc.


PROJECT :ZQZ
Size Document Number Rev
1A
FCH 1/5(GPIO/USB/AZ)
Date: Thursday, February 23, 2012 Sheet 8 of 32
5 4 3 2 1
5 4 3 2 1

09
C347 180P/50V_4 U17E

{16,17} PCIE_RST# PCIE_RST# R280 33_4 PCIE_RST#_R AE2


PCIE_RST#
HUDSON-M3 PCICLK0
AF3
{23} A_RST#_R A_RST#_R AD5 Part 1 of 5 AF1 PCI_CLK1_R R281 *Short_4 PCI_CLK1 PCI_CLK1 {12}
A_RST# PCICLK1/GPO36
D AF5 D
UMI_RXP0 C417 0.1U/10V_4 UMI_RXP0_C PCICLK2/GPO37 PCI_CLK3_R R282 *Short_4 PCI_CLK3
{3} UMI_RXP0 AE30 AG2 PCI_CLK3 {12}
UMI_RXN0 C416 0.1U/10V_4 UMI_RXN0_C UMI_TX0P PCICLK3/GPO38 PCI_CLK4_R R284 *Short_4 PCI_CLK4
{3} UMI_RXN0 AE32 AF6 PCI_CLK4 {12}
UMI_RXP1 C407 0.1U/10V_4 UMI_RXP1_C UMI_TX0N PCICLK4/14M_OSC/GPO39
{3} UMI_RXP1 AD33
UMI_TX1P

CLKS
{3} UMI_RXN1 UMI_RXN1 C408 0.1U/10V_4 UMI_RXN1_C AD31 AB5

PCI
UMI_TX1N PCIRST# T14
{3} UMI_RXP2 UMI_RXP2 C414 0.1U/10V_4 UMI_RXP2_C AD28
UMI_RXN2 C415 0.1U/10V_4 UMI_RXN2_C UMI_TX2P
{3} UMI_RXN2 AD29
UMI_RXP3 C405 0.1U/10V_4 UMI_RXP3_C UMI_TX2N
AC30 AJ3
{3}
{3}
UMI_RXP3
UMI_RXN3 UMI_RXN3 C406 0.1U/10V_4 UMI_RXN3_C AC32
UMI_TX3P
UMI_TX3N
AD0/GPIO0
AD1/GPIO1
AL5 B2A
AG4
UMI_TXP0 AD2/GPIO2 D4
{3} UMI_TXP0 AB33 AL6
UMI_TXN0 UMI_RX0P AD3/GPIO3 *NGC@RB500V-40
{3} UMI_TXN0 AB31 AH3
UMI_TXP1 UMI_RX0N AD4/GPIO4 R100 *SHORT_6
{3} UMI_TXP1 AB28 AJ5 1 2 +3VPCU
UMI_TXN1 UMI_RX1P AD5/GPIO5
{3} UMI_TXN1 AB29 AL1
UMI_TXP2 UMI_RX1N AD6/GPIO6 D5
Y33 AN5
{3}
{3}
UMI_TXP2
UMI_TXN2 UMI_TXN2 Y31
UMI_RX2P
UMI_RX2N
AD7/GPIO7
AD8/GPIO8
AN6 RTC Circuitry(RTC)
{3} UMI_TXP3 UMI_TXP3 Y28 AJ1
UMI_TXN3 UMI_RX3P AD9/GPIO9
{3} UMI_TXN3 Y29 AL8
UMI_RX3N AD10/GPIO10 +3V_RTC

PCI EXPRESS
AL3

INTERFACES
R378 590/F_4 PCIE_CALRP AD11/GPIO11 NGC@BAT54C
AF29 AM7
R373 2K/F_4 PCIE_CALRN PCIE_CALRP AD12/GPIO12
AF31 AJ6
+1.1V_PCIE_VDDR PCIE_CALRN AD13/GPIO13
AK7 20MIL R102 510/F_6 +3VRTC 1 2 +VCCRTC_2
AD14/GPIO14
V33 AN8
GPP_TX0P AD15/GPIO15 D3
V31 AG9
W30
GPP_TX0N AD16/GPIO16
AM11 20MIL *NGC@RB500V-40
GPP_TX1P AD17/GPIO17 C230
W32 AJ10
GPP_TX1N AD18/GPIO18 +3V
AB26 AL12
GPP_TX2P AD19/GPIO19 1U/10V_4
AB27 AK11
Note: CLK_FCH_SRCP/N is 100MHZ SSC AA24
GPP_TX2N AD20/GPIO20
AN12 20MIL
GPP_TX3P AD21/GPIO21
AA23 AG12
GPP_TX3N AD22/GPIO22 PCI_AD23 R97
Note: CLK_DP_NSSCP/N is 100MHZ non-SSC AE12 PCI_AD23 {12}
AD23/GPIO23 PCI_AD24 R312
AA27 AC12 PCI_AD24 {12}
GPP_RX0P AD24/GPIO24 PCI_AD25 *2.2K_4 1K/F_4
Note: CLK_PCIE_TRAVISP/N is 100MHZ non-SSC AA26 AE13 PCI_AD25 {12}
GPP_RX0N AD25/GPIO25 PCI_AD26
W27 AF13 PCI_AD26 {12}
Note: CLK_APU_HCLKP/N is 100MHZ SSC GPP_RX1P AD26/GPIO26 PCI_AD27
V27 AH13 PCI_AD27 {12}

+BAT
GPP_RX1N AD27/GPIO27 PE_PWRGD
V26 AH14

INTERFACE
Note: CLK_PCIE_VGAP/N is 100MHZ SSC
W26
GPP_RX2P AD28/GPIO28
AD15 HUDSON_MEMHOT#
T19 20MIL
Note: GPP_CLK(0:8)P/N is 100MHZ SSC capable GPP_RX2N AD29/GPIO29
C W24 AC15 C
GPP_RX3P AD30/GPIO30
W23 AE16

PCI
GPP_RX3N AD31/GPIO31
AN3
CBE0#
AJ8
CBE1#
AN10
R83 2K/F_4 CLK_CALRN CBE2#
+1.1V_CKVDD F27 AD12
CLK_CALRN CBE3#

1
Ramp 0223: AG10 Net GPIO I/O Power Well DOS CN14
FRAME#
AK9
Remove RP3,RP4, AddR461, R462, R463, R464 INT_CLK_FCH_SRCP G30
DEVSEL#
AL10
TP5 PCIE_RCLKP IRDY#
INT_CLK_FCH_SRCN G28 AF10 PE_PWRGD GPIO28 DGPU_PWRGD I +3.3V "0->1"

2
TP6 PCIE_RCLKN TRDY#
AE10 BAT_CONN
CLK_DP_P R461 22_4 CLK_DP_P_R PAR
{4} CLK_DP_P R26 AH1
CLK_DP_N R462 22_4 CLK_DP_N_R DISP_CLKP STOP#
{4} CLK_DP_N T26
DISP_CLKN PERR#
AM9 PE_GPIO0 GPIO44 DGPU_RST# O +3.3V "0->1"
AH8
SERR#
H33 AG15
DISP2_CLKP REQ0#
H31
DISP2_CLKN REQ1#/GPIO40
AG13 PE_GPIO1 GPIO45 DGPU_PWREN O +3.3V "0->1"
AF15
CLK_APU_P R463 33_4 CLK_APU_P_R REQ2#/CLK_REQ8#/GPIO41
{4} CLK_APU_P T24 AM17 T35
CLK_APU_N R464 33_4 CLK_APU_N_R APU_CLKP REQ3#/CLK_REQ5#/GPIO42
{4} CLK_APU_N T23 AD16
APU_CLKN GNT0#
AD13
GNT1#/GPO44
J30 AD21
SLT_GFX_CLKP GNT2#/SD_LED/GPO45
K29 AK17 T34
SLT_GFX_CLKN GNT3#/CLK_REQ7#/GPIO46 CLKRUN#
AD19 CLKRUN# {24}
CLKRUN#
H27
GPP_CLK0P LOCK#
AH9 20120110:
H28
GPP_CLK0N
AF18 Change R364 from 22_4 to 33_4-->for slewrate issue
CLK_PCIE_WLANP RP2 INTE#/GPIO32
{17} CLK_PCIE_WLANP 2 1 0X2 INT_CLK_PCIE_WLANP J27 AE18 20120112:
CLK_PCIE_WLANN INT_CLK_PCIE_WLANN GPP_CLK1P INTF#/GPIO33
{17} CLK_PCIE_WLANN 4 3 K26 AC16
GPP_CLK1N INTG#/GPIO34
AD18 Change R359 from 22_4 to 33_4-->follow vender suggestion
INTH#/GPIO35
F33
GPP_CLK2P R364 33_4
F31 PCLK_DEBUG {17}
GPP_CLK2N R359 33_4
CLK_PCI_775 {24}
{16} CLK_PCIE_LANP CLK_PCIE_LANP RP7 2 1 0X2 INT_CLK_PCIE_LANP E33
CLK_PCIE_LANN INT_CLK_PCIE_LANN GPP_CLK3P LPC_CLK0_R R362 22_4 LPC_CLK0
4 3 E31 B25
{16} CLK_PCIE_LANN GPP_CLK3N LPCCLK0
LPCCLK1
D25 LPC_CLK1_R R356 22_4 LPC_CLK1
LPC_CLK0 {12}
LPC_CLK1 {12}
For EMI
M23 D27 LPC_LAD0 LPC_LAD0 {17,24}
GPP_CLK4P LAD0 LPC_LAD1
M24 C28 LPC_LAD1 {17,24}
GPP_CLK4N LAD1

LPC
GENERATOR LPC_LAD2 PCLK_DEBUG C401 *15P/50V_4C
B A26 LPC_LAD2 {17,24} B
LAD2 LPC_LAD3
M27 A29 LPC_LAD3 {17,24}
GPP_CLK5P LAD3 LPC_LFRAME# CLK_PCI_775 C396 *15P/50V_4C
M26 A31 LPC_LFRAME# {17,24}
CLOCK

GPP_CLK5N LFRAME# LDRQ#0


B27 T25
LDRQ0# LDRQ#1
N25 AE27 T23
GPP_CLK6P LDRQ1#/CLK_REQ6#/GPIO49 IRQ_SERIRQ
N26 AE19 IRQ_SERIRQ {24}
GPP_CLK6N SERIRQ/GPIO48
R23
GPP_CLK7P
R24
GPP_CLK7N ALLOW_LDTSTP 32K_X1 C348 15P/50V_4C
G25 ALLOW_LDTSTP {4}
DMA_ACTIVE# H_PROCHOT#
N27 E28 H_PROCHOT# {4,24}
GPP_CLK8P PROCHOT#

1
2
R27 E26 APU_PWRGD APU_PWRGD {4,23}
APU

C418 15P/50V_4C GPP_CLK8N APU_PG APU_STOP# Y2


G26

CardReader_48M R380 22_4 CLK_48M_CARD_R


LDT_STP#
APU_RST#
F26 LDT_RST#
T24
LDT_RST# {4,23} R290
20M_4
32.768KHZ_10 B2A
Card Reader {15} CardReader_48M J26
14M_25M_48M_OSC C402 *0.1U/10V_4

4
3
G2 32K_X1 32K_X2 C349 18P/50V_4
25M_X1 32K_X1
25M_X1 C31 G4 32K_X2 USE GROUND GUARD FOR 32K_X1 AND 32K_X2
R371 25M_X1 32K_X2
H7 S5_CORE_EN S5_CORE_EN is necessary to connect enable pin of
S5_CORE_EN T11 +3VPCU/+5VPCU regulator for S5+ mode implementation
1M/F_4 Y3 F1 RTC_CLK RTC_CLK {12}
25M_X2 25M_X2 RTCCLK INTRUDER_ALERT# R313 *1M/F_4
3 1 C33 F3 +3V_RTC
25M_X2 INTRUDER_ALERT# +3V_RTC INTRUDER_ALERT# Left not connected
E6 +3V_RTC
PLUS

VDDBT_RTC_G (FCH has 50-kohm internal pull-up to


S5

C411 VBAT).
4 2 C410 20MIL R58 C61
10P/50V_4 ? 0.1U/10V_4
10P/50V_4 560_4
25MHZ

1
G2

+3V_S5 2 *SHORT_PAD

A C296 *0.1u/10V_4 A
U6
5

TC7SH08FU
2 A_RST#_R
{15,17,24} PLTRST# R156 33_4 A_RST#_L R158 *Short_4 4
1
C293
3

180P/50V_4 {24} EC_A_RST#_L R159 *0_4

Quanta Computer Inc.


PROJECT : ZQZ
Size Document Number Rev
1A
FCH 2/5(ACPI/PCI/CLK)
Date: Thursday, February 23, 2012 Sheet 9 of 32
5 4 3 2 1
5 4 3 2 1

10
U17B
20120104:
PLACE SATA AC COUPLING Add R449, R450, R451
CAPS CLOSE TO HUDSON-M2/M3
Add net N30960722 +3VPCU +3V_S5

{18} SATA_TXP0
C392 0.01U/25V_4X SATA_TXP0_C AK19
SATA_TX0P
HUDSON-M3 Part 2 of 5
SD_CLK/SCLK_2/GPIO73
AL14
C394 0.01U/25V_4 SATA_TXN0_C AM19 AN14
{18} SATA_TXN0 SATA_TX0N SD_CMD/SLOAD_2/GPIO74
AJ12
SATA HDD/SSD AL20
SD_CD#/GPIO75
AH12 R449 R450
{18} SATA_RXN0 SATA_RX0N SD_WP/GPIO76
{18} SATA_RXP0 AN20 AK13
SATA_RX0P SD_DATA0/SDATI_2/GPIO77 *0_4 0_4
D AM13 D
C399 0.01U/25V_4 SATA_TXP1_C SD_DATA1/SDATO_2/GPIO78
{18} SATA_TXP1 AN22 AH15
C400 0.01U/25V_4 SATA_TXN1_C SATA_TX1P SD_DATA2/GPIO79 R451 10K_4 N30960722
AL22 AJ14

CARD
{18} SATA_TXN1 SATA_TX1N SD_DATA3/GPIO80
SATA ODD

SD
{18} SATA_RXN1 AH20 AC4
SATA_RX1N GBE_COL U14 R203
{18} SATA_RXP1 AJ20 AD3
SATA_RX1P GBE_CRS FCH_SPI_CS0# R274 *short_4 SPI_CS
AD9 1 8 10K_4
GBE_MDCK FCH_SPI_CLK R277 *short_4 SPI_SCK CE# VDD
AJ22 W10 6
SATA_TX2P GBE_MDIO FCH_SPI_SO R278 *short_4 SPI_SDO SCK
AH22 AB8 5
SATA_TX2N GBE_RXCLK FCH_SPI_SI R275 *short_4 SPI_SDI R248 33_4 FCH_SPI1_SI_R SI
AH7 2 7 SPI_HOLD# {8}
GBE_RXD3 SO HOLD#
AM23 AF7
SATA_RX2N GBE_RXD2
AK23 AE7 3 4
SATA_RX2P GBE_RXD1 C346 WP# VSS
AD7
GBE_RXD0 *22P/50V_4 W25Q32BVSSIG(SOIC)
AH24 AG8
SATA_TX3P GBE_RXCTL/RXDV C49
AJ24 AD1
SATA_TX3N GBE_RXERR

GBE
LAN
AB7 0.1U/10V_4
GBE_TXCLK
AN24 AF9
SATA_RX3N GBE_TXD3 N30960722 R276 10K_4 FCH_SPI_WP
AL24 AG6
SATA_RX3P GBE_TXD2
AE8
GBE_TXD1
AL26 AD8
SATA_TX4P GBE_TXD0
AN26 AB9
SATA_TX4N GBE_TXCTL/TXEN
GBE_PHY_PD
AC2 20120111:
AJ26 AA7 SPI_CS
AH26
SATA_RX4N GBE_PHY_RST#
W9 GBE_PHY_INTR R68 10K_4 +3V_S5
{24} SPI_CS SPI_SCK Connect R451 net from FCH_SPI_CS0# to SPI_CS
SATA_RX4P GBE_PHY_INTR {24} SPI_SCK
SPI_SDO

SERIAL
{24} SPI_SDO
AN29 {24} SPI_SDI SPI_SDI

ATA
SATA_TX5P FCH_SPI_SI
AL28 V6
SATA_TX5N SPI_DI/GPIO164 FCH_SPI_SO
V5
SPI_DO/GPIO163 FCH_SPI_CLK
AK27 V3
SATA_RX5N SPI_CLK/GPIO162 FCH_SPI_CS0#
AM27 T6
SATA_RX5P SPI_CS1#/GPIO165 FCH_SPI_WP
V1

ROM
ROM_RST#/SPI_WP#/GPIO161
AL29

SPI
NC6
AN31
NC7
L30 TP40
VGA_RED
AL31
NC8
PLACE SATA_CAL RES VERY AL33
NC9 VGA_GREEN
L32 TP46

C
CLOSE TO BALL OF AH33 M29 C
NC10 VGA_BLUE TP47
HUDSON-M2/M3 AH31
NC11
AJ33 M28 TP41
NC12 VGA_HSYNC/GPO68
AJ31 N30 TP45
NC13 VGA_VSYNC/GPO69

VGA
DAC
M33 +1.5VSUS +3V_S5
VGA_DDC_SDA/GPO70 TP35
N32 TP36
R377 1K/F_4 SATA_CALRP VGA_DDC_SCL/GPO71
AF28
R80 931/F_4 SATA_CALRN SATA_CALRP
+1.1V_AVDD_SATA AF27 K31 TP34
SATA_CALRN VGA_DAC_RSET R244 R243
V28 *1K/F_4 *1K/F_4
AUX_VGA_CH_P TP52
+3V R183 10K/F_4 SATA_LED# AD22 V29
SATA_ACT#/GPIO67 AUX_VGA_CH_N TP51

{22} SATA_LED# U28 TP39


AUXCAL VIN_VDDIO VIN_VDDR
AF21
SATA_X1
T31 TP50
ML_VGA_L0P R272
T33 TP38
Integrated Clock Mode: ML_VGA_L0N *1K/F_4 R270
T29 TP44
Leave unconnected.
ML_VGA_L1P *1K/F_4
T28 TP43
ML_VGA_L1N
R32 TP49
+3V ML_VGA_L2P
AG21 R30 TP37
SATA_X2 ML_VGA_L2N
P29 TP42
ML_VGA_L3P
P28

MAINLINK
ML_VGA_L3N TP48
R332 C29
ML_VGA_HPD/GPIO229 TP4
*10K/F_4 VGA
BOARD_ID1 AH16 N2 VIN0 R271 10K_4
FCH_ODD_EN FANOUT0/GPIO52 VIN0/GPIO175 VIN1 R54 10K_4
{18} FCH_ODD_EN AM15 M3
FCH_PROCHOT#_C FANOUT1/GPIO53 VIN1/GPIO176 VIN2 R56 10K_4
AJ16 L2
FANOUT2/GPIO54 HW VIN2/SDATI_1/GPIO177 MEM_P1V5
N4 T13
BOARD_ID2 MONITOR
VIN3/SDATO_1/GPIO178 MEM_P1V35
AK15 P1 T9
BOARD_ID3 FANIN0/GPIO56 VIN4/SLOAD_1/GPIO179 VIN_VDDIO
AN16 P3
BOARD_ID4 FANIN1/GPIO57 VIN5/SCLK_1/GPIO180 VIN_VDDR
AL16 M1
FANIN2/GPIO58 VIN6/GBE_STAT3/GPIO181 VIN7 R57 10K_4
M5
BOARD_ID5 VIN7/GBE_LED3/GPIO182
K6
BOARD_ID6 TEMPIN0/GPIO171
K5 AG16
BOARD_ID7 TEMPIN1/GPIO172 NC1 R336 lvds@10K_4 BOARD_ID1 R337 *eDP@10K_4
B K3 AH10 +3V B
TEMPIN3 TEMPIN2/GPIO173 NC2 R317 10K_4 BOARD_ID2 R316 *10K_4
M6 A28
TEMPIN3/TALERT#/GPIO174 NC3 R330 10K_4 BOARD_ID3 R333 *10K_4
G27
NC4 R321 10K_4 BOARD_ID4 R320 *10K_4
L4
NC5 R379 *10K_4 BOARD_ID8 R374 *10K_4
R60 R365 *10K_4 BOARD_ID9 R363 *10K_4
10K_4 ?

+3V_S5 R238 *10K_4 BOARD_ID5 R266 10K_4


R240 10K_4 BOARD_ID6 R268 *10K_4
R241 10K_4 BOARD_ID7 R269 *10K_4

R341 10K_4 BOARD_ID10 R342 *10K_4


BOARD ID SETTING
BOARD_ID8
{8} BOARD_ID8
BOARD_ID9
{8} BOARD_ID9
BOARD_ID10
{8} BOARD_ID10
BOARD_ID1 LCD BOARD_ID2 BOARD_ID3 For TP BOARD_ID2
{23} BOARD_ID2
BOARD_ID3
{23} BOARD_ID3
0 eDP 0 1 ALPS

1 LVDS 1 0 ELAN

1 1 Synaptics

A A

Quanta Computer Inc.


PROJECT : ZQZ
Size Document Number Rev
1A
FCH 3/5(SATA/VGA/GND/SPI)
Date: Thursday, February 23, 2012 Sheet 10 of 32
5 4 3 2 1
5 4 3 2 1

PLACE ALL THE DECOUPLING CAPS ON


U17D
11
THIS SHEET CLOSE TO SB AS POSSIBLE.
VDD-- S/B CORE power
+3.3V_FCH_R
A3
HUDSON-M3 T25
U17C +1.1V_VCC_FCH_R VSS_1 Part 5 of 5 VSS_65
VDDQ--3.3V I/O power 102mA A33
VSS_2 VSS_66
T27
R72 *short_8 1007mA TRACE WIDTH >=100mil
+3V
AB17 HUDSON-M3
VDDIO_33_PCIGP_1
Part 3 of 5
VDDCR_11_1
T14 R74 *short_8 +1.1V
B7
B13
VSS_3
VSS_4
VSS_67
VSS_68
U6
U14
AB18 T17 D9 U17
C124 C140 C103 C123 VDDIO_33_PCIGP_2 VDDCR_11_2 VSS_5 VSS_69
AE9 T20 D13 U20
22U/6.3V_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDIO_33_PCIGP_3 VDDCR_11_3 C136 C158 C137 C127 C125 VSS_6 VSS_70
AD10 U16 E5 U21
VDDIO_33_PCIGP_4 VDDCR_11_4 0.1U/10V_4 0.1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V_8 VSS_7 VSS_71
AG7 U18 E12 U30

PCI/GPIO I/O
D VDDIO_33_PCIGP_5 VDDCR_11_5 VSS_8 VSS_72 D

CORE
AC13 V14 E16 U32
L24 TRACE WIDTH >=15mil VDDIO_33_PCIGP_6 VDDCR_11_6 VSS_9 VSS_73
AB12 V17 E29 V11

S0
+3V VDDIO_33_PCIGP_7 VDDCR_11_7 VSS_10 VSS_74
AB13
VDDIO_33_PCIGP_8 VDDCR_11_8
V20 CKVDD_1.1V-- F7
VSS_11 VSS_75
V16
HCB1608KF-221T20 AB14 Y17 F9 V18
VDDIO_33_PCIGP_9 VDDCR_11_9 +1.1V_CKVDD Internal clock VSS_12 VSS_76
C205 C206 AB16 F11 W4
2.2U/6.3V_4 VDDIO_33_PCIGP_10 Generator I/O VSS_13 VSS_77
*0.1U/10V_4
47mA 340mA TRACE WIDTH >=30mil power
F13
VSS_14 VSS_78
W6
+VDDPL_3.3V H24 H26 F16 W25
VDDPL_33_SYS VDDAN_11_CLK_1 L21 VSS_15 VSS_79
V22 J25 +1.1V F17 W28
VDDPL_33_DAC VDDAN_11_CLK_2 HCB1608KF-181T15_1.5A VSS_16 VSS_80
U22 K24 F19 Y14
L25 TRACE WIDTH >=15mil VDDPL_33_ML VDDAN_11_CLK_3 VSS_17 VSS_81
+3V T22 L22 F23 Y16
VDDAN_33_DAC VDDAN_11_CLK_4 VSS_18 VSS_82
+FCH_VDDPL_33_SSUSB_S 11mA L18
VDDPL_33_SSUSB_S VDDAN_11_CLK_5
M22 C175 C197 C174 C196 C171 F25
VSS_19 VSS_83
Y18

CLKGEN
HCB1608KF-221T20 +FCH_VDDPL_33_SUSB_S 14mA D7 N21 1U/10V_4 1U/10V_4 0.1U/10V_4 0.1U/10V_4 22U/6.3V_8 F29 AA6
C204 C203 +FCH_VDDPL_33_PCIE VDDPL_33_USB_S VDDAN_11_CLK_6 VSS_20 VSS_84
11mA AH29
VDDPL_33_PCIE VDDAN_11_CLK_7
N22 G6
VSS_21 VSS_85
AA12
2.2U/6.3V_4 *0.1U/10V_4 +FCH_VDDPL_33_SATA 12mA AG28 P22 G16 AA13

I/O
VDDPL_33_SATA VDDAN_11_CLK_8 +1.1V_PCIE_VDDR VSS_22 VSS_86
G32 AA14
R376 *0_4 LDO_CAP TRACE WIDTH >=100mil VSS_23 VSS_87
+1.5VSUS
C409 *2.2U/6.3V_6
1088mA PCIE_VDDR--PCIE I/O power
L18
H12
VSS_24 VSS_88
AA16
M31 AB24 +1.1V H15 AA17
LDO_CAP VDDAN_11_PCIE_1 HCB1608KF-181T15_1.5A VSS_25 VSS_89
Y21 H29 AA25
VDDAN_11_PCIE_2 VSS_26 VSS_90
V21 AE25 J6 AA28
VDDPL_11_DAC VDDAN_11_PCIE_3 C191 C183 C195 C200 C198 VSS_27 VSS_91

GROUND
AD24 J9 AA30
VDDAN_11_PCIE_4 1U/10V_4 1U/10V_4 22U/6.3V_8 VSS_28 VSS_92
Y22 AB23 0.1U/10V_4 0.1U/10V_4 J10 AA32

EXPRESS
VDDAN_11_ML_1 VDDAN_11_PCIE_5 VSS_29 VSS_93
V23 AA22 J13 AB25
VDDAN_11_ML_2 VDDAN_11_PCIE_6 VSS_30 VSS_94
V24 AF26 J28 AC6
+3V_S5 +FCH_VDDPL_33_SSUSB_S VDDAN_11_ML_3 VDDAN_11_PCIE_7 VSS_31 VSS_95

PCI
MAIN
V25 AG27 J32 AC18

LINK
VDDAN_11_ML_4 VDDAN_11_PCIE_8 +1.1V_AVDD_SATA VSS_32 VSS_96
K7 AC28
TRACE WIDTH >=100mil VSS_33 VSS_97
L19
1337mA AVDD_SATA--SATA phy power
L13
K16
VSS_34 VSS_98
AD27
AB10 AA21 +1.1V K27 AE6
U3@HCB1608KF-221T20 VDDIO_33_GBE_S VDDAN_11_SATA_1 HCB1608KF-181T15_1.5A VSS_35 VSS_99
Y20 K28 AE15
R79 VDDAN_11_SATA_4 VSS_36 VSS_100

GBE
AB21 L6 AE21

LAN
C193 C184 VDDAN_11_SATA_2 C168 C162 C173 C167 C170 VSS_37 VSS_101
AB22 L12 AE28
U3@2.2U/6.3V_6 *U2@0_4 VDDAN_11_SATA_3 1U/10V_4 1U/10V_4 22U/6.3V_8 VSS_38 VSS_102
U3@0.1U/10V_4 AB11 AC22 0.1U/10V_4 0.1U/10V_4 L13 AF8
VDDCR_11_GBE_S_1 VDDAN_11_SATA_5 VSS_39 VSS_103
AA11 AC21 L15 AF12

SERIAL
VDDCR_11_GBE_S_2 VDDAN_11_SATA_6 VSS_40 VSS_104
AA20 L16 AF16
VDDAN_11_SATA_7 VSS_41 VSS_105

ATA
AA18 L21 AF33
+FCH_VDDPL_33_SUSB_S VDDAN_11_SATA_8 VSS_42 VSS_106
AA9 AB20 M13 AG30
+3V_AVDD_USB VDDIO_GBE_S_1 VDDAN_11_SATA_9 VSS_43 VSS_107
AA10 AC19 M16 AG32
VDDIO_GBE_S_2 VDDAN_11_SATA_10 VSS_44 VSS_108
C M21 AH5 C
L35 VSS_45 VSS_109
M25 AH11
HCB1608KF-221T20 VSS_46 VSS_110
N6 AH18
VSS_47 VSS_111
S5_3.3--3.3v standby power N11 AH19
C368 C369 S5 plus mode N13
VSS_48
VSS_49
VSS_112
VSS_113
AH21
2.2U/6.3V_6 1U/10V_4 59mA TRACE WIDTH >=20mil N23 AH23
+3V_AVDD_USB +VDDIO_33_S R64 *short_6 VSS_50 VSS_114
G7 N18 +3V_S5 N24 AH25
VDDAN_33_USB_S_1 VDDIO_33_S_1 VSS_51 VSS_115
H8 L19 P12 AH27
TRACE WIDTH >=50mil VDDAN_33_USB_S_2 VDDIO_33_S_2 VSS_52 VSS_116
L11
470mA J8
VDDAN_33_USB_S_3 VDDIO_33_S_3
M18
C105 C121 C164 C95
P18
VSS_53 VSS_117
AJ18
+3V_S5 K8 V12 P20 AJ28
VDDAN_33_USB_S_4 VDDIO_33_S_4 1U/10V_4 1U/10V_4 2.2U/6.3V_6 10u/10V_8 VSS_54 VSS_118

3.3V_S5 I/O
K9 V13 P21 AJ29
HCB1608KF-221T20 VDDAN_33_USB_S_5 VDDIO_33_S_5 VSS_55 VSS_119
M9 Y12 P31 AK21
EMI C100 C84 C85 C77 C78 VDDAN_33_USB_S_6 VDDIO_33_S_6 VSS_56 VSS_120
M10 Y13 P33 AK25
10U/6.3V_8 10U/6.3V_8 1U/10V_4 1U/10V_4 VDDAN_33_USB_S_7 VDDIO_33_S_7 VSS_57 VSS_121
0.1U/10V_4 N9 W11 R4 AL18
VDDAN_33_USB_S_8 VDDIO_33_S_8 VSS_58 VSS_122
N10 R11 AM21

USB
VDDAN_33_USB_S_9 VSS_59 VSS_123
M12
VDDAN_33_USB_S_10 5mA +VDDXL_3.3V L22
R25
VSS_60 VSS_124
AM25
N12 G24 +3V_S5 R28 AN1
L5 +FCH_VDDAN_11_USB_S VDDAN_33_USB_S_11 VDDXL_33_S HCB1608KF-221T20 VSS_61 VSS_125
+1.1V_S5 M11
VDDAN_33_USB_S_12
S5_1.1V--1.1V standby power T11
VSS_62 VSS_126
AN18
C50 2.2U/6.3V_6 187mA T16 AN28
HCB1608KF-221T20 C51 0.1U/10V_4 TRACE WIDTH >=20mil +VDDCR_1.1V R78 *short_6 +1.1V_S5 C199 C207 VSS_63 VSS_127
U12 N20 T18 AN33
VDDAN_11_USB_S_1 VDDCR_11_S_1 TRACE WIDTH >=15mil *0.1U/10V_4 2.2U/6.3V_6 VSS_64 VSS_128
140mA U13
VDDAN_11_USB_S_2 VDDCR_11_S_2
M20
N8 T21
L8 +FCH_VDDCR_11_USB_S C169 C161 VSSAN_HWM VSSPL_DAC
+1.1V_S5
TRACE WIDTH >=15mil
T12
VDDCR_11_USB_S_1 VDDPL_11_SYS_S
J24 70mA +VDDPL_1.1V
1U/10V_4 1U/10V_4 VSSAN_DAC
L28
T13 K25 K33
HCB1608KF-221T20 VDDCR_11_USB_S_2 VSSXL VSSANQ_DAC
C56 C55 C57
42mA 12mA VSSIO_DAC
N28
M8 +VDDAN_3.3V_HWM H25
10U/6.3V_8 VDDAN_33_HWM_S VSSPL_SYS
0.1U/10V_4 0.1U/10V_4 P16 R6
+1.1V_S5 +FCH_VDD_11_SSUSB_S VDDAN_11_SSUSB_S_1 EFUSE
M14
VDDAN_11_SSUSB_S_2 26mA ?
N14 AA4 +VDDIO_AZ
VDDAN_11_SSUSB_S_3 VDDIO_AZ_S
L36 R70 *short_8 +FCH_VDDAN_11_SSUSB_S_R
282mA P13
VDDAN_11_SSUSB_S_4 Trace width >=20 mil
P14
U3@HCB1608KF-221T20 VDDAN_11_SSUSB_S_5
USB
N16
VDDCR_11_SSUSB_S_1 SS
R69 *short_8 +FCH_VDDCR_11_SSUSB_S
424mA N17
VDDCR_11_SSUSB_S_2
P17
VDDCR_11_SSUSB_S_3
M17
VDDCR_11_SSUSB_S_4
B C148 C145 R73 B
R71 U3@10U/6.3V_8 U3@0.1U/10V_4
C101 C117 C108 C86 *U2@0_4
*U2@0_4 U3@1U/10V_4 U3@0.1U/10V_4 U3@0.1U/10V_4 U3@1U/10V_4 C149 C146 POWER
U3@1U/10V_4 U3@0.1U/10V_4

+1.1V_S5 +1.1V +VDDPL_1.1V


+VDDIO_AZ
+3V +VDDPL_3.3V
+3V_S5 +3V_S5 +VDDAN_3.3V_HWM
L20
*U2@HCB1608KF-221T20 L15
R62 *short_8 L16 L12 HCB1608KF-221T20
U3@HCB1608KF-221T20 HCB1608KF-221T20
C179 C178
C194 C192 C81 C73 2.2U/6.3V_6 0.1U/10V_4
C94 C104 2.2U/6.3V_6 0.1U/10V_4 2.2U/6.3V_6 0.1U/10V_4
2.2U/6.3V_6 *0.1U/10V_4

A A

Quanta Computer Inc.


PROJECT : ZQZ
Size Document Number Rev
1A
FCH 4/5(POWER)
Date: Thursday, February 23, 2012 Sheet 11 of 32
5 4 3 2 1
5 4 3 2 1

OVERLAP COMMON PADS WHERE


12
POSSIBLE FOR DUAL-OP RESISTORS.
+3V +3V +3V +3V_S5 +3V_S5 +3V_S5 +3V_S5

STRAPS PINS
D D
R250 R251 R252 R360 R355 R352 R307
10K_4 *10K_4 *10K_4 *10K_4 10K_4 *10K_4 10K_4

{9} PCI_CLK1 PCI_CLK1

{9} PCI_CLK3 PCI_CLK3

{9} PCI_CLK4 PCI_CLK4

{9} LPC_CLK0 LPC_CLK0


+3V_S5
{9} LPC_CLK1 LPC_CLK1

{8} EC_PWM2 EC_PWM2 System PWR_OK(CLG)


{9} RTC_CLK RTC_CLK C344
*0.1u/10V_4

5
U3
2 CPU_COREPG {23,27}
R249 R283 R253 R361 R354 R353 R308 FCH_PWRGD 4
EC_PWM2--> {8} FCH_PWRGD
*10K_4 10K_4 10K_4 10K_4 *10K_4 2.2K_4 *2.2K_4 1 PWROK_EC
SPI ROM: 2.2-K 5% pull-down PWROK_EC {23,24}
LPC ROM: Pull-up to 3.3V_S5. TC7SH08FU

3
External pull-up resistor is not required as FCH has
integrated 10-K pull-up to 3.3V_S5. R39
C 100K_4 C

Remove PCI_CLK2 function

-------- PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 EC_PWM2 RTC_CLK


REQUIRED
STRAPS PULL ALLOW USE non_Fusion EC CLKGEN LPC ROM S5 PLUS MODE
HIGH PCIE Gen2 DEBUG CLOCK MODE ENABLED ENABLED DISABLED
-------- --------
DEFAULT STRAP DEFAULT DEFAULT FCH PWRGD CKT
PULL FORCE IGNORE FUSION EC CLKGEN SPI ROM S5 PLUS MODE
-------- PCIE Gen1 DEBUG CLOCK MODE DISABLED DISABLED ENABLED
LOW --------
STRAP DEFAULT DEFAULT DEFAULT
DEFAULT

B B

DEBUG STRAPS
FCH HAS 15K INTERNAL PU FOR PCI_AD[27:23]

PCI_AD27
{9} PCI_AD27
PCI_AD26
{9} PCI_AD26
PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
PCI_AD25
{9} PCI_AD25
PCI_AD24 PULL USE PCI DISABLE ILA USE FC USE DEFAULT DISABLE PCI
{9} PCI_AD24
PCI_AD23 HIGH PLL AUTORUN PLL PCIE STRAPS MEM BOOT
{9} PCI_AD23
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT

R287 R286 R311 R305 R306


*2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 PULL BYPASS ENABLE ILA BYPASS FC USE EEPROM ENABLE PCI
LOW PCI PLL AUTORUN PLL PCIE STRAPS MEM BOOT

A A

Quanta Computer Inc.


PROJECT : ZQZ
Size Document Number Rev
1A
FCH 5/5(STRAP & PWRGD)
Date: Thursday, February 23, 2012 Sheet 12 of 32
5 4 3 2 1
1 2 3 4 5 6 7 8

CRT OPTION SIGNAL FROM NB to LVDS/CRT for UMA

13
30V/ 1A 30V/ 0.5A C126 .22u/10V_4
+5V

F1 CRTVDD5_F D15 CRTVDD5

16
2 1 2 1
B0520WS-7-F CN11
SMD1206P100TF CRT
INT_DDCCLK 6
{4} INT_DDCCLK
INT_DDCDATA INT_CRT_RED L23 BLM18BB750SN1D CRT_R1 1 11 CRT_11 TP33
{4} INT_DDCDATA
7
INT_CRT_GRE L17 BLM18BB750SN1D CRT_G1 2 12 DDCDAT_1
INT_CRT_HSYNC 8
{4} INT_CRT_HSYNC
INT_CRT_VSYNC INT_CRT_BLU L14 BLM18BB750SN1D CRT_B1 3 13 CRTHSYNC
{4} INT_CRT_VSYNC
9
20120110: 4 14 CRTVSYNC
R84 R82 R77 C202 C186 C163 C166 C185 C201 10
INT_CRT_RED Change L14, L17, L23 from BLM18BA470SN1_6 5 15 DDCCLK_1
{4} INT_CRT_RED
to BLM18BB750SN1D 150/F_4 150/F_4 150/F_4 10P/50V_4 10P/50V_4 10P/50V_4 10P/50V_4 10P/50V_4 10P/50V_4
INT_CRT_GRE
{4} INT_CRT_GRE

17
A INT_CRT_BLU A
{4} INT_CRT_BLU

+3V U18 +3V


CRTVDD5 1 16 CRTVSYNC
VCC_SYNC SYNC_OUT2 CRTHSYNC
14
SYNC_OUT1 C398 1000p/50V_4 CRTVDD5
7
C388 .22u/10V_4 CRT_BYP VCC_DDC
8
C397 BYP INT_CRT_VSYNC R348 R351 C389 10P/50V_4 CRTVSYNC
15
SYNC_IN2 INT_CRT_HSYNC 2.7K_4 2.7K_4
+3V 2 13
0.1u/10V_4 VCC_VIDEO SYNC_IN1 C390 10P/50V_4 CRTHSYNC
C391
CRT_R1 3 10 INT_DDCCLK C383 10P/50V_4 DDCCLK_1
0.1u/10V_4 CRT_G1 VIDEO_1 DDC_IN1 INT_DDCDATA
4 11
CRT_B1 VIDEO_2 DDC_IN2 C395 10P/50V_4 DDCDAT_1
5
VIDEO_3 DDCCLK_1 R344 2.7K_4 CRTVDD5
9
DDC_OUT1 DDCDAT_1 R357 2.7K_4
6 12
GND DDC_OUT2
20120110:
CM2009-02QR
Change C398 from .1u_10V_4 to 1000p/50V_4

LVDS(LDS) LCD PW(LDS) +3V


LCDVCC L32 *short_6LCDVCC_L
+3V VIN C13 C324
+3V L2
*short_6 VIN *10P/50V_4 *10P/50V_4
CCD_POWER L1 *short_6 C22
C18 C17 C16 C6 C8 L4 *short_6 LCD_VIN 1U/6.3V_4 U1
C20 *10P/50V_4 C12 C11 40mil
10P/50V_4 1000P/50V_4 4.7u/25V_8 1000P/50V_4 *0.1u/10V_4 6 1 LCDVCC
*10P/50V_4 *10P/50V_4 IN OUT
4 2
IN GND
3 5 C7 C322 C323 C19
{4} INT_LVDS_DIGON ON/OFF GND
B 1U/6.3V_4 *.1u/10V_4 .01u/16V_4 22u/6.3V_8 B
IC(5P) G5243T11U
R31

100K_4

20120104:
Swap INT_EDIDCLK from CN1.32 to CN1.33
Swap INT_EDIDDATA from CN1.33 to CN1.32
CN1 Backlight Control(LDS)
G_5

G_6
LCD_VIN +3VPCU
40 +3V
39

1
R15 38
*eDP@100K_4 C10 *eDP@0.1u/10V_4 eDP_MLP0 37
{4} INT_TXLOUTP2 36 R9
C9 *eDP@0.1u/10V_4 eDP_MLN0
{4} INT_TXLOUTN2 35 *100K
INT_EDIDCLK C14 *eDP@0.1u/10V_4 EDP_EDIDCLK 34 R23 R22

2
{4} INT_EDIDCLK 33
INT_EDIDDATA C15 *eDP@0.1u/10V_4 EDP_EDIDDATA
{4} INT_EDIDDATA 32 10K_4 10K_4
INT_TXLCLKP 31 G_4 BL_ON D2
{4} INT_TXLCLKP 2 1 BAS316 LID591# {24}
R16 INT_TXLCLKN 30
{4} INT_TXLCLKN 29
*eDP@100K_4
INT_TXLOUTP0 28
{4} INT_TXLOUTP0

3
INT_TXLOUTN0 27
{4} INT_TXLOUTN0

3
26
INT_TXLOUTP1 25
{4} INT_TXLOUTP1 24
+3V INT_TXLOUTN1 BL# 2 2
{4} INT_TXLOUTN1 23 EC_FPBACK# {24}

3
INT_TXLOUTP2 R25 lvds@0_4 INT_TXLOUTP2_R 22 Q4 Q1
INT_TXLOUTN2 R24 lvds@0_4 INT_TXLOUTN2_R 21 2N7002K DTC144EUA

1
20

1
INT_EDIDDATA R14 lvds@0_4 LVDS_EDIDDATA 19
{4} INT_LVDS_BLON 2
INT_EDIDCLK R13 lvds@0_4 LVDS_EDIDCLK 18
eDP-HPD 17 Q5
R10 *0_4 LVDS_BRIGHT R12 BLM15AG121SS1/0.5A/120ohm_4 16 2N7002K
{24} CONTRAST 15
R20 *short_4 BL_ON R27
{4} INT_LVDS_PWM

1
R17 *short_6 14
+3V 13
LCDVCC_L 100K_4
C 12 C
11
10 G_1
*15P/50V_4C C21 R29 *300_4 CCD_POWER 9
8
7
R19 0_4 USBP6-_R 6
{8} USBP6- 5
R18 0_4 USBP6+_R
{8} USBP6+ 4
3
{19} MIC2_INTL1 2
CCD-USB
G_0

ADOGND GS12401-1011-40P-R-NH

Ramp 0221:
Remove L3
+3VPCU

20120104: C4 0.1u/10V_4
R30, R28, Q2, Q3 unstuff, R21 stuff Lid Switch (HSR)

1
+3V
2 LID591#

HE1
INT_eDPI_HPD R21 *short_4 eDP-HPD R30 APX9132H AI
3

2
*10K_4
EM-6781-T3: AL006781000 D1
APX9132H AI-TRG: AL009132001 *VPORT_6
AH9249NTR-G1: AL009249000

1
3

+3V

D D
2 eDP-HPD_R R28 *0_4 eDP-HPD

R26 Q3
*100K_4 *2N7002K R11
100K_4
1

{4} INT_eDPI_HPD
3

Q2
*2N7002K
Quanta Computer Inc.
PROJECT : ZQZ
1

Size Document Number Rev


CRT/LVDS/LID 1A

Date: Thursday, February 23, 2012 Sheet 13 of 32


1 2 3 4 5 6 7 8
5 4 3 2 1

HDMI SDVO I2C Control HDMI HPD SENSE (HDM)

{4} HDMI_DDCDATA
HDMI_DDCDATA
HDMI_DDCCLK
UMA use +3V for the detect pin
Dis use +3V_DELAY for the detect pin 14
{4} HDMI_DDCCLK +3V

D D
R394
10K_4
INT_HDMI_HPD R383 *0_4 HDMI_DET

3
+3V

2 HDMI_DET

R384 Q21
10K_4 2N7002K C517 R388
100K_4

1
*0.01U/25V_4
{4} INT_HDMI_HPD

3
2 2011/08/25:
HDMI_HPD_EC# {24} Change R214 from 2000k to 100k
Q22
2N7002K 20120110:
Ramp 0223:
HDMI (HDM)

1
C C
Add C517 for hdmi detect issue
Change R88, R94, R103, R109 value from 100 to 120ohm and stuff

Close to HDMI Connector EMI reserve for HDMI(EMC)


Close connector

+5V HDMI_PL_MOS R107 499/F_4 TX2_HDMI+


TX2_HDMI+ HDMI PORT (HDM)
R109
R111 499/F_4 TX2_HDMI- 120/F_4 CN13
TX2_HDMI- 20
SHELL1
3

R98 499/F_4 TX1_HDMI+ TX2_HDMI+ 1


Q9 TX1_HDMI+ D2+
2
2N7002K R93 499/F_4 TX1_HDMI- TX2_HDMI- D2 Shield
3
R94 TX1_HDMI+ D2-
2 4
R104 499/F_4 TX0_HDMI+ 120/F_4 D1+
5
TX1_HDMI- TX1_HDMI- D1 Shield
6
R101 499/F_4 TX0_HDMI- TX0_HDMI+ D1-
7
TX0_HDMI+ D0+
8
1

R91 499/F_4 TXC_HDMI+ TX0_HDMI- D0 Shield


B 9 B
R103 TXC_HDMI+ D0-
10
R92 R87 499/F_4 TXC_HDMI- 120/F_4 CK+
11
TX0_HDMI- TXC_HDMI- CK Shield
12
CK-
13
100K/F_4 TXC_HDMI+ CE Remote
14
+5V HDMI_DDCCLK NC
15
R88 F2 HDMI_DDCDATA DDC CLK
16
120/F_4 SMD1206P100TF D16 DDC DATA
DIS TXC_HDMI- 2 1 +5V_HDMI_R SBR2U30SA +5V_HDMI
17
18
GND
+5V
Stuff 499 ohm CS14992FB24 HDMI_DET 19
HP DET
21
SHELL2
HDMI CONN
C419
.22u/10V_4
C211
*1000P/50V_4
TX2_HDMI+
{4} TX2_HDMI+ D17 R381
TX2_HDMI-
{4} TX2_HDMI-
TX1_HDMI+ +5V 2 1 HDMI_DDCCLK
{4} TX1_HDMI+
TX1_HDMI-
{4} TX1_HDMI-
TX0_HDMI+ 2K/F_4 C421
{4} TX0_HDMI+ CH501H-40PT
TX0_HDMI- *1000P/50V_4
{4} TX0_HDMI-
TXC_HDMI+
{4} TXC_HDMI+ D18 R382
TXC_HDMI-
{4} TXC_HDMI-
A
+5V 2 1 HDMI_DDCDATA A

2K/F_4
CH501H-40PT

Quanta Computer Inc.


PROJECT : ZQZ
Size Document Number Rev
HDMI 1A

Date: Thursday, February 23, 2012 Sheet 14 of 32


5 4 3 2 1
A B C D E

5 in 1 CARD READER IC (SD,MMC,xD,MS)


15
PIN43=Power saving mode enable.

SD_WP/XD_CLE/MS_CLK
C743 close PIN46, 47
+1.8V_VDD '1' for enable [Default]

T39

SD_D1/XD_D1/MS_D1
SD_D0/XD_D0/MS_D0
CTRL0, CRTL 1 trace length shorter ,
C708 close PIN48, 47 '0' for disable and surround with GND.

SD_CD#/XD_WE#
+3V

SD_D7/XD_D7
C431 C429
4 4

XTALSEL
0.1u/16V_4 0.1u/16V_4

NBMD
C1_IOP C422 *27P/50V_4 XI

48
47
46
45
44
43
42
41
40
39
38
37
U19 Y4 R392
+3V C440 C442 *12MHZ *270K_4

GND

XTALSEL

CTRL1
CTRL3
DATA1
DATA0
DATA7
VDD

HID
NBMD
VDDHM

C1_VSSHM
0.1u/16V_4 *4.7u/10V_6
C423 *27P/50V_4 XO
R391
*100K_4 1 36
R395 22_4 EXT48MHZ_R LED C1_VDDHM SD_D6/XD_D6
{9} CardReader_48M 2
EXT48IN DATA6
35 PIN45=Clock input selection
R390 *short_4 3 34 SD_CLK/XD_ALE/MS_BS
{9,17,24} PLTRST# C424 *0.47u/10V_6 R389 330_4 4
RSTN CTRL0
33 SD_D5/XD_D5 '1' for 48MHz input [Default,Internal PU]
R387 *short_6 +3V_VDD REXT DATA5 SD_CMD_/XD_RB# '0' for 12MHz input
+3V 5 32
VD33P CTRL2 SD_D4/XD_D4
{8} USBP5+ 6 31
DP AU6435B52-GDL-GR DATA4 SD_D3/XD_D3/MS_D3
{8} USBP5- 7 30
DM DATA3 SD_D2/XD_D2/MS_D2 *0_4 R396 XTALSEL
8 29
C425 C426 XI VS33P DATA2 XD_WP#
9 28
*15P/50V_4C C420 R385 *300_4 C427 XO XI XDWPN XD_CE#
10 27
4.7u/10V_6 *5p/50V_4 *5p/50V_4 XO XDCEN EEPDATA
11 26
VDD EEPDATA EEPCLK T40
+1.8V_VDD 12 25

VSSA_SYN
V18 EEPCLK TP65

SDWPEN
AGND5V
AVDD5V

VDDHM
C1_V33

XDCDN
C1_IOP

CTRL4
C428

GND
VDD
V33
4.7u/10V_6 SD write protect
3 1:decided by SDWP[Default] 3

0:disable SD write protect

13
14
15
16
17
18
19
20
21
22
23
24
pin13 output 20mils *0_4 R397
VCC_XD XD_CD#
XD_RE#/MS_INS#
C1_IOP +1.8V_VDD
C430 0.1u/16V_4 +3V
+3V
C435 2.2u/6.3V_6
C433
+3V
C436 4.7u/10V_6 0.1u/16V_4

5 IN 1 CARD READER CONN (SD/MMC)


SD_CLK/XD_ALE/MS_BS and SD_CLK_R trace length
VCC_XD VCC_XD
shorter , surround with GND.
SD_CLK_R
2 2
CN5 Reserved for combo connector,
which has MS adaptor short C265
13 *10p/50V_4
SD_CD#/XD_WE# SD-VCC issue with XDCDN
1
SD_WP/XD_CLE/MS_CLK SD-CD-SW
2 45
SD_D1/XD_D1/MS_D1 R136 33_4 SD_D1_R SD-WP-SW XD-VCC
3
SD_D0/XD_D0/MS_D0 R137 33_4 SD_D0_R SD-DAT1
4
SD_CLK/XD_ALE/MS_BS R140 33_4 SD_CLK_R SD-DAT0 R445 *short_4 XD_CD#
10 28
SD_CMD_/XD_RB# SD_CMD_R SD-CLK XD-CD
R400 33_4 19 29 SD_CMD_/XD_RB#
SD_D3/XD_D3/MS_D3 R402 33_4 SD_D3_R SD-CMD XD-R/B VCC_XD
23 30 XD_RE#/MS_INS#
SD_D2/XD_D2/MS_D2 SD_D2_R SD-DATA3 XD-RE
R403 33_4 25 31 XD_CE#
SD_D7/XD_D7 SD_D7_R SD-DAT2 XD-CE
R138 33_4 5 32 SD_WP/XD_CLE/MS_CLK
SD_D6/XD_D6 R139 33_4 SD_D6_R MMC-DATA7 XD-CLE
8 33 SD_CLK/XD_ALE/MS_BS
SD_D5/XD_D5 SD_D5_R MMC-DATA6 XD-ALE
R399 33_4 17 34 SD_CD#/XD_WE#
SD_D4/XD_D4 R401 33_4 SD_D4_R MMC-DATA5 XD-WE XD_WP#
21 35
MMC-DATA4 XD-WP
7 C449 C516 C452 C450 R398
SD-GND1 SD_D0/XD_D0/MS_D0 4.7u/10V_6 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 5.1K/F_4
15 37
SD-GND2 XD-D0 SD_D1/XD_D1/MS_D1
26 38
SD-WP-GND XD-D1 SD_D2/XD_D2/MS_D2
27 39
SD-CD-GND XD-D2 SD_D3/XD_D3/MS_D3
40
XD-D3 SD_D4/XD_D4
22 41
SD_CLK/XD_ALE/MS_BS MS-VCC XD-D4 SD_D5/XD_D5
9 42
SD_D1/XD_D1/MS_D1 MS-BS XD-D5 SD_D6/XD_D6
11 43
SD_D0/XD_D0/MS_D0 MS-DATA1 XD-D6 SD_D7/XD_D7
12 44
SD_D2/XD_D2/MS_D2 MS-DATA0 XD-D7
14
XD_RE#/MS_INS# MS-DATA2
16
SD_D3/XD_D3/MS_D3 MS-INS
18
SD_WP/XD_CLE/MS_CLK R130 *short_4 MS_CLK_R MS-DATA3
20 36
MS-SCLK XD-GND1
1 46 1
C262 XD-GND2
6
MS-GND1
24
*10P/50V_4 MS-GND2

R013-P13-HM

Quanta Computer Inc.


SD_WP/XD_CLE/MS_CLK and MS_CLK_R trace length PROJECT : ZQZ
shorter , surround with GND.
Size Document Number Rev
AU6433 CardReader 1A

Date: Thursday, February 23, 2012 Sheet 15 of 32


A B C D E
5 4 3 2 1
LAN (LAN) 16
close Pin1
Arthorus AR8151
+3V_S5 U8 U11
X-TX1N 1 8 X-TX3N 1 8
R34 *short_8 +3V_LAN X-TX1P 1 8 X-TX3P 1 8
2 7 2 7
X-TX0N 2 7 X-TX2N 2 7
3 6 3 6
C46 C48 C36 C35 C45 X-TX0P 3 6 X-TX2P 3 6
4 5 4 5
4 5 4 5
4.7u/10V_6 *4.7u/10V_6 1u/6.3V_4 0.1u/10V_4 1000p/50V_4 *UCLAMP2512T.TCT *UCLAMP2512T.TCT
U2

1 22 AVDDH_REG C29 0.1u/10V_4


D {9,17} PCIE_RST#
PCIE_RST# 2
VDD33

PERSTn
AVDDH

CLKREQn/LED2
23 LED2 TP1
D
U9 U12
PCIE_WAKE# 3 24 DVDDL_REG C32 0.1u/10V_4
{8} PCIE_WAKE# WAKEn DVDDL TX1N TX3N
1 8 1 8
TP2 TX1P 1 8 TX3P 1 8
{8} PCIE_REQ_LAN# 4 25 2 7 2 7
CLKREQn SMCLK TX0N 2 7 TX2N 2 7
3 6 3 6
C34 0.1u/10V_4 +VDDCT 5
VDDCT
AR8151
5X5mm SMDATA
26 TP3 TX0P 4
3
4
6
5
5 TX2P 4
3
4
6
5
5

C33 1u/6.3V_4 AVDDL_REG 6 40-Pin QFN 27 *UCLAMP2512T.TCT *UCLAMP2512T.TCT


AVDDL_REG TESTMODE
C30 0.1u/10V_4 XTLO 7 28
XTLO TEST_RST
XTLI 8 29 PCIE_RXN0_LAN_C C37 0.1u/10V_4
XTLI TX_N PCIE_RXN0_LAN {3}
C26 1u/6.3V_4 AVDDH_REG 9 30 PCIE_RXP0_LAN_C C38 0.1u/10V_4
AVDDH_REG TX_P PCIE_RXP0_LAN {3}
C28 0.1u/10V_4 R32 2.37K/F_4 RBIAS 10 31 AVDDL_REG C39 0.1u/10V_4
RBIAS AVDDL
TX0P 11 32
TRXP0 REFCLK_N CLK_PCIE_LANN {9}
TX0N 12 33
TRXN0 REFCLK_P CLK_PCIE_LANP {9}
XTLI C25 0.1u/10V_4 AVDDL_REG 13 34 AVDDL_REG C40 0.1u/10V_4
NC/AVDDL AVDDL
R33 TX1P 14 35
TRXP1 RX_P PCIE_TXP0_LAN {3}
*1M/F_4 Y1 TX1N 15 36
XTLO TRXN1 RX_N PCIE_TXN0_LAN {3}
3 1
C24 0.1u/10V_4 AVDDH_REG 16 37 DVDDL_REG C41 1u/6.3V_4
C C31 C27 TX2P 17
NC/AVDDH

NC/TRXP2
DVDDL_REG

LED0
38 LAN_ACTLED# C42 0.1u/10V_4
C
4 2
15P/50V_4C 15P/50V_4C TX2N 18 39 LAN_LINKLED# +VDDCT
25MHZ NC/TRXN2 LED1
C23 0.1u/10V_4 AVDDL_REG 19 40 LX L33 4.7uH/1A_2X2
NC/AVDDL LX
20120109: TX3P 20 41 C336 C331 C335
NC/TRXP3 GND
Change C27 and C31 TX3N 21 4.7u/10V_6 0.1u/10V_4 1000p/50V_4
NC/TRXN3
from10P_4 to 15p_4
AR8151

RJ45(LAN)
CN7
TRANSFORMER(LAN) 20120113: 9
YELLOW_N
Close Transformer LAN_ACTLED# R186 220_8 LAN_ACT_LED_PWR 10
Change L31 P/N from CX08T601010 YELLOW_P
to CX8AG601003 GND2
14
AVDD_CEN BLM18AG601SN1D L31 X-TX0P 1 13
TX0P

TX1P
TX0N

TX1N

+VDDCT 0+ GND1
R187 X-TX0N 2
5.1K/F_4 X-TX1P 0-
3
1+
R188

R189

R190

R191

C312 1U/10V_4 X-TX2P 4


X-TX2N 2+
5
X-TX1N 2-
6
U10 X-TX3P 1- LANGND
7
3+
49.9/F_4

49.9/F_4

49.9/F_4

49.9/F_4

C316 0.1u/10V_4 1 24 X-TX3N 8


B C2 *1000p/50V_4
TX0P
TX0N
2
3
TCT1
TD1+
TD1-
MCT1
MX1+
MX1-
23
22
X-TX0P
X-TX0N
+3V_LAN 3-
B
LAN_N1 LAN_N2 LAN_LINKLED# 11
C1 0.1u/10V_4 R8 220_8 LAN_LNK_LED_PWR 12 GREEN_N
4 21
C309 C311 C313 C314 TX1P TCT2 MCT2 X-TX1P GREEN_P
5 20
C306 *1000p/50V_4 TX1N TD2+ MX2+ X-TX1N RJ45
6 19
0.1U/10V_4 *1000p/50V_4 0.1U/10V_4 *1000p/50V_4 TD2- MX2-
C318 0.1u/10V_4 7 18
TX2P TCT3 MCT3 X-TX2P
8 17
C308 *1000p/50V_4 TX2N TD3+ MX3+ X-TX2N
9 16
TD3- MX3-
C310 0.1u/10V_4 10 15
TX3P TCT4 MCT4 X-TX3P
11 14
C320 *1000p/50V_4 TX3N TD4+ MX4+ X-TX3N
12 13
TD4- MX4- LAN_ACTLED#
TX2P

TX3P
TX2N

TX3N

TRANSFORMER R196 *SHORT_8


LAN_LINKLED#
R192

R193

R194

R195

Delta LFE9276D-R (DB0ZY8LAN00) R3 R5 R6 R7


75/F_8 *75/F_8 *75/F_8 *75/F_8 20120111: LANGND
C307 C5
Change R196 footprint to 0805
49.9/F_4

49.9/F_4

49.9/F_4

49.9/F_4

20120111: *0.01u/25V_4 *0.01u/25V_4

LAN_N3 LAN_N4 modify surge solution


change D14 P/N from CY003100Z06
C315 C317 C319 C321
to CY231T20Z00
2

0.1U/10V_4 *1000p/50V_4 0.1U/10V_4 *1000p/50V_4 R4


D14
A 1M_8
C3 *SG@B88069X9231T203 A
220p/3KV_1808
1

Quanta Computer Inc.


LANGND
PROJECT : ZQZ
Size Document Number Rev
1A
LAN (AR8151)
Date: Thursday, February 23, 2012 Sheet 16 of 32

5 4 3 2 1
1 2 3 4 5 6 7 8

+3V +WL_VDD

MINI-CARD WLAN(MPC)
+3.3V: 1000mA
+3.3Vaux:330mA {21,24} BT_POWERON#
Check LED signal. (active high or low)

+WL_VDD
R428 NVA@0_8

C485 C490 C484 C488


17
10u/10V_8 0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4
+1.5V:500mA

2
Q25 R444 Q28 *VA@AO3413
10K_4
DTC144EUA +3VPCU 1 3

1 3BT_PWRON +1.5V
CN21 R460 +WL_1.5V

2
51 52 +WL_VDD C518
CL_RST1#_WLAN Reserved +3.3V *VA@47K_4 *VA@0.33u/10V_6 R425 *0_6
A TP94 49 50 A
R438 0_4 PCIE_RST#_C Reserved GND
{9,16} PCIE_RST# 47 48 +WL_1.5V
R436 0_4 PCLK_DEBUG_R Reserved +1.5V WLAN_OFF_R R454 *VA@0_4
{9} PCLK_DEBUG 45 46 WLAN_OFF {24}
Reserved LED_WPAN# R455 *VA@4.7K_4 C489 C487 C486
43 44 RF_LED# {22}
GND LED_WLAN# {24} IOAC_LANPWR# *1000P/50V_4 *0.1u/10V_4 *10u/6.3V_8
Ramp 0221: +WL_VDD 41
+3.3Vaux LED_WWAN#
42
39 40 R426 *10K_4 +3V
modify net name 37
+3.3Vaux GND
38
GND USB_D+ USBP7+ {8}
35 36 USBP7- R427 *300_4 C483 *15P/50V_4C
GND USB_D- USBP7- {8} +WL_VDD
{3} PCIE_TXP1 33 34
PETp0 GND
{3} PCIE_TXN1 31 32 PDAT_SMB {6,7,8,23}
PETn0 SMB_DATA
29 30 PCLK_SMB {6,7,8,23}
GND SMB_CLK
27 28 +WL_1.5V
GND +1.5V

5
25 26 U23
{3} PCIE_RXP1 PERp0 GND
{3} PCIE_RXN1 23 24 +WL_VDD 2 PLTRST# {9,15,24}
PERn0 +3.3Vaux PLTRST#_R
21 22 4
GND PERST#
19 20 RF_EN {24} 1 IOAC_RST# {24}
UIM_C4 W_DISABLE#
17 18
UIM_C8 GND *VA@TC7SH08FU

3
15 16 DEBUG_LFRAME# R429 0_4
GND UIM_VPP LPC_LFRAME# {9,24}
13 14 DEBUG_LAD3 R430 0_4 LPC_LAD3 {9,24}
{9} CLK_PCIE_WLANP REFCLK+ UIM_RESET
11 12 DEBUG_LAD2 R431 0_4 LPC_LAD2 {9,24} Debug
{9} CLK_PCIE_WLANN REFCLK- UIM_CLK
9 10 DEBUG_LAD1 R432 0_4 LPC_LAD1 {9,24} R456 *VA@0_4
PCIE_REQ_WLAN#_R GND UIM_DATA DEBUG_LAD0 R433 0_4 R457 NVA@0_4
7 8 LPC_LAD0 {9,24}
CLKREQ# UIM_PWR
5 6 +WL_1.5V
Reserved +1.5V
3 4

GND

GND
Reserved GND
{24} PCIE_WAKE#_WLAN_R 3 1 PCIE_WAKE#_WLAN 1 2 +WL_VDD
WAKE# +3.3V
MINI-CARD1

53

54
Q29
*DTC144EUA
Ramp 0221:
2

3 1 PCIE_REQ_WLAN#_R
{8} PCIE_REQ_WLAN# Add IOAC circuit
B B
+WL_VDD
Q30 Ramp 0221:
DTC144EUA
Add Q29, Q30, Add net PCIE_REQ_WLAN#_R, PCIE_WAKE#_WLAN_R
2

+WL_VDD

mSATA

C C

D D

Quanta Computer Inc.


PROJECT : ZQZ
Size Document Number Rev
MINI PCI-E card 1A
Date: Thursday, February 23, 2012 Sheet 17 of 32
1 2 3 4 5 6 7 8
1 2 3 4

CN16
SATA HDD
18
1 1
2 SATA_TXP0 {10}
3 SATA_TXN0 {10}
A 4 A
5 SATA_RXN0_C C432 .01u/16V_4
SATA_RXN0 {10}
6 SATA_RXP0_C C434 .01u/16V_4
SATA_RXP0 {10}
7
8
9
10
11
12
120mil +5V_HDD R405 *short_8 +5V
13
14 C454 C448 C447 C441 C445 C451
15 +
*100u/6.3V_3528
16 10u/6.3V_6 *0.1u/16V_4 *0.1u/16V_4 0.01u/25V_4 0.01u/25V_4
17
18
19 19

SATA HDD

B B

Q16
SATA ODD Zero Power (ODD) +15V +5V *AO6402A +5V_ODD
+5V
6
CN10 5 4 R318 0_8
GND14 14 2
+3VPCU 1 R319
GND1 1 22_8
2 SATA_TXP1 {10} R328

3
RXP

MOD_EN_5V
RXN 3 SATA_TXN1 {10} 2 1
4 R331 *100K
GND2

3
5 SATA_RXN1_C C150 .01u/16V_4 *100K
TXN SATA_RXN1 {10}

3
6 SATA_RXP1_C C138 .01u/16V_4
C TXP SATA_RXP1 {10} C
7

2
GND3 ODD_EN_Q 2
ODD_PLUGIN# {8}

1
ODD_EN_Q 2

3
8 ODD_PLUGIN# R322 *1K_4 {10} FCH_ODD_EN R324 *0_4 C365 Q17
DP +5V_ODD Q18 *0.1u/25V_6 *DMN601K-7
9 +5V_ODD

2
+5V *DMN601K-7
10

1
+5V C352 C353 C358 C360 C359 C357 R323 *0_4
+

11 {24} ODD_EN 2

1
RSVD
GND 12

1
13 *100u/6.3V_3528 10u/6.3V_6 *0.1u/16V_4 *0.1u/16V_4 0.01u/25V_4 0.01u/25V_4 Q19
GND *DMN601K-7
R327
15

1
GND15 *100K
C18534-11305-L

2
ODD_EJ_EC {24}
R459 *0_4
ODD_EJ {8}

R261 10K_4 +3V

D D

Ramp 0221:
Add R459 Quanta Computer Inc.
PROJECT : ZQZ
Size Document Number Rev
SATA-HDD/ODD/HOLE 1A
Date: Thursday, February 23, 2012 Sheet 18 of 32
1 2 3 4
5 4 3 2 1

FILT_1.65V LDO_OUT_3.3V

AUDIO CODEC C509


C504
C510 C507
AVDD_3.3 pin is output of
internal LDO. Do NOT connect
to external supply.
Codec(ADO) 19
1u/16V_6 0.1u/10V_4
10u/10V_8 0.1u/10V_4
3V_DVDD
Port Configuration
ADOGND
ADOGND
Notes:
C471 C506 C480
Port A: Headphone jack (jack shared with S/PDIF)
10u/10V_8 0.1u/10V_4 0.1u/10V_4
+5VA Port B: Internal MIC (mono or stereo)
D Port C: Microphone/LI/LO jack D

3V_DVDD Port D: Line Out jack (Optional)


Port E: Line In jack (Optional)
(3.3V or 1.5V) C514 C505 Port F: Not used.
10u/10V_8 0.1u/10V_4 Layout Note: Path from +5V to LPWR_5.0 and Port G: Internal stereo speakers
C499 R435 RPWR_5.0 must be very low resistance ( <0.01 ohms). Port J: Internal stereo digital mic (Optional)
C478 3V_DVDD 0.1/F_1206
1u/16V_6 0.1u/10V_4
Port H: S/PDIF (jack shared with headphone)
Place bypass caps very close to device.

C474 C498 R46 only needed if supply to VAUX_3.3 is


removed during system re-start. CLASSD_5V
10u/10V_8 0.1u/10V_4
FILT_1.8V
C496
R415 C464 C470 C492 C482 C493 C481
0.1u/10V_4
10u/10V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 10u/10V_8 10u/10V_8
10K_4

21
29

32

30

31

15

18

20
5

4
9
U21 3V_DVDD
C479 *22p/50V_4

CLASSDREF
FILT_1.8

VAUX_3.3

DVDD_3.3

FILT_1.65

AVDD_3.3

LPWR_5.0

RPWR_5.0
VDD_IO

AVDD_HP

AVDD_5V
R176 R175
11 5.1K/F_4 5.1K/F_4
{8} ACZ_RESET#_AUDIO RESET#
C467 *22p/50V_4
R410 *short_4 7 44 SENSEA R172 10K/F_4 MIC1_JD
{8} ACZ_BITCLK_AUDIO BIT_CLK SENSE_A MIC1_JD {20}
10 43 SENSEB R173 39.2K/F_4 HPOUT_JD
C {8} ACZ_SYNC_AUDIO SYNC SENSE_B HPOUT_JD {20} C
{8} ACZ_SDIN0 R418 33_4 8 R174 *20K/F_4 ADOGND
SDATA_IN
{8} ACZ_SDOUT_AUDIO 6 42
SDATA_OUT PORTF_R
41
PORTF_L
C468 *22p/50V_4 40 MIC2_R C494 2.2U/6.3V_6
PORTB_R MIC2_L C495 2.2U/6.3V_6 MIC2_INTL1
39
PORTB_L MIC2-VREFO
D21 38
R416 *short_4 B_BIAS
{8} SPKR
R420 *short_4 C477 0.1u/10V_4 13 37
PC_BEEP C_BIAS MIC1-VREFO {20}
36 MIC1-R {20}
PORTC_R
48 35 MIC1-L {20}
BAT54C C472 SPDIF PORTC_L

{24} PCBEEP_EC
R417 *short_4 R421 47
GPIO0/EAPD#
CX20584 PORTE_R
34
*100p/50V_4 SPK_MUTE# 46 33
10K_4 GPIO1/SPK_MUTE# PORTE_L
Modify 01/06 45
GPIO2/SPDIF2
28
PORTD_R
27
PORTD_L
1 26 HP-R {20}
DMIC_3/4 PORTA_R
2 25 HP-L {20}
C10 : net PCBEEP connects with U11 by 10k ohm for AC pulg in ,out function. DMIC_CLK0 PORTA_L
3
DMIC_1/2 AVEE
24
AVEE
23
FLY_N
EXT_MUTE#

22 C501 1u/16V_6
FLY_P

EP_GND
RIGHT+
C502 C503
RIGHT-
LEFT+

LEFT-

0.1u/10V_4 10u/10V_8
12

14

16

17

19

49
Modify 01/06
B 3V_DVDD +3V B
0.1A L29 L37 1A/120ohm_6
{20,24} AMP_MUTE# INSPKR+ {20}
1 2 1. The VDD_IO and VAUX_3.3 pins should be connected to same
L38 1A/120ohm_6 power supply domain as HDA bus controller so that the HDA controller
INSPKR- {20}
EMI FILTER CHIP HCB2012KF220T60(22 6A) Low Active
C301

C500

C475

L42 1A/120ohm_6 and codec bus interface will power-up at the same time. This will avoid
INSPKL+ {20}
SPK_MUTE# R424 *0_4 bus leakage issues if using HDA controller with bus pull-up strap
L39 1A/120ohm_6 options. See other FET option on this page if these supplies are not on
INSPKL- {20}
10u/10V_8

same domain as HDA controler.


1U/10V_4

0.1U/10V_4

change Part Number to IC OTHER(48P) CX20584-21Z(QFN)(AL020584001) 01/05


2. To support Wake-on-Jack, the codec VAUX_3.3 pin must be
change L48,L47,L35,L34 to CX08T601000 for EMI powered from a Standby supply.
02/15 REV:B
3. C309, C310, C311 are optional.
Do not install unless needed for EMI/SI.

Power (ADO) INT MIC array


DIGITAL ANALOG
R177 *SHORT_6 5/7 update the footprint name
+5V L49 EMI FILTER CHIP HCB2012KF220T60(22 6A) R178 *SHORT_6 R434
+5VA R409 *0_6 {13} MIC2_INTL1 MIC2_INTL1 MIC2-VREFO
U22 R414 *0_6
3 4 R446 *0_6 C497 2.2K_4
IN OUT R411 *0_6
2 R408 *SHORT_6 *22P/50V_4
GND R419 *SHORT_6
1 5 R442 *29.4K/F_4 C508 *1000P/50V_4
A SHDN SET C458 *1000P/50V_4 ADOGND
A
*G923-330T1UF
R441 + C512 C511
*10K/F_4
*10u/10V_3216 0.1u/10V_4 ADOGND
C513 C515 C463 0.1u/10V_4
+ Tied at one point only under
0.1u/10V_4 *10u/10V_3216 the codec or near the codec Quanta Computer Inc.
ADOGND