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5 4 3 2 1

MS-7509 VER 10 Title


Cover Sheet
Page
1
uATX(244mm X 200mm)
Block Diagram 2
D D

Device Map 3
CPU: Digitally signedGPIO
by Table 4
AMD AM2+ Socket940
fdsf Clock Distribution 5
System Chipset:
North Bridge --- / MCP78 DN: cn=fdsf, o=fsdfsd,
CPU:AM2+ 6,7,8,9

South Bridge --- NA ou=ffsdf, DDR2 DIMM(Dual Channel) 10,11,12


MCP78 13 ~ 19
OnBoard Chipset: email=fdfsd@fsdff,
LAN_ RTL8211BL/8201CL 20
Clock Gen:NA
c=US PCIE x 16 , x1 Slots. 21
AC'97 Codec:ALC888
C
LAN Chip: REL8211BL/8201CL
Date: 2009.10.10PCI Slot1 / 2 22 C

SIO:Fintek 882(with smart fan control-3/4 pin co-lay) 20:45:38 +07'00'VGA connect 23
FAN 24
Flash ROM:8MB SPI (SIO)
USB Conn. 25
Azalia Codec 26
Main Memory: SIO-F71882FG / TPM 27
DDRII* 2 (Dual Channel) KB/MS&COM1&LPT&Floppy Conn. 28
Expansion Slots: ACPI Power Controler-UPI 29
PCI Express (X16) Slot * 1 UPI 6103 System Regulators 30
PCI Express (X1) Slot * 1
VRM-ISL6566 31
B B

PCI Slot * 2
Front Panel 32
PWM: For EMI 33
Controller:ISL6566
BOM - Option Parts 34
ACPI: Power Delivery 35
UPI solution
Power Sequence 36
Other: History 37
FDD *1
SATA(SATA2-300MB/s) * 4
A
USB2.0 *8 (Rear*4 Front*4) A

COM PORT *1
LPT PORT *1
MICRO-START INT'L CO.,LTD.
Title
Cover Sheet
Size Document Number Rev
Custom MS-7059 10
Date: Friday, January 11, 2008 Sheet 1 of 37
5 4 3 2 1
5 4 3 2 1

AMD DDR400/533/667/800 UNBUFFERED DDR


CHANNEL_A DIMM2
VRM ISL6566CR
3-Phase PWM AM2+_940 DDRII 240-PIN DDRII

DDR400/533/667/800 UNBUFFERED DDR


CHANNEL_B DIMM1
D D
240-PIN DDRII
LINK0
HyperTransport LINK0
16x16
1G

nVIDIA
PCIE X16 PCIE X16

PCIE X1 PCIE X1
VGA VGA CON.

JPM381 PCIE X1

MCP78
C Rear port x 4 C

USB2.0

AC LINK Azalia CODEC


Front port x 4
ALC888(8CH)

SATA-II Link SATA-II Port


#1~2 #3~4

Giga LAN or10/100 LAN

PCI BUS

B B

PCI SLOT x2

LPC SPI SPI

TPM Pin SPI Pin SPI FLASH ROM


Fintek 882 Header Header 8M

KB & SERIAL FAN


FLOPPY LPT
MOUSE PORTS CONTROL
*1 *1 *1 *1

A A

MICRO-START INT'L CO.,LTD.


Title
Block Diagram
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 2 of 37
5 4 3 2 1
5 4 3 2 1

DDR DIMM Config. PCI Config.


DEVICE ADDRESS CLOCK DEVICE MCP1 INT Pin REQ#/GNT# IDSEL CLOCK
MEM_MA0_CLK_H0/L0 PCI_INT#X CPU VID TABLE
DIMM 2 PCI_REQ4#
10100000B MEM_MA0_CLK_H1/L1 PCI Slot 2 PCI_INT#Y AD25 PCI_CLKSLOT1
CH-A PCI_GNT4#
MEM_MA0_CLK_H2/L2 PCI_INT#Z VID VOLTAGE
(PCICLK1)
D
MEM_MB0_CLK_H0/L0 PCI_INT#W D

DIMM 1
10100001B MEM_MB0_CLK_H1/L1 PCI_INT#W
CH-B PCI_REQ3# 00000 1.5500V
MEM_MB0_CLK_H2/L2 PCI Slot 1 PCI_INT#X AD24 PCI_CLKSLOT2
PCI_GNT3# 00001 1.5250V
PCI_INT#Y
(PCICLK2) 00010 1.5000V
PCI_INT#Z 00011 1.4750V
00100 1.4500V
PCIE2_CLK
IEEE1394 00101 1.4250V
/PCIE2_CLK# 00110 1.4000V
00111 1.3750V
PCICLK_TPM 01000 1.3500V
USB TPM
Port DATA +/- OC# (PCICLK3) 01001 1.3250V
01010 1.3000V
C USB0- C
LAN_USB1 USB0+ OC#0 PCI_CLKIN 01011 1.2750V
USB1- Chipset
Rear
USB1+ (PCICLK4) 01100 1.2500V
01101 1.2250V
USB2-
I1394_USB1 USB2+ OC#1 01110 1.2000V
USB3-
USB3+ LPC LPC_PCLK 01111 1.1750V
10000 1.1500V
USB4-
JUSB1 USB4+ OC#2 10001 1.1250V
USB5-
USB5+ SIO SIO_PCLK 10010 1.1000V
10011 1.0750V
USB6-
Front JUSB2 USB6+ OC#3 10100 1.0500V
USB7-
USB7+ 10101 1.0250V

USB8-
PCI RESET DEVICE 10110 1.0000V
B USB8+ 10111 0.9750V B
USB9- MCP78
USB9+ 11000 0.9500V
OC#4 Signals Target 11001 0.9250V
USB10-
USB10+
~5 PCI_RESET0* PCISLOT1 11010 0.9000V
USB11-
USB11+ PCI_RESET1* PCISLOT2 11011 0.8750V
PCI_RESET2* MS6 11100 0.8500V
PCI_RESET3* 1394 11101 0.8250V
LPC_RESET* LPC/SIO 11110 0.8000V
11111 0.7750V

A A

MICRO-START INT'L CO.,LTD.


Title
Device Map
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 3 of 37
5 4 3 2 1
5 4 3 2 1

MCP78 GPIO TABLE SIO GPIO TABLE


PIN NAME FUNCTION GROUP PIN NAME FUNCTION
D D

THERMTRIP*/GPIO58 CPU_THERMTRIP* IRTX/GPIO42 --


PROCHOT*/GPIO20 PROCHOT* UART & SIR IRRX/GPIO43 --
GPIO17 --

MII_RXER/GPIO36 MII_RXER
MII_COL/GPIO13/MI2C_DATA MII_COL
MII_CRS/GPIO14/MI2C_CLK MII_CRS FANIN3/GPIO40 --
RGMII/MII_INTR*/GPIO35 Pull High 10K to 3VDUAL FAN_CTL3/GPIO41 --
RGMII/MII_PWRDWN*/GPIO37 -- PME#/GPIO25 PME#
MII_RESET*/GPIO12 MII_RESET* GPIO10/SPISLK/FININ4 SPI_SLK
Hardware Monitor GPIO11/SPI_CS0#/FAN_CTL4 SPI_CS0#
FPIO12/SPI_MISO/FANCTL1_1 SPI_MISO
DDC_CLK/GPIO17 DDC_CLK GPIO13/SPI_MOSI/BEEP SPI_MOSI
DDC_DATA/GPIO19 DDC_DATA GPIO14/FWH_DIS/WDTRST#/SPI_CS1# --

PCI_REQ2*/GPIO40.RS232_DSR* PCI_REQ2*
PCI_REQ3*/GPIO38/RS232_CTS* Pull High 10K to 3VDUAL GPIO15/LED_VSB/ALERT# SUS_LED
PCI_GNT2*/GPIO41/RS232_DTR* PCI_GNT2* GPIO16/LED_VCC/Turbo2# PWR_LED
PCI_GNT3*/GPIO39/RS232_RTS* -- PCIRST1#/GPIO20 --
PCI_PERR*/GPIO43/RS232_DCD* PCI_PERR* PCIRST2#/GPIO21 --
PCI_PME*/GPIO30 PCI_PME* PCIRST3#/GPIO22 --
LPC_PWRDWN*/GPIO54/EXT_NMI* -- GPIO23/RSTCON# --
LPC_DRQ0*/GPIO50 LPC_DRQ0* ACPI Function Pins ATXPG_IN/GPIO24 ATXPG_IN
LPC_DRQ1*/GPIO15/FANRPM1 -- PWROK/GPIO32 --
C C
PWSIN#/GPIO26 PWSIN#
PWSOUT#/GPIO27 PWSOUT#
CABLE_DET_P/GPIO63 CABLE_DET_P S3#/GPIO30 S3#
SATE_LED*/GPIO57 SATE_LED* PSON#/GPIO31 PSON#
RSMRST#/GPIO33 --

HDA_SDATA_OUT0/GPIO45 HDA_SDATA_OUT
HDA_SDATA_IN0/GPIO22 HDA_SDATA_IN0
HDA_SDATA_IN1/GPIO23/MGPIO0 -- VIDOUT0/GPIO0 VIDOUT0
HDA_SYNC/GPIO44 HDA_SYNC VIDOUT1/GPIO1 VIDOUT1
GPIO_1 -- VIDOUT2/GPIO2 VIDOUT2
GPIO_2/NMI*/PS2_CLK0 -- VIDOUT3/GPIO3 VIDOUT3
GPIO_3/SMI*/PS2_DATA0 -- VID Controller VIDOUT4/GPIO4 VIDOUT4
GPIO_4/SCI_INTR/PS2_CLK1 -- VIDOUT5/GPIO5/SIC SIC
GPIO_5/INIT*/PS2_DATA2 -- SLOTOCC#/GPIO6 SLOTOCC#
GPIO_6/FERR*/SYS_FERR* -- GPIO7/Turbo1#/WDTRST# --
GPIO_7/NFERR*/SYS_PERR* --
GPIO_8/SPI_DI --
GPIO_9/SPI_DO --
GPIO_10/SPI_CS --
GPIO_11/SPI_CLK --
USB_OC0*/GPIO25 USB_Rear_1_0OC*
USB_OC1*/GPIO26 USB_Rear_3_2OC*
USB_OC2*/GPIO27 USB_FNTPNL_5_4OC*
USB_OC3*/GPIO28/MGPIO_1 USB_FNTPNL_7_6OC*
USB_OC4*/GPIO29 Pull High 10K to 3VDUAL(USB not USE)
A20GATE/GPIO55 AGATE20
B B
EXT_SMI*/GPIO32 EXT_SMI*
RI*/GPIO33 G3 TO S5 POEWR CONTROL
SIO_PME*/GPIO31 SIO_PME*
KBRDRSTIN*/GPIO56 SIO_KBRST*
SUS_CLK/GPIO34 --
THERM*/GPIO59 THERM*
FANRPM0/GPIO60 --
FANCTL0/GPIO61 --
FANCTL1/GPIO62 --
THERM_SIC/GPIO48 Internal 10K pull-up to vcc3
THERM_SID0/GPIO49 --
PE_WAKE*/GPIO21 PE_WAKE*

A A

MICRO-START INT'L CO.,LTD.


Title
GPIO Table
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 4 of 37
5 4 3 2 1
5 4 3 2 1

AMD

DIMM1-CHA
AM2+/AM2
3 PAIR MEM CLK
MEMORY_A0_CLK[2:0]
MEMORY_A0_CLK[2:0]#

HT_CPU_RXCLK[1:0]#
HT_CPU_RXCLK[1:0] Dual Chanel
D D

HT_CPU_TXCLK[1:0]

DIMM2-CHB
HT_CPU_TXCLK[1:0]#

MEMORY_B0_CLK[2:0] 3 PAIR MEM CLK


MEMORY_B0_CLK[2:0]#
CPUCLK_IN
CPUCLK_IN#

NVIDIA
CLKOUT_200MHZ
CLKOUT_200MHZ# PE0_REFCLK
PE0_REFCLK# PEX_X16

C HT_CPU_TXCLK[1:0]
HT_CPU_TXCLK[1:0]#
PE1_REFCLK
PE1_REFCLK# PEX_X1 C

HT_CPU_RXCLK[1:0]
HT_CPU_RXCLK[1:0]#

BUF_SIO
24MHZ
SIO SPI ROM
SPI_CLK
SIO_PCLK
SPI_CLK #1
LPC_CLK0 PCICLK
MCP78

PCI_CLK0

PCICLK_SLOT1
PCI_CLK1 PCI_SLOT1

PCICLK_SLOT2
B
PCI_CLK2 PCI_SLOT2 B

PCI_CLK3 PCICLK_TPM

PCI_CLK4

PCI_CLKIN

LPC_PCLK
LPC_CLK1 LPC
HEADER

HDA
HDA_BITCLK CODEC
HDA_BITCLK HDA_BITCLK

32.768 KHZ RTC_XTAL


LAN
MII_TXCLK PHY
A MII_TXCLK MII_TXCLK A

XTAL_IN MII_RXCLK
25 MHZ MII_RXCLK MII_RXCLK
XTAL_OUT BUF_25MHZ
BUF_25MHZ BUF_25MHZ
MICRO-START INT'L CO.,LTD.
Title
Clock Distribution
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 5 of 37
5 4 3 2 1
5 4 3 2 1

CP2 VDDA25 VCC_DDR


VDDA_25 X_CP003

VDDA25
L1
VCC_DDR X_80L2A-100_0805-RH R83 300R0402
RN4
1 2 CPU_THRIP#
3 4 LDT_RST# C71 C3900p50X C52 C51 C49 CPU1D R55 R56
13 CPUCLKO_H
5 6 CPU_GD C10u10X50805-RH X_C1u16X X_C3300p50X0402 MISC 1KR0402 1KR0402
7 8 LDTSTOP# Layout : Place R63 C10
R63 VDDA1
within 0.5 inch of CPU D10 VDDA2
8P4R-300R-RH 169R1%0402
CADIP[0..15] CPUCLKIN_H A8 TP1
13 CADIP[0..15] CLKIN_H
C73 C3900p50X CPUCLKIN_L B8
CADIN[0..15] 13 CPUCLKO_L CLKIN_L
D
13 CADIN[0..15] VCC_DDR
5/5/20 D
CPU_GD C9 D2 CPUVID5 R72 X_0R0402
CADOP[0..15] 13,31 CPU_GD PWROK VID(5)
LDTSTOP# D8 D1 CPUVID4
13 CADOP[0..15] 13 LDTSTOP# LDTSTOP_L VID(4) CPUVID4 31
LDT_RST# C7 C1 CPUVID3
CADON[0..15] 13 LDT_RST# RESET_L VID(3) CPUVID3 31
E3 CPUVID2
13 CADON[0..15] VID(2) CPUVID2 31
R123 R124 VCC_DDR R127 1KR0402 CPU_PRESENT_L AL3 E2 CPUVID1
CPU_PRESENT_L VID(1) CPUVID1 31
CPU1A 300R0402 300R0402 E1 CPUVID0
VID(0) CPUVID0 31
HYPERTRANSPORT
N6 AD5 THERMAL_SIC AL6 AK7 CPU_THRIP#
13 CLKIP1 L0_CLKIN_H(1) L0_CLKOUT_H(1) CLKOP1 13 SIC THERMTRIP_L CPU_THRIP# 13
P6 AD4 THERMAL_SID AK6 AL7 PROCHOT#
13 CLKIN1 L0_CLKIN_L(1) L0_CLKOUT_L(1) CLKON1 13 SID PROCHOT_L PROCHOT# 13
13 CLKIP0 N3
L0_CLKIN_H(0) L0_CLKOUT_H(0)
AD1 CLKOP0 13 5/10/10 5/10/10
N2 AC1 If SI is not used,the SID TP22 CPU_TDI AL10 AK10 CPU_TDO TP20 NEAR CPU 5/10/10
13 CLKIN0 L0_CLKIN_L(0) L0_CLKOUT_L(0) CLKON0 13 TDI TDO
pin can be left unconnector TP17 CPU_TRST_L AJ10
CTLIP1 CTLOP1 R128 TP14 CPU_TCK TRST_L
13 CTLIP1 V4 Y6 CTLOP1 13 AH10
CTLIN1 V5
L0_CTLIN_H(1) L0_CTLOUT_H(1)
W6 CTLON1 and SIC should have a 300 X_300R0402 TP21 CPU_TMS AL9
TCK
13 CTLIN1 L0_CTLIN_L(1) L0_CTLOUT_L(1) CTLON1 13 ohm pulldown to VSS TMS
13 CTLIP0 U1 W2 CTLOP0 13
L0_CTLIN_H(0) L0_CTLOUT_H(0) R354 300R0402 CPU_DBREQ_L CPU_DBRDY TP6
13 CTLIN0 V1 W3 CTLON0 13 VCC_DDR A5 B6
L0_CTLIN_L(0) L0_CTLOUT_L(0) DBREQ_L DBRDY
16 mil
CADIP15 U6 Y5 CADOP15 VCC_DDR COREFB_H G2 AK11 CPU_VDDIOFB_H CP20
L0_CADIN_H(15) L0_CADOUT_H(15) 31 COREFB_H VDD_FB_H VDDIO_FB_H CPU_VDDIOFB_H 30
CADIN15 V6 Y4 CADON15 10/5/10 COREFB_L G1 AL11 CPU_VDDIOFB_L
L0_CADIN_L(15) L0_CADOUT_L(15) 31 COREFB_L VDD_FB_L VDDIO_FB_L
CADIP14 T4 AB6 CADOP14 Layout : Place
CADIN14 L0_CADIN_H(14) L0_CADOUT_H(14) CADON14 TP10 CPU_VTT_SENSE CPU_PSI_L TP2
T5 AA6 E12 F1 with in 1 inch
CADIP13 L0_CADIN_L(14) L0_CADOUT_L(14) CADOP13 R126 VTT_SENSE PSI_L
R6 AB5
CADIN13 L0_CADIN_H(13) L0_CADOUT_H(13) CADON13 39.2R1%0402 VCC1_2HT
T6 AB4
CADIP12 L0_CADIN_L(13) L0_CADOUT_L(13) CADOP12 CPU_M_VREF HTREF1 R130 44.2R1%
P4 AD6 F12 V8
CADIN12 L0_CADIN_H(12) L0_CADOUT_H(12) CADON12 MEMZN M_VREF HTREF1 HTREF0 R132 44.2R1%
P5 AC6 AH11 V7
CADIP11 L0_CADIN_L(12) L0_CADOUT_L(12) CADOP11 MEMZP M_ZN HTREF0
M4 AF6 AJ11
CADIN11 L0_CADIN_H(11) L0_CADOUT_H(11) CADON11 M_ZP
M5 AE6
CADIP10 L0_CADIN_L(11) L0_CADOUT_L(11) CADOP10 R66 510R0402 CPU_TEST25_H R64 80.6R1%0402 C171 C176
L6
L0_CADIN_H(10) L0_CADOUT_H(10)
AF5 VCC_DDR A10
TEST25_H TEST29_H
C11 Layout :
CADIN10 M6 AF4 CADON10 R129 R65 510R0402 CPU_TEST25_L B10 D11 C1000p50X0402 C1000p50X0402
CADIP9 L0_CADIN_L(10) L0_CADOUT_L(10) CADOP9 39.2R1%0402 R53 300R0402 TEST25_L TEST29_L
K4
L0_CADIN_H(9) L0_CADOUT_H(9)
AH6 F10
TEST19
1. Place R22
CADIN9 K5 AG6 CADON9 R54 300R0402 E9 8/5/20
within 0.5 inch
CADIP8 L0_CADIN_L(9) L0_CADOUT_L(9) CADOP8 TEST18
J6 AH5 AJ7
CADIN8 L0_CADIN_H(8) L0_CADOUT_H(8) CADON8 TEST13
K6 AH4 F6
L0_CADIN_L(8) L0_CADOUT_L(8) TEST9
C C
CADIP7 U3 Y1 CADOP7 TP8 D6 AK8 TP19
CADIN7 L0_CADIN_H(7) L0_CADOUT_H(7) CADON7 VCC_DDR TP9 TEST17 TEST24 TP13
U2 W1 E7 AH8
CADIP6 L0_CADIN_L(7) L0_CADOUT_L(7) CADOP6 TP12 TEST16 TEST23
R1 AA2 F8 AJ9
CADIN6 L0_CADIN_H(6) L0_CADOUT_H(6) CADON6 TP7 TEST15 TEST22
T1 AA3 C5 AL8
CADIP5 L0_CADIN_L(6) L0_CADOUT_L(6) CADOP5 TP15 TEST14 TEST21 TP18
R3 AB1 AH9 AJ8
CADIN5 L0_CADIN_H(5) L0_CADOUT_H(5) CADON5 R49 TEST12 TEST20
R2 AA1
CADIP4 L0_CADIN_L(5) L0_CADOUT_L(5) CADOP4 15R1%0805 R125 R191
CADIN4
N1
P1
L0_CADIN_H(4) L0_CADOUT_H(4)
AC2
AC3 CADON4
15 mils E5
AJ5
TEST7 TEST28_H
J10
H9 VCC_DDR 300R0402 300R0402
CADIP3 L0_CADIN_L(4) L0_CADOUT_L(4) CADOP3 CPU_M_VREF TEST6 TEST28_L
L1 AE2 27 THERMDC_CPU AG9 AK9
CADIN3 L0_CADIN_H(3) L0_CADOUT_H(3) CADON3 TEST5 TEST27 R122 300R0402
M1 AE3 27 THERMDA_CPU AG8 AK5
CADIP2 L0_CADIN_L(3) L0_CADOUT_L(3) CADOP2 TEST4 TEST26
L3
L0_CADIN_H(2) L0_CADOUT_H(2)
AF1 AH7
TEST3 TEST10
G7 As the SIC and SID are not
CADIN2 L2 AE1 CADON2 R62 C66 C62 AJ6 D4
CADIP1 J1
L0_CADIN_L(2) L0_CADOUT_L(2)
AG2 CADOP1 15R1%0805 C0.1u16Y0402 C1000p50X0402 TEST2 TEST8 recommended to use for the rev. F processors.
CADIN1 L0_CADIN_H(1) L0_CADOUT_H(1) CADON1
K1
L0_CADIN_L(1) L0_CADOUT_L(1)
AG3 for NV Stuff R557 , R559
CADIP0 J3 AH1 CADOP0
CADIN0 J2
L0_CADIN_H(0) L0_CADOUT_H(0)
AG1 CADON0 N12-9400050-F02 for SIO Stuff R558 , R560
L0_CADIN_L(0) L0_CADOUT_L(0)
5/10/10
THERMAL_SIC
27 THERMAL_SIC
N12-9400050-F02

THERMAL_SID
27 THERMAL_SID

VCC5 U4 VDDA_25
LT1087S_SOT89
3 VIN VOUT 2

ADJ
B C64 C59 C53 B
C0.1U25Y C0.1U16Y0402 C10U10Y0805
R48

1
200R1%0402

R47
200R1%0402

A A

MICRO-START INT'L CO.,LTD.


Title
CPU-HT & Straps
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 6 of 37
5 4 3 2 1
5 4 3 2 1

CPU1B CPU1C
MEM_MA_DATA[63..0] 10 MEM_MB_DATA[63..0] 10
MEMORY INTERFACE A MEMORY INTERFACE B
MEM_MA0_CLK_H2 AG21 AE14 MEM_MA_DATA63 MEM_MB0_CLK_H2 AJ19 AH13 MEM_MB_DATA63
D 10,12 MEM_MA0_CLK_H2 MA0_CLK_H(2) MA_DATA(63) 10,12 MEM_MB0_CLK_H2 MB0_CLK_H(2) MB_DATA(63) D
MEM_MA0_CLK_L2 AG20 AG14 MEM_MA_DATA62 MEM_MB0_CLK_L2 AK19 AL13 MEM_MB_DATA62
10,12 MEM_MA0_CLK_L2 MA0_CLK_L(2) MA_DATA(62) 10,12 MEM_MB0_CLK_L2 MB0_CLK_L(2) MB_DATA(62)
MEM_MA0_CLK_H1 G19 AG16 MEM_MA_DATA61 MEM_MB0_CLK_H1 A18 AL15 MEM_MB_DATA61
10,12 MEM_MA0_CLK_H1 MA0_CLK_H(1) MA_DATA(61) 10,12 MEM_MB0_CLK_H1 MB0_CLK_H(1) MB_DATA(61)
MEM_MA0_CLK_L1 H19 AD17 MEM_MA_DATA60 MEM_MB0_CLK_L1 A19 AJ15 MEM_MB_DATA60
10,12 MEM_MA0_CLK_L1 MA0_CLK_L(1) MA_DATA(60) 10,12 MEM_MB0_CLK_L1 MB0_CLK_L(1) MB_DATA(60)
MEM_MA0_CLK_H0 U27 AD13 MEM_MA_DATA59 MEM_MB0_CLK_H0 U31 AF13 MEM_MB_DATA59
10,12 MEM_MA0_CLK_H0 MA0_CLK_H(0) MA_DATA(59) 10,12 MEM_MB0_CLK_H0 MB0_CLK_H(0) MB_DATA(59)
MEM_MA0_CLK_L0 U26 AE13 MEM_MA_DATA58 MEM_MB0_CLK_L0 U30 AG13 MEM_MB_DATA58
10,12 MEM_MA0_CLK_L0 MA0_CLK_L(0) MA_DATA(58) 10,12 MEM_MB0_CLK_L0 MB0_CLK_L(0) MB_DATA(58)
AG15 MEM_MA_DATA57 AL14 MEM_MB_DATA57
MEM_MA0_CS_L1 MA_DATA(57) MEM_MA_DATA56 MEM_MB0_CS_L1 MB_DATA(57) MEM_MB_DATA56
10,12 MEM_MA0_CS_L1 AC25 AE16 10,12 MEM_MB0_CS_L1 AE30 AK15
MEM_MA0_CS_L0 MA0_CS_L(1) MA_DATA(56) MEM_MA_DATA55 MEM_MB0_CS_L0 MB0_CS_L(1) MB_DATA(56) MEM_MB_DATA55
10,12 MEM_MA0_CS_L0 AA24 AG17 10,12 MEM_MB0_CS_L0 AC31 AL16
MA0_CS_L(0) MA_DATA(55) MEM_MA_DATA54 MB0_CS_L(0) MB_DATA(55) MEM_MB_DATA54
AE18 AL17
MEM_MA0_ODT0 MA_DATA(54) MEM_MA_DATA53 MEM_MB0_ODT0 MB_DATA(54) MEM_MB_DATA53
10,12 MEM_MA0_ODT0 AC28 AD21 10,12 MEM_MB0_ODT0 AD29 AK21
MA0_ODT(0) MA_DATA(53) MEM_MA_DATA52 MB0_ODT(0) MB_DATA(53) MEM_MB_DATA52
AG22 AL21
MA_DATA(52) MEM_MA_DATA51 MB_DATA(52) MEM_MB_DATA51
AE20 AE17 AL19 AH15
MA1_CLK_H(2) MA_DATA(51) MEM_MA_DATA50 MB1_CLK_H(2) MB_DATA(51) MEM_MB_DATA50
AE19 AF17 AL18 AJ16
MA1_CLK_L(2) MA_DATA(50) MEM_MA_DATA49 MB1_CLK_L(2) MB_DATA(50) MEM_MB_DATA49
G20 AF21 C19 AH19
MA1_CLK_H(1) MA_DATA(49) MEM_MA_DATA48 MB1_CLK_H(1) MB_DATA(49) MEM_MB_DATA48
G21 AE21 D19 AL20
MA1_CLK_L(1) MA_DATA(48) MEM_MA_DATA47 MB1_CLK_L(1) MB_DATA(48) MEM_MB_DATA47
V27 AF23 W29 AJ22
MA1_CLK_H(0) MA_DATA(47) MEM_MA_DATA46 MB1_CLK_H(0) MB_DATA(47) MEM_MB_DATA46
W27 AE23 W28 AL22
MA1_CLK_L(0) MA_DATA(46) MEM_MA_DATA45 MB1_CLK_L(0) MB_DATA(46) MEM_MB_DATA45
AJ26 AL24
MA_DATA(45) MEM_MA_DATA44 MB_DATA(45) MEM_MB_DATA44
AD27 AG26 AE29 AK25
MA1_CS_L(1) MA_DATA(44) MEM_MA_DATA43 MB1_CS_L(1) MB_DATA(44) MEM_MB_DATA43
AA25 AE22 AB31 AJ21
MA1_CS_L(0) MA_DATA(43) MEM_MA_DATA42 MB1_CS_L(0) MB_DATA(43) MEM_MB_DATA42
AG23 AH21
MA_DATA(42) MEM_MA_DATA41 MB_DATA(42) MEM_MB_DATA41
AC27 AH25 AD31 AH23
MA1_ODT(0) MA_DATA(41) MEM_MA_DATA40 MB1_ODT(0) MB_DATA(41) MEM_MB_DATA40
AF25 AJ24
MA_DATA(40) MEM_MA_DATA39 MB_DATA(40) MEM_MB_DATA39
AJ28 AL27
MEM_MA_CAS_L MA_DATA(39) MEM_MA_DATA38 MEM_MB_CAS_L MB_DATA(39) MEM_MB_DATA38
10,12 MEM_MA_CAS_L AB25 AJ29 10,12 MEM_MB_CAS_L AC29 AK27
MEM_MA_WE_L MA_CAS_L MA_DATA(38) MEM_MA_DATA37 MEM_MB_WE_L MB_CAS_L MB_DATA(38) MEM_MB_DATA37
10,12 MEM_MA_WE_L AB27 AF29 10,12 MEM_MB_WE_L AC30 AH31
MEM_MA_RAS_L MA_WE_L MA_DATA(37) MEM_MA_DATA36 MEM_MB_RAS_L MB_WE_L MB_DATA(37) MEM_MB_DATA36
10,12 MEM_MA_RAS_L AA26 AE26 10,12 MEM_MB_RAS_L AB29 AG30
MA_RAS_L MA_DATA(36) MEM_MA_DATA35 MB_RAS_L MB_DATA(36) MEM_MB_DATA35
AJ27 AL25
MEM_MA_BANK2 MA_DATA(35) MEM_MA_DATA34 MEM_MB_BANK2 MB_DATA(35) MEM_MB_DATA34
10,12 MEM_MA_BANK2 N25 AH27 10,12 MEM_MB_BANK2 N31 AL26
C MEM_MA_BANK1 MA_BANK(2) MA_DATA(34) MEM_MA_DATA33 MEM_MB_BANK1 MB_BANK(2) MB_DATA(34) MEM_MB_DATA33 C
10,12 MEM_MA_BANK1 Y27 AG29 10,12 MEM_MB_BANK1 AA31 AJ30
MEM_MA_BANK0 MA_BANK(1) MA_DATA(33) MEM_MA_DATA32 MEM_MB_BANK0 MB_BANK(1) MB_DATA(33) MEM_MB_DATA32
10,12 MEM_MA_BANK0 AA27 AF27 10,12 MEM_MB_BANK0 AA28 AJ31
MA_BANK(0) MA_DATA(32) MEM_MA_DATA31 MB_BANK(0) MB_DATA(32) MEM_MB_DATA31
E29 E31
MA_DATA(31) MEM_MA_DATA30 MB_DATA(31) MEM_MB_DATA30
L27 E28 M31 E30
MEM_MA_CKE0 MA_CKE(1) MA_DATA(30) MEM_MA_DATA29 MEM_MB_CKE0 MB_CKE(1) MB_DATA(30) MEM_MB_DATA29
10,12 MEM_MA_CKE0 M25 D27 10,12 MEM_MB_CKE0 M29 B27
MA_CKE(0) MA_DATA(29) MEM_MA_DATA28 MB_CKE(0) MB_DATA(29) MEM_MB_DATA28
C27 A27
MEM_MA_ADD15 MA_DATA(28) MEM_MA_DATA27 MEM_MB_ADD15 MB_DATA(28) MEM_MB_DATA27
10,12 MEM_MA_ADD[15..0] M27 G26 10,12 MEM_MB_ADD[15..0] N28 F29
MEM_MA_ADD14 MA_ADD(15) MA_DATA(27) MEM_MA_DATA26 MEM_MB_ADD14 MB_ADD(15) MB_DATA(27) MEM_MB_DATA26
N24 F27 N29 F31
MEM_MA_ADD13 MA_ADD(14) MA_DATA(26) MEM_MA_DATA25 MEM_MB_ADD13 MB_ADD(14) MB_DATA(26) MEM_MB_DATA25
AC26 C28 AE31 A29
MEM_MA_ADD12 MA_ADD(13) MA_DATA(25) MEM_MA_DATA24 MEM_MB_ADD12 MB_ADD(13) MB_DATA(25) MEM_MB_DATA24
N26 E27 N30 A28
MEM_MA_ADD11 MA_ADD(12) MA_DATA(24) MEM_MA_DATA23 MEM_MB_ADD11 MB_ADD(12) MB_DATA(24) MEM_MB_DATA23
P25 F25 P29 A25
MEM_MA_ADD10 MA_ADD(11) MA_DATA(23) MEM_MA_DATA22 MEM_MB_ADD10 MB_ADD(11) MB_DATA(23) MEM_MB_DATA22
Y25 E25 AA29 A24
MEM_MA_ADD9 MA_ADD(10) MA_DATA(22) MEM_MA_DATA21 MEM_MB_ADD9 MB_ADD(10) MB_DATA(22) MEM_MB_DATA21
N27 E23 P31 C22
MEM_MA_ADD8 MA_ADD(9) MA_DATA(21) MEM_MA_DATA20 MEM_MB_ADD8 MB_ADD(9) MB_DATA(21) MEM_MB_DATA20
R24 D23 R29 D21
MEM_MA_ADD7 MA_ADD(8) MA_DATA(20) MEM_MA_DATA19 MEM_MB_ADD7 MB_ADD(8) MB_DATA(20) MEM_MB_DATA19
P27 E26 R28 A26
MEM_MA_ADD6 MA_ADD(7) MA_DATA(19) MEM_MA_DATA18 MEM_MB_ADD6 MB_ADD(7) MB_DATA(19) MEM_MB_DATA18
R25 C26 R31 B25
MEM_MA_ADD5 MA_ADD(6) MA_DATA(18) MEM_MA_DATA17 MEM_MB_ADD5 MB_ADD(6) MB_DATA(18) MEM_MB_DATA17
R26 G23 R30 B23
MEM_MA_ADD4 MA_ADD(5) MA_DATA(17) MEM_MA_DATA16 MEM_MB_ADD4 MB_ADD(5) MB_DATA(17) MEM_MB_DATA16
R27 F23 T31 A22
MEM_MA_ADD3 MA_ADD(4) MA_DATA(16) MEM_MA_DATA15 MEM_MB_ADD3 MB_ADD(4) MB_DATA(16) MEM_MB_DATA15
T25 E22 T29 B21
MEM_MA_ADD2 MA_ADD(3) MA_DATA(15) MEM_MA_DATA14 MEM_MB_ADD2 MB_ADD(3) MB_DATA(15) MEM_MB_DATA14
U25 E21 U29 A20
MEM_MA_ADD1 MA_ADD(2) MA_DATA(14) MEM_MA_DATA13 MEM_MB_ADD1 MB_ADD(2) MB_DATA(14) MEM_MB_DATA13
T27 F17 U28 C16
MEM_MA_ADD0 MA_ADD(1) MA_DATA(13) MEM_MA_DATA12 MEM_MB_ADD0 MB_ADD(1) MB_DATA(13) MEM_MB_DATA12
W24 G17 AA30 D15
MA_ADD(0) MA_DATA(12) MEM_MA_DATA11 MB_ADD(0) MB_DATA(12) MEM_MB_DATA11
G22 C21
MEM_MA_DQS_H7 MA_DATA(11) MEM_MA_DATA10 MEM_MB_DQS_H7 MB_DATA(11) MEM_MB_DATA10
10 MEM_MA_DQS_H7 AD15 F21 10 MEM_MB_DQS_H7 AK13 A21
MEM_MA_DQS_L7 MA_DQS_H(7) MA_DATA(10) MEM_MA_DATA9 MEM_MB_DQS_L7 MB_DQS_H(7) MB_DATA(10) MEM_MB_DATA9
10 MEM_MA_DQS_L7 AE15 G18 10 MEM_MB_DQS_L7 AJ13 A17
MEM_MA_DQS_H6 MA_DQS_L(7) MA_DATA(9) MEM_MA_DATA8 MEM_MB_DQS_H6 MB_DQS_L(7) MB_DATA(9) MEM_MB_DATA8
10 MEM_MA_DQS_H6 AG18 E17 10 MEM_MB_DQS_H6 AK17 A16
MEM_MA_DQS_L6 MA_DQS_H(6) MA_DATA(8) MEM_MA_DATA7 MEM_MB_DQS_L6 MB_DQS_H(6) MB_DATA(8) MEM_MB_DATA7
10 MEM_MA_DQS_L6 AG19 G16 10 MEM_MB_DQS_L6 AJ17 B15
MEM_MA_DQS_H5 MA_DQS_L(6) MA_DATA(7) MEM_MA_DATA6 MEM_MB_DQS_H5 MB_DQS_L(6) MB_DATA(7) MEM_MB_DATA6
10 MEM_MA_DQS_H5 AG24 E15 10 MEM_MB_DQS_H5 AK23 A14
MEM_MA_DQS_L5 MA_DQS_H(5) MA_DATA(6) MEM_MA_DATA5 MEM_MB_DQS_L5 MB_DQS_H(5) MB_DATA(6) MEM_MB_DATA5
10 MEM_MA_DQS_L5 AG25 G13 10 MEM_MB_DQS_L5 AL23 E13
MEM_MA_DQS_H4 MA_DQS_L(5) MA_DATA(5) MEM_MA_DATA4 MEM_MB_DQS_H4 MB_DQS_L(5) MB_DATA(5) MEM_MB_DATA4
10 MEM_MA_DQS_H4 AG27 H13 10 MEM_MB_DQS_H4 AL28 F13
B
MEM_MA_DQS_L4 MA_DQS_H(4) MA_DATA(4) MEM_MA_DATA3 MEM_MB_DQS_L4 MB_DQS_H(4) MB_DATA(4) MEM_MB_DATA3
B
10 MEM_MA_DQS_L4 AG28 H17 10 MEM_MB_DQS_L4 AL29 C15
MEM_MA_DQS_H3 MA_DQS_L(4) MA_DATA(3) MEM_MA_DATA2 MEM_MB_DQS_H3 MB_DQS_L(4) MB_DATA(3) MEM_MB_DATA2
10 MEM_MA_DQS_H3 D29 E16 10 MEM_MB_DQS_H3 D31 A15
MEM_MA_DQS_L3 MA_DQS_H(3) MA_DATA(2) MEM_MA_DATA1 MEM_MB_DQS_L3 MB_DQS_H(3) MB_DATA(2) MEM_MB_DATA1
10 MEM_MA_DQS_L3 C29 E14 10 MEM_MB_DQS_L3 C31 A13
MEM_MA_DQS_H2 MA_DQS_L(3) MA_DATA(1) MEM_MA_DATA0 MEM_MB_DQS_H2 MB_DQS_L(3) MB_DATA(1) MEM_MB_DATA0
10 MEM_MA_DQS_H2 C25 G14 10 MEM_MB_DQS_H2 C24 D13
MEM_MA_DQS_L2 MA_DQS_H(2) MA_DATA(0) MEM_MB_DQS_L2 MB_DQS_H(2) MB_DATA(0)
10 MEM_MA_DQS_L2 D25 10 MEM_MB_DQS_L2 C23
MEM_MA_DQS_H1 MA_DQS_L(2) MEM_MB_DQS_H1 MB_DQS_L(2)
10 MEM_MA_DQS_H1 E19 J28 10 MEM_MB_DQS_H1 D17 J31
MEM_MA_DQS_L1 MA_DQS_H(1) MA_DQS_H(8) MEM_MB_DQS_L1 MB_DQS_H(1) MB_DQS_H(8)
10 MEM_MA_DQS_L1 F19 J27 10 MEM_MB_DQS_L1 C17 J30
MEM_MA_DQS_H0 MA_DQS_L(1) MA_DQS_L(8) MEM_MB_DQS_H0 MB_DQS_L(1) MB_DQS_L(8)
10 MEM_MA_DQS_H0 F15 10 MEM_MB_DQS_H0 C14
MEM_MA_DQS_L0 MA_DQS_H(0) MEM_MB_DQS_L0 MB_DQS_H(0)
10 MEM_MA_DQS_L0 G15 J25 10 MEM_MB_DQS_L0 C13 J29
MA_DQS_L(0) MA_DM(8) MB_DQS_L(0) MB_DM(8)
MEM_MA_DM7 AF15 K25 MEM_MB_DM7 AJ14 K29
10 MEM_MA_DM7 MA_DM(7) MA_CHECK(7) 10 MEM_MB_DM7 MB_DM(7) MB_CHECK(7)
MEM_MA_DM6 AF19 J26 MEM_MB_DM6 AH17 K31
10 MEM_MA_DM6 MA_DM(6) MA_CHECK(6) 10 MEM_MB_DM6 MB_DM(6) MB_CHECK(6)
MEM_MA_DM5 AJ25 G28 MEM_MB_DM5 AJ23 G30
10 MEM_MA_DM5 MA_DM(5) MA_CHECK(5) 10 MEM_MB_DM5 MB_DM(5) MB_CHECK(5)
MEM_MA_DM4 AH29 G27 MEM_MB_DM4 AK29 G29
10 MEM_MA_DM4 MA_DM(4) MA_CHECK(4) 10 MEM_MB_DM4 MB_DM(4) MB_CHECK(4)
MEM_MA_DM3 B29 L24 MEM_MB_DM3 C30 L29
10 MEM_MA_DM3 MA_DM(3) MA_CHECK(3) 10 MEM_MB_DM3 MB_DM(3) MB_CHECK(3)
MEM_MA_DM2 E24 K27 MEM_MB_DM2 A23 L28
10 MEM_MA_DM2 MA_DM(2) MA_CHECK(2) 10 MEM_MB_DM2 MB_DM(2) MB_CHECK(2)
MEM_MA_DM1 E18 H29 MEM_MB_DM1 B17 H31
10 MEM_MA_DM1 MA_DM(1) MA_CHECK(1) 10 MEM_MB_DM1 MB_DM(1) MB_CHECK(1)
MEM_MA_DM0 H15 H27 MEM_MB_DM0 B13 G31
10 MEM_MA_DM0 MA_DM(0) MA_CHECK(0) 10 MEM_MB_DM0 MB_DM(0) MB_CHECK(0)

N12-9400050-F02 N12-9400050-F02

A A

MICRO-START INT'L CO.,LTD.


Title
CPU-Memory
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 7 of 37
5 4 3 2 1
5 4 3 2 1

SLOTOCC# 31

VCCP
VCCP VCCP
CPU1F CPU1G VCCP CPU1H VCC1_2HT CPU1I
VDD1 VDD2 VDD3 VDDIO
A4 A3 L14 AK20 AA20 N17 AJ4 H6 VLDT_RUN_B
VDD1 VSS1 VDD1 VSS1 VDD1 VSS1 VLDT_A1 VLDT_B1
A6 VDD2 VSS2 A7 L16 VDD2 VSS2 AK22 AA22 VDD2 VSS2 N19 AJ3 VLDT_A2 VLDT_B2 H5
AA8 VDD3 VSS3 A9 L18 VDD3 VSS3 AK24 AB13 VDD3 VSS3 N21 AJ2 VLDT_A3 VLDT_B3 H2
AA10 A11 M2 AK26 AB15 N23 VTT_DDR AJ1 H1 VTT_DDR C87 C94 C92 C91
VDD4 VSS4 VDD4 VSS4 VDD4 VSS4 VLDT_A4 VLDT_B4 C10u10Y0805 X_C0.01u25Y X_C0.01u25Y X_C0.01u25Y
D AA12 VDD5 VSS5 AA4 M3 VDD5 VSS5 AK28 AB17 VDD5 VSS5 P2 D
AA14 VDD6 VSS6 AA5 M7 VDD6 VSS6 AK30 AB19 VDD6 VSS6 P3 D12 VTT1 VTT5 AK12
AA16 VDD7 VSS7 AA7 M9 VDD7 VSS7 AL5 AB21 VDD7 VSS7 P8 C12 VTT2 VTT6 AJ12
AA18 VDD8 VSS8 AA9 M11 VDD8 VSS8 B4 AB23 VDD8 VSS8 P10 B12 VTT3 VTT7 AH12
AB7 AA11 M13 B9 AC12 P12 VCC_DDR A12 AG12
VDD9 VSS9 VDD9 VSS9 VDD9 VSS9 VTT4 VTT8
AB9 VDD10 VSS10 AA13 M15 VDD10 VSS10 B11 AC14 VDD10 VSS10 P14 VTT9 AL12
AB11 VDD11 VSS11 AA15 M17 VDD11 VSS11 B14 AC16 VDD11 VSS11 P16 AB24 VDDIO1
AC4 VDD12 VSS12 AA17 M19 VDD12 VSS12 B16 AC18 VDD12 VSS12 P18 AB26 VDDIO2 VSS1 K24
AC5 VDD13 VSS13 AA19 N8 VDD13 VSS13 B18 AC20 VDD13 VSS13 P20 AB28 VDDIO3 VSS2 K26
AC8 VDD14 VSS14 AA21 N10 VDD14 VSS14 B20 AC22 VDD14 VSS14 P22 AB30 VDDIO4 VSS3 K28
AC10 VDD15 VSS15 AA23 N12 VDD15 VSS15 B22 AD11 VDD15 VSS15 R7 AC24 VDDIO5 VSS4 K30
AD2 VDD16 VSS16 AB2 N14 VDD16 VSS16 B24 AD23 VDD16 VSS16 R9 AD26 VDDIO6 VSS5 L7
AD3 VDD17 VSS17 AB3 N16 VDD17 VSS17 B26 AE12 VDD17 VSS17 R11 AD28 VDDIO7 VSS6 L9
AD7 VDD18 VSS18 AB8 N18 VDD18 VSS18 B28 AF11 VDD18 VSS18 R13 AD30 VDDIO8 VSS7 L11
AD9 VDD19 VSS19 AB10 P7 VDD19 VSS19 B30 L20 VDD19 VSS19 R15 AF30 VDDIO9 VSS8 L13
AE10 VDD20 VSS20 AB12 P9 VDD20 VSS20 C3 L22 VDD20 VSS20 R17 M24 VDDIO10 VSS9 L15
AF7 VDD21 VSS21 AB14 P11 VDD21 VSS21 D14 M21 VDD21 VSS21 R19 M26 VDDIO11 VSS10 L17
AF9 VDD22 VSS22 AB16 P13 VDD22 VSS22 D16 M23 VDD22 VSS22 R21 M28 VDDIO12 VSS11 L19
AG4 VDD23 VSS23 AB18 P15 VDD23 VSS23 D18 N20 VDD23 VSS23 R23 M30 VDDIO13 VSS12 L21
AG5 VDD24 VSS24 AB20 P17 VDD24 VSS24 D20 N22 VDD24 VSS24 T8 P24 VDDIO14 VSS13 L23
AG7 VDD25 VSS25 AB22 P19 VDD25 VSS25 D22 P21 VDD25 VSS25 T10 P26 VDDIO15 VSS14 M8
AH2 VDD26 VSS26 AC7 R4 VDD26 VSS26 D24 P23 VDD26 VSS26 T12 P28 VDDIO16 VSS15 M10
AH3 VDD27 VSS27 AC9 R5 VDD27 VSS27 D26 R22 VDD27 VSS27 T14 P30 VDDIO17 VSS16 M12
B3 VDD28 VSS28 AC11 R8 VDD28 VSS28 D28 T23 VDD28 VSS28 T16 T24 VDDIO18 VSS17 M14
B5 VDD29 VSS29 AC13 R10 VDD29 VSS29 D30 U22 VDD29 VSS29 T18 T26 VDDIO19 VSS18 M16
B7 VDD30 VSS30 AC15 R12 VDD30 VSS30 E11 V23 VDD30 VSS30 T20 T28 VDDIO20 VSS19 M18
C2 VDD31 VSS31 AC17 R14 VDD31 VSS31 F4 W22 VDD31 VSS31 T22 T30 VDDIO21 VSS20 M20
C C4 VDD32 VSS32 AC19 R16 VDD32 VSS32 F14 Y23 VDD32 VSS32 U4 V25 VDDIO22 VSS21 M22 C
C6 VDD33 VSS33 AC21 R18 VDD33 VSS33 F16 VSS33 U5 V26 VDDIO23 VSS22 N4
C8 VDD34 VSS34 AC23 R20 VDD34 VSS34 F18 VSS34 U7 V28 VDDIO24 VSS23 N5
D3 VDD35 VSS35 AD8 T2 VDD35 VSS35 F20 VSS35 U9 V30 VDDIO25 VSS24 N7
D5 VDD36 VSS36 AD10 T3 VDD36 VSS36 F22 VSS36 U11 Y24 VDDIO26 VSS25 N9
D7 VDD37 VSS37 AD12 T7 VDD37 VSS37 F24 VSS37 U13 Y26 VDDIO27 VSS26 N11
D9 VDD38 VSS38 AD14 T9 VDD38 VSS38 F26 5 GND VSS38 U15 Y28 VDDIO28 VSS27 N13
E4 VDD39 VSS39 AD16 T11 VDD39 VSS39 F28 6 GND VSS39 U17 Y29 VDDIO29 VSS28 N15
E6 VDD40 VSS40 AD20 T13 VDD40 VSS40 F30 7 GND VSS40 U19
E8 VDD41 VSS41 AD22 T15 VDD41 VSS41 G9 8 GND VSS41 U21
E10 AD24 T17 G11 U23
F5
VDD42 VSS42
AE4 T19
VDD42 VSS42
H8
VSS42
V2
N12-9400050-F02
VDD43 VSS43 VDD43 VSS43 VSS43
F7 VDD44 VSS44 AE5 T21 VDD44 VSS44 H10 VSS44 V3
F9 VDD45 VSS45 AE9 U8 VDD45 VSS45 H12 VSS45 V10
F11 VDD46 VSS46 AE11 U10 VDD46 VSS46 H14 VSS46 V12
G6 VDD47 VSS47 AF2 U12 VDD47 VSS47 H16 VSS47 V14
G8 VDD48 VSS48 AF3 U14 VDD48 VSS48 H18 VSS48 V16
G10 AF8 U16 H22 V18 VCC_DDR
VDD49 VSS49 VDD49 VSS49 VSS49
G12 VDD50 VSS50 AF10 U18 VDD50 VSS50 H24 VSS50 V20
H7 VDD51 VSS51 AF12 U20 VDD51 VSS51 H26 VSS51 V22
H11 AF14 V9 H28 W9 CPU1E
VDD52 VSS52 VDD52 VSS52 VSS52
H23 VDD53 VSS53 AF16 V11 VDD53 VSS53 H30 VSS53 W11 INTERNAL MISC E
J8 AF18 V13 J4 W13 L25 E20 R78 R121
VDD54 VSS54 VDD54 VSS54 VSS54 RSVD1 RSVD17 1KR0402 1KR0402
J12 VDD55 VSS55 AF20 V15 VDD55 VSS55 J5 VSS55 W15 L26 RSVD2 RSVD18 B19
J14 VDD56 VSS56 AF22 V17 VDD56 VSS56 J7 VSS56 W17 L31 RSVD3
J16 AF24 V19 J9 W19 L30 AL4 CPU_THERM_ALERT
VDD57 VSS57 VDD57 VSS57 VSS57 RSVD4 RSVD19 CPU_THERM_ALERT 18
J18 VDD58 VSS58 AF26 V21 VDD58 VSS58 J11 VSS58 W21 RSVD20 AK4
B J20 VDD59 VSS59 AF28 W4 VDD59 VSS59 J13 VSS59 W23 W26 RSVD5 RSVD21 AK3 B
J22 VDD60 VSS60 AG10 W5 VDD60 VSS60 J15 VSS60 Y8 W25 RSVD6
J24 VDD61 VSS61 AG11 W8 VDD61 VSS61 J17 VSS61 Y10 AE27 RSVD7
K7 VDD62 VSS62 AH14 W10 VDD62 VSS62 J19 VSS62 Y12 U24 RSVD8 RSVD22 F2 TP11
K9 AH16 W12 J21 W7 V24 F3 VCCP
VDD63 VSS63 VDD63 VSS63 VSS63 RSVD9 RSVD23
K11 VDD64 VSS64 AH18 W14 VDD64 VSS64 J23 VSS64 Y20 AE28 RSVD10
K13 AH20 W16 K2 Y22 G4 CPU_VDD_NB_VSEN R81 51R0402
VDD65 VSS65 VDD65 VSS65 VSS65 RSVD24 CPU_VDD_NB_FBG R84 51R0402
K15 VDD66 VSS66 AH22 W18 VDD66 VSS66 K3 Y31 RSVD11 RSVD25 G3
K17 AH24 W20 K8 Y30 G5 CORE_SEL
VDD67 VSS67 VDD67 VSS67 RSVD12 RSVD26 CORE_SEL 31
K19 AH26 Y2 K10 AG31
K21
VDD68 VSS68
AH28 Y3
VDD68 VSS68
K12
N12-9400050-F02 V31
RSVD13
AD25
VDD69 VSS69 VDD69 VSS69 RSVD14 RSVD27
K23 VDD70 VSS70 AH30 Y7 VDD70 VSS70 K14 W31 RSVD15 RSVD28 AE24
L4 VDD71 VSS71 AK2 Y9 VDD71 VSS71 K16 AF31 RSVD16 RSVD29 AE25
L5 VDD72 VSS72 AK14 Y11 VDD72 VSS72 K18 RSVD30 AJ18
L8 VDD73 VSS73 AK16 Y13 VDD73 VSS73 K20 AD18 KEY1 RSVD31 AJ20
L10 VDD74 VSS74 AK18 Y15 VDD74 VSS74 K22 AD19 KEY2 RSVD32 C18
L12 VDD75 VSS240 Y14 Y21 VDD75 VSS75 Y18 AE7 KEY3 RSVD33 C20
Y17 VDD150 VSS241 Y16 AE8 KEY4 RSVD34 G24
Y19 VDD151 H3 KEY5 RSVD35 G25
H4 H25
N12-9400050-F02 H20
KEY6 RSVD36
V29
KEY7 RSVD37
H21 W30
N12-9400050-F02 VCC1_2HT KEY8 RSVD38

C181
A C10u10Y0805 A

MICRO-START INT'L CO.,LTD.


Title
CPU-Power & GND
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 8 of 37
5 4 3 2 1
5 4 3 2 1

VCC_DDR

VTT_DDR C156 C157 C129 C218 C570


X_C10u10Y0805 C10u10Y0805 X_C4.7u10Y0805 X_C4.7u10Y0805 C0.22u16X

VCC_DDR
D C21 C61 C46 C67 C215 C54 C221 C208 D
C10u10Y0805 C10u10Y0805 X_C0.22u16X X_C0.22u16X X_C1000p50X0402 X_C1000p50X0402 X_C180p50N0402 X_C180p50N0402

C161 C102 C538 C545 C150 C571 C95


X_C10u10Y0805 X_C1u16X C0.1u16Y0402 X_C0.1u16Y0402 X_C1000p50X0402 X_C180p50N0402 X_C180p50N0402

VTT_DDR

Bottom side

C108 C201 C197 C36 C70 C74 C174 C106 VCC_DDR


X_C10u10Y0805 X_C4.7u10Y0805 X_C0.22u16X X_C0.22u16X X_C1000p50X0402 C0.1u16Y0402 X_C180p50N0402 X_C180p50N0402

C554 C539 C574 C549 C575 C151


C10u10Y0805 C10u10Y0805 1u16X 1u16X 1u16X X_1u16X

C C

VCC1_2HT

VCCP
Bottom side

C198 C177 C189 C196


X_C0.22u16X C0.1u16Y0402 C10u10Y0805 X_1u16X

C558 C568 C542 C553 C564 C569 C548


C10u16Y1206 X_C10u16Y1206 X_C10u16Y1206 C10u16Y1206 X_C10u16Y1206 C10u16Y1206 X_C10u16Y1206

VCCP

C565 C544 C540 C543 C559 C541


B C10u16Y1206 C10u16Y1206 C10u16Y1206 X_C10u16Y1206 X_C10u16Y1206 X_C10u16Y1206 B

VCCP

C562 C537 C536 C534 C535


X_C0.22u16X X_C0.22u16X X_C0.22u16X X_C1000p50X0402 X_C180p50N0402

VCCP

C547 C552
C10u16Y1206 X_C10u16Y1206
A A

MICRO-START INT'L CO.,LTD.


Title
CPU-Decoupling
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 9 of 37
5 4 3 2 1
5 4 3 2 1

VCC_DDR VCC3 VCC_DDR VCC3

102

191
194
181
175
170

197

172
187
184
178
189

238

161
162
167
168

102

191
194
181
175
170

197

172
187
184
178
189

238

161
162
167
168
D D
DIMM1 DIMM2

55
18
19

68

51
56
62
72
75
78

53
59
64

69

67

42
43
48
49

55
18
19

68

51
56
62
72
75
78

53
59
64

69

67

42
43
48
49
VDD0
VDD1
VDD2
VDD3
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ7
VDDQ8
VDDQ9

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7

VDD0
VDD1
VDD2
VDD3
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ7
VDDQ8
VDDQ9

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
RC0
RC1

RC0
RC1
NC

NC

NC

NC
VDDSPD

VDDSPD
NC/TEST

NC/TEST
7 MEM_MA_DATA[63..0] 7 MEM_MB_DATA[63..0]
MEM_MA_DATA0 3 MEM_MB_DATA0 3
MEM_MA_DATA1 DQ0 MEM_MA_DQS_H0 MEM_MB_DATA1 DQ0 MEM_MB_DQS_H0
4 7 MEM_MA_DQS_H0 7 4 7 MEM_MB_DQS_H0 7
MEM_MA_DATA2 DQ1 DQS0 MEM_MA_DQS_L0 MEM_MB_DATA2 DQ1 DQS0 MEM_MB_DQS_L0
9 6 MEM_MA_DQS_L0 7 9 6 MEM_MB_DQS_L0 7
MEM_MA_DATA3 DQ2 DQS0# MEM_MA_DQS_H1 MEM_MB_DATA3 DQ2 DQS0# MEM_MB_DQS_H1
10 16 MEM_MA_DQS_H1 7 10 16 MEM_MB_DQS_H1 7
MEM_MA_DATA4 DQ3 DQS1 MEM_MA_DQS_L1 MEM_MB_DATA4 DQ3 DQS1 MEM_MB_DQS_L1
122 15 MEM_MA_DQS_L1 7 122 15 MEM_MB_DQS_L1 7
MEM_MA_DATA5 DQ4 DQS1# MEM_MA_DQS_H2 MEM_MB_DATA5 DQ4 DQS1# MEM_MB_DQS_H2
123 28 MEM_MA_DQS_H2 7 123 28 MEM_MB_DQS_H2 7
MEM_MA_DATA6 DQ5 DQS2 MEM_MA_DQS_L2 MEM_MB_DATA6 DQ5 DQS2 MEM_MB_DQS_L2
128 27 MEM_MA_DQS_L2 7 128 27 MEM_MB_DQS_L2 7
MEM_MA_DATA7 DQ6 DQS2# MEM_MA_DQS_H3 MEM_MB_DATA7 DQ6 DQS2# MEM_MB_DQS_H3
129 37 MEM_MA_DQS_H3 7 129 37 MEM_MB_DQS_H3 7
MEM_MA_DATA8 DQ7 DQS3 MEM_MA_DQS_L3 MEM_MB_DATA8 DQ7 DQS3 MEM_MB_DQS_L3
12 36 MEM_MA_DQS_L3 7 12 36 MEM_MB_DQS_L3 7
MEM_MA_DATA9 DQ8 DQS3# MEM_MA_DQS_H4 MEM_MB_DATA9 DQ8 DQS3# MEM_MB_DQS_H4
13 84 MEM_MA_DQS_H4 7 13 84 MEM_MB_DQS_H4 7
MEM_MA_DATA10 DQ9 DQS4 MEM_MA_DQS_L4 MEM_MB_DATA10 DQ9 DQS4 MEM_MB_DQS_L4
21 83 MEM_MA_DQS_L4 7 21 83 MEM_MB_DQS_L4 7
MEM_MA_DATA11 DQ10 DQS4# MEM_MA_DQS_H5 MEM_MB_DATA11 DQ10 DQS4# MEM_MB_DQS_H5
22 93 MEM_MA_DQS_H5 7 22 93 MEM_MB_DQS_H5 7
MEM_MA_DATA12 DQ11 DQS5 MEM_MA_DQS_L5 MEM_MB_DATA12 DQ11 DQS5 MEM_MB_DQS_L5
131 92 MEM_MA_DQS_L5 7 131 92 MEM_MB_DQS_L5 7
MEM_MA_DATA13 DQ12 DQS5# MEM_MA_DQS_H6 MEM_MB_DATA13 DQ12 DQS5# MEM_MB_DQS_H6
132 105 MEM_MA_DQS_H6 7 132 105 MEM_MB_DQS_H6 7
MEM_MA_DATA14 DQ13 DQS6 MEM_MA_DQS_L6 MEM_MB_DATA14 DQ13 DQS6 MEM_MB_DQS_L6
140 104 MEM_MA_DQS_L6 7 140 104 MEM_MB_DQS_L6 7
MEM_MA_DATA15 DQ14 DQS6# MEM_MA_DQS_H7 MEM_MB_DATA15 DQ14 DQS6# MEM_MB_DQS_H7
141 114 MEM_MA_DQS_H7 7 141 114 MEM_MB_DQS_H7 7
MEM_MA_DATA16 DQ15 DQS7 MEM_MA_DQS_L7 MEM_MB_DATA16 DQ15 DQS7 MEM_MB_DQS_L7
24 113 MEM_MA_DQS_L7 7 24 113 MEM_MB_DQS_L7 7
MEM_MA_DATA17 DQ16 DQS7# MEM_MB_DATA17 DQ16 DQS7#
25 46 25 46
MEM_MA_DATA18 DQ17 DQS8 MEM_MB_DATA18 DQ17 DQS8
30 45 30 45
MEM_MA_DATA19 DQ18 DQS8# MEM_MB_DATA19 DQ18 DQS8#
31 31
MEM_MA_DATA20 DQ19 MEM_MA_ADD0 MEM_MB_DATA20 DQ19 MEM_MB_ADD0
143 188 143 188
MEM_MA_DATA21 DQ20 A0 MEM_MA_ADD1 MEM_MB_DATA21 DQ20 A0 MEM_MB_ADD1
144 183 144 183
MEM_MA_DATA22 DQ21 A1 MEM_MA_ADD2 MEM_MB_DATA22 DQ21 A1 MEM_MB_ADD2
149 63 149 63
MEM_MA_DATA23 DQ22 A2 MEM_MA_ADD3 MEM_MB_DATA23 DQ22 A2 MEM_MB_ADD3
150 182 150 182
MEM_MA_DATA24 DQ23 A3 MEM_MA_ADD4 MEM_MB_DATA24 DQ23 A3 MEM_MB_ADD4
33 61 33 61
MEM_MA_DATA25 DQ24 A4 MEM_MA_ADD5 MEM_MB_DATA25 DQ24 A4 MEM_MB_ADD5
34 60 34 60
MEM_MA_DATA26 DQ25 A5 MEM_MA_ADD6 MEM_MB_DATA26 DQ25 A5 MEM_MB_ADD6
39 180 39 180
MEM_MA_DATA27 DQ26 A6 MEM_MA_ADD7 MEM_MB_DATA27 DQ26 A6 MEM_MB_ADD7
40 58 40 58
MEM_MA_DATA28 DQ27 A7 MEM_MA_ADD8 MEM_MB_DATA28 DQ27 A7 MEM_MB_ADD8
152 179 152 179
MEM_MA_DATA29 DQ28 A8 MEM_MA_ADD9 MEM_MB_DATA29 DQ28 A8 MEM_MB_ADD9
153 177 153 177
MEM_MA_DATA30 DQ29 A9 MEM_MA_ADD10 MEM_MB_DATA30 DQ29 A9 MEM_MB_ADD10
158 70 158 70
MEM_MA_DATA31 DQ30 A10_AP MEM_MA_ADD11 MEM_MB_DATA31 DQ30 A10_AP MEM_MB_ADD11
159 57 159 57
MEM_MA_DATA32 DQ31 A11 MEM_MA_ADD12 MEM_MB_DATA32 DQ31 A11 MEM_MB_ADD12
80 176 80 176
MEM_MA_DATA33 DQ32 A12 MEM_MA_ADD13 MEM_MB_DATA33 DQ32 A12 MEM_MB_ADD13
81 196 81 196
MEM_MA_DATA34 DQ33 A13 MEM_MA_ADD14 MEM_MB_DATA34 DQ33 A13 MEM_MB_ADD14
86 174 86 174
MEM_MA_DATA35 DQ34 A14 MEM_MA_ADD15 MEM_MB_DATA35 DQ34 A14 MEM_MB_ADD15
87 173 MEM_MA_ADD[15..0] 7,12 87 173 MEM_MB_ADD[15..0] 7,12
MEM_MA_DATA36 DQ35 A15 MEM_MB_DATA36 DQ35 A15
C 199 199 C
MEM_MA_DATA37 DQ36 MEM_MA_BANK2 MEM_MB_DATA37 DQ36 MEM_MB_BANK2
200 54 MEM_MA_BANK2 7,12 200 54 MEM_MB_BANK2 7,12
MEM_MA_DATA38 DQ37 A16/BA2 MEM_MA_BANK1 MEM_MB_DATA38 DQ37 A16/BA2 MEM_MB_BANK1
205 190 MEM_MA_BANK1 7,12 205 190 MEM_MB_BANK1 7,12
MEM_MA_DATA39 DQ38 BA1 MEM_MA_BANK0 MEM_MB_DATA39 DQ38 BA1 MEM_MB_BANK0
206 71 MEM_MA_BANK0 7,12 206 71 MEM_MB_BANK0 7,12
MEM_MA_DATA40 DQ39 BA0 MEM_MB_DATA40 DQ39 BA0
89 89
MEM_MA_DATA41 DQ40 MEM_MA_WE_L MEM_MB_DATA41 DQ40 MEM_MB_WE_L
90 73 MEM_MA_WE_L 7,12 90 73 MEM_MB_WE_L 7,12
MEM_MA_DATA42 DQ41 WE# MEM_MA_CAS_L MEM_MB_DATA42 DQ41 WE# MEM_MB_CAS_L
95 74 MEM_MA_CAS_L 7,12 95 74 MEM_MB_CAS_L 7,12
MEM_MA_DATA43 DQ42 CAS# MEM_MA_RAS_L MEM_MB_DATA43 DQ42 CAS# MEM_MB_RAS_L
96 192 MEM_MA_RAS_L 7,12 96 192 MEM_MB_RAS_L 7,12
MEM_MA_DATA44 DQ43 RAS# MEM_MB_DATA44 DQ43 RAS#
208 208
MEM_MA_DATA45 DQ44 MEM_MA_DM0 MEM_MA_DM[7..0] MEM_MB_DATA45 DQ44 MEM_MB_DM0 MEM_MB_DM[7..0]
209 125 MEM_MA_DM[7..0] 7 209 125 MEM_MB_DM[7..0] 7
MEM_MA_DATA46 DQ45 DM0/DQS9 MEM_MB_DATA46 DQ45 DM0/DQS9
214 126 214 126
MEM_MA_DATA47 DQ46 NC/DQS9# MEM_MA_DM1 MEM_MB_DATA47 DQ46 NC/DQS9# MEM_MB_DM1
215 134 215 134
MEM_MA_DATA48 DQ47 DM1/DQS10 MEM_MB_DATA48 DQ47 DM1/DQS10
98 135 98 135
MEM_MA_DATA49 DQ48 NC/DQS10# MEM_MA_DM2 MEM_MB_DATA49 DQ48 NC/DQS10# MEM_MB_DM2
99 146 99 146
MEM_MA_DATA50 DQ49 DM2/DQS11 MEM_MB_DATA50 DQ49 DM2/DQS11
107 147 107 147
MEM_MA_DATA51 DQ50 NC/DQS11# MEM_MA_DM3 MEM_MB_DATA51 DQ50 NC/DQS11# MEM_MB_DM3
108 155 108 155
MEM_MA_DATA52 DQ51 DM3/DQS12 MEM_MB_DATA52 DQ51 DM3/DQS12
217 156 217 156
MEM_MA_DATA53 DQ52 NC/DQS12# MEM_MA_DM4 MEM_MB_DATA53 DQ52 NC/DQS12# MEM_MB_DM4
218 202 218 202
MEM_MA_DATA54 DQ53 DM4/DQS13 MEM_MB_DATA54 DQ53 DM4/DQS13
226 203 226 203
MEM_MA_DATA55 DQ54 NC/DQS13# MEM_MA_DM5 MEM_MB_DATA55 DQ54 NC/DQS13# MEM_MB_DM5
227 211 227 211
MEM_MA_DATA56 DQ55 DM5/DQS14 MEM_MB_DATA56 DQ55 DM5/DQS14
110 212 110 212
MEM_MA_DATA57 DQ56 NC/DQS14# MEM_MA_DM6 MEM_MB_DATA57 DQ56 NC/DQS14# MEM_MB_DM6
111 223 111 223
MEM_MA_DATA58 DQ57 DM6/DQS15 MEM_MB_DATA58 DQ57 DM6/DQS15
116 224 116 224
MEM_MA_DATA59 DQ58 NC/DQS15# MEM_MA_DM7 MEM_MB_DATA59 DQ58 NC/DQS15# MEM_MB_DM7
117 232 117 232
MEM_MA_DATA60 DQ59 DM7/DQS16 MEM_MB_DATA60 DQ59 DM7/DQS16
229 233 229 233
MEM_MA_DATA61 DQ60 NC/DQS16# MEM_MB_DATA61 DQ60 NC/DQS16#
230 164 230 164
MEM_MA_DATA62 DQ61 DM8/DQS17 MEM_MB_DATA62 DQ61 DM8/DQS17
235 165 235 165
MEM_MA_DATA63 DQ62 NC/DQS17# MEM_MB_DATA63 DQ62 NC/DQS17#
236 236
DQ63 MEM_MA0_ODT0 DQ63 MEM_MB0_ODT0
195 MEM_MA0_ODT0 7,12 195 MEM_MB0_ODT0 7,12
ODT0 ODT0
2 77 2 77
VSS ODT1 VSS ODT1
5 5
VSS VSS
8 52 MEM_MA_CKE0 7,12 8 52 MEM_MB_CKE0 7,12
VSS CKE0 VSS CKE0
11 171 11 171
VSS CKE1 VSS CKE1
14 14
VSS MEM_MA0_CS_L0 VSS MEM_MB0_CS_L0
17 193 MEM_MA0_CS_L0 7,12 17 193 MEM_MB0_CS_L0 7,12
VSS CS0# MEM_MA0_CS_L1 VSS CS0# MEM_MB0_CS_L1
20 76 MEM_MA0_CS_L1 7,12 20 76 MEM_MB0_CS_L1 7,12
VSS CS1# VSS CS1#
23 23
VSS MEM_MA0_CLK_H0 VSS MEM_MB0_CLK_H0
26 185 MEM_MA0_CLK_H0 7,12 26 185 MEM_MB0_CLK_H0 7,12
VSS CK0(DU) MEM_MA0_CLK_L0 VSS CK0(DU) MEM_MB0_CLK_L0
29 186 MEM_MA0_CLK_L0 7,12 29 186 MEM_MB0_CLK_L0 7,12
VSS CK0#(DU) MEM_MA0_CLK_H1 VSS CK0#(DU) MEM_MB0_CLK_H1
32 137 MEM_MA0_CLK_H1 7,12 32 137 MEM_MB0_CLK_H1 7,12
B VSS CK1(CK0) MEM_MA0_CLK_L1 VSS CK1(CK0) MEM_MB0_CLK_L1 B
35 138 MEM_MA0_CLK_L1 7,12 35 138 MEM_MB0_CLK_L1 7,12
VSS CK1#(CK0#) MEM_MA0_CLK_H2 VSS CK1#(CK0#) MEM_MB0_CLK_H2
38 220 MEM_MA0_CLK_H2 7,12 38 220 MEM_MB0_CLK_H2 7,12
VSS CK2(DU) MEM_MA0_CLK_L2 VSS CK2(DU) MEM_MB0_CLK_L2
41 221 MEM_MA0_CLK_L2 7,12 41 221 MEM_MB0_CLK_L2 7,12
VSS CK2#(DU) VSS CK2#(DU)
44 44
VSS SMB_MEM_CLK VSS SMB_MEM_CLK
47 120 SMB_MEM_CLK 18 47 120 SMB_MEM_CLK 18
VSS SCL SMB_MEM_DATA VSS SCL SMB_MEM_DATA
50 119 SMB_MEM_DATA 18 50 119 SMB_MEM_DATA 18
VSS SDA VSS SDA
65 65
VSS VDDR_VREF VSS VDDR_VREF
66 1 66 1
VSS VREF VSS VREF
79 79
VSS VSS VCC3
82 82
VSS C38 VSS C39
85 239 85 239
VSS SA0 X_C0.1u16Y0402 VSS SA0 C0.1u16Y0402
88 240 88 240
VSS SA1 VSS SA1
91 101 91 101
VSS SA2 PLACE CLOSE TO DIMM PIN VSS SA2 PLACE CLOSE TO DIMM PIN
94 94
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS VSS
97 97
VSS VSS
DDRII-240_GREEN DDRII-240_ORANGE
100
103
106
109
112
115
118
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
213
216
219
222
225
228
231
234
237

100
103
106
109
112
115
118
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
213
216
219
222
225
228
231
234
237
ADDRESS: 1010 000
ADDRESS: 1010 001
N13-2400301-K06 N13-2400351-K06

VCC_DDR

VCC3 VCC3
VCC_DDR
3VDUAL 3VDUAL
R27 VDDR_VREF
56.2R1% C33 R199 R198
2

C99 X_C0.1u16Y0402 2.7KR0402 2.7KR0402


X_C10u10Y0805 VDDR_VREF D20 D21
SMB_MEM_CLK 3 1PS226_SOT23 SMB_MEM_DATA 3 1PS226_SOT23

A R29 C37 A
56.2R1% X_C0.1u16Y0402
1

MICRO-START INT'L CO.,LTD.


Title
FIRST LOGICAL DDRII DIMM
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 10 of 37
5 4 3 2 1
5 4 3 2 1

D D

close VGA connector


Width = 7 mils Width = 5 mils
L4
15 R 2 1
68n300mA

2
VCC5

2
C169 C168
R120 3 X_C10P50N0402 C10P50N0402

1
150R0402 D14
1PS226_SOT23

1
VGAGND
L3
15 G 2 1
68n300mA

2
VCC5

2
C165 C164
R118 3 X_C10P50N0402 C10P50N0402

1
150R0402 D13
1PS226_SOT23

1
VGAGND
L2
15 B 2 1
68n300mA

2
VCC5

2
C159 C158
R114 3 X_C10P50N0402 C10P50N0402

1
150R0402 D11
C 1PS226_SOT23 VCC5 C

1
VGAGND

D5
VCC5 VCC5 VCC5 2 1 S-BAT54C_SOT23

FS1 C98

3
2

C0.1U16Y0402
3 3 JVGA1
D10 D9 F-MICROSMD110F-RH 17
1PS226_SOT23 1PS226_SOT23 VGAGND
1

R113 R112
2.2KR0402 2.2KR0402 VGA_15 15 5
10
15 DDC_CLK DDC_CLK R110 33R VGA_14 14 4
15 DDC_DATA DDC_DATA R109 33R VGA_9 9
5V_HSYNC R102 X_33R VGA_13 13 3 VGA_B
5V_VSYNC R94 X_33R 8
HSYNC# R104 33R VGA_12 12 2 VGA_G
VSYNC# R95 33R 7
11 1 VGA_R
VCC5 VCC5 6
C103 C154
C22p50N0402 C22p50N0402
2

VCC5
47p 16
3 3
R108 X_10KR0402 C1351 2 X_C0.1U16Y0402 D8 D7 C120
5

1PS226_SOT23 1PS226_SOT23 C22p50N0402 CONN-D-SUB15F_blue-RH


1

1 C153
4 5V_HSYNC C22p50N0402
15 HSYNC# HSYNC# 2
U9
X_NC7SZ08M5X_SOT23-5
3

VCC5

C1071 2 X_C0.1U16Y0402
5

B B
U40_1 1
4 5V_VSYNC
15 VSYNC# VSYNC# 2
U8
X_NC7SZ08M5X_SOT23-5
3

A A

MICRO-START INT'L CO.,LTD.


Title
SECOND LOGICAL DDRII DIMM
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 11 of 37
5 4 3 2 1
5 4 3 2 1

Place Between Processor and DIMMs


RTT:Place Behind DIMMs
VCC_DDR
VCC_DDR

VTT_DDR VTT_DDR
RN13 MEM_MA_ADD15 C551 C22p50N0402 MEM_MB_ADD15 C105 C22p50N0402
8P4R-47R0402 RN20 MEM_MA_ADD14 C546 C22p50N0402 MEM_MB_ADD14 C100 C22p50N0402
MEM_MB_CKE0 1 2 MEM_MB_ADD1 1 2 8P4R-47R0402 MEM_MA_ADD13 C584 C22p50N0402 MEM_MB_ADD13 C173 C22p50N0402
7,10 MEM_MB_CKE0 7,10 MEM_MB_ADD1
MEM_MB_ADD15 3 4 MEM_MB_ADD2 3 4 MEM_MA_ADD12 C550 C22p50N0402 MEM_MB_ADD12 C104 C22p50N0402
7,10 MEM_MB_ADD15 7,10 MEM_MB_ADD2
MEM_MB_ADD14 5 6 MEM_MB_ADD0 5 6 MEM_MA_ADD11 C556 C22p50N0402 MEM_MB_ADD11 C110 C22p50N0402
7,10 MEM_MB_ADD14 7,10 MEM_MB_ADD0
D MEM_MB_BANK2 7 8 MEM_MB_BANK1 7 8 MEM_MA_ADD10 C581 C22p50N0402 MEM_MB_ADD10 C155 C22p50N0402 D
7,10 MEM_MB_BANK2 7,10 MEM_MB_BANK1
MEM_MA_ADD9 C563 C22p50N0402 MEM_MB_ADD9 C119 C22p50N0402
RN14 RN21 MEM_MA_ADD8 C555 C22p50N0402 MEM_MB_ADD8 C109 C22p50N0402
MEM_MB_ADD12 1 2 8P4R-47R0402 MEM_MB_ADD10 1 2 8P4R-47R0402 MEM_MA_ADD7 C561 C22p50N0402 MEM_MB_ADD7 C114 C22p50N0402
7,10 MEM_MB_ADD12 7,10 MEM_MB_ADD10
MEM_MA_BANK2 3 4 MEM_MB_BANK0 3 4 MEM_MA_ADD6 C567 C22p50N0402 MEM_MB_ADD6 C125 C22p50N0402
7,10 MEM_MA_BANK2 7,10 MEM_MB_BANK0
MEM_MA_CKE0 5 6 MEM_MB_RAS_L 5 6 MEM_MA_ADD5 C560 C22p50N0402 MEM_MB_ADD5 C113 C22p50N0402
7,10 MEM_MA_CKE0 7,10 MEM_MB_RAS_L
MEM_MA_ADD14 7 8 MEM_MA_ADD0 7 8 MEM_MA_ADD4 C572 C22p50N0402 MEM_MB_ADD4 C134 C22p50N0402
7,10 MEM_MA_ADD14 7,10 MEM_MA_ADD0
MEM_MA_ADD3 C566 C22p50N0402 MEM_MB_ADD3 C124 C22p50N0402
RN15 RN22 MEM_MA_ADD2 C573 C22p50N0402 MEM_MB_ADD2 C136 C22p50N0402
MEM_MA_ADD15 1 2 8P4R-47R0402 MEM_MA_ADD10 1 2 8P4R-47R0402 MEM_MA_ADD1 C576 C22p50N0402 MEM_MB_ADD1 C138 C22p50N0402
7,10 MEM_MA_ADD15 7,10 MEM_MA_ADD10
MEM_MB_ADD9 3 4 MEM_MA_BANK1 3 4 MEM_MA_ADD0 C579 C22p50N0402 MEM_MB_ADD0 C144 C22p50N0402
7,10 MEM_MB_ADD9 7,10 MEM_MA_BANK1
MEM_MB_ADD11 5 6 MEM_MA_BANK0 5 6
7,10 MEM_MB_ADD11 7,10 MEM_MA_BANK0
MEM_MA_ADD12 7 8 MEM_MA_RAS_L 7 8 MEM_MA_CAS_L C583 C22p50N0402 MEM_MB_CAS_L C148 C22p50N0402
7,10 MEM_MA_ADD12 7,10 MEM_MA_RAS_L
MEM_MA_WE_L C580 C22p50N0402 MEM_MB_WE_L C163 C22p50N0402
RN16 RN23 MEM_MA_RAS_L C582 C22p50N0402 MEM_MB_RAS_L C160 C22p50N0402
MEM_MB_ADD7 1 2 8P4R-47R0402 MEM_MA0_CS_L0 1 2 8P4R-47R0402
7,10 MEM_MB_ADD7 7,10 MEM_MA0_CS_L0
MEM_MA_ADD11 3 4 MEM_MB0_CS_L0 3 4 MEM_MA_BANK2 C557 C22p50N0402 MEM_MB_BANK2 C111 C22p50N0402
7,10 MEM_MA_ADD11 7,10 MEM_MB0_CS_L0
MEM_MA_ADD9 5 6 MEM_MB_WE_L 5 6 MEM_MA_BANK1 C577 C22p50N0402 MEM_MB_BANK1 C140 C22p50N0402
7,10 MEM_MA_ADD9 7,10 MEM_MB_WE_L
MEM_MA_ADD7 7 8 MEM_MA_WE_L 7 8 MEM_MA_BANK0 C578 C22p50N0402 MEM_MB_BANK0 C143 C22p50N0402
7,10 MEM_MA_ADD7 7,10 MEM_MA_WE_L
RN17 RN24
MEM_MB_ADD8 1 2 8P4R-47R0402 MEM_MA0_ODT0 1 2 8P4R-47R0402
7,10 MEM_MB_ADD8 7,10 MEM_MA0_ODT0
MEM_MB_ADD6 3 4 MEM_MA_CAS_L 3 4
7,10 MEM_MB_ADD6 7,10 MEM_MA_CAS_L
MEM_MA_ADD8 5 6 MEM_MA_ADD13 5 6
7,10 MEM_MA_ADD8 7,10 MEM_MA_ADD13
MEM_MA_ADD6 7 8 MEM_MB_CAS_L 7 8
7,10 MEM_MA_ADD6 7,10 MEM_MB_CAS_L
RN18 RN26
MEM_MA_ADD5 1 2 8P4R-47R0402 MEM_MB0_ODT0 1 2 8P4R-47R0402 MEM_MA0_CLK_H2
7,10 MEM_MA_ADD5 7,10 MEM_MB0_ODT0 7,10 MEM_MA0_CLK_H2
C MEM_MB_ADD5 3 4 MEM_MA0_CS_L1 3 4 C
7,10 MEM_MB_ADD5 7,10 MEM_MA0_CS_L1
MEM_MA_ADD4 5 6 MEM_MB_ADD13 5 6
7,10 MEM_MA_ADD4 7,10 MEM_MB_ADD13
MEM_MA_ADD1 7 8 MEM_MB0_CS_L1 7 8 C185
7,10 MEM_MA_ADD1 7,10 MEM_MB0_CS_L1
C1.5p50N0402
RN19 MEM_MA0_CLK_L2
7,10 MEM_MA0_CLK_L2
MEM_MA_ADD3 1 2 8P4R-47R0402
7,10 MEM_MA_ADD3
MEM_MB_ADD4 3 4
7,10 MEM_MB_ADD4
MEM_MB_ADD3 5 6 MEM_MA0_CLK_H1
7,10 MEM_MB_ADD3 7,10 MEM_MA0_CLK_H1
MEM_MA_ADD2 7 8
7,10 MEM_MA_ADD2
C69
C1.5p50N0402
MEM_MA0_CLK_L1
7,10 MEM_MA0_CLK_L1

MEM_MA0_CLK_H0
7,10 MEM_MA0_CLK_H0

C122
VTT_DDR C1.5p50N0402
MEM_MA0_CLK_L0
7,10 MEM_MA0_CLK_L0

C220 C152 C240 C12 C175 C11 C187 C260 C142


C0.1u16Y0402 C0.1u16Y0402 X_C0.1u16Y0402 X_C0.1u16Y0402 C0.1u16Y0402 X_C0.1u16Y0402 C0.1u16Y0402 X_C0.1u16Y0402 C0.1u16Y0402 MEM_MB0_CLK_H2
7,10 MEM_MB0_CLK_H2

C180
B VTT_DDR B
C1.5p50N0402
MEM_MB0_CLK_L2
7,10 MEM_MB0_CLK_L2

MEM_MB0_CLK_H1
7,10 MEM_MB0_CLK_H1
C115 C204 C121 C132 C44
C0.1u16Y0402 X_C0.1u16Y0402 C0.1u16Y0402 C0.1u16Y0402 C0.1u16Y0402 C72
C1.5p50N0402
MEM_MB0_CLK_L1
7,10 MEM_MB0_CLK_L1

MEM_MB0_CLK_H0
7,10 MEM_MB0_CLK_H0

VTT_DDR VCC_DDR VTT_DDR VCC_DDR C130


C1.5p50N0402
C192 X_C0.1u16Y0402 C241 X_C0.1u16Y0402 MEM_MB0_CLK_L0
7,10 MEM_MB0_CLK_L0
C182 X_C0.1u16Y0402 C123 X_C0.1u16Y0402

C145 X_C0.1u16Y0402 C203 X_C0.1u16Y0402

C216 X_C0.1u16Y0402 C190 X_C0.1u16Y0402

C188 X_C0.1u16Y0402 C170 X_C0.1u16Y0402

C183 X_C0.1u16Y0402 C193 X_C0.1u16Y0402


A A

MICRO-START INT'L CO.,LTD.


Title
DDRII Termination
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 12 of 37
5 4 3 2 1
5 4 3 2 1

NF-6100-430-N-A2 (MCP61P) : B01-MCP6135-N08


NF-7050-630A-A1 (MCP68) : B01-MCP6805-N08

U14A
PBGA692
MCP61
SEC 1 OF 8
CADOP[0..15] CADOP0 AG8 HT_MCP_RXD0_P HT_MCP_TXD0_P AH23 CADIP0 CADIP[0..15]
6 CADOP[0..15] CADIP[0..15] 6
CADOP1 AG9 HT_MCP_RXD1_P HT_MCP_TXD1_P AH22 CADIP1
D CADOP2 AK9 HT_MCP_RXD2_P HT_MCP_TXD2_P AJ21 CADIP2 D
CADOP3 AJ10 HT_MCP_RXD3_P HT_MCP_TXD3_P AH21 CADIP3
CADOP4 AG12 HT_MCP_RXD4_P HT_MCP_TXD4_P AH19 CADIP4
CADOP5 AG13 HT_MCP_RXD5_P HT_MCP_TXD5_P AH18 CADIP5
CADOP6 AK13 HT_MCP_RXD6_P HT_MCP_TXD6_P AJ17 CADIP6
CADOP7 AJ14 HT_MCP_RXD7_P HT_MCP_TXD7_P AH17 CADIP7
CADOP8 AB10 HT_MCP_RXD8_P HT_MCP_TXD8_P AF22 CADIP8
CADOP9 AD10 HT_MCP_RXD9_P HT_MCP_TXD9_P AB20 CADIP9
CADOP10 AF10 HT_MCP_RXD10_P HT_MCP_TXD10_P AC20 CADIP10
CADOP11 AC12 HT_MCP_RXD11_P HT_MCP_TXD11_P AE20 CADIP11
CADOP12 AB11 HT_MCP_RXD12_P HT_MCP_TXD12_P AD18 CADIP12
CADOP13 AB13 HT_MCP_RXD13_P HT_MCP_TXD13_P AF18 CADIP13
CADOP14 AF14 HT_MCP_RXD14_P HT_MCP_TXD14_P AB17 CADIP14
CADOP15 AE14 HT_MCP_RXD15_P HT_MCP_TXD15_P AC16 CADIP15

CADON[0..15] CADON0 AH8 HT_MCP_RXD0_N HT_MCP_TXD0_N AJ23 CADIN0 CADIN[0..15]


6 CADON[0..15] CADIN[0..15] 6
CADON1 AH9 HT_MCP_RXD1_N HT_MCP_TXD1_N AJ22 CADIN1
CADON2 AJ9 HT_MCP_RXD2_N HT_MCP_TXD2_N AK21 CADIN2
CADON3 AH10 HT_MCP_RXD3_N HT_MCP_TXD3_N AG21 CADIN3
CADON4 AH12 HT_MCP_RXD4_N HT_MCP_TXD4_N AJ19 CADIN4
CADON5 AH13 HT_MCP_RXD5_N HT_MCP_TXD5_N AJ18 CADIN5
CADON6 AJ13 HT_MCP_RXD6_N HT_MCP_TXD6_N AK17 CADIN6
CADON7 AH14 HT_MCP_RXD7_N HT_MCP_TXD7_N AG17 CADIN7
CADON8 AC10 HT_MCP_RXD8_N HT_MCP_TXD8_N AG22 CADIN8
CADON9 AE10 HT_MCP_RXD9_N HT_MCP_TXD9_N AB19 CADIN9
CADON10 AG10 HT_MCP_RXD10_N HT_MCP_TXD10_N AD20 CADIN10
C CADON11 AD12 HT_MCP_RXD11_N HT_MCP_TXD11_N AF20 CADIN11 C
CADON12 AC11 HT_MCP_RXD12_N HT_MCP_TXD12_N AE18 CADIN12
CADON13 AB12 HT_MCP_RXD13_N HT_MCP_TXD13_N AG18 CADIN13
CADON14 AG14 HT_MCP_RXD14_N HT_MCP_TXD14_N AB16 CADIN14
CADON15 AD14 HT_MCP_RXD15_N HT_MCP_TXD15_N AD16 CADIN15

CLKOP0 AJ11 HT_MCP_RX_CLK0_P HT_MCP_TX_CLK0_P AH20 CLKIP0


6 CLKOP0 CLKIP0 6
CLKON0 AH11 HT_MCP_RX_CLK0_N HT_MCP_TX_CLK0_N AG20 CLKIN0
6 CLKON0 CLKIN0 6
CLKOP1 AE12 HT_MCP_RX_CLK1_P HT_MCP_TX_CLK1_P AC18 CLKIP1
6 CLKOP1 CLKIP1 6
CLKON1 AF12 HT_MCP_RX_CLK1_N HT_MCP_TX_CLK1_N AB18 CLKIN1 CRB => 3VDUAL
6 CLKON1 CLKIN1 6 VCC3
GD => VCC3
CTLOP0 AJ15 HT_MCP_RXCTL0_P HT_MCP_TXCTL0_P AH16 CTLIP0
6 CTLOP0 CTLIP0 6
CTLON0 AH15 HT_MCP_RXCTL0_N HT_MCP_TXCTL0_N AG16 CTLIN0
6 CTLON0 CTLIN0 6
CTLOP1 AB14 RESERVED RESERVED AE16 CTLIP1 R179
6 CTLOP1 CTLIP1 6
CTLON1 AC14 RESERVED RESERVED AF16 CTLIN1 10KR0402
6 CTLON1 CTLIN1 6
VCC1.2 HT_MCP_REQ#
HT_MCP_REQ* AH25 MCP78 10K
HT_MCP_STOP* AH24 LDTSTOP#
LDTSTOP# 6
VCC_DDR R150 150R1%0402 HT_MCP_COMP_VDD AB9 HT_MCP_COMP_VDD HT_MCP_RST* AG23 LDT_RST#
LDT_RST# 6
HT_MCP_PWRGD AG24 CPU_GD
CPU_GD 6,31
R338 150R1%0402 HT_MCP_COMP_GND AB8 HT_MCP_COMP_GND

R131 R39 , R52 CLKOUT_200MHZ_P AK25 CPUCLKO_H


CPUCLKO_H 6
300R0402 CLKOUT_200MHZ_N AJ25 CPUCLKO_L
Within 600 mils of MCP68 5/5/20
CPUCLKO_L 6

B PROCHOT# AD8 PROCHOT*/GPIO20 B


6 PROCHOT#
CPU_THRIP# AE8 THERMTRIP*/GPIO58
6 CPU_THRIP# VCC1.2
VCC1.2 1.2V_PLL_CPU_HT
C179
5/10/10 Within 500 mils of MCP68
CP3 width 12 mil 70 CPU_SBVREF AF24
1.2V_PLL_CPU_HT AC15 +1.2V_PLL_CPU_HT
AB15 +3.3V_PLL_CPU CLKOUT_25MHZ AK26 CLKOUT25Mhz
12 width 8 mil
C270 C596 CLK200_TERM_GND AJ26 C244
C10u10Y0805 X_C0.1u16Y0402 5/10/10 C0.1u16Y0402
<PATH> MCP68/A1/PBGA692 Solder Side
MCP78 2.37K R185 C291
PIN AB15 MCP68 =3.3V/MCP78=1.1V 2.37KR1%0402 X_C4.7u10Y0805
Solder Side
MCP78 NC
R44
Within 1000 mils of MCP68

A A

MICRO-START INT'L CO.,LTD.


Title
MCP68-HT
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 13 of 37
5 4 3 2 1
5 4 3 2 1

U14B
PBGA692
MCP61
SEC 2 OF 8
21 PE0_RX0 H23 PE0_RX0_P PE0_TX0_P G29 PE0_TX0 21
21 PE0_RX1 H25 PE0_RX1_P PE0_TX1_P H27 PE0_TX1 21
D 21 PE0_RX2 K22 PE0_RX2_P PE0_TX2_P J27 PE0_TX2 21 D
21 PE0_RX3 K24 PE0_RX3_P PE0_TX3_P J30 PE0_TX3 21
21 PE0_RX4 K26 PE0_RX4_P PE0_TX4_P K29 PE0_TX4 21
21 PE0_RX5 M22 PE0_RX5_P PE0_TX5_P L29 PE0_TX5 21
21 PE0_RX6 M23 PE0_RX6_P PE0_TX6_P M27 PE0_TX6 21
21 PE0_RX7 M26 PE0_RX7_P PE0_TX7_P N27 PE0_TX7 21
21 PE0_RX8 P22 PE0_RX8_P PE0_TX8_P N30 PE0_TX8 21
21 PE0_RX9 P26 PE0_RX9_P PE0_TX9_P P29 PE0_TX9 21
21 PE0_RX10 P25 PE0_RX10_P PE0_TX10_P R29 PE0_TX10 21
21 PE0_RX11 T23 PE0_RX11_P PE0_TX11_P T27 PE0_TX11 21
21 PE0_RX12 T26 PE0_RX12_P PE0_TX12_P U27 PE0_TX12 21
21 PE0_RX13 U23 PE0_RX13_P PE0_TX13_P U30 PE0_TX13 21
21 PE0_RX14 V24 PE0_RX14_P PE0_TX14_P V29 PE0_TX14 21
21 PE0_RX15 V27 PE0_RX15_P PE0_TX15_P W29 PE0_TX15 21
5/5/15 5/5/15
21 PE0_RX0# H24 PE0_RX0_N PE0_TX0_N G28 PE0_TX0# 21
21 PE0_RX1# H26 PE0_RX1_N PE0_TX1_N H28 PE0_TX1# 21
21 PE0_RX2# K23 PE0_RX2_N PE0_TX2_N J28 PE0_TX2# 21
21 PE0_RX3# K25 PE0_RX3_N PE0_TX3_N J29 PE0_TX3# 21
21 PE0_RX4# K27 PE0_RX4_N PE0_TX4_N K28 PE0_TX4# 21
21 PE0_RX5# L22 PE0_RX5_N PE0_TX5_N L28 PE0_TX5# 21
21 PE0_RX6# M24 PE0_RX6_N PE0_TX6_N M28 PE0_TX6# 21
21 PE0_RX7# M25 PE0_RX7_N PE0_TX7_N N28 PE0_TX7# 21
21 PE0_RX8# P23 PE0_RX8_N PE0_TX8_N N29 PE0_TX8# 21
21 PE0_RX9# P27 PE0_RX9_N PE0_TX9_N P28 PE0_TX9# 21
21 PE0_RX10# P24 PE0_RX10_N PE0_TX10_N R28 PE0_TX10# 21
C 21 PE0_RX11# T24 PE0_RX11_N PE0_TX11_N T28 PE0_TX11# 21 C
21 PE0_RX12# T25 PE0_RX12_N PE0_TX12_N U28 PE0_TX12# 21
21 PE0_RX13# V23 PE0_RX13_N PE0_TX13_N U29 PE0_TX13# 21
21 PE0_RX14# V25 PE0_RX14_N PE0_TX14_N V28 PE0_TX14# 21
21 PE0_RX15# V26 PE0_RX15_N PE0_TX15_N W28 PE0_TX15# 21

CP24 B22 PE_WAKE*/GPIO21 PE0_REFCLK_P Y24 5/5/20


21 PE_WAKE# PE0_CLK 21
VCC3 AF27 PE0_PRSNTX1*/SDVO_SCL PE0_REFCLK_N Y23 PE0_CLK# 21
AF28 PE0_PRSNTX4*/SDVO_SDA
only D-SUB C618 AE26 PE0_PRSNTX8*
C607 C0.1u16Y0402 PE0_PRSNTX16# AF29 PE0_PRSNTX16* PE_A_TSTCLK_N AC24
21 PE0_PRSNTX16#
C10u10Y0805 PE_A_TSTCLK_P AC25

width 15 mil
W22 +1.2V_PLL_PE_SS PE_RESET* AH29 PE_RST# 21,23
30 Y22 +1.2V_PLL_PE_SS

PE_CLK_COMP AJ30 PE_COMP R189 2.37KR1%0402


VCC1.2
CP8 VCC3_PLL
30 R51
1.2V_PLL_PE 160 U22 +1.2V_PLL_PE +3.3V_PLL_PE_SS R22
V22 +1.2V_PLL_PE +3.3V_PLL_PE_SS T22
Within 500 mils of MCP68
width 25 mil
C319
C10u10Y0805 C615 <PATH> MCP68/A1/PBGA692 C605
B C0.1u16Y0402 C0.1u16Y0402 B

Solder Side
Solder Side

A A

MICRO-START INT'L CO.,LTD.


Title
MCP68-PEX X16
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 14 of 37
5 4 3 2 1
5 4 3 2 1

U14C
PBGA692
5/5/15 MCP61
SEC 3 OF 8
5/5/15
21 PE1_RX Y28 PE1_RX_P PE1_TX_P AA28 PE1_TX 21
21 PE1_RX# Y27 PE1_RX_N PE1_TX_N AA27 PE1_TX# 21
23 PE2_RX AB29 PE2_RX_P PE2_TX_P AA30 PE2_TX C340 C0.1u10X0402
D PE2_TXC 23 D
23 PE2_RX# AB28 PE2_RX_N PE2_TX_N AA29 PE2_TX# C332 C0.1u10X0402
PE2_TXC# 23
5/5/20
AK29 PEA_CLKREQ*/GPIO51 PE1_REFCLK_P Y26 PE1_CLK 21
PE1_REFCLK_N Y25 PE1_CLK# 21
21 PE1_PRSNT# AG28 PE1_PRSNT* PE2_REFCLK_P AB23 PE2_CLK 23
R196 0R0402 AG30 PE2_PRSNT* PE2_REFCLK_N AA23 PE2_CLK# 23
R193
AC27 PE_B_TSTCLK_P
Route 20 mil to R193 AC26 PE_B_TSTCLK_N
max length of 750 mils from MCP68 RESERVED AC29 Must be length-matched to the
AD27 RESERVED RESERVED AC28

TP26 I2C_DATA
AD28 RESERVED RESERVED AE27 clocks( MII_RXCLK , MII_TXCLK )
AE30 RESERVED RESERVED AE28
R193 TP27 I2C_CLK AE29 RESERVED RESERVED AB24 within 90mil instead 100 mil
MCP61P NC AJ29 AB25
AG29
RESERVED
RESERVED
RESERVED
RESERVED AB27 as stated in the design guide.
MCP68 1K/1% R192 22KR0402
MCP78
AH30 RESERVED RESERVED AB26
RN42
Close to MCP68
8P4R-0R0402

MII_RXD0 D26 RGMII_RXD0/MII_RXD0 RGMII_TXD0/MII_TXD0 A28 MIITXD0 7 8 MII_TXD0


20 MII_RXD0 MII_TXD0 20
MII_RXD1 E26 RGMII_RXD1/MII_RXD1 RGMII_TXD1/MII_TXD1 B28 MIITXD1 5 6 MII_TXD1
20 MII_RXD1 MII_TXD1 20
MCP61P R548 MII_RXD2 B26 RGMII_RXD2/MII_RXD2 RGMII_TXD2/MII_TXD2 D28 MIITXD2 3 4 MII_TXD2
20 MII_RXD2 MII_TXD2 20
MII_RXD3 B27 RGMII_RXD3/MII_RXD3 RGMII_TXD3/MII_TXD3 E27 MIITXD3 1 2 MII_TXD3
MCP68 R548 20 MII_RXD3
MII_RXCLK
MII_TXD3 20
20 MII_RXCLK A26 RGMII_RXC/MII_RXCLK RGMII_TXC/MII_TXCLK D27 MIITXCLK R224 22R0402 MII_TXCLK
MII_TXCLK 20
MCP78 R554 MII_RXDV C26 RGMII_RXCTL/MII_RXDV RGMII_TXCTL/MII_TXEN E28 MIITXEN R235 22R0402 MII_TXEN MII25MHZ C357 X_C10p50N0402
20 MII_RXDV MII_TXEN 20

C CRB MII_RXER D24 MII_RXER/GPIO36 RGMII/MII_MDC B25 C359 X_C18p50N0402 C


1.2VDUAL 20 MII_RXER MII_COL MII_MDC 20
20 MII_COL E24 MII_COL/GPIO13/MI2C_DATA RGMII/MII_MDIO A25 MII_MDIO 20
MII_CRS F23 MII_CRS/GPIO14/MI2C_CLK
20 MII_CRS
3VDUAL 3VDUAL
RGMII/MII_PWRDWN*/GPIO37 F24
MCP78 pin M9=1.1V
R223 10KR0402 MII_INTR G24 RGMII/MII_INTR*/GPIO35 BUF_25MHZ C24 MII25MHZ R238 22R0402 MII_25MHZ
MII_25MHZ 20
6 width 15 mil MII_RESET*/GPIO12 C25 MII_RST# 20 R228
+1.1V_PLL_MAC_DUAL M9 +3.3V_PLL_MAC_DUAL
R225
by layout modify Please R62 , R63 Within 500 mils of MCP68 1K/1%/4 MCP78 1K1%
within 750 mil of MCP68 and MII_VREF C27 MII_VREF
C604 C600 3VDUAL route with trace Width >7.5 mils
C10u10Y0805 X_C0.1u16Y0402
Solder Side R226 49.9R1%0402 MII_COMP_3.3V B23 MII_COMP_3P3V C363 R230
R222 49.9R1%0402 MII_COMP_GND C23 MII_COMP_GND C0.1u16Y0402 1K/1%/4

Width = 7 mils Width = 12 mils


11 R R D30 DAC_RED DDC_CLK/GPIO17 B6 Y7 NC => Stuff R228 , R532
DDC_CLK 11
G D29 DAC_GREEN DDC_DATA/GPIO19 A6
11 G
B
DDC_DATA 11 NC R565 , R566 , C653 , C654 , R368
11 B C30 DAC_BLUE
Y7 Stuff => NC R228 , R532
Stuff R565 , R566 , C653 , C654 , R368
R227 R232 11 HSYNC# HSYNC# B30 DAC_HSYNC
150R0402 R229 150R0402 VSYNC# C29 DAC_VSYNC JTAG_TCK M7 R176 10KR0402 R373
11 VSYNC#
150R0402 <750 mils JTAG_TDI M5 MCP61P NC
JTAG_TDO M6
JTAG_TMS M8 MCP68 Stuff up
R345 124R1%0402 DAC_RSET B29 DAC_RSET JTAG_TRST* L9 R342 10KR0402 MCP78
B B
C361 DAC_VREF A29 DAC_VREF
C0.1u16Y0402 <500 mils XTALIN K7 XTAL_IN
PLACE NEAR MCP68 XTALOUT K8 XTAL_OUT
R72,C198 Y1
1 2
VCC3 5 / 10 / 10 XTALIN_RTC K6 XTALIN_RTC
CP25 100 XTALOUT_RTC K5 XTALOUT_RTC 25MHZ18P_D-4
3.3V_DAC F28 +3.3V_DAC
width 8 mil Ref to GND 1 2 C245 C246
C27p50N0402 C27p50N0402
C622 C621

3
4
X_C0.1u16Y0402 C10u10Y0805 <PATH> MCP68/A1/PBGA692 C314 C316
C18p50N0402 C18p50N0402

Solder Side
Y3 Y1, Y2
32.768KHZ12.5P_D
Within 1000 mils of MCP68

A A

MICRO-START INT'L CO.,LTD.


Title
MCP68-PEX & MII & DAC
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 15 of 37
5 4 3 2 1
5 4 3 2 1

U14D
PBGA692 VCC3
MCP61
AD[31..0] SEC 4 OF 8 RN46
22 AD[31..0]
AD0 D14 PCI_AD0 PCI_REQ0* G12 PCI_REQ0# 8P4R-8.2KR0402-1
AD1 E14 PCI_AD1 PCI_REQ1* A10 PCI_REQ1# PCI_REQ0# 1 2
AD2 A13 PCI_AD2 PCI_REQ2*/GPIO40/RS232_DSR* C11 PCI_REQ2# PCI_REQ4# 3 4
AD3 C14 PCI_AD3 PCI_REQ3*/GPIO38/RS232_CTS* H14 PCI_REQ3# PCI_REQ1# 5 6
PCI_REQ3# 22
AD4 A14 PCI_AD4 PCI_REQ4*/GPIO52/RS232_SIN* D13 PCI_REQ4# PCI_REQ2# 7 8
D PCI_REQ4# 22 D
AD5 B14 PCI_AD5
AD6 C15 PCI_AD6 PME# R278 X_8.2KR0402
AD7 J16 PCI_AD7
AD8 G16 PCI_AD8 PCI_GNT0* A9 PCI_GNT0# TP24 PCI_REQ3# R343 8.2KR0402
AD9 F16 PCI_AD9 PCI_GNT1* C10 PCI_GNT1# TP25 RN50
AD10 E16 PCI_AD10 PCI_GNT2*/GPIO41/RS232_DTR* B10 PCI_GNT2# TP4 8P4R-8.2KR0402-1
AD11 B15 PCI_AD11 PCI_GNT3*/GPIO39/RS232_RTS* J14 PCI_GNT3# PCI_INTZ# 1 2
AD12 PCI_GNT4# PCI_GNT3# 22 PCI_INTX#
D16 PCI_AD12 PCI_GNT4*/GPIO53/RS232_SOUT* C12 PCI_GNT4# 22 3 4
AD13 C16 PCI_AD13 PCI_INTY# 5 6
AD14 D17 PCI_AD14 PCI_INTW# 7 8
AD15 C17 PCI_AD15
AD16 J19 PCI_AD16 PCI_INTW* C22 PCI_INTW#
PCI_INTW# 22
AD17 J20 PCI_AD17 PCI_INTX* D22 PCI_INTX#
PCI_INTX# 22
AD18 H20 PCI_AD18 PCI_INTY* A22 PCI_INTY#
PCI_INTY# 22
AD19 G20 PCI_AD19 PCI_INTZ* A21 PCI_INTZ#
PCI_INTZ# 22
AD20 F20 PCI_AD20
AD21 E20 PCI_AD21
AD22 B18 PCI_AD22
AD23 C19 PCI_AD23 PCI_CLK0 B13 PCICLK0 PCICLK2 R203 22R0402 PCICLK0 C323 X_C10p50N0402
PCICLK_SLOT2 22
AD24 D20 PCI_AD24 PCI_CLK1 F14 PCICLK1 PCICLK2 C321 X_C10p50N0402
AD25 C20 PCI_AD25 PCI_CLK2 D12 PCICLK2 PCICLK1 R205 22R0402 PCICLK1 C325 X_C10p50N0402
PCICLK_SLOT1 22
AD26 D21 PCI_AD26 PCI_CLK3 E12 PCICLK3 PCICLK3 C326 X_C10p50N0402
AD27 C21 PCI_AD27 PCI_CLK4 H12 PCICLK4 PCICLK4 C317 X_C10p50N0402
AD28 B21 PCI_AD28
AD29 H22 PCI_AD29 RN37,R366,R397,C266,C269,C264,C535,C536
AD30 G22 PCI_AD30 PCI_CLKIN J12 PCI_CLKIN R200 22R0402
AD31 F22 PCI_AD31
Within 500 mils of MCP68
C_BE#[3..0]
22 C_BE#[3..0]
C C_BE#0
PCI_C/BE*0
H16 PCI_CBE0* C
C_BE#1
PCI_C/BE*1
B17 PCI_CBE1*
C_BE#2 A18 PCI_CBE2* Length=PCI slot clock + 3 inchs
C_BE#3
PCI_C/BE*3
B19 PCI_CBE3*

FRAME# C18 PCI_FRAME* LPC length should be less than 18 inches.


22 FRAME#
IRDY# A17 PCI_IRDY*
22 IRDY#
TRDY# D18 PCI_TRDY* LPC_AD0 G10 LPCAD0 LPCAD0 1 2 LPC_AD0
22 TRDY# LPC_AD[3..0] 27
STOP# F18 PCI_STOP* LPC_AD1 F10 LPCAD1 LPCAD1 3 4 LPC_AD1
22 STOP#
DEVSEL# E18 PCI_DEVSEL* LPC_AD2 D10 LPCAD2 LPCAD3 5 6 LPC_AD3
22 DEVSEL#
PAR J18 PCI_PAR LPC_AD3 E10 LPCAD3 LPCAD2 7 8 LPC_AD2 LPC_FRAME#
22 PAR
PERR# G18 PCI_PERR*/GPIO43/RS232_DCD*
22 PERR# SERR# VCC3
H18 PCI_SERR* RN37
22 SERR#
PME# E22 PCI_PME*/GPIO30 8P4R-22R0402 R193
22 PME# STRAP
R213 X_10KR0402 10KR0402
LPC_PWRDWN*/GPIO54/EXT_NMI* C8 LPC_PD# TPM U22 => R367 NC
LPC_FRAME* H10 R190 22R0402 HDA_SDOUT
LPC_FRAME# 27 if U22 NC => R367 Stuff LPC_FRAME
LPC_DRQ0*/GPIO50 C9 LPC_DRQ#0 27
LPC_DRQ1*/GPIO15/FANRPM1 B9 DEFAULT*
R219 33R0402 PCI_RESET1# C13 PCI_RESET0* LPC_SERIRQ J10
22 PCIRST_SLOT1# SERIRQ 27
R344 33R0402 PCI_RESET2# 00 = LPC BIOS*
22 PCIRST_SLOT2# G14 PCI_RESET1* R217 , C270 ; R218 , C272 01 = PCI BIOS
R211 33R0402 HDDRST# B11 PCI_RESET2*
Within 500 mils of MCP68 10 = SPI BIOS
24 HD_RST# 11 = RESERVED
R210 33R0402 JTPMRST# F12 PCI_RESET3* LPC_CLK0 E8 SIOPCLK R202 33R0402
27 JTPM_RST# SIO_PCLK 27
R204 33R0402 SIORST# D9 LPC_RESET* HDA_SDOUT ; LPC_FRAME
27 SIO_RST#
LPC_CLK1 D8 LPCPCLK R212 22R0402
B LPC_PCLK 27 MCP61 CRB : 10K pull 3VDUAL B
<PATH> JLPC1 Stuff => R218 , R331 , R330 Stuff MCP68 CRB : 10K pull VCC3
C320 C327
X_C10p50N0402 X_C10p50N0402
JLPC1 Nc => R218 , R331 , R330 NC MCP61 / 68 Design Guide : 8.2K pull VCC3
MCP68/A1/PBGA692

A A

MICRO-START INT'L CO.,LTD.


Title
MCP68-PCI & LPC
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 16 of 37
5 4 3 2 1
5 4 3 2 1

Trace lengths must be less 8 inches


U14E
Cap Near SATA CONNECTOR PBGA692
SATA1 MCP61
1 SEC 5 OF 8 PDD[15..0]
GND PDD[15..0] 24
2 TXPA0 C458 C0.01u25X0402 TXP_A0 V2 SATA_A0_TX_P IDE_DATA_P0 AJ3 PDD0
HT+ TXNA0 C459 C0.01u25X0402 TXN_A0 PDD1
HT- 3 V1 SATA_A0_TX_N IDE_DATA_P1 AJ2
4 IDE_DATA_P2 AH3 PDD2
GND RXNA0 C460 C0.01u25X0402 RXN_A0 PDD3
HR- 5 W3 SATA_A0_RX_N IDE_DATA_P3 AH1
6 RXPA0 C461 C0.01u25X0402 RXP_A0 W2 SATA_A0_RX_P IDE_DATA_P4 AG2 PDD4
HR+ PDD5
GND 7 IDE_DATA_P5 AF2
IDE_DATA_P6 AF4 PDD6
D D
SATA_Purple AE6 PDD7
N5N-07M0231-H06 SATA2
IDE_DATA_P7
IDE_DATA_P8 AE5 PDD8
PDD9
GND 1 TXPA1 C440 C0.01u25X0402 TXP_A1
IDE_DATA_P9 AF5
PDD10
HT+ 2 TXNA1 C441 C0.01u25X0402 TXN_A1
Y8 SATA_A1_TX_P IDE_DATA_P10 AF3
PDD11
HT- 3 Y7 SATA_A1_TX_N IDE_DATA_P11 AG1
PDD12
GND 4 RXNA1 C442 C0.01u25X0402 RXN_A1
IDE_DATA_P12 AG3
PDD13
HR- 5 RXPA1 C443 C0.01u25X0402 RXP_A1
Y5 SATA_A1_RX_N IDE_DATA_P13 AH2
PDD14
HR+ 6 Y6 SATA_A1_RX_P IDE_DATA_P14 AJ1
PDD15
GND 7 IDE_DATA_P15 AK2

SATA_Purple IDE_ADDR_P0 AG6 PD_A0 24


IDE_ADDR_P1 AJ5 PD_A1 24
GND 1 IDE_ADDR_P2 AH6 PD_A2 24
SATA3 2 TXPB0 C452 C0.01u25X0402 TXP_B0 Y4 SATA_B0_TX_P
SATA_Purple HT+ TXNB0 C453 C0.01u25X0402 TXN_B0
HT- 3 Y3 SATA_B0_TX_N IDE_CS1_P* AK6 PD_CS#1 24
GND 4 IDE_CS3_P* AJ6 PD_CS#3 24
5 RXNB0 C454 C0.01u25X0402 RXN_B0 AA4 SATA_B0_RX_N IDE_DACK_P* AG5
HR- PD_DACK# 24
6 RXPB0 C455 C0.01u25X0402 RXP_B0 AA3 SATA_B0_RX_P IDE_IOW_P* AH4
HR+ PD_IOW# 24
MCP61P NC GND 7 IDE_INTR_P AH5 IRQ14 24
MCP68 Stuff up IDE_DREQ_P AK3 PD_DREQ 24
IDE_IOR_P* AJ4 PD_IOR#_R R152 33R0402
MCP78 Stuff up PD_IOR# 24
IDE_RDY_P AK4 PD_IORDY 24
GND 1 CABLE_DET_P/GPIO63 AF6 PD_DET 24
2 TXPB1 C444 C0.01u25X0402 TXP_B1 AA2 SATA_B1_TX_P
SATA4 HT+ TXNB1 C445 C0.01u25X0402 TXN_B1 VCC3
HT- 3 AA1 SATA_B1_TX_N
SATA_Purple 4
GND RXNB1 C446 C0.01u25X0402 RXN_B1
HR- 5 AB1 SATA_B1_RX_N
6 RXPB1 C447 C0.01u25X0402 RXP_B1 AB2 SATA_B1_RX_P
HR+ R163
GND 7
C 121R1%0402 C

IDE_COMP_3P3 AD5 IDE_COMP_3P3V


IDE_COMP_GND AD6 IDE_COMP_GND

R158
121R1%0402

AC3 RESERVED SATA_LED*/GPIO57 A5 SATA_LED 32


AC2 RESERVED
AD4 RESERVED
AD3 RESERVED
AE4 RESERVED
R340
MCP78 SATA AE3 SATA_TSTCLK_P AA6 SATA_TSTCLK_P X_100R0402
RESERVED
AE1 RESERVED SATA_TSTCLK_N AB6 SATA_TSTCLK_N
AE2 RESERVED
80 R339
1.2V_PLL_CPU_HT Y9 +1.2V_PLL_SP_VDD 2.49KR1%0402
VCC3 SATA_TERMP AB5 SATA_TERMP
VCC3_PLL R106
VCC1.2 8
width 25 mil U13 +1.2V_PLL_SP_SS
Within500 mils of MCP68
CP7 U12 +3.3V_PLL_SP_SS
30 V12 +3.3V_PLL_LEG
CP22 18 M12 +3.3V_PLL_DISP
25
B
MCP61P R107 B
C616 C597 C309 C599
MCP68 R107 X_C0.1u16Y0402 X_C0.1u16Y0402 C10u10Y0805 C10u10Y0805
MCP78 R185 <PATH> MCP68/A1/PBGA692

Solder Side

A A

MICRO-START INT'L CO.,LTD.


Title
MCP68-SATA & IDE
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 17 of 37
5 4 3 2 1
5 4 3 2 1

HDA_SDOUT ; LPC_FRAME
RN30
MCP61 CRB : 10K pull 3VDUAL 8P4R-15KR0402
MCP68 CRB : 10K pull VCC3 USBP4 1 2
MCP61 / 68 Design Guide : 8.2K pull VCC3 USBN4 3 4
USBP5 5 6
RN36 HDA_BITCLK U14F USBN5
PBGA692 7 8
8P4R-22R0402
HDA_RST# 2 1 HDARST# MCP61 RN34
HDA_SYNC 4 3 HDASYNC C310 SEC 6 OF 8 8P4R-15KR0402
26 HDA_BITCLK_R 6 5 HDA_BITCLK X_C10p50N0402 B7 GP_REFCLK USB0_P M3 USBP0
USBP0 25
USBP1 1 2
26 HDA_SDOUT 8 7 HDASDOUT B4 HDA_BCLK USB0_N M4 USBN0
USBN0 25
USBN1 3 4
USBP0 5 6
USB1_P N3 USBP1 USBN0 7 8
USBP1 25
R301 HDASDOUT A3 HDA_SDATA_OUT0/GPIO45 USB1_N N4 USBN1
D
USBN1 25 D
10KR0402 26 HDA_SDIN0 A2 HDA_SDATA_IN0/GPIO22 RN32
3VDUAL B1 N1 USBP2 8P4R-15KR0402
HDA_SDATA_IN1/GPIO23/MGPIO0 USB2_P USBP2 25
STRAP C308 B2 USB2_N N2 USBN2 USBP3 1 2
RESERVED USBN2 25
X_C10p50N0402 USBN3 3 4
HDA_SDOUT P1 USBP3 USBP2 5 6
USB3_P USBP3 25
LPC_FRAME R289 P2 USBN3 USBN2 7 8
USB3_N USBN3 25
DEFAULT* 10KR0402
USB4_P R2 USBP4 RN28
USBP4 25
00 = LPC BIOS* HDA_RST# HDARST# C3 HDA_RESET* USB4_N R3 USBN4 8P4R-15KR0402
26 HDA_RST# USBN4 25
01 = PCI BIOS HDASYNC B3 HDA_SYNC/GPIO44 USBP7 1 2
10 = SPI BIOS HDA_RST* USB5_P P3 USBP5 USBN7 3 4
USBP5 25
11 = RESERVED 1 = *RGMII R292 USB5_N P4 USBN5 USBP6 5 6
USBN5 25
0 = MII X_10KR0402 C300 C307 F2 GPIO_1 USBN6 7 8
X_C10p50N0402 X_C10p50N0402 F1 GPIO_2/NMI* USB6_P T3 USBP6
USBP6 25
F6 GPIO_3/SMI* USB6_N T4 USBN6 RN31
USBN6 25
J8 GPIO_4/SCI_INTR* 8P4R-15KR0402
25 USB_EN
G3 GPIO_5/INIT* USB7_P U3 USBP7 USBP9 1 2
USBP7 25
G5 GPIO_6/FERR*/SYS_FERR* USB7_N U4 USBN7 USBN9 3 4
VCC3 USBN7 25
G6 GPIO_7/NFERR*/SYS_PERR* USBP8 5 6
HDA_SYNC USB8_P T6 USBP8 USBN8 7 8
(SIO CLK) D3 GPIO_8/SPI_DI USB8_N T5 USBN8
1 = *24MHZ D4 GPIO_9/SPI_DO RN29
0 = 14.318MHZ R297 E4 GPIO_10/SPI_CS USB9_P T8 USBP9 8P4R-15KR0402 RN41
* = DEFAULT 10KR0402 E3 GPIO_11/SPI_CLK USB9_N T7 USBN9 USBN10 1 2
USBP10 3 4
MCP61 NC
26 HDA_SYNC
HDA_SYNC D5 RESERVED
USBP11 5 6 MCP68 Stuff up
E5 RESERVED
USBN11 7 8 MCP78
USB_OC0*/GPIO25 P7 OC#0
OC#0 27
R296 USB_OC1*/GPIO26 P8 OC#1
OC#1 27
X_10KR0402 USB_OC2*/GPIO27 P9 OC#2 Close to MCP61 R341 845OHM
OC#2 27
USB_OC3*/GPIO28/MGPIO1 P5 OC#3
USB_OC4*/GPIO29 P6
OC#3 27 MCP78 DA-03365-001_v06
C C
USB_RBIAS_GND T9 USB_RBIAS_GND R341 845R1% OC#0 OC#1 OC#2 OC#3

12/05
H9 C281 C272 C590 C589 R165 MCP68
RESERVED
AE7 C0.01u25X0402 C0.01u25X0402 C0.01u25X0402 C0.01u25X0402
DG 1Meg Ohm.
RESERVED CPU_THERM_ALERT 8
RESERVED V5 USBP10 CRB 49.9KOhm.
RESERVED V4 USBN10 R148 Close to MCP61
V7 USBP11
RESERVED Within 2000 mils of MCP68
POWER SEQUENCE
RESERVED V6 USBN11
Trace width at least 8 mil
A20GATE/GPIO55 F5 A20GATE 27
K2 INTRUDER# R180 49.9KR1%0402 3VDUAL MCP68 CRB SIO OVT# OUTPUT
INTRUDER* VBAT
EXT_SMI*/GPIO32 F3 EXT_SMI# R182 X_4.7KR0402 3VDUAL USED FOR EXT_SMI*
R186 0R0402 MEM_VLD RI*/GPIO33 H4 RI# R181 X_4.7KR0402 3VDUAL
29,30 SLP_S5#
SPKR C7 SPKR
SPKR 32 GPIO_G3 18,29
PWRBTN* G4 PWRBTN#
PWRBTN# 27
C283 SIO_PME*/GPIO31 F4 SIO_PME# R183 R184
SIO_PME# 27
X_C0.1u16Y0402 KBRDRSTIN*/GPIO56 A4 KBRST# 2.7KR0402 2.7KR0402
KBRST# 27
SMB_CLK0 C2 SMB_MEM_CLK
SMB_MEM_CLK 10
RTC_RST# K4 RTC_RST* SMB_DATA0 C1 SMB_MEM_DATA
SMB_MEM_DATA 10
SMB_CLK1/MSMB_CLK D2 SMBCLK
SMBCLK 21,22,29,31
VCORE_EN R177 X_0R0402 VCORE_VLD MEM_VLD J3 MEM_VLD SMB_DATA1/MSMB_DATA E2 SMBDATA
SMBDATA 21,22,29,31
HT_VLD H3 HT_VLD +3.3V_VBAT K3 5
29 HT_VLD VBAT
HT_EN J4 MCPVDD_EN BUF_SIO_CLK B5 SIOCLK_24M R195 22R0402
29 HT_EN SIO_24M 27
C266 VCORE_VLD J1 CPU_VLD SUS_CLK/GPIO34 E1
31 VCORE_VLD
X_C0.1u16Y0402 VCORE_EN J2 CPUVDD_EN THERM*/GPIO59 C6 THRM#
31 VCORE_EN THRM# 27
RSTBTN* H5 FP_RST#
FP_RST# 27
SLP_S5* H8 SLP_S5# C318 Y6 NC => Stuff R383 , R564
SLP_S5# 29,30
SLP_S3* G8 SLP_S3# X_C10p50N0402
HT_VLD PWRGD_SB H6 RSMRST#
SLP_S3# 27,29 NC R562 , R563 C509 , C526
RSMRST# 27
B
PWRGD G2 ATX_PWR_OK
ATX_PWR_OK 27,32
Y6 Stuff => NC R383 , R564 B
FANRPM0/GPIO60 E6 Stuff R562 , R563 C509 , C526
C288 FANCTL0/GPIO61 D6
C0.1u16Y0402 FANCTL1/GPIO62 C5
L8 PKG_TEST THERM_SIC/GPIO48 AH7 THERMSIC TP3 R207,C263,R383,C559
R188 1KR0402 TEST_MODE_EN F8 TEST_MODE_EN THERM_SID/GPIO49 AF8 THERMSID TP23
Within 500 mils of MCP68
<PATH> MCP68/A1/PBGA692 5/10/10
for NV R453 , R454 Stuff
for SIO R453 , R454 NC
VBAT CMOS CLEAR JUMPER
width 15 mil JBAT1 Clear CMOS
1-2 Normal
3VDUAL D23 2-3 Clear CMOS
S-BAT54C_SOT23
1 JBAT1 SPKR Strapping
3 R286 49.9KR1%0402 1 VCC3
2 RTC_RST# 2
G 1 = SAFE MODE ( TCO )
3

2 1 R280 1KR0402 C469 C475 C311 N31-1030151+N33-1020271-RH R295


C10u10Y0805 X_C1u10Y C0.1u16Y0402 X_1KR0402
VBAT1
BAT2P_BLACK-RH-1 SPKR
N91-01F0151-H06 N41-1030141-H06
0 = USER*(Normal) R302
1KR0402

A A

MICRO-START INT'L CO.,LTD.


Title
MCP68-HDA & USB & MISC
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 18 of 37
5 4 3 2 1
5 4 3 2 1

U14H
PBGA692
P19 GND
MCP61 GND M15
H19 GND SEC 8 OF 8 GND AK14
700 4500 AE11 GND GND P15
U14G D7 GND GND W6
VCC1.2
PBGA692 VCC1.2
1280 G27 GND GND N19
AB7 GND GND AC8
VCC1.2 MCP61 1P2V_PEA T15 GND GND N12
SEC 7 OF 8 U2 GND GND N14
AK27 +1.2V +1.2V_HT W15 P13 GND GND P14
D AH27 +1.2V +1.2V_HT W16 CP23 AC9 GND GND M14 D
AJ27 +1.2V +1.2V_HT W17 N25 GND GND M13
AG26 +1.2V G26 GND GND U1
AG25 +1.2V +1.2V_PEA AK28 F17 GND GND R9
U18 +1.2V +1.2V_PEA AJ28 F15 GND GND N9
AE22 +1.2V +1.2V_PEA AH28 F13 GND GND P12
AE23 +1.2V +1.2V_PEA AG27 F11 GND GND D23
V19 +1.2V +1.2V_PEA AF26 F9 GND GND AK30
V18 +1.2V +1.2V_PEA AE25 D25 GND GND H7
U19 +1.2V +1.2V_PEA AD24 H17 GND GND A30
W19 +1.2V +1.2V_PEA AC23 D19 GND GND AB3
W18 +1.2V J17 GND GND K9
V15 +1.2V H13 GND GND F30
U16 +1.2V AH26 GND GND N8
T14 +1.2V
VCC1.2 320 AA9 GND GND F7
W14 +1.2V AE21 GND GND J21
VCC1.2 1P2V_SP_A
AB21 +1.2V +1.2V_SP_D V13 BACK SIDE AE19 GND GND K1
AC21 +1.2V +1.2V_SP_D W13 AE17 GND GND AB30
U14 +1.2V +1.2V_SP_D V14 AE15 GND GND V30
T18 +1.2V +1.2V_SP_D W12 1P2V_SP_A AE13 GND GND P30
U15 +1.2V CP21 AA8 GND GND K30
R15 +1.2V AF30 GND GND H21
V17 +1.2V AK22 GND GND AD26
V16 +1.2V +1.2V_SP_A W9 AG19 GND GND AA25
R17 +1.2V +1.2V_SP_A W8 C591 C587 C585 C586 AK18 GND GND W25
T16 +1.2V +1.2V_SP_A V8 C1u10Y C1u10Y C0.1u16Y0402 C0.1u16Y0402 AG15 GND GND U25
U17 +1.2V +1.2V_SP_A V9 C4 GND GND R25
C R19 +1.2V +1.2V_SP_A U9 BACK SIDE E30 GND GND L25 C
225 D15 GND GND J25
D11 GND GND W27
VCC3 J6 GND GND N13
1.2VDUAL L6 GND GND R27
AB22 +1.2V_PED N6 GND GND L27
AE24 +1.2V_PED +1.2V_DUAL F26 R6 GND GND W23
AD22 +1.2V_PED +1.2V_DUAL F27 U6 GND GND U8
AA22 +1.2V_PED C617 C372 C611 N22 GND GND J9
AC22 +1.2V_PED C0.1u16Y0402 C0.1u16Y0402 C0.1u16Y0402 R13 GND GND AE9
M19 GND GND AG7
3VDUAL AK1 GND GND F25
J23 GND GND P18
+3.3V_DUAL L4 R23 GND GND F21
+3.3V_DUAL J22 200 M18 GND GND F19
3VDUAL N18 GND GND F29
VCC3 +3.3V_USB_DUAL L3 350 P16 GND GND AK5
+3.3V_USB_DUAL L2 N15 GND GND R4
H15 +3.3V R18 GND GND V3
400 J15 +3.3V T13 GND GND W4
AC6 +3.3V C598 C619 C277 T17 GND GND AC4
AC5 +3.3V X_C0.1u16Y0402 C0.1u16Y0402 C0.1u16Y0402 M17 GND GND C28
L23 GND GND T19
<PATH> MCP68/A1/PBGA692 P17 GND GND AC13
J11 GND GND AK10
R16 GND GND AF1
A1 GND GND AG4
B PLACE ON BACK SIDE J13 GND GND R8 B
M16 GND GND A27
CENTER OF MCP68 BACK SIDE N16 GND GND H11
N17 GND GND D1
AG11 GND GND AC19
VCC1.2 VCC1.2 N23 GND GND AC17
R14 GND GND E29
T12 GND GND AJ7
R12 GND GND AB4
AC7 GND
C285 C588 C287 C242 C592 C593 C299 C594 C286
C1u10Y X_C1u10Y X_C0.01u25X0402 C1u10Y C1u10Y X_C1u10Y X_C0.1u16Y0402 C0.1u16Y0402 C0.1u16Y0402 <PATH> MCP68/A1/PBGA692

VCC1.2 Place close to Q34


VCC1.2
Place close to Q22
C610 C10u10Y0805
BACK SIDE
C284 C10u10Y0805
1.2VDUAL 1P2V_PEA
C217 C0.01u25X0402 C207 C10u10Y0805

C297 C0.01u25X0402

C620 C365 C612 C614 C608 C609 C603 C302 C601 C602
C0.1u16Y0402 X_C0.1u16Y0402 C1u10Y C1u10Y C0.1u16Y0402 C0.1u16Y0402 C0.1u16Y0402 C0.1u16Y0402 C0.1u16Y0402 C0.1u16Y0402

VCC1.2
A A
C269 X_C10u10Y0805

1P2V_PEA C274 C10u10Y0805

C595 C0.1u16Y0402
MICRO-START INT'L CO.,LTD.
C265 C0.01u25X0402 Title
C305 C613 C606 MCP68-Power & GND
X_C1u10Y X_C1u10Y X_C0.1u16Y0402
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 19 of 37
5 4 3 2 1
5 4 3 2 1

3VDUAL
AVDD1_5
U16 AVDD1_8
R201 10KR0402 MII_MDIO 44 48
15 MII_MDC MDC DVDD15 AVDD1_5
MII_MDIO 46 54
15 MII_MDIO MDIO DVDD15
R207 4.7KR0402 MII_CRS config7 56 65
INTB(config7) DVDD15 C335 C330 C328 C315
DVDD15 87
R208 4.7KR0402 MII_COL 68 X_C0.1u16Y0402 X_C0.1u16Y0402 X_C0.1u16Y0402 X_C0.1u16Y0402 C262 C261 C263
15 MII_CRS CRS(config5)
66 29 3VDUAL X_C0.1u16Y0402 X_C0.1u16Y0402 X_C0.1u16Y0402
15 MII_COL COL(config6) DVDD33
RN38 37 35
15 MII_TXD0 TXD0 DVDD33
1 2 config9 38 50
15 MII_TXD1 TXD1 DVDD33
3 4 config7 40 61
15 MII_TXD2 TXD2 DVDD33
5 6 MII_RXER 41 71 3VDUAL
15 MII_TXD3 TXD3 DVDD33
7 8 config0 36 82
D 15 MII_TXCLK TXC DVDD33 D
15 MII_TXEN 42
8P4R-4.7KR0402 TXDLY TX_CTL(TXEN)
78 95 AVDD1_5
TXDLY AVDD15
15 MII_RXD0 27
RXD0 C290 C293 C337 C324
15 MII_RXD1 30 3 AVDD1_8
RXD1 AVDD18 C0.1u16Y0402 X_C0.1u16Y0402 C0.1u16Y0402 C0.1u16Y0402
15 MII_RXD2 31 8
RXD2 AVDD18
15 MII_RXD3 33 15
R231 33R0402 RGMII_RXCLK RGMII_RXCLK RXD3 AVDD18
15 MII_RXCLK 34 19 CP5
RXC AVDD18
15 MII_RXDV 26 R773 close to Pin.1 X_CP003
RXDLY RX_CTL(RXDV)
79 12 3VDUAL
C364 RXDLY AVDD33
15 MII_RXER 51 91
X_C33p50N0402 RX_ER(config8) AVDD33
TR_D0+ 4 1 R175 2.49KR1%0402 L6 X_150L2.5A-50_0805-RH
TR_D0- MDIP0 RSET MII_RST#
5 57 MII_RST# 15
MDIN0 PHYRSTB

C258
TR_D1+ 9 13 CTRL1_8 Integrated Gigabit LAN Transform
TR_D1- MDIP1 CTRL18 CTRL1_5 C289 TR_D0+ R168 X_49.9R1%0402 C253 X_C0.1u16Y0402
Reserve for EMI 10 96
TR_D2+ MDIN1 CRTL15 C1u10Y TR_D0- R167 X_49.9R1%0402
16
MDIP2

X_C0.1u16Y0402
TR_D2- 17 60
RN35 TR_D3+ MDIN2 CLK125 XTALO TR_D1+ R166 X_49.9R1%0402 C252 X_C0.1u16Y0402
20 93
config4 TR_D3- MDIP3 XTAL2 LAN_25MCLK TR_D1- R165 X_49.9R1%0402
1 2 21 92
config3 MDIN3 XTAL1
3 4
5 6 config2 58 97 TR_D2+ R174 X_49.9R1%0402 C251 X_C0.1u16Y0402
config1 LINK_ACT# LED_TX AGND TR_D2- R173 X_49.9R1%0402
7 8 59
LED_RX AGND
94
LED_ACT# 62 22
8P4R-4.7KR0402 LINK1000# LED_DUPLEX AGND TR_D3+ R172 X_49.9R1%0402 C255 X_C0.1u16Y0402
63 18
LINK100# LED_LINK1000 AGND TR_D3- R171 X_49.9R1%0402
70 14
C334 X_C0.01u16X0402 LED_ACT# LED_LINK100 AGND
76 11
LED_LINK10 AGND
6
config0 AGND
85
config1 84
config[0]
88
LAN CONNECTOR C296 X_C0.01u25X0402
config2 config[1] GND
83 86
R194 4.7KR0402 RXDLY config3 config[2] GND C223 C0.01u25X0402
81 77
config4 config[3] GND
C 80 75 C
R197 4.7KR0402 TXDLY config9 config[4] GND
49 69
config[9] GND LAN_USB1B
67
GND R143 330R
SPDLED
100 64 3VDUAL 19 AMBER+
NC GND XTALO C273 X_C27p50N0402 R148 LINK_ACT#
X_0R
99 55 LANV25 20 AMBER-
NC GND R162 LPWR
X_0R NC
98 53 AVDD1_8 13
3VDUAL NC GND TR_D0+ TD1+
90 52 18
NC GND

1
89 47 Y2 TR_D0- 12 TD1-
NC GND X_25MHZ18P_D-1 C247 TR_D1+ TD2+
74 45 17
NC GND X_C0.1u16Y0402 TR_D1- TD2-
73 43 11

2
NC GND TR_D2+ TD3+
72 39 16
C238 NC GND LAN_25MCLK C278 X_C27p50N0402 R146 TR_D2- TD3-
24 32 10
C10u10Y0805 NC GND TR_D3+ TD4+
23 28 X_0R0402 15
AVDD1_8 NC GND R178 0R/4 TR_D3- TD4-
7 25 9
2
NC
NC
RTL8211B_100pin GND 15 MII_25MHZ
C226 C0.1u16Y0402 LGND 14 NC
L9 300L600mA-150-RH Q24 3VDUAL R155 330R LINK1000# 21 GREEN+
3 2 P-BCP69_SOT223 RTL8211BL LINK100# R157 0R0402 22 GREEN-
4 ACTLED R161 X_0R0402
RJ45_USBX2_LEDX2_TX-GIGA-RH-1
C237

C257

C259

C256

for EMI 1/8 C248


C10u10Y0805

C0.1u16Y0402

C0.1u16Y0402

C0.1u16Y0402
1

C10u10Y0805 C235 C623


C0.01u25X0402 C0.01u25X0402

CP4
close to Q46 X_CP003
CTRL1_8 EMI request 1027
CP6
X_CP003
U17

MII_MDC 25 32 L7 X_150L2.5A-50_0805-RH
15 MII_MDC MDC AVDD25 LANV25
MII_MDIO 26 36 L5 X_150L2.5A-50_0805-RH 3VDUAL
B C353 15 MII_MDIO MDIO AVDD33 B
3VDUAL MII_TXD0 6
15 MII_TXD0 TXD0 C0.1u16Y0402
MII_TXD1 5
15 MII_TXD1 TXD1 C264

C271

C295

C292
MII_TXD2

X_C10u10Y0805

X_C10u10Y0805

X_C0.1u16Y0402
15 MII_TXD2 4 29
MII_TXD3 TXD2 AGND
15 MII_TXD3 3 35
X_C10p50N0402 MII_TXEN TXD3 AGND
15 MII_TXEN 2 TXEN
C362 MII_TXCLK R214 X_22R0402
RN40 MII_TXCLK_R 7
15 MII_TXCLK TXC
C10u10Y0805 X_8P4R-22R0402 MII_RXDV 22
15 MII_RXDV RXDV
AVDD1_5 MII_RXD1 1 2 MII_R_RXD0 21 27 EMI request 1027
15 MII_RXD1 RXD0 NC
MII_RXD0 3 4 MII_R_RXD1 20 C138 from 0603 change to 0402
15 MII_RXD0 RXD1
L10 300L600mA-150-RH Q26 MII_RXD3 5 6 MII_R_RXD2 19
15 MII_RXD3 RXD2
3 2 P-BCP69_SOT223 MII_RXD2 7 8 MII_R_RXD3 18
15 MII_RXD2 RXD3
4 RGMII_RXCLK 16 31
MII_COL RXC TPRX+ TR_D1-
15 MII_COL 1 30
COL TPRX-
C331

C338

C301

C279

for EMI 1/8 C339 MII_CRS TR_D1+


C10u10Y0805

23
C0.1u16Y0402

C0.1u16Y0402

C0.1u16Y0402
1

15 MII_CRS CRS
C10u10Y0805 MII_RXER 24 TR_D0-
15 MII_RXER RXER/FXEN
LAN_25MCLK 46 33 TR_D0+
XTALO X1 TPTX-
47 34
X2 TPTX+
close to Q48 3VDUAL
R209 X_4.7KR0402 ACTLED 9
CTRL1_5 LED0/PHYAD0 R187 X_2KR1%0402 8201CL:2K
8 7 10 LED1/PHYAD1 RTSET 28
6 5 12
LED2/PHYAD2 ISOLATE
43 8201BL:5.9K
4 3 SPDLED 13 40
CP9 LED3/PHYAD3 RPTR
2 1 15 39
X_CP003 LED4/PHYAD4 SPEED
38
RN39 X_8P4R-4.7KR0402 DUPLEX 3VDUAL
LANV25 8 37 3VDUAL
L8 X_150L2.5A-50_0805-RH DVDD25 ANE
14 41
3VDUAL DVDD33 LDPS
48 44
DVDD33 MII/SNIB/RTT3 MII_RST# R206 X_4.7KR0402
42
RESETB
11
C356 DGND
17 DGND

C336
X_0.1uf/25V/Y5V/6

X_C0.1u16Y0402
45
A
AGND A
EMI request 1027 X_RTL8201CL-VD-LF-D-RH

MICRO-START INT'L CO.,LTD.


Title
LAN controllor-RTL 8211BL/8201CL
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 20 of 37
5 4 3 2 1
5 4 3 2 1

+12V PCI_E2
+12V VCC3
B1 12V PRSNT1# A1
B2 A2 3VDUAL
12V 12V +12V
B3 RSVD 12V A3
PCI_E1 +12V
B4 GND GND A4
PE_WAKE# B5 A5 B1 A1
18,22,29,31 SMBCLK SMCLK JTAG2 12V PRSNT1#
18,22,29,31 SMBDATA B6 SMDAT JTAG3 A6 B2 12V 12V A2
VCC3 B7 A7 VCC3 B3 A3
D
C370 3VDUAL GND JTAG4 12V 12V D
B8 3.3V JTAG5 A8 B4 GND GND A4
C0.1u16Y0402 B9 A9 B5 A5
JTAG1 3.3V 18,22,29,31 SMBCLK SMCLK JTAG2
B10 3.3VAUX 3.3V A10 18,22,29,31 SMBDATA B6 SMDAT JTAG3 A6
PE_WAKE# B11 A11 PE_RST# B7 A7 VCC3
WAKE# PWRGD PE_RST# 14,23 GND JTAG4
B8 3.3V JTAG5 A8
R259 10KR0402 B9 A9
JTAG1 3.3V
B12 RSVD GND A12 5/5/20 B10 3.3VAUX 3.3V A10
B13 A13 PE_WAKE# B11 A11 PE_RST#
GND REFCLK+ PE0_CLK 14 14 PE_WAKE# WAKE# PWRGD
C384 C0.1u16Y0402 PE0_TX15C B14 A14
14 PE0_TX15 HSOP0 REFCLK- PE0_CLK# 14
5/5/15 C383 C0.1u16Y0402 PE0_TX15C# B15 A15
14 PE0_TX15# HSON0 GND
B16 GND HSIP0 A16 PE0_RX15 14 B12 RSVD GND A12 5/5/20
B17 PRSNT2# HSIN0 A17 PE0_RX15# 14 B13 GND REFCLK+ A13 PE1_CLK 15
B18 A18 C369 C0.1u16Y0402 PE1_TXC B14 A14
GND GND 15 PE1_TX HSOP0 REFCLK- PE1_CLK# 15
C371 C0.1u16Y0402 PE1_TXC# B15 A15
15 PE1_TX# HSON0 GND
5/5/15 B16 GND HSIP0 A16 PE1_RX 15
C386 C0.1u16Y0402 PE0_TX14C B19 A19 5/5/15 B17 A17
14 PE0_TX14 HSOP1 RSVD 15 PE1_PRSNT# PRSNT2# HSIN0 PE1_RX# 15
C385 C0.1u16Y0402 PE0_TX14C# B20 A20 B18 A18
14 PE0_TX14# HSON1 GND GND GND
B21 GND HSIP1 A21 PE0_RX14 14 Series 0402 0.1uf cap on each TX line 5/5/15
B22 A22
C388 C0.1u16Y0402 PE0_TX13C B23
GND HSIN1
A23
PE0_RX14# 14 within 500 mil of connector PCIEX1/White
14 PE0_TX13 HSOP2 GND
C387 C0.1u16Y0402 PE0_TX13C# B24 A24
14 PE0_TX13# HSON2 GND
B25 A25 R237
B26
GND HSIP2
A26
PE0_RX13 14
10KR0402 N11-0360091-A10
GND HSIN2 PE0_RX13# 14
C390 C0.1u16Y0402 PE0_TX12C B27 A27
14 PE0_TX12 HSOP3 GND
C389 C0.1u16Y0402 PE0_TX12C# B28 A28
14 PE0_TX12# HSON3 GND
B29 GND HSIP3 A29 PE0_RX12 14
B30 RSVD HSIN3 A30 PE0_RX12# 14
B31 PRSNT2# GND A31
B32 GND RSVD A32
C C

C392 C0.1u16Y0402 PE0_TX11C B33 A33


14 PE0_TX11 PE0_TX11C# HSOP4 RSVD
C391 C0.1u16Y0402 B34 A34
14 PE0_TX11# HSON4 GND
B35 A35 3VDUAL +12V
GND HSIP4 PE0_RX11 14
B36 GND HSIN4 A36 PE0_RX11# 14
C394 C0.1u16Y0402 PE0_TX10C B37 A37
14 PE0_TX10 HSOP5 GND

1
C393 C0.1u16Y0402 PE0_TX10C#

+
14 PE0_TX10# B38 HSON5 GND A38
B39 A39 EC32 EC28
GND HSIP5 PE0_RX10 14
B40 A40 X_CD1000u63EL11.5-RH-1 CD470u16EL11.5-RH
PE0_RX10# 14

2
C396 C0.1u16Y0402 PE0_TX9C GND HSIN5
14 PE0_TX9 B41 HSOP6 GND A41
C395 C0.1u16Y0402 PE0_TX9C# B42 A42
14 PE0_TX9# HSON6 GND
B43 GND HSIP6 A43 PE0_RX9 14
B44 GND HSIN6 A44 PE0_RX9# 14
C401 C0.1u16Y0402 PE0_TX8C B45 A45
14 PE0_TX8 HSOP7 GND
C409 C0.1u16Y0402 PE0_TX8C# B46 A46
14 PE0_TX8# HSON7 GND
B47 GND HSIP7 A47 PE0_RX8 14
B48 PRSNT2# HSIN7 A48 PE0_RX8# 14
B49 GND GND A49

C404 C0.1u16Y0402 PE0_TX7C B50 A50


14 PE0_TX7 HSOP8 RSVD
C415 C0.1u16Y0402 PE0_TX7C# B51 A51
14 PE0_TX7# HSON8 GND
B52 GND HSIP8 A52 PE0_RX7 14
B53 GND HSIN8 A53 PE0_RX7# 14
C405 C0.1u16Y0402 PE0_TX6C B54 A54
14 PE0_TX6 PE0_TX6C# HSOP9 GND
C416 C0.1u16Y0402 B55 A55
14 PE0_TX6# HSON9 GND
B56 GND HSIP9 A56 PE0_RX6 14
B57 GND HSIN9 A57 PE0_RX6# 14
C403 C0.1u16Y0402 PE0_TX5C B58 A58
B 14 PE0_TX5 HSOP10 GND B
C418 C0.1u16Y0402 PE0_TX5C# B59 A59
14 PE0_TX5# HSON10 GND
B60 GND HSIP10 A60 PE0_RX5 14
B61 GND HSIN10 A61 PE0_RX5# 14
C402 C0.1u16Y0402 PE0_TX4C B62 A62
14 PE0_TX4 HSOP11 GND
C417 C0.1u16Y0402 PE0_TX4C# B63 A63
14 PE0_TX4# HSON11 GND
B64 GND HSIP11 A64 PE0_RX4 14
B65 GND HSIN11 A65 PE0_RX4# 14
C397 C0.1u16Y0402 PE0_TX3C B66 A66
14 PE0_TX3 HSOP12 GND
C410 C0.1u16Y0402 PE0_TX3C# B67 A67
14 PE0_TX3# HSON12 GND
B68 GND HSIP12 A68 PE0_RX3 14
B69 GND HSIN12 A69 PE0_RX3# 14
C398 C0.1u16Y0402 PE0_TX2C B70 A70
14 PE0_TX2 HSOP13 GND
C411 C0.1u16Y0402 PE0_TX2C# B71 A71
14 PE0_TX2# HSON13 GND
B72 GND HSIP13 A72 PE0_RX2 14
B73 GND HSIN13 A73 PE0_RX2# 14
C399 C0.1u16Y0402 PE0_TX1C B74 A74
14 PE0_TX1 PE0_TX1C# HSOP14 GND
C412 C0.1u16Y0402 B75 A75
14 PE0_TX1# HSON14 GND
B76 GND HSIP14 A76 PE0_RX1 14
B77 GND HSIN14 A77 PE0_RX1# 14
C400 C0.1u16Y0402 PE0_TX0C B78 A78
14 PE0_TX0 HSOP15 GND
C413 C0.1u16Y0402 PE0_TX0C# B79 A79
14 PE0_TX0# HSON15 GND
B80 GND HSIP15 A80 PE0_RX0 14
14 PE0_PRSNTX16# B81 PRSNT2# HSIN15 A81 PE0_RX0# 14
B82 RSVD GND A82

Series 0402 0.1uf cap on each TX line


within 500 mil of connector PCIEX16/White

A
N11-1640401-K06 A

MICRO-START INT'L CO.,LTD.


Title
PCIE X16, X1 SLOT
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 21 of 37
5 4 3 2 1
5 4 3 2 1

PCI SLOT 1 (PCI VER: 2.3 COMPLY) AD[31..0]


16 AD[31..0] PCI SLOT 2 (PCI VER: 2.3 COMPLY)
C_BE#[3..0]
16 C_BE#[3..0]
-12V +12V
PCI1
B1 A1 -12V +12V
-12V TRST# PCI2
B2 TCK +12V A2
B3 A3 B1 A1
GND TMS -12V TRST#
B4 A4 B2 A2
D TDO TDI TCK +12V D
VCC5 B5 A5 B3 A3
+5V +5V GND TMS
B6 A6 PCI_INTW# 16 B4 A4
+5V INTA# TDO TDI
16 PCI_INTX# B7 A7 PCI_INTY# 16 B5 A5
INTB# INTC# VCC5 +5V +5V PCI_INTX#
16 PCI_INTZ# B8 A8 VCC5 B6 A6
INTD# +5V PME# PCI_INTY# +5V INTA# PCI_INTZ#
B9 A9 B7 A7
PRSNT#1 RESERVED VCC3 PCI_INTW# INTB# INTC#
B10 A10 B8 A8 VCC5
RESERVED +5V(I/O) INTD# +5V
B11 A11 B9 A9
PRSNT#2 RESERVED 3VDUAL C481 PRSNT#1 RESERVED VCC3
B12 A12 B10 A10
GND GND X_C0.1u16Y0402 RESERVED +5V(I/O)
B13 A13 B11 A11
VCC3 GND GND PRSNT#2 RESERVED 3VDUAL
B14 A14 B12 A12
RESERVED RESERVED GND GND
B15 A15 PCIRST_SLOT2# 16 B13 A13
GND RST# VCC3 GND GND
16 PCICLK_SLOT2 B16 A16 B14 A14
CLK +5V(I/O) RESERVED RESERVED
B17 A17 PCI_GNT3# 16 B15 A15 PCIRST_SLOT1# 16
GND GNT# GND RST#
16 PCI_REQ3# B18 A18 16 PCICLK_SLOT1 B16 A16
REQ# GND PME# CLK +5V(I/O)
B19 A19 PME# 16 B17 A17 PCI_GNT4# 16
AD31 +5V(I/O) RESERVED AD30 GND GNT#
B20 A20 16 PCI_REQ4# B18 A18
AD29 AD31 AD30 REQ# GND PME#
B21 A21 B19 A19
AD29 +3.3V AD28 AD31 +5V(I/O) RESERVED AD30
B22 A22 B20 A20
AD27 GND AD28 AD26 AD29 AD31 AD30
B23 A23 B21 A21
AD25 AD27 AD26 AD29 +3.3V AD28
B24 A24 B22 A22
AD25 GND AD24 AD27 GND AD28 AD26
B25 A25 B23 A23
C_BE#3 +3.3V AD24 ID1 R279 100R0402 AD24 AD25 AD27 AD26
B26 A26 B24 A24
AD23 C/BE#3 IDSEL AD25 GND AD24
B27 A27 B25 A25
AD23 +3.3 AD22 C_BE#3 +3.3V AD24 ID2 R293 100R0402 AD25
B28 A28 B26 A26
AD21 GND AD22 AD20 AD23 C/BE#3 IDSEL
B29 A29 B27 A27
AD19 AD21 AD20 AD23 +3.3 AD22
B30 A30 B28 A28
AD19 GND AD18 AD21 GND AD22 AD20
B31 A31 B29 A29
AD17 +3.3V AD18 AD16 AD19 AD21 AD20
B32 A32 B30 A30
C_BE#2 AD17 AD16 AD19 GND AD18
C B33 A33 B31 A31 C
C/BE#2 +3.3V FRAME# AD17 +3.3V AD18 AD16
B34 A34 FRAME# 16 B32 A32
IRDY# GND FRAME# C_BE#2 AD17 AD16
16 IRDY# B35 A35 B33 A33
IRDY# GND TRDY# C/BE#2 +3.3V FRAME#
B36 A36 TRDY# 16 B34 A34
DEVSEL# +3.3V TRDY# IRDY# GND FRAME#
16 DEVSEL# B37 A37 B35 A35
DEVSEL# GND STOP# IRDY# GND TRDY#
B38 A38 STOP# 16 B36 A36
LOCK# GND STOP# DEVSEL# +3.3V TRDY#
B39 A39 B37 A37
PERR# LOCK# +3.3V SDONE DEVSEL# GND STOP#
16 PERR# B40 A40 B38 A38
PERR# SDONE SBO# LOCK# GND STOP#
B41 A41 B39 A39
SERR# +3.3V SBO# PERR# LOCK# +3.3V SDONE
16 SERR# B42 A42 B40 A40
SERR# GND PAR PERR# SDONE SBO#
B43 A43 PAR 16 B41 A41
C_BE#1 +3.3V PAR AD15 SERR# +3.3V SBO#
B44 A44 B42 A42
AD14 C/BE#1 AD15 SERR# GND PAR
B45 A45 B43 A43
AD14 +3.3V AD13 C_BE#1 +3.3V PAR AD15
B46 A46 B44 A44
AD12 B47
GND AD13
A47 AD11 PCI PULL-UP / DOWN RESISTORS AD14 B45
C/BE#1 AD15
A45
AD10 AD12 AD11 AD14 +3.3V AD13
B48 A48 B46 A46
AD10 GND AD9 AD12 GND AD13 AD11
B49 A49 B47 A47
GND AD9 AD10 AD12 AD11
B48 A48
AD10 GND AD9
B49 A49
AD8 C_BE#0 DEVSEL# GND AD9
B52 A52 7 8 VCC3
AD7 AD8 C/BE#0 TRDY#
B53 A53 5 6
AD7 +3.3V AD6 IRDY# RN51 AD8 C_BE#0
B54 A54 3 4 B52 A52
AD5 +3.3V AD6 AD4 FRAME# 8P4R-8.2KR0402-1 AD7 AD8 C/BE#0
B55 AD5 AD4 A55 1 2 B53 AD7 +3.3V A53
AD3 B56 A56 B54 A54 AD6
AD3 GND AD2 AD5 +3.3V AD6 AD4
B57 GND AD2 A57 B55 AD5 AD4 A55
AD1 B58 A58 AD0 AD3 B56 A56
AD1 AD0 STOP# AD3 GND AD2
B59 +5V(I/O) +5V(I/O) A59 7 8 B57 GND AD2 A57
B60 A60 LOCK# 5 6 RN48 AD1 B58 A58 AD0
ACK64# REQ64# PERR# 8P4R-8.2KR0402-1 AD1 AD0
B B61 A61 3 4 B59 A59 B
+5V +5V SERR# +5V(I/O) +5V(I/O)
B62 +5V +5V A62 1 2 B60 ACK64# REQ64# A60
B61 +5V +5V A61
PCI-White B62 A62
+5V +5V
N11-1200271-A10 PCI-White
MCP61P MCP68
N11-1200271-A10
IDSEL = AD24 IDSEL = AD24
PCI_REQ2# PCI_GNT2# PCI_REQ3# PCI_GNT3# SDONE R264 X_0R0402
MCP61P MCP68 SBO# R265 X_0R0402
SMBCLK 18,21,29,31
PCI_INTW# PCI_INTW# SMBDATA 18,21,29,31
IDSEL = AD25 IDSEL = AD25
Device # 7 Device # 8 PCI_REQ3# PCI_GNT3# PCI_REQ4# PCI_GNT4#
PCI_INTX# PCI_INTX#
Device # 8 Device # 9
PCI SLOT DECOUPLING CAPACITORS
VCC3 VCC5 +12V

1
VCC5 VCC3 3VDUAL
+

+
EC33 EC34 C377
A C485 C477 C368 CD1000u63EL11.5-RH-1 CD1000u63EL11.5-RH-1 C0.1u16Y0402 A
2

2
C0.1u16Y0402 C0.1u16Y0402 C0.1u16Y0402
C468 C465 C478
X_C0.1u16Y0402 X_C0.1u16Y0402 C0.1u16Y0402
C463 C476
C0.1u16Y0402 C0.1u16Y0402
MICRO-START INT'L CO.,LTD.
Title
PCI SLOT 1&2
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 22 of 37
5 4 3 2 1
5 4 3 2 1

1394 CONTROLLER
Rear 1394 port

VCC3 VCC1_8 AVCC3


8P4R-56R0402-1
TPBIAS0 7 8 TPA0+
TPA0- I1394_USB1A
D
5 6 D
TPB0+ TPA0+

TP+ TP+ GND


3 4 14

TP- TP- PWR


C419 R246 4.99KR1%0402 1 2 TPB0- TPA0- 13
C0.33u16X5-RH-1 C382 TPB0+ 12
RN44
TX, RX TPB0-

20
44

37
18

10

30
11

5
U20 10
C220p50N0402 CPWR_0 9

APV18
DV33
DV33

DV18
DV18

TAV33
APVDD
C381 C0.1u10X0402 PE2_RXC 12 28 TPA0+ Place near JMB381
15 PE2_RX APTXP TPA0P 1394_USBX2-RH-2
PE2_RXC#
C406 C0.1u10X0402 11 27 TPA0-
15 PE2_RX# APTXN TPA0N TPB0+
26
TPB0P TPB0-
15 PE2_TXC 8 25
APRXP TPB0N TPBIAS0
15 PE2_TXC# 9 29
APRXN TPBIAS_0
4 trace by layout width 60mil
15 PE2_CLK APCLKP TPA1+
3 34
15 PE2_CLK# APCLKN JMB381 TPA1P
TPA1N
33 TPA1- +12VIN
32 TPB1+ D15 FS2
TPB1P TPB1- CPWR CPWR_0 J1394_1
14,21 PE_RST# 1 31 1 2
XRSTN TPB1N TPBIAS1 TPA1+ TPA1-
35 1 2
EEDI TPBIAS_1 DO214AC_40V,2A F-SMD1812P150TF/24
13 3 4
EECK SEEDAT C186 TPB1+ TPB1-
14 5 6
SEECLK C200 C0.1u16Y0402 CPWR_1 CPWR_1
7 8
R249 10KR1%0402 7 24 R240 390KR0402 CPWR_F X_C1000p50X0402 10
APREXT TCPS
2
XTEST R254 12KR0402 H2X5[9]M_GREEN
36
TREXT
21
GPIO0 R241 X_0R0402 1_8V_CTL
17 19
GPIO2 GPIO1 REG_CTL
16
GPIO3 GPIO2
15
GPIO3
Internal push PNP BJT

NC1
23 Front 1394 pin header
C436 C22p50N0402 38 46
TXIN NC2
47
NC3

APGND
48
NC4
2

Y4 R257 39 1 2 EEDI
GND
GND
GND
GND
GND
24.576MHZ16P_D TXOUT GND VCC3 EECK
1MR0402 3 4
C 5 6 GPIO3 C
1

C437 C22p50N0402 8P4R-56R0402-1 7 8 GPIO2


22
40
41
42
43
45

6
JMB381-LGBZ0A-A-RH TPBIAS1 7 8 TPA1+
5 6 TPA1- 4.7K/4/8P4R
3 4 TPB1+ RN43
C433 R253 4.99KR1%0402 1 2 TPB1-
C0.33u16X5-RH-1 C431
RN45

C220p50N0402
Place near JMB381 VCC3

R236 U18
510R0402 8 1
VCC A0
+12V
width 60mil 7
WP A1
2
EECK 6 3
FS3 EEDI SCL A2
D30 5 4
CPWR_F CPWR_1 SDA GND
1 2
AT24C02BN-SH-T-RH
DO214AC_40V,2A F-SMD1812P150TF/24
C526 C531
X_C1000p50X0402 C0.1u16Y0402
AVCC3 VCC3
4

U22 VCC1_8 VCC1_8


CP10
4
ADJ/GND

3 2
VIN VOUT
1
C424
X_C10u10Y0805

C423 C450 C427 C420 C376 C435


+
C448
X_C10u10Y0805

C0.1u16Y0402 C0.1u16Y0402 R266 EC26 X_C0.1u16Y0402 C0.1u16Y0402 C0.1u16Y0402 C0.1u16Y0402


1

RC1117S_SOT223 200R1%0402 CD100U16EL5-RH


2

1_8V_CTL
B B
near chipset pin
R267
100R/1%/4

A A

MICRO-START INT'L CO.,LTD.


Title
1394 controller-JMB381
Size Document Number Rev
C MS-7509 10
Date: Friday, January 11, 2008 Sheet 23 of 37
5 4 3 2 1
5 4 3 2 1

PRIMARY IDE BLOCK

VCC5 PDD[15..0]
17 PDD[15..0]

R220
X_510R0402
IDE1
HD_RST# 1 2
16 HD_RST# PDD7 PDD8
D
3 4 D
PDD6 5 6 PDD9
PDD5 7 8 PDD10
PDD4 9 10 PDD11
PDD3 11 12 PDD12
PDD2 13 14 PDD13
PDD1 15 16 PDD14
PDD0 17 18 PDD15
19
17 PD_DREQ 21 22
17 PD_IOW# 23 24
17 PD_IOR# 25 26
17 PD_IORDY 27 28
17 PD_DACK# 29 30
17 IRQ14 31 32
33 34 PD_DET
17 PD_A1 PD_DET 17
17 PD_A0 35 36 PD_A2 17
17 PD_CS#1 37 38 PD_CS#3 17
39 40 PDD7 R221 10KR0402
32 PD_LED

IRQ14 R151 10KR0402


VCC3 PD_DREQ R169 5.6KR0402 VCC3

PD_IORDY R164 4.7KR0402


PD_DET R149 15KR0402

R156
X_8.2KR0402
IRQ14

C C

FAN BOLCK
CPU FAN

U15
CPU-FAN_CTL 1 14 CPUFAN_DRV +12VIN
27 CPU-FAN_CTL SYS-FAN_CTL FAN1_IN FAN1_DRV
27 SYS-FAN_CTL 2 13 CPUFAN_SEN D17
FAN2_IN FAN1_SEN
+12VIN 3 12 SYSFAN_DRV X_BAS32L_LL34
FANC1 VCC12 FAN2_DRV
C231 4 11 SYSFAN_SEN
FANC2 C1 FAN2_SEN
5 10
C228 C0.1u16Y0402 C2 FAN3_DRV Q21
6 9
C0.1u16Y0402 CHRPMP FAN3_SEN N_P3055LDG_TO252 R144 4.7KR0402 R145 27KR0402
7 8

D
GND FAN3_IN CPU-FAN 27
C232 CPUFAN_DRV G
C0.1u16Y0402 R138 R147
W83391TG X_0R0805 10KR0402

S
B B
If using 4 pin fan, The GPIO C227
C0.1u16Y0402
must drive to high.

If using 3 pin fan, The GPIO R137 VCC5


10KR1%0402
must drive to low.
CPUFAN_SEN
VCC3 D18
System FAN R160 BAS32L_LL34
R142 4.7KR0402 Q23
3.48K/1%/6 N-2N7002_SOT23
R154 R159 200R1%0402 D S CPU-FAN_CTL 27
4.7KR0402
D

G
CPU_FAN_GPO G Q20 4
27 CPU_FAN_GPO
N-2N7002_SOT23 3 MEC1
+12V CPUFAN_PWR 2
S

D22 1
X_BAS32L_LL34 CPU_FAN_GPO

+1
CD100u25EL11-RH-2
Q30 EC22 CPUFAN1
X_N-APM2054NDC-TRL_SOT89-LF BH1X4B_WHITE-RH-2

2
R255 4.7KR0402 R263 27KR0402
N32-1040731-H06
2

SYS-FAN 27
SYSFAN_DRV 1 4 If using 3 pin fan, The Q52 will turn off to
R258 R262
0R0805 10KR0402 avoid the VCC5(R522) bias to CPU-FAN_CTL.
3

C225
X_C0.1u16Y0402

R261
X_10KR1%0402 3
SYSFAN_PWR 2
SYSFAN_SEN 1
+1

CD100u25EL11-RH-2
A EC25 SYSFAN1 A
R260 BH1X3B-FR_WHITE-RH
2

X_3.48KR1%
N32-1030451-H06

MICRO-START INT'L CO.,LTD.


Title
FAN & IDE connector
Size Document Number Rev
C MS-7509 10
Date: Friday, January 11, 2008 Sheet 24 of 37
5 4 3 2 1
5 4 3 2 1

POWER CIRCUIT FOR USB PORT 4,5


POWER CIRCUIT FOR USB PORT 0,1 POWER CIRCUIT FOR USB PORT 2,3
100 mils VCC5 VCC5_SB
VCC5 VCC5_SB VCC5 VCC5_SB

SVCC2 R135 2.7KR0402

1
2
U12 SVCC2 R282 2.7KR0402
SVCC3

1
2

1
2
U13 SVCC1 5 U23 SVCC3

5VCC
5VSB
29 5VDRV1_EN S3#
5 OC#1 6 7 5

5VCC
5VSB

5VCC
5VSB
29 5VDRV1_EN S3# 25 OC#1 OC# VOUT 29 5VDRV1_EN OC#2 S3#
25 OC#0 OC#0 6 7 6 7
OC# VOUT OC# VOUT
8

GND
VOUT

+1
D D
SVCC1 R141 2.7KR0402 8 4 8

GND

GND
VOUT 18 USB_EN EN VOUT

+1

+1
4 EC18 C179 4
18 USB_EN EN 18 USB_EN EN
UP7533A_SOT23-8 X_C0.1u16Y0402 EC35 C487

2
UP7533A_SOT23-8 C222 CD470u16EL11.5-RH UP7533A_SOT23-8 X_C0.1u16Y0402

2
EC23 R140 CD470u16EL11.5-RH
R139 CD470u16EL11.5-RH 5.6KR0402 R281
5.6KR0402 C0.01u16Y0402 5.6KR0402

REAR PANEL USB CONNECTOR FOR USB PORT 0,1 FRONT PANEL USB CONNECTOR FOR USB PORT 4,5
SVCC3
Trace lengths must be less 12 inches SVCC3
Trace lengths must be less 5 inches
RN33
8P4R-0R SVCC1 SVCC1

5
USBP1 1 2 SBD1+ RN47
18 USBP1
USBN1 3 4 SBD1- LAN_USB1A 8P4R-0R JUSB4 SBD5+ 6 4 SBD4+
18 USBN1
USBP0 5 6 SBD0+ 5 23 USBP4 1 2 SBD4+
18 USBP0 PWR GND 18 USBP4 1 2
USBN0 7 8 SBD0- SBD0- 6 USB- 24 USBN4 3 4 SBD4- SBD5- SBD4- SBD5- 1 3 SBD4-
18 USBN0 GND 18 USBN4 3 4

5
SBD0+ 7 USB+ 25 USBP5 5 6 SBD5+ SBD5+ SBD4+
GND 18 USBP5 5 6
8 26 SBD1+ 6 4 SBD0+ USBN5 7 8 SBD5- D24
GND UP GND 18 USBN5

2
7 8 OC#2 X_ESD-IP4220
10 OC#2 25
Match pairs to 50 mil. 1 27 SBD1- 1 3 SBD0-
PWR GND
SBD1- 2 28 CON2X5-1_Yellow
USB- GND
SBD1+ 3 29 D19 Match pairs to 50 mil.
USB+DOWN GND

2
4 30 X_ESD-IP4220
C
GND GND N31-2051581-H06 C
CONN-RJ45_USBX2_LEDX2_TX-RH-27
N58-22F0181-S42 NEAR USB CONNECTOR
NEAR USB CONNECTOR 22 / 7.5 / 7.5 / 7.5 / 22 / 7.5 / 7.5 / 7.5 / 22
22 / 7.5 / 7.5 / 7.5 / 22 / 7.5 / 7.5 / 7.5 / 22

FRONT PANEL USB CONNECTOR FOR USB PORT 6,7


REAR PANEL USB CONNECTOR FOR USB PORT 2,3 SVCC2

Trace lengths must be less 5 inches SVCC4 SVCC4


Trace lengths must be less 12 inches

5
RN49
RN25 SBD3+ 6 4 SBD2+ 8P4R-0R
8P4R-0R USBP7 1 2 SBD7+
18 USBP7

5
USBP3 1 2 SBD3+ SBD3- 1 3 SBD2- USBN7 3 4 SBD7- JUSB2
18 USBP3 18 USBN7
USBN3 3 4 SBD3- USBP6 5 6 SBD6+ SBD6+ 6 4 SBD7+
18 USBN3 18 USBP6 1 2
USBP2 5 6 SBD2+ D16 USBN6 7 8 SBD6- SBD7- SBD6-

2
18 USBP2 SVCC2 18 USBN6 3 4
USBN2 7 8 SBD2- X_ESD-IP4220 SBD7+ SBD6+ SBD6- 1 3 SBD7-
18 USBN2 5 6
I1394_USB1B 7 8 OC#3 OC#3 25 D25

2
10 X_ESD-IP4220
5 PWR GND 15 Match pairs to 50 mil.
Match pairs to 50 mil. SBD2- 6 16 CON2X5-1_Yellow
USB- GND
SBD2+ 7 USB+ 17
GND
B
8 GND UP GND 18
N31-2051581-H06 B
1 PWR GND 19
SBD3- 2 20
USB- GND
SBD3+ 3 USB+ 21
GND
4 GND DOWN GND 22 NEAR USB CONNECTOR
1394_USBX2-RH-2 22 / 7.5 / 7.5 / 7.5 / 22 / 7.5 / 7.5 / 7.5 / 22
NEAR USB CONNECTOR
22 / 7.5 / 7.5 / 7.5 / 22 / 7.5 / 7.5 / 7.5 / 22

POWER CIRCUIT FOR USB PORT 6,7


VCC5 VCC5_SB

SVCC4 R300 2.7KR0402

1
2
U27 SVCC4
5

5VCC
5VSB
29 5VDRV1_EN S3#
OC#3 6 7
OC# VOUT

GND
VOUT

+1
18 USB_EN 4 EN C488
UP7533A_SOT23-8 EC36 X_C0.1u16Y0402

2
CD470u16EL11.5-RH
A R299 A
5.6KR0402

MICRO-START INT'L CO.,LTD.


Title
USB CONNECTOR
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 25 of 37
5 4 3 2 1
5 4 3 2 1

C522 C10U10Y0805 SIDE_SROUT_R


Rear audio jack
C521 C10U10Y0805 SIDE_SROUT_L
AUDIO1

C520 C10U10Y0805 BASS CLOSE TO


SPDIFO C517 C10U10Y0805 CEN_OUT CONNECTOR
SURR_JD (A3) 62
(A2) SURR_JD
63 AGND
JACK A
VCC3 C519 C10U10Y0805 SROUT_R SROUT_L R216 75R0402 S_L (A1) 64 BLACK
C501 C518 C10U10Y0805 SROUT_L SROUT_R R215 75R0402 S_R (A4) SROUT_L
61 SROUT_R
C0.1U16Y0402
5VA
20KR0402-2 C348 C347 CEN_JD (B3) 52
C495 R318 C508 C100p50N0402 C100p50N0402 (B2) CEN_JD
53
AGND
JACK B
D C0.1U16Y0402 CEN_OUT R272 75R0402 C_O (B1) ORANGE D
54
BASS R277 75R0402 L_B (B4) CEN_OUT
51
C0.1U16Y0402 BASS
Trace Width 20mils. U25

48
47
46
45
44
43
42

41
40
39

38
37
near chipset pin C351 C352 SIDESURR_JD (C3) 42 JACK C
C100p50N0402 C100p50N0402 (C2) SIDESURR_JD
43 GRAY

SURRBACK-OUT-L

SURR-OUT-L
SPDIF/EAPD

AVSS2
LFE-OUT
CEN-OUT

SURR-OUT-R

AVDD2
SPDIFO

SURRBACK-OUT-R

JDREF

LINE1-VREFO-R
FRONT_OUT_R EC38 1 AGND
36 2 CD100U16EL5-RH LOUT_R SIDE_SROUT_L R269 75R0402 S_S_L (C1) 44
FRONT-OUT-R FRONT_OUT_L EC37 1
+ SIDESROUT_L
35 2 CD100U16EL5-RH LOUT_L SIDE_SROUT_R R274 75R0402 S_S_R (C4) 41
FRONT-OUT-L +
5VA SIDESROUT_R
1
JAUD2_EN# DVDD1 SENSE_B (C0)
2 34 R5
GPIO0 SENSE B(JD2) R304 X_10KR SENSE_B R306 10KR1%0402 CEN_JD C343 C344 GND1 (C0)
3 33 L5
GPIO1 DCVOL R305 5.1KR1%0402 SIDESURR_JD C100p50N0402 C100p50N0402 GND2
4 G3
DVSS1 MIC1-VREFO-R GND3
32 G4
MIC1-VREFO-R LINE2_VREF GND4
18 HDA_SDOUT 5 31 G5
SDATA-OUT LINE2-VREFO GND5
18 HDA_BITCLK_R 6 G6
BIT_CLK MIC2VREFO GND6
7 30
DVSS2 MIC2-VREFO
18 HDA_SDIN0 8 29
SDATA-IN LINE1-VREFO-L
9
DVDD2 MIC1-VREFO-L LINE1_JD (D3)
18 HDA_SYNC 10 28 32
SYNC MIC1-VREFO-L (D2) LINE_JD
18 HDA_RST# 11 33
RESET# LINE_IN_L R218 1KR0402 L_I_L (D1) AGND
27 34
VREF LINE_IN_R R217 1KR0402 L_I_R (D4) LINE_L
12
PCBEEP
31
LINE_R
JACK D
C498 C492 SENSE A(JD1)
26 BLUE
X_C10P50N0402 X_C10P50N0402 AVSS1 C350
25
AVDD1 LOUT_L C100p50N0402 C349 FRONT_JD (E3) 22

C0.1U16Y0402
LOUT_JD

CD-GND
LINE2-R

LINE1-R
LOUT_R C100p50N0402 (E2)
LINE2-L

LINE1-L
23

MIC2-R

MIC1-R
MIC2-L

MIC1-L
AGND

C494
C496 R271 75R0402 L_O_L (E1)

CD-R
24

CD-L
C10U6.3X0805 R270 75R0402 L_O_R (E4) LOUT_L
21
LOUT_R
JACK E
R276 R275 Green
ALC888-VH-LF-H-RH 22KR0402 22KR0402
13

14
15

16
17

18
19
20

21
22

23
24
C346 C345 MIC1_JD (F3) 12
SURR_JD R288 39.2KR1%0402 C100p50N0402 C100p50N0402 (F2) MIC_JD
13
FRONT_JD R287 5.1KR1%0402 SENSE_A MIC1_L R273 1KR0402 M1_L (F1) AGND
14
MIC_L
JACK F
LINE1_JD R290 10KR1%0402 MIC1_R R268 1KR0402 M1_R (F4) 11 PINK
C MIC1_JD R283 20KR0402-2 MIC_R C
LINE1_R C490 C1U25Y0805 LINE_IN_R
C342 C341
LINE2_L EC30 2 1 CD100U16EL5-RH LINE1_L C480 C1U25Y0805 LINE_IN_L C100p50N0402 C100p50N0402
+
LINE2_R EC29 2 1 CD100U16EL5-RH
+
Front Headphone MIC_1_R C489 C1U25Y0805 MIC1_R JACK-AUDIOX2X3-26P-RH-3
The N54-13F0171-S42 is for 3port audio
MIC_1_L C479 C1U25Y0805 MIC1_L The N54-26F0201-S42 is for 6port audio

MIC2_L C474 C1U25Y0805


MIC1-VREFO-L R291 4.7KR0402
MIC2_R C473 C1U25Y0805
MIC1-VREFO-R R294 4.7KR0402
RN54 CP17
8P4R-10KR0402 SPDIF OUT
5 1 1 2 CD-L C472 C1U25Y0805
2 3 4 CD-G C471 C1U25Y0805
3 5 6
4 7 8 CD-R C470 C1U25Y0805 X_C100p50N0402 VCC5 CP26
8
6
4
2

JCD1 RN57
BH1X4_black-RH 8P4R-47KR0402 C527 JSP1 C249 X_C0.1U16Y0402
R335 1
7
5
3
1

SPDIFO 2 C378 X_C0.1U16Y0402


3
10R0402 C502 X_C0.1U16Y0402
C528
C100p50N0402 BH1X3_BLACK-RH C462 X_C0.1U16Y0402

C355 X_C0.1U16Y0402

for EMI 8/28


B B

For EMI
SOT23

Azalia Front Audio Connector MIC2_L_JAUD


D29
1 MIC2_L_JAUD MIC2_R_JAUD
MIC2VREFO 3
2 MIC2_R_JAUD VCC3 LINE2_R_JAUD

C515 S-BAT54ALT1G_SOT23-RH LINE2_L_JAUD

C533

C532

C529

C530
X_C0.1U16Y0402
+12V U28 5VA MIC2_L 1 2 R334
RN53 MIC GND
LT1087S_SOT89 4.7KR0402

X_C1000P50X0402

X_C1000P50X0402

X_C1000P50X0402

X_C1000P50X0402
3 2 1 2 MIC2_R 3 4 JAUD2_EN#
VIN VOUT MICPWR PRESENCE#
3 4
5 6 LINE2_R 5 6
FLINE OUTR LINE NEXT R
ADJ

C516 C510 C505 7 8


C0.1U25Y R329 X_C0.1U16Y0402 C10U10Y0805 SENSE_B 7 8
SOT23

100R1%0402 HPON
1

8P4R-4.7KR0402 LINE2_L 9 10
D28 FLINE OUTL LINE NEXT L
1 LINE2_R_JAUD JAUD1
LINE2_VREF 3 H2X5[8]_black-RH
2 LINE2_L_JAUD
R330 R336 R337
8
6
4
2

300R1%0402 C513 S-BAT54ALT1G_SOT23-RH 39.2KR1%0402 20KR0402-2


A X_C0.1U16Y0402 RN56 A

8P4R-22KR
7
5
3
1

MIC2_R 1
RN55
2 MIC2_R_JAUD MICRO-START INT'L CO.,LTD.
MIC2_L 3 4 MIC2_L_JAUD Title
LINE2_R 5 6 LINE2_R_JAUD ALC888
LINE2_L 7 8 LINE2_L_JAUD
Size Document Number Rev
75/4/8P4R Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 26 of 37
5 4 3 2 1
5 4 3 2 1

LPC SUPER I/O F71882 LPC length should be less than 18 inches.
3VDUAL
TPM PORT
7 8
U2 5 6
SIO_RST# 29 7 DRVDEN0 3VDUAL 3 4
16 SIO_RST# LRESET# DENSEL# DRVDEN0 28
30 17 INDEX# JTPM1 1 2
16 LPC_DRQ#0 LDRQ# INDEX# INDEX# 28 4.7K/4/8P4R
SERIRQ 31 8 MOA# 1 2
16 SERIRQ SERIRQ MOA# MOA# 28 16 LPC_PCLK RN7
LPC_FRAME# 32 9 DSA# JTPM_RST# 3 4 VCC3 3VDUAL
16 LPC_FRAME# LFRAME# DRVA# DSA# 28 16 JTPM_RST#
SIO_PCLK 38 11 DIR# LPC_AD0 5 6 SERIRQ U5
16 SIO_PCLK PCICLK DIR# DIR# 28
39 12 STEP# LPC_AD1 7 8 VCC5 SPI_CS# 1 8
18 SIO_24M CLKIN STEP# STEP# 28 CS# VCC
10 WRDATA# LPC_AD2 9 SPI_DI 2 7 SPI_HOLD#
WDATA# WRDATA# 28 SO HOLD#
LPC_AD0 33 14 WE# LPC_AD3 11 12 SPI_WP# 3 6 SPI_CLK
16 LPC_AD0 LAD0 WGATE# WE# 28 WP# SCLK
LPC_AD1 34 16 TRACK0# LPC_FRAME# 13 14 4 5 SPI_DO
16 LPC_AD1 LAD1 TRK0# TRACK0# 28 16 LPC_FRAME# GND SI
LPC_AD2 35 18 WP#
D 16 LPC_AD2 LAD2 WPT# WP# 28 D
LPC_AD3 36 15 RDDATA# H2X7[10]M-2PITCH_BLACK-RH
16 LPC_AD3 LAD3 RDATA# RDDATA# 28 MX25L8005M2C-15G-RH
5/10/10 13 HEAD# C78
HDSEL# HEAD# 28
47 19 DSKCHG# SPI ROM C0.1u16Y0402
6 THERMAL_SID VIDIN5/OUT5/SID DSKCHG# DSKCHG# 28
46 VIDIN4/OUT4
45
44
VIDIN3/OUT3
100
M31-25L8013-M24
VIDIN2/OUT2 SLCT RSLCT 28
43 VIDIN1/OUT1 PE 101 RPE 28 M31-25X8003-W03
42 VIDIN0/OUT0 BUSY 102 RBUSY 28
5/10/10 ACK# 103 RACK# 28
6 THERMAL_SIC 54 VIDOUT5/GP5/SIC SLIN# 104 RSLIN# 28
53 VIDOUT4/GP4 INIT# 105 RINIT# 28
52 VIDOUT3/GP3 ERR# 106 RERR# 28
51 VIDOUT2/GP2 AFD# 107 RAFD# 28
50 108
49
VIDOUT1/GP1
VIDOUT0/GP0
STB#
PD0 109
RSTB# 28
PRD0 28 Reserved SPI DEBUG PORT
55
PD1 110
111
PRD1 28 VCC3 Place close to SPI ROM
SLOTOCC#/GP6 PD2 PRD2 28
56 112 3VDUAL
GP7/Turbo#/WDTRST# PD3 PRD3 28 X_8P4R-8.2KR0402-1
57 VSI/SST PD4 113 PRD4 28
58 114 LPC_AD3 7 8
VSO/PECI PD5 PRD5 28
115 LPC_AD2 5 6
PD6 PRD6 28
93 116 LPC_AD1 3 4 JSPI1
VIN6 PD7 PRD7 28
VIN5 94 LPC_AD0 1 2 1 2
VIN4 VIN5 SPI_DI SPI_DO
95 VIN4 3 4
VIN3 96 27 RN41 SPI_CS# 5 6 SPI_CLK
VIN3 GP42/IRTX
97 VIN2 GP43/IRRX 28 MCP61 / 68 Internal Pull-High 7 8
VIN1 98 118 SPI_HOLD# 9
Vcore(VIN1) DCD1# DCDA# 28
RI1# 119 RIA# 28
21 120 H2X5[1]M-2PITCH_BLACK-RH
24 CPU-FAN FANIN1 CTS1# CTSA# 28
22 121 DTRA#
24 CPU-FAN_CTL FAN_CTL1 DTR1#/FAN60_100 DTRA# 28
RTSA#
24 SYS-FAN 23
24
FANIN2 RTS1#/VIDOUT_TRAP 122
123
RTSA# 28 Part Number : N31-2051451-H06
24 SYS-FAN_CTL FAN_CTL2 DSR1# DSRA# 28
25 124 SOUTA
C FANIN3/GP40 SOUT1/Config4E_2E SOUTA 28 C
26 FAN_CTL3/GP41 SIN1 125 SINA 28
D3+ 89 126
D2+ D3+ (System) DCD2
90 D2+ RI2# 127
THERMDA_CPU 91 128
VREF D1+(CPU) CTS2# DTRB#
92 VREF DTR2#/FWH_TRAP 1
2 RTSB#
RTS2#/HPWM_DC
18 SIO_PME# 79 PME# DSR2# 3
5 SOUTB
SPI_CLK SOUT2/SPI_TRAP
59 GP25/GP10/SPI_SLK SIN2 6
SPI_CS# 60 66 VCC3 SOUTB R50 1KR0402
SPI_DI FANIN4/GP11/SPI_CS0#/FAN_CTL4 GPIO17
61 GP12/SPI_MISO POWER TRIP R
SPI_DO 62 SOUTA R41 X_1KR0402
FANCTL1_1/GP13/SPI_MOSI/BEEP
63 GP14/FWH_DIS_WDTRST#/SPI_CSI# KBRST# 40 KBRST# 18
41 RTSA# R39 X_1KR0402
AG20 A20GATE 18
67 69 C57 C360
18 THRM# OVT# KDATA KBDATA 28
70 X_C0.1u16Y0402 X_C0.1u16Y0402 RTSB# R52 X_1KR0402
KCLK KBCLK 28
32 LED_VSB 64 GP15/LED_VSB/ALERT# MDAT 71 MSDATA 28
65 72 DTRB# R51 1KR0402
32 LED_VCC GP16/LED_VCC/Turbo2# MCLK MSCLK 28
74 PCIRST1#/GP20
75 68 DTRA# R34 X_1KR0402
PCIRST2#/GP21 VSB 3VDUAL
76 PCIRST3#/GP22 VBAT 86 VBAT
77 4 VCC3
24 CPU_FAN_GPO GP23/RSTCON# VCC
78 37 C15
18,32 ATX_PWR_OK ATXPG_IN/GP24 VCC C10 C0.1u16Y0402
84
80
PWROK/GP32 VCC 99 VCC3
C0.1u16Y0402
Don't STUFF STUFF
32 IO_PWRBTIN# PWSIN#/GP26
PWRBTN# 81 20 DTRB# SPI as a backup BIOS SPI as a primary BIOS
18 PWRBTN# PWSOUT#/GP27 GND
82 48 C7 C374 C58
18,29 SLP_S3# S3#/GP30 GND
PS_ON# 83 73 X_C0.1u16Y0402 C0.1u16Y0402 C0.1u16Y0402 RTSB# PWM FAN LINEAR FAN
32 PS_ON# PSON#/GP31 GND
RSMRST# 85 117 CP1
18 RSMRST# RSMRST#/GP33 GND
COPEN# 87 88 D- RTSA# PIN49-54=VID_OUT PIN49-54=GPIO
COPEN# AGND(D_)
F71882FG PIN42-47=VIDIN PIN42-47=VIDIN/OUT
(Place capacitor close to IC)
B SOUTA 4E 2E B

3VDUAL R6 4.7KR0402 RSMRST# C3 X_10uf/10V/Y5V/8 SOUTB/DTRB# SPI_DISABLE SPI_ENABLE


DTRA# FAN START DUTY 60% FAN START DUTY 100%

3VDUAL R242 4.7KR0402 PWRBTN#

VOLTAGE SENSING(H/W Monitor). Temperature Sensing CASE OPEN CIRCUIT


The best voltage input level is about 1V. DIODE SENSING CIRCUIT

THERMDA_CPU VBAT
THERMDA_CPU 6
VCCP R11 10KR1%0402 VIN1

LPC_PCLK C8 AP note from CPU


SIO_PCLK CP18 C2200p16X0402-RH R15
D- 2MR0402
THERMDC_CPU 6
C56 C407 COPEN#
X_C10p50N0402 X_C10p50N0402

1
2
R1
R2 200KR1%0402 VIN3 X_10KR1%0402 C9

1
2
VCC5_SB VREF RT1 X_10KRT1% C1000p50X0402
for EMI request 8/14 R12 47KR1%0402-RH
JCI1
from CPU D1x2-BK
D3+ C29
R3 200KR1%0402 VIN4 X_C2200p16X0402-RH
VCC5 N31-1020151-H06
R13 47KR1%0402-RH
D2+ for

E
A R4 200KR1%0402 VIN5 SYSTEM A
+12V
R14 C1 B
C3300p50X0402 Q1
P-MMBT3906LT1_SOT23

C
20KR0402-2 D-

MICRO-START INT'L CO.,LTD.


Title
SIO-F71882FG / TPM
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 27 of 37
5 4 3 2 1
5 4 3 2 1

PS2 KEYBOARD & MOUSE CONNECTOR SERIAL PORT 1


C30 C0.1u16Y0402

SVCC2 20 mils trace by layout


U3 +12VCOM
+12VIN
D2
20 1 1N4148S_SOD123
VCC5 NRIA# VCC VDD RIA#
2 RA1 RY1 19 RIA# 27
NCTSA# 3 18 CTSA#
RA2 RY2 CTSA# 27
C4 R5 NDSRA# 4 17 DSRA#
RA3 RY3 DSRA# 27

2
4
6
8
D X_C0.1u16Y0402 X_1KR0402 NSINA 7 14 SINA D
RA4 RY4 SINA 27
RN1 NDCDA# 9 12 DCDA#
RA5 RY5 DCDA# 27
8P4R-2.7KR0402
RTSA# NRTSA

16
17
27 RTSA# 16 5

1
3
5
7
DTRA# DA1 DY1 NDTRA D3
27 DTRA# 15 DA2 DY2 6
MSDAT# FB3 7 10 SOUTA 13 8 NSOUTA 1N4148S_SOD123
27 MSDATA 27 SOUTA DA3 DY3
8 11 10 -12VCOM
GND VSS -12V
MSCLK# FB4 11
27 MSCLK
12 9 GD75232_SSOP20
MS C47 C0.1u16Y0402
KBDAT# FB1 1 4
27 KBDATA
2
KBCLK# FB2 5 NRTSA 8 7
27 KBCLK
6 3
N56-12F0081-F02 NDSRA# 6 5 CN1
KB NCTSA# 4 3 8p4C-180p50N
C20 C23 NRIA# 2 1

13
14
15
C180p50N0402 C180p50N0402

10
C13 C28
C180p50N0402 C180p50N0402 JKBMS1 NDCDA# 8 7 NDCDA# 1 6 NDSRA#
CONN-KB_MS-RH NSOUTA 6 5 CN2 NSINA 2 7 NRTSA
NSINA 4 3 8p4C-180p50N NSOUTA 3 8 NCTSA#
!!!Can't use Carry-Cap!!! NDTRA 2 1 NDTRA 4 9 NRIA#
5

COM1

11
CONN-COM_green-RH
C C

FLOPPY CONN BOLCK


PARALLAL PORT

D4
1N4148S_SOD123
PRD[0..7] For EMI FDD1
27 PRD[0..7] VCC5
RN5 LPT1 1 2 DRVDEN0
DRVDEN0 27
RN6 8P4R-2.7KR0402 STB# 1 14 AFD# 4
8P4R-33R0402 PRND7 1 2 PRND0 2 15 RERR# 5 6
PRD4 1 2 PRND4 PRND6 3 4 PRND1 3 16 PINIT# RACK# 8 7 7 8 INDEX#
INDEX# 27
B PRD5 3 4 PRND5 PRND5 5 6 PRND2 4 17 SLIN# RBUSY 6 5 9 10 MOA# B
MOA# 27
PRD6 5 6 PRND6 PRND4 7 8 PRND3 5 18 RPE 4 3 11 12
PRD7 7 8 PRND7 RSLCT 1 2 PRND4 6 19 RSLCT 2 1 13 14 DSA#
DSA# 27
RPE 3 4 PRND5 7 20 CN3 15 16
RN12 RBUSY 5 6 PRND6 8 21 330P/50V/6/8P4C 17 18 DIR#
DIR# 27
8P4R-33R0402 RACK# 7 8 PRND7 9 22 19 20 STEP#
STEP# 27
RSTB# 1 2 STB# RACK# 10 23 PRND7 2 1 21 22 WRDATA#
27 RSTB# WRDATA# 27
PRD0 3 4 PRND0 RN3 RBUSY 11 24 PRND6 4 3 23 24 WE#
WE# 27
RAFD# 5 6 AFD# 8P4R-2.7KR0402 RPE 12 25 PRND5 6 5 25 26 TRACK0#
27 RAFD# TRACK0# 27
PRD1 7 8 PRND1 RN8 RSLCT 13 PRND4 8 7 27 28 WP#
WP# 27
8P4R-2.7KR0402 CN4 29 30 RDDATA#
RDDATA# 27
RN10 SLIN# 1 2 LPT 330P/50V/6/8P4C 31 32 HEAD#
HEAD# 27
8P4R-33R0402 PINIT# 3 4 33 34 DSKCHG#
DSKCHG# 27
PRD2 1 2 PRND2 PRND3 5 6 PRND1 2 1
PRD3 3 4 PRND3 PRND2 7 8
N51-25F0221-F02 AFD# 4 3
RINIT# 5 6 PINIT# PRND1 1 2 PRND0 6 5 CN-BH-D2x17-1:3-BK
27 RINIT#
RSLIN# 7 8 SLIN# AFD# 3 4 STB# 8 7
27 RSLIN#
PRND0 5 6 CN6
STB# 7 8 330P/50V/6/8P4C N32-2173051-H06
RN11 SLIN# 2 1
8P4R-2.7KR0402 PINIT# 4 3 RN52 VCC5
RERR# PRND3 6 5 8P4R-1KR0402
R87 PRND2 8 7 RDDATA# 1 2
2.7KR0402 CN5 WP# 3 4
RSLCT 330P/50V/6/8P4C TRACK0# 5 6
27 RSLCT
RERR# RERR# C90 C330p50N0402 DSKCHG# 7 8
27 RERR#
A RACK# A
27 RACK#
RBUSY INDEX# R325 1KR0402
27 RBUSY
RPE
27 RPE

MICRO-START INT'L CO.,LTD.


Title
KB/MS & COM & LPT & FLOPPY
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 28 of 37
5 4 3 2 1
5 4 3 2 1

5VDIMM FOR DDR


VCC5_SB 5VDIMM S0 S3 S4 S5 VCC5_SB

VCC5 R76 510R0402 R82 10R0402 VCC5_SB R251 10R0402 C425 0.1uf/10V/X7R/4

D
DUAL_CTRL X X 0 1 1 0 1 1
R79 10KR0402 APCI_POWER_OK C86 0.1uf/25V/Y5V/4 G Q9
32 ATX_PWR_OK_5V

1
P-P06P03LCG_SOT89-3-RH U21
3 7

5VSB
18,21,22,31 SMBCLK RAM_VREF

S
SCL 1.8V

1
2
U7 C81 5VSBDRV1 1 0 1 0 0 1 0 0
5 7 5VSBDRV1 4

5VCC
5VSB
D 18,27 SLP_S3# S3# 5VSB_DRV 18,21,22,31 SMBDATA SDA D
6 C80 6 1_25VREF 1_25VREF NO USE
18,30 SLP_S5# S5# 1.25V 1_25VREF
C18000p16X0402 0.1uf/25V/Y5V/4

GND
5VDRV1 1 0 0 0 0 0 0 0 5VDRV1 R256 200KR1%04028 5 1_2VREF

D
EN 1.2V 1_2VREF

GND
VCC5_SB R298 10KR0402 4 8 5VDRV1 G Q7 EN : 0.4~1.4V UP6261M8_SOT23-8-RH

2
MODE 5VCC_DRV N-P0903BD_TO252
UP7501_SOT23-8 5VSBDRV2 X 0 1 0 0 1 0 0

3
25 5VDRV1_EN

S
R74 C77 RAM_VREF 1_2VREF 1_25VREF
1.47KR1%0402 C0.022u16X0402-RH
VCC3 C428 C432 C430
APCI_POWER_OK VCC5 USB_EN 1 1 X 1 0 X 1 0 R252 0.1uf/25V/Y5V/4 0.1uf/25V/Y5V/4 0.1uf/25V/Y5V/4
56KR1%0402

D
R350 +12V
R352 VCC5 20KR0402-2 G
1KR0402 Q33 5VCC_DRV is Open Drain 5VDIMM Y Y N Y Y N Y Y
D

N-2N7002_SOT23
S

G
Q34 USB power Y Y N Y N N Y N
N-2N7002_SOT23
S

R351
4.7KR0402

3VDUAL 1.2VDUAL

U24 UP7707_SOT23-5
1 5
VIN VOUT
C1u10Y
C491

GND
3VDUAL CONTROLLER
3 R284

FB
C
3VDUAL EN C
100R/1%/4
1

1
+

+
2

4
R310 EC27 EC31
2

100R/1%/4 CD470u16EL11.5-RH CD100U16EL5-RH


2

2
VOUT

1
ADJ
5VDIMM 3
VIN R285
C500

R311 200R1%0402
X_C10u10Y0805

C497 U26 169R1%0402


X_C1u10Y APL1084UC_TO252

VCC1.2 VCC5_SB VCC3

B +12V VCC1.5 R248 B


R247 10KR0402 R250
4.7KR0402 4.7KR0402
VCC_DDR
+12V U19A Q29

8
LM358DR2G_SOIC8 2 6

D
HT_VLD 18
1_2VREF R234 4.7KR1%0402-RH 1_2VREF_B 3 1
+ 1.2VDRV G Q25
U19B 1 5 3
8

LM358DR2G_SOIC8 2 N-P0903BD_TO252 4
D

1_25VREF R320 47KR1%0402-RH R16 C373 -


5

S
C367 + 1.5VDRV G Q22 0.1uf/25V/Y5V/4 R245 R319 0.1uf/25V/Y5V/6
7 47KR1%0402-RH 6.345+0.32+0.5=7.165A

4
0.1uf/25V/Y5V/4 6 N-P0903BD_TO252 10KR0402 27KR0402 C422
- VCC1.2
D

R244
4

VCC5_SB G 10KR0402
R228 Q28 VCC1.5 VCC1_2HT R348 100R/1%/4
10KR0402 N-2N7002_SOT23
D31
S

R243 C414
C

X_C0.1u16Y0402

1
1.5V_FB 0.1uf/25V/Y5V/4

+
R233 4.7KR0402 B C375 R349 EC24
18 HT_EN
100R/1%/4 X_1K/1%/4 CD1000u63EL11.5-RH-1

2
Q27 R239 C306 S-SM5817A[SN]_DO214AC
E

N-MMBT3904_NL_SOT23 432R1%0402 0.1uf/25V/Y5V/4

A A

MICRO-START INT'L CO.,LTD.


Title
ACPI CONTROLLER UPI
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 29 of 37
5 4 3 2 1
5 4 3 2 1

DDR II 1.8V POWER High-side MOS AVL(RoHS):


Iripple=8.736A D03-75N022B-N03
1.87*3*1.7=9.537A>8.736A CHOKE1 D03-06N030B-I14
1.2uH/6mm/18A/4mOHM
D03-80N021B-O05
5VDIMM_IN 5VDIMM

5VDIMM_IN

+1

+1

+1
R85 0R/6 5VDIMM

Z
C76 Iripple=20*0.6*0.8/1=9.6A
+12V D12 C85 EC7 EC9 EC8 X_0.01uf/25V/X7R/4 2.22*3*1.7=11.322A>9.6A

2
2

1
R86 X_0R/6 VCC5_SB S-BAT54ALT1G_SOT23-RH
D6
S-BAT54C_SOT23 R89 10uf/10V/Y5V/8 X_1000uf/6.3V/8X11.5/3.5mm/30mOHM

Y
X_0R/6 C127 1000uf/6.3V/8X11.5/3.5mm/30mOHM
D D
1uf/25V/X7R/8 1000uf/6.3V/8X11.5/3.5mm/30mOHM

D
3
R100 2.2R/8 Low-side MOS AVL(RoHS):
G Q15 8.3+2.35+7.165=18A D03-75N022B-N03
R111 C146 N-06N03/5.7mOhm_TO252 CHOKE2 VCC_DDR D03-06N030B-I14

5
R97 U10 0R/4 1uf/25V/X7R/8 1.1uH/9mm/25A/1.4mOHM EC20
D03-80N021B-O05

S
RAM_VREF_R 7 1 1 2 1000uf/6.3V/8X11.5/3.5mm/30mOHM

VCC
RAM_VREF REFIN BOOT +
EC19
3.01KR1%0402 R98 C117 X_C0.01u25X0402 2 DDR_HDRV 1 2 1000uf/6.3V/8X11.5/3.5mm/30mOHM

D
R106 X_15KR0402 UGATE DDR_PHASE R96
+
EC15
8

GND
C128 R101 3.01KR1%0402 PHASE DDR_LDRV Q14 2.2R/8
12.1KR1%0402 6 4 G 1 2 1000uf/6.3V/8X11.5/3.5mm/30mOHM
FB LGATE +
Irms(MAX) of VCC_DDR=18A
C116 UP6103S8_SOP8-RH

S
3
1uf/16V/Y5V/6 X_C33p50N0402 R99 C118 R105 R92
X_0R/4 C1000p50X0402 12.1KR1%0402 X_42.2KR1% C101
C3300p50X0402
D

Co-lay Intersil Adjust OCP CONNECT TO CHOKE OUTPUT


VCC5_SB G Q13
R91 N-2N7002_SOT23 N-06N03/5.7mOhm_TO252
10KR0402
S

CP19
CPU_VDDIOFB_H 6
Q36 VCC_DDR
R88 4.7KR0402 2 6
18,29 SLP_S5#
1 X_0.1uf/25V/Y5V/4 0.1uf/25V/Y5V/4
R322 4.7KR0402 5
SOT23

VCC5_SB 3
4
R323 C131 C141 C137 C96 C166 C147
10KR0402 X_0.1uf/25V/Y5V/4
27 PS_ON# 1 CLOSE TO DEVICE FB
3 D32 X_0.1uf/25V/Y5V/4 X_0.1uf/25V/Y5V/4 0.1uf/25V/Y5V/4
2 S-BAT54ALT1G_SOT23-RH
18,29 GPIO_G3
C C

DDR VTT Power

VCC_DDR VCC_DDR

3VDUAL

W83310DG_SOP8-RH R119
8 1 1K/1%/4
VREF2 VIN VTT_DDR
7 2
ENABLE GND DDRVTT_REF
6 3
VCNTL VREF1
5 4
BOOT_SEL VOUT
9
GND
1

U11
+

R117 EC21
+

R136 1K/1%/4 EC4 1000uf/6.3V/8X11.5/3.5mm/30mOHM


1K/6
2

DUMMY

X_CD470u16EL11.5-RH

B B

A A

MICRO-START INT'L CO.,LTD.


Title
UPI / SYSTEM REGULATORS
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 30 of 37
5 4 3 2 1
5 4 3 2 1

+12VIN CPU_VDD_RUN

5
+12VIN CHOKE3
CH-1.2U18A-LF

GND
12V
3 1 1 2 VIN

1
+

+
C194 EC1 EC6 EC10 EC14 C191 VIN VIN

12V

GND
4 2
X_C0.01u25X0402 C0.1u16Y0402

2
CD1000u16EL20-RH-2 CD1000u16EL20-RH-2
C195
PWR1 PWR-2X2M CD1000u16EL20-RH-2 CD1000u16EL20-RH-2
X_C0.01u25X0402
C68 C75 C88 C112
C1u16X5 X_C10u16Y1206 C1u16X5 X_C10u16Y1206
D D

D
Q6 Q12
U_G1 R67 1R0805 UG1 G U_G2 R93 1R0805 UG2 G
GND GND
R68 10KR0402 N-P0903BD_TO252 COIL1 VCCP R90 10KR0402 N-P0903BD_TO252 COIL2 VCCP

S
0.25uH/40A 0.25uH/40A
PHASE1 1 2 PHASE2 1 2
VCC3 VCC5_SB VCCP

D
L_G1 G Q3 R22 R43 L_G2 G Q8
N-P0903BD_TO252 2.2R0805 47.5R1% N-P0903BD_TO252 R69
R10 R9 R28 R37 X_10KR0402 R75 X_10KR0402 2.2R0805

S
4.7KR0402 10KR0402 1KR0402 VCC5

D
Q2 GNDG C24 GND GNDG
6 2 Q4 C1000p50X0402 Q10 C79
18 VCORE_VLD S-SM5817A[SN]_DO214AC
1 X_N-P0903BD_TO252 X_N-P0903BD_TO252 C1000p50X0402

S
3 5 R20 4.7KR0402 VRM_GD D1
4
PWM_VCC5 GND GND GND GND

C32 C1U25Y0805 +12VIN


0.1uf/25V/Y5V/6 C16

R36
2.2R0805 VIN

7
U1
R35
VRVID4 38 33 12VP1 CORE_TYPE circuit included in F75125

VCC
VRVID3 VID4 PVCC1 BOOT1
39 30 C1U25Y0805
VRVID2 VID3 BOOT1
40
VRVID1 VID2 C35 C126 C139 VRVID4 X_0R/4 R71 CPUVID4
1 2.2R0805
VRVID0 VID1 X_C10u16Y1206 VRVID3 CPUVID3
C 2 C1u16X5 8 7 C
VID0 U_G1 VRVID2 CPUVID2
3 31 6 5

D
VRM_GD VID12.5 UGATE1 C43 Q18 VRVID1 CPUVID1
35 4 3
PGOOD 0.1uf/25V/Y5V/6 U_G3 R116 1R0805 UG3 VCCP VRVID0 CPUVID0
18 VCORE_EN 37 G 2 1
ENLL PHASE1 GND
29
C27 PHASE1 R115 10KR0402 N-P0903BD_TO252 COIL3 RN9
6 CPUVID[0..4]

S
0.1uf/25V/Y5V/6 R33 0.25uH/40A X_8P4R-0R0402
32 IS1 PHASE3 1 2 VCC3
ISEN1 U6

D
C18 34 L_G1 2.8KR1%0402 VCC3
R7 5.1KR1%0402 COP COMP LGATE1 L_G3 Q16 CPUVID4 VRVID4
8 G 10 19
COMP N-P0903BD_TO252 R107 R46 CPUVID3 VID_IN[4] VID_OUT[4] VRVID3
11 18
C4700p16X0402 +12VIN R103 X_10KR0402 2.2R0805 4.7KR0402 CPUVID2 VID_IN[3]/SVC VID_OUT[3] VRVID2
12 17

S
C5 C220p50N0402 CPUVID1 VID_IN[2]/SVD VID_OUT[2] VRVID1
13 16

D
R356 R355 CPUVID0 VID_IN[1] VID_OUT[1] VRVID0
14 15
FB R44 GNDG 10KR0402 4.7KR0402 VID_IN[0] VID_OUT[0]
9

B
FB Q17 C133
2.2R0805
X_N-P0903BD_TO252 C1000p50X0402 VR_DIS_IN 22 20

S
R18 1KR0402 VDIFF 12VP2 CPU_GD_IN VR_DIS_IN VR_EN
10 24 R45 6,13 CPU_GD E C 21
VDIFF PVCC2 CPU_PG_IN
BOOT2 C1U25Y0805 GND GND N-MMBT3904_NL_SOT23
26 5
R21 BOOT2 C40 R70 4.7KR0402 NB_EN#
Q5 7 3
SLOTOCC# VFIXEN VREF_NB
VCCP 8 SLOTOCC# 23
2.2R0805 SLOTOCC#
51R0402 27 U_G2 1 COREFB_H
COREFB+ UGATE2 C42 R58 22R0402 VSI_1 COREFB+
12 18,21,22,29 SMBCLK 24 2
C22 VSEN 0.1uf/25V/Y5V/6 R57 22R0402 SCL VSO_1
18,21,22,29 SMBDATA 25
X_C0.01u25X0402 PHASE2 SDA
28
COREFB_L COREFB_L PHASE2 VCCP
6 COREFB_L 11 28
R17 RGND R38 R77 0R/4 VSI_2
8 CORE_SEL 9 27
C17 C26 IS2 CORE_TYPE VSO_2
25
X_C0.01u25X0402 C0.01u25X0402 ISEN2 EC3
6
B OFS L_G2 CPUVID1 B
51R0402 23 2.8KR1%0402 1+ 2 R80 X_0R0402 4 3VDUAL
VCC5 LGATE2 CD1800u6.3EL20-RH-2 3VSB
VCC_DDR 8 VCC_DDR
R8 Next PCB version don't stuff 6 VDDA25
OFS +12VIN EC2 VDDA
26
GND
130KR1%0402-RH 1+ 2
R26 CD1800u6.3EL20-RH-2
R19 FS 36 R31 F75125RG-RH C84 C83 C82
FS EC5 3VDUAL
X_63.4KR1%0402 2.2R0805
120KR1%0402 REF 5 1+ 2
C19 REF 12VP3 CD1800u6.3EL20-RH-2 SLOTOCC# R59 4.7KR0402 0.1uf/25V/Y5V/6 0.1uf/25V/Y5V/6
18 R42
C0.01u25X0402 PVCC3 VR_DIS_IN R60 4.7KR0402 0.1uf/25V/Y5V/6
BOOT3 C1U25Y0805 EC11
21
BOOT3 C34 VCC3
1+ 2
4 CD1800u6.3EL20-RH-2 GND
R23 VRM10 2.2R0805 COREFB_H R73 X_0R0402 COREFB+
6 COREFB_H
13 20 U_G3 EC13 VRVID4 R61 X_4.7KR0402
OCSET UGATE3 C41 1+ 2
1.5KR1%0402 0.1uf/25V/Y5V/6 CD1800u6.3EL20-RH-2 RN2
14 22 PHASE3 VRVID3 1 2
ICOMP PHASE3 EC16 VRVID2 3 4
R30 1+ 2 VRVID1 5 6
IS3 CD1800u6.3EL20-RH-2 VRVID0
15
ISUM ISEN3
19 7 8 VCCP over voltage Don't STUFF STUFF
GND

VCCP 16 17 L_G3 2.8KR1%0402 EC12 X_8P4R-4.7KR0402 VCCP controlled by F75125 R122 R124 & R133
IREF LGATE3
1+ 2
C31 ISL6566CRZ_QFN40 X_CD680u4EL9-RH VCCP by-pass R124 & R133 R122
41

C0.01u25X0402
BOTTOM PAD CONNECT TO GND VSO_1 is regulated by F75125 pin2
THROUGH 10 vias
A C25 C0.047u16Y0402 R25 12KR0402 PHASE1 A
R40 12KR0402 PHASE2
R24 9.1KR1%0402 R32 12KR0402 PHASE3

MICRO-START INT'L CO.,LTD.


Title
STL6740 3+1PHASE
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 31 of 37
5 4 3 2 1
5 4 3 2 1

Front Panel
VCC5 VCC5 D26 VCC5
BAS32L_LL34
R313 220R 1
R312 220R SPK 2 JFP1
R327 R317 BZ1 VCC5 R326 300R0402 1 2 PWR_LED

C
4.7KR0402 X_4.7K/4 BUZZER-RH SLED# 3 4 SUS_LED
D B 5 6 SWON# D
D27 18 SPKR
R303 C506 FP_RST# R333 33R0402 7 8
1 10KR0402 C0.1U16Y0402
18 FP_RST#
9
POWER BUTTON
24 PD_LED

E
3VDUAL
H2X5[10]_yellow-RH
Q31
3 SLED# N-MMBT3904_NL_SOT23
JFP2 R331
1KR0402
C514 1 2 SPK
SATA_LED X_C0.1U16Y0402 GND SPEAKER SWON# R332 33R0402
17 SATA_LED 2 IO_PWRBTIN# 27
SUS_LED 3 4
VCC3 SLED BUZ+
S-BAT54A_SOT23 PWR_LED 5 6 R328 X_0R0402 C523
PLED BUZ- X_C0.1U16Y0402 C524
8 VCC5 X_C0.1U16Y0402
R321 VCCSPK
X_1KR0402
VCC5_SB VCC3 _H2X4[7]_yellow-RH
PWR_LED SUS_LED FP_RST# 3VDUAL VCC5_SB

C504 C482 C507 C503 C525


X_C0.1U16Y0402 X_C0.1U16Y0402 X_C0.1U16Y0402 X_C0.1U16Y0402 X_C0.1U16Y0402 R315 R316
1KR0402 330R
Q32
R314 300R04022 6 PWR_LED
27 LED_VCC
C 1 C
R309 300R04025 3 SUS_LED
27 LED_VSB
4

R308 R307
1KR0402 330R

3VDUAL VCC5_SB

ATX Connector

-12V VCC3
B B
ATX1
VCC3 13 1
C329 3.3V 3.3V
X_0.1uf/25V/Y5V/4 14 2
VCC5_SB C294 -12V 3.3V C206
15 3 VCC5 0.1uf/25V/Y5V/4 VCC3 VCC3
102pf/50V/X7R/4 GND GND
16 4
R170 P_ON 5V VCC5
10K/4 17 5 R134 R133
GND GND C184 10K/4 10K/4
18 6 0.1uf/25V/Y5V/4
27 PS_ON# GND 5V R153

B
C267 19 7 10K/4
102pf/50V/X7R/4 GND GND
20 8 E C ATX_PWR_OK 18,27
-5V POK Q19
21 9 N-2N3904_SOT23
5V 5VSB VCC5_SB
ATX_PWR_OK_5V 29
VCC5 22 10 +12V
5V +12V
23 11
C243 5V +12V C230
X_0.1uf/25V/Y5V/4 24 12 C224 C211 0.1uf/25V/Y5V/4
GND DET VCC3
0.1uf/25V/Y5V/4

A <REF NAME> 0.1uf/25V/Y5V/4 A


PWR-2X12M
N93-24M0101-H06
MICRO-START INT'L CO.,LTD.
Title
FRONT PANEL
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 32 of 37
5 4 3 2 1
5 4 3 2 1

For IDE BUS VCC3 VCC5 +12V

C467
X_0.1uf/25V/Y5V/4
Decoupling Cap
+12V VCC5_SB C451
C303 X_C0.1u16Y0402
X_0.1uf/25V/Y5V/4 C234 VCC3 +12V +12V VTT_DDR
C456 C89 X_0.1uf/25V/Y5V/4 VCC1.2 VCC3
X_0.1uf/25V/Y5V/4 X_0.1uf/25V/Y5V/4 C464 C358
D X_0.1uf/25V/Y5V/4 X_0.1uf/25V/Y5V/4 C219 D
C313 X_0.1uf/25V/Y5V/4
X_0.1uf/25V/Y5V/4

VCC_DDR

VCC_DDR
-12V for EMI 8/28

C210
X_0.1uf/25V/Y5V/4 C484
X_0.1uf/25V/Y5V/4 VCC5

VTT_DDR

X_0.1uf/25V/Y5V/4 C426 C512 C304


X_0.1uf/10V/X7R/4 X_0.1uf/10V/X7R/4 X_0.1uf/10V/X7R/4 3VDUAL
VCC3
C280 C63 C333
X_0.1uf/10V/X7R/4
C
X_0.1uf/25V/Y5V/4 C97 C65 C178 X_0.1uf/25V/Y5V/4 C366 C486 C
0.1uf/25V/Y5V/4 X_0.1uf/25V/Y5V/4
C275 C322
X_0.1uf/25V/Y5V/4 X_0.1uf/25V/Y5V/4 X_0.1uf/25V/Y5V/4
X_0.1uf/25V/Y5V/4 VCC3
C466 C509 VCCP
X_0.1uf/10V/X7R/4 X_0.1uf/10V/X7R/4 for EMI 8/28

VCC5 3VDUAL
X_0.1uf/25V/Y5V/4
X_0.1uf/25V/Y5V/4 X_0.1uf/25V/Y5V/4

C14 C162 C48 C50 VCC3 C93 C250 C268 C276 C172 C408
X_0.1uf/25V/Y5V/6 X_0.1uf/25V/Y5V/6 X_0.1uf/25V/Y5V/6 X_0.1uf/25V/Y5V/6 X_0.1uf/25V/Y5V/4 X_0.1uf/25V/Y5V/4
X_0.1uf/25V/Y5V/4 C55 C2 C6 0.1uf/25V/Y5V/4

X_0.1uf/25V/Y5V/4
0.1uf/25V/Y5V/4

C511 C438 +12V


VCC5 X_0.1uf/10V/X7R/4 X_0.1uf/10V/X7R/4 VCC5
X_0.1uf/25V/Y5V/4 +12VIN
B X_0.1uf/25V/Y5V/4 X_0.1uf/25V/Y5V/4 X_0.1uf/25V/Y5V/4 B

C282 C60 C45 C212 C429


C214 C236 C379 C449 C493 X_0.1uf/10V/X7R/4 X_0.1uf/10V/X7R/4 X_0.1uf/10V/X7R/4 X_0.1uf/25V/Y5V/4 X_0.1uf/25V/Y5V/4

X_0.1uf/25V/Y5V/4 C229 C233 C312 C421 X_0.1uf/25V/Y5V/4

X_0.1uf/25V/Y5V/4
X_0.1uf/25V/Y5V/4 X_0.1uf/25V/Y5V/4

VCC5_SB
VCC_DDR
VCC3
X_0.1uf/25V/Y5V/4
X_0.1uf/25V/Y5V/4
C167 C149 C254 C499
0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 X_0.1uf/25V/Y5V/4 X_0.1uf/25V/Y5V/4
C239 C457 C483

X_0.1uf/25V/Y5V/4 C434 C380 C354 C439 X_0.1uf/25V/Y5V/4

X_0.1uf/25V/Y5V/4 X_0.1uf/25V/Y5V/4
A X_0.1uf/25V/Y5V/4 A

MICRO-START INT'L CO.,LTD.


Title
FOR EMI
Size Document Number Rev
B MS-7509 10
Date: Friday, January 11, 2008 Sheet 33 of 37
5 4 3 2 1
5 4 3 2 1

Optics Orientation Holes Mounting Holes

FM1 FM4 FM7

MH1 MH2 MH3 MH4 MH5 MH6


X X X

7
D D
X_FM X_FM X_FM
9 6 9 6 9 6 9 6 9 6 9 6
FM3 FM5 FM6
2 5 2 5 2 5 2 5 2 5 2 5

X X X

4
X_FM X_FM X_FM

FM2

X_FM NB FAN/HEAT-SINK BATTERY


U14_H1

C C
1 1
VBAT1-S1

Simulation
JS2 BAT_CR2032
VCC5
SIM1
2 2
X_PIN1*2

JS1 NB-HEATSINK-W/O Fan E31-0402370-K08


SIM2

X_PIN1*2
PCB
B B
PCB1

CPU1-B

E95-0000003-H06
P80-0750910-G37
AVL: P80-0750910-E55

A A

MICRO-START INT'L CO.,LTD.


Title
BOM - Option Parts
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 34 of 37
5 4 3 2 1
5 4 3 2 1

AM2 ATHLON 64
CPU VCORE 0.8-1.55V
ATX P/S WITH 1A STBY CURRENT PW VRM SW CPU_VCORE (S0, S1) 80A(90W)
VBAT 5VSB 5V 3.3V 12V -12V 12V REGULATOR VTT_DDR(S0,S1,S3) VTT_DDR 1.75A
+/-5% +/-5% +/-5% +/-5% +/-5% +/-5% VCC_DDR(S0,S1,S3) VCC_DDR 3.6.A
VDD 1.5V VDD 1.3 V VCC1_2HT (S0, S1)
REGULATOR VCC1_2HT 1.25V 0.5A
REGULATOR MCP61
VCC1_2HT(S0,S1)
D
VCC1_2HT 1.3V 7.5A D

+3.3V (S0, S1)


VCC3 0.615A

0.9V VTT_DDR
REGULATOR DDR400 DIMMs 3VDUAL (S0, S1, S3, S4, S5) 3VDUAL 0.556A
VTT_DDR(S0,S1,S3)
1.8V VCC_DDR
REGULATOR VTT_DDR 0.3A/DIMM (0.6A) 1.2VDUAL (S0, S1, S3, S4, S5)
1.2VDUAL 0.225A
VCC_DDR(S0,S1,S3)
VCC_DDR 2.6A/DIMM (5.2A)
VBAT(G3,S0,S1,S3,S4,S5)
VBAT 5mA(S0,S1)/
100uA(S3,S5)/
10uA(G3)

+3.3VDUAL REGULATOR 3VDUAL (S0, S1, S3, S4, S5) 1.2V STB 1.2VDUAL (S0, S1, S3, S4, S5)
ACPI CONTROLLER REGULATOR
VT6308P 1394
VCC3 (S0, S1)
C
+5VSB REGULATOR +5V_Dual (S0, S1, S3) VCC3 C
ACPI CONTROLLER

VBAT(G3,S0,S1,S3,S4,S5)

AC97 CODEC
VCC3 (S0, S1)
5VAA LDO 3.3V
REGULATOR
+5VR (S0, S1) +5VR (S0, S1)
5V

LAN
3VDUAL (S0, S1, S3, S4, S5)
3VDUAL
AVDD18
AVDD15

B
SUPER I/O B

3VDUAL (S0, S1, S3, S4, S5)


3VDUAL
VCC3 (S0, S1)
VCC3
VBAT
VBAT

+5V_Dual (S0, S1, S3)

PCI Slot (per slot) X1 PCIE X16 PCIE 1394 FR*1 1394 RL*1 USB FR*4 USB RL*4 PS/2

5V 5.0A 3.3V 3.0A 3.3V 3.0A 12V 12V 5VDual 5VDual 5VDual
3.3V 7.6A 1.5A 1.5A 2A 2A 1A
12V 5.5A 12V 5.5A
12V 0.5A
3.3Vaux 0.375A
-12V 0.1A
A X2 A

+3.3VDUAL (S0, S1, S3)

MICRO-START INT'L CO.,LTD.


Title
POWER DELIVERY
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 35 of 37
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

MICRO-START INT'L CO.,LTD.


Title
Power Sequence
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 36 of 37
5 4 3 2 1
5 4 3 2 1

2008/1/10 0A CHANGE 10

D D

C C

B B

A A

MICRO-START INT'L CO.,LTD.


Title
HISTORY
Size Document Number Rev
Custom MS-7509 10
Date: Friday, January 11, 2008 Sheet 37 of 37
5 4 3 2 1

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