SELECTION OF SNUBBERS AND CLAMPS TO OPTIMIZE THE

DESIGN OF TRANSISTOR SWITCHING CONVERTERS

William McMurray

Corporate R&D, General Electric Company

Schenectady, NY

ABSTRACT Total turn-on switching loss

In power transistor switching circuits, shunt t

snubbers (dv/dt limiting capacitors) are often used r s
ei t
to reduce the turn-off switching loss or prevent
W = J dt = ( 1 )
reverse-biased second breakdown. Similarly, series
snubbers (di/dt limiting inductors) are used to 0
reduce the turn-on switching loss or prevent for
During turn-off, the time-dependent factors in the
ward-biased second breakdown. In both cases,
voltage and current equations are interchanged,
energy is stored in the reactive element of the
but result in the same expressions for the power
snubber and dissipated during its discharge. If
dissipation and total turn-off loss, though the
the circuit includes a transformer, a voltage clamp
switching time t will generally be different.
across the transistor may be needed to absorb the g

energy trapped in the leakage inductance. The

If the transistor is assumed to switch expo
action of these typical snubber and clamp arrange
nentially with a time constant , as shown in
ments is analyzed and applied to optimize the de
Fig. lb, then the turn-on equations become
sign of a flyback converter used as a battery
charger.
Transistor voltage (assumed)

TRANSISTOR SWITCHING RESISTIVE LOAD e = exp ^- )

This simple case is reviewed to establish a Transistor current

baseline for the further analysis of switching b e
havior and to show that an effective switching time
can be defined in terms of the switching loss. The
circuit and switching waveforms are shown in Fig. 1,
with two alternative ideal switching characteristics
postulated for the transistor. In Fig. la, the
voltage is assumed to fall linearly during turn-on
and the current is assumed to fall linearly during
turn-off. The circuit equations in the turn-on in
terval are as follows.

Transistor voltage (assumed)

e = E^l - for 0 < t < t g

Transistor current

E-e t , _
!= = ! where I = -
s

Transistor power dissipation

--tt'-i)
F i g . 1. T r a n s i s t o r s w i t c h i n g r e s i s t i v e load
This work has been supported in part by the Depart (a) l i n e a r r i s e and f a l l
ment of Energy, Washington, DC, under Contract (b) e x p o n e n t i a l r i s e and f a l l
DE-AC03-79CS51294 for Phase II of the Near-Term The shaded a r e a s r e p r e s e n t the s w i t c h i n g
Electric Vehicle Program. losses

62

CH1461-3/79/0000-0062$00,75 1979 IEEE

 Total turn-on switching loss

EI
e i dt (2)

Again, the turn-off loss will be given by the same

function (2), but the value of the time constant
may be different.

It can be seen from (1) and (2) that linear

switching behavior will produce the same total loss
as exponential behavior if t = 3. For purposes
of specification, the switching time of a transis
tor is conventionally defined as the interval be
tween the 90% and 10% points of the voltage or
current range. With linear switching, this inter
val t is g

t f
= 0.8 t
Fig. 2. Haversine switching characteristic and
and the loss equation (1) can be written linear equivalent

E I t'
W = s (3) TRANSISTOR SWITCHING INDUCTIVE LOAD
4.8
The three basic types of dc/dc converter (buck,
With exponential switching boost and buck/boost) are drawn in Fig. 3 in a man
ner to emphasize that they are essentially equiva
lent in the switching duty imposed on the transistor
^ = T L
S e ( ) = 2
- 2 0

and the associated diode rectifier. Consequently,

the same approach can be used in the design of snub-
an d (2) ca n b e writ e n bers for any of these converter configurations. The
essential elements for switching analysis are shown
E I t ' in Fig. 4, including typical shunt and series snub-
W = s_ (4 ) bers [1]. The dc filter choke L^ acts as a source
.4 4
of current I, at least during the switching inter
Thi s conventiona l defin tio n o f switchin g tim e val if we assume the continuous-current mode of
i s adopte d becaus e transi to r switchin g character - operation. An effective voltage source appears
istic s d o no t gen ral y fol o w a n idea l curve . across the series string comprising the transistor,
However , a s se n i n (3 ) an d (4) , i t ca n b e use d i n diode and di/dt inductance. Alternative connec
a formul a fo r estimatin g th e switchin g los s tha t tions of the snubbers that do not alter their
dep nd s lit l e o n th e shap e o f th e curve . A s a effective operation are possible. For example, the
furthe r example , a n as ume d haversin e character - capacitor may be connected to the positive pole of
istic , Fig . 2 , yield s sim la r results . the voltage source, and the transistor terminal of
the inductance may connect to^the current source,
as indicated by dashed lines in Fig. 5.
1 + c o s TT
It should be noted that the snubber designed
Fo r e =
:o reduce the transistor duty during one type of
switching tends to increase the duty during switch
EI t E I t' ing of the opposite type. That is, discharge of the
W = (5)
4.72s shunt capacitor increases the turn-on current and
discharge of the series inductor increases the turn-
where off voltage. These undesirable effects can be miti
gated by associating appropriate reactances with the
t f
= - sin" (0.8) t 1 discharge resistors, as indicated in Fig. 4, in
s v

accordance with the principle of duality. If the

turn-on and turn-off switching requirements are
Since analysis is simplified by assuming a linear favorably balanced, a common discharge arrangement
switching characteristic, it is more convenient to can be used for both snubbers, as shown in Fig. 5.
define an equivalent linear switching time For the present simplified analysis, it will be
t ~ 1.25 t , as indicated in Fig. 2, such that the
s s assumed that the shunt discharge impedance is high
resistive load switching loss is given by equation and the series discharge impedance is low, so that
(1). their effects can be neglected.

63
 Ideal waveforms for a transistor switching in
ductive load are sketched in Fig. 6. The case with
no snubbers is seen in Fig. 6a. During turn-on,
Ld
the transistor is forced to switch from zero cur
rent to the full value I (time t-^) before its
voltage can begin to fall from the full value
(time t^)* Similarly, during turn-off, the volt
age must complete its rise before the current can SERIES -p
begin its fall. Assuming linear switching in all SNUBBER ~
instances, the general formula for switching loss
W is seen to be

EI t
W = (6)

where ti + t , and may differ between turn-on

9

and turn-off. Thus, the inductive load switching

loss (6) is three times the resistive load switch
ing loss (1), assuming that the total switching
time t remains the same with the more severe in
s

ductive duty, a condition which may not be true.

Fig. 4. Snubbers to assist transistor switching

inductive load. The dashed lines
indicate optional reactances associated
with discharge resistors

With the addition of snubbers, the effect of

() , E
s interaction between the transistor device and the
external circuit will be assumed to be as follows.

During turn-on, the voltage fall is a linear

time function completely determined by the
transistor characteristics, while the cur
rent rise is determined by the resulting
action of the series snubber.

I During turn-off, the current fall is a

linear time function completely determined
by the transistor characteristics, while

(b) E< 2
- E == E 2
the voltage rise is determined by the re
sulting action of the shunt snubber.

-
"S

(0

Fig. 3. The three basic types of dc/dc converter

requiring the transistor to switch
inductive load
(a) buck (voltage step down)
(b) boost (voltage step up)
(c) buck/boost (voltage step up or
down)
Fig. 5. Snubbers with a common discharge
resistor and diode. The dashed
lines indicate alternative
connections

64
This over-simplification of the transistor switch
1 /
\\ ! /
ing action is made necessary by the lack of de
tailed knowledge regarding the differential equa
tions governing the transient behavior of the de
vice. The results to be derived must be regarded
as merely qualitative. In particular, it is ex
*2
ht
pected that the switching time t should be a func
s

tion of the snubber size and not constant, as has

{
been assumed. /
\ /
I " ' "

With this idealization, the switching wave / \

forms with small, normal and large snubbers are t \
sketched in Fig. 6b, c and d, respectively. The
voltage and current scales have been selected so
that and I are represented by the same height,
j .
which emphasizes the duality between the behavior
\ /
of the series and shunt snubbers: the voltage
waveform during turn-off is similar in shape to t \ /
I \ /
the current waveform during turn-on. A "normal"
(c) / \ y \

1
sized series snubber is defined to be that which y \
allows the transistor current to reach the level I 0
at the same time as the voltage reaches zero, as
1
indicated in Fig. 6c. A "small" series snubber
-Vi -tri
/ "
allows the current to rise faster, while a "large"

\
\
snubber slows the current rise, such that it
reaches the full value I before or after, respec
(d)
t
\
\
\

\y

tively, the time of zero voltage. The size of a

shunt snubber is similarly defined in terms of the
0
TURN
1 TURN

voltage rise time that it allows. Note that these
terms are relative: "normality" pertains to par
ticular values of , I and t , and so will change
ON OFF
with operating conditions.
Fig. 6. Voltage (solid lines) and current
(dashed lines) waveforms for
To again demonstrate the duality of turn-on
transistor switching inductive load
and turn-off action, the equations for the two cases
(a) no snubbers
will be placed side-by-side in the following anal
(b) small snubbers
ysis. It may be noted that paired equations have
(c) "normal" snubbers
the same mathematical form.
(d) large snubbers

TURN-ON TURN-OFF
(Series snubber L ) (Shunt snubber C)

Transistor action
-<i-f) i..(l-f) \ S /
(7)
\ s/

Snubber action i = - / (E-e)dt i)dt

U
0
0
t

dt dt
h i t - 1
i-
S G
c J t

Et 1 t (8)
2L t 2 Ct

"Normal" snubber i = I when t = t e = E when t = t

s
definition s

E t I t
C = (9)
L - - S - 2E
n 21

65
 TURN-ON TURN-OFF
(Series snubber L ) (Shunt snubber C)

"Large" snubber L > L C > C

n

t I t
At t = t s
= = 8
* s E =
2C
s s 2L
O T

L C
(10)
=
= E
f

di _ de _ I
For t > t
s dt L dt C

I-I E-E
Time t to complete - s
r -
s
t
t
di/dt r de/dt
commutation

(11)

Total commutation
(12)
time t = t + t
c s r

Transistor power 2 / \ 2
EL t Vt
dissipation, = ei (13)
P =
2L l - 1
~ f t
(0 < t < t ) N
s' s

E 2
t I 2
t
Peak power =
s S
when t/t = 2 / 3 m
m 27 L
P
m 27 C
s
L C
4 4
-El (14)
27 27

2 2
t i 2
t 2

Transistor Energy s S
W = W =
t 24 L 24 C

Loss dt El t L El t C
s_ _n s __n
(15)
12 * L 12 ' C

Energy W stored
g
- 4 s 2
in snubbers s 2
El t
L E I t
s C
s (16)
4 *L 4 C
n n

Total Circuit Energy El t El t

S /l ji , 1 __
W = W + W w = (17)
T s T
V 6 L 2
V U * C 2 * C
\ n
"Small" snubber L < L C < C

At time (see Fig. 6b) Put i = I in (8) left Put e = in (8) right
Solve for t^
/2LIt 2C Et
/ -V 1

(18)

66
 TURN-ON TURN-OFF
(Series snubber L) (Shunt snubber C)

Equations (13) remain valid in range 0 < t < t j _ .

Transistor power
If tj_/t > 2/3, then (14) remains valid for the
dissipation, = ei s

peak power

Transistor Energy Loss

up to time
V
(
V 3

. ..V P.
w
i J
0

dt

W- = I t (19)
1 s 3 t
s

= el [e from (7) left] = Ei [i from (7) right]

Transistor power
dissipation in range
t- < t < t
1 s
= EI il
\ t) s -
= EI 1
t) (20)

= EI 1 . = EI 1
Peak power at t = t, m V t m V t_
if t j t < 2/3
1 s
= El El 1 (21)

h
Transistor Energy Loss
between t.. and t , W 2 - E l /
1 s

t h

W 2 = J dt I t
s 1 (22)
h 2

Total Transistor Energy

Loss, W = \J + W 1 2
W
I t

2
s 1 -

_
t (23)

El t I t /
4 . 4 y
W =
2 S

(- " 3
^
/ L

+
2
i
t) 3 /

2 C
'
J
(24)

It I t /

:)
Total Circuit Energy 4 4
s w = (25)
W = W + W
T s
V 2 (* 3 >/ L

L
T
' 3 *
/

Condition for L 4 C _ 4
(26)
Minimum Energy L 9 C 9

El t
5
Minimum Energy s (27)
W
T 9 2
min

El t
In transistor W - -j s
2
Distribution of (28)
minimum energy (27) El t
2
s
In snubber W = 2
s 9

67
 After turn-on, the shunt snubber capacitor
discharges via the transistor in the series C-R-L
loop. Discharge begins when the freewheeling or
flyback diode D blocks and the discharge current
i is superimposed over the load current I already
Q

transferred to the transistor. Assuming the oscil

latory case, the equations for the current i and
the capacitor voltage e^ are

exp (- at) sin (u)t) (29)

exp (-at) cos (ait-) (30)

where

/
"
1 R = a
v C
2L'

. - l a
= sin


SNUBBER SIZE =- OR
The peak discharge current is attained when
cot = / 2 - and has the value

Fig. 7. Relative switching losses and peak

transistor power dissipation as a I = exp (31)
max X
function of snubber size

The capacitor voltage reaches zero when cot = /2 + ,

at which time the snubber polarizing diode Dp be
The energy loss parameters (15), (16), (17), gins to conduct and the remaining overcurrent in
(24) and (25) relative to the loss with no snubber the L-R loop decays exponentially.
(6) are plotted as functions of the snubber size in Fig.
7. These results are similar to those of Calkin After turn-off, the series snubber inductor
and Hamilton [2], It is seen that certain values begins to discharge when the diode D conducts. The
of capacitance and inductance (26) will minimize
the total switching losses, including losses in the
transistor and the dissipation of the energy stored
in the snubbers. With this optimum snubber selec
tion, the transistor loss (28) is reduced to one-
third of its value without snubbers (6), or the
same as for the case of resistive load (1), assum
ing that the total switching time remains the same
for all conditions. Larger snubbers will further
reduce the transistor switching loss, but at the
expense of a greater increase in the stored energy.
However, it can be seen in Fig. 7 that the total TURN ON TURN OFF
loss is relatively insensitive to variations in
snubber size in the region near the minimum. Also, INDUCTOR CURRENT CAPACITOR VOLTAGE
consideration of second breakdown may make the peak
transistor power (14) or (21), shown by the dashed
line in Fig. 7, a more important criterion for snub
ber design.

SNUBBER DISCHARGE

The previously neglected effects of snubber Dp CONDUCTS Dp BLOCKS

discharge will now be investigated. For simplicity,
only the case of relatively large snubbers will be
considered, such that the transistor has completely
switched before the discharge begins. The circuit
using a common discharge resistor and polarizing
diode, Fig. 5, producing waveforms such as shown
in Fig. 8, will be studied.
Fig. 8 . Switching waveforms for circuit of
Fig. 5, including discharge of
snubbers (drawn for R = / l / C )
(a) transistor voltage and current
(b) snubber voltage and current

68
discharge voltage e is superimposed over the source
Q PARASITIC "SNUBBERS"
voltage already present across the transistor and
shunt snubber capacitor. The discharge network is
the effectively parallel branches L/R/C. Again
assuming the oscillatory case, the equations for the
voltage e and the inductor current i are
Q L
I X exp (- at) sin cot
i = I exp (-at) cos (-)
where the parameters are the same as in (29) and
(30), except
" 2CR
The peak discharge voltage is attained when
cot - /2 - and has the value
S(
IX exp
The inductor current reaches zero when oot= /2 + ,
at which time the snubber polarizing diode Dp
blocks and the remaining overvoltage in the C-R-
source loop decays exponentially.
The duality of the equations describing the
two types of discharge is apparent. If the common
discharge resistor is selected to have the value
R = X , then the damping factor will be the same
Q
in both cases, = 30, and the exponential term
in (31) and (34) has the value 0.546. Furthermore,
if the transistor turn-off time is equal to its
turn-on time and the snubbers are equally sized
(relative to "normal ), then 11
/ L ^ / L . n C
= 9
o / c I/ L ' C
and the duality is complete, as illustrated by the
waveforms in Fig. 8. By adjusting the parameters,
reduced overvoltage can be achieved at the expense
of increased overcurrent, or vice-versa. If a
satisfactory compromise cannot be found, then it
would be better to separate the snubber discharge
networks, as in Fig. 4.
It may be desirable to improve the converter
efficiency by recovering some of the energy trapped
in the snubbers if the power involved becomes sig
nificant, as in high-power, high-frequency opera
tion. For example, a secondary winding on the
series inductor can be connected to the voltage
source via a polarizing diode. This will limit
the level of the overvoltage, depending on the
turns ratio, as well as discharging the inductive
energy into the source. Other arrangements can be
made to partially recover the shunt snubber energy
[2].
It has, so far, been assumed that the snubbers
are lumped reactances intentionally inserted in the
circuit to improve the switching loci of the power
transistors. Some converter circuits, such as the
buck/boost ("flyback") converter with transformer-
coupled output, Fig. 9, include parasitic elements
(32) that have an effect on circuit operation similar to
snubbers. The leakage inductance of the transformer,
plus stray inductance in the input and output loops,
is in the same path as a series snubber. Unfortu
(33)
nately, the amount of leakage inductance is generally
much larger than the optimum value for di/dt limiting
and, being distributed, is inaccessible for connec
tion of the usual discharge resistor. Therefore,
other means for limiting the resulting high voltage
overshoot during turn-off are necessary.
This voltage spike can be suppressed by increas
ing the shunt snubber capacitance, but its discharge
loss may become excessive. Alternatively, the tran
sistor voltage can be clamped to a predetermined
level by connecting its collector to a voltage sink
(34) via a diode, as shown in Fig. 9. If a voltage
source of suitable value (V^ > E) is available, this
method is simple and loss-free. Another simple, but
lossy, method is to connect an avalanche or Zener
diode across the transistor. Generally, an artifi
cial voltage sink must be created, consisting of a
capacitor and discharge resistor, which must dissi
pate the energy trapped in the leakage inductance
plus additional losses required to maintain the
voltage level of the clamp. An analysis in the next
section yields a criterion for the conditions under
which use of such a clamp is more efficient than a
large shunt snubber.
The dual of transformer leakage inductance is
its distributed winding capacitance, which becomes
significant in a converter having a high voltage
step-up ratio [3]. Such parasitic capacitance is
t
s on equivalent to a large shunt snubber, but is in
(35) accessible for connection of the usual discharge
't ^ I
s ,of f resistor and so can result in a high current pulse
during turn-on. In this case, use of a current
clamping arrangement would be appropriate. The dual
OUTPUT
LEAKAGE
INDUCTANCE
STRAY
CURRENT INDUCTANCE
CLAMP
VOLTAGE =r INPUT
CLAMP
Transformer-coupled flyback converter,
Fig. 9.
showing parasitic elements, with ideal
clamps to limit their effect on the
transistor
69
of an ideal voltage clamp would be a current source
1^ across a diode in series with the transistor, as di
indicated in Fig. 9. A more practical version for dt
transient clamping would be an ampere-turn biased
reactor, designed to unsaturate when the transistor t (36)
current attempts to exceed 1^. k V, -E

VOLTAGE CLAMPS The energy W ^ absorbed by the clamp is equal to the

charge delivered in this interval, times the voltage
The equivalent circuit for analyzing the action
of a voltage clamp in discharging an effective series
W
k " 2 1 C
k V
k

(37)
2 L i
V, -E

Note that if the voltage sink V ^ can be re

placed by a sink V = V ^ - E located as shown by
Q

dashed lines in Fig. 10a, then only the trapped in

ductive energy LI^/2 is involved and the sink loss
is a minimum. Thus, the dissipative element of an
artificial voltage sink should be connected from
the cathode of diode to the level E, or as close
to that voltage as possible.

In a transformer-isolated flyback converter,

Fig. 11, a voltage of level is not available, so
the clamp discharge resistor is connected to the
source voltage E j . The clamp capacitance C^ should
be large enough to absorb the charge delivered dur
ing the clamping interval with little rise in volt
age, but its value is otherwise not critical. The
negative terminal of the capacitor should be con
nected to the emitter of the transistor that it
protects, minimizing the loop inductance through
diode D^. The resistance R^ is selected to main
tain the voltage V ^ at a safe level for the tran
CURRENT sistor under the worst-case operating conditions.
A design criterion can be obtained by equating the
IN D

k average current input to C^ via to the average

Fig. 10. Operation of a voltage clamp

(a) equivalent circuit
(b) waveforms during clamping interval,
where the shaded area represents
the charge fed into the clamp

snubber inductance L is depicted in Fig. 10a. Wave

forms during the clamping interval are sketched in
Fig. 10b, assuming that the transistor turns off SHUNT j . VOLTAGE
rapidly and no shunt snubber is required. When the SNUBBER j ! CLAMP ,
transistor turns off, its voltage rises to the clamp
level V^, both flyback diode D and clamp diode
I
conduct, and the inductance discharges against the
Fig. 11. Transformer-coupled flyback converter
difference between V^ and the effective source volt
for charging accessory battery,
age E. The inductor current falls linearly from its
including a shunt snubber and a
initial value I to zero in a time t^, as given by voltage clamp

70
current output from via R^. Neglecting the A voltage clamp will be more efficient than a shunt
effect of the shunt snubber in Fig. 11, the input to snubber in limiting the overvoltage if < , or if
the clamp is similar to Fig. 10b. At an operating
frequency f, the current balance condition is
El

l i t f = ^ i

R)
2
1 C
k 1

V, < (41)
which yields

2 (
V 1 V E ) ( E )

(38)
It can be seen from (41) that a clamp will be
more efficient unless the transistor is rated to
LI f 2
withstand very high overvoltage transients. How
ever, it is desirable to include a shunt snubber
For worst-case design, the maximum values of E^, E, sized to reduce the turn-off switching loss, as
I and f should be substituted in (38). In particular, previously demonstrated. With the combination of a
I should include the peak ripple. voltage clamp and shunt snubber, the waveforms dur
ing discharge of the series inductance become as
In the circuit of Fig. 11, shown in Fig. 12. The shunt capacitor absorbs
energy CV 12 from the inductance during the inter
=. + E^ val t pror to clamping, which energy is dissi
&

pated in resistor R during interval t^ after clamp

ing. Equation (39) for the power in the clamp re
where E^ is the output voltage E referred to the sistor R^ is modified to become
primary side of the transformer

(V o + E-)
(42)
E
2
P
k =

The transient overvoltage V on the transistor, Q

This leads to the following equation for the over
above the steady "off" level E, is voltage V in terms of fixed parameters and operat
Q

ing conditions
V = V, -E
k
/(E^) +2LI
2 2
f^- E'
The power dissipation P^ in the resistor R^ is
V =
given by 2+ fC (43)

(
V 1>E

1 LI f 2
^
\ 2 L i 1
V, -E
E
2
= \ LI f 2
(39)
(a)

This may be compared with the loss incurred by

a shunt snubber designed to limit the overvoltage
to the same value V . In this case, there is little
Q

damping during the voltage rise, so that

= iSl[c
V

and the required value of snubber capacitance is (b)
CHARGE INTO CLAMP

\ Fig. 12. Waveforms following transistor turn

off, illustrating action of a voltage
Then, the total snubber power loss P , which will be c
clamp combined with a relatively
dissipated in its discharge resistor R, is given by large shunt snumbber
(a) transistor voltage and current
1 2 2
= (LI + CE )f (b) current in equivalent inductance
c of parasitic elements in series
with transistor, where the shaded
(40) areas represent charge absorbed
by the capacitors.

71
 DESIGN OF FLYBACK CONVERTER FOR BATTERY CHARGER

The principles developed in the previous sec

tions were applied to optimize the design of a trans
former-coupled flyback converter, Fig. 11, used to
charge the accessory battery in an electric auto
mobile being built by General Electric for the U.S.
Department of Energy. The source is the main
propulsion battery of the vehicle, which varies over
the range 60-160 V, depending on its state of charge.
The load E is the 12V (nominal) battery used to
2

supply the accessory electrical equipment on the (a)

automobile. A maximum output current of 36 A is re
quired. Considering the state of charge of the
accessory battery and temperature extremes, the
output voltage can vary over the range 1 3 . 5 - 1 5 . 3 V.

Operation of the converter, neglecting the non-

ideal switching transients previously discussed, is
illustrated in Fig. 13 for two values of input volt
age but approximately the same output, conditions
typical of the present application. The transistor
and diode conduction times T q and T q , respectively,
have a constant sum of 50 ys at the selected oper
ating frequency 20 kHz. Balance of the transformer
flux-linkage excursions in steady-state operation
requires that

E
l T
Q E
2 T
D
(44) (b)
The control circuit regulates the output voltage and
current by adjusting the transistor conduction time.
The power controlled by the converter can be
written in the following alternative forms, neglect
ing losses

Fig. 13. Ideal waveforms in a flyback converter,

E
lV
2
E
1 2 E

neglecting details of switching

(45)
T
Q + T
D " V D T
" E
l + E
2 transients, in heavy current mode
Heavy solid lines: transistor voltage
The approximate power rating required of the and current
transistor, defined as the product of its "off" Heavy dashed lines: output diode
voltage and "on" current, neglecting switching tran current, referred to input side of
sients, is given in terms of the power by transformer
(a) high input voltage
(b) low input voltage

( i E + E
) 2

EI
2
= (46) /, . E-
1 _ / l,min

l,max
E
l E
2 (47)
E . E
0
2, min 0
2, max

In the present instance, (47) yields

This has a minimum value of 4 when Eo = E-^ and
increases to 4.5 when E^/Ej^ = 2 or 1/2. It can
be seen that the transistor rating EI will be mini
60 160
mized for operation over a range of input and out 6.82
N / .13.5 15.3
put voltages if one extreme value of the ratio
E
2^ 1E
roade equal to the reciprocal of the other
i s

extreme value, as follows Of course, the actual value must be a ratio of in

tegers and may need adjustment to match the capa
bility of available transistors. A turns ratio of
2, max l,max
36/4 was selected.
.
,
i
2,min
The transformer magnetizing inductance 1 ^ is
This implies that the transformer turns ratio should the parameter that limits the current ripple, accord
be made equal to the geometric mean voltage ratio ing to

72
where I and I are the peak and valley values of
current^ respectively, as indicated in Fig. 13. Note
that, in the previous sections, the peak current I
should be used in equations pertaining to turn-off,
while I prevails at turn-on. While a small value
v

of Ljjp such that = 0 and I = 21, will minimize

p

the transformer size, it will increase the duty of

the transistor, shunt snubber and voltage clamp.
Thus, a compromise is necessary, and L * 300 m

was selected in the present design.

The leakage inductance L of the transformer

should be as small as possible to minimize the
trapped energy during turn-off and the consequent
losses, mainly in the voltage clamp according to (42).
To achieve the desired high efficiency for the con Fig. 15. Typical oscillogram of transistor
verter, special coil winding techniques were neces current and voltage
sary, including interleaving of the primary and Upper trace: current, 5A/division
secondary windings. The primary winding, of 0.25 Lower trace: voltage, 100V/division
inch wide copper braid, consists of 4 layers having Time : 10ys/division
9 turns each. Input voltage: 60V
Output current: 13A
One-turn sections of the secondary conductor, Note the 300V, 3ys clamping interval
cut from copper sheet 0.02" thick, are wrapped over following turn off.
each layer of the primary winding before continuing
with the next primary layer, with 0.01" thick insu
lation between layers. Start and finish tabs pro
jecting from each of the four secondary sections Other components of the converter are as fol
outside the body of the coil are soldered to con lows :
nect the sections in series. To aid in visualizing
this construction, the secondary winding would Transistor: Motorola MJ10005 (400 , 20A)
appear as sketched in Fig. 14, if unwound. The com Output diode: TRW SD-51 Schottky (35 v, 6OA)
pleted coil was placed on the center leg of a double- Snubber and clamp diodes : GE A115M (600 , 5A,
E ferrite core, with air gaps to obtain the desired fast recovery)
value of L . With this construction, a leakage in Output filter capacitor: five Sprague 604D103G016JT6
ductance L 3.6 was achieved, referred to the (50,000 \i total, 16 V D C )
primary winding. Stray inductance in the input and Shunt snubber: C = 0.022 yF, 600v; R = 100 ohm,
output loops increased the total parasitic induct 25 watt
ance to about 5 .
Voltage clamp: c= kP 1 F \ = 0 0 ohm,
6 0 0 v 1 5

50 watt
TABS SOLDERED T O G E T H E R Diode snubber: = 0.22 pF, 50 v; Ri = 1 ohm,
10 watt, non-i-mductive.

The shunt snubber and voltage clamp were designed

according to the theory presented here, while the
diode snubber design follows the principles of
START FINISH Reference [4]. An ordinary inductively-wound re
(a) sistor is best for discharging the shunt snubber,
0.6" but the diode snubber resistor should be non-
inductively wound. Typical oscillograms of the
transistor current and voltage are presented in
Fig. 15.
4
M

CONCLUSIONS
(C)
The basic action of typical shunt and series
Fig. 14. Transformer construction for low
snubber configurations has been reviewed in a manner
leakage inductance
to emphasize the duality of their behavior; that is,
(a) secondary winding, unwound,
the equations have the same mathematical form, but
viewed from outside
voltage and capacitance in the shunt snubber are re
(b) one coiled layer of secondary
placed by current and inductance, respectively, in
winding
the series snubber. The results show that certain
(c) dimensions of double- ferrite
values of snubber capacitance and inductance will
core

73
minimize the total switching losses, including
losses in the transistor and the eventual dissipa
tion of energy stored in the snubbers. While this
conclusion is derived from a simplified analysis
assuming the transistors have a linear switching
characteristic independent of the snubber size, it
remains qualitatively valid when the snubbers have
a significant effect on the transistor switching
action.
To further advance the understanding of snubber
action and design optimization, an improved repre
sentation of the dynamic behavior of switching power
transistors is needed. Some studies using relatively
simple equivalent circuits to model the transistor
have been reported [5,6]. A more accurate model for
switching dynamics will probably involve nonlinear
differential equations, perhaps simplified and
partially empirical, such as have been used for
thyristors and diodes [7], These equations can be
incorporated with the differential equations for the
external circuit, including snubbers, in a computer
program and solved numerically.
It may be noted that all the equations for
transistor switching loss involve the switching
time as a directly proportional factor. If the
switching time can be reduced sufficiently, such as
by operating high-speed devices in the non-saturated
conduction mode, then it is possible to reduce the
switching loss to such a low value that snubbers
become unnecessary and very high frequency (e.g.,
500 kHz) operation can be achieved [8]. Under these
conditions, distributed circuit impedances become
more significant and can act in a fashion similar
to snubbers.
At lower frequencies, distributed impedances
generally associated with transformers can hinder
efficient switching action. Usually, the trans
former leakage inductance is most critical, since
it traps energy at the time of transistor turn-off.
An analysis of voltage clamps to absorb this energy
without excessive overvoltage on the transistor has
been presented here, and clamps are shown to be
more efficient than large shunt snubbers.
REFERENCES
1. S.K. Rao and K. Bauman, "Design of Buck Type
Switched-Made Power Supplies Using Non-ideal
Components," Conf. Ree. PESC, 1975, pp. 126-137.
2. E.T. Calkin and B.H. Hamilton, "Circuit Tech
niques for Improving the Switching Loci of
Transistor Switches in Switching Regulators,"
IEEE Trans, on Industry Applications, Vol. IA-12,
No. 4, July/August 1976, pp. 364-369.
3. R.P. Massey and E.C. Snyder, "High Voltage Single-
Ended DC-DC Converter," Conf. Ree. PESC, 1977,
pp. 156-159.
4. W. McMurray, "Optimum Snubbers for Power Semi
conductors," IEEE Trans, on Industry Applica
tions, Vol. IA-8, No. 5, Sept./Oct. 1972,
pp. 593-600.
5. D.D. Bahler, H.A. Owen, Jr. and T.G. Wilson,
"Predicting Performance of Power Converters
Operating with Switching Frequencies in the
Vicinity of 100 kHz," Conf. Ree. PESC, 1978,
pp. 148-157.
6. K. Harada, T. Ninomiya and M. Kohno, "Optimum
Design of an RC Snubber for a Switching
Regulator by Means of the Root Locus Method,"
Ibid., pp. 158-167.
7. I.L. Somos and D.E. Piccone, "Temperature Excur
sion in Thyristors Due to Short Current Pulses
During Forward Conduction and Reverse Recovery
Phase," Conf. Ree. IAS Annual Meeting, 1974,
Pt. 1, pp. 495-506.
8. R.P. Severns, "High Frequency Switching Regulator
Techniques," Conf. Ree. PESC, 1978, pp. 290-298.

As an example of the application of these aids

to transistor switching performance, the design of a
transformer-coupled flyback converter for the
accessory battery charger of an electric vehicle has
been outlined. Of particular interest is the design
of the transformer to minimize its leakage inductance
as well as selection of the turns ratio and magnetiz
ing inductance to optimize converter performance with
in the constraints of the available power transistor
and Schottky diode devices. Both a shunt snubber and
voltage clamp are used to control the switching
transients.

74