Académique Documents
Professionnel Documents
Culture Documents
Hsiao-Lung Chan
Dept Electrical Engineering
Chang Gung University, Taiwan
chanhl@mail.cgu.edu.tw
Compare mode
2
Compare mode operation
3
CCP high and low registers
CCP pins
4
CCP1 control register
5
PIR1 (Peripheral interrupt flag register1) containing
CCP1IF flag
6
Timer3 block diagram
Fosc/4
T3CKPS1:T3CKPS0
7
T3CON (Timer 3 control) register
8
A 1-Hz pulse is fed into Timer3 pin. Toggle LED
every 10 pulses using CCP Compare mode
MOVLW 0x02 ; Compare mode, toggle on match
MOVWF CCP1CON
MOVLW 0x42 ; Timer3 for compare mode, no prescale
MOVWF T3CON
BCF TRISC, CCP1 ; CCP1 pin as output
BSF TRISC, T1CKI ; T3 CLK pin as input
MOVLW D10
MOVWF CCPR1L
MOVLW 0x0
MOVWF CCPR1H
OVER CLRF TMR3H
CLRF TMR3L
BCF PIR1, CCP1IF
BSF T3CON, TMR3ON ; start Timer3
B1 BTFSS PIR1, CCP1IF
BRA B1
BCF T3CON, TMR3ON ; stop Timer3
GOTO OVER 9
Timer1
TMR1H TMR1L
TMR1ON
T1SYNC
T1OSO/T1CKI
T1OSCEN
T1OSI
Fosc/4
T0PS1:T0PS0
TMR1CS
10
T1CON (Timer 1 Control) Register
11
Generate a square wave with a 40 ms period and
50% duty cycle on CCP1 pin if XTAL = 10 MHz
MOVLW 0x02 ; Compare mode, toggle on match
MOVWF CCP1CON
MOVLW 0x0 ; Use Timer1 for compare mode
MOVWF T3CON
MOVLW 0x0 ; Timer1, internal clock, no prescale
MOVWF T1CON
BCF TRISC, CCP1 ; CCP1 pin as output
MOVLW 0xC3
; 20 ms / 0.4 s = 50,000 = 0xC350
MOVWF CCPR1H
MOVLW 0x50
MOVWF CCPR1L
OVER CLRF TMR1H
CLRF TMR1L
BCF PIR1, CCP1IF
BSF T1CON, TMR1ON ; start Timer1
B1 BTFSS PIR1, CCP1IF ; monitor Timer1 flag
BRA B1
BCF T1CON, TMR1ON ; stop Timer1
12
GOTO OVER
Capture mode
every 4
th rising-edge pulse
every 16
th rising-edge pulse
13
Measure the period of a pulse
14
Measure the period of a pulse (cont.)
15
Measure the period of a pulse (cont.)
16
Measure pulse width
17
Measure pulse width (cont.)
CLRF TRISB
CLRF TRISD
BSF TRISC, CCP1 ; CCP1 pin as input
BSF PIE1, CCP1IE ; enable CCP1 interrupt
BSF INTCON, PEIE ; enable peripheral interrupt
BSF INTCON, GIE ; enable global interrupt
BCF PIR1, CCP1IF
OVER CLRF TMR1H
CLRF TMR1L
WAIT BTFSS FLAG, DISP ; Is capture complete?
BRA WAIT
BCF FLAG, DISP ; clear DISP flag for next capture
MOVLW 0x03
SUBWF TMR1L, F ; subtract the overhead
MOVFF TMR1L, PORTB
MOVFF TMR1H, PORTD
19
GOTO OVER
Measure the period of a pulse (cont.)
20
PWM mode
21
PWM mode operation
22
Set the period and duty cycle of PWM
Period of PWM
Tpwm = (PR2 + 1) x 4 x Tosc x N
(N: prescaler of 1, 4, or 16)
Fosc/4
T2CKPS1:T2CKPS0
TOUTPS3:TOUTPS0
25
Create a 2.5 kHz PWM with a 75% duty cycle
CLRF CCP1CON
MOVLW D249
MOVWF PR2
MOVLW D186 ; 75% duty cycle
MOVWF CCPR1L
BCF TRISC, CCP1 ; make PWM pin an output
MOVLW 0x01 ; Timer2, 4 prescale, no postscaler
MOVWF T2CON
MOVLW 0x2C ; PWM mode, 10 for DC1B1:B0
MOVWF CCP1CON
CLRF TMR2
BSF T2CON, TMR2ON ; start Timer2
AGAIN BCF PIR1, TMR2IF ; clear Timer2 flag
OVER BTFSS PIR1, TMR2IF ; wait for the end of period
BRA OVER
GOTO AGAIN
26
Reference
27