Implementation of a Digital Lock-in Amplifier on a Field

Programmable Gate Array and its Remote Control in a Local Area

Network
Christoph Fischer
Supervisor: Vlad Negnevitsky
Department of Physics, ETH Zurich

Zurich, February 9, 2015

Abstract
Lock-in amplifiers provide an excellent technique for measuring weak signals not resolvable
by conventional amplifiers. Commercial solutions, however, are often costly and inflexible. In this
thesis, a low-cost and easy-to-use digital lock-in amplifier with integrated proportional-integral (PI)
controller is presented, implemented on a field programmable gate array (FPGA). Furthermore, a
solution for controlling multiple such FPGAs remotely in a local area network (LAN) was developed.

Contents
1 Introduction 2

2 Theory 2
2.1 Lock-in Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2.2 Saturated Absorption Spectroscopy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.3 Z-Transform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.4 Low-Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3 Implementation 7
3.1 Low-Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.2 Lock-in Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.3 Laser System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.4 Pre-amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.5 Network Communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.5.1 Client . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.5.2 Server . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

4 Results 15
4.1 Lock-in Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.1.1 Loop-back Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.1.2 Lab Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2 Network Communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

5 Conclusions 19

A Flowcharts 20

B Installation Guide 22

1
1 Introduction
In this semester project, a digital lock-in amplifier was realized on an FPGA (field programmable gate
array) as a replacement of an analogue lock-in for frequency stabilization of a laser. In a second step,
a server-client type architecture was developed for remote control using a Raspberry Pi as a gateway
between a client on a remote computer and an FPGA.
The project is based on the implementation of a PID lock-box on the same FPGA called EVIL
(electronically variable interactive lock-box) and uses some of the existing Python code for the graph-
ical interface (GUI) and the communication with the FPGA [1],[2].
Implementing the lock-in required reprogramming of the firmware on the FPGA as well as adding
new features in the controlling program. Additionally, an improved firmware detection was added
such that a different interface, depending on the actual firmware on the EVIL, is loaded.
For testing the lock-in amplifier, an existing set-up for frequency-stabilization of a laser was chosen,
in which the analogue amplifier was replaced by the digital.
Since the original GUI required an USB connection to the EVIL, the control computer must be
located nearby which, in that case, means near the experimental set-ups. Hence, a server, that is
connected to multiple EVILs and that can be controlled remotely from the already existing control
computers is useful. This server must be able to provide information about the connected devices and
allow a client to select one for establishing a connection. When multiple users are connected at the
same time, the server must also be able to stream the data between each client and its selected FPGA.
In the following, a short introduction into the theory behind lock-in amplifiers and their usage
is given. Then the implementation of the lock-in as well as the server are investigated. Finally, the
results as well as possible improvements are being discussed.

2 Theory
The following section gives an explanation of the idea behind a lock-in amplifier as well as an example
of its application in a frequency stabilization scheme for a laser. Then, a brief theoretical introduction
into the analysis of systems which are discrete in time is given. These concepts are then applied to a
digital low-pass filter.

2.1 Lock-in Amplifier

A lock-in amplifier provides an extremely narrow band-pass filter which, at the same time does not
suffer from 1/f noise when amplifying.
The heart of the lock-in amplifier is the phase-sensitive detector, also known as the demodulator
or mixer [3]. The detector operates by multiplying two signals together, one is a reference signal and
the other is modulated by this reference. Consider a sinusoidal modulation xr (t) = sin(m t) and DC
signal xs (t) = A e.g. from a photodiode we want to measure. If the DC signal is modulated by the
reference modulation, i.e. xm (t) = A sin(m t), the multiplication (mixing) of modulated signal and
reference becomes
A
ymix (t) = A sin(m t) sin(m t) = (1 + cos(2m t)) (2.1)
2
by using the trigonometric identity
1 cos 2
sin2 = . (2.2)
2
Applying a low-pass filter on the mixed signal (or averaging the signal over a long period), the
frequency doubled component proportional to cos(2m t) can be removed and only the DC signal we
are interested in remains.
Noise components that have a different frequency 0 from the reference will produce a signal
proportional to
sin( 0 t) sin(m t) (2.3)
which, in Fourier space, becomes
F sin( 0 t) sin(m t) (2m + ) + (2m + + ) ( ) ( + )
 
(2.4)

2
where = 0 m . Hence, only signals with a very small and fixed frequency difference will
add to the DC signal, while all other components are blocked by the low-pass filter. This results in a
very narrow filter bandwidth around the modulation frequency, much smaller than is achievable with
a conventional bandpass filter [3].
The second advantage of a lock-in is, as its name suggests, that it can be used as an amplifier.
A typical noise characteristic is shown in Figure 2.1. At low frequencies, the noise of an amplifier is
very large (the so-called 1/f or flicker noise) but since the lock-in modulates the DC signal at a much
higher frequency, it can be safely used for amplification, adding primarily white noise.

Figure 2.1: Typical noise characteristics. At low frequencies the so-called 1/f or flicker noise dominates
while at higher frequencies the white noise level is much smaller. The figure is from [3].

In this semester project, the lock-in amplifier was realized on a FPGA. Additionally, it was directly
combined with a proportional-integral (PI) control. This combination of lock-in detection and PI
controller is used in various laser-locking schemes as shown below in the example of modulation
transfer spectroscopy or also in the more commonly used Pound-Drever-Hall scheme [7].
Combining the lock-in amplifier and the PI controller on a single, digital device has the main
advantage that the lock-in as well as the PI-controller settings can be changed from a single computer
and, as shown later in this report, it is even possible to control several EVILs via a local area network.
Additionally, transmission of the signal from the lock-in to the PI-controller adds no noise and is
instantaneous (within one clock cycle).

2.2 Saturated Absorption Spectroscopy

The spectral lines of gaseous molecules or atoms are broadened due to their thermal motion (Doppler
broadening) [4]. Laser-saturated absorption spectroscopy can overcome this limitation and is able to
resolve the hyperfine spectral features [5].
Three laser beams, called the pump, probe and reference beam, are aligned such that probe and
reference beam pass the vapour cell from the opposite direction than the pump beam. Additionally,
the pump beam must be much stronger that the probe beam and both must overlap at least at one
point inside the cell. Reference and probe beam are then detected using two photodiodes. This set-up
is shown in Figure 2.2a.
If we consider molecules inside the vapour cell which have a velocity component vz > 0 in the
direction of the probe beam, the frequency of the probe is red-shifted while the pump beam is blue-
shifted in the reference frame of the molecule.
When both beams are tuned to the same frequency in the laboratory frame, only one can be
resonant with an atomic transition in the group of molecules with a common velocity vz . However,
if the pump beam is detuned such that is resonant with a atomic transition at the same time as the
probe beam, the transition is saturated by the strong pump and the probe beam will pass with less

3
absorption [5]. This effect can be seen as a peak in the absorption spectrum and by subtracting the
Doppler-broadened background, measured by the reference beam, a Doppler-free absorption spectrum
can be obtained as shown in Figure 2.2b.

(a) Set-up for saturated absorption spectroscopy. The reference (b) Doppler-free transmission spectrum
and probe beam pass the vapour cell parallel and the pump beam of Rubidium.
must overlap with the probe.

Figure 2.2: Doppler-free absorption spectroscopy. Both Figures are from [5].

Modulation Transfer Spectroscopy in Iodine Since the hyperfine transition frequencies for
iodine are known with a very high precision [6], they can be used as reference for frequency stabilization
of a laser. Such a set-up is shown in Figure 2.3. Similar to the method described above, two beams,
a pump and a probe beam pass a vapour cell in opposite direction. Though, as each peak in the
transmission spectrum is symmetric, they cannot be used as an error signal for locking1 .
When the pump beam is frequency- or phase modulated, the derivative of the transmitted signal
can be measured, identical to the Pound-Drever-Hall locking scheme [7]. In order to obtain an error
signal which can be used in a control loop for stabilization of the laser, a lock-in amplifier locked to
the modulation frequency must be used.

Figure 2.3: Locking scheme using modulation transfer spectroscopy of rubidium. Frequency modula-
tion is achieved by using an acousto-optic modulator (AOM) in a double-pass configuration. Image
from [8]
1
A frequency drift to higher frequencies would result in an identical signal as a drift to lower frequencies

4
2.3 Z-Transform
In the analysis of systems that are discrete in time (e.g. digitized signals), the Z-transform is a powerful
tool, very similar to the Laplace transform for continuous-time systems. Instead of having differential
equations which describe the evolution in time, a discrete system can be fully characterized by an N th
order linear difference equation [9]
N
X M
X
y(n) = ak y(n k) + bk x(n k) (2.5)
k=1 k=0

where the argument of the input and output x(n) and y(n), respectively is the number of discretized
time steps tn since the starting time.
The one-sided Z-transform is defined as

X
Y (z) = y(n)z n . (2.6)
n=0

Hence, the Z-transform of y(n k) is

X
X
X 1
X
y(n k)z n = y(n)z (n+k) = y(n)z (n+k) + y(n)z (n+k) = z k Y (z) (2.7)
n=0 n=k n=0 n=k

since we can assume that y(n) vanishes for negative time steps.
We can plug this result into equation (2.5) and find the transfer function in Z-space
M
X
bk z k
Y (z) k=0
T (z) = = N
. (2.8)
X(z) X
k
1 ak z
k=1

When the system has a finite impulse response (FIR), the transfer function has no poles, i.e.
N
C.
X
ak z k = 0 z
k=1

Typically however, a digital system has a feedback path, hence there are poles in the transfer function
which lead to an infinite impulse response (IIR).
By using the bilinear transform [9]
2 + sT
z= (2.9)
2 sT
where T is the sampling time of the discrete system, one can transform between Laplace- and Z-space.
This is particularly useful when analysing discrete systems which have a continuous equivalent (see
Section 2.4).

2.4 Low-Pass Filter

The transfer function of a first order low-pass filter is shown in Figure 2.4. Its characteristic time scale
(also called cut-off frequency) is defined as the point at which the gain has decreased by 3 dB. For a
first order filter, the cut-off frequency is [10]

|0 |
f3dB = (2.10)
2
where 0 is the pole of the transfer function.

5
 0 dB

2 dB

4 dB

20 log10 |T(2 )|2 6 dB

8 dB

10 dB

12 dB

14 dB

16 dB

100 Hz 1 kHz 10 kHz 100 kHz

Frequency

Figure 2.4: Low-pass filter transfer function with a cut-off frequency of fc 15.9 kHz.

The simplest implementation of an analogue low-pass filter is an RC circuit. However, since the
filtering must take place on the FPGA, a digital filter is required. A possible implementation is shown
in Figure 2.5 which was already realized on the EVIL [1].
The difference equation of this filter can be derived from

OUT(n) = DATA(n 1) + MULT(n 1)

MULT(n) = S TEMP(n 1)
TEMP(n) = last IN(n 1) OUT(n 1)
last IN(n) = IN(n 1)

Note that the variable DATA has a length of 32 bit since it is the result of the multiplication of two 16
bit values. In order to get the value of OUT which is again a 16 bit value, DATA must be truncated,
i.e. only the 16 most significant bits (MSB) are used. This corresponds to a division of the value of
DATA by 216 and hence, the difference equation of this filter is
S  
OUT(n) = OUT(n 1) + IN(n 4) OUT(n 3) (2.11)
216
Since the smoothing parameter S is also a 16 bit integer value that is divided by 216 , the effective
smoothing 2S16 (0, 1]. After replacing IN and OUT by x and y, respectively and using (2.7), the
Z-transform of the filter can be calculated
 
Y (z) = z 1 Y (z) + z 4 X(z) z 3 Y (z) (2.12)

This yields immediately the transfer function

Y (z) z 4
T (z) = = (2.13)
X(z) 1 z 1 + z 3

6
 S

IN last IN TEMP MULT DATA T OUT

n-4 n-3 n-2 n-1 n

Figure 2.5: Schematics of the low-pass filter. The smoothing parameter S is a 16 bit value and in T
the 32 bit value of DATA is truncated to 16 bits. Steps marked with the same colour are executed in
the same clock cycle.

For small values of , this transfer can be roughly approximated by the transfer function of a fist
order filter, i.e.

T (z) = (2.14)
1 (1 )z 1
which has its pole at z = 1 . Using the bilinear transformation (2.9) as well as (2.10) yields the
cut-off frequency

fc = (2.15)
(2 )T
As shown in Figure 2.6, the real cut-off frequency corresponds very well to the ideal below 20 kHz.
However, the factor z 4 in the numerator of (2.13) indicates that the real system is lagging behind
the ideal (2.14), since each factor of z 1 delays the operation by one clock cycle.

80
real filter
70 ideal first order filter

60
Filter cut-off [kHz]

50

40

30

20

10

00 500 1000 1500 2000 2500 3000

smoothing integer
Figure 2.6: Cut-off frequency of the real low-pass and a first order filter. The smoothing integer
S (0, 65536] and corresponds to a smoothing parameter = S 216 .

3 Implementation
In this chapter the physical implementation of the lock-in as well as the network protocol are explained
in detail.

3.1 Low-Pass Filter

For the calculation of the cut-off frequency of the low-pass filter, the simplified formula

fc = (3.1)
(2 )T
7
can be safely used because the cut-off frequency must be set well below 10 kHz. The sampling time
T = 1/(96 MHz) corresponds to the clock frequency of the EVIL.
Due to an unknown bug, the actual time constant was measured to be only fc /2. The reason might
be even on hardware level, since simulations of the low-pass confirm the calculations (i.e. finding the
3 dB point in data generated by simulations of the firmware). However, the factor is constant at least
over the used frequency range and hence a correction factor is introduced such that the GUI displays
the correct value.

3.2 Lock-in Amplifier

The schematics of the lock-in amplifier are shown in Figure 3.1. The analogue signal is digitized by a
96 MHz, 10 bit analogue-to-digital converter (ADC). If the signal has a DC offset, it must be removed,
because otherwise the signal would be proportional to
A
(DC + A sin(t)) sin(t) = DC sin(t) + (1 cos(2t)) (3.2)
2
which requires that the low-pass filter must also remove the component at . Removing the offset
before demodulation therefore simplifies the low-pass design.
After the multiplication, the signal is truncated back to 16 bits, filtered by the low-pass to remove
the 2 component and finally fed into a PI controller also implemented on the EVIL as the error
signal. The response of this controller is converted back to an analogue signal by the fast (i.e. 96
MHz, 14 bit) digital-to-analogue converter (DAC).
For modulation with the AOM, the EVIL must also output the modulation signal. This is done
using the slower (5 MHz, 12 bit) DAC. Note that the sinusoids for modulation and demodulation must
have different phases. Otherwise the phase retardation of the modulated signal with respect to the
demodulation could not be corrected for, which might lead to an attenuation of the DC signal, i.e.
A 
A sin(t + ) sin(t) = cos() cos(2t + ) (3.3)
|2 {z }
maximum for =k, kZ

DC Offset Filter Cutoff P,I,D

ADC A

T Low pass PID Controller Fast DAC

Slow DAC

Phase Frequency

Figure 3.1: Sketch of the lock-in amplifier. In and output of the EVIL are marked green and settings
set by the GUI are in red. In T, the signal is truncated from 32 to 16 bits.

8
Frequency generation For generation of the reference signal, a direct digital synthesizer (DDS) is
used which is shown in Figure 3.2. It consists of two parts: The lookup table (LUT) and the phase
accumulator.
In the LUT, all values of one period of a sine (or cosine) are stored. The accumulator then
periodically increments the index in the LUT and the value at the index location is output. A phase
shift can be easily implemented by adding a constant offset index.
Depending on how fast the accumulator cycles through the LUT, the frequency of the sine can be
determined. However, if the phase accumulator would have the same bit length as the values in the
LUT, the minimum frequency of the signal would be equal to the clock frequency of the processor.
The easiest way to get around this problem is to use an index with a higher resolution than the
LUT. Depending on the position at which the index is truncated, the minimum (and also maximum)
frequency can be set.
On the EVIL, the phase accumulator has a resolution of 22 bits and the LUT, which was generated
by the Xilinx ISE R
Design Suite, 16 bits. Together with the clock frequency of 96 MHz of the EVIL,
this results in a frequency range of the DDS between 23 Hz and 1.5 MHz.

Figure 3.2: Schematics of a DDS. The LUT consists of an array storing the amplitude of one period
of the sinusoid (right column) and the corresponding index (left column).

3.3 Laser System

The system that was used for testing the lock-in amplifier is a laser at 626 nm which is frequency-
stabilized by modulation transfer spectroscopy similar to the set-up shown in Figure 2.3. The existing
EG&G 5209 single phase analogue lock-in amplifier which was already connected to an EVIL (for PI
control) was completely replaced by the same EVIL to handle both demodulation and control in one
device. Figure 3.3 shows the signal obtained by the EG&G lock-in when the laser frequency is swept
over the resonance.

9
Figure 3.3: Response of the iodine set-up when ramping the laser frequency across the resonance. The
signal is demodulated by an EG&G 5209 single phase analogue lock-in amplifier.

The laser actually consists of two fiber lasers at 1051 nm and 1551 nm, respectively, which then
create a beam at 626 nm by sum-frequency generation. This wavelength can be locked to a hyperfine
resonance of molecular iodine. In a final step, the light is brought to 313 nm by second-harmonic
generation for Doppler-cooling and manipulation of beryllium ions inside an ion trap [11].

3.4 Pre-amplifier
The resolution of the ADC determines the minimum strength of a signal that can be resolved compared
to for example noise. The EVIL has an ADC with a 10 bit resolution which implies that a signal can
only be resolved if it is at most 1024 times (60 dB) smaller than the largest accepted input. In the
specific EVIL, this is set to 190 mV which implies that the signal must have at least an amplitude
of 0.2 mV to be resolved.
The second problem with having a weak signal is that the lock-in amplifier mixes it with the
reference in a multiplication. Both input and reference are 16 bit integers which results in a mixed
signal of 32 bit length. The result is then truncated back to 16 bit by only selecting the 16 MSB which
results in a decrease of amplitude if the input does not use the whole 16 bit range.
Hence, two amplifiers which have their highest gain near the modulation frequency were designed:
A passive LC-circuit in series with a low-pass filter and an active circuit using an operational amplifier.
Since the signal that has to be amplified is modulated by the DDS, 1/f noise added by the amplifier
should not be a problem as long as the modulation frequency is high enough.

Passive Circuit The circuit is shown in Figure 3.4a and consists of a resonant LC-circuit and a
subsequent low-pass filter. As it can be seen in Figure 3.4b, the resonant circuit provides a high-pass
which, combined with the low-pass, result in a band-pass filter that also amplifies at the resonance
frequency.

10
 1 F
vi vo
220 nF

17

100 nF

1000 H

(a) Passive circuit design consisting of a resonant LC- (b) Transferfunction of the passive circuit. Due to
circuit and a low-pass filter in series. The series resis- the subsequent low-pass high-frequency components
tance of the inductor was measured to be R = 17 are damped.
and the calculated resonance frequency is 4.7 kHz.

Figure 3.4: Passive amplifier circuit.

Active Circuit The spectrum of the photodiode showed a noise component around 24 kHz, hence
the cut-off of the amplifier was set to 10 kHz in the beginning. This also means that frequency of the
lock-in must be below this pick-up signal.
A second constraint was given by the available power supply. Since there is a single channel power
supply set to 24 V near the EVIL used for the lock-in, the op amp is used in single-supply operation
which requires that a floating ground is provided. This means that both inputs of the op amp are set
to 12 V with respect to the common ground. Then a voltage of 24 V between Vcc and Vee seems like
12 V to the op amp.
A floating ground can easily be generated by using a voltage divider with two equal resistors as
shown in Figure 3.5(a). By summing up the current at the node, we find

Vf V Vf 0 V
= Vf = (3.4)
R R 2
Now, we can set Vee = 0, Vcc = V and connect the floating ground to the inverting and non-inverting
terminal of the op amp as shown in Figure 3.5(b).

11
 +

24 V
100 k

24 V
Ri
Vf = 12 V vi (t) + Vf
vo (t) + Vf
+
47 pF
100 k

0V
(a) Voltage divider for creation of a floating
ground. The additional capacitor is used for
filtering high-frequency noise from the power
supply.
Vf
(b) Single-supply operation of an op amp. Both input
terminals are set to the floating ground potential.

Figure 3.5: Elements used in the active amplifier circuit.

Due to its low noise performance as well as highest gain-bandwidth product of the available op
amps, the LF356 was chosen. The full amplifier circuit is shown in Figure 3.6. It consists of a
R
simple inverting amplifier with a gain G = Rfi . There is an additional low-pass filter with a cut-off
frequency of fc = 1/(2Rf Cf ) and two coupling capacitors Ci and Co for changing the offset of the
floating ground on the signal. Since Ci forms a capacitive ground loop with the floating ground, it
requires a large capacitance. Otherwise the loop would act as a high pass filter with a very small
cut-off frequency damping the modulated signal vi (t) coming from the photodiode.

Cf

Rf

Ci Vcc
Ri
Co
vi (t)
vo (t)
+
+ + Ro
Vf Vf

Figure 3.6: Full active amplifier circuit. The following values were chosen: Ci = 1 F, Cf = 47 pF,
Co = 220 nF, Ri = 1 k, Rf 2.7 k, Ro = 100 k, Vf = 12 V and Vcc = 24 V.

12
Figure 3.7: Bode plot of the active amplifier. The gain is set to 12 dB to match the input voltage
span of the ADC by changing the potentiometer Rf . This also changed the cut-off frequency from
10 kHz to 1 Mhz.

3.5 Network Communication

In the following section, both, client and server are presented in detail. The network communication
protocol is based on a server-client structure. A central computer (called server) is connected to
multiple EVILs. Remote computers in the same local area network as the server (called clients) can
connect to the server and select an EVIL. After establishing a connection, the server streams all data
packets from the client to its selected EVIL and vice versa until the client terminates the connection.

3.5.1 Client
The client software is based on the previous version with an additional section for LAN connections.
The newly added features are shown in Figure 3.8 and include the following components

1. List of all known servers. This list is stored in a file and loaded when the program starts.
Additionally, the GUI checks all servers on that list during initialization for connected EVILs.

2. List of all currently available EVILs on the selected server.

3. Button for refreshing the list of available EVILs. This command sends a ping to each known
server which then answers with a list of all its connected EVILs when available.

4. Button for adding a new server. The IP address of the server can be entered in the panel to the
left.

5. Button for scanning the network for available servers. If servers are found which are not already
on the server list, they are added. In the panels to the right, the network must be specified i.e.
host IP and subnet mask.

6. Button for opening the server control window. It allows starting (or restarting) the server
software remotely using a secure shell (SSH) connection.

13
 3 4
1
2
5

6
Figure 3.8: Network control section of the GUI. The numbers correspond to the numeration in the
text.

The program flow is shown in Figure A.1 and kept similar to the original. The only difference is
that all commands, which were initially sent via a local serial port to the FPGA, must be redirected
to a server using an Ethernet connection.
This communication consist of three processes which run simultaneously in the background:

The transmission (TX) worker sends commands which it receives from the GUI to a specified
server.

The receiving (RX) worker listens to a specified port on all available network interfaces and puts
the received data on the result queue.

The result receiver finally interprets the RX data and emits signals which then trigger GUI
events.

As in the previous GUI version, PyQt as well as the queue objects from Pythons multiprocessing
library are used.
PyQt provides a system called slots and signals which allows for the control of a program using
a GUI. Each action, e.g. a button that is clicked, can emit a signal which might even contain data.
These signals are then connected to functions which process the signal. In the GUI, these signals are
not only used for triggering functions by using interface elements, but also the other way round, i.e.
data that is received by the RX process triggers signals which then modify the GUI, e.g. for streaming
data to the streaming-view panel.
The second important feature of the GUI is the inter-process communication using so-called queues.
In Particular, all commands that are sent to the FPGA are put onto the operation queue. The TX
worker listens to that queue and processes each incoming command. The same communication happens
between the RX worker and the result receiver.

3.5.2 Server
The workflow of the server is visualized in Figure A.2. It is similar to the serial communication part
of the GUI, however, for handling of multiple connections, a larger effort is required. The operation
is split up in two parts: an initialization phase in which all communication processes are started and
a phase in which data between all connected clients and their FPGAs is streamed.
The initialization starts with checking all available ports for connected EVILs. Then the Ethernet
communication process is started which handles the incoming and outgoing data. Similar to the client
side it consists of three processes2 , namely

The (TX) worker which sends all data from an EVIL to the specified client.

The receiving (RX) worker listens to a specified port on all available network interfaces.
2
The exact information flow on the server side can be found in Figure A.3.

14
 The result receiver interprets the RX data. It can either start a new connection with a client
or, if the sending client is already connected, hand the message over to the correct serial worker
process. This ensures that multiple connections can be established simultaneously.

Since the server can handle more than one connection between a client and an EVIL, a serial
communication process must be started for each open connection. One single serial worker process
handles incoming commands and sends those to the EVIL. Simultaneously, it reads streaming data
and puts it back to the RX worker queue.
When all processes are started, incoming data can be processed. In this stage the Ethernet result
receiver interprets the data. When it receives a command used for control of the server, it is processed
directly by the receiver, otherwise it is sent to the serial worker process associated with the client.
For closing (and also for initializing) a connection, the server needs to stop and restart all commu-
nication processes3 .

4 Results
4.1 Lock-in Amplifier
The lock-in amplifier was first tested in the simulation tool provided by Xilinx ISE R
Design Suite by
extending the existing test benches. Afterwards, the functionality of the lock-in was tested using the
loop-back setup shown in Figure 4.1a where the sinusoidal DDS output was redirected to the input of
the lock-in. Mixing this signal resulted exactly in a DC and a frequency doubled component (Figure
4.2). This test also confirmed that the phase can be adjusted correctly.
Finally, the analogue lock-in used in the laser frequency stabilization set-up described in Section
3.3 was completely replaced by one EVIL. Figure 4.3a shows the modulated input signal when not
using a band-pass filter. In Figure 4.3b, the spectrum of that input signal was calculated but at the
modulation frequency of 14.969 kHz, no trace of the signal was visible.
The situation changed when the passive amplifier described in Section 3.4 was used. Due to its
cut-off, high-frequency noise (which appears in the spectrum at lower frequencies owing to aliasing) is
suppressed and the signal becomes visible in the input (Figure 4.4b). The lock-in is, however, not able
to resolve the signal, most likely because it is too weak. The low frequency noise is nearly as strong
as the DC signal. Moreover, the input offset (which is modulated by the lock-in to the modulation
frequency of 4.463 kHz) is dominant and cannot be further decreased (see Figure 4.4d).
With the gain of the active amplifier set to approximately 12 dB at the modulation frequency of
14.969 kHz, the amplitude of the signal matches the full bandwidth of the ADC. However, at the same
time high-frequency noise is amplified with the same gain. This resulted in the noisy signal shown in
Figure 4.5a. The additional noise made it impossible to see any signal.
3
This could be improved but would not really affect the overall speed of the server.

15
4.1.1 Loop-back Test

ADC Input
DDS Output Error Signal Output

(a) Configuration for the loop-back test: the DDS (b) In- and Output signals in the loop-
output is redirected to the input of the lock-in. back setup.

Figure 4.1: Loop-back set-up.

(a) = 0 . (b) = 90 .

(c) = 180 . (d) = 270 .

Figure 4.2: Output of the lock-in amplifier in the loop-back setup for different phase shifts . Note that
the output has double the frequency of the input signal shown in Figure 4.1b (high cut-off frequency
of the low-pass filter) and that the DC level is modulated by cos as derived in Equation (3.3).

16
4.1.2 Lab Test

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(a) Lock-in input signal when not using any band- (b) Spectrum of the input signal. The DC-offset
pass filter or amplifier. The modulation frequency can be removed internally by the lock-in.
was set to 14.969 kHz.

Figure 4.3: Input signal without pre-filtering.

z
kH
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92 z
et

kH
kH
ffs

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-O

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3
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8.
4.
D

(a) Lock-in input signal when using the pas- (b) Spectrum of the input signal. The modu-
sive band-pass filter. lation frequency was set to 4.463 kHz.

(c) Lock-in signal of the same input. (d) Spectrum of the lock-in signal.

Figure 4.4: Input signal and lock-in output with the passive amplifier.

17
 (a) Lock-in input signal when using the active (b) Spectrum of the lock-in output signal.
band-pass filter. The DC component is still very noisy but the
mixed offset at the modulation frequency is no
longer dominating.

Figure 4.5: Input signal and lock-in output spectrum with the active amplifier.

4.2 Network Communication

Software Testing The software, especially the server side, was tested such that it runs stably with
as little maintenance as possible. The following cases were tested on the server side

The server can connect a client to an EVIL and streams the data between these two. This also
works when more than one EVIL are connected.

The connection is closed correctly when either the client requests a disconnect or the connection
is not available anymore (e.g. network cable unplugged).

When an EVIL which is assigned to a client is disconnected from the server, the connection is
closed correctly.

The server can handle multiple connections simultaneously, i.e. when more than one user is
connected to an EVIL, the server sends the data from each client to the correct FPGA and vice
versa.

Also, all new GUI features were tested

All GUI items are updated correctly, e.g. when no serial port is selected, the connect-button is
not enabled, etc.

The server list can be loaded, updated and deleted properly.

Scanning the network for servers works and they appear in the server list correctly.

Controlling a server via SSH works4 .

Streaming Performance The server software was tested on both a standard laptop and the Rasp-
berry Pi. On the computer streaming was possible with two FPGAs connected to two different clients
without any restrictions. On the Raspberry Pi, by contrast, the streaming rate had to be limited to
100 kS/s, otherwise the readout loop was executed not fast enough and streaming could not keep
up with the desired pace.
4
This requires that the computer that runs the server also has an SSH server installed and that the client can use the
Python module Paramiko.

18
5 Conclusions
It was not possible to replace the EG&G 5209 analogue lock-in amplifier by a digital one since no
error signal could be detected. This is not surprising since even the analogue lock-in only achieves a
signal-to-noise ratio (SNR) of 5. In the loop-back set-up, however, it was shown that the algorithm
performs correctly. Hence, there are three limiting factors
The resolution of the ADC on the EVIL board is not high enough. Commercial digital lock-in
amplifiers have a resolution up to 18 bits [3] while the EVIL has only 10 bits. Using a better
ADC would allow for detection of weaker signals.

The passive band-pass filter at the input is limited by the series resistance of the inductor. The
active amplifier on the other hand adds too much noise. Using a better band-pass/pre-amplifier
would probably result in a better SNR.

The low-pass filter is approximately of first order, which implies a drop-off of 6 dB per octave.
Using a higher-order low-pass would also enhance the SNR.
The extension of the GUI to provide remote control of the EVILs was successful. The server
software allowed for remote control of multiple EVILs with different clients simultaneously. The only
downside is that a Raspberry Pi is not fast enough to process the program properly at high streaming
rates. Optimizing the code would require rewriting most of it in a more optimized programming
language like C. However, this would not guarantee a fast enough code since a speed-up of 65 times
is required to achieve the same throughput as on a standard computer.

References
[1] A. Hungenberg, Automatic relocking of an FPGA-based PID controller using a bandpass-filtering
approach,
http://www.tiqi.ethz.ch/thesiswork/semesterthesis-alex_hungenberg.pdf [25.09.2014].

[2] D. Nadlinger Laser Intensity Stabilization and Pulse Shaping for Trapped-Ion Experiments using
Acousto-Optic Modulators
http://www.tiqi.ethz.ch/thesiswork/semesterthesis-david_nadlinger.pdf [25.09.2014].

[3] R. Burdett, Amplitude Modulated Signals: The Lock-in Amplifier in Handbook of Measuring Sys-
tem Design, (John Wiley & Sons, Hoboken, 2005).

[4] W. Demtroder, Laser Spectroscopy, (Springer, Heidelberg, 2003).

[5] D.W. Preston, Doppler-free saturated absorption: Laser spectroscopy, Am. J. Phys. 64 11 (1996).

[6] T.J. Quinn, Practical realization if the definition if the metre, including recommended radiation
of other other optical frequency standarts (2001), Metrologia 40 103133 (2003).

[7] E.D. Black, An Introduction to Pound-Drever-Hall laser frequency stabilization, Am. J. Phys 69
79 (2001).

[8] V. Negnevitsky and L.D. Turner, Wideband laser locking to an atomic reference with modulation
transfer spectroscopy, Opt. Express 21, 3103-3113 (2013).

[9] W.K. Jenkins, D.L. Jones and B.J. Hunsinger, Discrete-Time Signal Processing from Reference
Data for Engineers (Ninth Edition), (Newnes, Oxford, 2001).

[10] Smith, J.O. Relating Pole Radius to Bandwidth, in Introduction to Digital Filters with Audio Ap-
plications, http://ccrma.stanford.edu/~jos/filters/Partial_Fraction_Expansion.html,
online book, 2007 edition [4.10.2014].

[11] H.-Y. Lo et al., All-solid-state continuous-wave laser systems for ionization, cooling and quantum
state manipulation of beryllium ions, Appl. Phys. B 114:17-25 (2014).

19
 A

Start

Background process Background process

Start local serial Initialize control Start ethernet

communication worker class communication worker
Flowcharts

Load GUI

Connect PyQt signals

from worker processes
and GUI elements
to control class functions

Ping each server Yes

Server list
and save available
available
ports

No
Display ports of

20
selected server

Load streaming views

Wait for signals

Yes Display stream data;

Disconnect from serial, Enable FPGA and
Send disconnect message, EVIL data process all other commands
disable streaming streaming controls

Figure A.1: Control flow of the client software.

disable streaming and correctly
FPGA control

Yes Check Firmware and

Yes No
Enable FPGA and load correct settings
streaming controls None tabs

Firmware No Network Local No

Load correct Send connection Connection
Server answer Is connected Is connected Connect to serial port
settings tabs message to server button
 Start

Check for EVILs

Append port names

If streaming is enabled:
get streaming packet
from EVIL and
put it on TX queue
Initialize etheret communication
Ethernet processes
RX and TX worker
Timeout

Send command Yes Incoming

Wait for commnads Wait for incoming
to the EVIL command
on the TX queue Ethernet data

21
Process signal
Send data
Initialize serial communication and send it to
Serial process to specified
for each port that is open the correct serial
client
worker

Wait for incoming

ethernet data
Remove client from Add client to
connected users connected users

Figure A.2: Control flow of the server.

Put data to
Send error message correct serial
queue Send portnames Send error message

Close serial connection Establish serial connection

No
Yes Yes No

Stop all communication Yes No Send data Yes Client already No Requesting No Requesting Yes Stop all communication
Disconnect
workers for updating to FPGA connected portnames connection workers for updating
 Serial Process

EVIL Result
Receiver

Serial
Control

Server

Ethernet
Control

TX
worker

Ethernet
RX
worker

Result
Receiver

Ethernet Processes

Figure A.3: Information flow between different processes in the server architecture. Red arrows
symbolize signals coming from Ethernet and blue data from the EVIL.

B Installation Guide
Basic Python Installation On Windows, the easiest way is to use the 32 bit version of Win-
python (http://sourceforge.net/p/winpython/wiki/PackageIndex_33/). Otherwise, at least the
following packages have to be installed:

Python 3.3 or 3.4 (on Ubuntu: sudo apt-get install python3.3/python3.4) as well as python3.x-
dev

C/C++ compilers (on Ubuntu: sudo apt-get install build-essentials, on Windows:

MinGW, see below)

Gfotran compiler (on Ubuntu: sudo apt-get install gfortran, on Windows MinGW)

Cython (https://pypi.python.org/pypi/Cython/)

Setuptools (https://pypi.python.org/pypi/setuptools/5.7)

Pyserial (https://pypi.python.org/pypi/pyserial/2.7)

Numpy (https://pypi.python.org/pypi/numpy/1.9.0)

For the GUI, the following additional modules are required

SIP (http://www.riverbankcomputing.co.uk/software/sip/download)

22
 PyQt4 (http://www.riverbankcomputing.co.uk/software/pyqt/download)

Scipy (https://pypi.python.org/pypi/scipy/0.14.0)

Pyudev (pyudevhttps://pypi.python.org/pypi/pyudev/0.16.1) for monitoring of the serial

ports (Linux only)

Installing python modules from source is usually done with the command sudo python3.x setup.py
install. For SIP and PyQt5 , one has to use

1. python3.x configure.py

2. sudo make

3. sudo make install

Server Control using Secure Shell In order to use SSH connections in the client software, the
Python module Paramiko is required. It can be installed via the following steps

Install ecdsa (https://pypi.python.org/pypi/ecdsa)

On Windows: install from MinGW (http://www.mingw.org/) at least the C/C++ compilers

and msys. Add ..\MinGW\bin and ..\MinGW\msys\1.0\bin to PATH (environment variables).

Install pycrypto (https://pypi.python.org/pypi/pycrypto) (do not use the version on Git-

hub (i.e v2.7a1), it will not compile). For the installation use the following commands

1. python3.x setup.py build

2. python3.x setup.py install. On windows use python setup.py build -c mingw32
instead.

Install paramiko (https://pypi.python.org/pypi/paramiko/1.14.1)

Client and Server Installation For the GUI, clone the lockin network branch from the J-drive
(J:/Git/electronics/evil gui). For the server, copy the folder server into the home folder on the Rasp-
berry Pi and execute the installation script if not all Python modules are installed. The installation
can be carried out by executing the following commands in the command prompt

tar -xf python-setup.tar.gz

sh python-setup

5
(Do not use configure-ng.py for PyQt as recomended in the installation notes).

23