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THIS DRAWING AND SPECIFICATIONS,HEREIN,ARE THE PROPERTY OF INVENTEC


CORPORATION AND SHALL NOT BE REPODUCED,COPIED,OR USED IN WHOLE OR
IN PART AS THE BASIS FOR THE MANUFACTURE OR SALE OF ITEMS WITHOUT
WRITTEN PERMISSION,INVENTEC CORPORATION,2009 ALL RIGHT RESERVED. http://laptopblue.vn/ For DB build
SOUTH BRIDGE
F HSF Property:ROHS or Halogen-Free(5L3?) HM75 QPEG Q0 F
BD82PPSM
DB BUILD QUANTITY LIST : P/N : 6019B0919101
1310A2493104 10 PCS CR-SG + H-VRAM + GIGA LAN
1310A2493105 72 PCS CR-SG + S-VRAM + 10/100 LAN
1310A2493106 55 PCS CR-UMA + GIGA LAN
1310A2493201 137 PCS POWER /B
1310A2493601 137 PCS PICK BTN /B
1310A2493701 137 PCS USB /B

E E

PAD402 RTC Rest


MOTHER BOARD PCB PAD4500 SM_Vrer
PAD2
P/N6050A2493101 PAD4
PAD400

HARVEY 14
POWER BOARD PCB PAD4700
PAD500
P/N6050A2493201 PAD508
PAD6015
USB BOARD PCB PAD6100
PAD6103
P/N6050A2493601 PAD6105
PAD6110
TOUCHPAD BOARD PCB PAD6150
PAD6200
D
P/N6050A2493701 HARVEY 14 ID LIST PAD6210
D

HURON RIVER UMA : 0X1854 PAD6220


HURON RIVER DIS :
CHIEF RIVER UMA :
CHIEF RIVER DIS :
SUB SYSTEM ID :
HP : 0X103C
0X1855
0X1856
0X1857
CR / HR UMA / DIS
PAD6300
PAD6301
PAD6310
PAD6510
PAD6500
PAD6610
PAD6710








2011.09.27 PAD6750
PAD6970
PAD9000

BASE SCHEMATIC : PAD9001
CR-SG + SAMSUNG VRAM + 10/100 LAN + 90W ADAPTER + SUPPORT 27MHZ GREEN CLK + USB2.0 CONN PAD9200

CR-UMA CR-SG CR-SG RTL8161FH = 6019B0928101(10/100/1000)


C RTL8165EH = 6019B0928301(10/100) C
GPU VRAM TYPE: DIS GREEN CLK SUPPORT 27MHZ BOARD ID HR-UMA HR-SG HR-SG

U9 SLG3NB300V P/N : 6019B0941101


INTEL SEYMOUR THAMES RTL8165EH(10/100) LDO MODE
U5 , U6 , U7 , U8 C188 MOUNT 0.1UF : 6010A0036403
ID0-HI R960 0 1 0
R408 : MOUNT ----> CHOOSE LDO MODE 0R : 60130B0000ZT
R126 MOUNT 10R : 60130B10000X ID1-HI R905 0 0 1 R407 : NA ----> CHOOSE SWITCHING MODE
SAMSUNG 1GB C-DIE D4400 NA P/N : 6011A0026803 ID2-HI R902 0 0 0 R413 : NA
PN : 6019B0818601 ID3-HI R967 0 0 0 C404 : NA
R2 : NA UMA GREEN CLK ID4-HI R899 0 0 0
C405 : NA
C406 : NA
R3 : NA U9 SLG3NB250V 6019B0934701
R33 : NA ID5-HI R914 1 1 1 C409 : NA
C188 NA C411 : NA
R61 : NA R126 NA ID0-LO R961 1 0 1
C415 : NA
D4400 NA ID1-LO R903 1 1 0 C417 : NA
HYNIX 1GB D-DIE ID2-LO R904 1 1 1 C420 : NA
PN : 6019B0938301 ID3-LO R968 1 1 1 L400 : NA
R2 : MOUNT 0R : 60130B0000ZT DIS ADAPTER 90W ID4-LO R900 1 1 1
U470 : NA
U502 : MOUNT 6016B0008101
R3 : NA R802 MOUNT 100K : 60130B1040ZT ID5-LO R920 0 0 0 U400 : MOUNT 6019B0928301 ( 10/100 LAN )
B R33 : NA R769 NA B
R61 : NA ID0 = GPIO40 RXXX = 10K : 60130B1030ZT
UMA ADAPTER 65W ID1 = GPIO41 0 : RXXX NA 1 : RXXX MOUNT RTL8161FH(GIGA-LAN) SWITCHING MODE
R802 NA ID2 = GPIO42 R408 : NA ----> CHOOSE LDO MODE
SAMSUNG 512KB R769 MOUNT 100K : 60130B1040ZT ID3 = GPIO43 BOARD_ID5 ONLY FOR WEBCAN USE R407 : MOUNT ----> CHOOSE SWITCHING MODE 0R : 60130B1030ZT
R2 : NA ID4 = GPIO9 FOR HD WEB CAM BOARD_ID5 PULL P3V3A R413 : MOUNT 0R_0603 : 60130B00000Z
R3 : MOUNT ID5 = GPIO10 FOR VGA WEB CAM BOARD_ID5 PULL GND C404 : MOUNT 4.7UF : 6010B0009904
R33 : NA C405 : MOUNT 0.1UF : 6010A0036403
R61 : NA USB 3.0 CONN C406 : MOUNT 0.1UF : 6010A0036403
CN518 6012B0370301 C409 : MOUNT 0.1UF : 6010A0036403
HYNIX 512MB C2405 MOUNT 0.1UF : 6010A0036403 C411 : MOUNT 0.1UF : 6010A0036403
C2406 MOUNT 0.1UF : 6010A0036403 C415 : MOUNT 0.1UF : 6010A0036403
R2 : MOUNT C417 : MOUNT 4.7UF : 6010B0009904
R3 : MOUNT D2400 NA >> ESD M/B ID DB SI PV MV
L470 MOUNT P/N : 6014B0177901 C420 : MOUNT 0.1UF : 6010A0036403
R33 : NA L400 : MOUNT
R61 : NA L471 MOUNT P/N : 6014B0177901 R844 MOUNT NA MOUNT NA U470 : MOUNT
P/N : 6014B0200401
6016B0010401
USB 2.0 CONN R824 MOUNT MOUNT NA NA U502 : NA
U400 : MOUNT 6019B0928101 ( GIGALAN )
A CN518 6012B0370102 R845 NA MOUNT NA MOUNT A
C2405 NA R828 NA NA MOUNT MOUNT
C2406
D2400
NA
NA >> ESD RXXX = 10K : 60130B1030ZT NOV JAN MAR
DRAWER
DESIGN
EE DATE POWER DATE
INVENTEC
CHECK TITLE MODEL,PROJECT,FUNCTION
L470 NA RESPONSIBLE HARVEY 14
AUGUST 30, 2010 X01
L471 NA SIZE= SIZE CODE DOC.NUMBER REV
21-OCT-2002 VER:
FILE NAME: C CS 1310xxxxx-0-0 X01
DATE CHANGE NO. REV P/N 6050A2493101 SHEET 1 of 57
XXX
8 7 6 5 4 3 2 1
8 7

http://laptopblue.vn/
6 5 4 3 2 1

Index
D
D

01 Project Name 26 PCH-1 51 SEYMOUR POWER


02 Page Index 27 PCH-2 52 SEYMOUR DP-POWER & LVDS
03 Block Diagram 28 PCH-3 53 SEYMOUR MEMORY INTERFACE
04 Power Procedure 29 PCH-4 54 VRAM DDR3
05 Charger 30 PCH-5 55 DGPU POWER EE
06 Battery Connecter 31 PCH-6 56 DGPU POWER
07 P3V3A, P5V0A 32 PCH-7 57 USB, POWERBUTTON ,TP DB
C 08 P1V5 33 PCH-8 C

09 P1V05S 34 PCH-9
10 P1V8S 35 EC ITE8517E
11 PVSA 36 KB & LED
12 PVCORE-1 37 CRT
13 PVCORE-2 38 LCD & WEBCAN
14 PORT & EMI PART 39 HDMI
15 P3V3S, P5V0S 40 SATA HDD& ODD
16 GREEN CLK 41 LAN
B 17 CPU -1 42 RJ-45 CONN B

18 CPU-2 43 CARD READER


19 CPU-3 44 AUDIO CODEC
20 CPU-4 45 HP & MIC JACK
21 CPU-5 46 WLAN
22 CPU-6 47 USB 3.0 CONN
23 Thermal & Fan 48 SEYMOUR PCI-E INTERFACE
24 DDR3-1 49 SEYMOUR CRT CLK THERMAL
25 DDR3-2 50 SEYMOUR THERMAL SENSOR
A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
INDEX
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS X01
CHANGE by XXX DATE 21-OCT-2002 SHEET 2 of 57

8 7 6 5 4 3 2 1
8 7

http://laptopblue.vn/
6 5 4 3 2 1

DDR3 SO-DIMM1
CRT V-RAM VGA PCIE-8X
IVY BRIDGE DDR3 1333/1600 MAX 8GB
P24
128M X 16 AMD SEYMOUR 64BIT (SOCKET RPGA 989)
P37
(2GB) S3 PACKAGE 37.5MM X 37.5MM
P54 DDR3 DDR3 SO-DIMM2
P48~P53 1333/1600 MAX 8GB
HDMI FDI
P17~P22
DMI
P25
P39
D
D

LCM P38
USB
PANTHER WEBCAM
P38
CARD READER
RTL 5239-GR
PCIE
POINT USB 2.0

P43
USB USB
RJ-45 RTL 8165EH-CG PCIE USB CONN1 USBCONN2
10/100 LAN P57 P57
P42 USB 3.0
P41
C WLAN + BT PCIE C
MINI CARD
RTL 8161FH-CG P46 25MM X 25MM USB CONN3
SATA
GIGA LAN P47
P41 SATA
P26~P34
HDA LPC SPI ROM
4MB
P26
SATA HDD SATA ODD
P40 P40
HSPI
B B
SPEAKER ALC 3201-GR KBC SPI ROM
P44 AUDIO CODEC ITE IT8517E 1MB
P44 P35
P35
HP JACK
P45
DMIC MAIN BATT
COMBO JACK P44 KEYBOARD TOUCHPAD
P47 P6
P36
THERMAL METER P45

TI TMP431A SYSTEM CHARGER


A A
P23 DC/DC SYSTEM POWER
P4

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 3 of 57

8 7 6 5 4 3 2 1
8 7

http://laptopblue.vn/
6 5 4 3 2 1

PVADPTR VADPBL
AC MOS MOS

PVPACK
DC MOS
VRP5V0A P5V0A VRPVCCSA_IN VCCSA VRPVSA PVSA
D PAD PAD PAD
TPS51461RGER D

PVBAT P5V0S
CHARGER MOS 5V / 3.3V MOS
BQ24728 TPS51123RGER VRP3V3A P3V3A 1.8V VRP1V8S P1V8S P1V8S_DGPU
MOS PAD PAD MOS
AT1530F11U

P3V3S P3VSS_DGPU
MOS MOS

1.5V VRP1V5 P1V5 P1V5S P1V5S_DGPU


PAD PAD MOS MOS
C TPS51216RUKR C

1.05V VRP1V05S_VCCP P1V05S_CPU P1V05S_PCH


PAD PAD PAD
TPS51219RTER

P1V0S_DGPU
MOS

B B
VCORE PVCORE
PAD
TPS51650RSLR

AXG PVAXG
PAD
TPS51601DRBR

A A
VCORE_DGPU VRPVCORE_DGPU PVCORE_DGPU
PAD
RT8208BGQW
EN_DGPU DGPU_PG

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
POWER PROCEDURE
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 4 of 57

8 7 6 5 4 3 2 1
8 7

http://laptopblue.vn/
6 5 4 3 2 1

PVADPTR
OUT VADPBL
L6015
Q6010 NFE31PT222Z1E9L
JACK6015
1 S D 8 1 2 1 1 2 2

1
2 7 3 4

2_5%_6
3 4

1000PF_50V_2

1000PF_50V_2
CSC0402_DY

CSC0402_DY
R6015
3 6 5 5 6 6

1
4 5 7 8

2
4

3
5 ACDRV IN G 35
CHG_LED# IN 7 8 IN AC_LED# 35

C6018

C6016
C6017

C6015
NMOS_4D3S

AON7410

2
ACES_59012_0080N_002_8P
P3V3AL

1K_1%_2
1

R6048
2

2
1UF_25V_3
1

3
D

C6033
D6017
SEM_SM24_SOT23_3P_DY
D

2
2 1 D6015

3
1 1 2 2 35
C6031 OUT ADP_ID
2200PF_50V_2

1
0.0015UF_50V_2
Q6012
1SS355VMTE_17

12K_1%_2
PVPACK
0.1UF_25V_2

AON7410

R6047
1

C6048
1M_5%_2

1 S D 8
R6017
C6019

2 7
3 6

2
5BATDRV 4 5
IN G
NMOS_4D3S
2

2 1 PVBAT
C6032
0.01UF_50V_2
1 S D 8 1 2
2 7 3 4
3 6 R6000
5 4 5 0.01_1%_6
ACDRV OUT G
NMOS_4D3S

POWERPAD_2_0610
Q6011 1 2

1
AON7410

7
C C6028 C

PAD6015
1
0.1UF_16V_2

IN
1

1
4.3K_5%_2

4.3K_5%_2

2
CSC0402_DY
1UF_25V_3

VRPVADPTR_CSN
VRPVADPTR_CSP
R6028

R6018

1
2

VRP5V0A_VIN
C6029

C6030

2
2

2
IN PVBAT_CHG

2
1

4.7UF_25V_5
CSC0805_DY

10UF_25V_5
5
6
7
8

1
Q6000
AON7410

C6000

C6001

C6002
NMOS_4D3S
1

20_5%_5
R6027
P3V3AL

2
1
5
4
3
2
TI_BQ24728_QFN_20P

S
2
C6027

ACPRES
ACDRV
CMSRC
ACP
ACN
0.047UF_25V_3 PVPACK

4
3
2
1
P1V5S PVADPTR
10K_5%_2
1

TML 21 2 1
B VRPVPACK_HG L6000 R6001 B
R6024
300K_1%_2

6 ACDET ETQP3W4R7WFN 0.01_1%_6


1

VCC 20
7 IOUT U6000 19 VRPVPACK_PH 1 2 1 2
R6021

PHASE
8 SDA
2

HIDRV 18 3 4
9

RSC_0603_DY
PVADPTR SCL

CSC0805_DY

1
10UF_25V_5

10UF_25V_5
BTST 17 1 2 1 2

1
10 ILIM

B0530W_7
REGN 16
BATDRV

R7600
35
ADP_PRES OUT R6026 C6026
LODRV

D6019
C6010

C6011

C6012
2
RSC_0402_DY

2.2_5%_2 0.047UF_16V_2
GND
SRN
SRP

D6018

5
6
7
8
1
R6029

1
2 2 1 1

Q6001
AON7410
1UF_10V_2

D
2 1

2
1 2
12
13
14
15

NMOS_4D3S
11

C6025

2
2

1SS355VMTE_17 C6023
D6016
1

0.1UF_16V_2
47K_1%_2

CSC0402_DY
1
BAT54WS

0.1UF_25V_2
CSC0402_DY
R6049

1
2

35 I_ADP OUT

C7600
OUT AC_OK 35

C6021
C6024
4
3
2
1
100PF_50V_2
1
2

VRPVPACK_LG
C6046
RSC_0402_DY

2
CSC0402_DY
1

2
P3V3A
1
R6030

C6022

100K_1%_2
1
2

A VRPVPACK_CSP A
R6023
2

1 2

R6025
6
BATT_DAT BI
ACDET>0.6V = SMBUS OK SHORT_0402
2

35
VRPVPACK_CSN
ACDET>1.8V = ADP_PRES HI 35 6 1 2
BATT_CLK BI
ACDET>2.4V = AC_OK TO CHARGE R6020
36.5K_1%_2
CSC0402_DY
1

SHORT_0402
ACDET>3.15V = AC_OVP

INVENTEC
R6046
C6047

1 2 5
OUT BATDRV
R6043
4.3K_5%_2
2

TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 5 of 57

8 7 6 5 4 3 2 1
8 7

http://laptopblue.vn/ 6 5 4 3 2 1

D
D

P3V3AL PVPACK

PHP_PESD5V0S1BB_SOD523_2P

PHP_PESD5V0S1BB_SOD523_2P

PHP_PESD5V0S1BB_SOD523_2P
2.2K_5%_2

2.2K_5%_2
1

1
100PF_50V_2

100PF_50V_2

100PF_50V_2
R6052

R6050

1
1

1
D7504
C7500

D7505

D7506
C7501

C7502
2

2
2

2
C C

2
R6051 1 CN6050
1
100_5%_2 2 2
5
35 1 2 3
BATT_DAT BI 4
3
5
35 1 2
BI 4
BATT_CLK 5 5
R6053 1 2 6 G1
6 G1
100_5%_2 7 7 G2 G2
R6057 8
P3V3AL 100_5%_2
8

FOX_BP02083_B82B5_9HV_8P
6012B0387101-002

0.1UF_25V_2
2
P3V3AL

C6050
2

1
3 3 3

100K_5%_2
B B

1
BAV99W_7_F

BAV99W_7_F

BAV99W_7_F
D7500

D7502
D7501

R6058
1

2
OUT BATT_IN# 35

A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
SELETOR
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 6 of 57

8 7 6 5 4 3 2 1
OCP=7AMP
8 7

http://laptopblue.vn/ 6 5

1
D6999

2
4 3

OCP=7AMP
2 1

PVADPTR IN IN PVBAT P5V0A


P3V3A
BAV70W_7_F PAD6150
PAD6100 2 1

3
2 1 2 1 IN VRP5V0A 7 14
2 1 IN 7 VRP3V3A
OUT 75VRP5V0A_VIN
POWERPAD_2_0610
POWERPAD_2_0610

PVBAT
EN_3V IN IN EN_5V

POWERPAD_2_0610
D

73.2K_1%_2

61.9K_1%_2
D

1
R6110

R6160
PAD6110
1
2

2
2
IN OUT 2VREF
7 VBATP

TON=3.3V:300KHZ/375KHZ

5V_PG OUT VRP5V0A_PH OUT 7


14

IN VBATP 7

1
C C

10UF_25V_5
4.7UF_25V_5

4.7UF_25V_5
0.22UF_6.3V_2

1
10UF_25V_5
1

C6123

C6160

C6161
C6110

C6111

8
7
6
5

5
6
7
8
Q6100

Q6150
AON7410

AON7410
D

D
2
25

NMOS_4D3S
NMOS_4D3S

1
6
5
4
3
2

2
2

TML

TRIP2
VFB2
TONSEL
VREF
VFB1
TRIP1

S
G
S

OCP=8AMP C6115 R6114 7 24 R6155 C6155


VO2 VO1
0.1UF_16V_2 2.2_5%_3 8 23 2.2_5%_3 0.1UF_16V_2 OCP=8AMP
2
3
4

4
3
2
1

1
VREG3 PGOOD
1 2 1 2 9 VBST2 VBST1 22 1 2 1 2
L6100 10 DRVH2 DRVH1 21 L6150
7 OUT 1 2 VRP3V3A_HG 11 LL2 LL1 20 VRP5V0A_HG 1 2
OUT 714
VRP3V3A VRP5V0A
ETQP3W3R3WFN
VRP3V3A_PH 12 DRVL2 DRVL1 19 VRP5V0A_PH ETQP3W3R3WFN
VRP3V3A_LG

15.4K_1%_2
SKIPSEL

RSC_0603_DY
5
6
7
8
8
7
6
5

VREG5
RSC_0603_DY
6.8K_1%_2
1

1
GND

ENC
1

EN0

VIN

Q6151
D
R6100

R6150
AON7702A

AON7702A

R7615
Q6101

U6100
R7610

TI_TPS51123RGER_QFN_24P

13
14
15
16
17
18
220UF_6.3V

B B
1
C6100
2

2
330UF_6.3V
1
2
+

S
G
S

C6150
+
1

4
3
2
1
10K_1%_2

2
3
4
1
CSC0402_DY

CSC0402_DY
2

1
R6101

10K_1%_2
C7610

2
7
VRP3V3A_LDO OUT OUT 7VRP5V0A_LDO

R6151
C7615
2

330K_5%_2_DY

2
10UF_6.3V_3
1UF_6.3V_2
1

1
VO=((15.4K/10K)+1)*2

1UF_25V_3
C6121

R6113

C6120
C6122
VO=((6.8K/10K)+1)*2
2

2
IN 14VRP5V0A_LG

A A
SKIP:OOA=3.3V; PWM=2VREF; AUTO=GND
14
SKIP_3V_5V IN

14 EN_3V_5V IN

P3V3AL 75
VRP5V0A_VIN IN P5V0AL INVENTEC
PAD6103 TITLE
2 1 PAD6105
2 1 IN 7 VRP3V3A_LDO 2 1 MODEL,PROJECT,FUNCTION
2 1 IN 7 VRP5V0A_LDO P3V3A & P5V0A
POWERPAD1X1M DOC.NUMBER REV
POWERPAD1X1M SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 7 of 57

8 7 6 5 4 3 2 1
8 7

http://laptopblue.vn/
6 5 4 3 2 1

OCP=16AMP

P1V5

PVBAT PAD6200
2 1 8
2 1 IN VRP1V5
POWERPAD_2_0610

POWERPAD_2_0610
2

PAD6210
2
P5V0A
D

1
D

1
P0V75S

2.2UF_6.3V_3
1

10UF_25V_5
4.7UF_25V_5
1

1
C6216

5
6
7
8

C6211

C6210
Q6200
FDMC8884

D
NMOS_4D3S
2

2
R6215 C6215
U6200

S
2.2_5%_3 0.1UF_16V_2
12 V5IN VBST 15 1 2 1 2 OCP=16AMP

4
3
2
1
DRVH 14
VRP1V5_HG L6200
ETQP3W1R0WFN
15 17 13 1 2 8
EN_P0V75 IN S3 SW 1 2 OUT VRP1V5
VRP1V5_PH 3 4

CSC0402_DY RSC_0603_DY
3 4
C 16 C

2
15 EN_P1V5 IN S5

330UF_2V_9MR_PANA_-35%
POWERPAD1X1M
VRP1V5_LG

2
5
6
7
8

R7620
DRVL 11
R6200

FDMS0310AS

PAD6220
Q6201
D
1 2 6 10

2
DDR3L_SEL IN VREF PGND

1
10K_1%_2

1
20

1
PGOOD

C6200
1

+
VDDQSNS 9

1
G

C7620
8 REFIN VLDOIN 2

4
3
2
1

2
VTT 3

2
VTTSNS 1

7 GND
0.01UF_50V_2

P0V75M_VREF
52.3K_1%_2

0.1UF_16V_2
1

1
2

19 MODE VTTGND 4
R6201

C6217

C6218

18 TRIP VTTREF 5

TML 21
B B
2

2
1

OUT P1V5_PG 15

10UF_6.3V_3

0.22UF_6.3V_2
100K_5%_2
1

2
75K_1%_2

1
TI_TPS51216RUKR_QFN_20P C6220
R6203

R6202

C6221
2

VOUT=REFIN=1.8*(52.3K/(10K+52.3K))
MODE=100KOHM:TRACKING DISCHARGE

A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
P1V5
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 8 of 57

8 7 6 5 4 3 2 1
8 7

http://laptopblue.vn/
6 5 4 3

OCP=17AMP
2 1

P1V05S_CPU

PAD6300
2 1 955
12
2 1 IN VRP1V05S_VCCP
POWERPAD_2_0610

D
D

PVBAT

POWERPAD_2_0610
15
EN_P1V0_VCCP IN

2
100K_5%_2
1

PAD6310
2
R6303

1
2

1
MODE=100KOHM/300KHZ

CSC0805_DY
10UF_25V_5

4.7UF_25V_5
15 VCCIO_PG OUT

1
R6315 C6315

5
6
7
8

C6310

C6311

C6312
2.2_5%_3 0.1UF_16V_2
1 2 1 2
P3V3A

Q6300
FDMC8884

D
17

16

15

14

13
C C

NMOS_4D3S
R6306
10K_5%_2

2
U6300
1 2

PWPD

PGOOD

EN

BST
MODE

S
1 VREF SW 12 VRP1V05S_VCCP_PH
OCP=17AMP

4
3
2
1
1 R6307 2 2 11 VRP1V05S_VCCP_HG
2.2UF_10V_3

21
VCCIO_SEL IN REFIN DH
CHOKE_4PIN_2PIN
1

0_5%_2 3 10 VRP1V05S_VCCP_LG
20
VSS_SENSE_VCCIO IN GSNS DL L6300
C6308

1 2 9VRP1V05S_VCCP
55
12
1 2 OUT
4 9 3 4

RSC_0603_DY
20
VCC_SENSE_VCCIO IN VSNS V5 3 4

2
COMP

PGND
TRIP

GND

5
6
7
8
2

CYN_PCMB063T_R68MS_4P

R7630
FDMS0310AS
P5V0A

Q6301
D
TI_TPS51219RTER_QFN_16P 5

22UF_6.3V_5

560UF_2.5V
1

1
2 1

2.2UF_6.3V_3

C6300

C6301
G
60.4K_1%_2

CSC0402_DY

+
1
2

1
C6319
R6302

C6316
B 0.01UF_50V_2 B

4
3
2
1

C7630

2
2
1

2
VOUT=1.05V@REFIN=3.3V; VOUT=1.0V@REFIN=GND

A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
P1V05S_CPU
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 9 of 57

8 7 6 5 4 3 2 1
8 7

http://laptopblue.vn/
6 5 4 3 2 1

OCP=4.5AMP
P1V8S

PAD6970
2 1 10
2 1 IN VRP1V8S
POWERPAD_2_0610

D
D

P3V3S P3V3S

10UF_6.3V_3
1
1

U6970
10_5%_2

C6971
GMT_AT1530F11U_SOP8_8P
R6970

OCP=4.5AMP
C TML 9 C
L6970
8 7 1 2

2
VIN LX OUT VRP1V8S 10
2

VRP1V8S_PH
PAN_ELL5PR2R2N

CSC0402_DY
1

13K_1%_2

22UF_6.3V_5
R6973

C6974

C6970
1 VCC FB 4 VOUT=((13K+10K)+1)*0.8

2
15 5 2
EN_P1V8 IN EN REF
0.1UF_16V_2
1

1
0.1UF_16V_2
PGND

10K_1%_2
GND
C6972

C6973

R6972
2

2
B B

A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
P1V8S
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 10 of 57

8 7 6 5 4 3 2 1
8 7

http://laptopblue.vn/
6 5 4 3

OCP=7AMP
2 1

PVSA
P5V0A

PAD6500
PAD6510 2 1
1 2 2 1 IN VRPVSA 21
11
1 2 OUT 11
VRPVCCSA_IN
POWERPAD_2_0610
POWERPAD1X1M

D
D

3300PF_50V_2
1

1
C6522

C6520
0.01UF_50V_2

0.22UF_6.3V_2
1

2
C6521

5.11K_1%_2
1
R6520
2
IN 21
VCCSA_SENSE

2
1 2

R6521

1
2
3
4
5
6
RSC_0402_DY OCP=7AMP

COMP

MODE
GND

SLEW
VOUT
VREF
C 25 TML
VRPVSA_PH L6500 C
11 24 7 1 2 21
11
VRPVCCSA_IN IN VIN SW 1 2 OUT VRPVSA
23 VIN SW 8 3 3 4 4
22UF_6.3V_5
1

22 9
0.1UF_16V_2

VIN U6500 SW
1

CYN_PCMB063T_R33MS_4P
C6510

21 PGND SW 10
C6511

20 PGND SW 11

1
19 PGND BST 12 1 2

V5FILT
C6500 C6501 C6502 C6503

PGOOD
V5DRV
C6515

VID0
VID1
2

0.1UF_16V_2 22UF_6.3V_5 22UF_6.3V_5 22UF_6.3V_5 22UF_6.3V_5_DY


2

EN

2
TI_TPS51461RGER_QFN_24P
18
17
16
15
14
13
R6502
1 0_5%_22
11
VRPVCCSA_IN IN IN EN_PVCCSA 15

R6524
0_5%_2
B 1 2
IN VCCSA_VID0 21 B
1
10K_5%_2
1UF_6.3V_2

1UF_6.3V_2
1

R6522
C6523

C6524

2
2

R6525
0_5%_2
1 2 21
IN VCCSA_VID1
1
10K_5%_2
R6523

OUT PVCCSA_PG 15

A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
PVSA
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 11 of 57

8 7 6 5 4 3 2 1
8 7

http://laptopblue.vn/
12 IN VREF_CPU
6
R6620
43K_1%_2
1 2
5
R6622
39K_1%_2
1 2
4

PVBAT

1
PAD6610
2
3 2

PVBAT_CPU
1

1 2 OUT 12
R6621 R6623

CSC0805_DY

CSC0805_DY
10UF_25V_5

10UF_25V_5

10UF_25V_5

10UF_25V_5
POWERPAD_2_0610

1
90.9K_1%_2 24K_1%_2
1 2 1 2

C6610

C6611

C6612

C6613

C6614

C6615
+
C6699
68UF_25V
P3V3A

IN
IN
12

12

2
2+1 2+0

0.1UF_16V_2_DY
R6635
9/21 EE CHANGE

100K_1%_NTC
0_5%_2
R6626 3.3K DNP 12 IN VREF_CPU 1 2 1 2 MOVE C6699.1 TO PAD6610.1

1
FROM PAD6610.2
R6627 56K DNP C6632 12 OUT CPU_CSN1

R6618

C6631
100PF_50V_2

12
R6636
D 0_5%_2

20

20
R6711 200K DNP

12
PVBAT_CPU
12 12 CPU_CSP1 1 2
1 2 1 2 IN OUT D
R6619

2
C6623
R6712 30K DNP R6625 15.4K_1%_2

5
6
7
8
0.033UF_16V_2

3.3K_1%_2
VREF_CPU

1
8.45K_1%_2 1 2 12
IN
R6714 DNP 0 1 2

IN
IN

IN
IN
IN
IN

Q6610
FDMS7692

D
P5V0A

R6626

NMOS_4D3S
CPU_CSN3

CPU_CSP3
R6605
R6716 DNP 0 162K_1%_2

12 VSSSENSE

11 VCCSENSE

CPU_CSN2
CPU_CSP2

CPU_CSP1
12 V5_CPU 1 2

CPU_CSN1
R6719 DNP 0 OUT 1 2 1 2 1 2

2
R6617

G
VREF_CPU

S
12 OUT R6602 R6603 R6604
R6723 DNP 0 10_5%_3

2.2UF_10V_3
17.8K_1%_2 100K_5%_NTC 28.7K_1%_2

4.7UF_10V_3
PVCORE

C6630
10
1

C6629
2.2UF_6.3V_3

4
3
2
1
56K_1%_2

1
3 4

2
C6634

R6627
1 2

1
2

2
L6610

CGFB

CVFB

CCOMP

CCSN3

CCSP3

CCSP2

CCSN2

CCSN1

CCSP1

CF-IMAX

COCP-R

CTHERM

5
6
7
8
PAN_ETQP4LR36ZFC_4P
2

R7661

FDMS0306AS
49

Q6611
GND

D
RSC_0603_DY
P3V3A 13 48 V5_CPU 12
GOCP-R V5 IN

470UF_2V

470UF_2V
1
VREF_CPU

C6600

1
14 47

C6601
IN 12 VREF CDH1

1
R6601 C6622

+
S
C 15 46 1 2 1 2 C

+
V3R3 CBST1
C7661
1

2.2_5%_3 0.1UF_16V_2 CSC0402_DY


2.2UF_6.3V_3

4
3
2
1
12 VR_ON 16 45
IN VR_ON CSW1
C6633

3
PVCORE_PG 17 44

2
28
14 OUT CPGOOD U6600 CDL1
P5V0A
0_5%_2_DY
200K_1%_2
1

VR_SVID_CLK 18 43
2

20
12 IN VCLK V5DRV
R6711

R6628

20 VR_SVID_ALERT# 19 42
OUT ALERT# PGND

VR_SVID_DATA
12 OUT CPU_CSN2
20 41
2

20
12 BI VDIO TI_TPS51650RSLR_QFN_48P CDL2

35
17 OUT CPU_PROCHOT# 21 VR_HOT# CSW2 40
PVBAT_CPU
IN 12
12 OUT CPU_CSP2 1 2

R6606 C6624 C6625


22 SLEW CBST2 39 1 2 1 2 0.033UF_16V_2
1 2

5
6
7
8
PVAXG_PG 23 38 2.2_5%_3 0.1UF_16V_2
14 OUT GPGOOD CDH2
R6610

Q6620
FDMS7692

D
24 37 1 2 162K_1%_2

NMOS_4D3S
GF_IMAX VBAT

GTHERM

GPWM1
GCOMP

GPWM2

CPWM3
GSKIP#
GCSN1

GCSP1

GCSN2
GCSP2
GGFB

GVFB

R6616 1 2 1 2 1 2
10K_5%_3
30K_1%_2
1

R6629
R6713 R6607 R6608 R6609
20K_1%_2 PVCORE

G
B B
R6712

S
0_5%_2 17.8K_1%_2 100K_5%_NTC 28.7K_1%_2
21 GFX_VCC_SENSE 1 2
IN PVBAT
25

26

27

28

29

30

32

33

34

35

36
31

3 4

4
3
2
1
2 1
1 2
2

1
GPWM2
R6714
CPWM3
GPWM1

0_5%_2_DY L6620

470UF_2V
1

1
PAN_ETQP4LR36ZFC_4P

470UF_2V
C6602

C6603
R7662

5
6
7
8
R6715 P3V3A RSC_0603_DY

+
R6719

FDMS0306AS
0_5%_2

Q6621
D
GFX_VSS_SENSE 1 2 0_5%_2_DY

2
21 IN 1 2
OUT
OUT
OUT

2 1

3
1
R6721
R6716 0_5%_2
0_5%_2_DY 1 2 C7662

S
CSC0402_DY
13

4
3
2

2
1
1 2 R6731
12 VREF_CPU 1 2 1 2 VREF_CPU 12
IN IN
R6723
C6726 RSC_0402_DY
0_5%_2_DY
100PF_50V_2
1 2
GSKIP# 13
OUT
0_5%_2_DY

0_5%_2_DY

1 2
R6725
15 EN_PVCORE R6718 0_5%_2
IN
1

4.12K_1%_2
0_5%_2

0_5%_2

A 9/21 EE CHANGE TO VRP1V05S FROM P1V05S_CPU A


1

R6730
1

100K_5%_2 IN 9VRP1V05S_VCCP 55
R6630
20K_5%_2
2
R6724

R6720

R6722

R6726
2

0.1UF_16V_2
GPU_CSN1 2

GPU_CSP1 2

GPU_CSP2 2

GPU_CSN2 2

54.9_1%_2
VR_ON

1
130_1%_2
OUT 12
R6728

R6632

R6633

C6635
15.4K_1%_2
1

INVENTEC
VREF_CPU 12
IN
1

R6631 2 1

2
8.66K_1%_2
C6727 R6729
0.1UF_16V_2_DY 100K_1%_NTC 20 12 VR_SVID_CLK TITLE
IN
2

MODEL,PROJECT,FUNCTION
IN
IN
IN
IN

PVCORE 1
2

20
12 VR_SVID_DATA DOC.NUMBER REV
BI SIZE CODE 1310xxxxx-0-0 X01
A3 CS
R6638
13

13

CHANGE by XXX DATE 21-OCT-2002 SHEET 12 of 57

8 7 6 5 4 3 2 1
8 7

http://laptopblue.vn/
6 5 4 3 2 1

D
D

12 GPU_CSN1
OUT

PVBAT_AXG
12 13OUT GPU_CSP1 1 2
IN
C6722
0.033UF_16V_2

5
6
7
8
1 2

Q6710
FDMS7692

D
NMOS_4D3S
R6705
162K_1%_2
R6701 C6720 PVBAT
C 1 2 1 2
1 2 1 2 1 2 PVAXG C

1
S
2.2_5%_3 0.1UF_16V_2
R6702 R6703 R6704
17.8K_1%_2 100K_5%_NTC 28.7K_1%_2

4
3
2
U6710

1
PAD 9 PAD6710
12 GSKIP#
IN POWERPAD_2_0610
1 8

2
BST DRVH 3 3 4 4
2 SKIP# SW 7 1 1 2 2
GPWM1

1
12 3 6
IN PWM VDD
PVBAT_AXG

2
4 5 L6710 OUT 13
5
6
7
8
GND DRVL
PAN_ETQP4LR24AFM_4P

10UF_25V_5

10UF_25V_5
R7671
FDMS0306AS

1
Q6711
P5V0A
D
TI_TPS51601DRBR_SON_8P RSC_0603_DY
C6700

C6710

C6711
+
470UF_2V

1 2
1UF_6.3V_2
1
C6721

2
G

C7671
CSC0402_DY
4
3
2
1
2

B B

A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
PVCORE 2
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 13 of 57

8 7 6 5 4 3 2 1
8 7

http://laptopblue.vn/
6 5 4 3 2 1

P3V3A

IN VRP5V0A_LG 7
OCP=12AMP OCP=8AMP

1
2K_5%_2

2K_5%_2
P1V05S_PCH P1V05S_CPU

R6634

R6732
2 1 2 1
PAD6301
2 1 C6998 C6997
2 1

2
0.1UF_25V_2 0.1UF_25V_2
POWERPAD_2_0610 28 12 OUT PVCORE_PG P15V0A
D

3
D
12 OUT PVAXG_PG 2 1 2 1
IN 7
VRP5V0A
D6998 D6997
BAV99W_7_F BAV99W_7_F
P3V3S

1
0.1UF_25V_2

0.1UF_25V_2

0.1UF_25V_2
C6996

C6995

C6994
R123
1 2

10K_5%_2

2
PAD2 P3V3AL
52 35 31 OUT DGPU_PWROK 1 1 2
2 DGPU_PG IN 56
R6999
7 1 2
POWERPAD1X1M 5V_PG IN
100K_5%_2_DY
2

C D504 60110GA0367T_DY C
NC

DIODE-BAT54-TAP-PHP_DY
3 1

EMI Part
R6781
55 52 IN PX_MODE 1 2 EN_DGPU OUT 56
P3V3S P3V3S P3V3S P1V05S_CPU P1V5S_DGPU
0_5%_2
1

0.1UF_25V_2_DY

0.1UF_25V_2_DY

0.1UF_25V_2_DY

0.1UF_25V_2_DY

0.1UF_25V_2_DY

0.1UF_25V_2_DY

0.1UF_25V_2_DY

0.1UF_25V_2_DY

0.1UF_25V_2_DY

0.1UF_25V_2_DY

0.1UF_25V_2_DY
1

1
C111

C984

C985

C986

C987

C988

C989

C980

C981

C975

C976

C977
0.01UF_50V_2
2

2
B B

P1V5 P5V0A P1V5S_DGPU PVCORE PVCORE_DGPU

R6996
35 21 15 1 2 7
CORE_PWEN IN OUT SKIP_3V_5V
SHORT_0402

1 2 35
7 EN_3V_5V IN OUT ALWAYS_PW_EN
R6997
1

1
0.1UF_25V_2

200K_5%_2

1K_5%_2
R6998
C6999

PVBAT

A A
2

0.1UF_25V_2_DY

0.1UF_25V_2_DY

0.1UF_25V_2_DY

0.1UF_25V_2_DY

0.1UF_25V_2_DY

0.1UF_25V_2_DY

0.1UF_25V_2_DY

0.1UF_25V_2_DY
1

1
C991

C992

C993

C994

C995

C990

C982

C983
INVENTEC
2

2
TITLE MODEL,PROJECT,FUNCTION
POWER TO EE PORT & EMI PART
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 14 of 57

8 7 6 5 4 3 2 1
8 7

http://laptopblue.vn/ 6 5 4 3

P3V3S
2 1

P3V3A P3V3S
2.665A

10K_5%_2
P15V0A Q567

R1067
1 D S 4
2

10uF_6.3V_3
5

1
1
6 3

2
1M_5%_2
G

C1014
NMOS_4D1S
R1070
P1V5_PG

R1053
FDC655BN 8 1 2
IN
100_5%_2

2
2
R7004
D P15V0A_RC 1 2 R1068
11 IN PVCCSA_PG
1 2 ALL_PWGD_IN OUT 17 35 D

2200pF_50V_2
3
0_5%_2

1000PF_50V_2
Q561 100_5%_2

1
CORE_PWEN# 1

C999
35 15 IN G

C1013
R1069
P5V0A P5V0S VCCIO_PG 1
S
15 9 2
IN
SSM3K7002FU

2
3.135A 100_5%_2
2

2
Q558
1 D S 4
2

10uF_6.3V_3
5

1
6 G 3

C1012
NMOS_4D1S
R703
P3V3S FDC655BN RESUME_PWEN
1 2 EN_P1V5
35 IN OUT 8

CSC0402_DY
100K_5%_2

1
RSC_0603_DY

R7005

2
1

1 2

C681
R1071

0_5%_2

2
C C
32

Q559 P1V5S
P1V5
R950
D

1 G 5.647A 35 21 15 14 IN CORE_PWEN 1 2 EN_P1V8


OUT 10

1
S

0.01uF_50V_2
Q560 10K_5%_2
8 1

2
SSM3K7002FU_DY D S

C868
7 2
2

D7000
6 3

NC
5 G 4 3 1

2
10uF_6.3V_3
NMOS_4D3S

1
AON7410

C998
DIODE-BAT54-TAP-PHP
R7006
P5V0S 1 2 R842
35 21 15 14 CORE_PWEN 1 2 EN_P0V75 8
IN OUT P3V3S
RSC_0603_DY

2
0_5%_2
1

100K_5%_2

0.1uF_16V_2
1

10K_5%_2
R1066

C843

R7017
32

B B

2
R7016
Q566 15 9 IN VCCIO_PG 1 2 EN_PVCCSA
OUT 11
D

1 G 0_5%_2
S

SSM3K7002FU_DY
EN_P1V0_VCCP => 1.05V
R657
2

35 21 15 14 CORE_PWEN 1 2 EN_P1V0_VCCP
IN OUT 9
R7021
10K_5%_2 35 CPU_PWEN 1 2 EN_PVCORE 12
IN OUT

0.01uF_50V_2
1
0_5%_2

C662
P1V5S P0V75S
220_5%_2_DY

22_5%_2_DY

2
2

2
R1073

R841
31

31

Q568 Q545
A A
D

1 G 35 15 CORE_PWEN#1 G
IN
S

SSM3K7002FU_DY SSM3K7002FU_DY
2

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
P5V0S & P3V3S
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 15 of 57

8 7 6 5 4 3 2 1
8 7

http://laptopblue.vn/
6 5 4 3 2 1

Green CLK P3V3AL

L1
1 2
FBM_11_160808_121T
200MA_0603
60140EA0319T C185 0.1UF_16V_2 RTC_32K_IN OUT 26
2 1
P3V3AL
GPU_27M_IN_1V8 OUT 49
D P3V3_RTC
C186 2.2UF_6.3V_2 D
C182 2 1 PCH_25M_IN OUT 27
2 1 GREEN_CLK_25M_OUT
LAN_25M_IN OUT 41
0.1UF_16V_2
U9 P1V8S
16
P1V05S_PCH

XTAL_OUT
GREEN_CLK_25M_IN 1 XTAL_IN V3.3A 15
C183 2 VDD VOUT 14 R126 C188 0.1UF_16V_2
2 1 3 VDDIO_25M_B GND 13 10_5%_2 2 1
R127 4 GND NC 12 GPU_27M_IN_1V8 TYPICAL RTC_32K_IN TRACE <= 6
0.1UF_16V_2 PCH_25M_IN 1 SHORT_0402 2 5 11 1 2
25M_B NC
MAX. LENGTH <= 24

VDDIO_25M_A
LAN_25M_IN 1 2 6 25M_A VBAT 10 VBAT IN 26
7 GND 32k 9 RTC_32K_IN
R125
P3V3A_LAN 33_5%_2 17 TYPICAL GPU_27M_IN TRACE <= 8

22UF_6.3V_5
GND

C184
8 MAX. LENGTH <= 12

2
2 1
TYPICAL LAN_25M_IN TRACE <= 8

C187
0.1UF_16V_2 VS_SLG3NB250V_TQFN_16P
6019B0934701 MAX. LENGTH <= 12

1
C TYPICAL LAN_25M_IN TRACE <= 8 C
MAX. LENGTH <= 12
FOR SG USE
SLG3NB300V SUPPORT 27MHZ
P/N : 6019B0941101

FOR UMA USE


SLG3NB250V
P/N : 6019B0934701

FOR UMA IF USE U9 ( SLG3NB250V )


U9 : 6019B0934701
B X2 R126 : NA MOUNT OPEN (PAGE26) OPEN (PAGE41) B
GREEN_CLK_25M_IN 1 3 GREEN_CLK_25M_OUT C188 : NA X2 D4400 X400
4 2 R1 X501 C402
L1 R958 C403
27pF_50V_2

FOR SG
1

1
27pF_50V_2

C180 C874
C180

U9 : SLG3NB300V P/N APPLY


C181

25MHz
R126 : MOUNT C181 C875
6018B0044501
C188 : MOUNT C182
2

C183 OPEN (PAGE27) OPEN (PAGE49)


C184 X503 X1
C185 R1041 R29
C186 C962 C35
C187 C965 C36
R906 (PAGE26)
R912 (PAGE27)
R414 (PAGE41)
R120 (PAGE49)
A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
GREEN CLK SLG3NB250
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 16 of 57

8 7 6 5 4 3 2 1
8 7

http://laptopblue.vn/ 6 5

P1V8S
4

6026B0154901_CHIEFRIVER
3 2 1

1
1K_5%_2_DY

2.2K_5%_2
CN510

R4500

R683

CLOCKS
0_5%_2

MISC
R639
A28 CLK_DMI_PCH_R_DP 1 2 CLK_DMI_PCH_DP

2
R684 BCLK IN 27
31 OUT NV_CLE 1 2 H_SNB_IVB# C26 PROC_SELECT# BCLK# A27 CLK_DMI_PCH_R_DN 1 2 CLK_DMI_PCH_DN
IN 27
R638 0_5%_2
1K_5%_2TP4500
1 AN34 SKTOCC# R689 1K_5%_2
TP30
DPLL_REF_CLK A16 CLK_DP_PCH_R_DP 1 2
DPLL_REF_CLK# A15 CLK_DP_PCH_R_DN 1 2
R690 1K_5%_2 P1V05S_CPU
D P1V05S_CPU
TP4501 1 AL33 D

THERMAL
CATERR#
TP30

62_5%_2

DDR3
H_PECI CPU_DRAMRST#

R748
35 AN33 R8 17
OUT PECI SM_DRAMRST# OUT

MISC
140_1%_2

2
R750 R737
35 12 IN CPU_PROCHOT# 1 2 CPU_PROCHOT#_R AL32 PROCHOT# SM_RCOMP[0] AK1 SM_RCOMP0 1 2
SM_RCOMP[1] A5 SM_RCOMP1 R693 1 2 25.5_1%_2
56_5%_2

47pF_50V_2
SM_RCOMP2

1
SM_RCOMP[2] A4 1 2

C805
PM_THRMTRIP# AN32 R694 200_1%_2
31 OUT THERMTRIP#

R749

2
1 2

PWR MANAGEMENT
PRDY# AP29 TP4502 1
10K_5%_2 TP30
PREQ# AP27 XDP_PREQ# TP4503 1 TP30

JTAG & BPM


TCK AR26 XDP_TCLK TP4504 1 TP30
TMS AR27 XDP_TMS TP4505 1 TP30
28 BI H_PM_SYNC AM34 PM_SYNC TRST# AP30 XDP_TRST# TP4506 1 TP30
C C
TDI AR28 XDP_TDI_R TP4507 1 TP30
TDO AP26 XDP_TDO TP4508 1 TP30
31 IN H_CPUPWRGD AP33 UNCOREPWRGOOD

R799 DBR# AL35 XDP_DBRESET#


TP4509 1 TP30
17 PM_DRAM_PWRGD_CPU
1 V8
2 PM_DRAM_PWRGD_CPU_R
IN SM_DRAMPWROK

130_1%_2 BPM#[0] AT28


BPM#[1] AR29
R790 BPM#[2] AR30
P3V3A P1V5S 46 35 30 IN BUF_PLT_RST#1 AR33
2 BUF_PLT_RST#_CPU RESET# BPM#[3] AT30
BPM#[4] AP32
1.5K_1%_1/16W AR31

750_1%_2
BPM#[5]

1
BPM#[6] AT31
BPM#[7] AR32

R789
0.1uF_16V_2
200_5%_2
1

200_5%_2
1
C4502
R14115

R800

2
FOX_PZ98927_3641_41F_Huronriver_989P_CHIEFRIVER
B B
2

U500
P1V5
28 PM_DRAM_PWRGD 1 5
IN ALL_PWGD_IN
B VCC
PM_DRAM_PWRGD_CPU
35 15 2 4 17
IN A Y OUT P3V3S

1K_1%_2
3 GND

R807
NXP_74AHC1G09GV_SOT753_5P XDP_DBRESET# R788 1 2 1K_5%_2
6019B0773901
R801
(OD AND GATE)

2
1 2 DIMM_DRAMRST# OUT 24 25 P1V05S_CPU

3
1K_5%_2
Q539
XDP_TDO R792 1 2 51_5%_2
PCH_DDR_RST 1 D
27 21 2 51_5%_2
G
IN XDP_TMS R1076 1
2 51_5%_2
S

XDP_TDI_R R1074 1
BSS138LT1 XDP_PREQ# 1 2 51_5%_2_DY
R1075
CPU_DRAMRST#
2

17 IN
XDP_TRST# R791 1 2 51_5%_2
A A
0.047uF_16V_2

XDP_TCLK 2 51_5%_2
4.99K_1%_2

R1077 1
1

1
C809

R805
2

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
CPU - 1
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 17 of 57

8 7 6 5 4 3 2 1
8 7

http://laptopblue.vn/6

R736
5

WITHIN 500 MILS


4

P1V05S_CPU
3 2 1

OF THE CPU
CN510 6026B0154901_CHIEFRIVER
R736
PEG_ICOMPI J22 CPU_PEG_ICOMPI 1 2
PEG_ICOMPO J21
28 DMI_TX0_DN B27 H22 24.9_1%_2
IN DMI_TX1_DN
DMI_RX#[0] PEG_RCOMPO
28 B25
IN DMI_RX#[1]
28
28
IN
IN
DMI_TX2_DN
DMI_TX3_DN
A25
B24
DMI_RX#[2]
DMI_RX#[3] PEG_RX#[0] K33 PEG_RX0_C_DN
IN 48
CLOSE TO CPU

DMI
M35 PEG_RX1_C_DN 48
DMI_TX0_DP
PEG_RX#[1]
PEG_RX2_C_DN
IN
28 B28 L34 48
IN DMI_TX1_DP
DMI_RX[0] PEG_RX#[2]
PEG_RX3_C_DN
IN
28 B26 J35 48
IN DMI_TX2_DP
DMI_RX[1] PEG_RX#[3]
PEG_RX4_C_DN
IN
28 A24 J32 48
IN DMI_TX3_DP
DMI_RX[2] PEG_RX#[4]
PEG_RX5_C_DN
IN 18 IN PEG_TX0_DN C628 1 2 0.1UF_16V_2 PEG_TX0_C_DN OUT 48
28 B23 H34 48
IN DMI_RX[3] PEG_RX#[5]
PEG_RX6_C_DN
IN
D PEG_RX#[6] H31
IN 48
DMI_RX0_DN PEG_RX7_C_DN PEG_TX1_DN 1 2 PEG_TX1_C_DN

PCI EXPRESS* - GRAPHICS


28 OUT G21 DMI_TX#[0] PEG_RX#[7] G33
IN 48 18 IN C622 0.1UF_16V_2 OUT 48 D
28 DMI_RX1_DN E22 G30
OUT DMI_RX2_DN
DMI_TX#[1] PEG_RX#[8]
28 F21 F35
OUT DMI_RX3_DN
DMI_TX#[2] PEG_RX#[9]
18 IN PEG_TX2_DN C629 1 2 0.1UF_16V_2 PEG_TX2_C_DN OUT 48
28 D21 E34
OUT DMI_TX#[3] PEG_RX#[10]
PEG_RX#[11] E32
28 OUT DMI_RX0_DP G22 DMI_TX[0] PEG_RX#[12] D33 18 IN PEG_TX3_DN C623 1 2 0.1UF_16V_2 PEG_TX3_C_DN OUT 48
28 DMI_RX1_DP D22 D31
OUT DMI_RX2_DP
DMI_TX[1] PEG_RX#[13]
28 F20 B33
OUT DMI_RX3_DP
DMI_TX[2] PEG_RX#[14]
18 IN PEG_TX4_DN C626 1 2 0.1UF_16V_2 PEG_TX4_C_DN OUT 48
28 C21 C32
OUT DMI_TX[3] PEG_RX#[15]

PEG_RX[0] J33 PEG_RX0_C_DP


IN 48 18 IN PEG_TX5_DN C624 1 2 0.1UF_16V_2 PEG_TX5_C_DN OUT 48
L35 PEG_RX1_C_DP 48
PEG_RX[1] IN

Intel(R) FDI
K34 PEG_RX2_C_DP 48
PEG_RX[2] IN
28 OUT FDI_TX0_DN A21 FDI0_TX#[0] PEG_RX[3] H35 PEG_RX3_C_DP
IN 48 18 IN PEG_TX6_DN C601 1 2 0.1UF_16V_2 PEG_TX6_C_DN OUT 48
28 FDI_TX1_DN H19 H32 PEG_RX4_C_DP 48
OUT FDI_TX2_DN
FDI0_TX#[1] PEG_RX[4]
PEG_RX5_C_DP
IN
28 E19 G34 48
OUT FDI_TX3_DN
FDI0_TX#[2] PEG_RX[5]
PEG_RX6_C_DP
IN 18 IN PEG_TX7_DN C620 1 2 0.1UF_16V_2 PEG_TX7_C_DN OUT 48
28 F18 G31 48
OUT FDI_TX4_DN
FDI0_TX#[3] PEG_RX[6]
PEG_RX7_C_DP
IN
28 B21 F33 48
OUT FDI_TX5_DN
FDI1_TX#[0] PEG_RX[7] IN
28 C20 F30
OUT FDI_TX6_DN
FDI1_TX#[1] PEG_RX[8]
28 D18 E35
OUT FDI_TX7_DN
FDI1_TX#[2] PEG_RX[9]
28 E17 E33
OUT FDI1_TX#[3] PEG_RX[10]
18 IN PEG_TX0_DP C631 1 2 0.1UF_16V_2 PEG_TX0_C_DP OUT 48
PEG_RX[11] F32
PEG_RX[12] D34
C 28 FDI_TX0_DP A22 E31 18 PEG_TX1_DP C619 1 2 0.1UF_16V_2 PEG_TX1_C_DP 48
C
OUT FDI_TX1_DP
FDI0_TX[0] PEG_RX[13] IN OUT
28 G19 C33
OUT FDI_TX2_DP
FDI0_TX[1] PEG_RX[14]
28 E20 B32
OUT FDI_TX3_DP
FDI0_TX[2] PEG_RX[15]
18 IN PEG_TX2_DP C630 1 2 0.1UF_16V_2 PEG_TX2_C_DP OUT 48
28 G18
OUT FDI_TX4_DP
FDI0_TX[3]
PEG_TX0_DN
28 B20 M29 18
OUT FDI1_TX[0] PEG_TX#[0] OUT
28 OUT FDI_TX5_DP C19 FDI1_TX[1] PEG_TX#[1] M32 PEG_TX1_DN
OUT 18 18 IN PEG_TX3_DP C618 1 2 0.1UF_16V_2 PEG_TX3_C_DP OUT 48
28 FDI_TX6_DP D19 M31 PEG_TX2_DN 18
OUT FDI_TX7_DP
FDI1_TX[2] PEG_TX#[2]
PEG_TX3_DN
OUT
28 F17 L32 18
OUT FDI1_TX[3] PEG_TX#[3]
PEG_TX4_DN
OUT 18 IN PEG_TX4_DP C627 1 2 0.1UF_16V_2 PEG_TX4_C_DP OUT 48
L29 18
FDI_FSYNC0
PEG_TX#[4]
PEG_TX5_DN
OUT
28 J18 K31 18
IN FDI0_FSYNC PEG_TX#[5] OUT
28 IN FDI_FSYNC1 J17 FDI1_FSYNC PEG_TX#[6] K28 PEG_TX6_DN
OUT 18 18 IN PEG_TX5_DP C621 1 2 0.1UF_16V_2 PEG_TX5_C_DP OUT 48
J30 PEG_TX7_DN 18
FDI_INT
PEG_TX#[7] OUT
28 H20 J28
IN FDI_INT PEG_TX#[8]
PEG_TX#[9] H29 18 IN PEG_TX6_DP C625 1 2 0.1UF_16V_2 PEG_TX6_C_DP OUT 48
28 FDI_LSYNC0 J19 G27
P1V05S_CPU IN FDI_LSYNC1
FDI0_LSYNC PEG_TX#[10]
28 H17 E29
IN FDI1_LSYNC PEG_TX#[11]
18 IN PEG_TX7_DP C600 1 2 0.1UF_16V_2 PEG_TX7_C_DP OUT 48
PEG_TX#[12] F27
PEG_TX#[13] D28
R686 PEG_TX#[14] F26
1 2 CPU_EDP_COMPIO A18 eDP_COMPIO PEG_TX#[15] E25
A17 eDP_ICOMPO
24.9_1%_2 B16 M28 PEG_TX0_DP 18
eDP_HDP# PEG_TX[0]
PEG_TX1_DP
OUT
B PEG_TX[1] M33
OUT 18 B
M30 PEG_TX2_DP 18
PEG_TX[2] OUT
eDP

C15 L31 PEG_TX3_DP 18


R686 eDP_AUX PEG_TX[3]
PEG_TX4_DP
OUT
D15 L28 18
eDP_AUX# PEG_TX[4] OUT
WITHIN 500 MILS PEG_TX[5] K30 PEG_TX5_DP
OUT 18
K27 PEG_TX6_DP 18
OF THE CPU PEG_TX[6]
PEG_TX7_DP
OUT
C17 J29 18
eDP_TX[0] PEG_TX[7] OUT
F16 eDP_TX[1] PEG_TX[8] J27
C16 eDP_TX[2] PEG_TX[9] H28
G15 eDP_TX[3] PEG_TX[10] G28
PEG_TX[11] E28
C18 eDP_TX#[0] PEG_TX[12] F28
E16 eDP_TX#[1] PEG_TX[13] D27
D16 eDP_TX#[2] PEG_TX[14] E26
F15 eDP_TX#[3] PEG_TX[15] D25

FOX_PZ98927_3641_41F_Huronriver_989P_CHIEFRIVER

A A

INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
CPU - 2
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 18 of 57

8 7 6 5 4 3 2 1
8 7

http://laptopblue.vn/
6 5 4 3 2 1

CN510
CN510 AE2 M_CLK_DDR2_DP 25
6026B0154901_CHIEFRIVER
SB_CLK[0]
M_CLK_DDR2_DN
OUT
AD2 25
M_B_DQ<0>
SB_CLK#[0]
M_CKE2
OUT
6026B0154901_CHIEFRIVER 25 C9 R9 25
BI M_B_DQ<1>
SB_DQ[0] SB_CKE[0] OUT
25 A7
BI M_B_DQ<2>
SB_DQ[1]
25 D10
BI M_B_DQ<3>
SB_DQ[2]
25 C8
SA_CLK[0] AB6 M_CLK_DDR0_DP
OUT 24 BI M_B_DQ<4>
SB_DQ[3]
M_CLK_DDR3_DP
25 A9 AE1 25

DDR SYSTEM MEMORY B


SA_CLK#[0] AA6 M_CLK_DDR0_DN
OUT 24 BI SB_DQ[4] SB_CLK[1] OUT
25 M_B_DQ<5> A8 AD1 M_CLK_DDR3_DN 25
D 24 BI M_A_DQ<0> C5 SA_DQ[0] SA_CKE[0] V9 M_CKE0
OUT 24 BI M_B_DQ<6>
SB_DQ[5] SB_CLK#[1]
M_CKE3
OUT
25 D9 R10 25
24 BI M_A_DQ<1> D5 SA_DQ[1] BI M_B_DQ<7>
SB_DQ[6] SB_CKE[1] OUT D
25 D8
24 BI M_A_DQ<2> D3 SA_DQ[2] BI M_B_DQ<8>
SB_DQ[7]
25 G4
24 BI M_A_DQ<3> D2 SA_DQ[3] BI M_B_DQ<9>
SB_DQ[8]
25 F4
24 BI M_A_DQ<4> D6 SA_DQ[4] SA_CLK[1] AA5 M_CLK_DDR1_DP
OUT 24 BI M_B_DQ<10>
SB_DQ[9]
25 F1 AB2

DDR SYSTEM MEMORY A


24 BI M_A_DQ<5> C6 SA_DQ[5] SA_CLK#[1] AB5 M_CLK_DDR1_DN
OUT 24 BI M_B_DQ<11>
SB_DQ[10] RSVD_TP[11]
25 G1 AA2
24 BI M_A_DQ<6> C2 SA_DQ[6] SA_CKE[1] V10 M_CKE1
OUT 24 BI M_B_DQ<12>
SB_DQ[11] RSVD_TP[12]
25 G5 T9
24 BI M_A_DQ<7> C3 SA_DQ[7] BI M_B_DQ<13>
SB_DQ[12] RSVD_TP[13]
25 F5
24 BI M_A_DQ<8> F10 SA_DQ[8] BI M_B_DQ<14>
SB_DQ[13]
25 F2
24 BI M_A_DQ<9> F8 SA_DQ[9] BI M_B_DQ<15>
SB_DQ[14]
25 G2
24 BI M_A_DQ<10> G10 SA_DQ[10] RSVD_TP[1] AB4 BI M_B_DQ<16>
SB_DQ[15]
25 J7 AA1
24 BI M_A_DQ<11> G9 SA_DQ[11] RSVD_TP[2] AA4 BI M_B_DQ<17>
SB_DQ[16] RSVD_TP[14]
25 J8 AB1
24 BI M_A_DQ<12> F9 SA_DQ[12] RSVD_TP[3] W9 BI M_B_DQ<18>
SB_DQ[17] RSVD_TP[15]
25 K10 T10
24 BI M_A_DQ<13> F7 SA_DQ[13] BI SB_DQ[18] RSVD_TP[16]
25 M_B_DQ<19> K9
24 BI M_A_DQ<14> G8 SA_DQ[14] BI M_B_DQ<20>
SB_DQ[19]
25 J9
24 BI M_A_DQ<15> G7 SA_DQ[15] BI M_B_DQ<21>
SB_DQ[20]
25 J10
24 BI M_A_DQ<16> K4 SA_DQ[16] RSVD_TP[4] AB3 BI M_B_DQ<22>
SB_DQ[21]
M_CS#2
25 K8 AD3 25
24 BI M_A_DQ<17> K5 SA_DQ[17] RSVD_TP[5] AA3 BI M_B_DQ<23>
SB_DQ[22] SB_CS#[0]
M_CS#3
OUT
25 K7 AE3 25
24 BI M_A_DQ<18> K1 SA_DQ[18] RSVD_TP[6] W10 BI M_B_DQ<24>
SB_DQ[23] SB_CS#[1] OUT
25 M5 AD6
24 BI M_A_DQ<19> J1 SA_DQ[19] BI M_B_DQ<25>
SB_DQ[24] RSVD_TP[17]
25 N4 AE6
24 BI M_A_DQ<20> J5 SA_DQ[20] BI M_B_DQ<26>
SB_DQ[25] RSVD_TP[18]
25 N2
24 BI M_A_DQ<21> J4 SA_DQ[21] BI M_B_DQ<27>
SB_DQ[26]
25 N1
24 BI M_A_DQ<22> J2 SA_DQ[22] SA_CS#[0] AK3 M_CS#0
OUT 24 BI M_B_DQ<28>
SB_DQ[27]
25 M4
24 BI M_A_DQ<23> K2 SA_DQ[23] SA_CS#[1] AL3 M_CS#1
OUT 24 BI M_B_DQ<29>
SB_DQ[28]
M_ODT2
C 24 M_A_DQ<24> M8 AG1 25 BI N5 SB_DQ[29] SB_ODT[0] AE4
OUT 25 C
BI M_A_DQ<25>
SA_DQ[24] RSVD_TP[7]
25 BI M_B_DQ<30> M2 SB_DQ[30] SB_ODT[1] AD4 M_ODT3
OUT 25
24 N10 AH1
BI M_A_DQ<26>
SA_DQ[25] RSVD_TP[8]
25 BI M_B_DQ<31> M1 SB_DQ[31] RSVD_TP[19] AD5
24 N8
BI M_A_DQ<27>
SA_DQ[26]
25 BI M_B_DQ<32> AM5 SB_DQ[32] RSVD_TP[20] AE5
24 N7
BI M_A_DQ<28>
SA_DQ[27]
25 BI M_B_DQ<33> AM6 SB_DQ[33]
24 M10
BI M_A_DQ<29>
SA_DQ[28]
M_ODT0 25 BI M_B_DQ<34> AR3 SB_DQ[34]
24 M9 AH3 24
BI M_A_DQ<30>
SA_DQ[29] SA_ODT[0]
M_ODT1
OUT 25 BI M_B_DQ<35> AP3 SB_DQ[35]
24 N9 AG3 24
BI M_A_DQ<31>
SA_DQ[30] SA_ODT[1] OUT 25 BI M_B_DQ<36> AN3 SB_DQ[36]
24 M7 AG2
BI M_A_DQ<32>
SA_DQ[31] RSVD_TP[9]
25 BI M_B_DQ<37> AN2 SB_DQ[37] SB_DQS#[0] D7 M_B_DQS0_DN
OUT 25
24 AG6 AH2
BI M_A_DQ<33>
SA_DQ[32] RSVD_TP[10]
25 BI M_B_DQ<38> AN1 SB_DQ[38] SB_DQS#[1] F3 M_B_DQS1_DN
OUT 25
24 AG5
BI M_A_DQ<34>
SA_DQ[33]
25 BI M_B_DQ<39> AP2 SB_DQ[39] SB_DQS#[2] K6 M_B_DQS2_DN
OUT 25
24 AK6
BI M_A_DQ<35>
SA_DQ[34]
25 BI M_B_DQ<40> AP5 SB_DQ[40] SB_DQS#[3] N3 M_B_DQS3_DN
OUT 25
24 AK5
BI M_A_DQ<36>
SA_DQ[35]
25 BI M_B_DQ<41> AN9 SB_DQ[41] SB_DQS#[4] AN5 M_B_DQS4_DN
OUT 25
24 AH5
BI M_A_DQ<37>
SA_DQ[36]
M_A_DQS0_DN 25 BI M_B_DQ<42> AT5 SB_DQ[42] SB_DQS#[5] AP9 M_B_DQS5_DN
OUT 25
24 AH6 C4 24
BI M_A_DQ<38>
SA_DQ[37] SA_DQS#[0]
M_A_DQS1_DN
OUT 25 BI M_B_DQ<43> AT6 SB_DQ[43] SB_DQS#[6] AK12 M_B_DQS6_DN
OUT 25
24 AJ5 G6 24
BI M_A_DQ<39>
SA_DQ[38] SA_DQS#[1]
M_A_DQS2_DN
OUT 25 BI M_B_DQ<44> AP6 SB_DQ[44] SB_DQS#[7] AP15 M_B_DQS7_DN
OUT 25
24 AJ6 J3 24
BI M_A_DQ<40>
SA_DQ[39] SA_DQS#[2]
M_A_DQS3_DN
OUT 25 BI M_B_DQ<45> AN8 SB_DQ[45]
24 AJ8 M6 24
BI M_A_DQ<41>
SA_DQ[40] SA_DQS#[3]
M_A_DQS4_DN
OUT 25 BI M_B_DQ<46> AR6 SB_DQ[46]
24 AK8 AL6 24
BI M_A_DQ<42>
SA_DQ[41] SA_DQS#[4]
M_A_DQS5_DN
OUT 25 BI M_B_DQ<47> AR5 SB_DQ[47]
24 AJ9 AM8 24
BI M_A_DQ<43>
SA_DQ[42] SA_DQS#[5]
M_A_DQS6_DN
OUT 25 BI M_B_DQ<48> AR9 SB_DQ[48]
24 AK9 AR12 24
BI M_A_DQ<44>
SA_DQ[43] SA_DQS#[6]
M_A_DQS7_DN
OUT 25 BI M_B_DQ<49> AJ11 SB_DQ[49] SB_DQS[0] C7 M_B_DQS0_DP
OUT 25
24 AH8 AM15 24
BI M_A_DQ<45>
SA_DQ[44] SA_DQS#[7] OUT 25 BI M_B_DQ<50> AT8 SB_DQ[50] SB_DQS[1] G3 M_B_DQS1_DP
OUT 25
24 AH9
BI M_A_DQ<46>
SA_DQ[45]
25 BI M_B_DQ<51> AT9 SB_DQ[51] SB_DQS[2] J6 M_B_DQS2_DP
OUT 25
B 24 BI AL9 SA_DQ[46]
25 M_B_DQ<52> AH11 M3 M_B_DQS3_DP 25
B
24 BI M_A_DQ<47> AL8 SA_DQ[47] BI M_B_DQ<53>
SB_DQ[52] SB_DQS[3]
M_B_DQS4_DP
OUT
25 AR8 AN6 25
24 BI M_A_DQ<48> AP11 SA_DQ[48] BI M_B_DQ<54>
SB_DQ[53] SB_DQS[4]
M_B_DQS5_DP
OUT
25 AJ12 AP8 25
24 BI M_A_DQ<49> AN11 SA_DQ[49] SA_DQS[0] D4 M_A_DQS0_DP
OUT 24 BI M_B_DQ<55>
SB_DQ[54] SB_DQS[5]
M_B_DQS6_DP
OUT
25 AH12 AK11 25
24 BI M_A_DQ<50> AL12 SA_DQ[50] SA_DQS[1] F6 M_A_DQS1_DP
OUT 24 BI M_B_DQ<56>
SB_DQ[55] SB_DQS[6]
M_B_DQS7_DP
OUT
25 AT11 AP14 25
24 BI M_A_DQ<51> AM12 SA_DQ[51] SA_DQS[2] K3 M_A_DQS2_DP
OUT 24 BI M_B_DQ<57>
SB_DQ[56] SB_DQS[7] OUT
25 AN14
24 BI M_A_DQ<52> AM11 SA_DQ[52] SA_DQS[3] N6 M_A_DQS3_DP
OUT 24 BI M_B_DQ<58>
SB_DQ[57]
25 AR14
24 BI M_A_DQ<53> AL11 SA_DQ[53] SA_DQS[4] AL5 M_A_DQS4_DP
OUT 24 BI M_B_DQ<59>
SB_DQ[58]
25 AT14
24 BI M_A_DQ<54> AP12 SA_DQ[54] SA_DQS[5] AM9 M_A_DQS5_DP
OUT 24 BI M_B_DQ<60>
SB_DQ[59]
25 AT12
24 BI M_A_DQ<55> AN12 SA_DQ[55] SA_DQS[6] AR11 M_A_DQS6_DP
OUT 24 BI SB_DQ[60]
25 M_B_DQ<61> AN15 AA8 M_B_A<0> 25
24 BI M_A_DQ<56> AJ14 SA_DQ[56] SA_DQS[7] AM14 M_A_DQS7_DP
OUT 24 BI M_B_DQ<62>
SB_DQ[61] SB_MA[0]
M_B_A<1>
BI
25 AR15 T7 25
24 BI M_A_DQ<57> AH14 SA_DQ[57] BI M_B_DQ<63>
SB_DQ[62] SB_MA[1]
M_B_A<2>
BI
25 AT15 R7 25
24 BI M_A_DQ<58> AL15 SA_DQ[58] BI SB_DQ[63] SB_MA[2]
M_B_A<3>
BI
T6 25
24 BI M_A_DQ<59> AK15 SA_DQ[59]
SB_MA[3]
M_B_A<4>
BI
T2 25
24 BI M_A_DQ<60> AL14 SA_DQ[60]
SB_MA[4]
M_B_A<5>
BI
T4 25
24 BI M_A_DQ<61> AK14 SA_DQ[61] SA_MA[0] AD10 M_A_A<0>
BI 24
SB_MA[5]
M_B_A<6>
BI
T3 25
24 BI M_A_DQ<62> AJ15 SA_DQ[62] SA_MA[1] W1 M_A_A<1>
BI 24 M_B_BS0
SB_MA[6]
M_B_A<7>
BI
25 AA9 R2 25
24 BI M_A_DQ<63> AH15 SA_DQ[63] SA_MA[2] W2 M_A_A<2>
BI 24 OUT M_B_BS1
SB_BS[0] SB_MA[7]
M_B_A<8>
BI
25 AA7 T5 25
SA_MA[3] W7 M_A_A<3>
BI 24 OUT M_B_BS2
SB_BS[1] SB_MA[8]
M_B_A<9>
BI
25 R6 R3 25
SA_MA[4] V3 M_A_A<4>
BI 24 OUT SB_BS[2] SB_MA[9]
M_B_A<10>
BI
AB7 25
SA_MA[5] V2 M_A_A<5>
BI 24
SB_MA[10]
M_B_A<11>
BI
R1 25
SA_MA[6] W3 M_A_A<6>
BI 24
SB_MA[11]
M_B_A<12>
BI
T1 25
24 OUT M_A_BS0 AE10 SA_BS[0] SA_MA[7] W6 M_A_A<7>
BI 24 M_B_CAS#
SB_MA[12]
M_B_A<13>
BI
25 AA10 AB10 25
24 OUT M_A_BS1 AF10 SA_BS[1] SA_MA[8] V1 M_A_A<8>
BI 24 OUT SB_CAS# SB_MA[13] BI
25 M_B_RAS# AB8 R5 M_B_A<14> 25
A 24 OUT M_A_BS2 V6 SA_BS[2] SA_MA[9] W5 M_A_A<9>
BI 24 OUT M_B_WE#
SB_RAS# SB_MA[14]
M_B_A<15>
BI A
25 AB9 R4 25
SA_MA[10] AD8 M_A_A<10>
BI 24 OUT SB_WE# SB_MA[15] BI
V4 M_A_A<11> 24
SA_MA[11]
M_A_A<12>
BI FOX_PZ98927_3641_41F_Huronriver_989P_CHIEFRIVER
W4 24
M_A_CAS#
SA_MA[12]
M_A_A<13>
BI
24 AE8 AF8 24
OUT M_A_RAS#
SA_CAS# SA_MA[13]
M_A_A<14>
BI
24 AD9 V5 24
OUT M_A_WE#
SA_RAS# SA_MA[14]
M_A_A<15>
BI
24 AF9 V7 24
OUT SA_WE# SA_MA[15] BI

FOX_PZ98927_3641_41F_Huronriver_989P_CHIEFRIVER
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
CPU - 3
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 19 of 57

8 7 6 5 4 3 2 1
8 7

IMAX = 53A
http://laptopblue.vn/ 6

PVCORE CN510
5

6026B0154901_CHIEFRIVER
4

P1V05S_CPU
3 2 1

AG35 VCC1
VTT
AG34
AG33
VCC2
VCC3
POWER VCCIO1
VCCIO2
AH13
AH10
22uF_6.3V_5 AG32 AG10

22uF_6.3V_5

22uF_6.3V_5

22uF_6.3V_5

22uF_6.3V_5

22uF_6.3V_5

22uF_6.3V_5

22uF_6.3V_5

22uF_6.3V_5

22uF_6.3V_5

22uF_6.3V_5

22uF_6.3V_5

22uF_6.3V_5

22uF_6.3V_5

22uF_6.3V_5

22uF_6.3V_5
VCC4 VCCIO3
1

1
AG31 VCC5 VCCIO4 AC10
C745

C737

C743

C744

C739

C731

C749

C728

C755

C761

C760

C758

C706

C752

C756

C754
AG30 VCC6 VCCIO5 Y10
AG29 VCC7 VCCIO6 U10
AG28 VCC8 VCCIO7 P10
AG27 VCC9 VCCIO8 L10
2

2
AG26 VCC10 VCCIO9 J14
AF35 VCC11 VCCIO10 J13
AF34 VCC12 VCCIO11 J12
AF33 VCC13 VCCIO12 J11
AF32 VCC14 VCCIO13 H14
D AF31 VCC15 VCCIO14 H12
D

PEG AND DDR

22uF_6.3V_5
1
AF30 H11

22uF_6.3V_5

22uF_6.3V_5

22uF_6.3V_5
VCC16 VCCIO15

1
AF29 VCC17 VCCIO16 G14

C753

C707

C759

C757
AF28 VCC18 VCCIO17 G13
AF27 VCC19 VCCIO18 G12
AF26 F14

22uF_6.3V_5

22uF_6.3V_5
VCC20 VCCIO19

1
AD35 F13

2
VCC21 VCCIO20

2
AD34 F12

C730

C736
VCC22 VCCIO21
AD33 VCC23 VCCIO22 F11
AD32 VCC24 VCCIO23 E14
AD31 VCC25 VCCIO24 E12

2
AD30 VCC26
AD29 VCC27 VCCIO25 E11
AD28 VCC28 VCCIO26 D14
AD27 VCC29 VCCIO27 D13
AD26 VCC30 VCCIO28 D12
AC35 VCC31 VCCIO29 D11
AC34 VCC32 VCCIO30 C14
AC33 C13
AC32
VCC33
VCC34
VCCIO31
VCCIO32 C12 VCCIO IMAX = 8.5A
AC31 VCC35 VCCIO33 C11
AC30 VCC36 VCCIO34 B14
AC29 VCC37 VCCIO35 B12
C AC28 VCC38 VCCIO36 A14 C
10uF_6.3V_5

10uF_6.3V_5

10uF_6.3V_5

10uF_6.3V_5

10uF_6.3V_5
1

1
AC27 VCC39 VCCIO37 A13
AC26 VCC40 VCCIO38 A12
C725

C738

C723

C742

C727

AA35 VCC41 VCCIO39 A11


AA34 VCC42
AA33 VCC43 VCCIO40 J23
AA32
2

VCC44
AA31 VCC45
AA30 VCC46
AA29 VCC47

CORE SUPPLY
AA28 VCC48
AA27 VCC49 P1V05S_CPU
AA26 VCC50
Y35 VCC51
Y34 VCC52
Y33 VCC53
10uF_6.3V_5

10uF_6.3V_5

10uF_6.3V_5

10uF_6.3V_5

10uF_6.3V_5
1

1
Y32

75_1%_2
130_1%_2
VCC54
Y31 VCC55
C722

C748

C729

C724

C726

R755

R753
Y30 VCC56
Y29 VCC57
Y28 VCC58
Y27
2

2
VCC59

SVID
Y26 VCC60
B V35 AJ29 H_CPU_SVIDALRT# 1 2 43_5%_2 VR_SVID_ALERT# B
VCC61 VIDALERT# R751 OUT 12
V34 AJ30 H_CPU_SVIDCLK R4538 1 2 0_5%_2 VR_SVID_CLK 12
VCC62 VIDSCLK
VR_SVID_DATA
OUT
V33 AJ28 H_CPU_SVIDDAT R4539 1 2 0_5%_2 12
VCC63 VIDSOUT OUT
V32 VCC64
V31 VCC65
V30 VCC66 PVCORE
V29 VCC67
V28 VCC68

1
V27

100_1%_2
VCC69
V26 VCC70

R734
U35 VCC71
U34 VCC72
U33 VCC73
U32

2
VCC74
VCCSENSE 12
U31 VCC75
VSSSENSE
OUT
U30 OUT 12
VCC76

100_1%_2
1
U29 VCC77
U28 VCC78

R735
U27 VCC79
U26 VCC80
R35 VCC81
R34

2
VCC82
R33 VCC83
R32 VCC84
A R31 P1V05S_CPU A
SENSE LINES

VCC85
R30 VCC86
R29 VCC87

10_1%_2
R28 VCC88 VCC_SENSE AJ35
R27 VCC89 VSS_SENSE AJ34

R691
R26 VCC90
P35 VCC91
P34 VCC92

2
P33 B10 VCC_SENSE_VCCIO 9
VCC93 VCCIO_SENSE OUT

INVENTEC
P32 A10 VSS_SENSE_VCCIO 9
VCC94 VSS_SENSE_VCCIO OUT

10_1%_2
P31 VCC95
P30 VCC96

R692
P29 VCC97
P28 VCC98 TITLE
P27 VCC99 MODEL,PROJECT,FUNCTION

2
P26 VCC100
CPU - 4
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
FOX_PZ98927_3641_41F_Huronriver_989P_CHIEFRIVER
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 20 of 57

8 7 6 5 4 3 2 1
8

SANDY BRIDGE + IVY BRIDGE COMPTIBILITY DG 2.5.17.1


7

http://laptopblue.vn/ 6

R4564 CPUDDR_WR_VREF2_M
5 4 3

P0V75M_VREF
PAD4500
2

P0V75M_VREF_H P1V5S
1

1K_1%_2_DY
R4562 1 2
1 2 CPUDDR_WR_VREF1_M 1 2

1
1 2
0_5%_2_DY
0_5%_2_DY POWERPAD1X1M_DY

R4565
21 DDR_WR_VREF01 2 3 21 DDR_WR_VREF02 2 3
IN