Fault Analysis and Hybrid Protection Scheme for

Multi-terminal HVDC using Wavelet Transform

Bhaskar Mitra,Student Member, Badrul Chowdhury,Senior Member, IEEE, Madhav Manjrekar,Senior Member, IEEE
Department of Electrical and Computer Engineering
University of North Carolina Charlotte
Charlotte, USA
bmitra@uncc.edu b.chowdhury@uncc.edu madhav.manjrekar@uncc.edu

AbstractTransmission of power over long distances has

become an important aspect in todays world because of off-
shore generations from wind, ocean currents, tidal, waves and
others. In general, HVDC technology is well-accepted around
the world. The VSC-HVDC has gained importance over the AC1 Reactive Power Reactive Power AC2
Compensating Compensating
years. Certain problems regarding protection still remain, but Devices Active Power Devices
with the implementation of the hybrid breaker, the system can
be protected from system faults. This paper discusses the effects Figure 1: Conventional thyristor-based HVDC system [1]
of various kinds of faults on the VSC-HVDC system and
detection of fault current using Wavelet transform (WT). The
output of the wavelet transform is used for detection of the fault
currents. The system is designed and simulated in
PSCAD/EMTDC and results are discussed.
AC1 AC2
Index Terms Discrete Wavelet Transform (DWT), fault Active Power
analysis, hybrid breaker, multi-terminal HVDC, Figure 2: VSC IGBT-based HVDC system [1]
PSCAD/EMTDC, voltage source converter, wavelets, etc.
A list of the few major HVDC projects around the world
I. INTRODUCTION are listed in Table I below.
With the ever increasing demand for electric power, there Table I: List of Major HVDC Projects
is a need for improving the efficiency and operation in the Major HVDC Projects
transmission of energy. There are many remote areas where
Project Name Location Year System Details
transmission of electric energy is still not viable for utilities.
MW kV km
In the face of stringent environmental regulations, the need for
cleaner forms of fuel for generation has never been more Gotland Sweden 1954 20 100 96
obvious [2]. Offshore energy production from wind, ocean N. Z. Inter-
Island NZ 1965 600 250 609
currents, waves etc. are considered as feasible technologies
Hokkaido-
available to harness the power from renewable sources; Honshu Japan 1979 300 250 167
however, the problem lies in making this energy available for East-South
use. Initially, HVDC links were operated using thyristor Intercon India 2003 2000 500 1450
controls interconnecting two AC links as shown in Figure 1, Trans Bay
but with several limitations in operation, the Voltage Source Cable USA 2010 400 200 85
Converter (VSC) was introduced which helped to overcome Xiangjiaba-
the major disadvantages for a conventional HVDC system. Shanghai China 2010 6400 800 2000
The VSC-HVDC is operated using IGBT switches which Dolwin1 Germany 2015 800 320 165
gives the operator both turn-on and turn-off capabilities. VSC- Borwin2 Germany 2015 800 300 200
HVDC links enable independent active and reactive control at
higher frequencies and produces the desired voltage Although, VSC-HVDC systems are highly vulnerable to
waveforms with reduced harmonics. VSC-HVDC accounts faults, cable faults are more common due to the breakdown of
for its own reactive power support, and thus, operating costs the transmission cable. On the other hand, conventional
are reduced as separate devices are not required for reactive HVDC systems are more robust as they are line commutated.
power compensation [3]. A multi-terminal VSC-HVDC Today, two kinds of HVDC-based systems are
shown in Figure 2 has been designed and considered for study operational: Conventional Thyristor HVDC and VSC IGBT
under fault conditions. HVDC.
This project was funded by the Coastal Studies Institute (CSI) of North A comparison between a conventional and VSC-HVDC is
Carolina. The authors would also like to acknowledge the support of Energy shown in Table II:
Production and Infrastructure Centre (EPIC) of the University of North
Carolina Charlotte.

978-1-5090-3270-9/16/$31.00 2016 IEEE

 Table II: Comparison between conventional and VSC HVDC systems
R/2 L/2 icable , iVSI
Criteria Conventional VSC-HVDC
HVDC
Reactive Power Compensating Self-Compensated iD3 iD2 iD1

Devices Required Lchoke

Power Direction Controlled by DC Controlled

Control
Voltage

Employs only
bipolarity of the
current
Controls active and
+
Vc
-
ic

C } ig a,b,c

active power reactive power

control independently
Power Reversal Power reversal is Power reversal is R/2 L/2
not possible done by changing
the polarity Figure 3: VSC under short circuit fault condition
Vulnerability Less Vulnerable to More vulnerable to dVC d 2V
faults faults VC  RC  LC 2C 0 
dt dt
VSC-HVDC helps to overcome the disadvantages of a Comparing (2) with second order general equation,
conventional thyristor-controlled HVDC, although its s 2  2D s  Z0 2 0 
vulnerability to DC faults creates a challenge. where, D R / 2 L and Z0 1 / LC
The paper discusses DC cable faults and related analysis
in Section II. Fault detection is discussed in Section III and Z0 is the angular resonance frequency
PSCAD/EMTDC simulation results are discussed in Section Equating (1) with the condition,
IV. R  2 L/C
II. VSC-HVDC CABLE FAULT ANALYSIS R
or , L /C !1
VSC HVDC systems are highly vulnerable to DC side 2
faults and a DC bus or cable fault can be very dangerous since This gives rise to an underdamped condition for the second
the fault current can ramp up very fast due to the lack of order RLC circuit with (]  1), where ] is the damping
reactance in the circuit. Thus, special protection schemes need factor, Zd is the damped resonance frequency and D is the
to be designed to protect the system. The faulted system can attenuation.
be analyzed in different stages to help us to understand the The general solution for (2) with underdamped conditions is
system response under fault conditions. given as:
A. Short Circuit Fault Analysis VC  t  B1e D t cos Zd t  B2 e D t sin Zd t 
A short circuit fault is very uncommon for a VSC-HVDC Given that: Vc  t0  V0 and I cable  t0  I0
system, but it is the most dangerous. During a short circuit
fault all the converter station IGBTs can block themselves VC  t0  B1 V0 
employing self-protection but the anti-parallel diodes I c (t0)
connected across the IGBTs continue to feed the fault current. D B1  Zd B2 
A model representation of a short circuit fault is shown in C
Figure 3. Considering a S -model circuit representation of the Substituting the values of (5) and (6) in (4), we have (7),
grid side, we can see that R and L are the grid side equivalent V0Z0 D t I
Vc (t ) e sin(Zd t  E )  0 e D t sin(Zd t ) 
resistance and inductance of the line from the point where the Zd Zd C
fault has occurred in the system [4]. This is mainly the
representation of a two-level system, but for a multilevel where [Z0 D 2  Zd 2 ] and [ E arctan(Zd , D )]
converter station where the capacitance is broken down into
The cable current flowing during fault is discharged so
several smaller capacitance, the analysis will be completely
considering a negative sign during discharge. Differentiating
different. For a short circuit fault on a VSC-HVDC system the
(7) to calculate the cable current (8):
response is non-linear, and can be broken down into three
dVc  t  
parts and analyzed individually. IC C
dt
a) Capacitor Discharge Phase (Natural Response)
VZD I Z
During this phase the entire charge stored in the capacitor C Z0V0 eD t cos Zd t  E   0 0 eD t sin Zd  E   0 0 eD t sin Zd t  E 
bus is discharged into the DC link under the condition Zd Zd
R  2 L / C . The solution of the second order model gives V0 D t I 0Z0  at
I c (t ) e sin(Zd t )  e sin(Zd t  E ) 
rise to an oscillating system. The equivalent model during Zd L Zd
capacitor discharge is given in Figure 4(a). We assume that Considering the time taken by capacitor to discharge and its
the fault happens at time t0 with initial conditions voltage reaching zero at t2 and putting the values of Vc (t ) 0
vc (t0 ) V0 and icable (t0 ) I 0 . Thus, applying KVL in the in (9) we have,
circuit shown in Figure 4(a) we have: I (10),
0 V0Z0 e D t1 sin(Zd t1  E )  0 e D t1 sin(Zd t1 )
VR  VC  VL 0  C
Rewriting (10) as (11), i cable L

K sin(Zd t1  W ) 0  R I0
(a) + +
where , K a  b  2ab cos (Zd t1 ) , a
2 2
 I 0 and b V0Z0 C ic Vc
- C
V0
-

W arctan2  V0Z0 C sin E  / V0Z0 C cos E  I 0  

Thus, we have from (11)
R
sin Zd t1  W  sin nS
L

icable
 nS  W 
t1 (12) (b) + ic=0
Zd Vc
- C
t2 t0  t1 
Equation (14) is the total time taken by the capacitor voltage
to drop to zero, as can be seen from Figure 5(b); after this the L R
diode freewheeling stage starts.
icable
b) Diode Freewheeling Stage (After Vc 0 ) (c)
+
After the discharge of the capacitor into the DC link cable, Vc
C -
the IGBTs are turned off but the anti-parallel diodes
connected across it are forward biased the equivalent circuit
during this condition is shown in Figure 4(b), and the cable
inductance in the circuit drives the current across the circuit Figure 4: VSC short circuit phase. (a) Capacitor discharge phase, (b) Diode
using a freewheel path. The initial value of the cable current freewheeling, (c) Grid current feeding
*
is given as icable (t1 ) I cable . The current carried across the
circuit by the cable inductor is where
icable I 0*e  ( R / L )t and iD1 icable / 3 . This is the time when the A I g [(1  Zs 2 LC ) 2  ( RCZs ) 2 ]1/ 2
VSC network is at its worst, the current carried by the diodes B I gn [W 2 / (W 2  RCW  LC )]
is relatively high and thus fast acting circuit breakers are C1 ( A sin M  B) C 2 B / W  Zs A cos M
required to break the discharge of the fault current [4]. Figure
5(a) shows the diode currents after the capacitor voltage drops
to zero.
c) Grid Current Feeding Stage
After the DC link capacitor and the free-wheeling diodes
have fed current into the faulted line, the inductor also
contributes to the fault current making the dc link capacitor
and inductor to have a forced response in the form of a current-
source as shown in Figure 4(c). The grid side voltage vga in
the post fault condition is given as (14): (a)
vga Vg sin(Zs t  D ) (14)
The phase current iga is given as (15):
iga I g sin(Zs t  D  U )  I gn e  t /W (15)
where,
U arctan[Zs ( Lchoke  L) / R ],
W (L choke  L) / R
The total current from the inverter is considered to be
contributed from the freewheeling diodes as (16), (b)
iVSI iD1  iD 2  iD 3 
Figure 5: (a) Diode current feeding the fault current during the
icable A sin(Zs t  M )  Bet /W  [C1Z0 e\ t sin(Zd t  E )]/ Zd  [C2 e\ t sin(Zd t )]/ Zd (17) freewheeling stage; (b) Discharge of the capacitor voltage

dicable B. Line to Ground fault analysis

vc Ricable  L  This is the more frequent form of fault in a VSC-HVDC
dt system. The fault current circulated in the DC link is less
severe due to the absence of the diode freewheeling stage and
also because of the fact that the ground offers some fault
resistance. Faults occurring on the positive or negative end of
the line result in a change in direction of the current.
 the system. Figure 8(a) shows the capacitor voltage decreasing
a) Capacitor Discharge (Natural Response) but Vc z 0 .
This stage is similar to the capacitor discharge phase for a b) Grid Side Current Feeding
line-to-line fault with the exception that the fault occurs with A third order state space is used to define this stage,
a ground resistance. A single line diagram for a line to ground 0 1/ 2C 1/ 2C '
fault is shown in Figure 6. vc' vc 0
' 2/ L Rf  R / 2 ' (24)
icable  0 icable  0 vg a , b , c
R/ 2 L/2 i cable , iVSI L/2
i
Lchoke 1/ Lchoke 0
i
0 Lchoke
1/ Lchoke

iD3 iD2 iD1
L choke
Equation (24) is a theoretical representation of the system. The
diode current rises but there is an absence of the freewheeling
ic mode as seen in Figure 8(b).
+ i ga,b,c
Vc C
-
Rf

Figure 6: VSC HVDC with line to ground fault

The equivalent circuit representation during a line-to-ground

fault is shown in Figure 7. (a)

i cable L/2
R/2 I0
+ + Rf
ic Vc V0
- 2C -

Figure 7: Equivalent circuit during capacitor discharge phase

(b)
Under the condition,
Figure 8: Line to ground fault for VSC HVDC (a) Capacitor voltage
L discharge; (b) Diode current does not freewheel.
Rf  R ! 2
2 4C
From the given condition, III. PROTECTION SCHEME USING WAVELET ANALYSIS
Rf  R C / L !1 Protection of a multi-terminal HVDC system is a
2 challenge. VSC-HVDC is highly sensitive to overloads and
Applying KVL in the circuit we have (20), thus has to be protected. The rate of rise of current is very high
VC  2C R f  R  2 dt
dVC
 2 LC
d 2VC
dt 2

0 
owing to the lack of reactance in a DC system. Hybrid DC
breakers are currently employed to break the DC current. An
The solution of a second order differential equation in important aspect for the breaker operation is the detection of
underdamped condition is given by (20), the fault current. Current techniques employ use of (di/dt)
VC  t  A1es t  A 2 es t1 2
 change of load current to detect the fault. Although, this is an
Thus the solution for (20) at t 0 is given as (21), easier way for fault detection but presence of noise and can
lead to incorrect data samples. This technique can give rise to
VC  t0  A1  A2  false triggers due to the interconnection of a MT-HVDC
1 I 1 I0 system, thus a correct fault detection can be employed using
A1 s2V0  0 and A 2 s1V0  2C 
s2  s1 2C s1  s 2 wavelets.
The current attains a negative value since it is in discharge 1) Wavelet Transform
state in (23) as, The wavelet transform is similar to the Fourier transform,
except that the former only deals with periodic waveforms
IC 2C  A1s1es t  A 2s 2 es t 
1 2 
with a sine wave as its basic function which helps to do
R R  1 analysis only in frequency domain [5].
D  Z02  , s2 D  Z02  , D 2 and Z
f
Given s1 D  2
D  2

L
0
LC The problem associated with using Fourier transform in
Due to the presence of a fault resistance there is no transient analysis is that these are high frequency oscillatory
freewheeling stage of a diode and also the capacitor voltage waves which are aperiodic in nature, the Fourier transform
does not drop to zero due to the non-oscillatory response of assumes these signals to be of periodic nature.
Wavelet transform for a continuous signal M (t ) is given
in (25) as: breakers could not be utilized since DC current does not
1
f
t b have any natural zero crossing. It consists of mainly two
WT (a, b)
a
M (t ) g
a
dt  branches an auxiliary branch which comprises of IGBT
f
Where g (t ) is defined as the mother wavelet of
a, b and a, b R and a z 0 where || g || 1 and centered on the
function t=0. A family of waves from (25) can be generated
by scaling of g (t ) by b and translation of g (t ) by a .
Wavelet Transforms are generally of two types: Discrete
Wavelet Transform (DWT) and Continuous Wavelet
Transform (CWT). During fault application, CWT is
generally not utilized due to large computation time which is
not ideal for HVDC fault detection.
Discrete Wavelet Transform can be defined as:
1 q  na0p
switches connected in antiparallel direction for bi-
directional operation, this is connected in parallel to the
main breaker branch which has more number of IGBT
switches here is where the main breaking of the current
takes place.
Modes of Operation: Both the branches of the hybrid
breaker remain operational during normal condition. More
current flows through the auxiliary branch since it has
fewer number of IGBT switches, thus the conduction loss
is compared to the main breaker branch. When a fault
occurs of the system the auxiliary branch is first turned off
by turning off the IGBT gate pulses (Load Commutation
Switch). In series with the auxiliary branch an ultra-fast
DWT [p, q] x[n]g p  mechanical switch is connected which operates after all
a0p n a0
Equation (26) is a function of geometric progression series
1 1
1, , 2 .... giving the DWT a logarithmic frequency coverage
a a
which is not observed in case of a Stationary Wavelet
Transform (SWT).
Some common types of mother Wavelets are:
a) Haar Wavelet Transform
This is the simplest type of mother wavelet
demonstrating step function. The disadvantage with using
Haar Wavelet is that it is not continuous thus it cannot be
differentiated [8] although this helps in monitoring with
sudden transitions. The Haar function can be defined as (27),
1 0 d t  1/ 2
the energy in the auxiliary branch is zero and the fault
current flowing through auxiliary branch is transferred to
the main branch. At a threshold value the gate pulses of
the main branch is also turned off thereby disconnecting
the faulted line from the circuit. The excess energy from
the main branch is absorbed by the energy absorption
branch connected in parallel to the breaker which are metal
oxide varistors (MOV). This absorbs any excess energy
that is there in the circuit after the operation of the main
breaker. A detailed figure of the hybrid breaker is shown
in Figure 8. Due to such a design only a small cooling
(water cooled or forced air cooled) unit is required for the
auxiliary branch which is designed to carry the majority of
the load current [9].

M (t ) 1 1/ 2 d t  1 Load Commutation Switch

0 elsewhere

Ultra Fast Disconnector

Current Limiting Reactor

Main Breaker

b) Daubechies
Daubechies of first order (db1) is similar to the Haar
wavelet transform. This is a family of orthogonal wavelets [8]. Varistors
Figure 8: Hybrid DC breaker

IV. SIMULATION AND RESULTS

c) Coiflets
This is another variation of Daubechies wavelets [8].
2) Hybrid DC circuit breaker
Hybrid DC circuit breaker was designed by ABB [6] for
protecting the HVDC stations against DC fault currents
by operating semiconductor switches as AC circuit
A Multi-terminal VSC-HVDC system is designed as
shown in Figure 9. The system consists of two offshore
generating stations connected to two different utility grids
using a common DC link. The two stations are considered
to generate 60MW and 30MW of power which are
transmitted using the DC link at 50kV. A fault was created
at one of the DC line, both line-to-ground and line-to-line.
The system behavior and performance was noted. Due to
abrupt changes in the current in the DC line there were
changes observed in the wavelet transform high frequency
output of the current in the DC line. A threshold value was
set and the Hybrid Breaker was operated. Figure 10 shows
the flow of current through the branches of a circuit
breaker, the current in the main branch rises after the
auxiliary branch is turned off. Figure 11 shows the
detection of fault current using both conventional and
wavelet method. The operation of the hybrid breaker is
 faster while using wavelets for detecting a fault in the
circuit. Daubechies of order 2 was selected as the mother
wavelet for the simulation.
DC
DC
AC
Breaker
AC
DC DC
Figure 9: MT VSC-HVDC
Figure 10: Hybrid breaker operation
(a)
(b)
Figure 11: Fault current detected using (a) wavelets; (b) conventional
method
V. CONCLUSION
Fast and correct detection of the fault current was done
using DWT. The detection of fault current using wavelets is
much faster than the di / dt technique. The response of the
wavelets is faster while detecting a change in the DC current
during faults. It took 1 ms using the DWT while it takes 3.5
ms for breaker operation using conventional techniques. The
change in the wavelet high frequency output waveform sends
the message to the breaker relay, to trip the different sections
of the hybrid breaker at various threshold values and remove
the faulted line from the circuit. Although, due to high
sampling frequency of the wavelets, the output is time shifted,
still detection is faster and more robust. Selecting the lowest
number of coefficients of wavelets gives the best result.
Change in the DC current due to load changes do not force the
breaker to trip, thus maintaining transmission.
REFERENCES
[1] M. Alharbi Modeling of multi-terminal VSC-based HVDC
systems, Masters Thesis dissertation, Dept. of Electrical
Eng., Missouri University of Science and Technology, 2014.
[2] A. Purvins, H. Wilkening, G. Fulli, E. Tzimas, G Celli, S
AC grid 1
AC
Mocci, F Pilo, S Tedde, A European super grid for renewable
energy: local impacts and far-reaching challenges, Journal of
Cleaner Production, Vol. 19, NovDec 2011.
[3] D. V. Hertem, M. Ghandhari, Multi-terminal VSC HVDC for
the European super grid: Obstacles, Renewable and
Sustainable Energy Reviews, Vol. 14, Dec. 2010.
AC grid 2
AC
[4] J. Yang, J. E. Fletcher and J. O'Reilly, "Short-Circuit and
Ground Fault Analyses and Location in VSC-Based DC
Network Cables," in IEEE Transactions on Industrial
Electronics, vol. 59, no. 10, pp. 3827-3837, Oct. 2012.
[5] D. C. Robertson, O. I. Camps, J. S. Mayer and W. B. Gish,
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in IEEE Transactions on Power Delivery, Vol. 11, no. 2, pp.
1050-1058, Apr 1996.
[6] M. Callavik, A. Blomberg, J. Hfner and B. Jacobson, The
Hybrid HVDC Breaker An innovation breakthrough enabling
reliable HVDC grids, ABB Grid Systems, Technical paper
Nov. 2012
[7] A. Hassanpoor, J. Hfner and B. Jacobson, Technical
Assessment of Load Commutation Switch in Hybrid HVDC
Breaker, 2014 International Power Electronics Conference,
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[8] Users Guide on the use of PSCAD, Available:
http://pscad.com/products/pscad/
[9] N. Ray Chaudhuri, B. Chaudhuri, R. Majumder and A.
Yazdani, Modeling, Analysis, and Simulation of ACMTDC
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VI. BIOGRAPHIES
Bhaskar Mitra received his B.Tech degree (in Electrical Engineering from
West Bengal University of Technology) in 2013. He is currently a Ph.D.
student in the Electrical & Computer Engineering department of the
University of North Carolina at Charlotte. His research interests include
Protection and Control of Multi-terminal HVDC.
Badrul Chowdhury (StM83, M 87, SM 93) obtained his B.S degree from
Bangladesh University of Engineering & Technology in 1981, his M.S. and
Ph.D. degrees from Virginia Tech, Blacksburg, VA in 1983 and 1987
respectively, all in Electrical Engineering. He is currently a Professor in the
Electrical & Computer Engineering department of the University of North
Carolina at Charlotte. Prior to joining UNC-Charlotte, he was a Professor in
the Electrical & Computer Engineering department of the Missouri
University of Science and Technology, formerly known as the University of
Missouri-Rolla. Dr. Chowdhurys research interests are in power system
modeling, analysis and control, and renewable and distributed energy
resource modeling and integration in smart grids. He is a Senior Member of
the IEEE.
Madhav Manjrekar, Senior Member of IEEE, received his B.E. degree
from Government College of Engineering, Pune, India, and his M.Tech.
from Indian Institute of Science, Bangalore, India, M.S. from Montana State
University, Bozeman, Montana, and Ph.D. from University of Wisconsin,
Madison, Wisconsin, in 1993, 1995, 1997, and 1999 respectively. Currently
serving as an Associate Professor at the University of North Carolina in
Charlotte, Dr. Manjrekar has held various leadership and management
positions at Vestas, Siemens, Eaton and ABB prior to joining academia. He
holds 8 US and international patents, and has published over 40 journal and
conference papers. Dr. Manjrekars research interests are in applications of
power electronics in utility power systems and variable speed motor drives,
interfaces for renewable power generation and energy storage, smart grids,
and cyber vulnerability of electric infrastructure.