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# Mindanao State University

Sequential Logic

## May 29, 2017

Project 5:
Construct a clocked RS flip-flop with 4 NAND gates. Connect the S and R
input to two switches and the clock input to a pulser. Verify the characteristics
table of the flip-flop.

1. Given conditions:
a. When clock is absent (clk = 0), the output will remain in the same state.
b. When clock is present (clk = 1):
i. If S = 0, R = 1, the output at the end of the clock pulse is 0.
ii. If S = 1, R = 0, the output at the end of the clock pulse is 1.
iii. If S = 0, R = 0, the output at the end of the clock pulse is the same as
the output before the clock pulse.
iv. However, S = 1 and R = 1 is not allowed.

2. Truth table:
clk S R Q Q
0 X X Qprevious Qprevious
1 0 1 0 1
1 1 0 1 0
1 0 0 Qprevious Qprevious
1 1 1 undefined

3. Minimization solution:

a) Characteristic Table:
S R Q Q(t+1)
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 Indeterminate
1 1 1 Indeterminate

b) Characteristic Equation:
4. Logic diagram:

5. Circuit design:
Project 6:
Design, construct, and test a 4-bit binary counter.

1. Given conditions:
As the voltage source is being connected to the circuit, the 4 red LEDs will
light according to what binary number the output represents as the counting
progresses.
2. Truth table:
Input Q3 Q2 Q1 Q0
0 0 0 0 0
1 0 0 0 1
2 0 0 1 0
3 0 0 1 1
4 0 1 0 0
5 0 1 0 1
6 0 1 1 0
7 0 1 1 1
8 1 0 0 0
9 1 0 0 1
10 1 0 1 0
11 1 0 1 1
12 1 1 0 0
13 1 1 0 1
14 1 1 1 0
15 1 1 1 1
3. Minimization solution:
a) Counting process:

b) Timing Diagram

4. Logic diagram:
5. Circuit design: