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ACHIEVING HIGH-PERFORMANCE
CONNECTIVITY WITH A FULL-FEATURED,
POWER-EFFICIENT 28NM KINTEX-7 FPGA
Xilinx Connectivity Solutions With silicon processing power constantly increasing, connectivity often represents the
critical engineering challenge. Driving up overall system performance and throughput
Fast start up with out-of-box
calls for the ability to rapidly transition to higher-speed serial connections while
connectivity solution that combines
minimizing power, costs, and form factors. Xilinx connectivity platforms simplify and
silicon, design tools, and comprehensive
accelerate the development of best-in-class, high-speed serial designs. The
reference design
Kintex-7 FPGA Connectivity Kit gives developers the convenience of an out-of-box
System performance up to 20Gbps, development platform, complete with hardware, design tools, and reference design
powered by a high-performance that enable efficient implementations and faster system deployments. State-of-the-
multichannel DMA and utilizing a 64-bit art serial connectivity features enable 20Gbps system performance to unlock the
1600Mbps DDR3 controller power of the 7 series transceivers. The breadth of high-performance connectivity
Exceptional throughput with x8 Gen2
capabilities accelerates applications in wired and wireless communications,
PCI Express (PCIe) lanes and dual 10G
broadcast, industrial, storage, aerospace and defense, and other markets.
Ethernet links
K I NTE X-7 F PGA C O N N ECTIVITY TAR G ETE D R E F E R E N C E D ES I G N
High levels of integration in the targeted
reference design (TRD) which features
the main system building blocks of PCI XADC
IPIF User
AXI4-Lite Power
Express, Ethernet, AXI4 Interconnect SOFTWARE HARDWARE
Slave Registers Monitor
and memory AXI Lite Interconnect
Network AXI4 Master
Application AXI4-Lite
64-bit @ 156.25MHz
Robust offering including graphical user (ping, http) Packet
Channel-0
Buffer BASE-R
XGM I I
10G
XGEMAC GT
PCIe Integrated Endpoint Block x8 Gen2
512-bit @
200MHz
SI SI
source code, and support for high-speed
PCIe x8 GEN2 Link
D
Northwest D 64 x
protocols and interconnects TCP/IP G Software G Logic AXI AXI R 1600Mbps
Stack U Driver T Multi-channel Interconnect MI MIG 3 DDR3
I DMA for
PCIe I
Productivity enhancements: SI SI O
open standards, common design
AXI4-Lite
Packet Address
methodologies, development tools,
Channel-1
BASE-R
Buffer Filtering
XGM I I
10G
GT
Packet
and workflows that suit software and Network Buffer 64-bit @ 156.25MHz
XGEMAC
Application
hardware designers (ping, http)
7 SERIES FPGA KINTEX-7 FPGA CONNECTIVITY KIT
B OAR D F EATU R ES
Linear BPI
Flash Memory (128MB) Power Switch
USB JTAG
Interface
FPGA Prog
Status LEDs Push Button
10/100/1000 MHz
Ethernet PHY
User Push
Buttons
HDMI Output
Copyright 2012 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE and other designated brands included herein are
trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners.