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Faculty of Science

M.Sc. Physics (Third Semester) EXAMINATON


NOVEMBER/DECEMBER, 2012
Paper No. PHY-411(A1)
8086 Microprocessor and Interfacing
(Wednesday 05/12/2012)
Time:- 1:30 Hours Maximum marks:- 40
==================================================================
Please check whether you have got the right question paper.
N.B.:- (i) Question No. 1 is multiple choice objective type and it is compulsory.
It carries 10 marks.
(ii) Attempt any Three question from Q.2 to Q.6. Each of these question carries
10
marks.
(iii)Figure to the right indicate full marks.
==================================================================
PART-A
Que. 1 Write only answers in your answer book. (10 Marks)
1.In 8 bit division, quotient is stored in _______ register
a. AL c. AX
b. AH d. AX:DX

2. In 8085 microprocessor address bus is ______ bit long


a. 8 c. 16
b. 20 d. 32

3.In 8 bit multiplication, the multiplicand is always stored in _______ register


a. AL c. AX
b. BL d. BX

4. Which flag is / are updated during execution Movreg 1, reg 2 instruction?


a. All c. Only AF
b. Only CF d. None

5. In 8086 microprocessor data bus is ______ bit long


a. 8 c. 16
b. 20 d. 32

6. PUSH instruction performs one of the following actions


a. Transfer the data from c. Transfer the data from the
specified registers to the stack stack memory to specified
memory registers
b. Both a and b d. None of the above

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7.The SHL 1 Instruction results in one of the following
a. Multiplication by 2 c. Division by 4
b. Division by 2 d. None of the above

8. ENDP assembler directive could be used for one of the following purpose
a. To indicate the end of the c. To indicate the end of
programme procedure

b. To indicate the end of segment d. All of above

9.How many address line would be needed to interface 1 megabyte memory chip with
8086 microprocessor?
a. 8 c. 20
b. 16 d. 12

10. How many I/O devices could be interfaced in I/O mapped I/O scheme of
interfacing?
a. 225 c. 64 K
b. 256 d. 1 M

PART-B
Que. 2: (a) What are different addressing modes of 8086 Microprocessor? Explain any one
of the addressing mode with suitable example. (6)

(b)Draw a schematic diagram of bus interface unit of internal architecture of 8086


Microprocessor and explain its function. (4)

Que. 3 (a) How PUSH and POP instructions make of stack memory? Explain it with suitable
examples. (4)

(b) What will be the status/content of registers CX, BX and all flags (CF, AF, SF,
OF, ZF, PF)after execution ofADC CX,BX instruction? Assume that before
execution the content of CX is FFFFH ; BX is 0000H and CF is 1. (4)

(c)What will be the status/content of registers BX, CX and all flags (CF, AF, SF,
OF, ZF, PF)after execution of TEST BX,CX instruction? Assume that before
execution the content of bX is FFFFH ; CX is 0FFFH. (2)

Que. 4 (a) state the difference between jump and call instruction. Explain it with suitable
examples. (5)

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(b)Explain the following instruction with appropriate examples
1) LOOP ; 2) RET ;3) WAIT ; 4) HLT ; 5) NEG (5)

Que. 5 (a) Draw and explain the block diagram of 8255 PPI. (6)

(b)What is Command Register/Control Word Register? Explain 1 operation of 8255


PPL along with suitable schematic diagram. (4)

Que. 6 (a) What is address decoding? Why address decoding is necessary? Implement a
simple NAND gate decoder. (5)

(b)Implement dual 2 to 4 line decoder using 74LS139. Draw and explain its truth
Table (5)

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