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Internal Use Only

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PLASMA TV
SERVICE MANUAL
CHASSIS : PD02A

MODEL : 50PK950/950N/960
50PK950-ZA/50PK950N-ZA
50PK960-ZA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL62861603(1003-REV00) Printed in Korea


CONTENTS

CONTENTS ............................................................................................................................... 2

SAFETY PRECAUTIONS ...........................................................................................................3

SPECIFICATION.........................................................................................................................4

ADJUSTMENT INSTRUCTION ..................................................................................................6

BLOCK DIAGRAM ...................................................................................................................10

EXPLODED VIEW ................................................................................................................... 11

SVC. SHEET ................................................................................................................................

Copyright 2010 LG Electronics Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS

IMPORTANT SAFETY NOTICE


Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in
the Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to
prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance Leakage Current Hot Check (See below Figure)


Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the Do not use a line Isolation Transformer during this check.
servicing of a receiver whose chassis is not isolated from the AC Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
power line. Use a transformer of adequate power rating as this between a known good earth ground (Water Pipe, Conduit, etc.)
protects the technician from accidents resulting in personal injury and the exposed metallic parts.
from electrical shocks. Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
It will also protect the receiver and it's components from being Reverse plug the AC cord into the AC outlet and repeat AC
damaged by accidental shorts of the circuitry that may be voltage measurements for each exposed metallic part. Any
inadvertently introduced during the service operation. voltage measured must not exceed 0.75 volt RMS which is
corresponds to 0.5mA.
If any fuse (or Fusible Resistor) in this monitor is blown, replace it In case any measurement is out of the limits specified, there is
with the specified. possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
When replacing a high wattage resistor (Oxide Metal Film
Resistor, over 1W), keep the resistor 10mm away from PCB.

Keep wires away from high voltage or high temperature parts. Leakage Current Hot Check circuit

Due to high vacuum and large surface area of picture tube, AC Volt-meter
extreme care should be used in handling the Picture Tube.
Do not lift the Picture tube by it's Neck.

Good Earth Ground


such as WATER PIPE,
Leakage Current Cold Check(Antenna Cold Check) CONDUIT etc.
To Instrument's
With the instrument AC plug removed from AC source, connect 0.15uF
exposed
an electrical jumper across the two AC plug prongs. Place the METALLIC PARTS
AC switch in the on position, connect one lead of ohm-meter to
the AC plug prongs tied together and touch other ohm-meter
lead in turn to each exposed metallic parts such as antenna 1.5 Kohm/10W
terminals, phone jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1M and 5.2M.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Copyright 2010 LG Electronics Inc. All rights reserved. -3- LGE Internal Use Only
Only for training and service purposes
SPECIFICATIONS
NOTE : Specifications and others are subject to change without notice for improvement.

V Application Range
This spec is applied to PDP TV used PD02A Chassis.

Model Name Market Brand


Albania, Austria, Belgium, Bosnia, Bulgaria, Coratia, Czech, Denmark,
50PK950-ZA Estonia, Finland, France, Germany, Greece, Hungary, Ireland, Italy,
50PK950N-ZA Kazakhstan, Latvia, Lithuania, Luxembourg, Morocco, Netherlands, Norway, LG
50PK960-ZA Poland, Portugal, Romania, Russia, Serbia, Slovakia, Slovenia, Spain,
Sweden, Switzerland, Turkey, Ukraine, UK

V Specification
Each part is tested as below without special appointment.
(1) Temperature : 25 C 5 C (77 F 9 F), CST : 40 5
(2) Relative Humidity: 65 % 10 %
(3) Power Voltage: Standard Input voltage (100 V - 240 V ~, 50 / 60 Hz)
* Standard Voltage of each product is marked by models.
(4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with
SBOM.
(5) The receiver must be operated for about 20 minutes prior to the adjustment.

V Test Method
(1) Performance : LGE TV test method followed.
(2) Demanded other specification
Safety : CE, IEC specification
EMC : CE, IEC

Model Name Market Brand


Albania, Austria, Belgium, Bosnia, Bulgaria, Coratia, Czech, Denmark, Safety : IEC/EN60065
50PK950-ZA Estonia, Finland, France, Germany, Greece, Hungary, Ireland, Italy, EMI : EN55013
50PK950N-ZA Kazakhstan, Latvia, Lithuania, Luxembourg, Morocco, Netherlands, EMS : EN55020LG
50PK960-ZA Norway, Poland, Portugal, Romania, Russia, Serbia, Slovakia,
Slovenia, Spain, Sweden, Switzerland, Turkey, Ukraine, UK

V Module Specification
(1) 50 FHD

No Item Specification Remark


1 Display Screen Device 127 cm (50 inch) wide Color Display Module PDP
2 Aspect Ratio 16:9
3 PDP Module PDP50R1####,
RGB Closed (Well) Type, Glass Filter (38%)
Pixel Format: 1920 horiz. By 1080 ver
4 Operating Environment 1) Temp. : 0 deg ~ 40 deg
2) Humidity : 20 % ~ 80%
5 Storage Environment 3) Temp. : -20 deg ~ 60 deg LGE SPEC
4) Humidity : 10 % ~ 90 %
6 Input Voltage AC 100 V ~ 240 V, 50 / 60 Hz Maker LG

Copyright 2010 LG Electronics Inc. All rights reserved. -4- LGE Internal Use Only
Only for training and service purposes
V Model General Specification

No Item Specification Remarks


1 Market Albania, Austria, Belgium, Bosnia, Bulgaria, Coratia, 36 Country
Czech, Denmark, Estonia, Finland, France, Germany,
Greece, Hungary, Ireland, Italy, Kazakhstan, Latvia,
Lithuania, Luxembourg, Morocco, Netherlands, Norway,
Poland, Portugal, Romania, Russia, Serbia, Slovenia,
Spain, Sweden, Slovakia, Switzerland, Turkey, Ukraine,
UK
2 Broadcasting system 1) PAL/SECAM BG EU (PAL Market)
2) PAL/SECAM DK
3) PAL /
4) SECAM L/L
5) DVB T
6) DVB C DVB C (only Sweden, Finland)
3 Receiving system Analog : Upper Heterodyne
Digital : COFDM
4 Scart Jack (1EA) PAL, SECAM Scart 1 Jack is Full scart and support
RF-OUT(Analog), MNT-OUT
5 Video Input (1EA) PAL, SECAM, NTSC Side AV
6 Component Input (1EA) Y/Cb/Cr, Y/ Pb/Pr
7 RGB Input RGB-PC Analog (D-Sub 15Pin)
8 HDMI Input (4EA) HDMI-PC HDMI/DTV,HDMI2, HDMI3, HDMI4
HDMI-DTV
9 Audio Input (3 EA) RGB/DVI Audio, Component, AV L/R Input
10 SPDIF Out(1 EA) SPDIF Out
11 USB(2EA) For SVC, S/W Download, X-Studio, DivX
12 Bluetooth Bluetooth Phone(JPEG, MP3), Profile : A2DP, BIP, FTP, GAVDP,
Bluetooth Headset(mono, stereo) HSP, OPP
13 Ethernet LAN

Copyright 2010 LG Electronics Inc. All rights reserved. -5- LGE Internal Use Only
Only for training and service purposes
ADJUSTMENT INSTRUCTION

1. Application Range * Each Chassis has it own MAC Address. Please be careful of
download.
This spec sheet is applied to all of the PD02A chassis.

2. Specification
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 C 5 C of temperature and 65 % 10 % of relative
humidity if there is no specific designation.
(4) The input voltage of the receiver must keep 100 V ~ 240
V, 50 / 60 Hz.
(5) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15 C
- In case of keeping module is in the circumstance of 0 C,
it should be placed in the circumstance of above 15 C
for 2 hours
- In case of keeping module is in the circumstance of below
-20 C, it should be placed in the circumstance of above 3-2. Ping TEST
15 C for 3 hours,. * This test is to check Network operation.
(1) Press "Power on" button of a service R/C.(Baud rate :
O After RGB Full White in HEAT-RUN Mode, the receiver 115200 bps)
must be operated prior to the adjustment. (2) Connect RS232-C Signal Cable.
O Enter into HEAT-RUN MODE (3) Connect LAN cable to MAIN PCB Assembly.
1) Press the POWER ON KEY on R/C for adjustment. (4) When network operates normally, you can see OK.
2) OSD display and screen display PATTERN MODE.
- Set is activated HEAT run without signal generator in this 3-3. ADC Adjustment
mode.
- Single color pattern ( WHITE ) of HEAT RUN MODE uses
O Auto-control adjustment protocol(RS-232C)
to check panel.
- Caution : If you turn on a still screen more than 20
minutes (Especially digital pattern, cross hatch pattern),
an after image may be occur in the black level part of the
screen.

3. PCB Assembly Adjustment Method


* Caution: Using power on button of the control R/C power on
TV.

3-1. MAC Address and CI+ Key.


* Connect TV SET and PC which download MAC Address
Writing program by RS232C-Cable
(1) Start MAC+CIKeyl.exeProgram and Click (3) Button to
connect TV and PC.
(2) Click (4) to download MAC Address.
(3) Click (5) to download CI+ Key.
(4) When download succeed, you can see OK on (6)

Copyright 2010 LG Electronics Inc. All rights reserved. -6- LGE Internal Use Only
Only for training and service purposes
(1) Adjustment of RGB 3-5. EDID(The Extended Display
1) Convert to PC in Input-source.
2) Signal equipment displays Identification Data) download
Output Voltage: 700 mVp-p (1) Press the ADJ KEY on R/C and enter EZ ADJUST.
Impress Resolution FHD (1920 x 1080 @ 60Hz) (2) Select 5.EDID D/L by using D / E (CH +/-) and press
Model : 225 in Pattern Generator ENTER(V).
Pattern : 65 in Pattern Generator (3) Select Start and press navigation key(G).
(MSPG-925 SERISE) (4) EDID download is executed automatically.
3) Adjust by commanding AUTO_COLOR_ADJUST (5) Press EXIT key on R/C

* Caution
- Never connect HDMI & D-sub Cable when the user
download EDID .
V Use the proper cables below for EDID Writing.

(2) COMPONENT input ADC


V Convert to Component in Input-source.
V Signal equipment displays
Impress Resolution 480i
MODEL : 209 in Pattern Generator(480i Mode)
PATTERN : 65 in Pattern Generator
(MSPG-925 SERISE)
Impress Resolution 1080i
MODEL: 225 in Pattern Generator(1080P Mode)
PATTERN: 65 in Pattern Generator
(MSPG-925 SERISE)

* Edid data and Model option download(RS232)

3-4. Insert Tool OPTION


(1) Press ADJ key on R/C to insert Tool OPTION
(2) On the Tool Option, Insert Tool Option by a number key
(3) Press the ENTER(V)
* EDID DATA
(4) Press ENTER(V) again. 1) analog RGB
(5) Select OK to Download by using F / G (VOL +/-) and
press G(VOL +)

* FOR EU

* FOR France

Copyright 2010 LG Electronics Inc. All rights reserved. -7- LGE Internal Use Only
Only for training and service purposes
2) HDMI 4-2. Download Serial number (RS-232C)
V Press Power on key of service R/C.
(Baud rate : 115200 bps)
V Connect RS232 Signal Cable to RS-232 Jack.
V Write Serial number by use RS-232.
V Must check the serial number at the Diagnostics of SET UP
menu.
(Refer to below 6.SET INFORMATION).

4-3. Adjustment of White Balance


Required Equipment
O Remote controller for adjustment
O Color Analyzer ( CS-1000, CA-100,100+,CA-210 or same
produc: CH 10 (PDP)
* Please adjust CA-210, CA-100+ by CS-1000 before
measuring
O Auto W/B adjustment instrument(only for Auto adjustment)
O 9 Pin D-Sub Jack(RS232C) is connected to the AUTO W/B
EQUIPMENT.
Vender ID
Before Adjust of White Balance, Please press POWER ONLY
key
Adjust Process will start by execute RS232C Command.
O Color temperature standards according to CSM and Module

OCS-1000/CA-100+/CA-210(CH 10)
White balance adjustment coordinates and color temperature.

3-6. Confirmation
(1) Press InStart Key on Factory SVC Remote Controller.
And MUST check ADC & EDID ADJ status is OK. * Manual W/B process (using adjusts Remote control)
Please Adjust in AV 1 MODE, Turn off Energy Saving Mode.
(1) Enter PICTURE RESET on Picture Mode, then turn off
Fresh Contrast and Fresh colour in Advanced Control
4. SET assembly adjustment method (2) After enter Service Mode by pushing ADJ key,
* Caution : Each PCB assembly must be checked by check JIG (3) Enter White Pattern off of service mode, and change off ->
set. (Because power PCB Assembly damages to PDP on.
Module, especially be careful) (4) Enter W/B ADJUST by pushing G key at 3. W/B
ADJUST.
4-1. POWER Supply Unit PCB Assy
Va/Vs Voltage Adjustment * Gain Max Value is 192. So, Never make any Gain Value over
Test equipment : D.M.M 1EA 192 and please fix one Value on 192, between R, G and B.
Connection Diagram for Measuring : refer to fig.4
Adjustment method
(1) Va adjustment
1) Connect + terminal of D.M.M. to Va pin of P811, connect
-terminal to GND pin of P811.
2) After turning VR502,voltage of D.M.M adjustment as
same as Va voltage which on label of panel right/top
(deviation; 0.5V)
(2) Vs adjustment
1) Connect + terminal of D.M.M. to Vs pin of P811, connect
-terminal to GND pin of P811.
2) After turning VR901, voltage of D.M.M adjustment as
same as Vs voltage which on label of panel right/top
(deviation ; 0.5V)

Copyright 2010 LG Electronics Inc. All rights reserved. -8- LGE Internal Use Only
Only for training and service purposes
* Auto-control interface and directions 5. Set Information
(1) Adjust in the place where the influx of light like floodlight
around is blocked. (Illumination is less than 10ux). (Serial No & Model name)
(2) Measure and adjust after sticking the Color Analyzer (CA-
100+, CA210 ) to the side of the module.
(3) Aging time
5-1. Check the serial number
After aging start, keep the Power on (no suspension of & Model Name
power supply) and heat-run over 5 minutes (1) Push the menu button and press red button on R/C to
enter Customer Supportmenu.
(2) Move to signal test menu. And check Serial No & Model
Name
4-4. Serial number download & Model Select the STATION -> Diagnostics -> To set
name D/L and Check Tool Option.
(1) Press "Power on" button of a service R/C.(Baud rate :
115200 bps)
(2) Connect RS232-C Signal Cable and start Option Check
Program Ver3.8 6. SW Download Guide.
(3) Scan serial Number and press F5 button. * Before put a *.epk to USB Stick make LG_DTV folder in USB.
(4) Check OK on program 1) program. Then, put *.epk file to LG_DTV folder and Turn on TV
(5) Press In start button on SVC R/C, check Serial Number (1) Put the USB Stick to the USB socket
and Model Name. (2) Automatically detecting update file in USB Stick
* If your downloaded program version in USB Stick is Low,
it didnt work.
But your downloaded version is High, USB data is
automatically detecting.
(3) Show the message Copying files from memory
(4) Updating is staring.
(5) Updating Completed, The TV will restart automatically.
After turn on TV, Please press IN-STOP button on ADJ
Remote-control.
* IF you dont have ADJ R/C, enter Factory Reset in
OPTION MENU.
(6) When TV turns on, check the Updated version on
Diagnostics MENU.

4-5. Checking the EYE-Q Operation.


(1) Press the EYE Key on the adjustment remote controller.
(2) Check the Sensor DATA ( It must be under 10) and keep
the data longer than 1.5s
3) Check OK

(Sensor DATA 0 ~ 4095, Power Saving Mode 0 ~ 12)


* IF you press IN-STAP Button, change Green Eye-check OSD.

4-6. Ping TEST


* This test is to check Network operation.
(1) Connect LAN cable from Computer to TV Set
(2) When network operates normally, you can see OK on
Computer

Copyright 2010 LG Electronics Inc. All rights reserved. -9- LGE Internal Use Only
Only for training and service purposes
BLOCK DIAGRAM

Copyright 2010 LG Electronics Inc. All rights reserved. - 10 - LGE Internal Use Only
Only for training and service purposes
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
400

900
601

604

910
520
208

602
209

206

590
200

205

501
580

201
240

204
207

203

A12
A7
202
302

LV1
120
304
301

A9
A22
303

530

A10
300

A2
540
305

570

Copyright 2010 LG Electronics Inc. All rights reserved. - 11 - LGE Internal Use Only
Only for training and service purposes
IC100
NAND FLASH MEMORY 4G BIT FOR BBTV Boot Strap LGE3556C (C0 VERSION)
D3.3V CI_A[0-13]
IC102-*1
TC58NVG2S3ETA00 NAND_IO[0] : Flash Select (1)
NC_1
1 48
NC_29 NAND_DATA[0-7] R46 0 : Boot From Serial Flash
IC102
NC_2

NC_3
2 47
NC_28

NC_27
2.7K CI_A[3] J23 N26 R145 22
NC_4
3

4
46

45
NC_26 1 : Boot From NAND Flash EBI_ADDR3 GPIO_00 USB1_OCD
D3.3V NAND04GW3B2DN6E NC_5

NC_6
5

6
44

43
I/O8

I/O7
CI_A[4] J24 L26 R81 22
RY/BY
7 42
I/O6

I/O5
NAND_DATA[0] READY R58 EBI_ADDR4 GPIO_01 DD
NAND_IO[1] : NAND Block 0 Write (0)
RE
8 41
CE

NC_7
9

10
40

39
NC_25

NC_24
R47 2.7K CI_A[2] H25 N25 R100 22
LCD : ERROR OUT(PANEL)
NC_8
11 38
NC_23

2.7K 0 : Enable Block 0 Write EBI_ADDR2 GPIO_02 DC


VCC_1

VSS_1
12

13
37

36
VCC_2

VSS_2

1 : Disable Block 0 Write CI_A[1] H24 L25


NC_1 NC_29 NC_9
14 35
NC_22

EBI_ADDR1 GPIO_03 MODEL_OPT_4


1 48
NC_10

CLE
15

16
34

33
NC_21

NC_20 NAND_DATA[1] READY R55 CI_A[0] H23 K27


ALE
17 32
I/O4

2.7K EBI_ADDR0 GPIO_04 MODEL_OPT_5


BCM REVIEW
WE I/O3

NC_2 NUMONYX_4G_NAND NC_28 WP

NC_11
18

19
31

30
I/O2

I/O1
R50 NAND_IO[3:2] : NAND ECC (1,0) CI_A[5] J25 K28
2 47 NC_12
20

21
29

28
NC_19
2.7K 00 : No ECC EBI_ADDR5 GPIO_05 SIDEAV_DET
NC_13

NC_14
22 27
NC_18

NC_17

01 : 1 ECC Bit CI_A[6] F26 K24 R120 22


NC_3 NC_27 NC_15
23

24
26

25
NC_16
NAND_DATA[2] READY R56 EBI_ADDR6 GPIO_06 CI_5V_CTL For CI
3 46 R48 2.7K 10 : 4 ECC Bit CI_A[8] H28 K26 0 R162
2.7K
2.7K

2.7K EBI_ADDR8 GPIO_07 HPD4


NC_4 NC_26 TOSHIBA_4G_NAND 11 : 8 ECC Bit CI_A[9] J26 K25 0 LCD : HDMI_HPD3
4 45 R160 READY FLMD0
NAND_DATA[3] EBI_ADDR9 GPIO_08 LCD : MICOM_DOWNLOAD(FLMD0)
READY R59 CI_A[13] H27 AA27 0 R159
NC_5 I/O7 NAND_DATA[7] 2.7K NAND_IO[4] : CPU Endian (0) EBI_ADDR13 GPIO_09 HPD3
5 44 R41 +3.3V_MULTI G26 AA28 LCD : PWM_DIM
0 : Little Endian CI_A[12]
2.7K EBI_ADDR12 GPIO_10 USB2_OCD
NC_6 I/O6 NAND_DATA[6] 1 : Big Endian CI_A[11] J27 AA26 LCD : HDMI_HPD2
6 43 NAND_DATA[4] READY R60 EBI_ADDR11 GPIO_11 MODEL_OPT_1
R4
R5

2.7K NAND_IO[6:5] : Xtal Bias Control (1,0) CI_A[10] J28 L1


Open Drain RB 7 42
I/O5 NAND_DATA[5] R42
2.7K
R82
F27
EBI_ADDR10 GPIO_12
L3
DSUB_DET
NAND_RB 00 : 1.2mA CI_A[7] 0 R140
2.7K EBI_ADDR7 GPIO_13 BT_RESET
R I/O4 NAND_DATA[4] NAND_DATA[5] READY R57 01 : 1.8mA 22 R92 G24 L2 100 R150 READY
NAND_RE 8 41 R43 2.7K 10 : 2.4mA (Recommand) /CI_WAIT EBI_TAB GPIO_14 /RST_HUB
2.7K 22 R93 H26 Y25
E NC_25 D3.3V 11 : 3.0mA EBI_WE EBI_WE1B GPIO_15 BCM_RX
9 40 R96 G27 Y26
NAND_CE NAND_DATA[6] READY R61
NAND_IO[7] : MIPS Frequency (0) 33 EBI_CLK_IN GPIO_16 BCM_TX
NC_7 NC_24 2.7K G28 M27
10 39 C104 R44 0 : 405MHz EBI_CLK_OUT GPIO_17 SC_RE1
10uF 6.3V 2.7K 22 R94 K23 AA25
0.1uF

NC_8 NC_23 1 : 378MHz EBI_RW SC_RE2


C101

NAND_DATA[7] R62 EBI_RWB GPIO_18


11 38 READY 22 G25 R25 R118 22
2.7K EBI_CS EBI_CS0B GPIO_19 CI_MOD_RESET
VDD_1 VDD_2 R45 NAND_ALE : I2C Level (0) R95 N28
12 37 2.7K 0 : 3.3V Switching GPIO_20 MODEL_OPT_0
READY R63 1 : 5V Switching N27 R121 READY
22
VSS_1 VSS_2 0.1uF C105 NAND_DATA[0-7] GPIO_21 LCD : BT_MUTE
13 36 NAND_ALE 2.7K NAND_DATA[0] U24 AH18 R114 22
NAND_CLE D3.3V NAND_DATA0 GPIO_22 AUD_MASTER_CLK
NC_9 NC_22 R49 NAND_DATA[1] T26 P23 0 R129 IR_INT
14 35 2.7K 0 : Enable D2CDIFF AC (Dns) NAND_DATA1 GPIO_23 HPD1 LCD : HDMI_HPD1
NAND_CLE 1 : Disable D2CDIFF AC NAND_DATA[2] T27 M23 01/16W R161 LCD : A_DIM
NC_10 NC_21 NAND_DATA2 GPIO_24 5V_HDMI_2

2.7K
2.7K
15 34 NAND_DATA[3] U26 AD19 0 5% R22
NAND_DATA3 GPIO_25 HPD2
CL NC_20 NAND_DATA[4] U27 AE19 LCD : HDMI_HPD0
16 33 NAND_DATA4 GPIO_26 USB1_CTL LCD : HDMI_POWER0
NAND_CLE NAND_DATA[5] V26 M4 R137 100
AL I/O3 NAND_DATA[3] NAND_DATA5 GPIO_27 EPHY_ACTIVE_Y
NAND_ALE 17 32 NAND_DATA[6] V27 M5 R138 100
NAND_DATA6 GPIO_28 EPHY_LINK

R78
R80
W I/O2 NAND_DATA[2] NAND_DATA[7] V28 L23 R119 22
18 31 NAND_DATA7 GPIO_29 /CI_CD1 For CI
NAND_WE MODEL OPTION NAND_CE T24 Y28
WP I/O1 NAND_DATA[1] D3.3V NAND_CS0B GPIO_30 M_REMOTE_MOD_ROM_TX
D3.3V 19 30 R23 Y27
NAND_ALE M_REMOTE_MOD_ROM_RX
NAND_ALE GPIO_31
NC_11 I/O0 NAND_DATA[0] NAND_RE T23 G2 R122 100
20 29 NAND_REB GPIO_32 VREG_CTR
10K

T25 G3 100
R8

NAND_CLE R123
NC_12 NC_19 NAND_CLE GPIO_33 TUNER_RESET

1K

1K

1K

1K
1K

1K
21 28 NAND_WE R24 G5 R124 100
NAND_WEB GPIO_34 DTV_ATV_SELECT
NC_13 NC_18 U25 G6 0

READY

READY

READY
R125

READY
22 27 NAND_RB 5V_HDMI_1

FHD
NAND_RBB GPIO_35 LCD : HDMI_POWER1

EU
G4

R64

R66

R68

R70
R51

R53
NC_14 NC_17 GPIO_36 RF_RESET LCD : AV_CVBS_DET
C 23 26 L24 R143 0
NAND_DATA[0-7] GPIO_37 CI_OUTCLK
B Q100 NC_15 NC_16 W24 P25 1/16W
FLASH_WP 24 25 SF_MISO GPIO_38 /CI_CD2
KRC103S R37 100 U23 L5 R127 5%22
R76 MODEL_OPT_0 SF_MOSI GPIO_39 /CI_IREQ
0 IF_AGC_SEL V23 K4 R128 22 For CI
E R38 100
MODEL_OPT_1 SF_SCK GPIO_40 /CI_SEL
R39 100 V24 K1
MODEL_OPT_2 SF_CSB GPIO_41 MODEL_OPT_3
R40 100 L27
BT_ON/OFF MODEL_OPT_3 GPIO_42 WIRELESS_DL_RX
M26
MODEL_OPT_4 GPIO_43 WIRELESS_DL_TX
N23 R131 22
GPIO_44 FE_TS_VAL_ERR
MODEL_OPT_5 R28 R2 0
GPIO_45 5V_HDMI_3 LCD : HDMI_POWER2
R27 R144 1/16W 0
+3.3V_MULTI GPIO_46 5V_HDMI_4 LCD : HDMI_POWER3
SYSTEM EEPROM R26 5%22
R132 1/16W
MODEL_OPT_2
1K

1K

1K

1K
GPIO_47
1K

1K

R20 0 P28 5%
FLASH_WP GPIO_48 SCART1_DET
R3 4.7K READY
READY

READY
P27 R133 READY 0
READY

READY

GPIO_49
HD

EU
IC106 D3.3V
K6 R134 READY 0 FLASH_WP LCD : FRC_RESET
R65

R67

R69

R71
GPIO_50
R52

R54

M24M01-HRMN6TP R21 10K K5


GPIO_51 DDC_SCL
P26
R83 1.2K GPIO_52 DDC_SDA
NC VCC SCL0_3.3V M3 0
1 8 READY R135
C102 R84 1.2K GPIO_53
R178 SDA0_3.3V M2 R90 0
0.1uF 0 GPIO_54
E1 WP M1 READY
2 7 SCL3_3.3V COMP_DET
R85 1.2K READY GPIO_55
R12 SCL2_3.3V L4
GPIO_56 RF_BOOSTER
0 E2 SCL
R18 22 R86 1.2K READY L6
3 6 SCL0_3.3V SDA2_3.3V USB2_CTL
GPIO_57 LCD_HP_DET
READY
IC106-*1
MODEL OPTION W27
AT24C1024BN-SH-T
PDP CHASSIS OPTION R87 1.2K SGPIO_00 SCL0_3.3V
VSS
4 A8h 5
SDA
R19 22 SDA0_3.3V
NC
1 8
VCC
SCL3_3.3V
SGPIO_01
W28
SDA0_3.3V
A1
2 7
WP
PIN NAME PIN NO. HIGH LOW R88 1.2K W26 R14 0
BRAZIL EURO AUSTRALIA SDA3_3.3V 0 SCL1_3.3V
READY A2
3 6
SCL
SGPIO_02 R1
R177 GND SDA W25 R15 0
0
4 5

MODEL_OPT_0 SGPIO_03 R6 0 SDA1_3.3V


G19 FRC NO FRC J2 R16 0
STM_1M_EEPROM SDA3_3.3V MODEL_OPT_1 0 1 SCL2_3.3V
1 SGPIO_04 R7 0
ATMEL_1M_EEPROM J1 R17 0
MODEL_OPT_1 C5 BRAZIL&AUS EURO SGPIO_05 R13 0 SDA2_3.3V
* I2C MAP K3
1 1 SGPIO_06 SCL3_3.3V
MODEL_OPT_5 0 K2
MODEL_OPT_2 F7 NOT USE * I2C_1 : TUNER(MOPLL), NVRAM SGPIO_07 SDA3_3.3V
RESET READY
MODEL_OPT_3 B6 FHD HD * I2C_2 : NEC_SUBMICOM, (USB_HUB) READY
READY
* I2C_3 : HDMISW, TUNER_DIGITAL/ANALOG, AMP, WIRELESS READY
MODEL_OPT_4 E18 XGA WXGA
* I2C_4 : MODULE
MODEL_OPT_5 D18 EUROL&AUS BRAZIL

SW102
FOR DEBUG

SKHMPWE010 FLMD0
1

009:E3;009:F1
+3.3V_MULTI SOC_RESET
NEC SUB MICOM
5

R89 0
WATCH_DOG_RESET 5%

JTP-1127WEM
+3.3V_NEC_ST
2

4
READY 1/10W
10K
R9

SW100
100K

FOR DEBUG
R165
R136

10K
RTC_TXC RTC_TXC

3
ISP Port for SUB MICOM 50V 50V
SOC_RESET 50V 50V
12pF 12pF 22pF 27pF
+3.3V_NEC_ST C108 C111 C112 C113
NEC CONFIGURATION

WIRELESS_DETECT
WIRELESS_PWR_EN
C103 RTC_TXC RESET_NEC 009:E3;009:F1
0.1uF X100
16V P102 10MHz RTC_KSD RTC_KSD
12505WS-12A00 C1
+3.3V_NEC_ST R26 READY 10K 32.768KHz X101-*1 C112-*1
NEC_ISP_TXD 0.1uF
X101 32.768KHz 15pF
FOR DEBUG 50V
1
READY R10 RTC_KSD
R23 10K
NEC_ISP_RXD 2 4.7M C113-*1
RESET_NEC 1/16W
15pF
1%

P122/X2/EXCLK/OCD0B
NEC_ISP_TXD 3
+3.3V_NEC_ST READY
KEY1
R176 120K

P120/INTP0/EXLVI
4

1/16W
P124/XT2/EXCLKS

R166
R24 READY 10K

100K
1%
OCD1A

P121/X1/OCD0A
5
NEC_ISP_RXD
C110
FOR DEBUG 6
0.1uF
10K

P123/XT1
R25 READY10K OCD1A 7
OCD1B

READY
R11 EDID_WP

FLMD0

RESET
8
10K R104

0.1uF
C109

REGC
VDD
VSS

P40
P41
R101 10K C
9
OCD1B B Q101
2SC3052
10
E

48
47
46
45
44
43
42
41
40
39
38
37
FOR DEBUG 11
FLMD0 R105 22 P60/SCL0 1 36 P140/PCL/INTP6
10K SCL1_3.3V RL_ON
12 R106 22 P61/SDA0 2 35 P00/TI000 R172 0
SDA1_3.3V SCART1_MUTE
MICOM MODEL OPTION +3.3V_NEC_ST R91 13 R109 10K P62/EXSCL0
3 34 P01/TI010/TO001/16W
R99 0
FLMD0
R110 10K P63 4 33 P130 R170 5% 1/16W
10K
R111 0 P33/TI51/TO51/INTP4
5 32 P20/ANI0 IC105 5%
10K

10K

10K

10K

LED_WHITE SUB_SCL
CHECK PIN!! P75 UPD78F0513AGA-GAM-AX ANI1/P21
LED_PK70

LED_PK90

5V_ON 6 31
SUB_SDA
READY

READY

P74 7 30 ANI2/P22 +3.3V_MULTI


MODEL1_OPT_3 MODEL1_OPT_2
R29

R31

R33

R35

P73/KR3 8 29 ANI3/P23
MODEL1_OPT_0 INSTANT_BOOT
R102 0 P72/KR2 9 28 ANI4/P24
SOC_RESET
P71/KR1 10 27 ANI5/P25R174 10K
R27 100 FLASH_WP
AMP_RESET_N MODEL1_OPT_0 P70/KR0 ANI6/P26R168 22
R28 100 MODEL1_OPT_1 11 26 KEY2
DISP_EN MODEL1_OPT_1 P32/INTP3/OCD1B ANI7/P27R169 22
R181 0 OCD1B 12 25 KEY1
ERROR_DET MODEL1_OPT_2 0
R108

13
14
15
16
17
18
19
20
21
P10/SCK10/TXD022
23
24
R77 0
LED_PK50/LED_PK90

LED_PK50/LED_PK70

REMOTE_SW_CTRL MODEL1_OPT_3
UART BYPASS(WIRED OR)
10K

10K

10K

10K

P31/INTP2/OCD1A
P30/INTP1
P17/TI50/TO50
P16/TOH1/INTP5
P15/TOH0
22P14/RXD6
22P13/TXD6
P12/SO10
P11/SL10/RXD0

AVREF
AVSS
+3.3V_NEC_ST

NEC_EEPROM_SCL
NEC_EEPROM_SDA
+3.3V_NEC_ST
READY

READY

IC104
MODEL PWM OPTION
R30

R32

R34

R36

M24C16-WMN6T
R73 22 R75 0

0
1/16W
BCM_RX RS232C_RXD **PK50 : LED_RED 0IMMRSG036B
C114
1/10W

NC/E0 VCC
PK70 : LED_RED/LED_BLUE 1 NC VCC 8
C107 0.1uF
R79

5%
16V
47K

NEC_RXD PK90 : LED_RED/LED_BLUE/LED_BREADING 0.1uF


5%

R146
NC/E1 WC 16V

R142
2 E1 WC 7

R113
PIN NAME PIN NO. HIGH LOW NC/E2 SCL
3 E2 SCL 6
NEC_EEPROM_SCL 4.7K R163
READY
R97 22
VSS SDA 4.7K
MODEL_OPT_0 8 PK90 PK50/PK70 4 GND SDA 5 R164
READY

HDMI_CEC
LED_BREATHING
R98 22 NEC_EEPROM_SDA

IR_NEC

AC_DET
NEC_ISP_TXD
OCD1A

NEC_ISP_RXD
LED_RED
STM_16K_EEPROM

R72 22 R74 0 MODEL_OPT_1 11 NOT USE


BCM_TX RS232C_TXD IC104-*1
AT24C16BN-SH-B

NEC_RXD
NEC_TXD
MODEL_OPT_2 30 NOT USE NC_1
1 8
VCC

NEC_TXD NC_2
2 7
WP

NC_3 SCL
3 6

MODEL_OPT_3 31 PK70 PK50/PK90


GND
4 5
SDA

ATMEL_16K_EEPROM

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM GPIO & NEC MICOM & FLASH & SYS EEPROM 10/01/
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. BCM GPIO/NEC MICOM/FLASH/SYS EEPROM 1 13

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes LGE Internal Use Only
IC100
LGE3556C (C0 VERSION) CASE 1 : R = 0 ohm --> CL = 8 pF
EJTAG D3.3V
54MHz X-TAL CASE 2 : R = 22 Ohm --> CL = 22pF

D23 B4
FE_TS_DATA_CLK PKT0_CLK LVDS_TX_0_DATA0_P LVDS_TX_0_DATA0_P C263
C24 A4 22
FE_TS_SERIAL LVDS_TX_0_DATA0_N 12pF
PKT0_DATA LVDS_TX_0_DATA0_N R249
B26 C6
FE_TS_SYNC PKT0_SYNC LVDS_TX_0_DATA1_P LVDS_TX_0_DATA1_P
A25 B6

1K
1K
1K

1K

1K
RMX0_CLK LVDS_TX_0_DATA1_N LVDS_TX_0_DATA1_N

READY
B25 B3

1008LS-272XJLC 33pF
RMX0_DATA LVDS_TX_0_DATA2_P LVDS_TX_0_DATA2_P

C262
A26 A3

READY
RMX0_SYNC LVDS_TX_0_DATA2_N LVDS_TX_0_DATA2_N
A1
LVDS_TX_0_DATA3_P LVDS_TX_0_DATA3_P

R275
R276
R277

R278

R279
A2

2
LVDS_TX_0_DATA3_N LVDS_TX_0_DATA3_N

54MHz
X200
CI_OUTCLK,CI_OUTDATA[0-7],CI_OUTSTART,CI_OUTVALID CI_A[14] G23 D5

3
LVDS_TX_0_DATA4_P

L209
POD2CHIP_MCLKI LVDS_TX_0_DATA4_P 54MHz_XTAL_N
CI_OUTDATA[0] D25 D6 002:D4 /JTAG_TRST
POD2CHIP_MDI0 LVDS_TX_0_DATA4_N LVDS_TX_0_DATA4_N
CI_OUTDATA[1] D24 C5

1
LVDS_TX_0_CLK_P 002:D4 JTAG_TDI 54MHz_XTAL_P
POD2CHIP_MDI1 LVDS_TX_0_CLK_P
CI_OUTDATA[2] C25 B5 002:D4 JTAG_TDO
POD2CHIP_MDI2 LVDS_TX_0_CLK_N LVDS_TX_0_CLK_N
CI_OUTDATA[3] E27 B1 002:D4 JTAG_TMS

R247
POD2CHIP_MDI3 LVDS_TX_1_DATA0_P LVDS_TX_1_DATA0_P

604
CI_OUTDATA[4] E26 B2 002:D4 JTAG_TCLK
POD2CHIP_MDI4 LVDS_TX_1_DATA0_N LVDS_TX_1_DATA0_N
CI_OUTDATA[5] D28 C2
POD2CHIP_MDI5 LVDS_TX_1_DATA1_P LVDS_TX_1_DATA1_P
CI_OUTDATA[6] D27 C3
POD2CHIP_MDI6 LVDS_TX_1_DATA1_N LVDS_TX_1_DATA1_N
CI_OUTDATA[7] D26 D1
POD2CHIP_MDI7 LVDS_TX_1_DATA2_P LVDS_TX_1_DATA2_P

1K
CI_OUTSTART E23 D2 22
POD2CHIP_MISTRT LVDS_TX_1_DATA2_N LVDS_TX_1_DATA2_N R248 12pF
CI_OUTVALID E24 E1 C264

R281
POD2CHIP_MIVAL LVDS_TX_1_DATA3_P LVDS_TX_1_DATA3_P
F25 E2
CHIP2POD_MCLKO LVDS_TX_1_DATA3_N LVDS_TX_1_DATA3_N
C27 E3
CHIP2POD_MDO0 LVDS_TX_1_DATA4_P LVDS_TX_1_DATA4_P
C26 E4
CHIP2POD_MDO1 LVDS_TX_1_DATA4_N LVDS_TX_1_DATA4_N
B28 D3 A1.2V A2.5V
CHIP2POD_MDO2 LVDS_TX_1_CLK_P LVDS_TX_1_CLK_P
B27 D4
CHIP2POD_MDO3 LVDS_TX_1_CLK_N LVDS_TX_1_CLK_N
A27 F5 C246 READY
CHIP2POD_MDO4 LVDS_PLL_VREG 10uF
F24 F1
CHIP2POD_MDO5 LVDS_TX_AVDDC1P2
BLM18PG121SN1D

BLM18PG121SN1D

F23 F4
A3.3V A1.2V A2.5V E25
C28
CHIP2POD_MDO6
CHIP2POD_MDO7
LVDS_TX_AVDD2P5_1
LVDS_TX_AVDD2P5_2
F2
C1
LVDS +3.3V_MULTI

CHIP2POD_MOSTRT LVDS_TX_AVSS_1
A28 F3
CHIP2POD_MOVAL

0.1uF

0.1uF

0.1uF
LVDS_TX_AVSS_2

4.7uF

4.7uF
L210

L211

C4

C252

C254

C257

C258

C260
L202 LVDS_TX_AVSS_3
A5
BLM18PG121SN1D LVDS_TX_AVSS_4
AC18 E5
VDAC_AVDD2P5 LVDS_TX_AVSS_5
AF20 E6 +3.3V_MULTI

R230
4.7K

R232
4.7K
VDAC_AVDD1P2 LVDS_TX_AVSS_6
AG20 D7
VDAC_AVDD3P3_1 LVDS_TX_AVSS_7 52
+3.3V_MULTI
4.7uF

AG21 E7
0.1uF

0.1uF

0.1uF

VDAC_AVDD3P3_2 LVDS_TX_AVSS_8
C236

C241

C243
C231

F7 51
LVDS_TX_AVSS_9
G7
LVDS_TX_AVSS_10 50 PC_SER_CLK
AF19 H7 A2.5V
BROAD BAND STUDIO

READY

READY
VDAC_AVSS_1 LVDS_TX_AVSS_11

READY
R265
4.7K

R267
4.7K
AD20 49 PC_SER_DATA

R266
VDAC_AVSS_2 A1.2V
+3.3V_MULTI R220 : BCM recommened resistor 562 ohmAE20

READY
48

READY
FOR DEBUG VDAC_AVSS_3 MDL_SCL

0
READY
R238 560AH22

R260
4.7K

R262
4.7K
AD27

R261
P200 VDAC_RBIAS CLK54_AVDD1P2 FHD 100 R253

G
C237
75

READY75

DTV/MNT_V_OUT AH20 AD28 47


R231

R233

TJC2508-4A 0.1uF VDAC_1 CLK54_AVDD2P5 DISP_EN READY READY

0
AG19 AD26 R264 R271
VDAC_2 CLK54_AVSS 46 MDL_SDA

G
C233 AC26 22 005:B6 SDA3_3.3V MDL_SDA 002:G4

D
0.01uF CLK54_XTAL_N 54MHz_XTAL_N 008:I1 R255 READY 22 22
AH21 AC27 45
4.7uF

R258 Q201
R208
1.5K

54MHz_XTAL_P 27K
R226
1.5K

VDAC_VREG 008:I2
0.1uF

CLK54_XTAL_P
0.1uF

1
C200

AE25 FHD 005:B6 SCL3_3.3V MDL_SCL 002:G4 2N7002(F)


C253

D
R263
C256

CLK54_MONITOR 44 READY
Y23 22
R229 0 Q200 READY
PM_OVERRIDE
2 READY M25 43 2N7002(F)
BSC_S_SCL READY
M24
BSC_S_SDA 42 22 R283
AA23 22 R284
A1.2V
3 VCXO_AGND_1
AB24 41
VCXO_AGND_2
R6 AC24 L206
USB_AVSS_1 VCXO_AGND_3 BLM18PG121SN1D 40 LVDS_TX_1_DATA4_N
4 T6 AF25
A3.3V USB_AVSS_2 VCXO_AVDD1P2
R7 AF24 C247 C250 39 LVDS_TX_1_DATA4_P
A1.2V USB_AVSS_3 VCXO_PLL_AUDIO_TESTOUT 0.1uF 4.7uF
A2.5V T7
USB_AVSS_4 38 LVDS_TX_1_DATA3_N
T8 +3.3V_MULTI
USB_AVSS_5 D3.3V
R3 P24 WATCH_DOG_RESET 37 LVDS_TX_1_DATA3_P
USB_AVDD1P2 RESET_OUTB 007:B7 +3.3V_MULTI
U3 F6 SOC_RESET
USB_AVDD1P2PLL RESETB 007:B7 36 LVDS_TX_1_DATA2_N
L201 T4 N24 4.7K
BLM18PG121SN1D USB_AVDD2P5 NMIB
T3 J5 R240 35 LVDS_TX_1_DATA2_P
USB_AVDD2P5REF TMODE_0
R4 J4 A2.5V

READY

READY
USB_AVDD3P3 TMODE_1 34

READY
R273
4.7K

R287
4.7K
U4 J6 L205

R286
USB_RREF TMODE_2 BLM18PG121SN1D
V1 J3 33
0.1uF
0.1uF
0.1uF

4.7uF
0.1uF

LVDS_TX_1_CLK_N

READY

READY

0
USB_DM1 TMODE_3

READY
R257
4.7K

R269
4.7K
V2 V25 C248 C249 A1.2V

R268
32 READY

G
R227 USB_DP1 SPI_S_MISO 10uF 0.1uF LVDS_TX_1_CLK_P READY
C202 U1 AH3 R288
3.9K

0
100pF USB_DM2 POR_OTP_VDD2P5
U2 AB8 31 R272 22

G
USB_DP2 POR_VDD1P2 D3.3V MOD_ROM_TX MOD_ROM_TX_MOD
002:G4
D3.3V T5 005:B6
C221

C223
C226
C218
C219

D
FHD
R228 USB_MONCDR 30 READY 22
USB HUB 120 R5 H4 LVDS_TX_1_DATA1_N R256
JTAG_TCLK Q203
R285 USB_MONPLL EJTAG_TCK MOD_ROM_RX MOD_ROM_RX_MOD
USE_NO_HUB 0 R202 2.7K R1 H3 29 LVDS_TX_1_DATA1_P 005:B6 002:G4 2N7002(F)

D
USB2_DM_to_MAIN JTAG_TDI READY READY 22 R270
USE_NO_HUB 0 R203 USB_PWRFLT_1 EJTAG_TDI READY
USB2_DP_to_MAIN R2 H2 R243 R245 Q202 22
USB_PWRFLT_2 EJTAG_TDO JTAG_TDO 28 READY
USE_USB_HUB 0 R204 R235 T2 H1 2.7K 2.7K LVDS_TX_1_DATA0_N 2N7002(F)
BT_DM 2.7K USB_PWRON_1 EJTAG_TMS JTAG_TMS READY
USE_USB_HUB 0 R205 T1 G1 27 LVDS_TX_1_DATA0_P
BT_DP USB_PWRON_2 EJTAG_TRSTB /JTAG_TRST 22 R259
H6 22 R274
R206 EJTAG_CE0 26
USE_NO_HUB 0 H5
USB1_DM_to_MAIN EJTAG_CE1
USE_NO_HUB 0 R207 P6 25
USB1_DP_to_MAIN R236
USE_USB_HUB 0 R200 240 1K R237 EPHY_VREF R244
USB_DM P5 L207 A1.2V R246
R201 EPHY_RDAC BLM18PG121SN1D 24 LVDS_TX_0_DATA4_N
USE_USB_HUB 0 P3 AB26 2.7K 2.7K
USB_DP
EPHY_RDN EPHY_RDN PLL_MAIN_AVDD1P2
P2 AC25 23 LVDS_TX_0_DATA4_P
EPHY_RDP EPHY_RDP PLL_MAIN_AGND
N3 AB27 R239
A2.5V A1.2V 22
EPHY_TDN EPHY_TDN PLL_MAIN_MIPS_EREF_TESTOUT LVDS_TX_0_DATA3_N
BLM18PG121SN1D N2 M6 390 L208 A1.2V
EPHY_TDP EPHY_TDP PLL_RAP_AVD_TESTOUT
P1 N6 READY BLM18PG121SN1D 21
BLM18PG121SN1D L204 LVDS_TX_0_DATA3_P
EPHY_AVDD1P2 PLL_RAP_AVD_AVDD1P2
P4 N7
0.1uF

4.7uF
0.1uF

BLM18PG121SN1D
4.7uF

C261

20
C255

C259

EPHY_AVDD2P5 PLL_RAP_AVD_AGND
C251

N4 LVDS_TX_0_DATA2_N
L200 EPHY_PLL_VDD1P2
C201 C203 N1 19
4.7uF
0.1uF

L203 LVDS_TX_0_DATA2_P
0.1uF

4.7uF

4.7uF 0.1uF EPHY_AGND_1


C224

C228

C239
C234

N5 AA24
16V EPHY_AGND_2 BYP_CPU_CLK 18
P7 Y24
EPHY_AGND_3 BYP_DS_CLK
AE24 1K R241 17 LVDS_TX_0_CLK_N
BYP_SYS216_CLK
AD25 1K R242
BYP_SYS175_CLK 16 LVDS_TX_0_CLK_P
R220 51 C213 0.015uF AE6
AUDMX_LEFT1
R221 51 C214 0.015uF AD7 15
AUDMX_RIGHT1
R222 5.1 C215 0.15uF AF6
TP201
AUDMX_INCM1 14 LVDS_TX_0_DATA1_N
COMP_L_IN R209 51 C206 0.015uF AH4
AUDMX_LEFT2
COMP_R_IN R210 51 C220 0.015uF AG5 13 LVDS_TX_0_DATA1_P
AUDMX_RIGHT2
R211 5.1 C222 0.15uF AG4
25V50V

TP200
AUDMX_INCM2 12 LVDS_TX_0_DATA0_N
SC1_L_IN R212 51 C207 0.015uF AG6
AUDMX_LEFT3
SC1_R_IN R213 51 C208 0.015uF AF7 11 LVDS_TX_0_DATA0_P
AUDMX_RIGHT3
R223 5.1 C225 0.15uF AE7
TP204
AUDMX_INCM3 10
SIDE_LIN R214 51 C209 0.015uF AH5 +3.3V_MULTI
25V

AUDMX_LEFT4
SIDE_RIN R215 51 C210 0.015uF AG7 9
AUDMX_RIGHT4
R224 5.1 C227 0.15uF AH6
TP203
AUDMX_INCM4 8
PC_L_IN R216 51 C211 0.015uF AD8
25V

AUDMX_LEFT5
PC_R_IN R217 51 C212 0.015uF AF8 7
AUDMX_RIGHT5
AE8
R250
4.7K
R234
4.7K

R218 5.1 C216 0.15uF


TP202
AUDMX_INCM5 6
R219 51 C204 0.015uF AH7
25V

AUDMX_LEFT6
C205 0.015uF AH8 5
AUDMX_RIGHT6
R225 AG8
AUDMX_INCM6 4 MOD_ROM_TX_MOD
51 AF5
AUDMX_AVSS_1
AB9 3 MOD_ROM_RX_MOD
AUDMX_AVSS_2
AUDIO INCM-TP AA10
0.047uF
0.047uF

0.047uF
0.047uF

0.047uF
0.047uF

0.047uF
0.047uF

0.047uF
0.047uF

0.047uF
0.047uF
0.47uF

2
0.47uF

0.47uF

0.47uF

0.47uF

AUDMX_AVSS_3
PLACE NEAR JACKS AB10
AUDMX_AVSS_4
AA11 1
C273 AUDMX_AVSS_5
AB11
0.1uF AUDMX_AVSS_6
C244

AC8
C217
C229
C230
C232
C235
C238
C240
C242

C265
C266
C267
C268
C269
C270
C271
C272

AUDMX_LDO_CAP
AE5
AUDMX_AVDD2P5 TF05-51S
P201
READY
READY

READY
READY

A2.5V

C245
10uF

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM3556-C0 10/01/
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. BCM AUDIO/LVDS 2 13

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes LGE Internal Use Only
D1.2V D1.2V
D3.3V

C3036 C3039 C3042 C3045 C3048 C3051 C3054 C3057 C3059


C3009 C3010 C3013 C3016 C3019 C3022 C3025 C3028 C3031 C3034 4.7uF 1000pF 0.01uF 0.1uF 4.7uF 1000pF 0.01uF 0.1uF 10uF
C3000 C3001 C3002 C3003 C3004 C3005 C3006 C3007 1000pF 0.01uF 0.1uF 4.7uF 1000pF 0.01uF 0.1uF 4.7uF 1000pF 0.01uF
0.1uF 4.7uF 1000pF 0.01uF 0.1uF 10uF 10uF 33uF

D3.3V D1.8V
IC100
LGE3556C (C0 VERSION)

READY
R332 0 AG28 AE18 R347 0 C3012 C3015 C3018 C3021 C3024 C3027 C3030 C3032
DS_AGCI_CTL I2S_CLK_IN 0.1uF 1000pF 0.01uF 0.1uF 4.7uF 1000pF 0.01uF 0.1uF C3038 C3040 C3044 C3047 C3050 C3053 C3056 C3060
R333 0 AH28 AF18 READY
DS_AGCT_CTL I2S_CLK_OUT AUD_SCK 0.1uF 0.1uF 0.1uF 0.1uF 4.7uF 4.7uF 4.7uF 33uF
READY READY AA21 AD17 R348 0
0.01uF C315 EDSAFE_AVSS_1 I2S_DATA_IN
A2.5V AB22 AH19 READY
0.01uF C316 EDSAFE_AVSS_2 I2S_DATA_OUT AUD_LRCH
AF26 AD18 R349 0
READY EDSAFE_AVSS_3 I2S_LR_IN
A1.2V AF27 AG18 READY
BLM18PG121SN1D EDSAFE_AVSS_4 I2S_LR_OUT AUD_LRCK
AF28 AG26
L300 EDSAFE_AVSS_5 AUD_LEFT0_N A2.5V
AG27 AH26
EDSAFE_AVDD2P5 AUD_LEFT0_P
AE26 AF23
EDSAFE_DVDD1P2 AUD_AVDD2P5_0
AE28 AA20 C360 C368 C374
C309 C310 EDSAFE_IF_N AUD_AVSS_0_1 0.01uF 0.1uF 10uF
A1.2V AE27 AB21
0.1uF 4.7uF EDSAFE_IF_P AUD_AVSS_0_2
C347 AD24 AC22
L301 0.1uF PLL_DS_AGND AUD_AVSS_0_3 D1.8V
AB19 AC23
PLL_DS_AVDD1P2 AUD_AVSS_0_4
C317 C319 AB25 AD23
BLM18PG121SN1D PLL_DS_TESTOUT AUD_AVSS_0_5
0.1uF 4.7uF AH25 D1.8V
A1.2V A2.5V AUD_RIGHT0_N
AG25
AUD_RIGHT0_P
AB18 AH23 R365 READY 0
BLM18PG121SN1D SD_V5_AVDD1P2 AUD_LEFT1_N
C306 C307 AC17 AG23 R366 READY 0
SD_V5_AVDD2P5 AUD_LEFT1_P
0.1uF 0.1uF L303 C318 C320 AB17 AG24 R357 READY 0 C3011 C3014 C3017 C3020 C3023 C3026 C3029 C3033
C3043
SD_V5_AVSS AUD_RIGHT1_N 1000pF 0.01uF 0.01uF 0.01uF 0.01uF C3035 C3037 C3041 C3046 C3049 C3052 C3055 C3058 C3061
1000pF 0.01uF AD14 AH24 R358 READY 0 1000pF 1000pF 1000pF
0.1uF 0.1uF 0.1uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
BLM18PG121SN1D SD_V1_AVDD1P2 AUD_RIGHT1_P
AD16 AE22 16V 16V 16V 10V 16V 16V 16V 16V 16V 16V
SD_V1_AVDD2P5 AUD_AVDD2P5_1
L304 AB15 AB20 C359 C367 C373
SD_V1_AVSS_1 AUD_AVSS_1_1 0.01uF 0.1uF 10uF
C312 AC15 AC21
SD_V1_AVSS_2 AUD_AVSS_1_2
1000pF C313 AD13 AE23
0.01uF SD_V2_AVDD1P2 AUD_AVSS_1_3
AE13 AF21
DSUB RGB INCM-TP SD_V2_AVDD2P5 AUD_LEFT2_N
SCART1_Lout_N
R315 34 AC13 AE21
PLACE NEAR JACKS SD_V2_AVSS_1 AUD_LEFT2_P
SCART1_Lout_P
R316 34 AB14 AF22
DSUB SD_V2_AVSS_2 AUD_RIGHT2_N SCART1_Rout_N
R314 34 AC14 AG22
SD_V2_AVSS_3 AUD_RIGHT2_P SCART1_Rout_P
009:G4 DSUB_R AC12 AD21
SD_V3_AVDD1P2 AUD_AVDD2P5_2
AD12 AC20 C361 C369 C375
SD_V3_AVDD2P5 AUD_AVSS_2_1 0.01uF 0.1uF 10uF
009:G4 DSUB_G AB13 AD22
SD_V3_AVSS_1 AUD_AVSS_2_2
AA14 AH2
SD_V3_AVSS_2 AUD_SPDIF SPDIF_OUT009:D6
009:G5 DSUB_B AC11 AC6
10pF READY

SD_V4_AVDD1P2 SPDIF_AVDD2P5
READY

10pFREADY

AD11 AE4
COMPONENT SD_V4_AVDD2P5 SPDIF_AVSS C350 +5V_MULTI
AB12 AF3 0.1uF
SD_V4_AVSS SPDIF_IN_N IC100
10pF

C332 0.1uF AD10 AH1


75

COMP_Y LGE3556C (C0 VERSION)


75

SD_R SPDIF_IN_P
75

COMP_Pr C333 0.1uF AC10


R352

SD_INCM_R
COMP_Pb C334 0.1uF AE9 R344
R317

SD_G D1.2V
C304
C303

C308

1K
0

IC100
R320

C335 0.1uF AF9 AG1


R324

SD_INCM_G HDMI_RX_0_CEC_DAT AD5 P16


R300
75

34 0.1uF AH9 AA6 LGE3556C (C0 VERSION) DVSS_1 DVSS_62


READY C300 10pF

C336
R301 75

AD6 R16
R305 75

SD_B HDMI_RX_0_HTPLG_IN R345


C337 0.1uF AG9 AA5 10K A2.5V DVSS_2 DVSS_63
SD_INCM_B HDMI_RX_0_HTPLG_OUT J7 T16
COMP INCM-TP C338 0.1uF AG15 AB3 22 R355 DVSS_3 DVSS_64
R303

SD_Y1 HDMI_RX_0_DDC_SCL HDMI_SCL 008:AA19 K7 U16


PLACE NEAR JACKS C339 0.1uF AE15 Y6 22 R356 H8 DVSS_4 DVSS_65
SD_PR1 HDMI_RX_0_DDC_SDA HDMI_SDA 008:AA19 VDDC_1 L7 V16
C340 0.1uF AF15 AC4 499 R346 J8 DVSS_5 DVSS_66
SD_PB1 HDMI_RX_0_RESREF VDDC_2 M7 AA16
C341 0.1uF AH15 AC1 C378 K8 DVSS_6 DVSS_67
SD_INCM_COMP1 HDMI_RX_0_CLK_N HDMI0_RXC-_BCM 008:AA19 0.1uF VDDC_3 AB7 D17
C342 0.1uF AG16 AC2 L8 DVSS_7 DVSS_68
SC1_G SD_Y2 HDMI_RX_0_CLK_P HDMI0_RXC+_BCM 008:AB19 16V VDDC_4 AC7 L17
C343 0.1uF AF16 AD1 M8 DVSS_8 DVSS_69
SC1_R SD_PR2 HDMI_RX_0_DATA0_N HDMI0_RX0-_BCM 008:AB19 VDDC_5 G8 M17
C344 0.1uF AH17 AD2 N8 DVSS_9 DVSS_70
SC1_B SD_PB2 HDMI_RX_0_DATA0_P HDMI0_RX0+_BCM 008:AB19 A3.3V VDDC_6 D9 N17
C345 0.1uF AH16 AE1 P8 DVSS_10 DVSS_71
SD_INCM_COMP2 HDMI_RX_0_DATA1_N HDMI0_RX1-_BCM 008:AC19 VDDC_7 AA9 P17
READY

R307 34 READY 0 R334 AG14 AE2 R8 DVSS_11 DVSS_72


HDMI0_RX1+_BCM VDDC_8 G10 R17
R323 75

R325 75

SD_Y3 HDMI_RX_0_DATA1_P 008:AC19


R330 75

READY 0 R335 AE14 AF1 BLM18PG121SN1D AA8 DVSS_12 DVSS_73


SC1_RGB SD_PR3 HDMI_RX_0_DATA2_N HDMI0_RX2-_BCM 008:AC19 VDDC_9 A11 T17
READY 0 L308 H9
10pF

R336 AF14 AF2 DVSS_13 DVSS_74


C305

SC RGB INCM-TP READY SD_PB3 HDMI_RX_0_DATA2_P HDMI0_RX2+_BCM 008:AD19 VDDC_10 L11 U17
R331 34 C346 0.1uF AH14 AD3 A1.2V A2.5V H10 DVSS_14 DVSS_75
PLACE NEAR JACKS SD_INCM_COMP3 HDMI_RX_0_VDD3P3 VDDC_11 M11 V17
READY 0 R337 AH10 AE3 H11 DVSS_15 DVSS_76
READY SD_L1 HDMI_RX_0_VDD1P2 VDDC_12 N11 AA17
0 R338 AG10 AC3 H12 DVSS_16 DVSS_77
READY READY SD_C1 HDMI_RX_0_VDD2P5 VDDC_13 P11 AC19
75 R328 C321 0.1uF AE10 AD4 C351 C354 C362 H13 DVSS_17 DVSS_78
SD_INCM_LC1 HDMI_RX_0_AVSS_1 VDDC_14 R11 G18
READY 0 R339 AE11 AB5 4.7uF 0.1uF 0.1uF H14 DVSS_18 DVSS_79
R329 75 READY BLM18PG121SN1D T11 L18
SD_L2 HDMI_RX_0_AVSS_2 VDDC_15
R311 READY 0 R340 AF11 AB6 H15 DVSS_19 DVSS_80
34 SD_C2 HDMI_RX_0_AVSS_3 L305 VDDC_16 U11 M18
R326 C322 0.1uF AH11 AG2 H16 DVSS_20 DVSS_81
R312 34 75 VDDC_17 V11 N18
SD_INCM_LC2 HDMI_RX_0_AVSS_4 H17
CVBS INCM-TP READY 0 R341 AH13 AB4 DVSS_21 DVSS_82
R313 34 READY SD_L3 HDMI_RX_0_AVSS_5 VDDC_18 D12 P18
PLACE NEAR JACKS R327 READY 0 R342 AE12 AA7 H18 DVSS_22 DVSS_83
CVBS R310 34 75 READY SD_C3 HDMI_RX_0_AVSS_6 VDDC_19 G12 R18
READYC323 0.1uF AF12 Y8 H19 DVSS_23 DVSS_84
SD_INCM_LC3 HDMI_RX_0_PLL_AVSS C352 C356 C364 VDDC_20 L12 T18
R308 18 C324 0.1uF AD9 AC5 H21 DVSS_24 DVSS_85
TU_CVBS 1000pF 0.01uF 10uF VDDC_21 M12 U18
SD_CVBS1 HDMI_RX_0_PLL_DVDD1P2 J21
C325 0.1uF AG11 W8 DVSS_25 DVSS_86
SD_CVBS2 HDMI_RX_0_PLL_DVSS VDDC_22 N12 V18
R309 12 C326 0.1uF AG12 K21 DVSS_26 DVSS_87
SC1_CVBS_IN SD_CVBS3 D3.3V VDDC_23 P12 D20
10K
10K

10K

10K

R359 12 C327 0.1uF AF13 L21 DVSS_27 DVSS_88


AV_CVBS_IN SD_CVBS4 VDDC_24 R12 G20
R350

C328 0.1uF AC9 AA3 M21 DVSS_28 DVSS_89


R364 SD_INCM_CVBS1 HDMI_RX_1_CEC_DAT VDDC_25 T12 H20
R360 C329 0.1uF AF10 V4 N21 DVSS_29 DVSS_90
62 VDDC_26 U12 A21
R351

75 SD_INCM_CVBS2 HDMI_RX_1_HTPLG_IN
R354

A2.5V C330 0.1uF AH12 U6 P21 DVSS_30 DVSS_91


R353

R362 A2.5V VDDC_27 V12 E21


SD_INCM_CVBS3 HDMI_RX_1_HTPLG_OUT R21
62 C331 0.1uF AG13 V5 DVSS_31 DVSS_92
SD_INCM_CVBS4 HDMI_RX_1_DDC_SCL VDDC_28 L13 F21
AF17 V3 T21 DVSS_32 DVSS_93
GND SD_SIF1 HDMI_RX_1_DDC_SDA VDDC_29 M13 G21
R318 R321 AG17 W4 499 R343 A3.3V U21 DVSS_33 DVSS_94
10K SD_INCM_SIF1 HDMI_RX_1_RESREF VDDC_30 N13 E22
10K AD15 W2 READY V21 DVSS_34 DVSS_95
0.1uF SD_FB HDMI_RX_1_CLK_N VDDC_31 P13 F22
C301 A1.2V AE16 W3 W21 DVSS_35 DVSS_96
SC1_ID SD_FS HDMI_RX_1_CLK_P R363 VDDC_32 R13 G22
L302 AE17 Y1 Y21 DVSS_36 DVSS_97
TU_SIF SD_FS2 HDMI_RX_1_DATA0_N 20 VDDC_33 T13 H22
R306

BLM18PG121SN1D AB16 Y2 DVSS_37 DVSS_98


240

HDMI_RX_1_DATA0_P A3.3V U13 J22


R319 AA15 PLL_VAFE_AVDD1P2 AA2 DVSS_38 DVSS_99
C311 C314 V13 K22
12K PLL_VAFE_AVSS HDMI_RX_1_DATA1_N AH27
0.1uF 4.7uF AC16 AA1 DVSS_39 DVSS_100
HDMI_RX_1_DATA1_P AGC_VDDO G14 L22
AG3 PLL_VAFE_TESTOUT AB2 BLM18PG121SN1D D3.3V DVSS_40 DVSS_101
RGB_HSYNC HDMI_RX_1_DATA2_N L14 M22
AF4 AB1 L307 DVSS_41 DVSS_102
R322

M14 N22
12K

C302 RGB_VSYNC HDMI_RX_1_DATA2_P C389


R304

Y3 A1.2V A2.5V AA12 DVSS_42 DVSS_103


120

0.1uF HDMI_RX_1_VDD3P3 0.1uF VDDO_1 N14 P22


Y4 AA13 DVSS_43 DVSS_104
HDMI_RX_1_VDD1P2 VDDO_2 P14 R22
W5 AA18 DVSS_44 DVSS_105
HDMI_RX_1_VDD2P5 VDDO_3 R14 T22
W1 AA19 DVSS_45 DVSS_106
HDMI_RX_1_AVSS_1 VDDO_4 T14 U22
U5 C355 C363 C370 E28 DVSS_46 DVSS_107
RGB_HSYNC HDMI_RX_1_AVSS_2 VDDO_5 U14 V22
W6 4.7uF 0.1uF 0.1uF L28 DVSS_47 DVSS_108
RGB_VSYNC HDMI_RX_1_AVSS_3 VDDO_6 V14 W22
U7 BLM18PG121SN1D U28 DVSS_48 DVSS_109
CONNECT NEAR BCM CHIP VDDO_7 L15 Y22
HDMI_RX_1_AVSS_4 L306 AB28
V7 DVSS_49 DVSS_110
HDMI_RX_1_AVSS_5 VDDO_8 M15 AA22
W7 D1.8V DVSS_50 DVSS_111
SC1_FB HDMI_RX_1_AVSS_6 N15 W23
U8 DVSS_51 DVSS_112
HDMI_RX_1_AVSS_7 P15 AB23
V8 A9 DVSS_52 DVSS_113
HDMI_RX_1_AVSS_8 DDRV_1 R15 F28
Y5 G9 DVSS_53 DVSS_114
HDMI_RX_1_AVSS_9 DDRV_2 T15 M28
V6 G11 DVSS_54 DVSS_115
HDMI_RX_1_PLL_AVSS DDRV_3 U15 T28
AA4 G13 DVSS_55 DVSS_116
HDMI_RX_1_PLL_DVDD1P2 DDRV_4 V15 AC28
Y7 C357 C365 C372 A14 DVSS_56 DVSS_117
HDMI_RX_1_PLL_DVSS DDRV_5 A16
1000pF 0.01uF 10uF G15 DVSS_57
DDRV_6 G16
G17 DVSS_58
DDRV_7 L16
A19 DVSS_59
DDRV_8 M16
G19 DVSS_60
DDRV_9 N16
DVSS_61

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM3556-C0 10/01/
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. BCM VIDEO IN/BCM POWER 3 13

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes LGE Internal Use Only
D1.8V
A1.2V
IC100
LGE3556C (C0 VERSION) D1.8V

A6 0.1uF C408

0.047uF
0.047uF
DDR_BVDD0

0.047uF

0.047uF

0.047uF
C432

C435

C436

C437

C438

C439

C440

C441

C442
C422
0.047uF

C423
0.1uF

C424

C425

C426

C427

C428

C429

470pF

470pF

0.047uF

0.047uF
A24

C421
470pF

0.1uF

0.1uF

C450
10uF

C451

C452

C453

C454

C455

C456

C457

C458

C459

C460

C461

C462

C463

C476
0.1uF C409

10uF

10uF

C443

C446

C449
0.1uF

470pF

470pF
10uF

470pF

0.1uF

22uF

22uF

0.1uF

0.1uF
470pF

0.1uF

470pF

10uF

10uF

10uF
22uF
DDR_BVDD1

22uF
10uF
B7
DDR_BVSS0
B24
DDR_BVSS1
F20
DDR_PLL_TEST
B23 R403 0
DDR_PLL_LDO
B17 READY R404 0 DDR01_CKE
DDR01_CKE
C22
DDR_VTT
R406 240
DDR_COMP IC401 IC402
E16 1% DDR01_ODT DDR1_DQ[0-7]
DDR01_ODT NT5TU128M8DE_BD NT5TU128M8DE_BD
C23 DDR0_DQ[0-7] 004:B6 004:B5
DDR_EXT_CLK
DDR0_CLK
B12 DDR0_CLK 004:C7;004:C4 004:A7;004:C4 DDR0_CLK 004:A7;004:F4 DDR1_CLK
NANYA_1G_DDR2
DDR01_A[0-3,7-13] PI
C12 R410 NANYA_1G_DDR2
DDR0_CLKb 004:C7;004:C4 1% E8 C8 DDR0_DQ[0] R411 E8 C8 DDR1_DQ[0] DDR01_RASb

1%
DDR0_CLKB 100 CK DQ0 100 CK DQ0
A13 DDR1_CLK 004:F7;004:F4 F8 C2 DDR0_DQ[1] F8 C2
DDR1_CLK 004:A7;004:C4 DDR0_CLKb 004:A7;004:F4 DDR1_CLKb DDR1_DQ[1] DDR01_A[2] C466
A12 CK DQ1 CK DQ1
DDR1_CLKb 004:F7;004:F4 DDR01_CKE F2 D7 DDR0_DQ[2] DDR01_CKE F2 D7 DDR1_DQ[5] DDR1_A[4-6] DDR01_A[0] 0.1uF
DDR1_CLKB CKE DQ2 CKE DQ2
B15 DDR01_A[0] D3 DDR0_DQ[3] D3
DDR01_A00 DDR1_DQ[3] DDR1_A[6] 75
E14 DDR01_A[1] DQ3 DQ3 AR401
DDR01_A[0-3] D1 DDR0_DQ[4] D1 DDR1_DQ[4] DDR0_A[4-6] DDR01_CASb
DDR01_A01 DQ4 DQ4 C467
A15 DDR01_A[2] F7 D9 DDR0_DQ[5] F7 D9 R413 75 0.1uF
DDR01_A02 DDR01_RASb DDR01_RASb DDR1_DQ[2]
D15 DDR01_A[3] RAS DQ5 RAS DQ5
DDR01_CASb G7 B1 DDR0_DQ[6] DDR01_CASb G7 B1 DDR1_DQ[6] DDR01_A[12] R414 75
DDR01_A03 CAS DQ6 CAS DQ6
E13 DDR0_A[4] DDR0_A[4-6] F3 B9 DDR0_DQ[7] F3 B9
DDR0_A04 DDR01_WEb DDR01_WEb DDR1_DQ[7] DDR01_A[9] C468
E12 DDR0_A[5] WE DQ7 WE DQ7
G8 G8 DDR01_A[7] 0.1uF
DDR0_A05 CS CS
F13 DDR0_A[6]
DDR0_A06 DDR01_BA0 DDR01_BA0 DDR1_A[5] 75
C14 DDR01_A[7] B7 B7 AR402
DDR01_A07 DDR01_BA1 DDR0_DQS0 004:A4 DDR01_BA1 DDR1_DQS0 004:A4 DDR1_A[4] C469
F14 DDR01_A[8] DQS DQS
G2 A8 DDR0_DQS0b G2 A8 DDR1_DQS0b 004:A3 DDR01_A[11] 75 0.1uF
DDR01_A08 BA0 DQS 004:A4 BA0 DQS
B14 DDR01_A[9] DDR01_A[7-13] G3 B3 G3 B3
DDR01_A09 DDR0_DM0 004:A4 DDR1_DM0 004:A4 DDR01_A[8]
D14 DDR01_A[10] BA1 DM/RDQS BA1 DM/RDQS
DDR01_BA2 G1 A2 DDR01_BA2 G1 A2 DDR01_A[13]
DDR01_A10 NC_1/BA2 NU/RDQS NC_1/BA2 NU/RDQS C470
C13 DDR01_A[11]
DDR01_A11 DDR01_A[0-3,7-13] DDR01_A[0-3,7-13] DDR01_A[3] AR400 0.1uF
D13 DDR01_A[12] D1.8V D1.8V
DDR01_A12 DDR01_A[1]
B13 DDR01_A[13] H8 A9 H8 A9
DDR0_A[4-6] DDR01_A[0] DDR01_A[0] DDR01_A[10]
DDR01_A13
F15 DDR1_A[4] A0 VDDQ_1 004:B6;004:F3;004:I7 DDR1_A[4-6] A0 VDDQ_1 C471
DDR1_A[4-6] DDR01_A[1] H3 C1 DDR01_A[1] H3 C1 DDR01_BA1 75 0.1uF
DDR1_A04 A1 VDDQ_2 A1 VDDQ_2
C15 DDR1_A[5] H7 C3 H7 C3 AR403
DDR1_A05 DDR01_A[2] DDR01_A[2] DDR01_BA0
D16 DDR1_A[6] A2 VDDQ_3 A2 VDDQ_3
DDR01_A[3] J2 C7 DDR01_A[3] J2 C7 DDR01_BA2
DDR1_A06 A3 VDDQ_4 A3 VDDQ_4 C481
F16 DDR01_BA0 DDR0_A[4] J8 C9 DDR1_A[4] J8 C9 0.1uF
DDR01_BA0 DDR01_WEb
B16 A4 VDDQ_5 A4 VDDQ_5
DDR01_BA1 DDR0_A[5] J3 A1 DDR1_A[5] J3 A1 75
DDR01_BA1 A5 VDD_1 A5 VDD_1 DDR01_CKE
E15 DDR01_BA2 DDR0_A[6] J7 L1 DDR1_A[6] J7 L1 AR404 C484
DDR01_BA2 A6 VDD_2 A6 VDD_2 DDR01_ODT 0.1uF
A17 DDR01_CASb K2 E9 K2 E9
DDR01_CASB DDR01_A[7] DDR01_A[7] R415 75
A8 DDR0_DQ[0] A7 VDD_3 A7 VDD_3
DDR0_DQ00
B11 DDR0_DQ[1]
DDR0_DQ[0-15] DDR01_A[8]
DDR01_A[9]
K8
K3
A8 VDD_4
H9 DDR01_A[8]
DDR01_A[9]
K8
K3
A8 VDD_4
H9
SI SI
DDR0_DQ01 A9 A9 DDR_VTT
B8 DDR0_DQ[2] H2 A7 H2 A7
DDR0_DQ02 DDR01_A[10] DDR01_A[10]
D11 DDR0_DQ[3] A10/AP VSSQ_1 A10/AP VSSQ_1
DDR01_A[11] K7 B2 DDR01_A[11] K7 B2
DDR0_DQ03 A11 VSSQ_2 A11 VSSQ_2
E11 DDR0_DQ[4] DDR01_A[12] L2 B8 L2 B8
DDR0_DQ04 DDR01_A[12]
C8 DDR0_DQ[5] A12 VSSQ_3 A12 VSSQ_3
DDR01_A[13] L8 D2 DDR01_A[13] L8 D2
DDR0_DQ05 A13 VSSQ_4 A13 VSSQ_4
C11 DDR0_DQ[6] D8 D8
DDR0_DQ06 DDR01_RASb
C9 DDR0_DQ[7] VSSQ_5 VSSQ_5
A3 A3 DDR01_A[2]
DDR0_DQ07 VSS_1 VSS_1 C472
D8 DDR0_DQ[8] E3 E3 0.1uF
DDR0_DQ08 DDR01_A[0]
E10 DDR0_DQ[9] L3 VSS_2 L3 VSS_2
NC_2/A14 J1 NC_2/A14 J1 DDR0_A[6] 75
DDR0_DQ09 L7 VSS_3 DDR0_VREF0 L7 VSS_3 DDR1_VREF0
E9 DDR0_DQ[10] K9 K9 AR405
DDR0_DQ10 NC_3/A15 NC_3/A15 DDR01_A[3]
F11 DDR0_DQ[11] VSS_4 VSS_4
DDR0_DQ11 004:A7;004:C5;004:C2;004:F2;004:I4;004:I6 DDR01_A[1] C464
F12 DDR0_DQ[12] F9 E2 F9 E2 0.1uF
DDR0_DQ12 DDR01_ODT DDR01_ODT DDR01_A[10]
E8 DDR0_DQ[13] ODT VREF ODT VREF
E1 E1 C444 C447 DDR01_BA1 75
DDR0_DQ13 VDDL C430 C433 VDDL
D10 DDR0_DQ[14] E7 E7
DDR0_DQ14 DDR01_A[12] AR406
F8 DDR0_DQ[15] VSSDL VSSDL 470pF 0.1uF
0.1uF 470pF DDR01_A[9]
DDR0_DQ15 C465
C18 DDR1_DQ[0] 0.1uF
DDR1_DQ00 DDR01_A[7]
C20 DDR1_DQ[1]
DDR1_DQ01 DDR0_A[5] 75
A18 DDR1_DQ[2] AR407
DDR1_DQ02 DDR0_A[4]
B21 DDR1_DQ[3]
DDR1_DQ03 DDR01_A[11] C473
DDR1_DQ04
C21 DDR1_DQ[4]
Close to IC Close to IC DDR01_A[8] 0.1uF
B18 DDR1_DQ[5]
DDR1_DQ05 DDR01_A[13] 75
B20 DDR1_DQ[6] AR408
DDR1_DQ06 DDR01_BA0
D18 DDR1_DQ[7]
DDR1_DQ07 DDR01_BA2 C474
E18 DDR1_DQ[8] 0.1uF
DDR1_DQ08 DDR01_WEb
D21 DDR1_DQ[9]
DDR1_DQ09 DDR01_CKE 75
DDR1_DQ10
F18 DDR1_DQ[10] SI DDR01_ODT
AR409
E20 DDR1_DQ[11]
DDR1_DQ11 R416 75
A22 C475
DDR1_DQ[12] 0.1uF
DDR1_DQ12
F17 DDR1_DQ[13] DDR1_DQ[0-15]
DDR1_DQ13
B22 DDR1_DQ[14]
DDR1_DQ14
E17 DDR1_DQ[15]
DDR1_DQ15 C482
A10 DDR0_DM0 004:E6 0.1uF
DDR0_DM0 IC403 IC404 DDR1_DQ[8-15]
C10 DDR0_DM1 004:E3
DDR0_DM1 NT5TU128M8DE_BD DDR0_DQ[8-15]
NT5TU128M8DE_BD
A20 DDR1_DM0 004:H6 004:B5 C483
DDR1_DM0 0.1uF
F19 DDR1_DM1 004:H3 004:A7;004:C7 DDR0_CLK NANYA_1G_DDR2 DDR1_CLK
DDR1_DM1 NANYA_1G_DDR2
B10 DDR0_DQS0 004:E6 E8 C8 E8 C8
DDR0_DQS0 DDR0_DQ[9] DDR1_DQ[9]
B9 CK DQ0 CK DQ0
DDR0_DQS0B
DDR0_DQS0b 004:E6 D1.8V D1.8V 004:A7;004:C7 DDR0_CLKb F8 C2 DDR0_DQ[8] DDR1_CLKb F8 C2 DDR1_DQ[8] C480
F10 CK DQ1 CK DQ1 0.1uF
DDR0_DQS1 004:E3 DDR01_CKE F2 D7 DDR0_DQ[12] DDR01_CKE F2 D7 DDR1_DQ[12]
DDR0_DQS1 CKE DQ2 CKE DQ2
F9 DDR0_DQS1b 004:E3 004:A7;004:C7;004:F7;004:F4 D3 D3
DDR0_DQS1B DDR0_DQ[13] DDR1_DQ[13]
READY DQ3 DQ3
DDR1_DQS0
B19
C19
DDR1_DQS0 004:H6
DDR1_DQS0b 004:H6
READY
1% 1%
F7
DQ4
D1 DDR0_DQ[15]
DQ4
D1 DDR1_DQ[15] SI
DDR01_RASb D9 DDR0_DQ[11] DDR01_RASb F7 D9 DDR1_DQ[14]
DDR1_DQS0B RAS DQ5 RAS DQ5
E19 DDR1_DQS1 004:H3 4.99K G7 B1 G7 B1
DDR1_DQS1 4.99K DDR01_CASb DDR0_DQ[10] DDR01_CASb DDR1_DQ[10]
D19 R409 CAS DQ6 CAS DQ6
DDR1_DQS1b 004:H3 R408 F3 B9 DDR0_DQ[14] F3 B9 DDR1_DQ[11]
DDR1_DQS1B DDR01_WEb DDR01_WEb
C16 DDR0_VREF0 WE DQ7 WE DQ7
DDR01_RASb G8 G8
DDR01_RASB CS CS
A7 DDR1_VREF0
DDR_VREF0 DDR01_BA0 DDR01_BA0
A23 B7 B7
DDR_VREF1 DDR01_BA1 DDR0_DQS1 004:A4 DDR01_BA1 DDR1_DQS1 004:A3
C17 D1.8V DQS DQS
DDR01_WEb G2 A8 DDR0_DQS1b G2 A8 DDR1_DQS1b 004:A3
C418

DDR01_WEB 004:A4
C414
C415
C417
C410

BA0 DQS BA0 DQS


C413

C7
C411
C412

G3 B3 DDR0_DM1 004:A4 G3 B3 DDR1_DM1 004:A4


DDR_VDDP1P8_1 BA1 DM/RDQS BA1 DM/RDQS
D22 G1 A2 G1 A2
DDR_VDDP1P8_2 C486 C488 C487 DDR01_BA2 DDR01_BA2
NC_1/BA2 NU/RDQS NC_1/BA2 NU/RDQS
C404 C406 1uF DDR01_A[0-3,7-13] DDR01_A[0-3,7-13] IC401-*1 IC402-*1

1uF 470pF1uF
470pF D1.8V D1.8V K4T1G084QE-HCF8 K4T1G084QE-HCF8

10V
470pF
470pF
1uF

1uF

E8 C8 E8 C8
CK DQ0 CK DQ0
F8 C2 F8 C2

0.1uF 0.1uF DDR01_A[0] H8 A9 DDR01_A[0] H8 A9 F2


CK
CKE
DQ1
DQ2
D7
D3
F2
CK
CKE
DQ1
DQ2
D7
D3
DDR1_A[4-6]
0.1uF
0.1uF

DQ3 DQ3<