9a49b Compal LA-6902P PDF

A B C D E
Compal Confidential
Model Name : JE50-HR/SJV50-HR
Compal Project Name : P5WE0/P5WS0
1 1
File Name : LA-6902P
Compal Confidential
2 2
JE50-HR/SJV50-HR(P5WE0/P5WS0) M/B Schematics Document

Intel Sandy Bridge Processor with DDRIII + Cougar Point PCH
Nvidia N12P GS/GV
3 2010-10-19 3
REV:0.1
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2010/10/15 Deciphered Date 2011/10/15 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
JE50-HR/SJV50-HR M/B Schematics0.4
Date: Wednesday, October 27, 2010 Sheet 1 of 61
A B C D E
A B C D E
Fan Control
page 42
1 1
100MHz PCI-E 2.0x16 5GT/s PER LANE

PEG(DIS) Intel Memory BUS(DDRIII)
Nvidia 133MHz Dual Channel 204pin DDRIII-SO-DIMM X2
N12P GS/GV Sandy Bridge BANK 0, 1, 2, 3 page 11,12
1.5V DDRIII 1066/1333
Processor
page22~30
rPGA989
page 4~10
HDMI(DIS) CRT(DIS) LVDS(DIS) FDI x8 DMI x4 USB 2.0 conn x2 Bluetooth CMOS Camera 3G connector
Conn USB port 9,12 on 3G/B
USB port 0,1 on USB port 13 USB port 10
HDMI Conn. CRT Conn. LVDS Conn. 100MHz 100MHz USB/B page 38 page 38 page 31 page 37
page 33 page 32 page 31 2.7GT/s 1GB/s x4
2 USBx14 3.3V 48MHz 2
LVDS(UMA/OPTIMUS)
Intel
CRT(UMA/OPTIMUS) HD Audio 3.3V 24MHz
TMDS(UMA/OPTIMUS) Cougar Point-M

PCH
PCI-Express x 8 (ARD PCIE2.0 2.5GT/s) 100MHz HDA Codec
SATA x 6 (GEN1 1.5GT/S ,GEN2 3GT/S) 100MHz 989pin BGA ALC271X/277X
port 2,3 port 1 page 41
port 5 page 13~21 SPI
USB 3.0 conn x1 MINI Card x2 LAN(GbE) &
NEC uPD720200AF1 WLAN, WWAN Card Reader
USB port 12,13
BCM57785
with USB3.0 Conn. page 37 page 35,36 SPI ROM x1 Int. Speaker Phone Jack x 2
page 45
port 0,1 port 2 page 13
page 41 page 41
SATA HDD SATA CDROM
3
Card Reader RJ45 Conn. page Conn. page 34 LPC BUS 3
34
Conn. page 35,36 page 36
33MHz
Sub-board ENE KB930

page 39
LS-6901P
USB 2.0/B 2Port
RTC CKT. USB Port0,1 page 38
page 13 LF-6901P Touch Pad Int.KBD
FPC for USB3.0 page 40 page 40
LS-6904P page 38
Power On/Off CKT. USB 3.0 /B
page 40 1 port as USB3.0
1 port as USB2.0
page 38
BIOS ROM
page 40
DC/DC Interface CKT.
LS-6903P
4 page 43,44 4
3G/B
page 37
Power Circuit DC/DC

page 46~59 LS-6902P + LS-6905P Security Classification Compal Secret Data Compal Electronics, Inc.
PWR/B
Block Diagrams
page 40 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
JE50-HR/SJV50-HR M/B Schematics 0.4
A B C D E
A B C D E
Voltage Rails
SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Power Plane Description S1 S3 S5
VIN Adapter power supply (19V) N/A N/A N/A Full ON HIGH HIGH HIGH HIGH ON ON ON ON
BATT+ Battery power supply (12.6V) N/A N/A N/A
S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
B+ AC or battery power rail for power circuit. N/A N/A N/A
1 1
+CPU_CORE Core voltage for CPU ON OFF OFF S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
+VGA_CORE Core voltage for GPU ON OFF OFF
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
+VGFX_CORE Core voltage for UMA graphic ON OFF OFF
+0.75VS +0.75VP to +0.75VS switched power rail for DDR terminator ON OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.05VSDGPU +1.0VSPDGPU to +1.0VSDGPU switched power rail for GPU ON OFF OFF
+1.05VS_VTT +1.05VS_VCCPP to +1.05VS_VCCP switched power rail for CPU ON OFF OFF
+1.05VS_PCH +1.05VS_VCCP to +1.05VS_PCH power for PCH ON OFF OFF Board ID / SKU ID Table for AD channel
+1.5V +1.5VP to +1.5V power rail for DDRIII ON ON OFF Vcc 3.3V +/- 5%
+1.5VS +1.5V to +1.5VS switched power rail ON OFF OFF Ra/Rc/Re 100K +/- 5%
+1.5VSDGPU +1.5VS to +1.5VSDGPU switched power rail for GPU ON OFF OFF Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
+1.8VS (+5VALW or +3VALW) to 1.8V switched power rail to PCH & GPU ON OFF OFF 0 0 0 V 0 V 0 V EVT
+1.8VSDGPU +1.8VS to +1.8VSDGPU switched power rail for GPU ON OFF OFF 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V EVT2
+3VALW +3VALW always on power rail ON ON ON* 2 18K +/- 5% 0.436 V 0.503 V 0.538 V DVT
+3VALW_EC +3VALW always to KBC ON ON ON* 3 33K +/- 5% 0.712 V 0.819 V 0.875 V PVT
+3V_LAN +3VALW to +3V_LAN power rail for LAN ON ON ON* 4 56K +/- 5% 1.036 V 1.185 V 1.264 V Pre-MP
+3VALW_PCH +3VALW to +3VALW_PCH power rail for PCH (Short Jumper) ON ON ON* 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
2 2
+3VS +3VALW to +3VS power rail ON OFF OFF 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
+5VALW +5VALWP to +5VALW power rail ON ON ON* 7 NC 2.500 V 3.300 V 3.300 V
+5VALW_PCH +5VALW to +5VALW_PCH power rail for PCH (Short resister) ON ON ON*
+5VS +5VALW to +5VS switched power rail ON OFF OFF
BOARD ID Table BTO Option Table
+VSB +VSBP to +VSB always on power rail for sequence control ON ON ON*
+RTCVCC RTC power ON ON ON
BTO Item BOM Structure
Board ID PCB Revision
UMA Only UMAO@
0 0.1
UMA with OPTIMUS UMA@
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. 1 0.2
Dis with OPTIMUS DIS@
EC SM Bus1 address EC SM Bus2 address 2 0.3
DIS Only DISO@
3 0.4
Device
OPTIMUS OPT@
Address Device Address 4 1.0
Non-OPTIMUS NOPT@
Smart Battery 0001 011X b 5
3G 3G@
6
Blue Tooth BT@
7
USB2.0 USB20@
PCH SM Bus address USB3.0 USB30@
3 VRAM X76@ 3
Device Address
USB Port Table Connector CONN@
Clock Generator (9LVS3199AKLFT, 1101 0010b Unpop @
RTM890N-631-VB-GRT) 3 External
DDR DIMM0 1001 000Xb
USB 2.0 USB 1.1 Port USB Port LAN Chip A0 version A0@
DDR DIMM2 LAN Chip B0 version B0@
1001 010Xb 0 USB/B (Right Side)
UHCI0 N12P-GS GS@
1 USB/B (Right Side)
3G & BT & USB30 & USB20 Config N12P-GV GV@
2 USB3.0 colay USB2.0 Conn.
3G SKU: 3G@ USB30 SKU: USB30@ OPTMIUS SKU: OPT@ UHCI1
3 USB/B Colay USB3.0
BT SKU: BT@ USB20 SKU: USB20@ Non-OPTMIUS SKU: NOPT@ EHCI1
4
LAN Chip A0 version: A0@ N12P-GS: GS@ UHCI2
5
LAN chip B0 Version: B0@ N12P-GV: GV@
6
BOM Config UHCI3
7
UMA Only: BT@/3G@/USB30@/UMA@/UMAO@/NOPT@/A0@
8 Mini Card 1(WLAN)
OPTIMUS(N12P-GS): BT@/3G@/USB30@/UMA@/DIS@/X76@/OPT@/A0@/GS@ UHCI4
9 3G/B(WWAN)
DIS Only(N12P-GS): BT@/3G@/USB30@/DISO@/DIS@/X76@/NOPT@/A0@/GS@
10 Camera
OPTIMUS(N12P-GV): BT@/3G@/USB30@/UMA@/DIS@/X76@/OPT@/A0@/GV@ EHCI2 UHCI5
11 Mini Card 2(Reserved)
4 DIS Only(N12P-GV): BT@/3G@/USB30@/DISO@/DIS@/X76@/NOPT@/A0@/GV@ 4
12 3G/B(SIM Card)
VRAM P/N : UHCI6
64*16 13 BlueTooth
Samsung : SA000035700
Hynix : SA000032400/SA0000324C0
128*16 Security Classification Compal Secret Data Compal Electronics, Inc.
Samsung : SA00003MQ40 Issued Date 2010/10/15 Deciphered Date 2011/10/15 Title
Hynix : SA00003VS00
Notes List
Custom
A B C D E
5 4 3 2 1
+1.05VS_VTT
PEG_ICOMPI and PEG_RCOMPO signals should be
ZZZ shorted and routed,
1
DA60000KC00 max length = 500 mils,trace width=4mils
R517
24.9_0402_1% PEG_ICOMPO signals should be routed with - max
JCPU1A
length = 500 mils,trace width=12mils
2
D J22
PEG_COMP spacing =15mils D
PEG_ICOMPI
PEG_ICOMPO J21
15 DMI_CRX_PTX_N0 B27 DMI_RX#[0] H22
PEG_RCOMPO
15 DMI_CRX_PTX_N1 B25 DMI_RX#[1]
15 DMI_CRX_PTX_N2 A25 DMI_RX#[2] PEG_GTX_C_HRX_N15 C46 1 PEG_GTX_HRX_N15
15 DMI_CRX_PTX_N3 B24 DMI_RX#[3] K33 2 DIS@ 0.22U_0402_10V6K
PEG_RX#[0] PEG_GTX_C_HRX_N14 C49 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N14
PEG_RX#[1] M35
PEG_GTX_C_HRX_N13
15 DMI_CRX_PTX_P0 B28 L34 C51 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N13
DMI_RX[0] PEG_RX#[2] PEG_GTX_C_HRX_N12 C53 1 PEG_GTX_HRX_N12
15 DMI_CRX_PTX_P1 B26 J35 2 DIS@ 0.22U_0402_10V6K
DMI_RX[1] PEG_RX#[3] PEG_GTX_C_HRX_N11
2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N11
DMI
15 DMI_CRX_PTX_P2 A24 J32 C60 1 PEG_GTX_HRX_N[0..15] 22
15 DMI_CRX_PTX_P3 B23 H34 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_P[0..15] 22
H31 2 DIS@ 0.22U_0402_10V6K
PEG_RX#[6] PEG_GTX_C_HRX_N8 C82 1 PEG_GTX_HRX_N8
15 DMI_CTX_PRX_N0 G21 G33 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_N[0..15] 22
PEG_GTX_C_HRX_N7
15 DMI_CTX_PRX_N1 E22
DMI_TX#[0] PEG_RX#[7]
G30 C92 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N7 PEG_HTX_C_GRX_P[0..15] 22
DMI_TX#[1] PEG_RX#[8] PEG_GTX_C_HRX_N6 C93 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N6
15 DMI_CTX_PRX_N2 F21 F35
PEG_GTX_C_HRX_N5 PEG_GTX_HRX_N5
DMI_TX#[2] PEG_RX#[9] C102 1
15 DMI_CTX_PRX_N3 D21 E34
PEG_GTX_C_HRX_N4 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N4
DMI_TX#[3] PEG_RX#[10] C111 1
E32
PEG_GTX_C_HRX_N3 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N3
15 DMI_CTX_PRX_P0 PEG_RX#[11] C113 1 2 DIS@ 0.22U_0402_10V6K
G22 DMI_TX[0] D33
PEG_GTX_C_HRX_N2 PEG_GTX_HRX_N2
15 DMI_CTX_PRX_P1 PEG_RX#[12]
D22 D31
PEG_GTX_C_HRX_N1 C125 1 2 DIS@ 0.22U_0402_10V6KPEG_GTX_HRX_N1
DMI_TX[1] PEG_RX#[13] C129 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N0
PCI EXPRESS* - GRAPHICS

15 DMI_CTX_PRX_P2 F20 B33
PEG_GTX_C_HRX_N0
15 DMI_CTX_PRX_P3
DMI_TX[2] PEG_RX#[14] C144 1 2 DIS@ 0.22U_0402_10V6K
C21 DMI_TX[3] C32
PEG_RX#[15]
PEG_GTX_C_HRX_P15 C47 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_P15
PEG_RX[0] J33
PEG_GTX_C_HRX_P14 PEG_GTX_HRX_P14
L35 C50 1 2 DIS@ 0.22U_0402_10V6K
PEG_RX[1] PEG_GTX_C_HRX_P13 C52 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_P13
PEG_RX[2] K34
PEG_GTX_C_HRX_P12 C56 PEG_GTX_HRX_P12
15 FDI_CTX_PRX_N0 A21 H35 1 2 DIS@ 0.22U_0402_10V6K
FDI0_TX#[0] PEG_GTX_C_HRX_P11 C66 PEG_GTX_HRX_P11
15 FDI_CTX_PRX_N1 H19
PEG_RX[3]
H32 1 2 DIS@ 0.22U_0402_10V6K
FDI0_TX#[1] PEG_RX[4] PEG_GTX_C_HRX_P10 PEG_GTX_HRX_P10
15 FDI_CTX_PRX_N2 E19 G34
PEG_GTX_C_HRX_P9 C68 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_P9
FDI0_TX#[2] PEG_RX[5] C81 1
15 FDI_CTX_PRX_N3 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_P8
Intel(R) FDI
C F18 FDI0_TX#[3] G31
PEG_GTX_C_HRX_P8 C
15 FDI_CTX_PRX_N4 PEG_RX[6] C86 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_P7
B21 FDI1_TX#[0] F33
PEG_GTX_C_HRX_P7
C20 F30
PEG_GTX_C_HRX_P6 C100 1
15 FDI_CTX_PRX_N6 FDI1_TX#[1] PEG_RX[8] 2 DIS@ 0.22U_0402_10V6K
D18 FDI1_TX#[2] PEG_GTX_C_HRX_P5
E35 PEG_GTX_HRX_P5
E17 PEG_GTX_C_HRX_P4
E33 C106 1
FDI1_TX#[3] PEG_RX[10] 2 DIS@ 0.22U_0402_10V6K
PEG_GTX_C_HRX_P3
F32 PEG_GTX_HRX_P3
PEG_RX[11] PEG_GTX_C_HRX_P2 C117 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_P2
PEG_RX[12] D34
15 FDI_CTX_PRX_P0 A22 PEG_GTX_C_HRX_P1
E31 C119 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_P1
15 FDI_CTX_PRX_P1 FDI0_TX[0] PEG_RX[13] C135 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_P0
G19 PEG_GTX_C_HRX_P0
C33
15 FDI_CTX_PRX_P2 FDI0_TX[1] PEG_RX[14] C138 1 2 DIS@ 0.22U_0402_10V6K
E20 FDI0_TX[2] B32
15 FDI_CTX_PRX_P3 PEG_RX[15]
G18 FDI0_TX[3] PEG_HTX_GRX_N15 PEG_HTX_C_GRX_N15
15 FDI_CTX_PRX_P4 B20 PEG_HTX_GRX_N14 C516 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_N14
FDI1_TX[0] PEG_TX#[0] M29 C520 1 2 DIS@ 0.22U_0402_10V6K
15 FDI_CTX_PRX_P5 C19 PEG_HTX_GRX_N13 PEG_HTX_C_GRX_N13
FDI1_TX[1] M32 C529 1
15 FDI_CTX_PRX_P6 D19
PEG_TX#[1]
M31PEG_HTX_GRX_N12 2 DIS@ 0.22U_0402_10V6KPEG_HTX_C_GRX_N12
15 FDI_CTX_PRX_P7 FDI1_TX[2] PEG_TX#[2]
F17 L32PEG_HTX_GRX_N11 C534 1 PEG_HTX_C_GRX_N11
DIS@ 0.22U_0402_10V6K
+1.05VS_VTT
FDI1_TX[3] PEG_TX#[3]
L29PEG_HTX_GRX_N10 C538 1 2 2DIS@ 0.22U_0402_10V6KPEG_HTX_C_GRX_N10
15 FDI_FSYNC0 PEG_TX#[4] PEG_HTX_GRX_N9 PEG_HTX_C_GRX_N9
J18 FDI0_FSYNC K31 C540 1 2 DIS@ 0.22U_0402_10V6K
15 FDI_FSYNC1 PEG_TX#[5] PEG_HTX_GRX_N8 PEG_HTX_C_GRX_N8
J17 K28 C542 2 DIS@ 0.22U_0402_10V6K
FDI1_FSYNC PEG_TX#[6] PEG_HTX_GRX_N7 C544 1 1 2 DIS@ 0.22U_0402_10V6KPEG_HTX_C_GRX_N7
eDP_COMPIO and ICOMPO signals should 15 FDI_INT PEG_TX#[7] J30
H20 PEG_HTX_GRX_N6 C546 1 2 DIS@ 0.22U_0402_10V6KPEG_HTX_C_GRX_N6
FDI_INT J28 C548 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_N5
be shorted near balls, PEG_TX#[8] PEG_HTX_GRX_N5
1
15 FDI_LSYNC0 PEG_TX#[9] H29 C550

Trace Width for EDP_COMPIO=4mils, J19 PEG_HTX_GRX_N4 C552 1 1 2 DIS@ 0.22U_0402_10V6KPEG_HTX_C_GRX_N4
R145 15 FDI_LSYNC1 FDI0_LSYNC PEG_TX#[10] G27 2 DIS@ 0.22U_0402_10V6K
H17 PEG_HTX_GRX_N3
E29 PEG_HTX_C_GRX_N3
EDP_ICOMPO=12mils, 24.9_0402_1% FDI1_LSYNC PEG_TX#[11] PEG_HTX_GRX_N2
F27
C554
C556 1 1 2 DIS@ 0.22U_0402_10V6KPEG_HTX_C_GRX_N2
PEG_TX#[12] PEG_HTX_GRX_N1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_N1
and both length less than 500 mils... PEG_TX#[13] D28 C558 1 2 DIS@ 0.22U_0402_10V6K
PEG_HTX_GRX_N0 PEG_HTX_C_GRX_N0
2
should not be left floating EDP_COMP PEG_TX#[14] F26

C560 1 2 DIS@ 0.22U_0402_10V6K
PEG_TX#[15] E25
,even if disable eDP function... A18 PEG_HTX_GRX_P15 C515 1 PEG_HTX_C_GRX_P15
2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P14
eDP_COMPIO PEG_HTX_GRX_P14 C528 1
B A17 PEG_TX[0] M28 2 DIS@ 0.22U_0402_10V6K B
eDP_ICOMPO PEG_HTX_GRX_P13 C533 1 PEG_HTX_C_GRX_P13
B16 eDP_HPD PEG_TX[1] M33 2 DIS@ 0.22U_0402_10V6K
M30PEG_HTX_GRX_P12 PEG_HTX_C_GRX_P12
PEG_TX[2] PEG_HTX_GRX_P11 C536 1 2 DIS@ 0.22U_0402_10V6KPEG_HTX_C_GRX_P11
PEG_TX[3] L31
PEG_HTX_GRX_P10 C539 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P10
C15 PEG_TX[4] L28 C541 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P9
eDP_AUX PEG_HTX_GRX_P9
D15 K30
eDP
eDP_AUX# PEG_TX[5] PEG_HTX_GRX_P8 C543 1 2 DIS@ 0.22U_0402_10V6KPEG_HTX_C_GRX_P8
PEG_TX[6] K27 C545 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P7
PEG_HTX_GRX_P7 C547 1
PEG_TX[7] J29
PEG_HTX_GRX_P6 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P6
C17 PEG_TX[8] J27PEG_HTX_GRX_P5 PEG_HTX_C_GRX_P5
eDP_TX[0]
F16 H28 C551C549
1 1 2 DIS@2 DIS@ 0.22U_0402_10V6K
0.22U_0402_10V6K
eDP_TX[1] PEG_TX[9] PEG_HTX_GRX_P4 PEG_HTX_C_GRX_P4
C16 G28PEG_HTX_GRX_P3 C553 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P3
eDP_TX[2] PEG_TX[10]
G15 PEG_TX[11] E28PEG_HTX_GRX_P2 C555 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P2
eDP_TX[3] C557 1
PEG_TX[12] F28PEG_HTX_GRX_P1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P1
C18 PEG_TX[13] D27PEG_HTX_GRX_P0 PEG_HTX_C_GRX_P0
eDP_TX#[0] C559 DIS@ 0.22U_0402_10V6K
E16 PEG_TX[14] E26 C561 1 1 2 2DIS@ 0.22U_0402_10V6K
eDP_TX#[1]
D16 PEG_TX[15] D25
eDP_TX#[2]
F15 eDP_TX#[3]
Sandy Bridge_rPGA_Rev0p61
CONN@
Typ- suggest 220nF. The change in AC capacitor
value from 100nF to 220nF is to enable
compatibility with future platforms having PCIE
Gen3 (8GT/s)
A A
Security Classification Compal Secret Data

PROCESSOR(1/7) DMI,FDI,PEG
Custom 0.4
JE50-HR/SJV50-HR M/B Schematics
Date: W ednesday, October 27, 2010 Sheet 4 of 61
5 4 3 2 1
5 4 3 2 1
Buffered reset to CPU

D +3VS D
+3VALW
+1.05VS_VTT +1.5V_CPU_VDDQ
1
C162
0.1U_0402_16V4Z 1
1
C307
1
2 R90 0.1U_0402_16V4Z
75_0402_1% R205
2
5
@ U7 R87 U11 200_0402_1%
2
1 R782 2 1 43_0402_1% 74AHC1G09GW_TSSOP5
2
NC
5
0_0402_5% 4 BUFO_CPU_RST# 1 2 BUF_CPU_RST#
PLT_RST# Y
17 PLT_RST# 1 R64 2 2 15 SYS_PWROK 1
P
1
A B
G
0_0402_5% SN74LVC1G07DCKR_SC70-5 4 PM_SYS_PWRGD_BUF 1 2 PM_DRAM_PWRGD_R
O R204 130_0402_5%
15 PM_DRAM_PWRGD 2
1
3
A
G
R88
0_0402_5% R203
okCPUreset
3
@ 39_0402_1%
2
RESET#:
@
2
C
SNB_IVB# had changed the name to JCPU1B
C
PROC_SELCT#,function for future platform,
connect to the DF_TVS strap on the PCH
A28 CLK_CPU_DMI
BCLK CLK_CPU_DMI 14
MISC
CLOCKS
A27 CLK_CPU_DMI#
17 H_SNB_IVB# C26 BCLK# CLK_CPU_DMI# 14
SNB_IVB#
AN34
SKTOCC# R516 2
DPLL_REF_SSCLK A16 1 1K_0402_5%
A15 R518 2 1 1K_0402_5% +1.05VS_VTT
DPLL_REF_SSCLK#
If use External Graphic or
T6 PAD H_CATERR#
AL33 CATERR# use integrated without eDP
@
R93 DPLL_REF_SSCLK PD 1K_5% to GND
THERMAL
0_0402_5% DPLL_REF_SSCLK# PH 1K_5% to +1.05VS_VTT
Processor Pullups H_PECI_ISO SM_DRAMRST#
18,40 H_PECI 1 2 AN33 R8 SM_DRAMRST# 6
PECI SM_DRAMRST#
DDR3
MISC
+1.05VS_VTT 2 R91 1 62_0402_5% R92
H_PROCHOT# 56_0402_5% H_PROCHOT#_R SM_RCOMP0
40,50 H_PROCHOT# AL32 AK1 R231 2 1 140_0402_1%
1 2 PROCHOT# SM_RCOMP[0] SM_RCOMP1
A5 R566 2 1 25.5_0402_1%
SM_RCOMP[1] SM_RCOMP2
R97 A4 R571 2 1 200_0402_1%
SM_RCOMP[2]
0_0402_5% H_THEMTRIP#_R
18 H_THRMTRIP# 1 2 AN32 THERMTRIP#
DDR3 Compensation Signals
AP29 R03 modify

PRDY#
PREQ# AP27
B TCK +3VS B
R96 TCK AR26 @
TMS PAD
PWR MANAGEMENT
T66
JTAG & BPM

0_0402_5% H_PM_SYNC_R TMS AR27 TRST# @
AP30
PAD T67
15 H_PM_SYNC 1 2 AM34 TRST# @
PM_SYNC PAD T68
1
TDI
R84 2 1 10K_0402_5% R81 TDI AR28 TDO @
PAD T69 R40
0_0402_5% H_CPUPWRGD_R TDO AP26 PAD @
18 H_CPUPWRGD T70 1K_0402_5%
1 2 AP33
OK
UNCOREPWRGOOD R101
UNCOREPWRGOOD: CORE 0_0402_5%
2
DBRESET#_R XDP_DBRESET#
PM_DRAM_PWRGD_R AL35 1 2 XDP_DBRESET# 15
DBR#
V8 SM_DRAMPWROK
BPM#[0] AT28
SM_DRAMPWROK:DRAM power ok AR29
BPM#[1]
BUF_CPU_RST# AR30
BPM#[2]
AR33 RESET# AT30
BPM#[3]
AP32
BPM#[4]
AR31
BPM#[5]
AT31
BPM#[6]
AR32
BPM#[7]
CONN@
A A

PROCESSOR(2/7) PM,XDP,CLK
Custom 0.4
5 4 3 2 1
5 4 3 2 1
JCPU1C JCPU1D
11 DDR_A_D[0..63] AB6 SA_CLK_DDR0 11 12 DDR_B_D[0..63] AE2 SB_CLK_DDR0 12

SA_CLK[0] SB_CLK[0]
AA6 SA_CLK_DDR#0 11 SB_CLK#[0] AD2 SB_CLK_DDR#0 12
DDR_A_D0 SA_CLK#[0] DDR_B_D0
C5 V9 DDRA_CKE0_DIMMA 11 C9 R9 DDRB_CKE0_DIMMB 12
DDR_A_D1 SA_DQ[0] SA_CKE[0] DDR_B_D1 SB_DQ[0] SB_CKE[0]
D5 A7 SB_DQ[1]
DDR_A_D2 SA_DQ[1] DDR_B_D2
D3 D10 SB_DQ[2]
D2 C8 SB_DQ[3]
DDR_A_D4 SA_DQ[3] DDR_B_D4 AE1
D6 AA5 SA_CLK_DDR1 11 A9 SB_DQ[4] SB_CLK[1] SB_CLK_DDR1 12
D DDR_A_D5 SA_DQ[4] SA_CLK[1] DDR_B_D5 AD1
D
C6 AB5 SA_CLK_DDR#1 11 A8 SB_DQ[5] SB_CLK#[1] SB_CLK_DDR#1 12
DDR_A_D6 SA_DQ[5] SA_CLK#[1] DDR_B_D6 D9 R10
C2 V10 DDRA_CKE1_DIMMA 11 SB_DQ[6] SB_CKE[1] DDRB_CKE1_DIMMB 12
DDR_A_D7 SA_DQ[6] SA_CKE[1] DDR_B_D7
C3 D8
DDR_A_D8 SA_DQ[7] DDR_B_D8 SB_DQ[7]
F10 G4
F8 F4
G10 AB4 F1 AB2
DDR_A_D11 SA_DQ[10] SA_CLK[2] DDR_B_D11 SB_DQ[10] SB_CLK[2]
G9 AA4 G1 SB_DQ[11] AA2
DDR_A_D12 SA_DQ[11] SA_CLK#[2] DDR_B_D12 SB_CLK#[2]
F9 W9 G5 SB_DQ[12] T9
DDR_A_D13 SA_DQ[12] SA_CKE[2] DDR_B_D13 SB_CKE[2]
F7 F5 SB_DQ[13]
G8 F2 SB_DQ[14]
G7 G2 SB_DQ[15]
K4 AB3 J7 SB_DQ[16] AA1
DDR_A_D17 SA_DQ[16] SA_CLK[3] DDR_B_D17 SB_CLK[3]
K5 AA3 J8 SB_DQ[17] AB1
DDR_A_D18 SA_DQ[17] SA_CLK#[3] DDR_B_D18 SB_CLK#[3]
K1 W10 K10 SB_DQ[18] T10
DDR_A_D19 SA_DQ[18] SA_CKE[3] DDR_B_D19 SB_CKE[3]
J1 K9 SB_DQ[19]
DDR_A_D21 J5 J9
SA_DQ[20] DDR_B_D21 SB_DQ[20]
J4 J10
K8 AD3
DDR_A_D23 J2 SA_DQ[22] SA_CS#[0] AK3 DDRA_CS0_DIMMA# 11 DDR_B_D23
K7
SB_DQ[22] SB_CS#[0] DDRB_CS0_DIMMB# 12
AE3
DDR_A_D24 K2 SA_DQ[23] SA_CS#[1] AL3 DDRA_CS1_DIMMA# 11 DDR_B_D24
M5
SB_DQ[23] SB_CS#[1] DDRB_CS1_DIMMB# 12
M8 AD6
DDR_A_D25 SA_DQ[24] SA_CS#[2] AG1 DDR_B_D25
N4
SB_DQ[24] SB_CS#[2]
AE6
N10
DDR_A_D26 SA_DQ[25] SA_CS#[3] AH1 DDR_B_D26
N2
SB_DQ[25] SB_CS#[3]
DDR_A_D27 N8 DDR_B_D27 SB_DQ[26]
SA_DQ[26] N1
DDR_A_D28 N7 DDR_B_D28 SB_DQ[27]
SA_DQ[27] M4
DDR_A_D29 M10 DDR_B_D29 SB_DQ[28]
SA_DQ[28]
DDR_A_D30 M9 SA_ODT[0] AH3 SA_ODT0 11 DDR_B_D30
N5
SB_DQ[29] SB_ODT[0] AE4 SB_ODT0 12
DDR SYSTEM MEMORY B

SA_DQ[29]
DDR_A_D31 N9 SA_ODT[1] AG3
SA_ODT1 11 M2 SB_ODT[1] AD4 SB_ODT1 12
DDR SYSTEM MEMORY A

SA_DQ[30] DDR_B_D31 SB_DQ[30]
M1
DDR_A_D32 M7
SA_DQ[31] SA_ODT[2] AG2 DDR_B_D32 SB_DQ[31] SB_ODT[2] AD5
AM5
DDR_A_D33 AG6
SA_DQ[32] SA_ODT[3] AH2 DDR_B_D33 SB_DQ[32] SB_ODT[3] AE5
DDR_A_D34 AG5 DDR_B_D34 AM6 SB_DQ[33]
SA_DQ[33] AR3
DDR_A_D35 AK6 DDR_B_D35 SB_DQ[34]
DDR_A_D36 SA_DQ[34] AP3
AK5 SA_DQ[35] DDR_B_D36 SB_DQ[35]
C DDR_A_D37 AH5 DDR_A_DQS#0 DDR_A_DQS#[0..7] 11 DDR_B_D37 AN3 SB_DQ[36] DDR_B_DQS#[0..7] 12 C
SA_DQ[36] D7 DDR_B_DQS#0
DDR_A_D38 AH6 C4 DDR_A_DQS#1 DDR_B_D38 AN2 SB_DQ[37] SB_DQS#[0] DDR_B_DQS#1
SA_DQ[37] SA_DQS#[0] AN1 F3
DDR_A_D39 AJ5 G6 DDR_A_DQS#2 DDR_B_D39 SB_DQ[38] SB_DQS#[1] DDR_B_DQS#2
SA_DQ[38] SA_DQS#[1] AP2 K6
DDR_A_D40 AJ6 J3 DDR_A_DQS#3 DDR_B_D40 SB_DQ[39] SB_DQS#[2] DDR_B_DQS#3
SA_DQ[39] SA_DQS#[2] AP5 N3
DDR_A_D41 AJ8 M6 DDR_A_DQS#4 DDR_B_D41 SB_DQ[40] SB_DQS#[3] DDR_B_DQS#4
DDR_A_D42 SA_DQ[40] SA_DQS#[3] AN9 AN5
AK8 SA_DQS#[4] AL6 DDR_A_DQS#5 DDR_B_D42 SB_DQ[41] SB_DQS#[4] DDR_B_DQS#5
DDR_A_D43 SA_DQ[41] AM8 DDR_A_DQS#6 AT5 AP9
AJ9 SA_DQS#[5] DDR_B_D43 SB_DQ[42] SB_DQS#[5] DDR_B_DQS#6
DDR_A_D44 SA_DQ[42] AR12 DDR_A_DQS#7 AT6 AK12
AK9 SA_DQS#[6] DDR_B_D44 SB_DQ[43] SB_DQS#[6] DDR_B_DQS#7
DDR_A_D45 SA_DQ[43] AM15 AP6 AP15
AH8 SA_DQS#[7] DDR_B_D45 SB_DQ[44] SB_DQS#[7]
DDR_A_D46 SA_DQ[44] DDR_B_D46 AN8
AH9 SB_DQ[45]
DDR_A_D47 SA_DQ[45] AR6
AL9 DDR_B_D47 SB_DQ[46]
DDR_A_D48 SA_DQ[46] AR5
AL8 DDR_B_D48 SB_DQ[47]
DDR_A_D49 SA_DQ[47] DDR_A_DQS0 DDR_A_DQS[0..7] 11 DDR_B_D49 AR9 DDR_B_DQS[0..7] 12
AP11 SB_DQ[48] DDR_B_DQS0
DDR_A_D50 SA_DQ[48] D4 DDR_A_DQS1 AJ11 SB_DQS[0] C7
AN11 SA_DQS[0] DDR_B_D50 SB_DQ[49] DDR_B_DQS1
DDR_A_D51 SA_DQ[49] F6 DDR_A_DQS2 DDR_B_D51 AT8 SB_DQS[1] G3
AL12 SA_DQS[1] SB_DQ[50] DDR_B_DQS2
DDR_A_D52 SA_DQ[50] K3 DDR_A_DQS3 DDR_B_D52 AT9 SB_DQS[2] J6
AM12 SA_DQS[2] SB_DQ[51] DDR_B_DQS3
DDR_A_D53 SA_DQ[51] N6 DDR_A_DQS4 DDR_B_D53 AH11 SB_DQS[3] M3
AM11 SA_DQS[3] SB_DQ[52] AN6 DDR_B_DQS4
DDR_A_D54 SA_DQ[52] AL5 DDR_A_DQS5 DDR_B_D54 AR8 SB_DQS[4]
AL11 SA_DQS[4] SB_DQ[53] DDR_B_DQS5
DDR_A_D55 SA_DQ[53] AM9 DDR_A_DQS6 DDR_B_D55 AJ12 AP8
AP12 SA_DQS[5] SB_DQ[54] SB_DQS[5] DDR_B_DQS6
DDR_A_D56 SA_DQ[54] AK11
AN12 SA_DQS[6] AR11 DDR_A_DQS7 DDR_B_D56 AH12 SB_DQ[55] SB_DQS[6] DDR_B_DQS7
DDR_A_D57 SA_DQ[55] DDR_B_D57 AT11 SB_DQS[7] AP14
AJ14 SA_DQS[7] AM14 SB_DQ[56]
DDR_A_D58 SA_DQ[56] DDR_B_D58 AN14
DDR_A_D59 AH14 SA_DQ[57] SB_DQ[57]
AL15 DDR_B_D59 AR14 SB_DQ[58]
DDR_A_D60 SA_DQ[58] DDR_B_D60 AT14
DDR_A_D61 AK15 SA_DQ[59]
SB_DQ[59]
DDR_A_MA0 DDR_A_MA[0..15] 11 DDR_B_D61 AT12 DDR_B_MA0 DDR_B_MA[0..15] 12
DDR_A_D62 AL14 SB_DQ[60] AA8
SA_DQ[60] AD10 DDR_A_MA1 DDR_B_D62 AN15 SB_MA[0] DDR_B_MA1
DDR_A_D63 AK14 SA_MA[0] SB_DQ[61] T7
SA_DQ[61] W1 DDR_A_MA2 DDR_B_D63 AR15 SB_MA[1] DDR_B_MA2
AJ15 SA_MA[1] SB_DQ[62] R7
SA_DQ[62] W2 DDR_A_MA3 AT15 SB_MA[2] DDR_B_MA3
AH15 SA_MA[2] SB_DQ[63] T6
SA_DQ[63] W7 DDR_A_MA4 SB_MA[3] DDR_B_MA4
SA_MA[3] DDR_A_MA5 T2
V3 SB_MA[4] DDR_B_MA5
SA_MA[4] DDR_A_MA6 T4
SA_MA[5] T3
B SA_MA[6] W3 DDR_A_MA7 AA9 SB_MA[6] DDR_B_MA7 B
11 DDR_A_BS0 12 DDR_B_BS0 R2
AE10 SA_BS[0] SA_MA[7] W6 DDR_A_MA8 AA7
SB_BS[0] SB_MA[7] DDR_B_MA8
11 DDR_A_BS1 AF10 DDR_A_MA9 12 DDR_B_BS1 SB_BS[1] T5 DDR_B_MA9
SA_BS[1] V1 R6 SB_MA[8]
11 DDR_A_BS2 SA_MA[8] 12 DDR_B_BS2 R3
V6 SA_BS[2] SA_MA[9] W5 DDR_A_MA10 SB_BS[2] SB_MA[9] DDR_B_MA10
AB7
SA_MA[10] AD8 DDR_A_MA11 SB_MA[10] DDR_B_MA11
DDR_A_MA12 R1
SA_MA[11] DDR_A_MA13 T1 DDR_B_MA13
W4 AA10 SB_MA[12]
11 DDR_A_CAS# AE8 SA_MA[12] DDR_A_MA14 12 DDR_B_CAS# SB_CAS# AB10 DDR_B_MA14
SA_CAS# AF8 DDR_A_MA15 AB8 SB_MA[13]
11 DDR_A_RAS# AD9 SA_MA[13] 12 DDR_B_RAS# SB_RAS# R5 DDR_B_MA15
SA_RAS# V5 AB9 SB_MA[14]
11 DDR_A_WE# AF9 SA_MA[14] 12 DDR_B_WE# SB_WE# R4
SA_WE# V7 SB_MA[15]
SA_MA[15]
Sandy Bridge_rPGA_Rev0p61 CONN@ CONN@
Follow CRB1.0 +1.5V
DIMMreset
1
@ R184
0_0402_5% R217
CPU
1 2 1K_0402_5%
R155
2
SM_DRAMRST# DIMM_DRAMRST#_R 1K_0402_5%

5 SM_DRAMRST# DIMM_DRAMRST# 11,12
S
3 1 1 2
Q12
2
BSS138_NL_SOT23-3
S0
R186
G
2
A 4.99K_0402_1% RST_GATE hgih ,MOS ON A

SM_DRAMRST# HIGH,DIMM_DRAMRST# HIGH
Dimm not reset
1
S3
11,12,14 RST_GATE RST_GATE Low ,MOS OFF
SM_DRAMRST# lo,DIMM_DRAMRST# HIGH
Dimm not reset
1 S4,5 Security Classification Compal Secret Data Compal Electronics, Inc.
RST_GATE Low ,MOS OFF Issued Date 2010/10/15 Deciphered Date 2011/10/15 Title
C293
2
0.047U_0402_16V7K SM_DRAMRST# lo,DIMM_DRAMRST# low
PROCESSOR(3/7) DDRIII
Dimm reset Size Document Number Rev
Custom 0.4
5 4 3 2 1
5 4 3 2 1
CFG Straps for Processor
CFG2
1
R112
1K_0402_5%
2
D D
JCPU1E PEG Static Lane Reversal - CFG2 is for the 16x
RSVD28
L7 1: Normal Operation; Lane # definition matches
RSVD29 AG7 CFG2 socket pin map definition
CFG0 AK28 AE7
CFG[0] RSVD30
AK29 CFG[1] AK2
CFG2 RSVD31
AL26 W8 0:Lane Reversed
CFG4
CFG5
AL27
AK26
CFG[2]
CFG[3]
CFG[4]
RSVD32
* CFG4
AL29 CFG[5] AT26
CFG6 RSVD33
AL30 CFG[6] AM33
1
CFG7 RSVD34 @
AM31 CFG[7] AJ27
RSVD35
AM32 CFG[8]
AM30 R109
CFG[9] 1K_0402_5%
AM28
CFG[10]
AM26
2
CFG[11]
AN28
CFG[12]
AN31 T8
CFG[13] RSVD37
AN26 J16
CFG[14] RSVD38
AM27 H16
CFG[15] RSVD39
AK31 G16
CFG[16] RSVD40
AN29
CFG[17]
Display Port Presence Strap
C C
1 : Disabled; No Physical Display Port
AJ31
AH31
RSVD1
RSVD2
RSVD41
RSVD42
RSVD43
AR35
AT34
AT33
CFG4 * attached to Embedded Display Port
AJ33 RSVD44 AP35
RSVD3 AR34 0 : Enabled; An external Display Port device is
AH33 RSVD45
RSVD4
connected to the Embedded Display Port
AJ26
RSVD5
RESERVED
RSVD6 and RSVD7 had changed to
SA_DIMM_VREFDQ and SB_DIMMVREFDQ CFG6
B34
SA_DIMM_VREFDQ RSVD46
11 SA_DIMM_VREFDQ B4 A33
SB_DIMM_VREFDQ RSVD6 RSVD47 CFG5
12 SB_DIMM_VREFDQ D1 A34
RSVD7 RSVD48
B35
1
RSVD49
SA_DIMM_VREFDQ C35
1
1
RSVD50 R107 R108

SB_DIMM_VREFDQ F25 1K_0402_5% @ @ 1K_0402_5%
R154 R164 RSVD8
For Future CPU M3 support, 1K_0402_5% 1K_0402_5%
F24 RSVD9
F23
2
Sandey bridge not supportM3, D24
RSVD10 AJ32
2
2
RSVD11 RSVD51
Check list1.0&CRB say can NC G25 RSVD12 RSVD52
AK32
G24
RSVD13 AH27 change to VCC_DIE_SENSE
E23
RSVD14
D23 RSVD15
C30 AH27 PAD T7
RSVD16 RSVD53
A31 @
RSVD17
B30 RSVD18
B29 PCIE Port Bifurcation Straps
RSVD19
VCCIO_SEL D30 RSVD20 AN35
B31 RSVD54
RSVD21 AM35
RSVD55 RSVD54 and RSVD55 had changed to 11: (Default) x16 - Device 1 functions 1 and 2 disabled
A30
*10: x8, x8 - Device 1 function 1 enabled ; function 2
1
RSVD22
B C29 RSVD23 BCLK_ITP and BCLK_ITP# B
R513 CFG[6:5]
@ 10K_0402_5% disabled
J20 RSVD24
B18 AT2 01: Reserved - (Device 1 function 1 disabled ; function
2
VCCIO_SEL RSVD25 RSVD56

A19
RSVD26 RSVD57
AT1 2 enabled)
AR1
RSVD58 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
VCCIO_SEL For 2012 CPU support J15 RSVD27
1/NC : (Default) +1.05VS_VTT

A19 * 0: +1.0VS_VTT
KEY
B1 CFG7
1
R102
RSVD26 had changed the name to VCCIO_SEL @ 1K_0402_5%
Need PH +3VALW 10K at +1.05VS_VTT source
2
for 2012 processor +1.05V and +1.0V select
CONN@
PEG DEFER TRAINING
1: (Default) PEG Train immediately following xxRESETB

CFG7 de assertion
A
0: PEG Wait for BIOS for training A
Security Classification
2010/10/15
Compal Secret Data
2011/10/15 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
PROCESSOR(4/7) RSVD,CFG
Custom 0.4
5 4 3 2 1
5 4 3 2 1
SV type CPU JCPU1F POWER

+CPU_CORE
QC 94A
+1.05VS_VTT
DC 53A 8.5A
AG35
VCC1 +1.05VS_VTT
1 1 1 1 1 AG34 AH13
VCC2 VCCIO1
22U_0805_6.3V6M
10U_0805_10V4Z
C204
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
10U_0805_10V4Z
C206
22U_0805_6.3V6M
10U_0805_10V4Z
C202
22U_0805_6.3V6M
10U_0805_10V4Z
C205
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
10U_0805_10V4Z
C203
AG33 AH10 1 1 1 1 1 1 1 1 1 1
VCC3 VCCIO2
AG32 AG10
VCC4 VCCIO3
C292
C652
C229
C288
C647
C641
C232
C291
C290
C289
2 AG31 AC10
2 2 2 2 VCC5 VCCIO4
AG30 Y10 2
D VCC6 VCCIO5 2 2 2 2 2 2 2 2 2 D
AG29 U10
VCC7 VCCIO6
AG28 VCC8 P10
VCCIO7
AG27 VCC9 L10
VCCIO8
AG26 VCC10 J14
VCCIO9
AF35 J13
VCC11 VCCIO10
1 1 1 1 1 AF34 J12
VCC12
10U_0805_10V4Z
C222
220U_B2_2.5VM_R35
10U_0805_10V4Z
C207
22U_0805_6.3V6M
VCCIO11
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
10U_0805_10V4Z
C223
10U_0805_10V4Z
C227
10U_0805_10V4Z
C218
AF33 J11 1 1 1 1 1 1 1
VCC13
330U_D2_2V_Y
VCCIO12
330U_D2_2V_Y
AF32 H14 R02 modify
VCC14
C638
C816
+
C648
VCCIO13 +
C651
C649
C650
C616
AF31 +
2 2 2 2 VCC15 H12
2 AF30 VCCIO14 @ @ @
VCC16 H11 2 2 2 2
AF29 VCCIO15 ME interefer,not pop!!
VCC17 G14 2 2 2
AF28 VCCIO16
VCC18 VCCIO17 G13
PEG AND DDR

AF27 G12
VCC19 VCCIO18 @
AF26 F14
VCC20 VCCIO19
AD35 F13
VCC21 VCCIO20
+CPU_CORE AD34 F12
VCC22 VCCIO21
AD33 F11
VCC23 VCCIO22
AD32
AD31
VCC24 VCCIO23 E14
E12
INTEL Recommend
VCC25 VCCIO24
1 1 1 1 1 1
1 1
AD30
AD29
VCC26
E11
2*330uF,12*22uF
22U_0805_6.3V6M
C622
22U_0805_6.3V6M
C171
VCC27
22U_0805_6.3V6M
C574
22U_0805_6.3V6M
C160
22U_0805_6.3V6M
C627
22U_0805_6.3V6M
C575
VCCIO25
22U_0805_6.3V6M
C635
22U_0805_6.3V6M
C172
AD28
AD27
VCC28
VCC29
VCCIO26
VCCIO27
D14
D13 from PDDG 1.0
2 2 2 2 2 2 AD26 VCC30 D12
2 2 AC35 VCCIO28
VCC31 D11
AC34 VCCIO29
VCC32 C14
AC33 VCCIO30
VCC33 C13
AC32 VCCIO31
VCC34 VCCIO32 C12
AC31 VCC35 C11
AC30 VCCIO33
VCC36 B14
INTEL Recommend
22U_0805_6.3V6M
1 1 1 1 1 AC29 VCCIO34
B12
22U_0805_6.3V6M
C609
22U_0805_6.3V6M
C608
1 1 1 VCC37
22U_0805_6.3V6M
C610
C606
22U_0805_6.3V6M
C224
VCCIO35
22U_0805_6.3V6M
C607
22U_0805_6.3V6M
C225
AC28
22U_0805_6.3V6M
C226
C
VCC38 VCCIO36 A14 C
4*470uF,16*22uF and 10*10uF 2 2 2

AC27
AC26
VCC39 VCCIO37 A13
A12
2 2 2 2 VCC40 VCCIO38
2
from PDDG 1.0 AA35
AA34
VCC41
VCC42
VCCIO39 A11
AA33 J23
VCC43 VCCIO40
AA32
VCC44
AA31
VCC45
AA30 VCC46
AA29 VCC47
AA28 VCC48
AA27 VCC49
+CPU_CORE AA26 +1.05VS_VTT +1.05VS_VTT
VCC50
CORE SUPPLY
Follow Power Suggestion , Y35 VCC51
Y34 VCC52
place 3-pin Cap for CPU_CORE Y33
1
VCC53
1
Y32 VCC54 R447
Y31 VCC55 R450 75_0402_1%
1 1 1
1 Y30
470U_D2_2VM_R4M
130_0402_5%
470U_D2_2VM_R4M
470U_D2_2VM_R4M
1 VCC56
470U_D2_2VM_R4M
470U_D2_2VM_R4M
Y29
C626
+
C233
+
C562
+ VCC57
C151
2
C152
+ Y28 VCC58
2
Y27 VCC59
2 3 2 3 2 3 Y26 R448
2 3 VCC60
2 3 V35 H_CPU_SVIDALRT# 43_0402_1%
SVID
VCC61 AJ29 H_CPU_SVIDCLK VR_SVID_ALRT# 55
V34 VCC62 VIDALERT# 1 2
AJ30 H_CPU_SVIDDAT VR_SVID_CLK 55
V33 R446 2 0_0402_5%
PAW00 V32
VCC63
VCC64
VIDSCLK
VIDSOUT
AJ28
R449 1 1 2 0_0402_5% VR_SVID_DAT 55
V31
use 470uF*2 V30
V29
VCC65
VCC66
VCC67
330uF*3 V28
V27
VCC68 Place the PU
B
V26
VCC69 resistors close to VR B
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79 +CPU_CORE
Place the PU
U26
R35
VCC80 resistors close to CPU
VCC81
R34
VCC82
1
R33
VCC83
R32 R445
VCC84
R31 100_0402_1%
VCC85
R30 VCC86
R29
SENSE LINES
VCC87 VCCSENSE_R
2
R28 VCC88 R444 1 0_0402_5% VCCSENSE 55
VSSSENSE_R
AJ35 2
R27 VCC89 VCC_SENSE R443 1 2 0_0402_5% VSSSENSE 55
R26 AJ34
VCC90 VSS_SENSE
P35 VCC91
P34 VCC92
1
P33 VCC93 VSSIO_SENSE VCCIO_SENSE 53
P32 VCC94 B10 R442
P31 VCCIO_SENSE A10
VSSIO_SENSE
VSSIO_SENSE
1
VCC95 100_0402_1%
P30 VCC96 change to
P29 VCC97 VSS_SENSE_VCCIO R163
2
P28 VCC98
P27 10_0402_5%
VCC99
P26
2
VCC100 Should change to connect form
A A
power cirucit & layout differential
with VCCIO_SENSE.
IssuedCONN@
Date 2010/10/15 Deciphered Date 2011/10/15 Title
PROCESSOR(5/7) PWR,BYPASS
Custom 0.4
5 4 3 2 1
5 4 3 2 1
D D
INTEL Recommend
2*470uF,12*22uF
+VGFX_CORE
from PDDG 1.0 QC 33A JCPU1G
POWER
DC 26A
SENSE
LINES
AT24 AK35 VCC_AXG_SENSE 55
VAXG1 VAXG_SENSE
1
UMA@ UMA@ UMA@ UMA@ UMA@ UMA@ AT23 AK34 VSS_AXG_SENSE 55

VAXG2 VSSAXG_SENSE
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
R151
22U_0805_6.3V6M
22U_0805_6.3V6M
1 1 1 1 1 1 AT21
C625
VAXG3
C211
C231
C272
C611
C212
0_0402_5% AT20 +1.5V_CPU_VDDQ
VAXG4
DISO@ AT18
VAXG5
2 2 AT17
2
2 2 2 2 VAXG6
AR24
VAXG7 +V_SM_VREF should
1
C AR23 C
VAXG8
AR21 VAXG9 have 20 mil trace width R582
AR20 VAXG10 100_0402_1%
VREF
AR18 VAXG11
AR17 VAXG12 +V_SM_VREF
2
AP24 AL1
VAXG13 SM_VREF
AP23 VAXG14
UMA@ UMA@
1
UMA@ UMA@ UMA@ UMA@ AP21 1
22U_0805_6.3V6M
VAXG15
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1 C688
22U_0805_6.3V6M
22U_0805_6.3V6M
1 1 1 AP20 R575
C209
1 1 VAXG16
C275
C271
C274
0.1U_0402_16V4Z
C210
C242
AP18 VAXG17 100_0402_1%
AP17 VAXG18 2
2 2 2 2 AN24 VAXG19
2
2 2 AN23 VAXG20
AN21 VAXG21 +1.5V_CPU_VDDQ
AN20 VAXG22 +1.5V
DDR3 -1.5V RAILS

AN18 VAXG23 J1
AN17 VAXG24
10A
GRAPHICS
AM24 1 2
VAXG25 VDDQ1 AF7
AM23 VAXG26 AF4
VDDQ2 PAD-OPEN 4x4m
AM21 AF1 1
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
VAXG27 @
330U_D2_2V_Y
VDDQ3 1 1 1 1 1
10U_0805_10V4Z
AM20 AC7
22U_0805_6.3V6M
VAXG28 1
C355
VDDQ4
22U_0805_6.3V6M
1 1 +
22U_0805_6.3V6M
22U_0805_6.3V6M
1 1 AM18 AC4 +1.5VS
C362
C599
C365
330U_D2_2V_Y
C363
C361
1 1
C341
VAXG29
330U_D2_2V_Y
VDDQ5
C208
C273
C364
C600
AM17 AC1
C646
@ + VAXG30
C645
+ UMA@ VDDQ6 J2
AL24 Y7 2 2 2 2 2 2
@ VAXG31 VDDQ7 2 1 2
2 @ UMA@ 2 AL23 Y4
2 VAXG32 VDDQ8
2 2 UMA@ 2 AL21
VAXG33 VDDQ9
Y1
AL20 U7 PAD-OPEN 4x4m
VAXG34 VDDQ10 @
AL18 U4
VAXG35 VDDQ11
AL17 U1
VAXG36 VDDQ12
AK24 P7
AK23
VAXG37 VDDQ13
P4 Short for +1.5VS to +1.5V_1
Vaxg AK21
VAXG38 VDDQ14
P1
VAXG39 VDDQ15
INTEL Recommend
Can connect to GND if motherboard only
B AK20 B
VAXG40
AK18
AK17
VAXG41
VAXG42 INTEL Recommend 1*330uF,6*10uF
supports external graphics and if GFX VR is not AJ24
VAXG43
AJ23 1*330uF,3*10uF from PDDG 1.0
VAXG can be left floating in a common
stuffed in a common motherboard design, AJ21
VAXG44
VAXG45
AJ20
AJ18
VAXG46 from PDDG 1.0
motherboard design (Gfx VR keeps VAXG from AJ17
VAXG47 +VCCSA
floating) if the VR is stuffed
VAXG48 6A
SA RAIL
AH24 VAXG49
AH23 +VCCSA
VAXG50
AH21 VAXG51 M27
VCCSA1
AH20 VAXG52 M26
VCCSA2
10U_0805_10V4Z
AH18 VCCSA_SENSE
10U_0805_10V4Z
L26
10U_0603_6.3V6M
1 R1371 2 0_0402_5%
10U_0805_10V4Z
VAXG53 VCCSA3 1 1 1
AH17 VAXG54 J26
VCCSA4
C219
220U_B2_2.5VM_R35
C221
C605
J25 If possible,use os-con cap
C213
C214
VCCSA5 1
J24 @
VCCSA6
H26 2 2 2 + if not,use the D2 size
VCCSA7 2
H25
VCCSA8
R1411 2 0_0402_5%
1.8V RAIL
2 VSSSA_SENSE 52
+1.8VS
R528
1.2A
0_0805_5%
+1.8VS_VCCPLL
1 2 VCCSA_SENSE 52
B6 H23
MISC
VCCPLL1 VCCSA_SENSE
A6
220U_B2_2.5VM_R35
C664
1U_0402_6.3V6K
C653
1 1 VCCPLL2
1U_0402_6.3V6K
C654
1 A2 VCCSA
VCCPLL3 VCCSA_VID0
10U_0805_10V4Z
C655
+ 1
C22 VCCSA_VID1 VID0 VID1 Vout 2011CPU 2012CPU
FC_C22 VCCSA_VID1 52
2 C24
2 VCCSA_VID1 0 0 0.9V V V
2 FC_C22
1
2
A change to R143
0 1 0.8V V V A
10K_0402_5% R138
Sandy Bridge_rPGA_Rev0p61 VCCSA_VID0 @ 0_0402_5%
1 0 0.725V X V
INTEL Recommend
1
CONN@
2
1 1 0.675V X V
1*330uF,1*10uF and 2*1uF(0402)
from PDDG 1.0 Security Classification Compal Secret Data Compal Electronics, Inc.
PROCESSOR(6/7) PWR
Custom 0.4
5 4 3 2 1
5 4 3 2 1
JCPU1H JCPU1I
D D
AT35 AJ22
VSS1 VSS81
AT32 AJ19
VSS2 VSS82
AT29 AJ16 T35 F22
VSS3 VSS83 VSS161 VSS234
AT27 VSS4 AJ13 T34 F19
VSS84 VSS162 VSS235
AT25 AJ10 T33 E30
AT22 VSS6 AJ7 T32 E27
VSS86 VSS164 VSS237
AT19 VSS7 AJ4 T31 E24
VSS87 VSS165 VSS238
AT16 AJ3 T30 E21
AT13 AJ2 T29 E18
AT10 AJ1 T28 E15
AT7 AH35 T27 E13
AT4 VSS12 AH34 T26 E10
VSS92 VSS170 VSS243
AT3 AH32 P9 E9
AR25 AH30 P8 E8
AR22 AH29 P6 E7
AR19 AH28 P5 E6
AR16 AH26 P3 E5
AR13 AH25 P2 E4
AR10 AH22 N35 E3
AR7 AH19 N34 E2
AR4 AH16 N33 E1
AR2 AH7 N32 D35
AP34 VSS23 AH4 N31 D32
AP31 VSS103 VSS181 VSS254
VSS24 VSS104 AG9 N30 D29
AP28 AG8 VSS182 VSS255
VSS25 VSS105 N29 VSS183 D26
AP25 AG4 N28 VSS256
VSS26 VSS106 VSS184 VSS257 D20
AP22 VSS27 AF6 N27 D17
AP19 VSS107 VSS185 VSS258
VSS28 VSS108 AF5 N26 C34
AP16 AF3 VSS186 VSS259
VSS29 VSS109 M34 VSS187 C31
AP13 AF2 L33 VSS260
VSS30 VSS110 VSS188 C28
AP10 AE35 L30 VSS261
AP7 AE34 L27 VSS262
C VSS32 VSS112 VSS190 C25 C
AP4 AE33 L9 VSS263
AP1 AE32 L8 VSS264
AN30 AE31 L6 VSS265
AN27 AE30 L5 VSS266
VSS36 VSS116 VSS194 B22
AN25 VSS267
AN22
AN19
VSS37
VSS38
VSS39
VSS VSS117
VSS118
AE29
AE28
AE27
L4
L3
L2
VSS195
VSS196 VSS VSS268
VSS269
B19
B17
VSS119 VSS197 VSS270 B15
AN16 VSS40 AE26 L1
AN13 VSS120 VSS198 VSS271 B13
VSS41 AE9 K35 B11
AN10 VSS121 VSS199 VSS272
VSS42 AD7 K32 B9
VSS43 AC9 K29 B8
VSS44 AC8 K26 B7
AM29 VSS124 VSS202 VSS275
VSS45 AC6 J34 B5
VSS46 AC5 J31 B3
VSS47 AC3 H33 B2
VSS48 AC2 H30 A35
VSS49 AB35 H27 A32
VSS50 AB34 H24 A29
VSS51 AB33 H21 A26
VSS52 AB32 H18 A23
VSS53 AB31 H15 A20
VSS54 AB30 H13
AM2 VSS134 VSS212 A3
VSS55 AB29 H10 VSS285
AM1 VSS135 VSS213
VSS56 AB28 H9
AL34 VSS136 VSS214
VSS57 AB27 H8
AL31 VSS137 VSS215
VSS58 AB26 H7
AL28 VSS138 VSS216
VSS59 Y9 H6
AL25 VSS139 VSS217
VSS60 VSS140 Y8 H5
AL22 Y6 VSS218
VSS61 VSS141 H4
AL19 Y5 VSS219
VSS62 VSS142 H3
AL16 Y3 VSS220
VSS63 VSS143 H2
AL13 Y2 VSS221
B VSS64 VSS144 H1 B
AL10 W35 VSS222
VSS65 VSS145 G35
AL7 W34 VSS223
VSS66 VSS146 G32
AL4 VSS67 W33 VSS224
AL2 VSS147 G29 VSS225
VSS68 VSS148 W32 G26
AK33 VSS69 W31 VSS226
AK30 VSS149 G23 VSS227
AK25 VSS151 G17 VSS229
AK19 VSS153 F34 VSS231
VSS74 VSS154 W26 F31
AK16 VSS75 U9 VSS232
AK13 VSS155 F29 VSS233
VSS76 VSS156 U8
AK10 VSS77 U6
AK7 VSS157
VSS78 VSS158 U5
AK4 VSS79 U3
AJ25 VSS159
VSS80 U2
VSS160
CONN@
CONN@
A A

PROCESSOR(7/7) VSS
Custom 0.4
5 4 3 2 1
5 4 3 2 1
+1.5V
1
R320
1K_0402_5%
+1.5V +1.5V
M3 support @ R133
0_0402_5% JDIMM1
2
+V_DDR_REFA 1 VREF_DQ 2
7 SA_DIMM_VREFDQ 1 2 VSS1
3 VSS2 4 DDR_A_D4
DQ4
2.2U_0603_6.3V6K
1
0.1U_0402_16V4Z
DDR_A_D0 5 DQ0 6 DDR_A_D5
DQ5
C408
C411
DDR_A_D1 7 DQ1 8
VSS3
D
3 1 R319 1 1 9 VSS4 10 DDR_A_DQS#0
Q46 DDR_A0_DM0 DQS#0 DDR_A_DQS0
1K_0402_5% 11 DM0 12
BSS138_NL_SOT23-3 @ DQS0
13 VSS5 14
VSS6
2
DDR_A_D2 DDR_A_D6
G
D 15 DQ2 16 D
2
2 2 DDR_A_D3 DQ6 DDR_A_D7
6,12,14 RST_GATE 17 DQ3 18
DQ7
19 VSS7 20
DDR_A_D8 VSS8 DDR_A_D12
DDR_A_DQS#[0..7] 6 21 DQ8 22
DDR_A_D9 DQ12 DDR_A_D13
23 DQ9 24
DQ13
DDR_A_DQS[0..7] 6 25 VSS9 26
DDR_A_DQS#1 VSS10 DDR_A0_DM1
27 DQS#1 28
DDR_A_DQS1 DM1 DDR3_DRAMRST#
DDR_A_D[0..63] 6 29 30 DIMM_DRAMRST# 6,12
DQS1 RESET#
All VREF traces should DDR_A_D10 31 VSS11
VSS12 32
DDR_A_D14
DDR_A_MA[0..15] 6 33 DQ10 34
have 10 mil trace width DDR_A_D11
35 DQ11
DQ14
36
DDR_A_D15
DQ15
DDR_A_D16 37 VSS13 38
VSS14 DDR_A_D20
DDR_A_D17 39 DQ16 40
DQ20 DDR_A_D21
41 DQ17 42
Layout Note: DQ21
DDR_A_DQS#2 43 VSS15 44
VSS16 DDR_A0_DM2
Place near JDIMM1 DDR_A_DQS2 45 DQS#2 46
DM2
+1.5V 47 DQS2 48
VSS17 DDR_A_D22
DDR_A_D18 49 VSS18 50 DDR_A_D23
DQ22
DDR_A_D19 51 DQ18 52
DQ23
53 DQ19 54 DDR_A_D28
VSS19
DDR_A_D24 55 VSS20 56 DDR_A_D29
1U_0402_6.3V6K
C409
DQ28
1U_0402_6.3V6K
C385
1U_0402_6.3V6K
C410
1U_0402_6.3V6K
C371
DDR_A_D25 57 DQ24 58
1 DQ29
1 59 DQ25 60 DDR_A_DQS#3
1 1 VSS21
DDR_A0_DM3 61 VSS22 62 DDR_A_DQS3
DQS#3
63 DM3 64
DQS3
2 2 DDR_A_D26 65 VSS23 66 DDR_A_D30
2 2 VSS24
DDR_A_D27 67 DQ26 68 DDR_A_D31
DQ30
69 DQ27 70
DQ31
71 VSS25 72
VSS26
DDRA_CKE0_DIMMA DDRA_CKE1_DIMMA
6 DDRA_CKE0_DIMMA 73 74 DDRA_CKE1_DIMMA 6
+1.5V CKE0 CKE1
75 VDD1 76 DDR_A_MA15
VDD2
DDR_A_BS2 77 NC1 78 DDR_A_MA14
6 DDR_A_BS2 A15
79 80
BA2 A14
DDR_A_MA12 81 82 DDR_A_MA11
10U_0603_6.3V6M
C378
C C
10U_0603_6.3V6M
C415
10U_0603_6.3V6M
C384
10U_0603_6.3V6M
C414
VDD3 VDD4
1 1 1 1 A12/BC# A11
85 A9 86
A7
VDD5 VDD6
A8 A6
2 2 2 2 91 92
DDR_A_MA3 A5 A4
93 94 DDR_A_MA2
DDR_A_MA1 VDD7 VDD8
95 96 DDR_A_MA0
A3 A2
97 98
SA_CLK_DDR0 A1 A0 SA_CLK_DDR1
99 100
6 SA_CLK_DDR0 SA_CLK_DDR#0 VDD9 VDD10 SA_CLK_DDR1 6
101 102 SA_CLK_DDR#1
6 SA_CLK_DDR#0 CK0 CK1 SA_CLK_DDR#1 6 +1.5V
103 CK0# 104
DDR_A_MA10 CK1# DDR_A_BS1
105 VDD11 106
DDR_A_BS0 VDD12 DDR_A_RAS# DDR_A_BS1 6
+1.5V 107 108
6 DDR_A_BS0 A10/AP BA1 DDR_A_RAS# 6
109 110
DDR_A_WE# BA0 RAS# DDRA_CS0_DIMMA#
111 112
1
6 DDR_A_WE# DDR_A_CAS# VDD13 VDD14 SA_ODT0 DDRA_CS0_DIMMA# 6
6 DDR_A_CAS# 113 114 SA_ODT0 6 R267
WE# S0#
10U_0603_6.3V6M
C413
115 116
10U_0603_6.3V6M
C412
10U_0603_6.3V6M
1 DDR_A_MA13 CAS# ODT0 SA_ODT1 1K_0402_5%

117 118
330U_D2_2V_Y
1 1 1 DDRA_CS1_DIMMA# VDD15 VDD16 SA_ODT1 6

119 120
C407
+
C383
6 DDRA_CS1_DIMMA# A13 ODT1
2
121 122
S1# NC2 +VREF_CA
123 VDD17 124
2 VDD18
2 2 2 125 126
DDR_A_D32 NCTEST VREF_CA DDR_A_D36
127 128
2.2U_0603_6.3V6K
DDR_A_D33 VSS27 VSS28 DDR_A_D37
0.1U_0402_16V4Z
C373
129 130
1
C372
DQ32 DQ36
131 132 1 R266
DDR_A_DQS#4 DQ33 DQ37 DDR_A0_DM4 1
@ DDR_A_DQS4 133 VSS29 134 1K_0402_5%
VSS30
135 136
DQS#4 DM4 DDR_A_D38
DDR_A_D34 137 DQS4 138
VSS31 DDR_A_D39 2
2
DDR_A_D35 139 140 2
VSS32 DQ38
141 DQ34 142
DQ39 DDR_A_D44
DDR_A_D40 143 144 DDR_A_D45
+0.75VS DQ35 VSS33
DDR_A_D41 145 146
VSS34 DQ44
147 DQ40 148 DDR_A_DQS#5
DQ45
DDR_A0_DM5 149 DQ41 150 DDR_A_DQS5
VSS35
151 152
VSS36 DQS#5
1U_0402_6.3V6K
C395
1U_0402_6.3V6K
C394
1U_0402_6.3V6K
C393
153 154
1U_0402_6.3V6K
C388
B DDR_A_D42 DM5 DQS5 DDR_A_D46 B

1 1 1 DDR_A_D43 155 156 DDR_A_D47
1 VSS37 VSS38
157 DQ42 158
DQ46
DDR_A_D48 159 DQ43 160 DDR_A_D52
DQ47
DDR_A_D49 161 162 DDR_A_D53
2 2 2 2 VSS39 VSS40
163 DQ48 164
DQ52
DDR_A_DQS#6 165 166 DDR_A0_DM6
DQ49 DQ53
DDR_A_DQS6 167 VSS41 168
VSS42
169 170 DDR_A_D54
DDR_A_D50 DQS#6 DM6
171 172 DDR_A_D55
DDR_A_D51 DQS6 VSS43
173 VSS44 174
DQ54
175 176 DDR_A_D60
Layout Note: DDR_A_D56 DQ50 DQ55
177 178 DDR_A_D61
DDR_A_D57 DQ51 VSS45
Place near JDIMM1.203,204 179 180
VSS46 DQ60
181 182 DDR_A_DQS#7
DDR_A0_DM7 DQ56 DQ61
183 184 DDR_A_DQS7
DQ57 VSS47
185 VSS48 186
DDR_A_D58 DQS#7 DDR_A_D62
DDR_A0_DM0 187 188
0_0402_5% 2 1 R315 DDR_A_D59 DM7 DQS7 DDR_A_D63
DDR_A0_DM1 189 VSS49 190
0_0402_5% 2 1 R284 VSS50
DDR_A0_DM2 191 192
0_0402_5% 2 1 R286 DQ58 DQ62
DDR_A0_DM3 193 DQ59 194
0_0402_5% 2 1 R316 DQ63 D_CK_SDATA
DDR_A0_DM4 195 196
0_0402_5% R285 +3VS VSS51 VSS52 D_CK_SCLK D_CK_SDATA 12,14
2 1 DDR_A0_DM5 197 198
0_0402_5% R318 SA0 EVENT# D_CK_SCLK 12,14
2 1 DDR_A0_DM6 199 200
0_0402_5% R283 +0.75VS VDDSPD SDA +0.75VS
DDR_A0_DM7 201 202
0_0402_5% 22 11 R312 SA1 SCL
203 204
0.1U_0402_16V4Z
C404
2.2U_0603_6.3V6K
C416
10K_0402_5%
R301
VTT1 VTT2
1
10K_0402_5%
R302
1 1 205 G1 206
FOX_AS0A626-U8SN-7F G2
CONN@
2 2
2
<Address(SA1,SA0): 00>
A
DIMM_1 Reserve H:8mm A

DDRIII DIMMA
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.4
5 4 3 2 Date: 1
Wednesday, October 27, 2010 Sheet 11 of 61
5 4 3 2 1
+1.5V
1
+1.5V +1.5V
R341 JDIMM2
1K_0402_5% +V_DDR_REFC 1 2
VREF_DQ VSS1 DDR_B_D4
M3 support @ R346
DDR_B_D0
3 VSS2 DQ4 4
DDR_B_D5
2.2U_0603_6.3V6K
0.1U_0402_16V4Z
0_0402_5% 5 6
DQ0 DQ5
2
DDR_B_D1
C438
C437
7 SB_DIMM_VREFDQ 1 2 7 8
DQ1 VSS3 DDR_B_DQS#0
1 1 9 VSS4 10
DQS#0
1
DDR_B0_DM0 11 12 DDR_B_DQS0
DM0 DQS0
13 14
DDR_B_D2 VSS5 VSS6 DDR_B_D6
D
3 1 R340 15 16
2 2 DDR_B_D3 DQ2 DQ6 DDR_B_D7
Q47 1K_0402_5% 17 DQ3 18
DQ7
BSS138_NL_SOT23-3 @ 19 20
VSS7 VSS8
2
DDR_B_D8 21 22 DDR_B_D12
G
DQ8 DQ12
2
DDR_B_D9 23 24 DDR_B_D13
6,11,14 RST_GATE DQ9 DQ13
D 25 26 D
DDR_B_DQS#1 VSS9 VSS10 DDR_B0_DM1
27 28
DDR_B_DQS1 DQS#1 DM1 DDR3_DRAMRST#
29 DQS1 30 DIMM_DRAMRST# 6,11
RESET#
DDR_B_DQS#[0..7] 6 All VREF traces should DDR_B_D10
31 VSS11 VSS12 32
DDR_B_D14
33 34
DDR_B_DQS[0..7] 6
have 10 mil trace width DDR_B_D11 35
DQ10 DQ14
36 DDR_B_D15
DQ11 DQ15
37 38
DDR_B_D[0..63] 6 39 40
DDR_B_D17 DQ16 DQ20 DDR_B_D21
41 42
DQ17 DQ21
DDR_B_MA[0..15] 6 43 VSS15 44
DDR_B_DQS#2 VSS16 DDR_B0_DM2
45 DQS#2 46
DDR_B_DQS2 DM2
47 DQS2 48
VSS17 DDR_B_D22
49 VSS18 50
DDR_B_D18 DQ22 DDR_B_D23
51 52
DDR_B_D19 DQ18 DQ23
Layout Note: 53
DQ19 VSS19
54
DDR_B_D28
55 56
Place near JDIMM2 DDR_B_D24
57
VSS20 DQ28
58
DDR_B_D29
+1.5V DDR_B_D25 DQ24 DQ29
59 60
DQ25 VSS21 DDR_B_DQS#3
61 62
DDR_B0_DM3 VSS22 DQS#3 DDR_B_DQS3
63 64
DM3 DQS3
65 66
67 68
1U_0402_6.3V6K
C444
1U_0402_6.3V6K
C430
1U_0402_6.3V6K
C429
1U_0402_6.3V6K
C445
DDR_B_D27 DQ26 DQ30 DDR_B_D31

1 69 DQ27 70
1 1 1 DQ31
71 VSS25 72
VSS26
2 2 2 2
DDRB_CKE0_DIMMB DDRB_CKE1_DIMMB
6 DDRB_CKE0_DIMMB 73 74 DDRB_CKE1_DIMMB 6
CKE0 CKE1
75 76
VDD1 VDD2 DDR_B_MA15
DDR_B_BS2 77 78 DDR_B_MA14
NC1 A15
6 DDR_B_BS2 79 80
BA2 A14
DDR_B_MA12 81 82
VDD3 VDD4 DDR_B_MA11
+1.5V DDR_B_MA9 83 A12/BC# 84 DDR_B_MA7
A11
85 A9 86
A7
DDR_B_MA8 87 VDD5 88 DDR_B_MA6
VDD6
DDR_B_MA5 89 A8 90 DDR_B_MA4
A6
91 92
C A5 A4 C
10U_0603_6.3V6M
C424
10U_0603_6.3V6M
C450
93 94
10U_0603_6.3V6M
C449
10U_0603_6.3V6M
C425
DDR_B_MA3 VDD7 VDD8 DDR_B_MA2

1 DDR_B_MA1 95 96 DDR_B_MA0
1 1 1 A3 A2
97 98
A1 A0
SB_CLK_DDR0 99 VDD9 100 SB_CLK_DDR1
6 SB_CLK_DDR0 VDD10 SB_CLK_DDR1 6
SB_CLK_DDR#0 101 CK0 102 SB_CLK_DDR#1
2 2 6 SB_CLK_DDR#0 CK1 SB_CLK_DDR#1 6
2 2 103 104 +1.5V
CK0# CK1#
DDR_B_MA10 105 VDD11 106 DDR_B_BS1
VDD12 DDR_B_BS1 6
DDR_B_BS0 107 A10/AP 108 DDR_B_RAS#
6 DDR_B_BS0 BA1 DDR_B_RAS# 6
109 BA0 110
RAS#
DDR_B_WE# 111 VDD13 112 DDRB_CS0_DIMMB#
6 DDR_B_WE# VDD14 DDRB_CS0_DIMMB# 6
113 114
1
DDR_B_CAS# WE# S0# SB_ODT0
<BOM Structure> 6 DDR_B_CAS# 115 116 SB_ODT0 6
CAS# ODT0 R351
+1.5V DDR_B_MA13 117 118 SB_ODT1 1K_0402_5%
VDD15 VDD16 SB_ODT1 6
DDRB_CS1_DIMMB# 119 A13 120
6 DDRB_CS1_DIMMB# ODT1
121 S1# 122
NC2 +VREF_CC
2
123 124
VDD17 VDD18
125 NCTEST 126
VREF_CA
127 128
10U_0603_6.3V6M
C447
DDR_B_D32 DDR_B_D36
10U_0603_6.3V6M
10U_0603_6.3V6M
C448
2.2U_0603_6.3V6K
1 VSS27 VSS28
DDR_B_D33 129 130 DDR_B_D37
C451
330U_D2_2V_Y
1 1 1 DQ32 DQ36
1
131 132
0.1U_0402_16V4Z
C446
C426
C359
+ DQ33 DQ37 1
DDR_B_DQS#4 133 134 DDR_B0_DM4 R350
VSS29 VSS30 1
DDR_B_DQS4 135 DQS#4 136 1K_0402_5%
2 DM4
2 2 2 137 138 DDR_B_D38
DQS4 VSS31
DDR_B_D34 139 140 DDR_B_D39 2
VSS32 DQ38
2
DDR_B_D35 141 142 2
DQ34 DQ39
143 DQ35 144 DDR_B_D44
DDR_B_D40 VSS33
@ 145 VSS34 146 DDR_B_D45
DDR_B_D41 DQ44
147 DQ40 148
DQ45
149 150 DDR_B_DQS#5
DDR_B0_DM5 DQ41 VSS35
151 VSS36 152 DDR_B_DQS5
DQS#5
153 154
DDR_B_D42 DM5 DQS5
+0.75VS 155 VSS37 156 DDR_B_D46
DDR_B_D43 VSS38
157 158 DDR_B_D47
DQ42 DQ46
159 DQ43 160
DDR_B_D48 DQ47 DDR_B_D52
161 VSS39 162
DDR_B_D49 VSS40 DDR_B_D53
163 164
1U_0402_6.3V6K
C440
1U_0402_6.3V6K
C427
B DQ48 DQ52 B
1U_0402_6.3V6K
C428
165 166
1U_0402_6.3V6K
C439
1 1 DDR_B_DQS#6 DQ49 DQ53 DDR_B0_DM6

1 167 168
1 DDR_B_DQS6 VSS41 VSS42
169 DQS#6 170
DM6 DDR_B_D54
171 172
2 2 DDR_B_D50 DQS6 VSS43 DDR_B_D55
173 174
2 DDR_B_D51 VSS44 DQ54
2 175 176
DQ50 DQ55 DDR_B_D60
177 DQ51 178
DDR_B_D56 VSS45 DDR_B_D61
179 180
+3VS DDR_B_D57 VSS46 DQ60
181 DQ56 182
DQ61 DDR_B_DQS#7
183 184
DDR_B0_DM7 DQ57 VSS47 DDR_B_DQS7
185 VSS48 186
DQS#7
Layout Note: 187 DM7 188
DDR_B_D58 DQS7 DDR_B_D62
189 190
10K_0402_5%
R344
Place near JDIMM2.203,204 DDR_B_D59 VSS49 VSS50 DDR_B_D63

191 192
2
DQ58 DQ62
193 194
DQ59 DQ63
195 VSS51 196 D_CK_SDATA
VSS52
DDR_B0_DM0 +3VS 197 198 D_CK_SCLK D_CK_SDATA 11,14
SA0 EVENT#
DDR_B0_DM1 199 200 D_CK_SCLK 11,14
VDDSPD SDA
DDR_B0_DM2 201 202
1
0_0402_5% 2 1 R349 +0.75VS SA1 SCL +0.75VS

DDR_B0_DM3 203 204
0_0402_5% 2 1 R322 DDR_B0_DM4
VTT1 VTT2
0_0402_5% 2 1 R321
1
10K_0402_5%
R345
0.1U_0402_16V4Z
C435
DDR_B0_DM5 205 206

2.2U_0603_6.3V6K
C436
0_0402_5% 2 1 R338 DDR_B0_DM6 G1 G2

FOX_AS0A626-U4RN-7F
0_0402_5% 2 1 R323 1
DDR_B0_DM7 1 CONN@
0_0402_5% 2 1 R347
0_0402_5% 2 1 R317
0_0402_5% 2 1 R348
2
2 2 <Address(SA1,SA0): 10>
DIMM_2 Reserve H:4mm
A A

DDRIII DIMMB
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.4
5 4 3 2 Date: 1
Wednesday, October 27, 2010 Sheet 12 of 61
5 4 3 2 1
PCH_RTCX1
1 2 PCH_RTCX2
R568 10M_0402_5%
32.768KHZ_12.5PF_Q13MC14610002
1
4
Y3 +RTCBATT
OSC
OSC
18P_0402_50V8J
1 1
1
C686
NC
NC
C682 18P_0402_50V8J JBATT2
+
2
D 2 2 D
+RTCVCC
R567 1 2 1M_0402_5% SM_INTRUDER#
-
R585 1 2 330K_0402_5% PCH_INTVRMEN CONN@ SUYIN_060003HA002G202ZL
2
INTVRMEN
* HLIntegrated
Integrated VRM enable
VRM disable
20101019 add
(INTVRMEN should always be pull high.)

RTCRST close RAM door
+3VS
R294 1 @ 2 1K_0402_5% PCH_SPKR U33A
1
HIGH= Enable ( No Reboot ) +RTCVCC J7 PCH_RTCX1 LPC_AD0
1 A20 C38 LPC_AD1 LPC_AD0 40
LOW= Disable (Default) RTCX1 FWH0 / LAD0
* 0_0603_5% A38 LPC_AD2 LPC_AD1 40
LPC
C360 PCH_RTCX2 FWH1 / LAD1
@ C20 B37 LPC_AD3 LPC_AD2 40
1U_0603_10V6K RTCX2 FWH2 / LAD2
+3VALW_PCH C37 LPC_AD3 40
2
2 PCH_RTCRST# FWH3 / LAD3
R556 1 2 D20
RTCRST# LPC_FRAME# +3VS
1K_0402_5% R248 20K_0402_1% D36 LPC_FRAME# 40
HDA_SDOUT_PCH PCH_SRTCRST# FWH4 / LFRAME#
2 @ 1 1 2 G22
R557 R243 20K_0402_1% SRTCRST# SERIRQ R275 2 1 10K_0402_5%
SM_INTRUDER# E36
1
RTC
C 0_0402_5% 1 LDRQ0# C
K22 K36 PCH_SATALED#
40 HDA_SDO 2 1 J8 INTRUDER# LDRQ1# / GPIO23 R640 2 1 10K_0402_5%
C356 PCH_INTVRMEN SERIRQ
1U_0603_10V6K 0_0603_5% C17 V5 SERIRQ 40
INTVRMEN
HDA_SDO as Capella ME override (GPIO33) 2 @
SERIRQ
PCH_GPIO19 R624 1 2 4.7K_0402_5%
2
ME debug mode,this signal has a weak internal PD AM3 SATA_PRX_DTX_N0 34

Low = Disabled (Default) HDA_BITCLK_PCH SATA0RXN R02 modify
* N34
HDA_BCLK SATA0RXP
AM1 SATA_PRX_DTX_P0 34
HDD
SATA 6G
High = Enabled [Flash Descriptor Security Overide] HDA_SYNC_PCH AP7 SATA_PTX_DRX_N0 34
SRTCRST close RAM door SATA0TXN SATA_PTX_DRX_P0 34
L34 AP5
HDA_SYNC SATA0TXP
+3VALW_PCH PCH_SPKR
42 PCH_SPKR T10 AM10
SPKR SATA1RXN
R539 HDA_SYNC_PCH HDA_RST_PCH# AM8
2 1 1K_0402_5% K34
SATA1RXP
AP11
HDA_RST# SATA1TXN
AP10
This signal has a weak internal pull-down SATA1TXP
HDA_SDIN0
42 HDA_SDIN0 E34 AD7 SATA_PRX_DTX_N2 34
HDA_SDIN0 SATA2RXN SATA_PRX_DTX_P2 34
On Die PLL VR Select is supplied by AD5
G34
SATA2RXP
AH5 SATA_PTX_DRX_N2 34 ODD
1.5V when smapled high HDA_SDIN1
* 1.8V when sampled low Prevent back drive issue. C34
SATA2TXN
SATA2TXP
AH4 SATA_PTX_DRX_P2 34
IHDA
Needs to be pulled High for Huron River platfrom HDA_SDIN2
AB8
SATA3RXN
A34 AB10
HDA_SDIN3 SATA3RXP
+3VS AF3
SATA3TXN
HDA_SDOUT_PCH AF1
R544 SATA3TXP
A36
SATA
33_0402_5% HDA_SDO
2
G
HDA_BITCLK_PCH Q36 Y7
42 HDA_BITCLK_AUDIO 1 2 SATA4RXN
BSS138_NL_SOT23-3
HDA_SYNC_PCH Y5
SATA4RXP
R542 3 1 C36 AD3
HDA_DOCK_EN# / GPIO33 SATA4TXN
HDA_SYNC_PCH_R
S
33_0402_5% AD1
42 HDA_SYNC_AUDIO SATA4TXP
1 2 N32 +3VS
HDA_DOCK_RST# / GPIO13
R545 Y3
R674 SATA5RXN
42 HDA_RST_AUDIO# 33_0402_5% HDA_RST_PCH# 1 2 SATA5RXP
Y1
51_0402_5%
1
B @ PCH_JTAG_TCK AB3 B
1 R555 2 SATA5TXN
R540 2 1 J3 AB1 R259
33_0402_5% JTAG_TCK SATA5TXP
HDA_SDOUT_PCH 0_0402_5% PCH_JTAG_TMS +1.05VS_PCH 10K_0402_5%
42 HDA_SDOUT_AUDIO 1 2 R260 SGEN#
JTAG
R03 modify H7 Y11
PCH_JTAG_TDI JTAG_TMS SATAICOMPO SATA_COMP 37.4_0402_1%
1
1
2
K5 Y10 1 2
R792 JTAG_TDI SATAICOMPI R258
PCH_JTAG_TDO
+3VALW_PCH +3VALW_PCH +3VALW_PCH 1M_0402_5% +1.05VS_PCH 10K_0402_5%
H1
JTAG_TDO R241 @
AB12
SATA3RCOMPO 49.9_0402_1%
2
SATA3_COMP
2
AB13 1 2
1
1
SATA3COMPI
1
R666 R637
R646 PCH_SPI_CLK_1
1 2
PCH_SPI_CLK RBIAS_SATA3 GPIO21
200_0402_1% 200_0402_1% T3 AH1 1 2 SGEN#
200_0402_1% R681 0_0402_5% SPI_CLK SATA3RBIAS R625 750_0402_1%
PCH_SPI_CS0#_1 PCH_SPI_CS0#
PCH_JTAG_TDO PCH_JTAG_TMS PCH_JTAG_TDI 1 2
R651 0_0402_5% Y14
Switchable GPU 0
2
2
SPI_CS0#
2
PCH_SATALED# <BOM Structure>

SPI
T1
SPI_CS1# PCH_SATALED# 41 *Non-Switchable 1
1
1
1
P3
PCH_SPI_MOSI_1 PCH_SPI_MOSI SATALED# SGEN#
R671 R636 R648
100_0402_1% 100_0402_1% 100_0402_1% 1 2PCH_SPI_MISO V4 V14
PCH_SPI_MISO_1 SPI_MOSI SATA0GP / GPIO21 PCH_GPIO19
R684 0_0402_5%
1 2 U3 P1
SPI_MISO SATA1GP / GPIO19
2
2
2
R652 0_0402_5%
COUGARPOINT_FCBGA989~D
+RTCBATT +RTCBATT +3VS Boot BIOS Strap
+CHGRTC PCH_SPI_CS0#_1 U36
Boot BIOS GPIO51 GPIO19
SPI_WP1# PCH_SPI_CLK_1
+3VS R654 1 2 3.3K_0402_5% SPI_HOLD1# 1
CS# VCC
8 PCH_SPI_MOSI_1 LPC 0 0
1
2
3 6 PCH_SPI_MISO_1
WP# SCLK
R375 JBATT1 R667 1 2 3.3K_0402_5% 7 5 Reserved 0 1
+
A HOLD# SI A
1K_0402_5% 4 2
GND SO
+RTCBATT_R EN25F32-100HIP SOP 8P
- 1 0
31
2
D13 20mil SPI ROM FOR ME (4MB)

SA00003IN00
Footprint 200mil
* SPI 1 1
+RTCVCC
20mil Security Classification Compal Secret Data Compal Electronics, Inc.
1
Issued Date 2010/10/15 2011/10/15 Title

-
1 CHN202UPT_SC70-3 Deciphered Date

C471 CONN@ SUYIN_060003HA002G202ZL
PCH (1/8) SATA,HDA,SPI, LPC, XDP
2
0.1U_0402_16V4Z Custom 0.4
2
20100416 add
5 4 3 2 Date: Wednesday, October 27, 2010 1 Sheet 13 of 61
5 4 3 2 1
U33B +3VALW_PCH
PCIE_PRX_DTX_N1 BG34 EC_LID_OUT# R240 1 2 10K_0402_5%

35 PCIE_PRX_DTX_N1 PERN1
35 PCIE_PRX_DTX_P1
PCIE_PRX_DTX_P1 BJ34 PERP1 SMBALERT# / GPIO11 E12 EC_LID_OUT# EC_LID_OUT# 40
PCIE LAN 35 PCIE_PTX_C_DRX_N1
C672 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_N1 AV32 RST_GATE R608 2 1 1K_0402_5%
PETN1
35 PCIE_PTX_C_DRX_P1 C669 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_P1 AU32
PETP1 H14 PCH_SMBCLK PCH_SMBCLK 38
SMBCLK
38 PCIE_PRX_DTX_N2
PCIE_PRX_DTX_N2 BE34
PERN2 C9 PCH_SMBDATA PCH_SMBDATA 38
PCH_SMBCLK R677 1 2 2.2K_0402_5%
PCIE_PRX_DTX_P2 SMBDATA
38 PCIE_PRX_DTX_P2 BF34
PERP2
Mini Card 1 38 PCIE_PTX_C_DRX_N2
C675 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_N2 BB32 PCH_SMBDATA R662 1 2 2.2K_0402_5%
PCIE_PTX_DRX_P2 PETN2
38 PCIE_PTX_C_DRX_P2 C677 1 2 0.1U_0402_10V7K AY32
SMBUS
PETP2 RST_GATE
A12 RST_GATE 6,11,12
PCIE_PRX_DTX_N3 SML0ALERT# / GPIO60 PCH_GPIO74 R647 10K_0402_5%
38 PCIE_PRX_DTX_N3 BG36 PERN3 1 2
PCIE_PRX_DTX_P3 BJ36 C8
D 38 PCIE_PRX_DTX_P3 PERP3 SML0CLK D
Mini Card 2 C663 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_N3 AV34
38 PCIE_PTX_C_DRX_N3 PCIE_PTX_DRX_P3 PETN3 PCH_SML1CLK
38 PCIE_PTX_C_DRX_P3 C665 1 2 0.1U_0402_10V7K AU34 G12 R642 1 2 2.2K_0402_5%
PETP3 SML0DATA
PCIE_PRX_DTX_N4 BF36 PCH_SML1DATA
39 PCIE_PRX_DTX_N4 PERN4 R643 1 2 2.2K_0402_5%
PCIE_PRX_DTX_P4 BE36
39 PCIE_PRX_DTX_P4 PERP4
USB3.0 Right C661 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_N4 PCH_GPIO74
39 PCIE_PTX_C_DRX_N4 AY34 C13
C660 PCIE_PTX_DRX_P4 PETN4 SML1ALERT# / PCHHOT# / GPIO74 PCH_GPIO47
39 PCIE_PTX_C_DRX_P4 1 2 0.1U_0402_10V7K BB34 R280 1 2 10K_0402_5%
PETP4 PCH_SML1CLK
E14
PCI-E*
PCIE_PRX_DTX_N5 SML1CLK / GPIO58
46 PCIE_PRX_DTX_N5 BG37 PERN5
PCIE_PRX_DTX_P5 PCH_SML1DATA
46 PCIE_PRX_DTX_P5 BH37 M16
PCIE_PTX_DRX_N5 PERP5 SML1DATA / GPIO75
USB3.0 Left 46 PCIE_PTX_C_DRX_N5 C813 1 2 0.1U_0402_10V7K
PCIE_PTX_DRX_P5
AY36
PETN5
46 PCIE_PTX_C_DRX_P5 C814 1 2 0.1U_0402_10V7K BB36
PETP5 +3VS For DDR
+3VS BJ38
PERN6
BG38 R669
Controller
PERP6
PCH_GPIO18 AU36 M7 4.7K_0402_5%
PETN6 CL_CLK1
2
R638 2 1 10K_0402_5% AV36 1 2 +3VS
PETP6
Link
PCH_GPIO20 PCH_SMBDATA D_CK_SDATA
R273 2 1 10K_0402_5% BG40 T11 6 1 D_CK_SDATA 11,12
PERN7 CL_DATA1
+3VALW_PCH BJ40
PERP7
AY40 Q40A
PETN7 R670
PCH_GPIO73 BB40 P10 DMN66D0LDW-7_SOT363-6
R618 2 1 10K_0402_5% PETP7 CL_RST1# 4.7K_0402_5%
5
PCH_GPIO25 BE38 1 2 +3VS
PERN8
R630 2 1 10K_0402_5% BC38 PERP8 PCH_SMBCLK D_CK_SCLK
AW38 3 4 D_CK_SCLK 11,12
PCH_GPIO26 PETN8
R653 2 1 10K_0402_5% AY38
PETP8 Q40B
PCH_GPIO44 PCH_GPIO47 DMN66D0LDW-7_SOT363-6
R238 2 1 10K_0402_5% M10
PEG_A_CLKRQ# / GPIO47
PCH_GPIO45 Y40
R293 2 1 10K_0402_5% CLKOUT_PCIE0N
Y39 CLKOUT_PCIE0P
C PCH_GPIO46 PCH_GPIO73 AB37 C
CLOCKS
R295 2 1 10K_0402_5% CLKOUT_PEG_A_N
J2 CLKOUT_PEG_A_P AB38
PCIECLKRQ0# / GPIO73 Pull up at EC side.
+3VS
38 CLK_PCIE_MINI1#
CLK_PCIE_MINI1# CLK_CPU_DMI#
CLK_CPU_DMI# 5
For VGA,EC
CLK_PCIE_MINI1 AB49 CLKOUT_PCIE1N AV22CLK_CPU_DMI
38 CLK_PCIE_MINI1 CLKOUT_DMI_N CLK_CPU_DMI 5
AB47 AU22
Mini Card 1 PCH_GPIO18
CLKOUT_PCIE1P CLKOUT_DMI_P
38 MINI1_CLKREQ# R650 2 1 0_0402_5%
2
M1
PCIECLKRQ1# / GPIO18
AM12 PCH_SML1DATA EC_SMB_DA2
CLKOUT_DP_N / CLKOUT_BCLK1_N EC_SMB_DA2 22,40
CLK_PCIE_USB30# CLKOUT_DP_P / CLKOUT_BCLK1_P AM13 6 1
39 CLK_PCIE_USB30# CLK_PCIE_USB30 AA48
USB3.0 39 CLK_PCIE_USB30 AA47
CLKOUT_PCIE2N
CLK_BUF_CPU_DMI# Q38A
CLKOUT_PCIE2P
PCH_GPIO20 BF18 CLK_BUF_CPU_DMI R2331 10K_0402_5% DMN66D0LDW-7_SOT363-6
2 210K_0402_5%
5
39 USB30_CLKREQ# CLKIN_DMI_N R234
1
R289 2 1 0_0402_5% V10 CLKIN_DMI_P BE18
PCIECLKRQ2# / GPIO20 PCH_SML1CLK EC_SMB_CK2
CLKIN_GND1# 3 4 EC_SMB_CK2 22,40
CLK_PCIE_LAN#
35 CLK_PCIE_LAN# CLK_PCIE_LAN Y37 BJ30 CLKIN_GND1 R5631 2 10K_0402_5%
PCIE LAN 35 CLK_PCIE_LAN Y36
CLKOUT_PCIE3N CLKIN_DMI2_N
BG30 R5611
Q38B
CLKOUT_PCIE3P CLKIN_DMI2_P 2 10K_0402_5% DMN66D0LDW-7_SOT363-6
PCH_GPIO25
35 LAN_CLKREQ# CLK_BUF_DREF_96M#
R621 1 2 0_0402_5% A8
G24 CLK_BUF_DREF_96M R220 2 10K_0402_5%
CLKIN_DOT_96N
E24 R2211 1 2 10K_0402_5% Pull down 10K ohm
38 CLK_PCIE_MINI2# CLKIN_DOT_96P for using internal Clock
Y43
Mini Card 2 38 CLK_PCIE_MINI2 Y45
CLKOUT_PCIE4N
CLK_BUF_PCIE_SATA#
CLKOUT_PCIE4P
PCH_GPIO26 AK7 CLK_BUF_PCIE_SATA R264 10K_0402_5%
38 MINI2_CLKREQ# R664 2 1 0_0402_5% CLKIN_SATA_N / CKSSCD_N 1 1
R265 2 210K_0402_5%
L12 CLKIN_SATA_P / CKSSCD_P AK5
CLK_PCIE_USB30_L# CLK_BUF_ICH_14M
46 CLK_PCIE_USB30_L# CLK_PCIE_USB30_L V45 K45
USB3.0 Left 46 CLK_PCIE_USB30_L V46
CLKOUT_PCIE5N REFCLK14IN R1751 2 10K_0402_5%
CLKOUT_PCIE5P CLK_PCI_LPBACK
PCH_GPIO44
46 USB30_CLKREQ#_L CLK_PCI_LPBACK 17
R772 2 1 0_0402_5% L14 H45
B PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK B
CLK_PEG_VGA# XTAL25_IN
22 CLK_PEG_VGA# CLK_PEG_VGA XTAL25_OUT
AB42 XTAL25_IN V47
22 CLK_PEG_VGA CLKOUT_PEG_B_N
AB40 V49
PEG_CLKREQ#_R CLKOUT_PEG_B_P XTAL25_OUT +1.05VS_VTT
E6 R526
PEG_B_CLKRQ# / GPIO56 XCLK_RCOMP
90.9_0402_1%
XCLK_RCOMP Y47 1 2 XTAL25_IN
V40 CLKOUT_PCIE6N
PCH_GPIO45 V42 CLKOUT_PCIE6P XTAL25_OUT
T13 1 2
PCIECLKRQ6# / GPIO45 CLK_FLEX0 R527 1M_0402_5%
@ R04 modify
V38 K43 T9 PAD Y2
CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64 CLK_FLEX1
FLEX CLOCKS
PCH_GPIO46 V37 CLKOUT_PCIE7P 2 1

F47
CLK_FLEX2 @ PAD
CLKOUTFLEX1 / GPIO65 T73
K12 PCIECLKRQ7# / GPIO46 25MHZ_20PF_7A25000012
H47 @ 1
CLKOUTFLEX2 / GPIO66 DGPU_PRSNT# T29 PAD 1
AK14 CLKOUT_BCLK0_N / CLKOUT_PCIE8N
AK13 K49 +3VS C630
CLKOUT_BCLK0_P / CLKOUT_PCIE8P CLKOUTFLEX3 / GPIO67 C631
18P_0402_50V8J 18P_0402_50V8J
2 2
1
R159
10K_0402_5%
+3VALW_PCH DGPU_PWR_EN 17,45 UMAO@
DGPU_PRSNT#
2
1
GPIO67
1
R663
2
A
R632 DGPU_PRSNT# A
DIS@ R160 CLK_PCI_LPBACK R530 C642
10K_0402_5% 10K_0402_5% 10K_0402_5% 33_0402_5% 22P_0402_50V8J
DIS,OPTIMUS 0 DIS@ 2 1 1 2
2
2 2
@
UMA 1 Reserve for EMI please close to@ UH4
1
Q39
G
PEG_CLKREQ#_R 2N7002H_SOT23-3 Pull high @ VGA side

1 3 R631 PEG_CLKREQ# 22
D
1 2
1
0_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.

1
R644 DIS@
for safe R668 @ Issued Date 2010/10/15 Deciphered Date 2011/10/15 Title
@
2.2K_0402_5%
2.2K_0402_5%
PCH (2/8) PCIE, SMBUS, CLK
2

2
Custom 0.4
5 4 3 2 1
U33C
+3VALW_PCH DMI_CTX_PRX_N0 BC24 BJ14 FDI_CTX_PRX_N0

4 DMI_CTX_PRX_N0 DMI0RXN FDI_RXN0 FDI_CTX_PRX_N0 4
DMI_CTX_PRX_N1 BE20 AY14 FDI_CTX_PRX_N1
DMI_CTX_PRX_N2 BG18 BE14 FDI_CTX_PRX_N2
DMI_CTX_PRX_N3 BG20 BH13 FDI_CTX_PRX_N3
R607 2 1 10K_0402_5% SUS_PWR_DN_ACK_R BC12 FDI_CTX_PRX_N4
FDI_RXN4 FDI_CTX_PRX_N4 4
DMI_CTX_PRX_P0 BE24 BJ12 FDI_CTX_PRX_N5
4 DMI_CTX_PRX_P0 DMI0RXP FDI_RXN5 FDI_CTX_PRX_N5 4
R218 2 1 200K_0402_5% PCH_ACIN DMI_CTX_PRX_P1 BC20 BG10 FDI_CTX_PRX_N6
DMI_CTX_PRX_P2 BJ18 BG9 FDI_CTX_PRX_N7
R247 2 1 10K_0402_5% PCH_GPIO72 DMI_CTX_PRX_P3 BJ20
4 DMI_CTX_PRX_P3 DMI3RXP
BG14 FDI_CTX_PRX_P0
FDI_RXP0 FDI_CTX_PRX_P0 4
R610 2 1 10K_0402_5% RI# DMI_CRX_PTX_N0 AW 24 BB14 FDI_CTX_PRX_P1
+3VS 4 DMI_CRX_PTX_N0 DMI0TXN FDI_RXP1 FDI_CTX_PRX_P1 4
DMI_CRX_PTX_N1 AW 20 BF14 FDI_CTX_PRX_P2
D 4 DMI_CRX_PTX_N1 DMI1TXN FDI_RXP2 FDI_CTX_PRX_P2 4 D
DMI_CRX_PTX_N2 BB18 BG13 FDI_CTX_PRX_P3
4 DMI_CRX_PTX_N2 DMI2TXN FDI_RXP3 FDI_CTX_PRX_P3 4
R597 2 1 200_0402_1% PM_DRAM_PWRGD DMI_CRX_PTX_N3 AV18 BE12 FDI_CTX_PRX_P4
FDI_CTX_PRX_P4 4
DMI
FDI
4 DMI_CRX_PTX_N3 DMI3TXN FDI_RXP4 FDI_CTX_PRX_P5
FDI_RXP5 BG12 FDI_CTX_PRX_P5 4
DMI_CRX_PTX_P0 AY24 BJ10 FDI_CTX_PRX_P6
4 DMI_CRX_PTX_P0 DMI0TXP FDI_RXP6 FDI_CTX_PRX_P6 4
R559 2 1 10K_0402_5% PCH_RSMRST# DMI_CRX_PTX_P1 AY20 BH9 FDI_CTX_PRX_P7
4 DMI_CRX_PTX_P1 DMI1TXP FDI_RXP7 FDI_CTX_PRX_P7 4 +RTCVCC
DMI_CRX_PTX_P2 AY18
4 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3 DMI2TXP
4 DMI_CRX_PTX_P3 AU18 DMI3TXP FDI_INT
FDI_INT AW 16 FDI_INT 4 DSWODVREN R577
+1.05VS_PCH
2 1 330K_0402_5%
FDI_FSYNC0
BJ24 DMI_ZCOMP AV12 FDI_FSYNC0 4
FDI_FSYNC0
R581 2 1 330K_0402_5%
DMI_IRCOMP FDI_FSYNC1 @
1 2 BG25 BC10

DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 4
R223 49.9_0402_1% DSWODVREN - On Die DSW VR Enable

RBIAS_CPY FDI_LSYNC0
R578
1 2
750_0402_1%
BH21 DMI2RBIAS FDI_LSYNC0 AV14
FDI_LSYNC1
FDI_LSYNC0 4 * H Enable
L Disable
4mil width and place FDI_LSYNC1 BB10 FDI_LSYNC1 4
within 500mil of the PCH
DSWODVREN
DSW VRMEN A18
not support Deep S4,S5 mux
System Power Management

with SUS_PWR_DN_ACK not support Deep S4,S5 DPWROK mux with PWROK
SUS_PWR_DN_ACK_R SUSACK#_R PCH_RSMRST#_R check list1.0 P.42
1 2 C12 E22
R599 0_0402_5% SUSACK# DPW ROK R615
0_0402_5%
XDP_DBRESET#_R WAKE#
5 XDP_DBRESET# 1 2 K3 B9 1 2 PCH_PCIE_WAKE# 35,38,39,46
R678 0_0402_5% SYS_RESET# W AKE#
SYS_PWROK PCH_GPIO32 +3VALW_PCH

C P12 SYS_PW ROK N3
not support AMT APWROK can mux CLKRUN# / GPIO32 C
WAKE# R613 1 2 10K_0402_5%
with PWROK (check list1.0 P.40) PCH_PWROK PCH_PWROK_R SUS_STAT#
1 2 L22 G8 T22 PAD
R635 0_0402_5% PW ROK SUS_STAT# / GPIO61 PCH_GPIO29 R235 1 2 10K_0402_5%
@
SUSCLK +3VS
L10 SUSCLK / GPIO62 N14 SUSCLK 40
APW ROK
PCH_GPIO32 R622
PM_DRAM_PWRGD PM_SLP_S5#
T23 PAD 1 2 10K_0402_5%
5 PM_DRAM_PWRGD B13 D10 PM_SLP_S5# 40
DRAMPW ROK SLP_S5# / GPIO63 @
T21 PAD
PCH_RSMRST#_R PM_SLP_S4#
40 PCH_RSMRST# 1 2 C21 H4 PM_SLP_S4# 40
R560 0_0402_5% RSMRST# SLP_S4# @
T20 PAD
SUS_PWR_DN_ACK_R PM_SLP_S3# Can be left NC
40 SUS_PWR_DN_ACK 1 2 K16 F4 PM_SLP_S3# 40
R598 0_0402_5% SUSW ARN# / SUS_PW R_DN_ACK / GPIO30 SLP_S3# @ when IAMT is not
PBTN_OUT#_R support on the
40 PBTN_OUT# 1 2 E20 G10 PAD T47 platfrom
R673 0_0402_5% PW RBTN# SLP_A# @
PCH_ACIN not support
22,40,44,45,48 ACIN 1 2 H20 G16
D9 CH751H-40PT_SOD323-2 ACPRESENT / GPIO31 SLP_SUS# Deep S4,S5 can NC
T16 PAD PCH EDS1.2 P.74
PCH_GPIO72 H_PM_SYNC
E10 AP14 H_PM_SYNC 5
BATLOW # / GPIO72 PMSYNCH @
RI# PCH_GPIO29
A10 RI# K14
SLP_LAN# / GPIO29
Ring Indicator CRB1.0 PH 10K +3VALW
B COUGARPOINT_FCBGA989~D B
tell PCH all power ok +3VS

but cpu core
ALL power OK
5
U35
40 PCH_PWROK 2 B
P
SYS_PWROK
Y 4 SYS_PWROK 5
40,55 VGATE 1 A
G
MC74VHC1G08DFT2G_SC70-5
1
R629
R645
10K_0402_5%
10K_0402_5%
2
2
A A

PCH (3/8) DMI,FDI,PM,
Custom 0.4
5 4 3 2 1
Pull high at LVDS conn side.

U33D
ENBKL R532 2 1 0_0402_5% IGPU_BKLT_EN IGPU_BKLT_EN J47 AP43
40 ENBKL L_BKLTEN SDVO_TVCLKINN
31 PCH_ENVDD M45 AP45
L_VDD_EN SDVO_TVCLKINP
UMA@
31 DPST_PWM P45 L_BKLTCTL AM42
SDVO_STALLN
AM40
SDVO_STALLP
31 LCD_CLK T40 L_DDC_CLK
31 LCD_DATA K47 L_DDC_DATA AP39
SDVO_INTN
1 1
CTRL_CLK SDVO_INTP
AP40 SDVO_CTRLDATA strap pull high
0.01U_0402_16V7K T45
C193 C191 CTRL_DATA P39
L_CTRL_CLK at level shift page
0.01U_0402_16V7K 2.37K_0402_1% L_CTRL_DATA
D 2 @ 2 @ D
R189 2 1 LVDS_IBG AF37
LVD_IBG P38 SDVO_SCLK SDVO_SCLK 33
SDVO_CTRLCLK
UMA@ AF36
LVD_VBG M39 SDVO_SDATA SDVO_SDATA 33
SDVO_CTRLDATA
For RF request 0_0402_5% LVD_VREF AE48
R177 LVD_VREFH
2 1 AE47 AT49
UMA@ LVD_VREFL DDPB_AUXN
AT47
+3VS DDPB_AUXP PCH_DPB_HPD
AT40 PCH_DPB_HPD 33
TXCLK- DDPB_HPD
31 TXCLK- AK39
LVDS
CTRL_CLK TXCLK+ LVDSA_CLK# PCH_DPB_N0
R174 1 UMA@ 2 2.2K_0402_5% 31 TXCLK+ AK40 AV42 PCH_DPB_N0 33
LVDSA_CLK DDPB_0N PCH_DPB_P0
CTRL_DATA TXOUT0- DDPB_0P
AV40
PCH_DPB_N1
PCH_DPB_P0 33 HDMI D2
R158 1 UMA@ 2 2.2K_0402_5% 31 TXOUT0- AN48 AV45 PCH_DPB_N1 33
TXOUT1- LVDSA_DATA#0 DDPB_1N PCH_DPB_P1
AM47 AV46 PCH_DPB_P1 33 HDMI D1
Digital Display Interface

31 TXOUT1- TXOUT2- LVDSA_DATA#1 DDPB_1P PCH_DPB_N2
31 TXOUT2- AK47 AU48 PCH_DPB_N2 33
R156 LCD_CLK LVDSA_DATA#2 DDPB_2N PCH_DPB_P2
1 UMA@ 2 2.2K_0402_5% AJ48 AU47 PCH_DPB_P2 33 HDMI D0
LVDSA_DATA#3 DDPB_2P PCH_DPB_N3
AV47 PCH_DPB_N3 33
R157 LCD_DATA TXOUT0+ DDPB_3N PCH_DPB_P3
1 UMA@ 2 2.2K_0402_5% 31 TXOUT0+ AN47 AV49 PCH_DPB_P3 33 HDMI CLK
TXOUT1+ LVDSA_DATA0 DDPB_3P
31 TXOUT1+ AM49
TXOUT2+ LVDSA_DATA1
31 TXOUT2+ AK49
LVDSA_DATA2
AJ47 P46
LVDSA_DATA3 DDPC_CTRLCLK
DDPC_CTRLDATA P42
TZCLK- AF40
31 TZCLK- TZCLK+ LVDSB_CLK#
31 TZCLK+ AF39 LVDSB_CLK AP47
DDPC_AUXN
AP49
TZOUT0- DDPC_AUXP
31 TZOUT0- AH45 LVDSB_DATA#0 AT38
TZOUT1- DDPC_HPD
31 TZOUT1- AH47 LVDSB_DATA#1
+3VS TZOUT2- AF49
31 TZOUT2- LVDSB_DATA#2 AY47
DDPC_0N
AF45 LVDSB_DATA#3 AY49
R521 1 UMA@ 2 2.2K_0402_5% PCH_CRT_CLK DDPC_0P
AY43
TZOUT0+ DDPC_1N
31 TZOUT0+ AH43 LVDSB_DATA0 AY45
R522 1 UMA@ 2 2.2K_0402_5% PCH_CRT_DATA TZOUT1+ DDPC_1P
31 TZOUT1+ AH49 BA47
TZOUT2+ LVDSB_DATA1 DDPC_2N
C 31 TZOUT2+ AF47 LVDSB_DATA2 BA48 C
DDPC_2P
AF43 BB47
LVDSB_DATA3 DDPC_3N
PCH_CRT_B BB49
R534 1 UMA@ 2 150_0402_1% DDPC_3P
PCH_CRT_G PCH_CRT_B
R533 1 UMA@ 2 150_0402_1% 32 PCH_CRT_B PCH_CRT_G N48 M43
CRT_BLUE DDPD_CTRLCLK
PCH_CRT_R 32 PCH_CRT_G PCH_CRT_R P49 M36
R535 1 UMA@ 2 150_0402_1% CRT_GREEN DDPD_CTRLDATA
32 PCH_CRT_R T49
CRT_RED
AT45
CRT
CRT_DDC_CLK DDPD_AUXN
32 PCH_CRT_CLK CRT_DDC_DATA T39 CRT_DDC_CLK AT43
DDPD_AUXP
32 PCH_CRT_DATA M40 CRT_DDC_DATA BH41
DDPD_HPD
BB43
DDPD_0N
32 PCH_CRT_HSYNC M47 BB45
CRT_HSYNC DDPD_0P
32 PCH_CRT_VSYNC M49 BF44
CRT_VSYNC DDPD_1N
DDPD_1P BE44
CRT_IREF BF42
DDPD_2N
T43 DDPD_2P BE42
DAC_IREF
T42 BJ42
CRT_IRTN DDPD_3N
BG42
1
DDPD_3P
R178
1K_0402_0.5%
2
B B
A A

PCH (4/9) LVDS,CRT,DP,HDMI
Custom 0.4
5 4 3 2 1
U33E
+3VS AY7
NV_CE#0
AV7
NV_CE#1
BG26 NV_CE#2 AU3
R173 10K_0402_5% PCI_PIRQA# TP1
1 2 BJ26 NV_CE#3 BG4
R180 10K_0402_5% PCI_PIRQD# TP2
1 2 BH25 TP3
R181 1 2 10K_0402_5% PCI_PIRQC# BJ16 AT10
TP4 NV_DQS0
R183 1 2 10K_0402_5% PCI_PIRQB# BG16 NV_DQS1
BC8
TP5
AH38
TP6
AH37 NV_DQ0 / NV_IO0 AU2
TP7
D
R03 modify AK43
TP8 NV_DQ1 / NV_IO1 AT4
D
AK45 AT3
PCH_GPIO55 TP9 NV_DQ2 / NV_IO2
R152 1 2 10K_0402_5% C18 NV_DQ3 / NV_IO3
AT1
R153 1 2 10K_0402_5% PCH_GPIO51 TP10
N30 NV_DQ4 / NV_IO4 AY3
R161 1 2 10K_0402_5% PCH_GPIO5 TP11
H3 NV_DQ5 / NV_IO5 AT5
R162 10K_0402_5% PCH_GPIO52 TP12
1 2 AH12 AV3
NVRAM
TP13 NV_DQ6 / NV_IO6
AM4 NV_DQ7 / NV_IO7 AV1
TP14 BB1
AM5 NV_DQ8 / NV_IO8
TP15
Y13 BA3
TP16 NV_DQ9 / NV_IO9
K24 NV_DQ10 / NV_IO10 BB5
PCH_GPIO2 TP17
R166 1 2 10K_0402_5% L24 NV_DQ11 / NV_IO11 BB3
DGPU_PWR_EN TP18
R169 1 2 10K_0402_5% AB46 BB7
R170 PCH_GPIO4 TP19 NV_DQ12 / NV_IO12
1 2 10K_0402_5% AB45 BE8
RSVD
ODD_DA# TP20 NV_DQ13 / NV_IO13
R172 1 2 10K_0402_5% BD4
NV_DQ14 / NV_IO14
BF6
NV_DQ15 / NV_IO15
B21 NV_ALE AV5
TP21 AY1 DF_TVS
M20 TP22 NV_CLE
AY16 DMI Termination Voltage
PCH_GPIO53 TP23 AV10
R165 1 2 8.2K_0402_5% BG46 NV_RCOMP
TP24 Set to Vcc when HIGH
AT8 DF_TVS
NV_RB# Set to Vss when LOW
BE28 NV_RE#_WRB0 AY5
TP25 BA2
DGPU_HOLD_RST# BC30 NV_RE#_WRB1
TP26 DG 1.2 CRB1.0 PH 2.2K series 1K
R188 1 2 8.2K_0402_5% BE32
TP27 AT12
BJ32 NV_WE#_CK0
TP28 BF3
BC28 NV_WE#_CK1
TP29
BE30 +1.8VS
TP30
BF32 USB20_N0
TP31 C24
BG32 USBP0N USB20_P0 USB20_N0 39
TP32 A24 USB/B (Right side)
AV26 USB20_P0 39
1
TP33 USBP0P USB20_N1
C BB26 C25 USB20_P1 USB20_N1 46 C
TP34 USBP1N
AU28
TP35 USBP1P
B25 USB20_N2 USB20_P1 46 USB Conn. Colay USB3.0 R633
AY30 C26 USB20_N2 39 2.2K_0402_5%
TP36 USBP2N USB20_P2
AU26 TP37 USBP2P
A26 USB20_N3 USB20_P2 39 USB/B (Right side)
AY26 K28 USB20_N3 39
2
TP38 USBP3N USB20_P3 DF_TVS
AV28 TP39 USBP3P
H28 USB20_N4 USB20_P3 39 USB/B (Right side) ,colay USB3.0 2 1 H_SNB_IVB# 5
AW30 E28 USB20_P4 USB20_N4 31 R626 1K_0402_5%
TP40 USBP4N
USBP4P D28 USB20_P4 31 3D panel
C28 CLOSE TO THE BRANCHING POINT
USBP5N
USBP5P A28
C29
USBP6N
PCI_PIRQA# B29
USBP6P
PCI_PIRQB# K40
PIRQA# USBP7N
N28 Some PCH config not support USB port 6 & 7.
K38 M28
PCI
PCI_PIRQC# PIRQB# USBP7P USB20_N8
PCI_PIRQD# H38 L30 USB20_P8 USB20_N8 38
PIRQC# USBP8N
G38
PIRQD# USBP8P
K30 USB20_N9 USB20_P8 38 Mini Card 1 (WLAN)
DGPU_HOLD_RST# G30 USB20_P9 USB20_N9 38 +3VALW_PCH
GPIO51 Internal pull high USBP9N 3G/B (WWAN)
C46 E30 USB20_P9 38
USB
PCH_GPIO52 REQ1# / GPIO50 USBP9P USB20_N10
DGPU_PWR_EN C44 C30 USB20_P10 USB20_N10 31
REQ2# / GPIO52 USBP10N
14,45 DGPU_PWR_EN E40
REQ3# / GPIO54 USBP10P
A30 USB20_N11 USB20_P10 31 CMOS Camera (LVDS) USB_OC0#
Boot BIOS Strap bit1 BBS1 PCH_GPIO51 L32 USB20_N11 38 USB_OC2# R596 1
USBP11N USB20_P11 1 2 10K_0402_5%
PCH_GPIO53 D47 GNT1# / GPIO51 USBP11P
K32 USB20_N12 USB20_P11 38 Mini2 Card 2 (Reserved) USB_OC7#
R588 2 10K_0402_5%
Boot BIOS E42 G32 USB20_N12 38 USB_OC5# R595
PCH_GPIO55 GNT2# / GPIO53 USBP12N USB20_P12 1 2 10K_0402_5%
Destination F46 GNT3# / GPIO55 E32 USB20_N13 USB20_P12 38 3G/B(SIM Card ) R590 1 2 10K_0402_5%
Bit11 Bit10 USBP12P
C32 USB20_P13 USB20_N13 39
USBP13N USB20_P13 39 BlueTooth
PCH_GPIO2 A32
0 1 Reserved ODD_DA# G42
USBP13P
GNT1#/ PIRQE# / GPIO2 Within 500 mils
34 ODD_DA# PCH_GPIO4 G40 USBRBIAS
1 0 PCI PIRQF# / GPIO3
GPIO51 PCH_GPIO5 C42 PIRQG# / GPIO4 USBRBIAS# C33
1 2
D44 PIRQH# / GPIO5 USB_OC1#
1 1 SPI R558 22.6_0402_1%
USB_OC4# R773 1 2 10K_0402_5%
B33 USB_OC3# R612 1 1
B 0 0 LPC PAD T18 @ USBRBIAS R592 2 10K_0402_5%
2 10K_0402_5% B
K10 USB_OC6#
PLT_RST#
PME#
USB_OC0# R03 modify R616 1 2 10K_0402_5%
5 PLT_RST# C6 A14 USB_OC1#
PLTRST# OC0# / GPIO59 USB_OC1# 46
K20 USB_OC2#
CLK_PCI0 OC1# / GPIO40
CLK_PCI_LPBACK B17 USB_OC3#
14 CLK_PCI_LPBACK CLK_PCI1 OC2# / GPIO41 USB_OC4#
CLK_PCI_LPC R531 H49 C16
40 CLK_PCI_LPC 2 1 22_0402_5%CLK_PCI2 H43
CLKOUT_PCI0 OC3# / GPIO42
L16 USB_OC5#
R529 1PAD 2 22_0402_5%
T30 @ CLK_PCI3 CLKOUT_PCI1 OC4# / GPIO43
J48 A16 USB_OC6#
CLK_PCI4 CLKOUT_PCI2 OC5# / GPIO9 USB_OC7#
PAD T10 @ K42 OC6# / GPIO10 D14
CLKOUT_PCI3
PAD T12 @ H40 OC7# / GPIO14 C14
1 1 CLKOUT_PCI4
C633 C632 COUGARPOINT_FCBGA989~D

0.01U_0402_16V7K 0.01U_0402_16V7K
@ 2 2 @ R282
0_0402_5%
For RF request 2 1
@
+3VS +3VS
R296
5
5
PLT_RST# U14 100_0402_1% U15

2 PLT_RST#
1 2
VCC
PLTRST_VGA# 22
P
DGPU_HOLD_RST# B 1
4 DIS@ IN1 PLT_RST_BUF# 35,38,39,40,46
R187 Y 4
2 1 1 A OUT
G
0_0402_5% DIS@ 2
GND
IN2
1
NC7SZ08P5X_NL_SC70-5 R281
3
DIS@ 100K_0402_5% R297

DIS@ 100K_0402_5%
3
MC74VHC1G08DFT2G_SC70-5
2
2
A A

PCH (5/9) PCI, USB, NVRAM
Custom 0.4
5 4 3 2 1
HDA_SYNC PH(PLL =+1.5VS)

GPIO28
On-Die PLL Voltage Regulator
This signal has a weak internal pull up
* H
L

On-Die voltage regulator enable
On-Die PLL Voltage Regulator disable
R272 1 2 1K_0402_5% PCH_GPIO28
@ +3VS
ODD_EN# R771 1 2 10K_0402_5%

D D
+3VALW_PCH R768 1 2 4.7K_0402_5%
EC_KBRST# R279 1 2 10K_0402_5%
U33F
PCH_GPIO0 ODD_EN#
T7 C40 ODD_EN# 34
BMBUSY# / GPIO0 TACH4 / GPIO68
PCH_GPIO1 PCH_GPIO69
A42 TACH1 / GPIO1 B41
TACH5 / GPIO69
DGPU_HPD_INT# PCH_GPIO70 +3VS
H36 C41
TACH2 / GPIO6 TACH6 / GPIO70
EC_SCI# PCH_GPIO71
40 EC_SCI# E38 A40
Deep S4,S5 wake event signal TACH3 / GPIO7 TACH7 / GPIO71
2
EC_SMI#
RTC alarm,Power BTN,GPIO27 40 EC_SMI# C10 GPIO8
R278
PCH_GPIO12 10K_0402_5%
PCH_GPIO27 (Have internal Pull-High) C4 LAN_PHY_PWR_CTRL / GPIO12
Deep S4,S5 wake event signal SMIB
1
39,46 SMIB G2 P4 GATEA20 40
No use PD to GND Check list1.0 P.70 GPIO15 A20GATE
PCH_PECI_R PECI CPU-EC
AU16 1 2 H_PECI 5,40
CPU/MISC
R661 PCH_GPIO27 PCH_GPIO16 PECI 0_0402_5% @ R239
1 2 10K_0402_5% U2 EC_KBRST#
SATA4GP / GPIO16 CTRL+ALT+DEL
P5 EC_KBRST# 40
RCIN#
GPIO
R193 1 2 0_0402_5% DGPU_PWROK non CPU power ok
54 VGA_PWROK D40 AY11 H_CPUPWRGD 5
TACH0 / GPIO17 PROCPWRGD
PCH_GPIO22 PCH_THRMTRIP#_R 1 2 H_THRMTRIP# 130 degree
T5 AY10 H_THRMTRIP# 5
SCLOCK / GPIO22 THRMTRIP# R627 390_0402_5% shut sown
PCH_GPIO24
E8 GPIO24 / MEM_LED T14
INIT3_3V#
PCH_GPIO27 INIT3_3V Checklist1.0 P.59
C +3VS E16 C
GPIO27
PCH_GPIO28 This signal has weak internal
P8
GPIO28 PU, can't pull low,leave NC
OPTIMUS_EN# BT_ON# NC_1 AH8
R623 1 NOPT@ 2 10K_0402_5% 38,39 BT_ON# K1
STP_PCI# / GPIO34
NC_2 AK11
K4
R639 1 OPT@ 2 10K_0402_5% GPIO35
ODD_DETECT# AH10 TS_VSS1~4
34 ODD_DETECT# NC_3
V8
SATA2GP / GPIO36 PD to GND
WWAN_OFF# AK10
R03 modify 38 WWAN_OFF# M5 NC_4
SATA3GP / GPIO37
OPTIMUS_EN# P37
NC_5
N2
GPIO38 PCH_GPIO39
SLOAD / GPIO38
OPTIMUS_EN# M3
SDATAOUT0 / GPIO39
PCH_GPIO48
V13 BG2 T58 PAD
* OPTIMUS 0 R03 modify WL_OFF#
SDATAOUT1 / GPIO48 VSS_NCTF_15
@
38 WL_OFF# V3 T39 PAD
BG48 R02 modify
Non-OPTIMUS 1 PCH_GPIO57
SATA5GP / GPIO49 VSS_NCTF_16 @
D6 BH3 T59 PAD
GPIO57 VSS_NCTF_17 @
+3VS +3VS +3VS
BH47 T40 PAD
VSS_NCTF_18
@
PAD T61 @ T60 PAD
1
A4
1
VSS_NCTF_1 VSS_NCTF_19 BJ4
@
1
+3VS R04 modify R554 R550
PAD T46 @ A44 BJ44 T45 PAD R548
VSS_NCTF_2 VSS_NCTF_20 10K_0402_5% 10K_0402_5%
WWAN_OFF# @ 10K_0402_5%
T43 PAD @ X76@
R277 PAD T44 @ A45 @
1 2 200K_0402_5% VSS_NCTF_3 VSS_NCTF_21 BJ45 @
2
2
PCH_GPIO0 PCH_GPIO69 PCH_GPIO70 PCH_GPIO71
NCTF
R276 1 2 10K_0402_5% PAD T41 @
2
A46 VSS_NCTF_4 BJ46 T42 PAD
VSS_NCTF_22
2
PCH_GPIO1 @ T50 PAD
2
R546 1 2 10K_0402_5% PAD T52 @
2
B A5 B
VSS_NCTF_5 VSS_NCTF_23 BJ5 @ R549
DGPU_HPD_INT# R553 R551
R191 1 2 10K_0402_5% PAD T51 @ T49 PAD 10K_0402_5%
A6 BJ6 10K_0402_5% 10K_0402_5%X76@
VSS_NCTF_6 VSS_NCTF_24 @
PCH_GPIO16
T65 PAD
1
R641 1 2 10K_0402_5% PAD T64 @ B3 C2
1
VSS_NCTF_7 VSS_NCTF_25 @
1
DGPU_PWROK
R194 1 2 10K_0402_5% T38 PAD
PAD T37 @ B47 VSS_NCTF_8 C48
PCH_GPIO22 VSS_NCTF_26 @
R290 1 2 10K_0402_5% T63 PAD
PAD T55 @ BD1 D1
VSS_NCTF_9 VSS_NCTF_27 @ Project ID GPIO69 GPIO70
PAD T34 @
BD49 D49
T32 PAD GPIO71
R649 PCH_GPIO39 VSS_NCTF_10 VSS_NCTF_28 @ * P5WE0 0 0 PCH_GPIO71
1 2 10K_0402_5% PAD T56 @ T54 PAD
BE1
R04 modify
VSS_NCTF_11 VSS_NCTF_29 E1
@ P7YE0 0 0
BE49
T33 PAD *VRAM 800 MHz 0
ODD_DETECT#
PAD T35 @ VSS_NCTF_12 VSS_NCTF_30 E49 @ x 1 0
R291 1 2 200K_0402_5% PAD T57 @
T53 PAD
VRAM 900 MHz 1
BT_ON#
PAD T36 @
BF1
VSS_NCTF_13 VSS_NCTF_31 F1
@
x 1 1
R619 1 2 10K_0402_5% T31 PAD
BF49 F49
PCH_GPIO48 VSS_NCTF_14 VSS_NCTF_32 @
R292 1 2 10K_0402_5%
WL_OFF# COUGARPOINT_FCBGA989~D
R274 1 2 10K_0402_5%
GPIO24 Unmultiplexed
+3VALW_PCH
NOTE: GPIO24 configuration
register bits are not cleared by
CF9h reset event.
PCH_GPIO24
R262 1 2 10K_0402_5% CRB1.0 PH10K to +3VALW
PCH_GPIO12
R620 1 2 10K_0402_5%
A A
SMIB
R672 1 2 1K_0402_5%
PCH_GPIO57
R263 1 2 10K_0402_5%

PCH (6/9) GPIO, CPU, MISC
Custom 0.4
5 4 3 2
Date: Wednesday, October 27, 2010 1
Sheet 18 of 61
5 4 3 2 1
+VCCADAC should be powered up during S0

system state.Note that Thermal Sensor +3VS
shares the same power supply rail with DAC L31
MBK1608221YZF_2P
+VCCADAC
+1.05VS_VTT U33G POWER 1 1 1
2 1
0.01U_0402_16V7K
C640
0.1U_0402_10V7K
C644
C629
1300mA 1 1 1
0.1U_0402_10V7K
C777
J3 R523 C276 C615
2 1 +1.05VS_PCH AA23 U48 0_0402_5% 22U_0805_6.3V6M 22U_0805_6.3V6M @ 22U_0805_6.3V6M
VCCCORE[1] VCCADAC 2 2 2
@
AC23
VCCCORE[2] 1mA 2 2 2
10U_0805_10V4Z
C334
1U_0402_6.3V6K
C320
1U_0402_6.3V6K
C346
CRT
1U_0402_6.3V6K
C319
AD21
PAD-OPEN 4x4m 1 1 1 1
2
VCCCORE[3]
AD23 VCCCORE[4] U47
VSSADAC
VCC CORE
@ AF21 VCCCORE[5]
AF23 VCCCORE[6]
D 2 2 2 2 R149 +3VS D
AG21 VCCCORE[7]
AG23 0.022_0805_1%
VCCCORE[8]
AG24
VCCCORE[9] AK36 +VCCA_LVDS 1 2
VCCALVDS
AG26
VCCCORE[10] 1mA UMA@
1
AG27 AK37
VCCCORE[11] VSSALVDS R176
AG29
VCCCORE[12] 0_0402_5%
AJ23
LVDS
VCCCORE[13] DISO@
AJ26 VCCCORE[14] AM37
VCCTX_LVDS[1] +1.8VS
AJ27
2
VCCCORE[15]
AJ29 AM38 L16 UMA@
VCCCORE[16] VCCTX_LVDS[2]
AJ31 0.1UH_MLF1608DR10KT_10%_1608
+1.05VS_PCH VCCCORE[17] +VCCTX_LVDS
60mA VCCTX_LVDS[3] AP36
1
2 1
0.1uH inductor, 200mA
1 1
1
AP37 C300
VCCTX_LVDS[4] 22U_0805_6.3V6M
AN19 C305 C310 R210
VCCIO[28] UMA@
0.01U_0402_16V7K 0.01U_0402_16V7K
2 UMA@ 2 UMA@ 2
DISO@
+VCCAPLLEXP
PAD T48 @ BJ22 VCCAPLLEXP 266mA 0_0402_5%
2
+3VS
PCH Power Rail Table
On-Die PLL voltage regulator enable
On-Die PLL Voltage Regulator V33
HVCMOS
H VCC3_3[6] I/O Buffer Voltage S0 Iccmax
AN16
VCCIO[15] Voltage Rail Voltage
1 Current(A)
VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 AN17
VCCIO[16]
,VCCAPLLSATA V34 C313
VCC3_3[7] V_PROC_IO 1.05 0.001 Processor I/F
AN21
2925mA 2
0.1U_0402_10V7K
VCCIO[17]
AN26 V5REF 5 0.001 PCH Core Well Reference Voltage
VCCIO[18] Internal PLL and VRM(+1.5VS)
+VCCAFDI_VRM
AN27 VCCIO[19] AT16
VCCVRM[3] V5REF_Sus 5 0.001 Suspend Well Reference Voltag
+1.05VS_PCH +1.05VS_PCH
C AP21 VCCIO[20] C
AP23 AT20 Vcc3_3 3.3 0.266 I/O Buffer Voltage

VCCIO[21] VCCDMI[1] DMI buffer logic
1
DMI
1U_0402_6.3V6K
C342
10U_0805_10V4Z
C314
Display DAC Analog Power. This power is

1U_0402_6.3V6K
C325
1U_0402_6.3V6K
C353
1U_0402_6.3V6K
C332
1 1 AP24
VCCIO
1 1 1 VCCIO[22]
20mA C344 VccADAC 3.3 0.001 supplied by the core well.
AP26 AB36 1U_0402_6.3V6K
VCCIO[23] VCCIO[1] 2 place near AT20
2 2 1
2 2 2 AT24 VccADPLLA 1.05 0.08 Display PLL A power
VCCIO[24] C308
1U_0402_6.3V6K Core Well I/O Buffer
2 place near AB36 VccADPLLB 1.05 0.08 Display PLL B power
AN33 VCCIO[25] 190mA
+3VS AN34 VCCPNAND[1] AG16 +1.8VS
VCCIO[26] VccCore 1.05 1.3 Internal Logic Voltage
NAND / SPI
BH29 VCC3_3[3] AG17
VCCPNAND[2] VccDFTERM should PH +1.8VS or +3VS VccDMI 1.05 0.042 DMI Buffer Voltage
1 1
C322 C349
0.1U_0402_10V7K AJ16 0.1U_0402_10V7K
VCCPNAND[3] VccIO 1.05 2.925 Core Well I/O buffers
2 +VCCAFDI_VRM 2
AP16 VCCVRM[2]
AJ17 1.05 V Supply for Intel R Management
VCCPNAND[4] VccASW 1.05 1.01 Engine and Integrated LAN
+1.05VS_VCCAPLL_FDI
PAD T19 @ BG6 VCCFDIPLL
+1.05VS_PCH VccSPI 3.3 0.02 3.3 V Supply for SPI Controller Logic
+3VS
AP17 VCCIO[27]
FDI
V1
Trace 20mil 20mA VCCSPI VccDSW 3.3 0.003 3.3v supply for Deep S4/S5 well
AU20 1 For SPI control logi
1 VCCDMI[2]
B C347
C703 VccpNAND 1.8 0.19 1.8V power supply for DF_TVS B
COUGARPOINT_FCBGA989~D 1U_0402_6.3V6K
2
2 1U_0402_6.3V6K
VccRTC 3.3 6 uA Battery Voltage
GPIO28 VccSus3_3 3.3 0.266 Suspend Well I/O Buffer Voltage

On-Die PLL Voltage Regulator
H
VccSusHDA 3.3 / 1.5 0.01
High Definition Audio Controller Suspend
+VCCAFDI_VRM
Voltage
VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2
+1.5VS 1.8 V Internal PLL and VRMs (1.8 V for
VccVRM 1.8 / 1.5 0.16 Desktop)
+VCCAFDI_VRM
R257 2 1 0_0603_5%
VccCLKDMI 1.05 0.02 DMI Clock Buffer Voltage
VCCVRM==>1.5V FOR MOBILE
VCCVRM==>1.8V FOR DESKTOP VccSSC 1.05 0.095 Spread Modulators Power Supply
HDA_SYNC PH(PLL =+1.5VS)

VCCVRM = 160mA detal waiting for newest spec
VccDIFFCLKN 1.05 0.055 Differential Clock Buffers Power Supply
Analog power supply for LVDS (Mobile
VccALVDS 3.3 0.001 Only)
Analog power supply for LVDS (Mobile
VccTX_LVDS 1.8 0.06 Only)
A A

PCH (7/9) PWR
Custom 0.4
5 4 3 2 1
5 4 3 2 1
Have internal VRM

+3VS R150
0_0805_5% +1.05VS_PCH R167
1 2 +1.05V analog 0_0603_5%
@ internal clock PLL 2 1 +VCCACLK
L14 Can NC VCC3_3 = 266mA detal waiting for newest spec
10UH_LB2012T100MR_20% @
+3VS_VCC_CLKF33 VCCDMI = 42mA detal waiting for newest spec
1 2
1 1
+3VALW_PCH U33J POWER +1.05VS_PCH
1U_0402_6.3V6K
C304
10U_0805_10V4Z
C277
1 AD49 VCCACLK N26
Not support Deep S4,S5 VCCIO[29]
2 1
2 connect to +3VALW C340 P26
VCCIO[30] C321
0.1U_0402_10V7K T16
D 2 VCCDSW3_3 1U_0402_6.3V6K D
P28
VCCIO[31] 2
PAD T17 @ +PCH_VCCDSW V12
3mA T27
DCPSUSBYP VCCIO[32]
T29
suppied by internal +3VS_VCC_CLKF33 VCCIO[33] +3VALW_PCH
T38 VCC3_3[5]
1.05V VR must NC
T23
PAD T11 @ +VCCAPLL_CPY_PCH VCCSUS3_3[7]
BH23
VCCAPLLDMI2 119mA T24
VCCSUS3_3[8] 1 1 +5VALW_PCH +3VALW_PCH
GPIO28
+1.05VS_PCH AL29 C330 C333
On-Die PLL Voltage Regulator VCCIO[14] 0.1U_0402_10V7K
V23 0.1U_0402_10V7K
USB
H VCCSUS3_3[9] Place near Place near
2
1
PAD T13 @ +VCCSUS1 AL24 V24 2P24 2P24
DCPSUS[3] VCCSUS3_3[10]
VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 R202 D8
P24 100_0402_1% CH751H-40PT_SOD323-2
,VCCAPLLSATA VCCSUS3_3[6]
+1.05VS_PCH
AA19
1
VCCASW[1]
2
+PCH_V5REF_SUS
+1.05VS_PCH
AA21
1010mA VCCIO[34] T26
1
VCCASW[2]
+1.05VS_PCH +PCH_V5REF_SUS C318
L12
10UH_LB2012T100MR_20%
AA24
VCCASW[3] 1mA V5REF_SUS M26
0.1U_0603_25V7K
+1.05VS_VCCA_A_DPL 1 1 2
Clock and Miscellaneous

22U_0805_6.3V6M
C335
22U_0805_6.3V6M
C336
1 2 AA26 VCCASW[4] +VCCA_USBSUS
DCPSUS[4] AN23 +3VALW_PCH @ T14 PAD
suppied by internal
1U_0402_6.3V6K
C296
AA27
220U_B2_2.5VM_R35
C279
1 2 VCCASW[5]
1
2 AN24 1.05V VR Must NC
AA29 VCCSUS3_3[1]
+ VCCASW[6]
+5VS +3VS
AA31 VCCASW[7]
2 2
+PCH_V5REF_RUN +3VALW_PCH
C AC26 VCCASW[8] 1mA V5REF
P34 C
2
1
1 1 1 D7
1U_0402_6.3V6K
C327
AC27
1U_0402_6.3V6K
C326
1U_0402_6.3V6K
C316
+1.05VS_VCCA_B_DPL VCCASW[9] +3V_VCCPSUS R148
1 2 N20 1 100_0402_1% CH751H-40PT_SOD323-2
PCI/GPIO/LPC
VCCSUS3_3[2] C352
L11 AC29 VCCASW[10]
2 1U_0402_6.3V6K
220U_B2_2.5VM_R35
C278
10UH_LB2012T100MR_20% 2 2 N22
1U_0402_6.3V6K
C295
1
VCCSUS3_3[3] +PCH_V5REF_RUN
2
AC31 VCCASW[11]
+ 1 2
P20 1
SGA00001700 VCCSUS3_3[4]
AD29 +3VS
VCCASW[12] C244
220U 2.5V M B2 VCCSUS3_3[5]
P22
2 2 AD31 1U_0603_10V6K
ESR 35mohm@100Khz VCCASW[13] 2
W21 VCC3_3[1] AA16
VCCASW[14]
1 1 1
W23 VCC3_3[8] W16 C704 C343 C309
VCCASW[15]
0.1U_0402_10V7K
Place near 0.1U_0402_10V7K
Place near 0.1U_0402_10V7K
Place near
W24 T34
VCCASW[16] VCC3_3[4] AJ2 AA16,W16 T34
2 2 2
W26
VCCASW[17]
W29
VCCASW[18]
+1.05VS_PCH
W31 AJ2
VCCASW[19] VCC3_3[2]
W33
VCCASW[20]
VCCIO[5] AF13
+VCCRTCEXT 1
N16 DCPRTC
AH13 C350
1 VCCIO[12]
C348 +VCCAFDI_VRM 1U_0402_6.3V6K
Y49 VCCVRM[4] AH14 2
0.1U_0402_10V7K VCCIO[13]
B 2 GPIO28
B

+1.05VS_VCCA_A_DPL AF14
BD47 80mA VCCIO[6] On-Die PLL Voltage Regulator
SATA
VCCADPLLA +VCCSATAPLL @ T62 PAD H
+1.05VS_VCCA_B_DPL VCCAPLLSATA AK1 +VCCAFDI_VRM
+1.05VS_PCH BF47
VCCADPLLB 80mA VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2
+VCCAFDI_VRM
VCCVRM[1]
AF11 ,VCCAPLLSATA
AF17 VCCIO[7]
AF33 +1.05VS_PCH
VCCIO[8]
AF34 VCCIO[9] 55mA VCCIO[2]
AC16
1 C317 AG34
1 C311 1 C312 1U_0402_6.3V6K
VCCIO[11]
AC17
1U_0402_6.3V6K 1U_0402_6.3V6K VCCIO[3] 1
Place Place Place C351
AG33 AD17
VCCIO[10] VCCIO[4] 1U_0402_6.3V6K
2
near AF17 2 near AG33 2 near AF33,
AF34,AG34
95mA
+VCCSST 2 +1.05VS_PCH
1 2 C354 V16 DCPSST
0.1U_0402_10V7K
+1.05VM_VCCSUS +VCCME_22
PAD T15 @ T17 DCPSUS[1] T21 R237 2 1 0_0603_5%
suppied by internal VCCASW[22]
V19
MISC
1.05V VR Must NC +1.05VS_PCH

DCPSUS[2]
+VCCME_23
VCCASW[23] V21 R224 2 1 0_0603_5%
1mA
CPU
BJ8 +VCCME_21
V_PROC_IO R236 2 1 0_0603_5%
VCCASW[21] T19
1 +RTCVCC +3VALW_PCH
4.7U_0603_6.3V6K
C700
1 1
0.1U_0402_10V7K
C693
0.1U_0402_10V7K
C694
+VCCSUSHDA
10mAVCCSUSHDA Need +3VALW and 0.1U close PCH
RTC
A22 P32 R206 1 0_0603_5%

HDA
2 VCCRTC 2
2 2
0.1U_0402_10V7K
C685
1U_0402_6.3V6K
C331
0.1U_0402_10V7K
C687
A 1 1 1 COUGARPOINT_FCBGA989~D 1 A
C315
Close P32
0.1U_0402_16V4Z
Place
near BJ8 2 2 2 2

2010/10/15 2011/10/15 Title
Issued Date Deciphered Date PCH (8/9) PWR
Custom 0.4
5 4 3 2 1
5 4 3 2 1
U33I
AY4 H46
VSS[159] VSS[259]
AY42 K18
VSS[160] VSS[260]
AY46 K26
VSS[161] VSS[261]
AY8 K39
VSS[162] VSS[262]
B11 K46
D U33H VSS[163] VSS[263] D
B15 K7
VSS[164] VSS[264]
H5 B19 L18
VSS[0] VSS[165] VSS[265]
B23 L2
AA17 VSS[166] VSS[266]
VSS[1] VSS[80] AK38 B27 L20
AA2 VSS[167] VSS[267]
VSS[2] AK4 B31 L26
VSS[81] VSS[168] VSS[268]
AA3 AK42 B35 L28
VSS[3] VSS[82] VSS[169] VSS[269]
AA33 VSS[83] AK46 B39 L36
AA34 VSS[4] VSS[170] VSS[270]
VSS[5] VSS[84] AK8 B7 L48
AB11 VSS[171] VSS[271]
VSS[6] AL16 F45 M12
VSS[85] VSS[172] VSS[272]
AB14 VSS[7] AL17 BB12 P16
VSS[86] VSS[173] VSS[273]
AB39 VSS[8] AL19 BB16 M18
AB4 VSS[87] VSS[174] VSS[274]
VSS[9] AL2 BB20 M22
VSS[88] VSS[175] VSS[275]
AB43 VSS[10] AL21 BB22 M24
VSS[89] VSS[176] VSS[276]
VSS[90] VSS[177] VSS[277]
VSS[91] VSS[178] VSS[278]
AC19 VSS[13] AL27 BB30 M34
AC2 VSS[92] VSS[179] VSS[279]
VSS[14] VSS[93] AL31 BB38 M38
AC21 VSS[180] VSS[280]
VSS[15] VSS[94] AL33 BB4 M4
AC24 VSS[181] VSS[281]
VSS[16] AL34 BB46 M42
AC33 VSS[95] AL48 VSS[182] VSS[282]
VSS[17] VSS[96] BC14 VSS[183] M46
AC34 AM11 BC18 VSS[283]
VSS[18] VSS[97] VSS[184] VSS[284] M8
AC48 AM14 BC2 N18
VSS[19] VSS[98] VSS[185] VSS[285]
AD10 AM36 BC22 P30
VSS[20] VSS[99] VSS[186] VSS[286]
AD11 AM39 BC26
VSS[21] VSS[100] VSS[187] N47
AD12 AM43 BC32 VSS[287]
VSS[22] VSS[101] VSS[188] VSS[288] P11
AD13 AM45 BC34 P18
VSS[23] VSS[102] VSS[189] VSS[289]
AD19 VSS[24] AM46 BC36 T33
AD24 VSS[103] VSS[190] VSS[290]
VSS[25] AM7 BC40 P40
AD26 VSS[104] VSS[191] VSS[291]
VSS[26] AN2 BC42 P43
AD27 VSS[105] VSS[192] VSS[292]
VSS[27] AN29 BC48 P47
AD33 VSS[106] VSS[193] VSS[293]
VSS[28] AN3 BD46 P7
AD34 VSS[107] VSS[194] VSS[294]
VSS[29] AN31 BD5 R2
C
AD36 VSS[108] VSS[195] VSS[295] C
VSS[30] AP12 BE22 R48
AD37 VSS[109] VSS[196] VSS[296]
VSS[31] AP19 BE26 T12
VSS[110] VSS[197] VSS[297]
AD38 AP28 BE40 T31
AD39 VSS[32] VSS[111] VSS[198] VSS[298]
VSS[33] AP30 BF10 T37
AD4 VSS[112] VSS[199] VSS[299]
VSS[34] AP32 BF12 T4
AD40 VSS[113] VSS[200] VSS[300]
VSS[35] VSS[114] AP38 BF16 W34
AD42 AP4 VSS[201] VSS[301]
VSS[36] VSS[115] BF20 T46
AD43 AP42 VSS[202] VSS[302]
VSS[37] VSS[116] BF22 T47
AD45 AP46 VSS[203] VSS[303]
VSS[38] VSS[117] BF24 T8
AD46 AP8 VSS[204] VSS[304]
VSS[39] VSS[118] BF26 V11
AD8 AR2 VSS[205] VSS[305]
VSS[40] VSS[119] BF28 V17
AE2 AR48 VSS[206] VSS[306]
VSS[41] VSS[120] BD3 V26
AE3 AT11 VSS[207] VSS[307]
VSS[42] VSS[121] BF30 V27
AF10 AT13 VSS[208] VSS[308]
VSS[43] VSS[122] BF38 V29
AF12 AT18 VSS[209] VSS[309]
VSS[44] VSS[123] BF40 V31
AD14 AT22 VSS[210] VSS[310]
VSS[45] VSS[124] BF8 V36
AD16 AT26 VSS[211] VSS[311]
VSS[46] VSS[125] BG17 V39
AF16 AT28 VSS[212] VSS[312]
VSS[47] VSS[126] BG21 V43
AF19 AT30 VSS[213] VSS[313]
VSS[48] VSS[127] BG33 V7
AF24 AT32 VSS[214] VSS[314]
VSS[49] VSS[128] BG44 W17
AF26 AT34 VSS[215] VSS[315]
VSS[50] VSS[129] BG8 W19
AF27 AT39 VSS[216] VSS[316]
VSS[51] VSS[130] BH11 W2
AF29 AT42 VSS[217] VSS[317]
VSS[52] VSS[131] BH15 W27
AF31 AT46 VSS[218] VSS[318]
VSS[53] VSS[132] BH17 W48
AF38
VSS[54] AT7 VSS[219] VSS[319]
VSS[133] BH19 VSS[220] Y12
AF4 AU24 VSS[320]
VSS[55] VSS[134] Y38
AF42 AU30 H10 VSS[221] VSS[321]
VSS[56] VSS[135] BH27 Y4
AF46 AV16 VSS[222] VSS[322]
VSS[57] VSS[136] BH31 Y42
AF5 AV20 VSS[223] VSS[323]
AF7 VSS[58] VSS[137] BH33 VSS[224] Y46
VSS[59] AV24 BH35 VSS[324]
AF8 VSS[138] VSS[225] Y8
VSS[60] AV30 BH39 VSS[325]
AG19 VSS[139] VSS[226] BG29
B VSS[61] AV38 BH43 VSS[328] B
AG2 VSS[140] VSS[227] N24
VSS[62] AV4 BH7 VSS[329]
AG31 VSS[141] VSS[228] AJ3
VSS[63] AV43 D3 VSS[330]
AG48 VSS[142] VSS[229] AD47
VSS[64] AV8 D12 VSS[331]
AH11 VSS[143] VSS[230] B43
VSS[65] AW14 D16 VSS[333]
AH3 VSS[144] VSS[231] BE10
VSS[66] AW18 D18 VSS[334]
AH36 VSS[145] VSS[232] BG41
VSS[67] AW2 D22 VSS[335]
AH39 VSS[146] VSS[233] G14
VSS[68] AW22 D24 VSS[337]
AH40 VSS[147] VSS[234] H16
VSS[69] AW26 D26 VSS[338]
AH42 VSS[148] VSS[235] T36
VSS[70] AW28 D30 VSS[340]
AH46 VSS[149] VSS[236] BG22
VSS[71] AW32 D32 VSS[342]
AH7 VSS[150] VSS[237] BG24
VSS[72] AW34 VSS[343]
AJ19 VSS[151] D34 C22
VSS[73] AW36 VSS[238] VSS[344]
VSS[152] D38 AP13
AJ21 AW40 VSS[239] VSS[345]
VSS[74] VSS[153] D42 M14
AJ24 AW48 VSS[240] VSS[346]
AJ33 VSS[75] VSS[154] D8 AP3
VSS[76] VSS[155] AV11 VSS[241] VSS[347]
AJ34 AY12 E18 AP1
VSS[77] VSS[156] VSS[242] VSS[348]
AK12 AY22 E26 BE16
VSS[78] VSS[157] VSS[243] VSS[349]
AK3 AY28 G18 VSS[244] BC16
VSS[79] VSS[158] VSS[350]
G20 VSS[245] BG28
COUGARPOINT_FCBGA989~D G26 VSS[351]
VSS[246] VSS[352] BJ28
G28 VSS[247]
G36 VSS[248]
G48 VSS[249]
H12 VSS[250]
H18 VSS[251]
H22
VSS[252]
H24
VSS[253]
H26
VSS[254]
H30
VSS[255]
H32
VSS[256]
H34
VSS[257]
A F3 VSS[258]
A

PCH (9/9) VSS
Custom 0.4
5 4 3 2 1
A B C D E
U27A
4 PEG_HTX_C_GRX_P0 AP17 Part 1 of 7 K1 GPIO I/O USAGE

PEX_RX0 GPIO0 R808 2 DIS@ 1 10K_0402_5%
4 PEG_HTX_C_GRX_N0 AN17 K2
PEX_RX0_N GPIO1
4 PEG_HTX_C_GRX_P1 AN19 PEX_RX1 K3
GPIO2
4 PEG_HTX_C_GRX_N1 AP19
PEX_RX1_N GPIO3 H3 GPIO0 IN N/A
4 PEG_HTX_C_GRX_P2 AR19 H2
PEX_RX2 GPIO4 GPU_VID0
4 PEG_HTX_C_GRX_N2 AR20 H1 GPU_VID0 54
PEX_RX2_N GPIO5 GPU_VID1
4 PEG_HTX_C_GRX_P3 AP20 PEX_RX3 GPIO6
H4 GPU_VID1 54 GPIO1 IN HPD_IFPC
4 PEG_HTX_C_GRX_N3 AN20 PEX_RX3_N H5
GPIO7
4 PEG_HTX_C_GRX_P4 AN22 H6 R78 2 DIS@ 1 10K_0402_5% +3VSDGPU
PEX_RX4 GPIO8
PEX_RX4_N GPIO9 J7 R70 2 DIS@ 1 10K_0402_5% GPIO2 OUT N/A
4 PEG_HTX_C_GRX_P5 AR22 PEX_RX5 K4
GPIO10 +3VSDGPU
4 PEG_HTX_C_GRX_N5 AR23 PEX_RX5_N K5
GPIO11
AP23 H7 VGA_ACIN R74 2 DIS@ 1 10K_0402_5% GPIO3 OUT N/A
GPIO
1 4 PEG_HTX_C_GRX_P6 PEX_RX6 GPIO12 +3VSDGPU 1
4 PEG_HTX_C_GRX_N6 AN23 PEX_RX6_N J4
AN25 GPIO13 2 1 ACIN_BUF
4 PEG_HTX_C_GRX_P7 PEX_RX7 J6
GPIO14
PEX_RX7_N GPIO15 L1 D31 CH751H-40PT_SOD323-2 GPIO4 OUT N/A
4 PEG_HTX_C_GRX_P8 AR25 L2 DIS@
PEX_RX8 GPIO16 R03 modify
4 PEG_HTX_C_GRX_N8 AR26 L4
PEX_RX8_N GPIO17
4 PEG_HTX_C_GRX_P9 AP26 M4 GPIO5 OUT GPU Core VID0
5
PEX_RX9 GPIO18 U42
4 PEG_HTX_C_GRX_N9 AN26 L7 DIS@
PEX_RX9_N GPIO19 VGA_HDMI_DET
4 PEG_HTX_C_GRX_P10 AN28 L5 R118 1 10K_0402_5% 2
P
PEX_RX10 GPIO20 2 ACIN_BUF B
4 PEG_HTX_C_GRX_N10 AP28 PEX_RX10_N GPIO21
K6 VGA_PNL_PWM
DIS@ 4 Y GPIO6 OUT GPU Core VID1
4 PEG_HTX_C_GRX_P11 AR28 L6 2 R117 1 10K_0402_5% 1 ACIN 15,40,44,45,48
A
G
PEX_RX11 GPIO22
4 PEG_HTX_C_GRX_N11 AR29 M6 DIS@
PEX_RX11_N GPIO23 ENVDD
4 PEG_HTX_C_GRX_P12 AP29 M7 2 R72 1 10K_0402_5% NC7SZ08P5X_NL_SC70-5 GPIO7 OUT N/A
3
PEX_RX12 GPIO24 DIS@
4 PEG_HTX_C_GRX_N12 AN29 DIS@
PEX_RX12_N VGA_BKL_EN
4 PEG_HTX_C_GRX_P13 AN31 N1 2 R115 1 10K_0402_5%
PEX_RX13 MIOA_D0_NC
4 PEG_HTX_C_GRX_N13 AP31 PEX_RX13_N MIOA_D1_NC P4 GPIO8 IN OVERT
4 PEG_HTX_C_GRX_P14 AR31 P1
PEX_RX14 MIOA_D2_NC
4 PEG_HTX_C_GRX_N14 AR32 P2
PEX_RX14_N MIOA_D3_NC
4 PEG_HTX_C_GRX_P15 AR34
PEX_RX15 MIOA_D4_NC P3 GPIO9 OUT ALERT
4 PEG_HTX_C_GRX_N15 AP34 T3
PEX_RX15_N MIOA_D5_NC
T2
MIOA_D6_NC GPIO10 OUT N/A
T1
4 PEG_GTX_HRX_P0 AL17 MIOA_D7_NC
PEX_TX0 U4
4 PEG_GTX_HRX_N0 MIOA_D8_NC
AM17
PCI EXPRESS
PEX_TX0_N U1
4 PEG_GTX_HRX_P1 MIOA_D9_NC GPIO11 OUT N/A
AM18 U2
PEX_TX1 MIOA_D10_NC
4 PEG_GTX_HRX_N1 AM19 U3
PEX_TX1_N MIOA_D11_NC
4 PEG_GTX_HRX_P2 AL19 R6
PEX_TX2 MIOA_D12_NC GPIO12 IN PWR_LEVEL
4 PEG_GTX_HRX_N2 AK19
DVO
PEX_TX2_N T6
4 PEG_GTX_HRX_P3 AL20 MIOA_D13_NC
PEX_TX3 MIOA_D14_NC N6
4 PEG_GTX_HRX_N3 AM20 +3VSDGPU
4 PEG_GTX_HRX_P4 PEX_TX3_N GPIO13 OUT N/A
AM21 PEX_TX4 Y1
4 PEG_GTX_HRX_N4 AM22 MIOB_D0_NC I2CS_SCL
PEX_TX4_N Y2 R495 1 DIS@ 2 2.2K_0402_5%
2 4 PEG_GTX_HRX_P5 AL22 MIOB_D1_NC I2CS_SDA 2
PEX_TX5 Y3
4 PEG_GTX_HRX_N5 AK22 MIOB_D2_NC
AB3 I2CH_SCL R494 1 DIS@ 2 2.2K_0402_5%
GPIO14 OUT N/A
4 PEG_GTX_HRX_P6 PEX_TX5_N MIOB_D3_NC
AL23 AB2 I2CH_SDA R122 DIS@ 2.2K_0402_5%
4 PEG_GTX_HRX_N6 AM23
PEX_TX6 MIOB_D4_NC I2CB_SCL R121 1 1DIS@ 2 22.2K_0402_5%
PEX_TX6_N MIOB_D5_NC AB1
4 PEG_GTX_HRX_P7 AM24 I2CB_SDA R120 1 DIS@ 2 2.2K_0402_5%
PEX_TX7 MIOB_D6_NC AC4 R119 DIS@ 2.2K_0402_5%
4 PEG_GTX_HRX_N7 AM25 VGA_LCD_CLK 1 2
PEX_TX7_N MIOB_D7_NC AC1
4 PEG_GTX_HRX_P8 AL25 VGA_LCD_DATA R502 1 DIS@ 2 2.2K_0402_5%
PEX_TX8 MIOB_D8_NC AC2
4 PEG_GTX_HRX_N8 AK25 R497 1 DIS@ 2 2.2K_0402_5%
PEX_TX8_N MIOB_D9_NC AC3
4 PEG_GTX_HRX_P9 AL26 VGA_DDC_CLK XTALOUT XTALIN
PEX_TX9 MIOBD_10_NC AE3
4 PEG_GTX_HRX_N9 AM26 VGA_DDC_DATA
PEX_TX9_N AE2 R123 1 DIS@
R124 DIS@ 22.2K_0402_5%
2.2K_0402_5% @
4 PEG_GTX_HRX_P10 AM27 MIOB_D11_NC 1 2
4 PEG_GTX_HRX_N10 PEX_TX10 MIOB_D12_NC U6 R474 1M_0402_5%
AM28 PEX_TX10_N W6
4 PEG_GTX_HRX_P11 AL28 MIOB_D13_NC VGA_CRT_R
4 PEG_GTX_HRX_N11 PEX_TX11 Y6 R45 1 DIS@ 2 150_0402_1% 2 1
AK28 MIOB_D14_NC VGA_CRT_G
4 PEG_GTX_HRX_P12 PEX_TX11_N R48 1 DIS@ 2 150_0402_1%
AK29 N3 VGA_CRT_B
4 PEG_GTX_HRX_N12 PEX_TX12 MIOA_HSYNC_NC R49 1 DIS@ 2 150_0402_1% Y1 DIS@ 1
AL29 PEX_TX12_N L3 27MHZ_16PF_X5H027000FG1H
4 PEG_GTX_HRX_P13 MIOA_VSYNC_NC 1
AM29 DIS@ C577
4 PEG_GTX_HRX_N13 PEX_TX13
AM30 PEX_TX13_N W1 DIS@ C576 18P_0402_50V8J
4 PEG_GTX_HRX_P14 AM31 MIOB_HSYNC_NC
PEX_TX14 W2 18P_0402_50V8J 2
4 PEG_GTX_HRX_N14 AM32 MIOB_VSYNC_NC
PEX_TX14_N 2
4 PEG_GTX_HRX_P15 AN32
4 PEG_GTX_HRX_N15 PEX_TX15 MIOA_DE_NC N2
AP32 P5
PEX_TX15_N MIOA_CTL3_NC
MIOA_VREF_NC N5
+3VSDGPU 1 DIS@ 2 14 CLK_PEG_VGA Y5

AR16 MIOB_DE_NC
R418 10K_0402_5% 14 CLK_PEG_VGA# PEX_REFCLK W3
AR17 MIOB_CTL3_NC
AF1
14 PEG_CLKREQ#
AR13
PEX_REFCLK_N MIOB_VREF_NC External Spread Spectrum OSC_OUT XTAL_OUTBUFF
PEX_CLKREQ_N R479 1 DIS@ 2 10K_0402_5% R477 1 @ 2 22_0402_5%
N4
MIOA_CLKIN_NC
1
2 1 AJ17 R4 U29
PEX_TSTCLK_OUT MIOA_CLKOUT_NC
R44 @ AJ18
200_0402_1% R465 1 DIS@ 2 10K_0402_5% 1 6 R455
PEX_TSTCLK_OUT_N REFOUT VSS
3 AE1 10K_0402_5% 3
MIOB_CLKIN_NC OSC_SPREAD
17 PLTRST_VGA# V4 2 5 DIS@
AM16 MIOB_CLKOUT_NC XOUT MODOUT
2 1 PEX_RST_N OSC_OUT
2
R67 DIS@ 2.49K_0402_1% AG21 T4 3 4 +3VSDGPU
PEX_TERMP MIOA_CLKOUT_NC_N XIN/CLKIN VDD
W4
+1.05VSDGPU MIOB_CLKOUT_NC_N OSC_SPREAD XTAL_SSIN
150mA R458 1 DIS@ 2 10K_0402_5% R476 1 @ 2 22_0402_5%
FBMA-L10-160808-300LMT 0603 +GPU_PLLVDD 1
DIS@ U5 @ ASM3P2872AF-06OR_TSOT-23-6 @
MIOACAL_PD_VDDQ_NC
0.1U_0402_16V4Z
10U_0603_6.3V6M
AE9 T5 C581
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2 1 PLLVDD MIOACAL_PU_GND_NC
DIS@ C146
DIS@ C190
1
4700P_0402_25V7K
22U_0805_6.3V6M
DIS@ C186
1 0.1U_0402_16V4Z
DIS@ C180
0.1U_0402_16V4Z
L9 1 1 1 2
@ C187
DIS@ C189
AF9 AA7 R462 1 DIS@ 2 10K_0402_5%

DIS@ C184
1 1 1 SP_PLLVDD MIOBCAL_PD_VDDQ_NC
MIOBCAL_PU_GND_NC AA6 R454
XTALIN AD9 10K_0402_5%
CLK
2 2 2 VID_PLLVDD
2 XTALOUT DIS@
B1
2
2
2 2
XTAL_OUTBUFF B2
XTAL_IN
AM15
If External Spread Spectrum not stuff then stuff resistor
XTAL_OUT DACA_RED
under GPU XTAL_SSIN AM14
D1 DACA_GREEN
XTAL_OUTBUFF AL14
D2 DACA_BLUE
XTAL_SSIN
AM13
DACA_HSYNC
I2CS_SCL AL13 +DACA_VDD
DACA_VSYNC
I2CS_SDA
E2 I2CS_SCL AJ12
DACA_VDD
0.1U_0402_16V4Z
VGA_LCD_CLK E1 AK12
I2CS_SDA DACA_VREF
VGA_LCD_DATA AK13
DACA_RSET
DIS@ C124
124_0402_1%
E3 1
10K_0402_5%
+3VSDGPU I2CC_SCL
DACs
R65
I2CB_SCL E4 AK4
1
1 1
OPT@ R113
For RF request @ I2CC_SDA DACB_RED
@ I2CB_SDA AL4
C197 C195 G3 DACB_GREEN
I2CB_SCL AJ4
I2C
0.01U_0402_16V7K DACB_BLUE
DIS@ 2
0.01U_0402_16V7K VGA_DDC_CLK G2
2 2 I2CB_SDA
I2CS_SCL VGA_DDC_DATA
2
AM1
2
EC_SMB_CK2 14,40 CRT G1 DACB_HSYNC
2
I2CA_SCL AM2 DIS@
I2CH_SCL G4 DACB_VSYNC
I2CA_SDA R466 2 1 10K_0402_5%
4 1 6 I2CH_SDA 4
AG7
F6 DACB_VDD AK6 @ R467 1 2 124_0402_1%
DMN66D0LDW-7_SOT363-6 I2CH_SCL DACB_VREF @ C154 1 2 0.1U_0402_16V4Z
+3VSDGPU G6 AH7
Q31A DIS@ I2CH_SDA DACB_RSET
5
N12P-GV1-A1_BGA973 DIS@
I2CS_SDA
4 3 EC_SMB_DA2 14,40
DMN66D0LDW-7_SOT363-6
Q31B DIS@
N12P PEG 1/9
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom JE50-HR/SJV50-HR M/B Schematics 0.4
A B C D Date: Wednesday, October 27, 2010 E Sheet 22 of 61
A
VRAM Interface 27
27
MDA[15..0]
MDA[31..16]
MDA[15..0]
MDA[31..16] 29 MDC[15..0]
MDC[15..0]
MDC[31..16]
MDA[47..32] 29 MDC[31..16]
28 MDA[47..32] MDC[47..32]
MDA[63..48] 30 MDC[47..32]
28 MDA[63..48] MDC[63..48]
30 MDC[63..48]
U27B U27C
CMDA[30..0] 27,28 CMDC[30..0] 29,30
Part 2 of 7 U30 CMDA0 Part 3 of 7 CMDC0
MDA0 FBA_CMD0 CMDA1 MDC0 FBC_CMD0 F18
L32 V30 B13 CMDC1
MDA1 FBA_D0 FBA_CMD1 CMDA2 MDC1 FBC_D0 FBC_CMD1 E19
N33 U31 D13 CMDC2
MDA2 FBA_D1 FBA_CMD2 CMDA3 MDC2 FBC_D1 D18
L33 V32 FBC_CMD2 CMDC3
MDA3 FBA_D2 FBA_CMD3 CMDA4 A13 FBC_D2 C17
N34 T35 MDC3 FBC_CMD3 CMDC4
MDA4 FBA_D3 FBA_CMD4 CMDA5 A14 F19
N35 MDC4 FBC_D3 FBC_CMD4 CMDC5
FBA_D4 FBA_CMD5 U33 C16 C19
MDA5 CMDA6 MDC5 FBC_D4 FBC_CMD5 CMDC6
P35 W32 B16 B17
MDA6 FBA_D5 FBA_CMD6 CMDA7 MDC6 FBC_D5 FBC_CMD6 CMDC7
P33 W33 CMDA8 A17 E20
MDA7 FBA_D6 FBA_CMD7 MDC7 FBC_D6 FBC_CMD7 CMDC8
P34 W31 D16 B19
K35 W34 C13 D20
K33 U34 B11 A19
K34 FBA_D10 U35 C11 D19
MDA11 FBA_CMD11 CMDA12 MDC11 FBC_D10 FBC_CMD11 CMDC12
MDA12 H33 FBA_D11 U32 A11 C20
FBA_CMD12 CMDA13 MDC12 FBC_D11 FBC_CMD12 CMDC13
MDA13 G34 FBA_D12 T34 C10 F20
MDA14 G33 FBA_D13 T33 C8 B20
MDA15 E34 FBA_D14 W30 B8 G21
MDA16 E33 FBA_D15 AB30 A8 F22
MDA17 G31 FBA_D16 AA30 CMDA18 E8 F24
F30 FBA_CMD17 MDC17 FBC_D16 FBC_CMD17 CMDC18
MDA18 FBA_D17 FBA_CMD18 AB31 CMDA19 F8 F23
MDC18 FBC_D17 FBC_CMD18 CMDC19
MDA19 G30 FBA_D18 AA32 F10 C25
MDA20 G32 AB33 CMDA21 F9
FBA_D19 FBA_CMD20 MDC20 FBC_D19 C23 CMDC21
MDA21 K30 Y32 F12 FBC_CMD20
FBA_D20 FBA_CMD21 CMDA22 MDC21 FBC_D20 FBC_CMD21 F21 CMDC22
MDA22 K32 Y33 CMDA23 D8 E22
FBA_D21 FBA_CMD22 MDC22 FBC_D21 FBC_CMD22 CMDC23
MDA23 H30 AB34 CMDA24 D11 D21
MDA24 K31 AB35 CMDA25 E11 A23
MDA25 L31 Y35 CMDA26 D12
FBA_D24 FBA_CMD25 MDC25 FBC_D24 FBC_CMD25 D22 CMDC26
MDA26 L30 W35 CMDA27 E13 B23
MEMORY INTERFACE
MDA27 M32 Y34
MEMORY INTERFACE C
FBA_D26 FBA_CMD27 CMDA28 MDC27 F13 C22 CMDC28
MDA28 N30 Y31 FBC_D26 FBC_CMD27
FBA_D27 FBA_CMD28 CMDA29 MDC28 F14 B22 CMDC29
MDA29 M30 Y30 FBC_D27 FBC_CMD28
FBA_D28 FBA_CMD29 CMDA30 MDC29 F15 A22 CMDC30
MDA30 P31 W29 FBC_D28 FBC_CMD29
FBA_D29 FBA_CMD30 MDC30 E16 FBC_D29 A20
MDA31 R32 FBA_D30 Y29 MDC31 F16 FBC_CMD30
R30 FBA_CMD31 FBC_D30 FBC_CMD31 G20
MDA32 FBA_D31 DQMA0 DQMA[3..0] 27 MDC32 F17 DQMC0 DQMC[3..0] 29
MDA33 AG30 P32 DQMA1 FBC_D31
FBA_D32 FBA_DQM0 MDC33 D29 A16 DQMC1
MDA34 AG32 H34 DQMA2 FBC_D32 FBC_DQM0
FBA_D33 FBA_DQM1 MDC34 F27 D10 DQMC2
MDA35 AH31 J30 DQMA3 FBC_D33 FBC_DQM1
FBA_D34 FBA_DQM2 MDC35 F28 F11 DQMC3
MDA36 AF31 P30 DQMA4 DQMA[7..4] 28 FBC_D34 FBC_DQM2 DQMC[7..4] 30
FBA_D35 FBA_DQM3 MDC36 E28 D15 DQMC4
MDA37 AF30 AF32 DQMA5 MDC37 FBC_D35 FBC_DQM3
FBA_D36 FBA_DQM4 D26 FBC_D36 D27 DQMC5
MDA38 AE30 AL32 DQMA6 MDC38 F25 FBC_DQM4
FBA_D37 FBA_DQM5 FBC_D37 D34 DQMC6
MDA39 AC32 AL34 DQMA7 MDC39 D24 FBC_DQM5
FBA_D38 FBA_DQM6 FBC_D38 A34 DQMC7
MDA40 AD30 AF35 MDC40 FBC_DQM6
FBA_D39 FBA_DQM7 E25 FBC_D39 D28
MDA41 AN33 DQSA#0 DQSA#[3..0] 27 MDC41 FBC_DQM7 DQSC#[3..0] 29
FBA_D40 E32 DQSC#0
MDA42 AL31 L35 DQSA#1 MDC42 FBC_D40
FBA_D41 F32 DQSC#1
A
MDA43 AM33 FBA_DQS_RN0 DQSA#2 FBC_D41 B14

FBA_D42 G35 MDC43 D33 FBC_DQS_RN0 DQSC#2
MDA44 AL33 FBA_DQS_RN1 DQSA#3 FBC_D42 B10
1
FBA_D43 H31 MDC44 E31 FBC_DQS_RN1 DQSC#3

1
MDA45 AK30 FBA_DQS_RN2 DQSA#4 FBC_D43 D9

FBA_D44 N32 DQSA#[7..4] 28 MDC45 C33 FBC_DQS_RN2 DQSC#4 DQSC#[7..4] 30
MDA46 AK32 FBA_DQS_RN3 DQSA#5 FBC_D44 E14
FBA_D45 AD32 MDC46 F29 FBC_DQS_RN3 DQSC#5
MDA47 AJ30 FBA_DQS_RN4 DQSA#6 FBC_D45 F26
FBA_D46 AJ31 MDC47 D30 FBC_DQS_RN4 DQSC#6
MDA48 AH30 FBA_DQS_RN5 DQSA#7 FBC_D46 D31
FBA_D47 AJ35 MDC48 E29 FBC_DQS_RN5 DQSC#7
MDA49 AH33 FBA_DQS_RN6 FBC_D47 A31
FBA_D48 AC34 MDC49 B29 FBC_DQS_RN6
MDA50 AH35 FBA_DQS_RN7 DQSA0 FBC_D48 A26
FBA_D49 DQSA[3..0] 27 MDC50 C31 FBC_DQS_RN7 DQSC0 DQSC[3..0] 29
MDA51 AH34 L34 DQSA1 MDC51 FBC_D49 DQSC1
FBA_D50 FBA_DQS_WP0 C29 C14
MDA52 AH32 H35 DQSA2 MDC52 FBC_D50 FBC_DQS_WP0 DQSC2
FBA_D51 FBA_DQS_WP1 B31 A10
MDA53 AJ33 J32 DQSA3 MDC53 FBC_D51 FBC_DQS_WP1 DQSC3
FBA_D52 FBA_DQS_WP2 C32 E10
MDA54 AL35 N31 DQSA4 DQSA[7..4] 28 MDC54 FBC_D52 FBC_DQS_WP2 DQSC4 DQSC[7..4] 30
MDA55
FBA_D53 FBA_DQS_WP3 B32 D14
AM34 AE31 DQSA5 MDC55 FBC_D53 FBC_DQS_WP3 DQSC5
MDA56 FBA_D54 FBA_DQS_WP4 B35 E26
AM35 AJ32 DQSA6 MDC56 FBC_D54 FBC_DQS_WP4 DQSC6
MDA57 FBA_D55 FBA_DQS_WP5 DQSA7 B34 D32
AF33 FBA_D56 AJ34 MDC57 FBC_D55 FBC_DQS_WP5 DQSC7
MDA58 AE32 FBA_DQS_WP6 A29 A32
FBA_D57 AC33 MDC58 FBC_D56 FBC_DQS_WP6
MDA59 AF34 FBA_DQS_WP7 MDC59 B28 B26
FBA_D58 FBC_D57 FBC_DQS_WP7
MDA60 AE35 MDC60 A28
FBA_D59 P29 FBC_D58
MDA61 AE34 FBA_WCK0 MDC61 C28 G14
FBA_D60 R29 FBC_D59 FBC_WCK0
MDA62 AE33 FBA_WCK0_N MDC62 C26 G15
FBA_D61 L29 FBC_D60 FBC_WCK0_N
MDA63 AB32 FBA_WCK1 MDC63 D25 G11
FBA_D62 M29 FBC_D61 FBC_WCK1
AC35 FBA_WCK1_N B25 G12
FBA_D63 AG29 FBC_D62 FBC_WCK1_N
FBA_WCK2 A25 G27
+FB_PLLAVDD_0 AH29 +1.5VSDGPU FBC_D63 FBC_WCK2
FBA_WCK2_N G28
AG27 AD29 FBC_WCK2_N
FB_DLLAVDD_0 FBA_WCK3 G24
AF27 AE29 FBC_WCK3
FB_PLLAVDD_0 FBA_WCK3_N 2 DIS@ 1 K27 G25
+FB_PLLAVDD_1 FBCAL_PD_VDDQ FBC_WCK3_N
J19 40.2_0402_1% DIS@ R36
FB_DLLAVDD_1 2 1
J18 T32 CLKA0 27 40.2_0402_1% R42 L27 CLKC0 29
FB_PLLAVDD_1 FBA_CLK0 FBCAL_PU_GND
T31 CLKA0# 27 DIS@ 1 FBC_CLK0 E17 CLKC0# 29
FBA_CLK0_N 2
FBA_DEBUG0 J27 FBB_DEBUG0
60.4_0402_1% R41 M27 FBC_CLK0_N D17
FB_VREF_NC FBCAL_TERM_GND
FBA_DEBUG1 T30 AC31 CLKA1 28 FBB_DEBUG1 CLKC1 30
FBA_DEBUG0 FBA_CLK1 CLKA1# 28 G19 D23 CLKC1# 30
T29 AC30 FBC_DEBUG0 FBC_CLK1
FBA_DEBUG1 FBA_CLK1_N G16 E23
FBB_DEBUG1 FBC_CLK1_N
N12P-GV1-A1_BGA973 DIS@ N12P-GV1-A1_BGA973

DIS@
+FB_PLLAVDD_0 +FB_PLLAVDD_1
+1.5VSDGPU DIS@ DIS@
FBA_DEBUG0 +1.05VSDGPU +1.05VSDGPU
2 1 2 1
0.1U_0402_16V4Z
100mA 100mA
10U_0805_10V4Z
0.1U_0402_16V4Z
L25 L26
0.1U_0402_16V4Z
DIS@ 1
C55
2 1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0805_10V4Z
FBB_DEBUG0
0.1U_0402_16V4Z
DIS@ C501
C54
DIS@ C101
60.4_0402_1% R38 1 1 BLM18PG330SN1_2P 1 BLM18PG330SN1_2P
DIS@ C583
DIS@ C582
1U_0603_10V6K
DIS@ C584
DIS@ C578
DIS@ C505
1U_0603_10V6K
DIS@ C504
1 1 1 1 1 1
2 DIS@ 1
DIS@
60.4_0402_1% R43
DIS@
2
FBA_DEBUG1 2 2 2
2 DIS@ 1 2 2 2 2 2 2
10K_0402_5% R34
FBB_DEBUG1
2 DIS@ 1
10K_0402_5% R478

2010/10/15 2011/10/15 Title
Issued Date Deciphered Date N12P VRAM 2/9
A

5 4 3 2 1
For GB2-128 & GB2b-128 colayout.... For N12P-GV ES strap table

U27D +3VSDGPU Frenq. N12P-GS strap0 strap1 strap2 ROM_SI ROM_SO ROM_SCLK strap3 strap4
Part 4 of 7 64MX16 H L H L H H L L
2
AM11 A2 800 MHz Hynix 45K 35K 45K 15K 10K 15K 15K 20K
IFPA_TXC NC_0
AM12 A7 R774 SA000032420
IFPA_TXC_N NC_1
AM8 B7 10K_0402_5%
IFPA_TXD0 NC_2 64MX16 H L H L H H L L
AL8 C5 @
IFPA_TXD0_N NC_3 STRAP4 900 MHz Hynix 45K 35K 45K 15K 10K 15K 15K 20K
AM10 NC_4 C7
IFPA_TXD1
1
D STRAP4 D
AM9 IFPA_TXD1_N NC_5 D5 R04 modify SA000041S40
AK10 D6 R04 modify
2
IFPA_TXD2 NC_6 STRAP3 64MX16 H L H L H H L L
AL10 NC_7 D7
IFPA_TXD2_N R775 900 MHz Samsung 45K 35K 45K 25K 10K 15K 15K 20K
AK11 E5
IFPA_TXD3 NC_8 PGOOD
AL11 E7 2 R778 1 20K_0402_5% SA00004GS10
IFPA_TXD3_N NC_9 GV@ GV@
F4
NC_10 10K_0402_5% 128MX16 H L H L H H L L
G5
1
NC_11 800 MHz Samsung 45K 35K 45K 45K 10K 15K 15K 20K
AP13 H32
IFPB_TXC NC_12 SA00003MQ60
AN13 J25
IFPB_TXC_N NC_13
AN8 IFPB_TXD4 J26
NC_14 STRAP_REF2 128MX16 H L H L H H L L
AP8 P6 2 R779 1
IFPB_TXD4_N NC_15 800 MHz Hynix 45K 35K 45K 35K 10K 15K 15K 20K
AP10 IFPB_TXD5 U7
NC_16 40.2K_0402_1% +3VSDGPU SA00003VS10
AN10 IFPB_TXD5_N V6
NC_17
AR11 IFPB_TXD6 Y4 GV@
NC_18
AR10 AA4
2
IFPB_TXD6_N NC_19
AN11 IFPB_TXD7 AB4
NC_20
AP11 IFPB_TXD7_N NC_21
AB7 R776 For N12P-GV A1 strap table
AC5 10K_0402_5%
NC_22
NC
AD6 @
NC_23 Frenq. N12P-GS strap0 strap1 strap2 ROM_SI ROM_SO ROM_SCLK strap3 strap4
AM7 AF6
1
IFPC_L0 NC_24 STRAP3
AM6 AG6
IFPC_L0_N NC_25 R04 modify 64MX16 H L L L H H L L
AL5 AG20
2
IFPC_L1 NC_26 800 MHz Hynix 45K 35K 5K 15K 10K 5K 15K 20K
AM5 AJ5
IFPC_L1_N NC_27 R777 SA000032420
AM3 AK15
IFPC_L2 NC_28
AM4 AL7 15K_0402_5%
IFPC_L2_N NC_29 GV@ 64MX16 H L L L H H L L
AP1
IFPC_L3 900 MHz Hynix 45K 35K 5K 15K 10K 5K 15K 20K
AR2
1
IFPC_L3_N SA000041S40
64MX16 H L L L H H L L
AR8
IFPD_L0 900 MHz Samsung 45K 35K 5K 25K 10K 5K 15K 20K
AR7
IFPD_L0_N SA00004GS10
C AP7 C
IFPD_L1
AN7 IFPD_L1_N 128MX16 H L L L H H L L
AN5 IFPD_L2 800 MHz Samsung 45K 35K 5K 45K 10K 5K 15K 20K
AP5 IFPD_L2_N LVDS/TMDS
AR5 SA00003MQ60
IFPD_L3
AR4 IFPD_L3_N 128MX16 H L L L H H L L
800 MHz Hynix 45K 35K 5K 35K 10K 5K 15K 20K
SA00003VS10
AH6 IFPE_L0
AH5 IFPE_L0_N
AH4 IFPE_L1
AG4 IFPE_L1_N
AF4
AF5
IFPE_L2 Straps MULTI LEVEL STRAPS
IFPE_L2_N
AE6 IFPE_L3 +3VSDGPU +3VSDGPU
AE5 IFPE_L3_N
R484 1 DIS@ 2 0_0402_5%
+3VSDGPU
1
D35 R485
15K_0402_1%
34.8K_0402_1%
1
1
@ R480
10K_0402_1%
1
@ R482
15K_0402_1%
15K_0402_1%
45.3K_0402_1%
R128
1 DIS@ 2 0_0402_5%
DIS@ R481
R125
R475
AL2 VDD_SENSE_0
IFPF_L0 P7 R483 1 DIS@
AL3 VDD_SENSE_1 2 0_0402_5% GCORE_SEN 54
IFPF_L0_N AD20
AJ3 VDD_SENSE_2
IFPF_L1
AJ2
1
DIS@
@
IFPF_L1_N
@
1
2
AJ1
2
2
2
R89 IFPF_L2 FB_GND 54
R94 AH1 R4881 1DIS@
AD19 R487 DIS@ 2 0_0402_5%
0_0402_5% STRAP0 ROM_SI
4.7K_0402_5% IFPF_L2_N GND_SENSE_0 2
4.7K_0402_5% AH2 E35 STRAP1 ROM_SO
DIS@ IFPF_L3 GND_SENSE_1
DIS@ AH3 R7 R486 1 DIS@ 2 0_0402_5% STRAP2 ROM_SCLK
IFPF_L3_N GND_SENSE_2
2
2
20K_0402_1%
1
X76@ R453
15K_0402_1%
1
1
@ R126
10K_0402_1%
34.8K_0402_1%
DIS@ R461
1
24.9K_0402_1%
DIS@ R127
45.3K_0402_1%
R460
GS@ R459
33 VGA_HDMI_SCLK AP2 IFPC_AUX_I2CW_SCL
33 VGA_HDMI_SDATA AN3 IFPC_AUX_I2CW_SDA_N TEST
B DIS@ B
R403 1 2 10K_0402_5%
2
@
2
JTAG_TCK
2
AP4
2
IFPD_AUX_I2CX_SCL AP35 @
2
TESTMODE
2
AN4 AP14 JTAG_TDI PAD T27
IFPD_AUX_I2CX_SDA_N JTAG_TCK JTAG_TDO PAD T1 @
AN14 @
JTAG_TDI JTAG_TMS PAD T24
AN16 @
JTAG_TDO JTAG_TRST PAD T26
AE4 IFPE_AUX_I2CY_SCL AR14 @
JTAG_TMS PAD T25
AD4 IFPE_AUX_I2CY_SDA_N AP16
JTAG_TRST_N
R417 2 DIS@ 110K_0402_5%
AF3
AF2
IFPF_AUX_I2CZ_SCL
SERIAL
R04 modify For N12P-GS strap table GV@ R459
45.3K_0402_1%
IFPF_AUX_I2CZ_SDA_N ROM_CS#
R129 1 DIS@ 2 10K_0402_5% +3VSDGPU (strap 3 and strap4 left NC)
ROM_CS_N C3 ROM_SI
ROM_SI D3 ROM_SO
C4 ROM_SCLK Frenq. N12P-GS strap0 strap1 strap2 ROM_SI ROM_SO ROM_SCLK
ROM_SO
ROM_SCLK D4
64MX16 H L L L L H Strap 2 for GV1,
800 MHz Hynix 45K 35K 25K 5K 10K 15K
+3VSDGPU GENERAL if unuse this pin , pull down 36k SA000032420
Pull low 45K Ohm
R130 2 DIS@ 1 36K_0402_1%
NC/SPDIF_NC A5
A4 64MX16 H L L L L H
BUFRST_N R457 2 DIS@ 1 40.2K_0402_1%
1 @ 2 N9 900 MHz Hynix 45K 35K 25K 15K 10K 15K
MULTI_STRAP_REF0_GND
R463 10K_0402_5% AB5 R456 2 DIS@ SA000041S40
STRAP0 CEC 1 40.2K_0402_1%
M9
STRAP1 W5 MULTI_STRAP_REF1_GND 64MX16 H L L L L H
STRAP2 STRAP0
W7 B5 900 MHz Samsung 45K 35K 25K 20K 10K 15K
STRAP1 THERMDP
V7 B4 SA00004GS10
STRAP2 THERMDN
128MX16 H L L L L H
800 MHz Samsung 45K 35K 25K 45K 10K 15K
SA00003MQ60
N12P-GV1-A1_BGA973
A A
128MX16 H L L L L H
DIS@ 800 MHz Hynix 45K 35K 25K 35K 10K 15K
SA00003VS10

N12P LVDS 3/9
Custom
5 4 3 2 1
5 4 3 2 1
D D
U27E
+1.5VSDGPU
7200mA Part 5 of 7 +1.05VSDGPU
J23 AG11
2500mA
FBVDDQ_0 PEX_IOVDDQ_0
10U_0603_6.3V6M
1U_0402_6.3V6K
0.1U_0402_16V4Z
22U_0805_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AG12
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
J24
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C70
C91
C58
DIS@ C103
C90
DIS@ C183
C85
DIS@ C108
C69
1
C67
AG13 1
C80
DIS@ C126
1
DIS@ C109
1 1 1 1 J29 PEX_IOVDDQ_2 1 1 1 1 1 1
FBVDDQ_2
AA27 PEX_IOVDDQ_3 AG15
FBVDDQ_3
AA29 AG16
DIS@
DIS@
DIS@
DIS@
DIS@
AG17
DIS@
AA31
DIS@
DIS@
2 2 2 FBVDDQ_5 PEX_IOVDDQ_5 2 2 2 2 2 2
2 2 2 AB27 AG18 2
AB29 FBVDDQ_7 PEX_IOVDDQ_7
AG22 Under GPU
C AC27 AG23 C
AD27 AG24 +1.05VSDGPU
under GPU AE27
AG25
AJ28 AG26
PEX_IOVDDQ_11
22U_0805_6.3V6M
FBVDDQ_11
1U_0402_6.3V6K
10U_0603_6.3V6M
1U_0402_6.3V6K
AJ14
0.1U_0402_16V4Z
0.1U_0402_16V4Z
B18
4.7U_0603_6.3V6K
PEX_IOVDDQ_12
DIS@ C62
0.1U_0402_16V4Z
FBVDDQ_12
0.1U_0402_16V4Z
C79
C84
0.1U_0402_16V4Z
C63
1
C98
1U_0402_6.3V6K
AJ15
C73
E21 1 1
0.1U_0402_16V4Z
1
DIS@ C116
4.7U_0603_6.3V6K
PEX_IOVDDQ_13 1 1
DIS@ C104
C76
FBVDDQ_13 1
C64
1 1
C65
1 AJ19
C87
G17
C61
1 1 1 FBVDDQ_14 PEX_IOVDDQ_14
G18 PEX_IOVDDQ_15 AJ21
FBVDDQ_15
DIS@
DIS@
DIS@
DIS@
AJ22
DIS@
G22 PEX_IOVDDQ_16 2 2 2
DIS@
FBVDDQ_16 2
DIS@
2 2 Under GPU
DIS@
AJ24 2
DIS@
G8
DIS@
2 2 2 FBVDDQ_17 PEX_IOVDDQ_17
2 2 2 G9 AJ25
H29 AJ27
POWER
J14 AK18 +1.05VSDGPU
under GPU J15
AK20
2 1
J16 AK23
PEX_IOVDDQ_22
4.7U_0603_6.3V6K
FBVDDQ_22 L6
0.1U_0402_16V4Z
J17 AK26
1U_0402_6.3V6K
DIS@ C179
FBVDDQ_23 PEX_IOVDDQ_23 MBC1608121YZF_0603
DIS@ C120
J20 AL16 1 1
DIS@ C115
+IFPAB_PLLVDD FBVDDQ_24 PEX_IOVDDQ_24 1
J21 DIS@
FBVDDQ_25
J22
FBVDDQ_26
N27
FBVDDQ_27 2500 mA 2 2
P27 AK16 2
1
FBVDDQ_28 PEX_IOVDD_0
R27 AK17
R103 FBVDDQ_29 PEX_IOVDD_1
T27 AK21 NV recommand 0720
10K_0402_5% FBVDDQ_30 PEX_IOVDD_2
U27 AK24 Under GPU
OPT@ U29
AK27
R04 modify +3VSDGPU
V27
2
FBVDDQ_33
V29 FBVDDQ_34
V34 +PEX_PLLVDD 120mA 2 DIS@ 1
1U_0402_6.3V6K
4.7U_0603_6.3V6K
FBVDDQ_35
0.1U_0402_16V4Z
W27 AG14 R82
C99
DIS@ C148
DIS@ C147
FBVDDQ_36 PEX_PLLVDD 1 1 1
Y27 0_0603_5% +1.05VSDGPU
FBVDDQ_37
+IFPAB_IOVDD +IFPAB_PLLVDD +PEX_SVDD_3V3 120mA 2 @
DIS@
1
B AK9 AG19 2 2 2 R98 B
IFPAB_PLLVDD PEX_SVDD_3V3
1K_0402_5% 2 DIS@ 1 R71 AJ11 F7 0_0603_5%
IFPAB_RSET PEX_SVDD_3V3_NC
1
+IFPAB_IOVDD
R114 AG9
IFPA_IOVDD +VDD33 120mA
10K_0402_5% AG10 J10 Under GPU
IFPB_IOVDD VDD33_0
OPT@ J11 +3VSDGPU
VDD33_1
+IFPC_PLLVDD J12
VDD33_2 2 DIS@ 1
2
AJ9 J13
1U_0402_6.3V6K
1K_0402_5% 2 DIS@ 1 R76
0.1U_0402_16V4Z
IFPC_PLLVDD
0.1U_0402_16V4Z
VDD33_3
0.1U_0402_16V4Z
AK7 J9 R63
DIS@ C141
4.7U_0603_6.3V6K
DIS@ C122
DIS@ C118
IFPC_RSET VDD33_4 1 1 1
DIS@ C134
+IFPC_IOVDD
DIS@ C137
1 1 0_0603_5%
AJ8
IFPC_IOVDD
+IFPC_PLLVDD P9 R04 modify 2 2 2
AC6 MIOA_VDDQ_NC_0 2 2
IFPD_PLLVDD MIOA_VDDQ_NC_1 R9
1K_0402_5% 2 DIS@ 1 R464 AB6 MIOA_VDDQ_NC_2 T9
+IFPC_IOVDD IFPD_RSET
1
MIOA_VDDQ_NC_3 U9
+IFPC_PLLVDD AK8
IFPD_IOVDD R800 Under GPU
10K_0402_5%
10K_0402_5%2 DIS@ AA9 DIS@
1 R468 AJ6 MIOB_VDDQ_NC_0
1K_0402_5% 2 DIS@ 1 R469 IFPEF_PLLVDD MIOB_VDDQ_NC_1 AB9
2
AL1 W9
IFPEF_RSET MIOB_VDDQ_NC_2
Y9
MIOB_VDDQ_NC_3
1
1
10K_0402_5%1 DIS@ AE7

2 R68 IFPE_IOVDD
R131 AD7 R801
IFPF_IOVDD
10K_0402_5% 10K_0402_5%
OPT@ DIS@
2
2
N12P-GV1-A1_BGA973
DIS@
A A
+IFPC_IOVDD

1
R77 Issued Date 2010/10/15 Deciphered Date 2011/10/15 Title

10K_0402_5%
OPT@ THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N12P POWER & GND 4/9
2
5 4 3 2 1
5 4 3 2 1
D U27F D
B3 Part 6 of 7
GND_0
B6 V18
GND_1 GND_97
B9 V20
GND_2 GND_98
B12 V22
GND_3 GND_99
B15 V24
GND_4 GND_100 +VGA_CORE
B21 GND_5 V31
GND_101 +VGA_CORE
B24
B27
GND_6 GND_102
Y11 Under GPU
GND_7 Y13 U27G
GND_103
B30 GND_8 GND_104 Y15 41020mA
B33 Y17 AB11 VDD_0 P21
GND_9 GND_105
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
VDD_56
0.01U_0402_16V7K
0.01U_0402_16V7K
C2
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
GND_10 GND_106 Y19 AB13 VDD_1 Part 7 of 7 P23
DIS@ C121
C72
DIS@ C107
VDD_57
C94
C83
C88
DIS@ C114
DIS@ C110
C34 Y21 1 1 1 1 1 1 1 AB15 VDD_2 P25
GND_11 GND_107 1 VDD_58
E6 Y23 AB17 VDD_3 R11
GND_12 GND_108 VDD_59
E9 Y25 AB19 VDD_4 R12
GND_13 GND_109
DIS@
E12 VDD_60
DIS@
DIS@
DIS@
GND_14 GND_110 AA2 2 2 2 AB21 VDD_5 R13
E15 AA5 2 2 2 2 2 VDD_61
GND_15 GND_111 AB23 VDD_6 R14
E18 AA11 AB25 VDD_7 VDD_62
GND_16 GND_112 R15
E24 AA12 AC11 VDD_8 VDD_63
GND_17 GND_113 R16
GND_18 GND_114 R17
GND_19 GND_115 R18
F2 AA15 AC14 VDD_11 VDD_66
GND_20 GND_116 R19
0.047U_0402_16V7K
0.022U_0402_16V7K
0.022U_0402_16V7K
0.1U_0402_16V4Z
F31 VDD_67
0.022U_0402_16V7K
0.047U_0402_16V7K
0.047U_0402_16V7K
AA16
0.1U_0402_16V4Z
GND_21 GND_117 AC15 VDD_12 R20
C96
DIS@C112
C78
DIS@ C95
F34 VDD_68
C97
C74
1
C77
1 1
DIS@ C130
GND_22 AA17 1 1 1 1 1 AC16 VDD_13
F5 GND_118 VDD_69 R21
GND_23 AA18 AC17 VDD_14 R22
J2 GND_119 VDD_70
GND_120
DIS@
DIS@
J5 VDD_71
DIS@
DIS@
DIS@
GND_25 AA20 2 2 2 2 AC19 VDD_16 R24
J31 GND_121 2 2 2 2 VDD_72
J34 GND_122 VDD_73
GND_27 AA22 AC21 VDD_18 T12
K9 GND_123
GND_28 AA23 AC22 VDD_19 VDD_74
L9 GND_124 T14
C GND_29 AA24 AC23 VDD_20 VDD_75 C
M2 GND_125 T16
AA25 VDD_76
POWER
GND_30 GND_126 AC24 VDD_21 T18
M5 AA34 VDD_77
GND_31 GND_127 AC25 VDD_22 T20
M11 AB12 VDD_78
GND_32 GND_128 AD12 VDD_23 T22
M13 AB14 VDD_79
GND_33 GND_129 AD14 VDD_24
0.22U_0603_16V7K
0.22U_0603_16V7K
M15 T24
0.22U_0603_16V7K
AB16 VDD_80
1U_0603_10V6K
GND_34 GND_130 AD16 VDD_25 V11
DIS@ C131
DIS@ C133
M17 1 1 VDD_81
DIS@ C123
GND_35 AB18
DIS@ C139
GND_131 1 1 AD18 VDD_26 V13
M19 GND_36 AB20 VDD_82
GND_132 AD22 VDD_27 V15
M21 GND_37 AB22 VDD_83
GND_133 AD24 VDD_28 V17
M23 GND_38 AB24 2 VDD_84
GND_134 2 L11 VDD_29 V19
M25 AC9 2 2 VDD_85
GND_39 GND_135 L12 VDD_30 V21
M31 GND_40 AD2 VDD_86
M34 GND_136 L13 VDD_31 V23
GND_41 AD5 VDD_87
GND_137 L14 VDD_32 V25
GND
N11 GND_42 AD11 VDD_88

N12 GND_138
AD13
Put Under GPU L15 VDD_33
VDD_89
W11
GND_43 GND_139 L16 VDD_34 W12
N14 GND_140 L17 VDD_35 W13
GND_45 AD17 VDD_91
N15 GND_141 L18 VDD_36 W14
GND_46 AD21 VDD_92
N16 GND_142 L19 VDD_37 W15
GND_47 AD23 +VGA_CORE VDD_93
N17 GND_143 L20 VDD_38 W16
GND_48 AD25 VDD_94
N18 GND_144
AD31
R03 modify L21 VDD_39
VDD_95 W17
GND_49 GND_145 L22 VDD_40 W18
N20 GND_146 L23 VDD_41 W19
AE11 VDD_97
10U_0603_6.3V6M
GND_51
10U_0603_6.3V6M
4.7U_0603_6.3V6K
N21 GND_147 1 1 L24 VDD_42 W20
AE12 VDD_98
DIS@ C594
GND_52
DIS@ C592
DIS@ C595
22U_0805_6.3V6M
N22 GND_148 1 1 1 L25 VDD_43 W21
47U_0805_4V6
DIS@ C593
GND_53 AE13 DIS@ C1 + + VDD_99
DIS@ C591
N23 GND_149 DIS@ C604 1 1 M12 VDD_44 W22
GND_54 AE14 470U_V_2.5VM 470U_V_2.5VM M14 VDD_45 VDD_100
N24 GND_150 W23
GND_55 AE15 VDD_101
N25 GND_151 M16 VDD_46 W24
GND_56 AE16 2 2 2 2 2 VDD_102
P12 GND_152 2 M18 VDD_47 W25
GND_57 AE17 2 VDD_103
P14 GND_153 M20 VDD_48 Y12
GND_58 AE18 VDD_104
P16 GND_154 M22 Y14
GND_59 AE19 VDD_49 VDD_105
P18 GND_155 M24 Y16
GND_60 AE20 VDD_50 VDD_106
B P20 GND_156 P11 VDD_51 Y18 B
GND_61 AE21 VDD_107
P22 GND_157 P13 VDD_52 Y20
GND_62 AE22 VDD_108
P24 GND_158 P15 VDD_53 Y22
GND_63 AE23 VDD_109
R2 GND_159 P17 VDD_54 Y24
GND_64 AE24 VDD_110
R5 GND_160 P19 VDD_55
GND_65 AE25
R31 GND_161
GND_66 AG2
R34 GND_162
GND_67 AG5
T11 GND_163
GND_68 GND_164 AG31
T13 AG34
GND_69 GND_165
T15 AK2
GND_70 GND_166 N12P-GV1-A1_BGA973
T17 AK5
GND_71 GND_167
T19 AK14
GND_72 GND_168 DIS@
T21 AK31
GND_73 GND_169
T23 GND_74 AK34
T25 GND_170
GND_75 GND_171 AL6
U11 GND_76 AL9
U12 GND_172
GND_77 GND_173 AL12
U13 GND_78 AL15
U14 GND_174
GND_79 GND_175 AL18
U15 GND_80 AL21
U16 GND_176
GND_81 GND_177 AL24
U17 GND_82 AL27
U18 GND_178
GND_83 GND_179 AL30
U19 GND_84 AN2
U20 GND_180
GND_85 AN34
U21 GND_181
GND_86 AP3
U22 GND_182
GND_87 AP6
U23 GND_183
GND_88 AP9
U24 GND_184
GND_89 AP12
U25 GND_185
GND_90 AP15
GND_186
V2 GND_91 AP18
GND_187
V5 AP21
A GND_92 GND_188 A
V9 GND_93 AP24
GND_189
V12 GND_94 AP27
GND_190
V14 AP30
GND_95 GND_191
V16 AP33
GND_96 GND_192
N12P-GV1-A1_BGA973 Security Classification Compal Secret Data Compal Electronics, Inc.

DIS@
N12P POWER & GND 5/9
5 4 3 2 1
5 4 3 2 1
VRAM DDR3 chips (1GB) Mode D

Address 0..31 32..63
CMD0 CS0_L#
D
64Mx16 DDR3 *8==>1GB CMD1 D
CMD2 ODT_L
CMD3 CKE
CMD4 A14 A14
DQSA[7..0] CMD5 RST RST
23,28 DQSA[7..0]
U23 X76@ U4 X76@
DQSA#[7..0]
23,28 DQSA#[7..0] +MEM_VREF1
CMD6 A9 A9
+MEM_VREF0 MDA18 E3 MDA3
DQMA[7..0] M8 E3 M8 VREFCA DQL0
VREFCA DQL0 MDA19 F7 MDA4 CMD7 A7 A7
23,28 DQMA[7..0] H1 F7 H1 VREFDQ DQL1
VREFDQ DQL1 MDA23 F2 MDA2
MDA[63..0] CMDA9 DQL2 F2 MDA17 CMDA9 DQL2 MDA7
23,28 MDA[63..0] CMDA11 N3 F8 N3 A0 DQL3 F8 CMD8 A2 A2
A0 DQL3 MDA21 Group2 CMDA11 MDA0 Group0
CMDA[30..0] P7 H3 P7 A1 DQL4 H3
CMDA8 A1 DQL4 MDA16 CMDA8 MDA5 CMD9 A0 A0
23,28 CMDA[30..0] P3 H8 P3 A2 H8
CMDA25 A2 DQL5 MDA20 CMDA25 DQL5 MDA1
N2 G2 N2 A3 G2
CMDA10 A3 DQL6 MDA22 CMDA10 DQL6 MDA6 CMD10 A4 A4
P8 H7 P8 A4 H7
CMDA24 A4 DQL7 CMDA24 DQL7
P2 P2 A5
CMDA22 A5 CMDA22 CMD11 A1 A1
CMDA7 R8 R8 A6
+1.5VSDGPU A6 MDA12 CMDA7 MDA29
R2 D7 R2 A7 D7
CMDA21 A7 DQU0 MDA11 CMDA21 DQU0 MDA26 CMD12 BA0 BA0
T8 C3 T8 A8 C3
CMDA6 A8 DQU1 MDA14 CMDA6 DQU1 MDA31
CMDA29 R3 C8 R3 A9 C8
A9 DQU2 MDA8 CMDA29 DQU2 MDA28 CMD13 WE* WE*
CMDA23 L7 C2 L7 A10/AP C2
DIS@ A10/AP DQU3 MDA13 Group1 CMDA23 DQU3 MDA27 Group3
CMDA28 R7 A7 CMDA28 R7 A11 A7
R391 A11 DQU4 MDA10 DQU4 MDA25 CMD14 A15 A15
CMDA20 N7 A2 MDA15 CMDA20 N7 A12 A2 MDA30
240_0402_1% A12 DQU5 DQU5
CMDA4 T3 B8 MDA9 CMDA4 T3 A13 B8 MDA24
A13 DQU6 DQU6 CMD15 CAS* CAS*
CMDA14 T7 A3 CMDA14 T7 A14 A3
A14 DQU7 DQU7
+MEM_VREF0 M7 +1.5VSDGPU M7 A15/BA3 +1.5VSDGPU
A15/BA3 CMD16 CS0_H#
C CMDA12 C
CMDA12 CMD17
DIS@
0.1U_0402_16V4Z
1 CMDA27 M2 B2 CMDA27 M2 BA0 B2

BA0 VDD VDD
DIS@ CMDA26 N8 D9 CMDA26 N8 BA1 D9
BA1 VDD VDD CMD18 ODT_H
R392 M3 G7 M3 BA2 G7
BA2 VDD VDD
240_0402_1% 2 K2 K2
VDD CMD19 CKE_H
C495
VDD K8
K8 VDD
CLKA0 VDD CLKA0 N1
N1 VDD CMD20 A13 A13
CLKA0# J7 VDD CLKA0# J7 N9
CK N9 CK VDD
CMDA3 K7 VDD CMDA3 K7 R1
CK R1 CK VDD CMD21 A8 A8
K9 VDD +1.5VSDGPU K9 CKE/CKE0 R9 +1.5VSDGPU
CKE/CKE0 VDD R9 VDD
CMDA2 CMDA2
CMD22 A6 A6
+1.5VSDGPU
CMDA0 K1 VDDQ A1 CMDA0 K1 ODT/ODT0 VDDQ A1 CMD23 A11 A11
ODT/ODT0 L2 CS/CS0
CMDA30 L2 CS/CS0 VDDQ A8 CMDA30 VDDQ A8
J3 RAS
CMDA15 J3 RAS VDDQ C1 CMDA15
K3 CAS VDDQ C1 CMD24 A5 A5
DIS@ CMDA13 K3 CAS VDDQ C9 CMDA13
L3 WE VDDQ C9
R23 L3 WE 310mA VDDQ
D2 VDDQ D2 CMD25 A3 A3
240_0402_1% VDDQ E9 310mA VDDQ E9
DQSA2
VDDQ
F1 DQSA0 VDDQ F1 CMD26 BA2 BA2
DQSA1 DQSA3 F3
F3 DQSL VDDQ
H2 DQSL VDDQ H2
C7
+MEM_VREF1 C7 DQSU VDDQ
H9 DQSU VDDQ H9 CMD27 BA1 BA1
DQMA2 DQMA0
CMD28 A12 A12
DIS@
0.1U_0402_16V4Z
1
DIS@
DQMA1 E7 VSS
A9 DQMA3 E7
DML VSS A9
DML
R25 D3 VSS
B3 D3
DMU VSS B3 CMD29 A10 A10
DMU
240_0402_1% E1 VSS E1
DQSA#2 VSS DQSA#0
2 VSS G8 CMD30 RAS* RAS*
C25
G8
DQSA#1 VSS DQSA#3 G3
G3 DQSL J2 B7 DQSL VSS J2
VSS
B7 DQSU J8 DQSU VSS J8 Not Available
VSS
M1 VSS M1
VSS
CMDA5 M9 CMDA5 VSS M9 LOW HIGH
VSS
B P1 T2 VSS P1 B
VSS
ZQ0
T2 RESET P9 ZQ1
RESET VSS P9
VSS
T1 L8 VSS T1
VSS
CLKA0
L8 ZQ/ZQ0 T9 ZQ/ZQ0 VSS T9
1
1
VSS
23 CLKA0 1 2 CMDA2
R12 DIS@ DIS@ CMDA3 R397 1 DIS@ 2 10K_0402_5% Command Bit Default Pull-down
J1 B1
1
@ R395 J1 B1 R390 NC/ODT1 VSSQ CMDA5 R398 1 DIS@ 2 10K_0402_5%

NC/ODT1 VSSQ L1 B9 DIS@
DIS@ 80.6_0402_1% 243_0402_1% L1 B9 243_0402_1% NC/CS1 VSSQ CMDA18 ODTx 10k
NC/CS1 VSSQ J9 VSSQ D1 R401R399 10K_0402_5%
R15 J9 D1 NC/CE1 CMDA19 1 1 2 2 10K_0402_5%
NC/CE1 VSSQ
2
D8
2
L9 VSSQ DDR3 CKEx 10k

160_0402_1% L9 D8 NCZQ1 R400 1 DIS@DIS@2 10K_0402_5%
NCZQ1 VSSQ E2
E2 VSSQ RST 10k
CLKA0# VSSQ E8
2
23 CLKA0# E8 VSSQ
VSSQ F9 CS* No Termination
1 2 F9 VSSQ
VSSQ VSSQ
G1
R11 1 G1 G9
@ VSSQ VSSQ
@ G9
C4 VSSQ
80.6_0402_1% 96-BALL
0.01U_0402_16V7K 96-BALL SDRAM DDR3
2 SDRAM DDR3 K4B1G1646E-HC12_FBGA96
NV recommand 0720 K4B1G1646E-HC12_FBGA96
+1.5VSDGPU +1.5VSDGPU
Samsung : SA000035700 (S IC D3 64MX16 K4W1G1646E-HC12 FBGA 96P)
Hynix : SA000032400 (S IC D3 64MX16 H5TQ1G63BFR-12C FBGA 1.5V )
1U_0603_10V6K
1U_0603_10V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0603_10V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
0.1U_0402_16V4Z
1U_0603_10V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0603_10V6K
DIS@ C493
0.1U_0402_16V4Z
DIS@ C508
DIS@ C502
C31
DIS@ C488
AMD :SA00003PF10
DIS@ C506
C18
DIS@ C512
DIS@ C511
1 1 1 1
0.1U_0402_16V4Z
1 1 1 1 1
C33
C27
C35
C19
C22
DIS@ C487
DIS@ C486
C34
C21
1 1 1 1 1 1 1 1 1
DIS@ C497
1 (S IC D3 64M16/800 23EY2387MB-12 PG-TFBGA 96P 1.5V)

DIS@
DIS@
2 2
DIS@
2
DIS@
DIS@
DIS@
2
DIS@
2 2
DIS@
DIS@
2 2
2 2 2 2 2 2 2 2 2
2
A A

N12P DDR3 6/9
Custom
5 4 3 2 1
VRAM DDR3 chips (1GB) Mode D

Address 0..31 32..63
64Mx16 DDR3 *8==>1GB CMD0 CS0_L#
CMD1
D D
CMD2 ODT_L
U3 X76@ U24 X76@
CMD3 CKE
+MEM_VREF2 MDA39 +MEM_VREF3 M8 E3 MDA58
M8 DQL0 E3 VREFCA DQL0
VREFCA MDA35 F7 MDA59 CMD4 A14 A14
H1 F7 H1 DQL1
DQMA[7..0] VREFDQ DQL1 MDA37 VREFDQ MDA56
23,27 DQMA[7..0] F2 F2
CMDA9 DQL2 MDA33 CMDA9 DQL2 MDA63
CMDA[30..0] CMDA11 N3 DQL3
F8 N3 A0 DQL3
F8 CMD5 RST RST
A0 MDA38 Group4 CMDA11 P7 H3 MDA57 Group7
23,27 CMDA[30..0] P7 H3 A1 DQL4
CMDA8 A1 DQL4 MDA32 CMDA8 P3 H8 MDA61 CMD6 A9 A9
DQSA#[7..0] P3 A2 H8 A2 DQL5
CMDA25 DQL5 MDA36 CMDA25 N2 G2 MDA60
23,27 DQSA#[7..0] CMDA10 N2 A3 G2 A3 DQL6
DQL6 MDA34 CMDA10 P8 H7 MDA62 CMD7 A7 A7
DQSA[7..0] CMDA24 P8 A4 H7 CMDA24 A4 DQL7
DQL7 P2
23,27 DQSA[7..0] CMDA22 P2 A5 CMDA22 A5
MDA[63..0] R8 R8
A6
CMD8 A2 A2
CMDA7 A6 MDA42 CMDA7 R2 MDA49
23,27 MDA[63..0] R2 D7 A7 DQU0 D7
CMDA21 A7 DQU0 MDA45 CMDA21 MDA53 CMD9 A0 A0
T8 C3 T8 A8 C3
CMDA6 A8 DQU1 MDA40 CMDA6 DQU1 MDA51
R3 C8 R3 A9 C8
CMDA29 A9 DQU2 MDA44 CMDA29 DQU2 MDA55 CMD10 A4 A4
L7 C2 L7 A10/AP C2
CMDA23 A10/AP DQU3 MDA41 Group5 CMDA23 DQU3 MDA48 Group6
R7 A7 R7 A11 A7
CMDA28 A11 DQU4 MDA47 CMDA28 DQU4 MDA54 CMD11 A1 A1
CMDA20 N7 A2 N7 A2
+1.5VSDGPU A12 DQU5 MDA43 CMDA20 A12 DQU5 MDA50
CMDA4 T3 B8 CMDA4 T3 DQU6 B8
A13 DQU6 MDA46 A13 MDA52 CMD12 BA0 BA0
CMDA14 T7 A3 CMDA14 T7 DQU7 A3
A14 DQU7 A14
M7 +1.5VSDGPU M7 +1.5VSDGPU
A15/BA3 A15/BA3 CMD13 WE* WE*
DIS@
R21 CMDA12 CMDA12
240_0402_1% CMDA27 M2 B2 M2 BA0
VDD
B2 CMD14 A15 A15
BA0 VDD CMDA27
CMDA26 N8 D9 N8 BA1 D9
BA1 VDD CMDA26 VDD CMD15 CAS* CAS*
M3 G7 M3 BA2 G7
BA2 VDD VDD
+MEM_VREF2 K2 K2
VDD VDD CMD16 CS0_H#
K8 K8
VDD VDD
CLKA1 N1 CLKA1 N1
VDD J7 VDD CMD17
J7 N9
DIS@
0.1U_0402_16V4Z
DIS@ 1 CLKA1# CK N9 CLKA1# CK VDD

C K7 VDD K7 R1 C
R22 CMDA19 R1 CMDA19 CK VDD
240_0402_1% K9
CK VDD
R9 +1.5VSDGPU
K9 CKE/CKE0 R9 +1.5VSDGPU
CMD18 ODT_H
CKE/CKE0 VDD VDD
2 CMD19 CKE_H
C23
CMDA18 CMDA18
CMDA16 K1 A1 CMDA16 K1 ODT/ODT0 VDDQ A1
CMDA30 L2 ODT/ODT0 VDDQ
A8 CMDA30
L2 CS/CS0 A8 CMD20 A13 A13
CS/CS0 VDDQ VDDQ
CMDA15 J3 C1 J3 RAS C1
RAS VDDQ CMDA15 VDDQ CMD21 A8 A8
CMDA13 K3 C9 K3 CAS C9
CAS VDDQ CMDA13 VDDQ
L3 L3 WE D2
WE D2 VDDQ CMD22 A6 A6
+1.5VSDGPU
310mA VDDQ E9 310mA VDDQ E9
VDDQ F1
DQSA4 VDDQ F1 DQSA7 VDDQ CMD23 A11 A11
DQSA5 F3 H2 DQSA6 F3 H2
DQSL VDDQ DQSL VDDQ
C7 H9 C7 DQSU H9
DIS@ DQSU VDDQ VDDQ CMD24 A5 A5
R393
240_0402_1% DQMA4 DQMA7 CMD25 A3 A3
DQMA5 E7 DML VSS
A9 DQMA6 E7
DML VSS A9
D3 DMU VSS
B3 D3
DMU VSS B3 CMD26 BA2 BA2
VSS
E1 VSS E1
+MEM_VREF3 DQSA#4
VSS G8 DQSA#7 VSS G8 CMD27 BA1 BA1
G3
DQSA#5 G3 DQSL VSS
J2 DQSA#6
B7 DQSL VSS J2
B7 J8 DQSU VSS J8 CMD28 A12 A12
DIS@
0.1U_0402_16V4Z
1 DQSU VSS
DIS@
VSS M1 VSS M1
R396
VSS M9 VSS M9 CMD29 A10 A10
CMDA5
VSS P1
240_0402_1% CMDA5 P1
VSS T2
2 T2 RESET VSS P9 CMD30 RAS* RAS*
C503
RESET VSS P9
ZQ2 ZQ3
VSS T1
L8 VSS T1
L8
ZQ/ZQ0 VSS T9 ZQ/ZQ0 VSS T9 Not Available
1
1
DIS@
DIS@
J1 B1 R389 J1 NC/ODT1 B1 LOW HIGH
R24 NC/ODT1 VSSQ VSSQ
L1 B9 243_0402_1% L1 NC/CS1 B9
243_0402_1% NC/CS1 VSSQ VSSQ
CLKA1 D1 J9 VSSQ D1
1 2 J9 VSSQ NC/CE1
B 23 CLKA1 NC/CE1 L9 D8 B
2
R10 L9 D8 VSSQ
2
NCZQ1 VSSQ NCZQ1 E2
1
@ VSSQ E2 VSSQ
E8 VSSQ E8
DIS@ 80.6_0402_1% VSSQ
F9 VSSQ F9
R14 VSSQ
G1 VSSQ G1
160_0402_1% VSSQ
G9 VSSQ G9
VSSQ
2
CLKA1#
23 CLKA1# 96-BALL
96-BALL
1 2 SDRAM DDR3
SDRAM DDR3
R9 K4B1G1646E-HC12_FBGA96
K4B1G1646E-HC12_FBGA96
@ 1
80.6_0402_1% @
C3
0.01U_0402_16V7K
NV recommand 0720 2
+1.5VSDGPU +1.5VSDGPU
0.1U_0402_16V4Z
1U_0603_10V6K
C30
C26
0.1U_0402_16V4Z
1U_0603_10V6K
1U_0603_10V6K
0.1U_0402_16V4Z
C28
C17
C14
0.1U_0402_16V4Z
1U_0603_10V6K
0.1U_0402_16V4Z
C16
0.1U_0402_16V4Z
1U_0603_10V6K
1U_0603_10V6K
C15
C24
0.1U_0402_16V4Z
DIS@ C492
DIS@ C494
DIS@ C509
DIS@ C510
1U_0603_10V6K
C20
1U_0603_10V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C32
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 1 1 1 1 1 1 1 1 2
DIS@ C490
1 1 1
DIS@ C507
DIS@ C491
DIS@ C489
DIS@ C496
1 1 1 1 1 1
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
2 2 2 2 2 2 2 2 2 1
DIS@
DIS@
2 2 2
2 2 2 2 2 2
A A

N12P DDR3 7/9
Custom
5 4 3 2 1
Mode D
Address 0..31 32..63
VRAM DDR3 chips (1GB) CMD0 CS0_L#
CMD1
64Mx16 DDR3 *8==>1GB CMD2 ODT_L
D D
CMD3 CKE
CMD4 A14 A14
DQSC[7..0]
CMD5 RST RST
23,30 DQSC[7..0]
DQSC#[7..0]
CMD6 A9 A9
23,30 DQSC#[7..0] U28 X76@ U6 X76@
DQMC[7..0] +MEM_VREF5
CMD7 A7 A7
+MEM_VREF4 E3 MDC22 MDC3
23,30 DQMC[7..0] M8 DQL0 M8 E3
VREFCA MDC16 VREFCA DQL0 MDC7 CMD8 A2 A2
H1 F7 H1 F7
MDC[63..0] VREFDQ DQL1 MDC18 VREFDQ DQL1 MDC1
23,30 MDC[63..0] F2 F2
CMDC9 DQL2 MDC19 CMDC9 DQL2 MDC4
CMDC[30..0] N3 A0 DQL3
F8 N3 F8 CMD9 A0 A0
CMDC11 H3 MDC23 Group2 CMDC11 A0 DQL3 MDC2 Group0
23,30 CMDC[30..0] P7 A1 DQL4 P7 H3
CMDC8 P3 H8 MDC17 CMDC8 A1 DQL4 MDC6 CMD10 A4 A4
CMDC25 A2 DQL5 MDC20 P3 A2 H8
N2 G2 CMDC25 DQL5 MDC0
CMDC10 A3 DQL6 MDC21 N2 G2
P8 H7 CMDC10 A3 DQL6 MDC5 CMD11 A1 A1
CMDC24 A4 DQL7 P8 H7
P2 CMDC24 A4 DQL7
CMDC22 A5 CMDC22 P2
R8 A5 CMD12 BA0 BA0
CMDC7 A6 MDC13 CMDC7 R8
+1.5VSDGPU R2 A6 MDC28
CMDC21 A7 D7 R2 D7
DQU0 MDC10 CMDC21 A7 DQU0 MDC24 CMD13 WE* WE*
T8 A8 C3 T8 C3
CMDC6 DQU1 MDC14 CMDC6 A8 DQU1 MDC31
R3 A9 C8 R3 C8
CMDC29 DQU2 MDC9 CMDC29 A9 DQU2 MDC25 CMD14 A15 A15
L7 A10/AP C2 L7 C2
CMDC23 DQU3 MDC12 Group1 CMDC23 A10/AP DQU3 MDC29 Group3
GS@ R7 A7 R7 A7
CMDC28 A11 DQU4 MDC8 CMDC28 A11 MDC27
R435 CMDC20 N7 A12 A2 MDC15 N7
DQU4
A2 CMD15 CAS* CAS*
DQU5 CMDC20 A12 DQU5 MDC30
240_0402_1% CMDC4 T3 B8 MDC11 CMDC4 T3 B8
A13 DQU6 A13 DQU6 MDC26 CMD16 CS0_H#
CMDC14 T7 A3 T7 A3
A14 DQU7 CMDC14 A14 DQU7
+MEM_VREF4 M7 +1.5VSDGPU M7 +1.5VSDGPU
A15/BA3 A15/BA3 CMD17
CMDC12 CMDC12
GS@
CMD18 ODT_H
0.1U_0402_16V4Z
1 M2 B2 M2 BA0 B2
CMDC27 BA0 VDD CMDC27 VDD
C GS@ N8 D9 N8 BA1 D9 C
CMDC26 BA1 VDD CMDC26
R436 M3 G7 M3 BA2
VDD
G7
CMD19 CKE_H
BA2 VDD VDD
240_0402_1% 2 VDD K2 K2
C570
K8 VDD
K8
CMD20 A13 A13
VDD VDD
CLKC0 N1 CLKC0 N1
J7 VDD VDD CMD21 A8 A8
CLKC0# CK VDD N9 CLKC0# J7 N9
K7 CK VDD
CMDC3 CK VDD R1 CMDC3 K7 R1
K9 CKE/CKE0 R9 +1.5VSDGPU K9
CK VDD
R9 +1.5VSDGPU
CMD22 A6 A6
VDD CKE/CKE0 VDD
CMDC2 CMDC2
CMD23 A11 A11
K1 A1
CMDC0
L2 ODT/ODT0 VDDQ
A8
CMDC0 K1 ODT/ODT0 VDDQ A1 CMD24 A5 A5
L2
CMDC30
J3
CS/CS0 VDDQ
C1
CMDC30 CS/CS0 VDDQ A8
J3
CMDC15
K3
RAS VDDQ
C9
CMDC15 RAS VDDQ C1 CMD25 A3 A3
K3
+1.5VSDGPU CMDC13
L3
CAS VDDQ
D2
CMDC13
L3
CAS VDDQ C9
WE VDDQ
310mAVDDQ E9 WE VDDQ D2 CMD26 BA2 BA2
DQSC2 F1 DQSC0 310mA VDDQ E9
DQSC1 F3
VDDQ
H2 DQSC3 VDDQ F1 CMD27 BA1 BA1
F3
C7
DQSL VDDQ
H9 DQSL VDDQ H2
C7
GS@ DQSU VDDQ DQSU VDDQ H9 CMD28 A12 A12
R86
240_0402_1% DQMC2 DQMC0
DQMC1 E7 A9 DQMC3 E7 A9
CMD29 A10 A10
DML VSS DML VSS
+MEM_VREF5 D3 VSS B3 D3 B3
DMU DMU VSS CMD30 RAS* RAS*
VSS E1 E1
DQSC#2 G8 DQSC#0 VSS
VSS VSS G8 Not Available
DQSC#1 G3 J2 DQSC#3
GS@
DQSL G3 J2
0.1U_0402_16V4Z
1 B7 VSS DQSL VSS

DQSU J8 B7 J8
GS@ VSS DQSU VSS LOW HIGH
M1 M1
R85 VSS VSS
M9 M9
240_0402_1% VSS VSS
2 CMDC5 P1 CMDC5
C165
T2 VSS P1
RESET P9 T2 VSS
VSS RESET P9
ZQ4 T1 ZQ5 VSS
B L8 VSS T1 B
ZQ/ZQ0 T9 L8 VSS
VSS ZQ/ZQ0 T9
VSS
1
1
J1 NC/ODT1 B1 J1 CMDC2 Command Bit Default Pull-down

GS@ VSSQ GS@ NC/ODT1 B1
L1 B9 VSSQ CMDC3
R437 NC/CS1 VSSQ R50 L1 NC/CS1 B9 R416 1 GS@
R415 1 GS@2 10K_0402_5%
2 10K_0402_5% ODTx 10k
J9 D1 VSSQ CMDC5
243_0402_1% NC/CE1 VSSQ 243_0402_1% J9 VSSQ D1 R414 1 2 10K_0402_5%
L9 D8 NC/CE1 CMDC18 CKEx 10k
NCZQ1 VSSQ L9 D8 GS@GS@ DDR3
E2 NCZQ1 VSSQ CMDC19
2
2
VSSQ E2 R413 1 2 10K_0402_5% RST 10k

E8 VSSQ
VSSQ E8 R412 1 GS@ 2 10K_0402_5%
F9 VSSQ CS* No Termination
VSSQ F9
CLKC0 G1 VSSQ
23 CLKC0 VSSQ G1
G9 VSSQ
VSSQ G9
1 2 VSSQ
R61 96-BALL
96-BALL
1
@ SDRAM DDR3
SDRAM DDR3
GS@ 80.6_0402_1% K4B1G1646E-HC12_FBGA96
R69
160_0402_1%
CLKC0#
23 CLKC0# 1 2 +1.5VSDGPU
2
R60
@ +1.5VSDGPU
1
80.6_0402_1% @
C145
1U_0603_10V6K
0.01U_0402_16V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0603_10V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
GS@ C127
GS@ C572
GS@ C569
1U_0603_10V6K
GS@ C167
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
0.1U_0402_16V4Z
1U_0603_10V6K
0.1U_0402_16V4Z
1U_0603_10V6K
1
0.1U_0402_16V4Z
1 1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
GS@ C166
GS@ C567
GS@ C566
GS@ C573
NV recommand 0720 1 1 1 1
GS@ C168
GS@ C565
GS@ C571
GS@ C169
GS@ C564
GS@ C170
GS@ C563
GS@ C163
GS@ C161
GS@ C164
GS@ C568
1 1 1 1 1 1 1 1 1 1 1
2 2 2 2
2 2 2 2
2 2 2 2 2 2 2 2 2 2 2
A A

N12P DDR3 8/9
Custom
5 4 3 2 1
VRAM DDR3 chips (1GB)

64Mx16 DDR3 *8==>1GB
D D
DQMC[7..0]
23,29 DQMC[7..0]
CMDC[30..0] Mode D
23,29 CMDC[30..0]
DQSC#[7..0]
Address 0..31 32..63
23,29 DQSC#[7..0] U5 X76@ U26 X76@
DQSC[7..0] +MEM_VREF6 +MEM_VREF7
CMD0 CS0_L#
M8 E3 MDC39 MDC56
23,29 DQSC[7..0] VREFCA DQL0 M8 E3
F7 MDC33 VREFCA DQL0 MDC63 CMD1
MDC[63..0] H1 DQL1 H1 F7
VREFDQ MDC38 VREFDQ DQL1 MDC57
23,29 MDC[63..0] F2 F2
CMDC9 DQL2 MDC32 CMDC9 DQL2 MDC60
CMDC11
N3 A0 DQL3
F8 N3 F8 CMD2 ODT_L
H3 MDC36 Group4 CMDC11 A0 DQL3 MDC59 Group7
P7 A1 DQL4 P7 H3
CMDC8 P3 H8 MDC34 CMDC8 A1 DQL4 MDC61 CMD3 CKE
CMDC25 A2 DQL5 CMDC25 P3 H8
N2 G2 MDC37 A2 DQL5 MDC58
CMDC10 A3 DQL6 MDC35 CMDC10 N2 G2 MDC62
P8 H7 A3 DQL6 CMD4 A14 A14
CMDC24 A4 DQL7 CMDC24 P8 H7
P2 A4 DQL7
CMDC22 A5 CMDC22 P2
R8 A5 CMD5 RST RST
CMDC7 A6 MDC42 CMDC7 R8
+1.5VSDGPU R2 A6 MDC48
CMDC21 A7 D7 R2 D7
DQU0 MDC43 CMDC21 A7 DQU0 MDC55 CMD6 A9 A9
T8 A8 C3 T8 C3
CMDC6 DQU1 MDC41 CMDC6 A8 DQU1 MDC49
R3 C8 R3 C8
GS@ CMDC29 A9 DQU2 MDC46 CMDC29 A9 DQU2 MDC52 CMD7 A7 A7
L7 C2 L7 C2
R32 CMDC23 A10/AP DQU3 MDC40 Group5 CMDC23 A10/AP DQU3 MDC51 Group6
R7 A7 R7 A7
240_0402_1% CMDC28 A11 DQU4 MDC45 CMDC28 A11 DQU4 MDC54 CMD8 A2 A2
CMDC20 N7 A12 A2 CMDC20 N7 A2
DQU5 MDC44 A12 DQU5 MDC50
CMDC4 T3 B8 CMDC4 T3 B8
A13 DQU6 MDC47 A13 DQU6 MDC53 CMD9 A0 A0
CMDC14 T7 A3 CMDC14 T7 A3
A14 DQU7 A14 DQU7
+MEM_VREF6 M7 +1.5VSDGPU M7 +1.5VSDGPU
A15/BA3 A15/BA3 CMD10 A4 A4
CMDC12 CMDC12
GS@
CMD11 A1 A1
0.1U_0402_16V4Z
GS@ 1 M2 B2 M2 BA0
CMDC27 BA0 VDD CMDC27 B2
R31 N8 D9 VDD
C CMDC26 BA1 VDD CMDC26 N8 BA1 D9 C
240_0402_1% M3 G7 M3 BA2
VDD
G7
CMD12 BA0 BA0
BA2 VDD VDD
2 VDD K2 K2
C44
K8 VDD
K8
CMD13 WE* WE*
VDD VDD
CLKC1 VDD N1 CLKC1 N1
CLKC1# J7
CK N9 CLKC1# J7 VDD
N9
CMD14 A15 A15
K7 VDD CK VDD
CMDC19 CK VDD R1 CMDC19 K7 R1
K9 CKE/CKE0 R9 +1.5VSDGPU K9
CK VDD
R9 +1.5VSDGPU
CMD15 CAS* CAS*
VDD CKE/CKE0 VDD
CMDC18 CMDC18
CMD16 CS0_H#
CMDC16 K1 VDDQ A1 CMDC16 K1 ODT/ODT0 A1
+1.5VSDGPU L2 ODT/ODT0 VDDQ CMD17
CMDC30 CS/CS0 VDDQ A8 CMDC30 L2 CS/CS0 A8
J3 C1 VDDQ
CMDC15 RAS VDDQ CMDC15 J3 RAS C1
CMDC13 K3 CAS C9 CMDC13 K3 CAS
VDDQ
C9
CMD18 ODT_H
GS@ L3 VDDQ VDDQ
WE D2 L3 WE D2
R407 VDDQ
310mAVDDQ E9 310mA VDDQ E9
CMD19 CKE_H
240_0402_1% F1 VDDQ
DQSC4 VDDQ DQSC7 F1 CMD20 A13 A13
F3 H2 VDDQ
DQSC5 DQSL VDDQ DQSC6 F3 H2
C7 H9 DQSL VDDQ
DQSU VDDQ C7 H9 CMD21 A8 A8
+MEM_VREF7 DQSU VDDQ
DQMC4 DQMC7 CMD22 A6 A6
DQMC5 E7 VSS A9 DQMC6 E7 A9
DML DML VSS
GS@
B3
0.1U_0402_16V4Z
1 D3 VSS D3 B3
GS@ DMU DMU VSS CMD23 A11 A11
VSS E1 E1
R408 VSS
240_0402_1% DQSC#4 G8 DQSC#7 G8
DQSC#5 G3
VSS
J2 DQSC#6 VSS CMD24 A5 A5
2 DQSL VSS G3 DQSL J2
B7 VSS
C524
DQSU J8 B7
VSS
M1 DQSU VSS
J8 CMD25 A3 A3
VSS M1
M9 VSS
CMDC5 VSS
P1 CMDC5 VSS M9 CMD26 BA2 BA2
T2 VSS VSS P1
RESET P9 T2
ZQ6 VSS
T1 ZQ7 RESET VSS P9 CMD27 BA1 BA1
B L8 VSS VSS T1 B
ZQ/ZQ0 T9 L8
VSS ZQ/ZQ0 VSS T9 CMD28 A12 A12
1
J1 B1 GS@ CMD29 A10 A10
1
NC/ODT1 VSSQ R411 J1 NC/ODT1 B1

L1 B9 VSSQ
GS@ NC/CS1 VSSQ 243_0402_1% L1 B9 CMD30 RAS* RAS*
CLKC1 J9 D1 NC/CS1 VSSQ
R30 NC/CE1 VSSQ J9 D1
23 CLKC1 D8 NC/CE1 VSSQ
2
243_0402_1% L9 VSSQ D8
1 2 NCZQ1 E2 L9 VSSQ Not Available
VSSQ NCZQ1 E2
R33 E8 VSSQ
2
1
@ VSSQ E8 LOW HIGH

F9 VSSQ
GS@ 80.6_0402_1% VSSQ F9
G1 VSSQ
R35 VSSQ G1
G9 VSSQ
160_0402_1% VSSQ G9
CLKC1# VSSQ
23 CLKC1# 1 2 96-BALL
96-BALL
2
R37 SDRAM DDR3

@ SDRAM DDR3
80.6_0402_1% K4B1G1646E-HC12_FBGA96
1
@
+1.5VSDGPU
C57
NV recommand 0720 0.01U_0402_16V7K +1.5VSDGPU
2
1U_0603_10V6K
0.1U_0402_16V4Z
1U_0603_10V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0603_10V6K
0.1U_0402_16V4Z
1U_0603_10V6K
1U_0603_10V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C37
C39
GS@ C525
C43
GS@ C526
GS@ C517
1U_0603_10V6K
GS@ C519
0.1U_0402_16V4Z
1U_0603_10V6K
1U_0603_10V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
1 1
0.1U_0402_16V4Z
1 1 1 1
C40
GS@ C518
GS@ C532
C41
1 1 1 1
C48
GS@ C522
C45
GS@ C523
C38
C42
C36
GS@ C521
1 1 1 1 1 1 1 1
2 2 2 2 2
GS@
2
GS@
2
GS@
2 2 2 2
GS@
GS@
2 2 2
GS@
2 2 2 2
GS@
2
GS@
GS@
GS@
A A

N12P DDR3 9/9
Custom
5 4 3 2 1
D D
+LCDVDD
LCD POWER CIRCUIT
+3VALW +3VS
W=60mils
1
+INVPWR_B+ B+
R5 R6 1 Place closed to JLVDS1 L2
2
+LCDVDD
300_0603_5% 10K_0402_5% C479
+3VS
W=60mils FBMA-L11-201209-221LMA30T_0805
4.7U_0603_6.3V6K 2 1
2
L1
2 FBMA-L11-201209-221LMA30T_0805
R2 1 1 1 2 1
3
1
D 1K_0402_5% C484 C485 C11

Q2 2 2 1 2 AP2301GN-HF_SOT23-3 1 1
SSM3K7002F_SC59-3 G 0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z C9 C6 SM010014520 3000ma
Q28 2 2 2 680P_0402_50V7K 68P_0402_50V8J
S 1 220ohm@100mhz
3
+LCDVDD
C2 2 2 DCR 0.04
0.047U_0402_16V7K W=60mils
1
1
D
LCDVDD_ON Q1 2
16 PCH_ENVDD 1 UMA@ 2 2
R1 0_0402_5% G SSM3K7002F_SC59-3 1 1
S C10
3
C483 0.1U_0402_16V4Z
4.7U_0805_10V4Z
2 2 LCD/LED PANEL Conn.
1
R4
C C
100K_0402_5%
2
LED PANEL Conn. +INVPWR_B+

W=60mils
1
JLVDS1
1
2 41
2 G1
W=60mils 3
3 G2
42
4 43
4 G3
5 44
DISPOFF# 5 G4
6 45
INVTPWM 6 G5
7 7 46
TZCLK+ G6
16 TZCLK+ 8 8
TZCLK-
16 TZCLK- 9 9
DISPOFF# TZOUT2+
40 BKOFF# R13 1 2 0_0402_5% 16 TZOUT2+ 10 10
TZOUT2-
16 TZOUT2- 11 11
R18 1 2 10K_0402_5% 12
TZOUT1+ 12
16 TZOUT1+ 13 13
TZOUT1-
16 TZOUT1- 14 14
15 15
TZOUT0+
16 TZOUT0+ 16 16
C5 INVTPWM TZOUT0-
2 1 220P_0402_50V7K 16 TZOUT0- 17 17
DISPOFF#
18 18
TXCLK+
C8 2 1 220P_0402_50V7K 16 TXCLK+ 19
TXCLK- 19
16 TXCLK- 20 20
TXOUT2+
16 TXOUT2+ 21 21
TXOUT2-
16 TXOUT2- 22 22
23 23
TXOUT1+
16 TXOUT1+ 24 24
TXOUT1-
16 TXOUT1- 25 25
TXOUT0+ 26
26
16 TXOUT0+ TXOUT0- 27
27
B 16 TXOUT0- LCD_DATA 28 B
28
16 LCD_DATA LCD_CLK 29
29
16 LCD_CLK 30
R02 modify 30
+3VS 31
31
+LCDVDD 32
32
33
33
+5VS USB20_3D_N4 34
0_0402_5% 1 2 R802 34
+3VS 17 USB20_N4 USB20_3D_P4 35
35
U1 17 USB20_P4 0_0402_5% 1 R803 36
2 +3VS_CAMERA 36
1 R783 2 1 +3VS 0_0402_5% R806 USB20_CMOS_P10 37
OE# 1 2 37
100K_0402_5% 5 17 USB20_P10 0_0402_5% 1 2 R804 USB20_CMOS_N10 38
VCC 38
17 USB20_N10 0_0402_5% R805 39
Reserved for UMA Only and OPTIMA 1 2 39
16 DPST_PWM 2 40
IN 40
DPST_PWM_1 INVTPWM
IPEX_20143-040E-20F
OUT 4 1 UMA@ 2
3 R20 0_0402_5%
GND
CONN@
74AHC1G125GW_SOT353-5
D15
1 6
1
I/O1 I/O4
R16 +3VS
2 5
USB20_CMOS_P10 REF1 REF2 USB20_CMOS_N10
A
10K_0402_5% A
3 I/O2 4
I/O3
2
PJUSB208H_SOT23-6

LVDS Connector
Custom
5 4 3 2
Sheet 31 of 61
A B C D E
1 1
W=40mils
+5VS
2
3
2
+R_CRT_VCC +CRT_VCC
For DISO only D5
F1
W=40mils
1.1A_6V_SMD1812P110TF
L22,L24,L26 2 1 1 2
use 0 Ohm D17 D18 CH491DPT_SOT23-3 1
PJDLC05C_SOT23-3 PJDLC05C_SOT23-3 C215
0.1U_0402_16V4Z
CRB1.0 use 47ohm@100Mhz Bead
1
1
2
CRT Connector
L32 L33
BLM18BA470SN1D_2P BLM18BA470SN1D_2P
PCH_CRT_R 1 2 CRT_R_1 CRT_R_2 JCRT1
16 PCH_CRT_R 1 2
L29 L30 6
BLM18BA470SN1D_2P BLM18BA470SN1D_2P JCRT1.11 11
PCH_CRT_G CRT_G_1 CRT_G_2 PAD
16 PCH_CRT_G 1 2 1 2 @ T71 1
L27 L28 7
BLM18BA470SN1D_2P BLM18BA470SN1D_2P 12
PCH_CRT_B CRT_B_1 CRT_B_2 2
16 PCH_CRT_B 1 2 1 2
8
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
22P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
13
1
1
1 1 1 1 1 1 1 1 1 3
R524 R520 R510 9
C613
C596
C637
C636
C621
C597
C614
150_0402_1%
C601
C588
150_0402_1% 150_0402_1% 14 G 16
4 G 17
2 2 2 UMA@ 2 2 2 2
UMA@ 2 UMA@ 2 10
2
2
2 2
2
15
1 JCRT1.5 5
C589 @ T72
PAD C-H_13-12201513CP
100P_0402_50V8J CONN@
SM010012010 300ma 120ohm@100mhz DCR 0.4 2
CRT_HSYNC_2
+CRT_VCC 1 2 DSUB_12
L13 MBC1608121YZF_0603
CRT_VSYNC_2
C243 1 2 0.1U_0402_16V4Z R147 2 1 10K_0402_5% 1 2 1
L10 MBC1608121YZF_0603 1 1
DSUB_15
1
5
U10 C230 C220

10P_0402_50V8J 10P_0402_50V8J C623 2
OE#
P
CRT_HSYNC CRT_HSYNC_1 2 2 68P_0402_50V8J 1

2 A 4
Y
G
C586
74AHCT1G125GW_SOT353-5 68P_0402_50V8J
2
3
+CRT_VCC
C228 1 2 0.1U_0402_16V4Z 1
5
U9
OE#
P
CRT_VSYNC CRT_VSYNC_1
2 A 4
Y
G
74AHCT1G125GW_SOT353-5
3
+CRT_VCC
3 3
+3VS
1
1
R146 R142
4.7K_0402_5% 4.7K_0402_5%
2
2
PCH_CRT_DATA DSUB_12
16 PCH_CRT_DATA 1 6
PCH_CRT_HSYNC CRT_HSYNC
16 PCH_CRT_HSYNC R428 2 UMA@ 1 33_0402_5%
PCH_CRT_VSYNC CRT_VSYNC Q11A
5
16 PCH_CRT_VSYNC R426 2 UMA@ 1 33_0402_5% DMN66D0LDW-7_SOT363-6
PCH_CRT_CLK DSUB_15
16 PCH_CRT_CLK 4 3
Q11B
4 4

CRT Connector
Custom
A B C D E
5 4 3 2 1
@ R242 SM070001310 400ma 90ohm@100mhz DCR 0.3

0_0603_5%
D
1 2 W=40mils HDMI_CLK- HDMI_R_CK- D
R574 1 2 0_0402_5%
+HDMI_5V_OUT
D10 F2 1 2
2 1+HDMI_5V L38 1 2
+5VS 1 2
1 WCM-2012-900T_0805
CH491DPT_SOT23-3 1.1A_6V_SMD1812P110TF @ 4
C345 4 3 3
0.1U_0402_16V4Z HDMI_CLK+ R579 1 2 0_0402_5% HDMI_R_CK+
2
+3VS
HDMI_TX0- R565 1 2 0_0402_5% HDMI_R_D0-
1 2
1 2
1
L36
R198 WCM-2012-900T_0805
1M_0402_5% @ 4 3
4 3
UMA@
HDMI_TX2- HDMI_TX0+ HDMI_R_D0+
2
UMA 16 PCH_DPB_N0 C280 UMA@ 2 1 0.1U_0402_10V7K R569 1 2 0_0402_5%
2
C281 UMA@ 2 HDMI_TX2+
16 PCH_DPB_P0 1 0.1U_0402_10V7K
HDMI_HPD
1 3 PCH_DPB_HPD 16
HDMI_TX1- HDMI_TX1- HDMI_R_D1-
16 PCH_DPB_N1 C283 UMA@ 2 1 0.1U_0402_10V7K Q14 R584 1 2 0_0402_5%
S
HDMI_TX1+
220P_0402_50V7K
C324
16 PCH_DPB_P1 C282 UMA@ 2 1 0.1U_0402_10V7K 1 SSM3K7002F_SC59-3
1
UMA@ UMA@ 1 2
HDMI_TX0- L39 1 2
16 PCH_DPB_N2 C287 UMA@ 2 1 0.1U_0402_10V7K R219
HDMI_TX0+ WCM-2012-900T_0805
16 PCH_DPB_P2 C286 UMA@ 2 1 0.1U_0402_10V7K 100K_0402_5%
2 @ 4 3
C285 UMA@ 2 HDMI_CLK- 4 3
16 PCH_DPB_N3 1 0.1U_0402_10V7K
HDMI_CLK+
2
HDMI_TX1+ HDMI_R_D1+
16 PCH_DPB_P3 C284 UMA@ 2 1 0.1U_0402_10V7K R586 1 2 0_0402_5%
HDMI_TX2- HDMI_R_D2-
C R591 1 2 0_0402_5% C
1 2
L40 1 2
WCM-2012-900T_0805
@ 4
4 3 3
HDMI_TX2+ R593 1 2 0_0402_5% HDMI_R_D2+
R03 modify
HDMI_TX2- R589 1 UMA@ 2 680_0402_5% HDMI_GND
HDMI_TX2+
R594 1 UMA@ 2 680_0402_5%
HDMI_TX1-
R583 1 UMA@ 2 680_0402_5%
HDMI_TX1+ R587 1 UMA@ 2 680_0402_5%
HDMI_TX0- R564 1 UMA@ 2 680_0402_5%
HDMI_TX0+
R570 1 UMA@ 2 680_0402_5%
HDMI_CLK-
HDMI_CLK+ R573 1 UMA@ 2 680_0402_5%
R580 1 UMA@ 2 680_0402_5%
+3VS +HDMI_5V_OUT INTEL use 680 Ohm for terminationn

in DG 1.5
1
D
+3VS 2 Q37
SDVO_SCLK +3VS G
R250 1 UMA@ 2 2.2K_0402_5% HDMI connector SSM3K7002F_SC59-3 S
3
R03 modify
2
2
SDVO_SDATA
2
B R253 1 UMA@ 2 2.2K_0402_5% D12 D11 HDMI_HPD JHDMI1 B

RB751V40_SC76-2 RB751V40_SC76-2 19
HP_DET
R785 +HDMI_5V_OUT 18
+5V NV use 499 Ohm for terminationn
0_0402_5% HDMI_SDATA 17
DDC/CEC_GND
21
1
16
2
UMA@ HDMI_SCLK
2.2K_0402_5%
2.2K_0402_5%
Pull high at VGA side SDA

1
15
SCL
14
R256
R255
Reserved
HDMI_R_CK- 13
CEC
12 20
2
G
CK- GND
1
HDMI_R_CK+ 11
1
1109 RF request CK_shield GND 21

16 SDVO_SCLK HDMI_SCLK HDMI_R_D0- 10 22
R249 11 UMA@ 22
R244 0_0402_5%
0_0402_5% CK+ GND
24 VGA_HDMI_SCLK 3 1 9 23
DISO@ D0- GND
S
1 HDMI_R_D0+ 8
D0_shield
2
G
HDMI_R_D1- 7
16 SDVO_SDATA Q16 SSM3K7002F_SC59-3 C357 D0+
R252 1 UMA@ 2 0_0402_5% HDMI_SDATA 6
24 VGA_HDMI_SDATA 47P_0402_50V8J D1-
R254 1 2 0_0402_5% 3 1 2 HDMI_R_D1+ 5
@ D1_shield
S
DISO@ HDMI_R_D2- 4
1 D1+
3
D2-
Q17 SSM3K7002F_SC59-3 C358 HDMI_R_D2+ 2
Place closed to JHDMI1 47P_0402_50V8J 1
D2_shield
2 @ D2+
ACON_HMR2E-AK120D
CONN@
A A

HDMI Conn
Custom 0.4
5 4 3 2
Sheet 33 of 61
5 4 3 2 1
D D
SATA HDD1 Conn.

CL 4.0 mm
JHDD1
1
SATA_PTX_DRX_P0 GND
13 SATA_PTX_DRX_P0 C708 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P0 2
SATA_PTX_DRX_N0 RX+
13 SATA_PTX_DRX_N0 C711 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N0 3
RX-
4
SATA_PRX_DTX_N0 GND
13 SATA_PRX_DTX_N0 C712 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N0 5
SATA_PRX_DTX_P0 TX-
13 SATA_PRX_DTX_P0 C713 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P0 6
TX+
7
GND +3VS
+3VS 8 1
3.3V
9 C453
3.3V
10
3.3V
11 0.1U_0402_16V4Z
+5VS GND 2
R370 12 GND
0_0805_5% 13
+5VS_HDD1 GND
1 2 14 5V
15 5V
16 5V +5VS_HDD1
17 GND
C 18 Rsv C
19 GND 100mils
20
12V
21
12V
10U_0805_10V4Z
C744
0.1U_0402_16V4Z
C743
1000P_0402_50V7K
C742
1U_0402_6.3V6K
C740
22 1 1 1 1
12V
23
GND
24
GND
2 2 2 2
OCTEK_SAT-22DD1G
CONN@
SATA ODD Conn.

JODD1
SATA_PTX_C_DRX_P2 1 GND
13 SATA_PTX_DRX_P2 C643 1 2 0.01U_0402_16V7K 2
SATA_PTX_C_DRX_N2 A+
13 SATA_PTX_DRX_N2 C639 1 2 0.01U_0402_16V7K 3 A-
SATA_PRX_C_DTX_N2 4 GND
13 SATA_PRX_DTX_N2 C628 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P2 5 B-
13 SATA_PRX_DTX_P2 C624 1 2 0.01U_0402_16V7K 6 +5VS_ODD
B+
7 GND 80mils
18 ODD_DETECT# 1 @ R139 2 0_0402_5% 8
+5VS_ODD
10U_0805_10V4Z
C199
0.1U_0402_16V4Z
C200
1U_0402_6.3V6K
C201
DP
1000P_0402_50V7K
C192
B +5VS_ODD 9 1 1 1 1 B
+5V
ODD_DA#_R 10 +5V 17
17 ODD_DA# GND
R763 1 @ 2 0_0402_5% 11 16
MD GND
12 GND 15 2 2 2
GND 2
+5VS +5VS_ODD 13 GND 14
GND
R765
0_0805_5% OCTEK_SLS-13SB1G_RV
+VSB
1 2 CONN@
D
6
S
2
1 5 4
1U_0402_6.3V6K
C812
R760 2
470K_0402_5% @ 1 Q55
@ SI3456BDV-T1-E3 1N TSOP6
G
2 @
3
1
ODD_EN
2
1
D
1.5M_0402_5%
R764
2
18 ODD_EN# 2 Q56
G @ C811
SSM3K7002F_SC59-3 S 0.1U_0402_16V4Z
3
@ 1
@
1
A A

HDD & ODD Connector
Custom
5 4 3 2 1
5 4 3 2 1
+1.2V_LAN
0.1U_0402_16V4Z
0.1U_0402_16V4Z 0.1U_0402_16V4Z U32
+3V_LAN 37 +LAN_BIASVDDH
1 1 1 1 1 1 1 BIASVDDH
C678 C302 C674 C301 C671 C298 C668 20 +3V_LAN +3VALW
VDDO_CR R543
+1.2V_LAN +LAN_XTALVDDH
60mil
35 17 1 2
4.7U_0603_6.3V6K 2 2 2 2 2 2 2 VDDC XTALVDDH
61
VDDC 0_1206_5%
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
48 +LAN_AVDDH
AVDDH 1 1
42 C662 C666
+3V_LAN AVDDH
7 4.7U_0603_6.3V6K
VDDO 2 2
56
D +3V_LAN VDDO D
62 0.1U_0402_16V4Z
VDDO LAN_MIDI3-
TRD3_N 49 LAN_MIDI3- 36
50 LAN_MIDI3+
TRD3_P LAN_MIDI3+ 36
0.1U_0402_16V4Z
LAN_MIDI2-
1 1 1 1 47 LAN_MIDI2- 36
C667 TRD2_N LAN_MIDI2+
C683 C690 C680 46 LAN_MIDI2+ 36
TRD2_P
+LAN_AVDDL LAN_MIDI1-
2 39
AVDDL TRD1_N
43
LAN_MIDI1+ LAN_MIDI1- 36 20mil
4.7U_0603_6.3V6K 2 2 2 45
AVDDL TRD1_P 44 LAN_MIDI1+ 36 L20
0.1U_0402_16V4Z +LAN_XTALVDDH
0.1U_0402_16V4Z 51 AVDDL 1 1 2+3V_LAN
LAN_MIDI0-
+LAN_GPHYPLLVDDL TRD0_N 41 LAN_MIDI0- 36 C323 BLM18AG601SN1D_2P
LAN_MIDI0+
36 40 LAN_MIDI0+ 36 0.1U_0402_16V4Z
GPHY_PLLVDDL TRD0_P
+LAN_PCIEPLLVDD 20mil
32 2 L34
PCIE_PLLVDDL +LAN_BIASVDDH
1 1 2
29 C657 BLM18AG601SN1D_2P
PCIE_PLLVDDL 0.1U_0402_16V4Z
65 LAN_LINK# 36
SO_LINKLED#
2
SCLK_SPD1000LED#
66 20mil
+LAN_AVDDH L15
2 1 2
SPD100LED#_SERIALDO 1 BLM18AG601SN1D_2P
C299 1
PCIE_PRX_C_DTX_P1 R200 2 C294
14 PCIE_PRX_DTX_P1 0.1U_0402_10V7K 1 28 67 1 0_0402_5% LAN_ACTIVITY# 36
2 C670 PCIE_PRX_C_DTX_N1 PCIE_TXD_P TRAFFICLED#_SERIALDI 0.1U_0402_16V4Z
14 PCIE_PRX_DTX_N1 0.1U_0402_10V7K 1 2 C673 27 0.1U_0402_16V4Z
PCIE_TXD_N R214 0_0603_5%R03 modify+VDDO_CR 2
14 PCIE_PTX_C_DRX_P1 33 +VDDO_CR_R 2
14 PCIE_PTX_C_DRX_N1
PCIE_RXD_P 1 2
34 8
PCIE_RXD_N GPIO1_LR_OUT
CR_5IN1_LED#_R R229 2 B0@ 1 0_0402_5% CR_5IN1_LED#
5 CR_5IN1_LED# 41
40 EC_PME# R201 1 2 0_0402_5% GPIO_0
+XDPWR_SDPWR_MSPWR
SPROM_DOUT
C +3V_LAN 64 SPROM_CLK C
R209 1 2 4.7K_0402_5% SI_EEDATA R826 (+VDDO_CR)
LAN_PME# 63 +VDDO_CR
15,38,39,46 PCH_PCIE_WAKE# R213 1 @ 2 0_0402_5% CS#_EECLK
3
WAKE# For B0 version
17,38,39,40,46 PLT_RST_BUF# R225 1 <BOM 2Structure>
0_0402_5% 11 R232
14 CLK_PCIE_LAN PREST# 1 2
31 PCIE_REFCLK_P
14 CLK_PCIE_LAN# 30 1 B0@
PCIE_REFCLK_N CR_XD_WE#_SD_DETECT_R CR_XD_WE#_SD_DETECT 1 1 0_0805_5%
1 R576 CR_XD_WE#_SD_DETECT 36 C337 C676 C328
SD_DETECT/XD_WE# 2 1 0_0402_5%
CR_XD_DETECT#_R CR_XD_DETECT#
CR_DATA0 CR_DATA0_R 68 R572 CR_XD_DETECT# 36
R199 1 2 47_0402_5% SR_DISABLE/XD_DETECT# 2 1 0_0402_5% 2
36 CR_DATA0 CR_DATA1 CR_DATA1_R 25 CR_DATA0 CR_XD_CE#_MS_INS#_R CR_XD_CE#_MS_INS# 4.7U_0603_6.3V6K 2 2
0.1U_0402_16V4Z
24 R192 1 2 0_0402_5% CR_XD_CE#_MS_INS# 36 0.1U_0402_16V4Z
36 CR_DATA1 CR_DATA2 R207 1 47_0402_5% CR_DATA2_R 59
R211 1 22 47_0402_5% CR_DATA1 MS_INS#/XD_CE#
36 CR_DATA2 CR_DATA3 CR_DATA3_R 23 CR_DATA2 CR_XD_RE#_R CR_XD_RE#
R215 1 R227 2 1 0_0402_5% CR_XD_RE# 36
36 CR_DATA3 CR_DATA4 2 47_0402_5% CR_DATA4_R 22 CR_DATA3 GPIO2_MEDIA_SENSE/XD_RE# 9
36 CR_DATA4 CR_DATA5 R168 11
R171 47_0402_5%CR_DATA5_R
22 47_0402_5%
52 CR_DATA4
CR_WP#_XD_WP#_R CR_WP#_XD_WP#
CR_WP#_XD_WP# 36
36 CR_DATA5 CR_DATA6 CR_DATA6_R 53 57 R185 2 1 0_0402_5%
CR_DATA5 CR_WP#/XD_WP#
36 CR_DATA6 CR_DATA7 R179 11
R182 47_0402_5%CR_DATA7_R
22 47_0402_5%
54 CR_DATA6
CR_PWR_XD_ALE_R CR_PWR_XD_ALE
36 CR_DATA7 55 60 R196 2 A0@ 1 0_0402_5% CR_PWR_XD_ALE 36
CR_DATA7 CR_LED_CR_BUS_PWR/XD_ALE
CR_CLK_XD_RY_BY#_R CR_CLK_XD_RY_BY# R222 C329
R04 modify CR_CLK_XD_RY_BY# 36
21 R216 1 2 0_0402_5%
CR_CLK/XD_RY_BY# CR_CMD_XD_CLE_R 1 2 1 2
+3VS CR_CMD_XD_CLE
26 CR_CMD_XD_CLE 36 @
R190 1 CR_CMD_XD_CLE R195 1 2 47_0402_5% @
2 1K_0402_5% 58 22_0402_5%
+3V_LAN
VMAIN_PRSNT R04 modify 0.01U_0402_16V7K
R228 4.7K_0402_5%
6 TEST1 For EMI request
1 2
40mil L37 40mil
10 +1.2V_LAN_OUT
R824 (CP_PWR_XD_ALE) CR_PWR_XD_ALE 1 2 TEST2
16 1 2 +1.2V_LAN
R226 4.7K_0402_5% SR_LX
for B0 version R208
R212 1 2 B0@ 1 0_0402_5%
2 10K_0402_5%
4.7UH_PG031B-4R7MS_1.1A_20%
A0@ 4 13 1 1 EMI Request...2010/07/27
LOW_PWR SR_VFB
B
C689 B
LAN_XTALI LAN_XTALO_R C691
LAN_XTALO_R LAN_XTALI 19 0.1U_0402_16V4Z 10U_0805_10V4Z
XTALO 2 2 SM010005500 500ma 600ohm@100mhz DCR 0.38
18 XTALI 20mil
1
R562
40mil +LAN_PCIEPLLVDD L18
15 +3V_LAN +1.2V_LAN
GND PLANE
200_0402_1% LAN_RDAC 15mil SR_VDDP 1 2

SR_VDD 14 4.7U_0603_6.3V6K BLM18AG601SN1D_2P
38 1 1
Y4 LAN_XTALO 1 2 RDAC 1 0.1U_0402_16V4Z C692 C306
2
C684 1
1 2 14 LAN_CLKREQ# R541 1.24K_0402_1% C303
12 CLK_REQ# 0.1U_0402_16V4Z
25MHZ_20PF_7A25000012 2 2 4.7U_0603_6.3V6K
1 BCM57785XA0KMLG_QFN68_8X8 2
1 2
69
C681 PLACE NEXT P14

27P_0402_50V8J
2
C679 20mil
27P_0402_50V8J +LAN_GPHYPLLVDDL
2 +1.2V_LAN
L35
1 2
1 1 BLM18AG601SN1D_2P
C658 C659
0.1U_0402_16V4Z 4.7U_0603_6.3V6K
2 2
+3V_LAN
SPROM_CLK SPROM_DOUT
(EECLK) (EEDATA)
C634 1 2 0.1U_0402_16V4Z 20mil
+LAN_AVDDL
On chip 1 0
2
L17 +1.2V_LAN
2
@
R536 1 2
R537 4.7K_0402_5% 1 BLM18AG601SN1D_2P
AT24C02 1 1 @ 4.7K_0402_5% C656
U31 @ 1
C297
1
A 0.1U_0402_16V4Z A
1
8 A0 1 2
SPROM_CLK VCC
7 2 4.7U_0603_6.3V6K
WP A1 2
SPROM_DOUT 6 3
SCL A2
5 GND 4
SDA
AT24C04BN-SH-T_SO8
2
R538
2
4.7K_0402_5%
R525 Security Classification Compal Secret Data Compal Electronics, Inc.
@ 4.7K_0402_5% 2010/10/15 2011/10/15 Title
1
Broadcom BCM57785
1
Custom
5 4 3 2 1
T28 LAN_ACTIVITY#
LAN_LINK#
1 TCT1 MCT1 24
LAN_MIDI3+ 2 23 RJ45_MIDI3+
35 LAN_MIDI3+ TD1+ MX1+
D LAN_MIDI3- 3 22 RJ45_MIDI3- D
35 LAN_MIDI3- TD1- MX1-
2
4 21 D14
LAN_MIDI2- TCT2 MCT2 RJ45_MIDI2-
35 LAN_MIDI2- 5 TD2+ MX2+ 20 PJDLC05C_SOT23-3
LAN_MIDI2+ 6 19 RJ45_MIDI2+
35 LAN_MIDI2+ TD2- MX2- @
7 TCT3 MCT3 18
LAN_MIDI1+ 8 17 RJ45_MIDI1+ R02 modify
35 LAN_MIDI1+ TD3+ MX3+
LAN_MIDI1- 9 RJ45_MIDI1-
35 LAN_MIDI1- TD3- MX3- 16
1
10 TCT4 MCT4 15
LAN_MIDI0- RJ45_MIDI0-
35 LAN_MIDI0- 11 TD4+ MX4+ 14
LAN_MIDI0+ RJ45_MIDI0+
35 LAN_MIDI0+ 12 TD4- MX4- 13
R03 modify
LAN Connector
1
1
R02 modify IH-160 C474,C475 and D14
SP050006F00
1 1 1 1 R493 R492 ME interefer,do not pop!!
C617 C618 C619 C620 75_0603_1% 75_0603_1% R03 modify +3V_LAN 2 1
R384 1K_0402_5% 1
1
2
1
0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 R491 R490 220P_0402_50V7K
75_0603_1% 75_0603_1% C473
0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 C474 68P_0402_50V8J
@ JRJ1
2
2 1 9
RJ45_GND Green LED+
LAN_LINK#
C
Place close to TCT pin 35 LAN_LINK# 10 Green LED- C
RJ45_MIDI0+
1 PR1+ SHLD1 14
BOTHHAND: S X'FORM_ GST5009-D LF LAN, SP050006B00 RJ45_MIDI0- SHLD2 13
TIMAG:S X'FORM_ IH-160 LAN , SP050006F00 2 PR1-
RJ45_MIDI1+
3 PR2+
RJ45_MIDI2+
4 PR3+
RJ45_MIDI2-
5 PR3-
RJ45_MIDI1-
6 PR2-
RJ45_MIDI3+
7 PR4+
RJ45_MIDI3-
8 PR4-
+3V_LAN 2 1 11
R385 1K_0402_5% 1 Yellow LED+
LAN_ACTIVITY#
35 LAN_ACTIVITY# 12
220P_0402_50V7K Yellow LED-
C476 68P_0402_50V8J
2 SANTA_130451-K
2 1
@ CONN@
Card Reader Connector @

JP1
C475
B88069X9231T203_4P5X3P2-2
R05 modify 2 1 40mil
B JREAD1 EMI Request B
CR_DATA0 R03 modify

+XDPW R_SDPW R_MSPW R 11 SD_VCC XD_D0 31 CR_DATA0 35
CR_DATA1
18 MS_VCC XD_D1 32 CR_DATA1 35 @
CR_DATA2
39 XD_VCC XD_D2 33 CR_DATA2 35 RJ45_GND
C478 LANGND
CR_DATA3
XD_D3 34 CR_DATA3 35 1 2
CR_DATA4
CR_CLK_XD_RY_BY# XD_D4 35 CR_DATA4 35
CR_DATA5
8 36 CR_DATA5 35 1000P_1206_2KV7K
CR_CMD_XD_CLE SD_CLK XD_D5 CR_DATA6 R04 modify
CR_XD_W E#_SD_DETECT 16 XD_D6 37 CR_DATA6 35
SD_CMD CR_DATA7 R04 modify
1 38
1
CR_W P#_XD_W P# SD_CD XD_D7 CR_DATA7 35
CR_DATA0 2 40mil
2
SD_WP CR_XD_DETECT# JP3 @
1
CR_DATA1 4 XD_CD 22 CR_CLK_XD_RY_BY# CR_XD_DETECT# 35 2 1
SD/MMC_DAT0 B88069X9231T203_4P5X3P2-2
CR_DATA2 3 XD_R/B 23 CR_XD_RE# CR_CLK_XD_RY_BY# 35 J10
SD/MMC_DAT1
1
CR_DATA3 21 24 CR_XD_CE#_MS_INS# CR_XD_RE# 35 JUMP_43X118 B88069X9231T203_4P5X3P2-2 R04 modify
SD/MMC_DAT2 XD_RE L53
3
19 25 CR_XD_CE#_MS_INS# 35 JP2
SD/MMC_DAT3 XD_CE CR_CMD_XD_CLE @ 1.2UH_1127AS-1R2N_2.4A_30%
26 @
2
D36
2
XD_CLE CR_PW R_XD_ALE CR_CMD_XD_CLE 35
27
1
XD_ALE CR_XD_W E#_SD_DETECT CR_PW R_XD_ALE 35 PJDLC05C_SOT23-3
2
XD_WE 28 CR_W P#_XD_W P# CR_XD_W E#_SD_DETECT 35

XD_WP-IN 29 CR_W P#_XD_W P# 35
CR_DATA0 SD_GND 6
CR_DATA1 10 MS_DATA0 SD_GND 13
CR_DATA2 9 MS_DATA1 5
MS_GND
1
CR_DATA3 12 MS_GND 20
MS_DATA2
CR_CLK_XD_RY_BY# 15 XD_GND 30
MS_DATA3
CR_XD_CE#_MS_INS# 17 MS_SCLK 40
XD_GND
CR_CMD_XD_CLE 14 GND 41
MS_INS
7 GND 42
MS_BS
A TAITW _R013-P17-HM_NR A
CONN@

LAN Magnetic & RJ45
Custom
5 4 3 2
1
A B C D E
1 1
2 2
3 3
4 4

RTS5138 Card Reader
Custom
A B C D E
A B C D E
For Wireless LAN

+3VS_WLAN +1.5VS +3VS_WLAN
1 1 1 1 1 1
C403 C735 C392 C734 C423 C387
+3VS R324 +3VS_WLAN 4.7U_0805_10V4Z 0.1U_0402_16V4Z 4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
0_1206_5% 60mil 2 2 2 2 2 2
2 1
WLAN&BT Combo module circuits

1 Mini Card Power Rating 1
BT BT
on module on module
+1.5VS +3VS_WLAN Enable Disable
@ R702
0_0402_5% JMINI1
15,35,39,46 PCH_PCIE_WAKE# 1 2 1
1 2 2 BT_CTRL H L
3 3 4
4 BT_ON#
5 5 6
6 L H
14 MINI1_CLKREQ# 7 8
7 8
9 9 10
10
14 CLK_PCIE_MINI1# 11 12
11 12
14 CLK_PCIE_MINI1 13 14
13 14
15 16
15 16
17 18 WL_OFF#
17 18
19 20 PLT_RST_BUF# WL_OFF# 18 D32
19 20
21 22 +3VS_MINI1 PLT_RST_BUF# 17,35,39,40,46 SUSP# BT_CTRL
14 PCIE_PRX_DTX_N2 21 22 1 2
23 24 R342 1 2 0_0603_5% +3VS 40,44,52,53 SUSP#
14 PCIE_PRX_DTX_P2 23 24
25 25 26
26 CH751H-40PT_SOD323-2
27 27 28 MINI1_SMBCLK
28 R337 1 @ 2 0_0402_5% PCH_SMBCLK 14 @
29 30
1
29 30 MINI1_SMBDATA D
14 PCIE_PTX_C_DRX_N2 31 32 R335 1 @ 2 0_0402_5% PCH_SMBDATA 14
31 32 2 Q57
14 PCIE_PTX_C_DRX_P2 33 34 18,39 BT_ON#
33 34 USB20_N8 17 G
35 36
35 36 USB20_P8 17 SSM3K7002F_SC59-3 S
37
3
37 38 38
39 40
+3VS_WLAN 39 40
41 42 R306 1 2 0_0402_5%
41 42 MINI1_LED# 40
43 44
43 44
45 46
45 46 (9~16mA)
E51TXD_P80DATA_R 47 48
47 48
1
40 E51TXD_P80DATA R299 1 2 0_0402_5% E51RXD_P80CLK_R 49 50
40 E51RXD_P80CLK 49 50
2 R287 1 2 0_0402_5% 51 52 R305 2
51 52 100K_0402_5%
53 54
1
GNDGND
2
1
ACES_51711-0520W-001
R300 R288
100K_0402_5% 1K_0402_5% +3VS_WLAN
CONN@
2
BT_CTRL
For 3G / GPS
Reserve
To 3G Module Connect
+3VS_FULL +1.5VS +3VS_FULL
R03 modify
60mil
+3VS 2 1 +3VS_FULL 1 1 1 J3G1 +3VALW +3VS
R352 0_1206_5% 1 1 1 C466
C455 C467 C442 C441 22 20
C443 0.1U_0402_16V4Z GND 20
4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 19
4.7U_0805_10V4Z R03 modify 19
2 18
2 2 2 18
2 2 17
2
17
16
16 R405
15
15 100K_0402_5%
3 +1.5VS +3VS_FULL +3VALW 14 3
14
13 3G@
13
12
1
@ R371 12 WWAN_OFF#
JMINI2 11 WWAN_OFF# 18
PCH_PCIE_WAKE# 11 MINI2_LED#
0_0402_5% 1 2 10 MINI2_LED# 40
(WLAN_BT_DATA) 1 2 10
1 2
(WLAN_BT_CLK)
3
3 4 4 The same circuit with JMINI1, 1
C531 9 9 USB20_N9_R1 R404 0_0402_5%
5 6 8 USB20_N9 17
14 MINI2_CLKREQ# 7
5
7
6
8 but different PCIE & USB.... 3G@ 8
7
USB20_P9_R1
1 3G@ 2 USB20_P9 17
9 8 0.1U_0402_16V4Z 7 1 3G@ 2
9 10 10 2 6
14 CLK_PCIE_MINI2# 11 12 6 R402 0_0402_5% USB20_N12 17
11 12 5 5
14 CLK_PCIE_MINI2 13 14 4 USB20_P12 17
13 14 4
15 16 3
15 16 R03 modify 3
17 18 WL_OFF# 2 3G_GATE
17 18 2
19 20 PLT_RST_BUF# 21 1
19 20 GND 1
21 22 +3VS_MINI1
21 22 +3VALW
14 PCIE_PRX_DTX_N3 23
23 24
24 +3VS Peak: 2.75A ACES_87213-2000G
14 PCIE_PRX_DTX_P3 25 26 R343 1 2 0_0603_5% CONN@
27
25 26
28
Normal: 1.1A
27 28 MINI2_SMBCLK PCH_SMBCLK
29 30 MINI2_SMBDATA R334 1 @ PCH_SMBDATA R03 modify
14 PCIE_PTX_C_DRX_N3
29 30 2 0_0402_5%
31 32
31 32 R333 1 @ 2 0_0402_5%
14 PCIE_PTX_C_DRX_P3 33 34 USB20_N11_R USB20_N11
33 34
35 36 USB20_P11_R R332 1 2 0_0402_5%USB20_P11 USB20_N11 17
1
35 36 3G@ 1 1
37 38 USB20_P11 17
37 38 R331 1 2 0_0402_5% + R790
39 39 40
40 C535
C527 C537
20mil 47K_0402_5%
+3VS_FULL 41 42 220U_6.3V_M_R17 +VSB
41 42 MINI2_LED# 3G@ 3G@ 2 1
43 44 R329 1 2 0_0402_5% 2 2 10U_0603_6.3V6M
2
43 44 3G@
45 46
45 46 1 3G@
E51TXD_P80DATA_R 47 47 48
48 (9~16mA) 47P_0402_50V8J C820
49
1
E51RXD_P80CLK_R 49 50 SUSP D 0.1U_0603_25V7K
51 50 44,52,53 SUSP
51 52 2 Q58
52 2
G 3G@
53 GND1 54
GND2 Close to 3G CONN S
3
4 4
SSM3K7002F_SC59-3
BELLW_80003-1021
CONN@

MINI CARD (WLAN & TV-Tuner)
Custom
A B C D Date: Wednesday, October 27, 2010 E Sheet 38 of 61
A B C D E
USB3.0 Conn.
1
USB/B Conn. 1
31
36
35
34
33
32
ACES_50050-03071-001_30P
W=100mils
GND
GND
GND
GND
GND
GND
30 29 +5VALW
30 29 PCIE_PTX_C_DRX_P4 14
28 27 PCIE_PTX_C_DRX_N4 14 JUSB1
28 27
26
24
26 25
25
23
PCIE_PRX_DTX_P4 14 (Port 0,1) 1
24 23 PCIE_PRX_DTX_N4 14 1
22 21 CLK_PCIE_USB30 14 2
22 21 2
20 19 CLK_PCIE_USB30# 14 3 3
20 19
18 17 USB20_N3 17 4 4
18 17 SYSON#
18,46 SMIB 16 15 USB20_P3 17 44,46 SYSON# 5 5
16 15
15,35,38,46 PCH_PCIE_WAKE# 14 13 PLT_RST_BUF# 17,35,38,40,46 6
14 13 USB20_N2 6
40,44,46,51 SYSON 12 11 17 USB20_N2 7
12 11 USB20_P2 7
+1.5V 10
10 9
9 USB30_CLKREQ# 14 OD output R03 modify 17 USB20_P2 8
8
8 7 +3VALW 9
8 7 USB20_N0 9
6 5 17 USB20_N0 10
6 5 USB20_P0 10
+5VALW 4 3 +5VALW 17 USB20_P0 11 13
4 3 11 GND
2 1 12 14
2 1 12 GND
CONN@ JUSB3
ACES_85201-1205N
CONN@
2 2
BT Conn. +BT_VCC
(Port 11) JBT1

10 8
GND 8
7
7
6 USB20_P13 17
6
5 USB20_N13 17
5 (WLAN_BT_DATA)
4
4 (WLAN_BT_CLK)
3
3
2
2
9 1
GND 1
3 ACES_87213-0800G 3
CONN@
BT Wire Cable Note:
+3VALW
Pin 3, Pin 4 NC
+3VS
2
C736
BT@ 1
0.1U_0402_16V4Z C731
3
1 BT@
BT_ON# Q41
18,38 BT_ON# 1 BT@ 2 2 1U_0603_10V6K
R710 2
10K_0402_5%
2 AP2301GN-HF_SOT23-3
C738
1
BT@
0.1U_0402_16V4Z W=40mils
1 +BT_VCC
1
1
C730 C729 R709
BT@ BT@ 300_0603_5%
4.7U_0603_6.3V6K BT@
2
2
0.1U_0402_16V4Z
1
D
2 Q42
4
G 4
SSM3K7002F_SC59-3 S
3
BT@

USB / BT / USBB
Custom
A B C D E
5 4 3 2 1
+3VALW
65W/90W# R701 2 1 100K_0402_5%

3S/4S# R700 2 1 100K_0402_5%
+5VS
R311 L21
+3VALW 0_0805_5% FBMA-L11-160808-800LMT_0603 TP_CLK R363 1 2 4.7K_0402_5%
1 2 +3VALW_EC 1 2 +EC_VCCA
TP_DATA R364 4.7K_0402_5%
1 1 1 1 2 2 1 1 2
0.1U_0402_16V4Z
C456
0.1U_0402_16V4Z
C728
0.1U_0402_16V4Z
C418
1000P_0402_50V7K
C400
1000P_0402_50V7K
C399
0.1U_0402_16V4Z
C720
C457
D D
0.1U_0402_16V4Z +3VS
ECAGND
@ R675 2 2 2 2 1 1 2
@C714
@ C714
22P_0402_50V8J 33_0402_5% @
2 1 CLK_PCI_LPC BKOFF# R735
2 1 2 1 100K_0402_5%
111
125
EC_MUTE#
22
33
67
96
U20 R362 2 @ 1 10K_0402_5%
9
R02 modify
VCC
VCC
VCC
AVCC
VCC
VCC
VCC
+3VALW
EC_RST#
+3VALW R328 2 1 47K_0402_5% GATEA20 R676 2 1 200K_0402_5%
1 MINI2_LED#
18 GATEA20 EC_KBRST# GA20/GPIO00 INVT_PWM/PWM1/GPIO0F 21 MINI2_LED# 38
C431 2 0.1U_0402_16V4Z BEEP#
1 18 EC_KBRST# 2 23 BEEP# 42
SERIRQ KBRST#/GPIO01 BEEP#/PWM2/GPIO10
13 SERIRQ 3 SERIRQ# 26 ACOFF 2 1 ACIN 15,22,44,45,48
LPC_FRAME# FANPWM1/GPIO12
13 LPC_FRAME# LPC_AD3 4 LFRAME# 27 ACOFF 47,48 D23 CH751H-40PT_SOD323-2
ACOFF/FANPWM2/GPIO13
13 LPC_AD3 LPC_AD2 5 ECAGND
LAD3 EC_ACIN C719
13 LPC_AD2 LPC_AD1 7 PWM Output BATT_TEMP C452 2 1 100P_0402_50V8J 2 1 100P_0402_50V8J
+3VALW LAD2
13 LPC_AD1 LPC_AD0 8 63 BATT_TEMP 50
10/1 ENE Recommand LAD1 BATT_TEMP/AD0/GPIO38
LAD0 LPC & MISC
13 LPC_AD0 10 64 ADP_I
BATT_OVP/AD1/GPIO39
KSO1 CLK_PCI_LPC 65 AD_BID0 ADP_I 48,50
ADP_I/AD2/GPIO3A
R336 1 2 47K_0402_5% 17 CLK_PCI_LPC PLT_RST_BUF# 12
PCICLK AD Input AD3/GPIO3B
66
KSO2 17,35,38,39,46 PLT_RST_BUF# EC_RST# 13 75 IMON_R
R339 PCIRST#/GPIO05 AD4/GPIO42
1 2 47K_0402_5% EC_SCI# 37 76 R356 2 1 0_0402_5% IMVP_IMON 55
ECRST# SELIO2#/AD5/GPIO43
18 EC_SCI# 20 SCI#/GPIO0E R367
EC_SMI# 38 CLKRUN#/GPIO1D VR_HOT# 0_0402_5%
R682 1 2 1K_0402_5% DAC_BRIG H_PROCHOT# 5,50
68 EN_DFAN1 55 VR_HOT# 2 1
DAC_BRIG/DA0/GPIO3C
EC_SMB_DA1 70 IREF EN_DFAN1 43
EN_DFAN1/DA1/GPIO3D
R359 1 2 2.2K_0402_5% KSI0 DA Output 71 CALIBRATE# IREF 48
1
IREF/DA2/GPIO3E D
KSI1 55 72 CALIBRATE# 48 H_PROCHOT#_EC
KSI0/GPIO30 DA3/GPIO3F 2 Q26
EC_SMB_CK1 KSI2 56 KSI1/GPIO31
KSI3 57 EC_MUTE# G SSM3K7002F_SC59-3
R358 1 2 2.2K_0402_5% KSI2/GPIO32
C KSI4 58 83 EC_MUTE# 42 S C
3
KSI3/GPIO33 PSCLK1/GPIO4A GFX_CORE_PWRGD
KSI5 59 84 WWAN_LED# GFX_CORE_PWRGD 55
@ R357 KSI4/GPIO34 PSDAT1/GPIO4B
@ C462 KSI6 60 85 H_PROCHOT#_EC WWAN_LED# 41
33_0402_5% KSI5/GPIO35 PSCLK2/GPIO4C
22P_0402_50V8J KSI7 61 KSI6/GPIO36
PS2 Interface PSDAT2/GPIO4D
86 TP_CLK
2 1 1 2 KSI[0..7] KSO0 62 KSI7/GPIO37 87 TP_DATA TP_CLK 41 Latest design guide suggest change QE1 to
41 KSI[0..7] 39 TP_CLK/PSCLK3/GPIO4E TP_DATA 41
KSO1 KSO0/GPIO20 88 74LVC1G06.
KSO[0..17] 40 TP_DATA/PSDAT3/GPIO4F
KSO2 KSO1/GPIO21
Reserve for EMI please close to U44 41 KSO[0..17] KSO3 41
KSO2/GPIO22
KSO4 42 97 65W/90W#
KSO3/GPIO23 SDICS#/GPXOA00 65W/90W# 48,50
+3VS KSO5 43 98 HDA_SDO
KSO4/GPIO24 SDICLK/GPXOA01
KSO6 44
KSO5/GPIO25
Int. K/B 99 LID_SW# HDA_SDO 13 +3VALW
45 SDIDO/GPXOA02 LID_SW# 41
EC_SMB_CK2 KSO7 KSO6/GPIO26 Matrix 109
R360 1 2 2.2K_0402_5%
KSO8 46
KSO7/GPIO27
SPI Device Interface SDIDI/GPXID0
EC_SMB_DA2 KSO9 47 EC_SI_SPI_SO
KSO8/GPIO28 EC_SI_SPI_SO 41
R361 KSO10 48 119 EC_SO_SPI_SI LID_SW#
1 2 2.2K_0402_5% KSO11
KSO9/GPIO29 SPIDI/RD# EC_SO_SPI_SI 41 R696 2 1 100K_0402_5%
49 120 EC_SPICLK
KSO10/GPIO2A SPIDO/WR#
EC_SCI# KSO12 50
KSO11/GPIO2B
SPI Flash ROM 126 EC_SPICS#/FSEL# EC_SPICLK 41
KSO13 51 SPICLK/GPIO58 EC_SPICS#/FSEL# 41
R685 1 2 10K_0402_5% KSO12/GPIO2C 128
KSO14 52 SPICS#
KSO15 KSO13/GPIO2D
53
KSO16 KSO14/GPIO2E
54
KSO15/GPIO2F CIR_RX/GPIO40 73 EC_PECI
PLT_RST_BUF# KSO17 81 74 FSTCHG H_PECI 5,18
R679 1 2 100K_0402_5% KSO16/GPIO48 CIR_RLC_TX/GPIO41 R355 1 2 43_0402_1%
FSTCHG 48
82
KSO17/GPIO49 89 BATT_GRN_LED#
FSTCHG/SELIO#/GPIO50 BATT_GRN_LED# 41
90
EC_SMB_CK1 BATT_CHGI_LED#/GPIO52
91 BATT_AMB_LED# C815
50 EC_SMB_CK1 EC_SMB_DA1 GPIO CAPS_LED#/GPIO53 BATT_AMB_LED# 41 R780
77
SCL1/GPIO44 92 PWR_LED EC_SPICLK
50 EC_SMB_DA1 EC_SMB_CK2 BATT_LOW_LED#/GPIO54 SYSON PWR_LED 41 1 2
78 93 1 2
14,22 EC_SMB_CK2 SDA1/GPIO45 SM Bus SUSP_LED#/GPIO55 SYSON 39,44,46,51 @
EC_SMB_DA2 79
SCL2/GPIO46 SYSON/GPIO56 95 VR_ON @
14,22 EC_SMB_DA2 VR_ON 55
80
SDA2/GPIO47 121 EC_ACIN 22_0402_5% 0.01U_0402_16V7K
VR_ON/XCLK32K/GPIO57
127
AC_IN/GPIO59
PM_SLP_S3# PCH_RSMRST# For EMI request
B PCH_RSMRST# 15 B
15 PM_SLP_S3# PM_SLP_S5# 6
EC_SMI# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 100 EC_LID_OUT#
15 PM_SLP_S5# 14 EC_LID_OUT# 14
EC_XCLK1 18 EC_SMI# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 101 EC_ON
EC_XCLK0 EC_ON 41,49
EC_PME# 15 EC_SMI#/GPIO08 EC_ON/GPXO05 102 3S/4S#
35 EC_PME# MINI1_LED# 16 PCH_PWROK 3S/4S# 48
LID_SW#/GPIO0A EC_SWI#/GPXO06 103 BKOFF#
38 MINI1_LED# 17 PCH_PWROK 15
@1 SUSP#/GPIO0B 104
1 @ SUS_PWR_DN_ACK 18 GPO ICH_PWROK/GPXO06
105
BKOFF# 31
C723 C721 15 SUS_PWR_DN_ACK PBTN_OUT#/GPIO0C BKOFF#/GPXO08
19 GPIO 106
4
1
INVT_PWM
FAN_SPEED1 EC_PME#/GPIO0D WL_OFF#/GPXO09
15P_0402_50V8J 15P_0402_50V8J 43 FAN_SPEED1
25 EC_THERM#/GPIO11 GPXO10 107 SA_PGOOD SA_PGOOD 52
28
OSC
OSC
2 2 FAN_SPEED1/FANFB1/GPIO14 108
E51TXD_P80DATA 29 GPXO11
38 E51TXD_P80DATA E51RXD_P80CLK FANFB2/GPIO15
30 PM_SLP_S4#
38 E51RXD_P80CLK ON/OFF EC_TX/GPIO16 PM_SLP_S4# 15
@
31 EC_RX/GPIO17 110 ENBKL
NC
NC
41 ON/OFF PWR_SUSP_LED# 32 PM_SLP_S4#/GPXID1 EAPD ENBKL 16

41 PWR_SUSP_LED# WLAN_LED# ON_OFF/GPIO18 112 EAPD 42
34 ENBKL/GPXID2 VGATE
41 WLAN_LED# PWR_LED#/GPIO19 114 SUSP# VGATE 15,55
36 GPI GPXID3
3
2
115 PBTN_OUT#
2
NUMLED#/GPIO1A GPXID4 SUSP# 38,44,52,53
X1 116 PBTN_OUT# 15 R691
GPXID5
32.768KHZ_12.5PF_Q13MC14610002 EC_XCLK1 117 100K_0402_5%
GPXID6
EC_XCLK0 118 +V18R
GPXID7
15 SUSCLK 122
XCLK1 15mil
1
1 2 123 124
XCLK0 V18R
R697 0_0402_5%
AGND
1
11 GND
24 GND
GND
94 GND
C398
113 GND
4.7U_0603_6.3V6K
R769 2 1 100K_0402_5% KB930QF A1 LQFP 128P
20mil 2
35
69
ECAGND L23
Board ID 2 1
FBMA-L11-160808-800LMT_0603
+3VALW
Analog Board ID definition,
Please see page 3.
A A
2
Ra R354
100K_0402_5%
AD_BID0
11
1
R353 C454
Rb 18K_0402_5% 0.1U_0402_16V4Z
2
EC ENE-KB930
2
Custom 0.4
MAY BE USED3 BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 2
1 2 3 4 5 6 7 8
+3VALW 1 2 C722 1 2 0.1U_0402_16V4Z

R688 0_0603_5%
+3VALW
+SPI_VCC
U38
ON/OFF BTN
2
EC_SPICS#/FSEL# 1 8
40 EC_SPICS#/FSEL# SPI_WP# CE# VDD EC_SPICLK_R ON/OFFBTN#
R694 1 2 4.7K_0402_5% 3 6 R698 1 2 0_0402_5% EC_SPICLK 40 R144
WP# SCK EC_SO_SPI_SI_R
+3VALW R690 1 2 4.7K_0402_5%SPI_HOLD# 7 5 R699 1 2 0_0402_5% EC_SO_SPI_SI 40 100K_0402_5%
HOLD# SI EC_SI_SPI_SO_R R692 1
4
VSS SO
2 2 0_0402_5% EC_SI_SPI_SO 40
1
MX25L1005AMC-12G_SOP8
EC_SPICLK_R SW1 2
A ON/OFF 40 A
JKB1 SMT1-05-A_4P
1 3 1
KSO0
2
1 1
KSO1 2 4 3 51ON#
2 2 51ON# 47
KSO2
3 @
KSO3 3
4 0_0402_5% R695 D6
6
5
KSO4 4 CHN202UPT_SC70-3
KSO5 5 KSI[0..7]
5
1
KSO6 6 KSI[0..7] 40
6
1
@ D
KSO7 7 KSO[0..17]
7 C727 EC_ON Q7
8 KSO[0..17] 40 40,49 EC_ON 2
KSO8 8 33P_0402_50V8K G SSM3K7002F_SC59-3
KSO9 9 9
2
10 S
3
KSO10 10
KSO11 11 R104
11
KSO12 12 12
KSO13 13 10K_0402_5%
13
KSO14 14 14
1
KSO15
KSO16
KSO17
15
16
17
15
16
17
KB Conn.
KSI0 18 18
KSI1 19
19
KSI2 20
20
KSI3 21
21
KSI4
KSI5
KSI6
22
23
24
22
23
24
PWR/B
KSI7 25 27
25 G1 JPWR1
26 28
26 G2 1 +3VALW
1 LID_SW#
2 LID_SW# 40
EMI request 2
ACES_85201-26051 +3VS 3
3
B CONN@ 4 B
R03 modify 4
+3VS 5 +3VS
5 PWR_LED#
1
KSO16 6 6
C261 1 2 100P_0402_50V8J ON/OFFBTN#
R807 7
7
KSO17 10K_0402_5% 8 8
C262 1 2 100P_0402_50V8J 9
GND
KSO15 KSO7 10
GND
2
C260 1 2 100P_0402_50V8J C252 1 2 100P_0402_50V8J
5
U8 ACES_85201-0805N
KSO14 C259 1 100P_0402_50V8J KSO6
2 C251 1 2 100P_0402_50V8J 2 CR_5IN1_LED# 35 CONN@
P
MEDIA_LED# B
KSO13 KSO5 4
C258 1 100P_0402_50V8J Y PCH_SATALED# 13
2 C250 1 2 100P_0402_50V8J 1
A
G
KSO12 KSO4
C257 1 100P_0402_50V8J C249 1 100P_0402_50V8J MC74VHC1G08DFT2G_SC70-5
2 2
3
KSI0 KSO3
C263 1 2 100P_0402_50V8J C248 1 2 100P_0402_50V8J
KSO11 C256 1 100P_0402_50V8J KSI4 LED7
2
C267 1 2 100P_0402_50V8J HT-191NB5_BLUE
KSO10
KSI1
C255 1
C264 1
2
2
100P_0402_50V8J
100P_0402_50V8J
KSO2
KSO1
C247 1
C246 1
2
2
100P_0402_50V8J
100P_0402_50V8J
+3VS 1
R380
2
499_0402_1%
2
B
1
MEDIA_LED# R05 modify
+5VS TP Conn.
KSI2 KSO0 LED3
C265 1 2 100P_0402_50V8J C245 1 2 100P_0402_50V8J HT-191NB5_BLUE 1 1
KSO9 KSI5 C268 1 100P_0402_50V8J 2 2 TP_CLK 40
2
C254 1 2 100P_0402_50V8J 2 1 3 3 LEFT_BTN# TP_DATA 40
KSI3 KSI6 B 4 4 RIGHT_BTN#
C266 1 2 100P_0402_50V8J C269 1 100P_0402_50V8J 5 5
2
KSO8 C253 1 2 100P_0402_50V8J KSI7 6 6
7 GND
C270 1 2 100P_0402_50V8J LED8 1 1
C 8 GND C
HT-191NB5_BLUE
WWAN_LED# JTP1 C217 C216
+3VS WWAN_LED# 40 @ @
1 2 2 1 CONN@ 2 2
R381 330_0402_5% B ACES_85201-0605N 100P_0402_50V8J 100P_0402_50V8J
TP_CLK LEFT_BTN#
EC Request LED4
LED5 WLAN_LED# TP_DATA RIGHT_BTN#
PWR_LED# +3VS 1 2 2 1 WLAN_LED# 40
+3VALW
1 2 R377 931_0402_1% A
2 1
R374 390_0402_5% B +5VS
3
HT-191UD5_AMBER D4 D3
HT-191NB5_BLUE 1 PJDLC05C_SOT23-3 PJDLC05C_SOT23-3
LED1 C196
PWR_SUSP_LED#
+3VALW 1 2 PWR_SUSP_LED# 40 0.1U_0402_16V4Z
R378 2
820_0402_5% 1 LED6
A 2
BATT_GRN_LED#
+3VALW 1 2 2 1 BATT_GRN_LED# 40
HT-191UD5_AMBER R379 390_0402_5% B
1
HT-191NB5_BLUE
SW2
SW3
SMT1-05-A_4P
PWR_LED# LED2 LEFT_BTN# RIGHT_BTN# SMT1-05-A_4P
3 1
BATT_AMB_LED# 3 1
1 2 BATT_AMB_LED# 40
2 1 4 2
R376 820_0402_5% A 4 2
5
6
1
D HT-191UD5_AMBER
5
6
40 PWR_LED
2 Q32
D G D
SSM3K7002F_SC59-3
2
S
3
R512
100K_0402_5%
1

BIOS, I/O Port & K/B Connector
Custom
1 2 3 4 5 6 Date:
7 Wednesday, October 27, 2010 Sheet 8 41 of 61
5 4 3 2 1
1 2
R711 0_0805_5% +VDDA
+5VS
60mil 1
U40
40mil Int. Speaker Conn.
IN
1 OUT 5 +VDDA
1
C737 2 GND
4.75V +3VS
R712 20mil JSPK1
0.1U_0402_16V4Z 3 4 1 2 10K_0402_5% SPKR+ R46 1 2 0_0603_5% SPK_R+ 1
2 SHDN BYP SPKR- SPK_R- 1
C741 R47 1 2 0_0603_5% 2
G9191-475T1U_SOT23-5 2
0.01U_0402_16V7K
3
2
@ @ 1 2
1
C739 1U_0402_6.3V6K D2 3
1
D30 G1
(output = 300 mA) CH751H-40PT_SOD323-2
R725
R728
PJDLC05C_SOT23-3 4
G2
D 10K_0402_5% 10K_0402_5% ACES_88266-02001 D
CONN@
2
SM010014520 3000ma 220ohm@100mhz DCR 0.04 +PVDD_HDA C766
2
MONO_IN
1 2
1U_0402_6.3V6K
1
+PVDD_HDA
1
+VDDA L46 2 1 0.1U_0402_16V4Z C
FBMA-L11-201209-221LMA30T_0805 R723
@
1 1 20mil 40 BEEP# C759 1 2 1 2 2 1
R729
2
C748 B Q44
C745 1U_0402_6.3V6K 560_0402_5% E 2.4K_0402_1%
SPKL+
20mil SPK_L+
JSPK2
3
10U_0805_10V4Z 2SC2411K_SOT23-3 R8 1 2 0_0603_5% 1
2
2 R724 SPKL- R7 SPK_L- 1
@ 2 13 PCH_SPKR C771 1 21 2 1 2 0_0603_5% 2
R713 2
0_0603_5%
1
560_0402_5%
1U_0402_6.3V6K
3
Place near Pin46 D29 3 G1
D1 4
1
CH751H-40PT_SOD323-2 G2
SM010014520 3000ma 220ohm@100mhz DCR 0.04 PJDLC05C_SOT23-3
ACES_88266-02001
2
CONN@
+PVDD1_HDA
+VDDA L50 2 1
FBMA-L11-201209-221LMA30T_0805 1
0.1U_0402_16V4Z
1 20mil HD Audio Codec
C749
C750
1
10U_0805_10V4Z
2
2
SM010030010 200ma 120ohm@100mhz DCR 0.2
Singatron 2SJ2326
Place near Pin39 DC021007151
SM010030010 200ma 120ohm@100mhz DCR 0.2
10mil +3VS_DVDD
+3VS
+AVDD_HDA 10U_0603_6.3V6M
L48 2 1
BLM18AG121SN1D_0603
L51 2 1 0.1U_0402_16V4Z
10mil 1 1 1 C751
2
2 Headphone Out
+VDDA C754 C761 C753 C747
BLM18AG121SN1D_0603 1 JHP1
1 330P_0402_50V7K COM_MIC
1 0.1U_0402_16V4Z 3
C772 2 1 330P_0402_50V7K
C C752 2 2 FBMA-L11-160808-800LMT_0603 1 6 C
C756
0.1U_0402_16V4Z HP_LEFT L49 HPOUT_L_2
10U_0805_10V4Z
2
2 2 Place near Pin1, 9 R716 1 2 75_0603_5% HPOUT_L_1 1
1 2
0.1U_0402_16V4Z HP_RIGHT HPOUT_R_1 L47 HPOUT_R_2
25
38
46
39
R714 1 2 75_0603_5% 1 2 2
9
Place near Pin25, 38 U41 FBMA-L11-160808-800LMT_0603 4
DVDD
DVDD_IO
AVDD1
AVDD2
PVDD2
LINE2_C_L
14 PVDD1 HP_PLUG#
INT_MIC_R INT_MIC LINE2_L 5
Internal MIC 2 1 C770 1 2
LINE2_C_R
R726 1K_0402_5%
C769 1 2
4.7U_0603_6.3V6K 15
LINE2_R 35mA SPKL+
MIC2_C_L
4.7U_0603_6.3V6K 68mA 600mA SPK_OUT_L+ 40
SINGA_2SJ2326-001111
COM_MIC COM_MIC_R C765 1 2 16 MIC2_L
Combo MIC 4.7U_0603_6.3V6K +MIC2_VREFO CONN@
2 1 MIC2_C_R SPKL-
C764 1 2 17 41
R719 1K_0402_5% MIC2_R SPK_OUT_L-
4.7U_0603_6.3V6K SPKR+
23 45
1
LINE1_L SPK_OUT_R+
MIC2JD R722
24 SPKR- MIC_PLUG#
LINE1_R 2.2K_0402_5%
MIC1_L MIC1_C_L SPK_OUT_R- 44
C763 1 2 21
External MIC MIC1_L HP_LEFT HP_PLUG#
4.7U_0603_6.3V6K
1
MIC1_R MIC1_C_R 32 D
2
HPOUT_L COM_MIC
C762 1 2 22 MIC1_R HP_RIGHT 2
2
3
4.7U_0603_6.3V6K 33 Q43 G 1 2 +MIC1_VREFO
35
HPOUT_R
HDA_SDIN0_AUDIO R720R03 modify D28
CBN BSS138_NL_SOT23-3 S 1
HDA_SDIN0 13
2
22K_0402_5%
3
1 8
SDATA_IN C746 PJDLC05C_SOT23-3
1 R721 2 R791
C755 33_0402_5%
HDA_SDOUT_AUDIO 13
36 5 10U_0805_10V4Z 22K_0402_5%
2.2U_0402_6.3V6M CBP SDATA_OUT
2 2
Combo MIC +MIC2_VREFO HDA_SYNC_AUDIO 13
2
2
29 MIC2_VREFO 10
10mil SYNC
1
D26 D27
11 HDA_RST_AUDIO# 13
Internal MIC RESET# CH751H-40PT_SOD323-2 CH751H-40PT_SOD323-2
1
30
10mil MIC1_VREFO_R HDA_BITCLK_AUDIO 13
6
External MIC +MIC1_VREFO BCLK
1
1
31 @
10mil MIC1_VREFO_L
B +INTMIC_VREFO B
1
1 2 C757 For EMI
22P_0402_50V8J
C760 1 2
28
1
R717
@ 2
0_0402_5%
R705 R708 MIC JACK
10U_0805_10V4Z LDD_CAP 4.7K_0402_5% 4.7K_0402_5%
GPIO0/DMIC_DATA 2 JMIC1
2
FBMA-L11-160808-800LMT_0603 1
3 MIC1_L MIC1_L_1 MIC1_L_R
R730 GPIO1/DMIC_CLK L45 2
19
2 1 JDREF EC_MUTE# 40 MIC1_R MIC1_R_1 1 2 MIC1_R_R
4 1 2
20K_0402_1% PD# R707 1K_0603_5% 3
L44
1 2 1 2
3
MONO_IN R706 1K_0603_5% 4
HP_PLUG# C758 FBMA-L11-160808-800LMT_0603
12 MIC_PLUG#
MIC_PLUG# 2 1 1 SENSE_A 10mil 34
2 2.2U_0402_6.3V6M CPVEE PCBEEP 1 5
R731 39.2K_0402_1% MIC2JD SENSE_B 1 C733
13 SENSE A 20
2 1 1 2 MONO_OUT C732
18 SENSE B 37 220P_0402_50V7K
R727 40 20K_0402_1%
EAPD R718 20K_0402_1% AVSS2 CODEC_VREF
47 EAPD 220P_0402_50V7K 2 6
1 2 27 C767 1 2 0.1U_0402_16V4Z 2
R715 0_0402_5% 48
VREF 10mil D25
SINGA_2SJ-A960-C01
SPDIFO C768 1 PJDLC05C_SOT23-3
2 10U_0805_10V4Z
1
Place next pin27 CONN@
7 26 @
DVSS AVSS1 R03 modify
PVSS2 43
49 42
GND PVSS1 +INTMIC_VREFO
ALC271X-GR_QFN48_7X7
DGND AGND
SM010004010 300ma 70ohm@100mhz DCR 0.3
INT_MIC_L
For EMI
Int. MIC
1
R394
15mil
10K_0402_5% 15mil
INT_MIC_R L24 INT_MIC_L
3
1 2 JMIC2
1
2
D16 FBMA-L11-160808-800LMT_0603 1
1 2
A C500 2 A
@
220P_0402_50V7K 3
2 G1
PJDLC05C_SOT23-3 4
G2
PJ1 PJ2 ACES_88266-02001
@ JUMP_43X39 @ JUMP_43X39
1
CONN@
1 1
2 2 1 1
2 2
PJ3
@ JUMP_43X39
PJ4
@ JUMP_43X39
1 1 Issued Date 2010/10/15 Deciphered Date 2011/10/15 Title
1 1
2 2 PJ6 2 2
PJ5
@ JUMP_43X39 @ JUMP_43X39 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HD Audio Codec ALC271X
1 1 Size Document Number Rev
1 1
2 2 2 2 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
GND GNDA GND GNDA
5 4 3 2
FAN Stand-Off JUSB3 Stand-Off
H1 H2 H3 H4 H5 H6 H7
H_3P4 H_3P4 H_3P4 H_3P4 H_3P4 H_3P4 H_3P4
@ @ @ @ @ @ @
1
1
1
1
1
1
H8 H9 H10 H11 H12 H13 H14 H15 H16 H17 H18
H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0
@ @ @ @ @ @ @ @ @ @ @
1
1
1
1
1
1
1
1
1
1
1
H19 H20
H_4P0 H_4P0
FAN1 Conn @ @
1
1
+5VS
C580 10U_0805_10V4Z
1 2
U30 H21 H22 H23 H24

1 8 H_4P2 H_4P2 H_4P2 H_4P2
EN GND
2 VIN 7
+VCC_FAN1 GND
3 VOUT 6
GND
40 EN_DFAN1 2 1 4 5 @ @ @ @
1
1
VSET GND
1
1
R509 300_0402_5%
1 APL5607KI-TRG_SO8
C598 C585
0.1U_0402_16V4Z 10U_0805_10V4Z
2 H25 H26
1 2 H27
H_7P0N H_3P0N H_3P5X3P0N
+3VS C587
1000P_0402_50V7K
1 2 @ @ @
1
1
1
1
R489
10K_0402_5%
40mil
JFAN1
2
+VCC_FAN1
1
40 FAN_SPEED1 2
3
1
C579 ACES_85205-03001
1000P_0402_50V7K CONN@
2
FD1 FD3 FD2 FD4
@ @ @ @
1
1
1
1
FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80

FAN & Screw Hole
Custom
A B C D E
+5VALW
+1.5V to +1.5VS
+5VALW TO +5VS
2
+1.5V +1.5VS
U12 R246
+5VALW AO4430L_SO8 100K_0402_5%
U22 +5VS 8 1
DMN3030LSS-13_SOP8L-8 7 2 1 1
1
2
1 1
10U_0805_10V4Z
C375
0.1U_0402_16V4Z
C376
0.1U_0402_16V4Z
C377
SUSP
10U_0805_10V4Z
C374
1U_0603_10V6K
C338
10U_0805_10V4Z
C339
8 1 6 3 38,52,53 SUSP
7 2 1 1 1 1 5 R245
2
6 3 1 1 470_0603_5%
6
2 2
1U_0603_10V6K
C469
10U_0805_10V4Z
C468
1 1 5 R382
4
10U_0805_10V4Z
C465
10U_0805_10V4Z
C464 470_0603_5%
1
2 2 2 2 Q27A
4
2 2 2 DMN66D0LDW-7_SOT363-6
38,40,52,53 SUSP#
6
2 2
1
6
20mil 10mil 1.5VS_GATE
Q15A R251
+VSB 2 1 DMN66D0LDW-7_SOT363-6 2SUSP 10K_0402_5%
20mil 10mil R269
+VSB 2 1 5VS_GATE 2 SUSP 200K_0402_5% 1
2
1
R372 @ C380
510K_0402_5%
R268
20K_0402_1% 1 Q19A 0.1U_0603_25V7K
1
3
C470 DMN66D0LDW-7_SOT363-6
0.1U_0603_25V7K 2
SUSP 5
2
SUSP 2
5
Q15B
4
Q19B DMN66D0LDW-7_SOT363-6
4
1
D
ACIN 2 Q21
15,22,40,45,48 ACIN
G @
S SSM3K7002F_SC59-3
3
+5VALW
2 2
2
R383
100K_0402_5%
1
+3VALW TO +3VS 39,46 SYSON#
+3VALW +3VS
3
U21
DMN3030LSS-13_SOP8L-8 +3VALW TO +3VALW_PCH(PCH AUX Power)
8 1 Q27B
7 2 SYSON 5
39,40,46,51 SYSON
2
10U_0805_10V4Z
C460
10U_0805_10V4Z
C459
1 1 6 3 DMN66D0LDW-7_SOT363-6
1 1
R369
1U_0603_10V6K
C458
1
10U_0805_10V4Z
C461
4
470_0603_5% +3VALW +3VALW_PCH
R614 R373
40mil
4
2 2 2 100K_0402_5%
2 2 1
6 1
2
10U_0805_10V4Z
C701
0_0805_5%
R368 10mil
20mil 47K_0402_5% 3VS_GATE SUSP
+VSB 2 2
2 1
Q25A
1
1
3
C463
0.1U_0603_25V7K
SUSP 2
5
3 3
Q25B
4
+5VALW TO +5VALW_PCH(PCH AUX Power)
+5VALW +5VALW_PCH
R197
1 2
0_0603_5%
+0.75VS +1.05VS_VTT +1.8VS +1.5V

2
1
2
2
R366 R29 @ R365

22_0603_5% 470_0603_5% R508
470_0603_5% 470_0603_5%
4 4
1
2
Q24
11
1 1
D @
1
D
1
D Q5 D SYSON#
Q23 SUSP SUSP Q34SUSP 2
2 2 2 G
G G G S SSM3K7002F_SC59-3
3
S SSM3K7002F_SC59-3 S SSM3K7002F_SC59-3 S SSM3K7002F_SC59-3

3
3

DC Interface
Custom
A B C D E
A B C D E
+1.05VS_VTT to +1.05VSDGPU for GPU

+1.05VS_VTT +1.05VSDGPU
U25
AO4430L_SO8
1
8 1 R03 modify 4A 1
1 7 2
DIS@ 6 3 1
2
C513 5 1 DIS@ 1
10U_0805_10V4Z
C498
10U_0805_10V4Z DIS@ R406
2 +
1U_0603_10V6K
C499
C825 470_0603_5%
4
DIS@ DIS@ 2 DIS@ +1.8VSDGPU
220U_B2_2.5VM_R35 2
6 1
2
20mil DIS@ R409 10mil

510K_0402_5%
1.05VSDGPU_GATE 2 VGA_ON#
+VSB 2 1
DIS@ Q29A
1
1
3
1
510K_0402_5%
@ C530 DMN66D0LDW-7_SOT363-6
R410
DIS@
0.1U_0603_25V7K
VGA_ON# 5 2
2
DIS@ Q29B
4
1
D
ACIN 2 Q30
15,22,40,44,48 ACIN
G
S SSM3K7002F_SC59-3 R140 2 1 VGA_ON
14,17 DGPU_PWR_EN
3
@ 0_0402_5% DIS@
2 2
+5VALW
2
DIS@
R134
100K_0402_5%
2009/08/17 add VGA_ON#
1
VGA_ON#
54 VGA_ON#
1
D
+1.5VSDGPUH to +1.5VSDGPU for GPU 51,54 VGA_ON 2 Q8
G SSM3K7002F_SC59-3
+1.5VSDGPUH +1.5VSDGPU
+3VS to +3VSDGPU for GPU S
3
U2 R135
R03 modify 20mil AO4430L_SO8 R03 modify DIS@
+3VS
8 1 22K_0402_5%
7 2 1
2
DIS@ 1 DIS@
2
1 1 6 3 +3VSDGPU
C823
10U_0805_10V4Z
C13
C824 5 R26 @
1
0.1U_0402_10V7K 1 1
1U_0402_6.3V6K 1 470_0603_5% R507
1U_0603_10V6K
C12
2 2 DIS@ 1 0_0805_5%
2 2
4
+ DIS@ + DIS@ DIS@

C818 C819 C7 DIS@ 1 2
1
2 DIS@ 2 DIS@ 2 DIS@ C602
330U_2.5V_M_R15
C514
10U_0805_10V4Z 10U_0805_10V4Z
10U_0805_10V4Z 10U_0805_10V4Z
2
2 2
220U_B2_2.5VM_R35
C826
6
3 1
+3VALW
10mil 1.5VSDGPU_GATE VGA_ON#
Q33 100mil(1.5A)
+VSB 2 1 2 DIS@
1
3 3
R27 Q3A
DIS@ AP2301GN-HF_SOT23-3
2
510K_0402_5% 1 DIS@ DIS@
2
1
1
3
R515 1
510K_0402_5%
DIS@ C29 DMN66D0LDW-7_SOT363-6 R511

100K_0402_5% DIS@
R28
DIS@ 470_0603_5%
0.1U_0603_25V7K 3VSdelay_gate C590
@
2
VGA_ON# 2 10U_0805_10V4Z
5 DIS@ 2
6 1
DIS@
2
DIS@ Q3B 1 2
R519 Q35A
4
DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6
1K_0402_5%
3
1
D DIS@
ACIN 3VSdelay_gate
2 Q4 R514 DIS@ 2
G SSM3K7002F_SC59-3 1K_0402_5%
R03 modify VGA_ON DMN66D0LDW-7_SOT363-6 1 DIS@
S @ 1 2 5 C612
3
1
Q35B
1 0.1U_0603_25V7K
+1.5VSDGPUH
4
DIS@ 2
C603
0.1U_0603_25V7K 2
1 ME interefer,not pop!! @ PJ28
+ 2 1
2 1
C817 JUMP_43X118 R03 modify
220U_B2_2.5VM_R35
2 @
+1.5V @ PJ27 +1.5VSDGPUH
2 1
2 1
JUMP_43X118 1 1
C821 C822
1U_0402_6.3V6K 0.1U_0402_10V7K
4 2 2 4

DC Interface
Custom
A B C D E
5 4 3 2 1
+3V_USB3.0 +1.05VR R02 modify R660 1 @ 2 0_0402_5%

+1.5V to +1.05V Transfer Close to U3.D7 Close to U3.P13 USB30@USB30@ USB30@ USB30@ USB30@
USB30@ USB30@ L42 USB30@
For EMI request
+5VALW +1.5V +5VALW +1.05V_USB3.0
C370
C367
C369
C695
C715
C697
C696
C396
C401
U3TXDN2_L U3TXDN2
C366
C368
C718
C716
C389
C717
U18 2 1 1
+3VA_USB3.0 +3VA_USB3.0 2
10U_0603_6.3V6M
1U_0603_10V6K
+1.5V
C402
C420
1 1 6 VCNTL USB30@ USB30@ U3TXDP2_L 3 U3TXDP2 R680 1 @ 2 0_0402_5%
5 VIN VOUT 3 1 11 1 1 1 1 1 1 1 1 1 1 11 3 4 4
9 4
+5VALW VIN VOUT
0.01U_0402_16V7K
C379
8P_0402_50V8D
0.1U_0402_10V7K
C397
8P_0402_50V8D
0.01U_0402_16V7K
C382
0.1U_0402_10V7K
C406
USB30@ 1 1 1 @ USB30@ 1 1 1 @ OCE2012120YZF_0805 L43 USB30@
2 SYSON U2DP2_L U2DP2
C386
2
C405
8 2 1 1
EN 2 22 2 2 2 2 2 2 2 2 2 22 2
10U_0603_6.3V6M
2 1 7 2 1 R325 2 2 R659 1 @ 2 0_0402_5%
GND
POK FB
0.01U_0402_16V7K
0.1U_0402_10V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
C419
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.1U_0402_10V7K
R327 5.1K_0402_1%
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.01U_0402_16V7K
USB30@ USB30@ 10K_0402_5% 1 2 2
1
USB30@ USB30@ 2 2 2 2 U2DN2_L 3 U2DN2
3 4 4
D APL5930KAI-TRG_SO8 R326 R658 1 @ 2 0_0402_5% D
1
USB30@ 32.4K_0402_1% WCM-2012-900T_0805
Vout=0.8(1+10K/32.4K) USB30@ 2 L41 USB30@
U3RXDN2_L U3RXDN2 R683 1 @
1.042 ~ 1.0469 ~ 1.0519V 2 2 0_0402_5%
1 1
2
2
Spec: 0.9975 ~ 1.05 ~ 1.1025
USB30@
USB30@ USB30@ USB30@U3RXDP2_L
USB30@ USB30@ USB30@
U3RXDP2
USB30@ 3
7K for customer request, can use other kind 3 4 4
R310 of capacitor, like Y5V. OCE2012120YZF_0805
+3VALW to +3V Transfer +3V_USB3.0
+1.05V_USB3.0
0_0805_5%
1 2
+1.05VR +3VA_USB3.0
+3V_USB3.0 +3VA_USB3.0 R657 1 @ 2 0_0402_5%
+3VALW +3V_USB3.0 L22
U19 BLM18AG601SN1D_2P For USB2.0 ESD request
U34
1 2
3 1 1
D10
H11
USB30@
E11
E12
K11
K12
F13
F14
SYSON
P13
L10
L13
L14
VIN VOUT
G3
G4
N4
N5
N6
C4
C5
C6
C7
D5
C8
C9
D8
D9
H3
H4
P3
E3
E4
D7
F3
L9
C422
L5
L8
39,40,44,51 SYSON 4 5
VIN/CE VOUT 10U_0805_10V4Z
USB30@ D24
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
2
U3AVDO33
U2AVDD10
GND 2
1
RT9701-PB_SOT23-5 I/O1 I/O4 6
USB30@ +USB3_VCCA
14 CLK_PCIE_USB30_L B2 2 REF1 REF2 5
PECLKP C7050.1U_0402_10V7K U2DN2 U2DP2
14 CLK_PCIE_USB30_L# B1 PECLKN
SPEC Max:+3V---200mA;+1.05V---800mA U3TX_C_DP2 U3TXDP2_L
USB30@ 3
USB30@ PCIE_PRX_C_DTX_P5 B6 I/O2 I/O3 4
14 PCIE_PRX_DTX_P5 C699 1 PCIE_PRX_C_DTX_N5 D2 Idle mode:0.489W: U3TXDP2
U3TX_C_DN2
2 1
U3TXDN2_L
2 0.1U_0402_10V7K PETXP PJUSB208H_SOT23-6
14 PCIE_PRX_DTX_N5 C698 1 2 0.1U_0402_10V7K D1 PETXN +3V---43mA;+1.05V---328mA U3TXDN2 A6U2DN2_L 1 2 @
USB30@ U2DM2 N8 USB30@
14 PCIE_PTX_C_DRX_P5 F2 D3 mode:0.066W: U2DP2_L C7060.1U_0402_10V7K For ESD request
PERXP R03 modify
14 PCIE_PTX_C_DRX_N5 F1 P8U3RXDP2_L
PERXN +3V---5.4mA;+1.05V---45mA U2DP2
B8
U3RXDP2
U3RXDN2_L +3V_USB3.0 U3TXDP2 D34 U3TXDP2
A8
17,35,38,39,40 PLT_RST_BUF# U3RXDN2 1 10
C R606 1 USB30@2 0_0402_5% U3TXDN2 U3TXDN2 C
15,35,38,39 PCH_PCIE_WAKE# H2 OCI2B
R601 1 USB30@2 0_0402_5% PERSTB 2 9
USB30_CLKREQ#_L K1 PEWAKEB G14
OCI1B U3RXDP2 U3RXDP2
OD output 14 USB30_CLKREQ#_L K2 Can be attach to EC, either. OCI2B
H13
R307 1 USB30@2 10K_0402_5%
R308 1
+3V_USB3.0 R603 1 USB30@2 10K_0402_5% PECREQB OCI1B 2 10K_0402_5% 4 7U3RXDN2
USB30@ U3RXDN2
J2
+3V_USB3.0 @ R604 1 2 100_0402_1% AUXDET 5 6
SMI_R
R602 1 USB30@2 10K_0402_5% J1 H14
SMIB_R H1
PSEL PCI Express/ExpressCard select signal PPON2
J14
R605 1 @ 2 0_0402_5% SMI PPON1
18,39 SMIB P4 SMIB
1:others 3
R600 1 USB30@2 0_0402_5%
+3V_USB3.0
0:Express Card or Mini card 8
P5
R611 1 USB30@2 10K_0402_5% PONRSTB
B10
R03 modify
U3TXDP1 USB30@
1 1 2 2 SPI_CLK_USB
D21 M2 RCLAMP0524P.TCT~D
1U_0603_10V6K
SPI_CS_USB# SPISCK A10 R786

U3TXDN1
1SS355TE-17_SOD323-2 USB_SO_SPI_SI N2
C702
1 SPISCB U2DM1 N10 1 USB30@2 0_0402_5% +5VALW +USB3_VCCA

USB30@ USB_SI_SPI_SO N1 R787
SPISI
M1
SPISO U2DP1 P10 1 USB30@2 0_0402_5%
USB30@ B12
2 U3RXDP1 R788 W=60mils
U17
K13 A12 1 USB30@2 0_0402_5% C432
GND U3RXDN1 R789 1 8
K14 0.1U_0402_10V7K GND VOUT
GND 1 USB30@2 0_0402_5% 2 7
J13 1 2 VIN VOUT OCI2B
GND 39,44 SYSON# 3 6
VIN VOUT
EPAD
4 FLG 5 1 @ 2
R298 EN
As short as possible P12 1.6K_0402_1% 0_0402_5% R313
RREF
N12 1 2 AP2301MPG-13_MSOP8
U2AVSS
9
C14 USB30@
GND
+3V_USB3.0 N11 U2DN2
U2PVSS 17 USB20_N1
USB3_XT1 1 @ 2
+3V_USB3.0 D6 R687 0_0402_5%
USB3_XT2 U3AVSS USB20@ USB_OC1# 17
N14 XT1 L52 USB20@
M14 1 R314 2
XT2 2 2 1 1 0_0402_5%
B B
2
R03 modify
1
1 R704 @ R703 C417
C725 P6 3 3 4 @
10K_0402_5% 47K_0402_5% CSEL 4
0.1U_0402_10V7K USB30@ U2DP2 0.1U_0402_16V4Z
17 USB20_P1 WCM-2012-900T_0805
1
2
1
USB30@ +USB3_VCCA
2 SPI_CS_USB# GND P14 1 @ 2
U39 USB_SI_SPI_SO A1 P11 Resister overlap
R686 with 0_0402_5%
L52
GND GND
2
SPI_CLK_USB 8 1 USB30@ A2 GND P9

GND
2
USB_SO_SPI_SI VCC CS# A3 P7

0_0402_5%
R628
7 2 GND GND
NC SO
0_0402_5%
R634
6 3 A4 GND P2
SCLK WP# GND
A5 P1
150U_B2_6.3VM_R35M
C390
5 4 @ GND GND 1
SI GND A7 N13
GND GND
1
MX25L5121EMC-20G_SO8 A9 N9 + 2
GND
470P_0402_50V7K
C391
GND
1
USB30@ A11 N7
GND GND R03 modify
USB3_XT1 A13 N3
GND GND
USB3_XT2 A14 M13 2 1
GND GND
+3V_USB3.0 B3 M12 +USB3_VCCA
GND GND
B4 M11
GND GND
B5 M10
1
GND GND JUSB5

B7 M9 U2DN2
R665 GND GND 1
B9 M8 U2DP2 VCC
100_0402_1% GND GND 2
B11 M7 D-
USB30@ GND GND 3
B13 M6 D+
GND GND 4
B14
2
M5 GND
Place as close as C1
GND GND
M4
Y5 GND GND 5
1 2
possibile to C2
GND GND
M3
6
GND1
C3 L12 GND2
U3.N14 and U3.M14 C10
GND GND
L11
7
GND3
24MHZ_12PF_X5H024000DC1H
1 GND GND 8
C709 C11 L7 GND4
USB30@ GND GND
12P_0402_50V8J L6 SUYIN_020173GB004M25MZL
1 GND
A C707 USB30@ CONN@ A
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2
12P_0402_50V8J
USB30@
USB2.0 Conn
2 PN: SP060004B00
C12
C13
D3
D4
D11
D12
D13
D14
E1
E2
E13
E14
G1
G2
G6
G7
G8
G13
G11
H6
G12
G9
F4
F6
F7
F8
F9
F11
F12
H7
H8
H9
H12
J3
J4
J6
J7
J8
J9
J11
J12
K3
K4
L1
L2
L3
L4
Pin compare table for support USB remote wakeup or not
AUXDET(Pin J2) CSEL(Pin P6) CLK

UPD720200AF1-DAP-A_FBGA176~DSecurity Classification Compal Secret Data
USB30@
Support USB pull high Tied to GND Must use 24MHz crystal: mount Issued Date 2010/10/15 Deciphered Date 2011/10/15 Title
remote wakeup 10k to VDD33 Y1,R19,C40,C41
USB3.0 PD720200
Not support USB Tied to GND pull high Can use either 48MHz or 24MHz When DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.4
remote wakeup to VDD33 use 48MHz clock: mount R22,R25 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2 1
5 4 3 2 1
@ PJP1
ACES_50305-00441-001
PL1
SMB3025500YA_2P
VIN @ PJ7
1 2 +3VALWP 2 1 +3VALW
1 2 1
2
JUMP_43X118
3
4
GND
1
1
1
GND PC1 PC2 PC3 PC4
1000P_0402_50V7K 100P_0402_50V8J 100P_0402_50V8J 1000P_0402_50V7K
2
2
2
@ PJ9 @ PJ10
+5VALWP 2 1 +5VALW +VCCSAP 2 1 +VCCSA
D 2 1 2 1 D
JUMP_43X118 JUMP_43X118
@ PJ30
1 2
1 2
JUMP_43X39
2
PD9
PJSOT24CH_SOT23-3
VIN @ PJ12
+1.8VSP 2 1 +1.8VS
2 1
1
2
PD1 JUMP_43X118
LL4148_LL34-2
1
PD2 @ PJ14
LL4148_LL34-2 2 1
2 1
BATT+ 2 1
1
1
JUMP_43X118
PR1 PR2
68_1206_5% 68_1206_5% @ PJ15 @ PJ16
VS +1.5VP +1.5V
PQ1 2 1 +VSBP 1 2 +VSB
2 1 1 2
TP0610K-T1-E3_SOT23-3
2
2
N1
3 1
0.22U_0603_25V7K
1
@ PJ17 @ PJ18
1
C
PR3 1 PC6 2 2 1 1 2 1 C
2 1
PC5
100K_0402_5% 0.1U_0603_25V7K
2
2
2
@ PJ19 @ PJ20
1 2 +1.05VS_VCCPP +1.05VS_VTT +VGFX_COREP 2 1 +VGFX_CORE
41 51ON# 2 1 2 1
2 1
PR4 JUMP_43X118 JUMP_43X118
22K_0402_5%
@ PJ26
2 1
2 1
JUMP_43X118
@ PJ25
+1.5VSDGPUP +1.5VSDGPU
2 1 1
2
JUMP_43X118
PreCHG PQ2
VIN PR7 LL4148_LL34-2 TP0610K-T1-E3_SOT23-3
B+
1K_1206_5% PD3
+CHGRTC 3 1
1 PR5 2 +3VLP 1 2 2 1
0_0603_5%
PR8 100K_0402_5%
100K_0402_5%
1K_1206_5%
1
1
PR9
1 2 PR10
PR11
1K_1206_5%
2
1 2
2
B B
PR12
1
1K_1206_5%
1 2 PR13
12 100K_0402_5%
1
40,48 ACOFF
2
PD4
2
- PBJ1
+ +RTCBATT
1 2
49 +5VALWP 3 +RTCBATT
PQ4 2 1 1 PR252 2 1 PR253 2
BAS40CW_SOT323-3 PDTC115EU_SOT323-3
PQ3
560_0603_5% 560_0603_5%
PDTC115EU_SOT323-3
3
3
@ @
ML1220T13RE
@
A A

PWR DCIN / Pre-charge
Custom
5 4 3 2 1
A B C D
PC181 and PC182 reserve for EMI Isen solution PQ5

Iada=0~4.74A(90W/19V=4.736A) ADP_I = 19.9*Iadapter*Rsense CP = 85%*Iada ; CP = 4.07A AO4407A_SO8
1 8
2 7
3 6
P2 P3 B+ CHG_B+ 5
PQ6 PQ7 PR14 0.02_2512_1% PL22
AO4407A_SO8 AO4407A_SO8 1.2UH_1127AS-1R2N_2.4A_30%
4
VIN 8 1 1 8 1 4 1 2 B+
7 2 2 7 PR16
6 3 3 6 2 3 CSIN 47K_0402_1%
5 5 1 2
VIN
CSIP
10U_0805_25V6K
10U_1206_25V6M
10U_1206_25V6M
0.1U_0603_25V7K
2200P_0402_25V7K
10U_0805_25V6K
5600P_0402_25V7K
1
VIN PreCHG 1
4
4
1
1
1
2
1
1
PC182
PC8
PC9
PC181
2
V1
PC10
PR15
PC11
PC7
10K_0402_1%
2
2
1
2
2
1
1
PR18
1
2
191K_0402_1%
0.1U_0603_25V7K
2
1
PR19 PR17 PR21
1
6251VDD
PC12
200K_0402_1% 200K_0402_1% 100K_0402_5%
2
PD5
2
RB751V-40_SOD323-2 ACSETIN
1000P_0402_25V8J
2.2U_0603_6.3V6K
2
1
1
PC13
10_1206_5% 1
1
3
1
1
PC14
47K
PR22
PR23
14.3K_0402_1%
2200P_0402_50V7K
2
2
47K
PR24
1
D
2
0_0402_5% PQ9
ACPRN
1
PU1 PDTC115EU_SOT323-3 2
PC17
40 FSTCHG 2 1
1
PC15 G
V1
DCIN S
PQ8 1 24 2 1
3
1
1
VDD DCIN
2
1
PR25 47K_0402_5% PQ12
100K_0402_1%
PDTA144EU_SOT323-3 6251VDD 1 2 0.1U_0603_25V7K 2N7002W -T/R7_SOT323-3
PR27 ACSETIN
PR26
2 23 ACPRN 49
1
2 150K_0402_1% ACSET ACPRN
PQ13 PR28
2
6251_EN 20_0402_5% CSON
2
PDTC115EU_SOT323-3
6
D PQ10 3 22 1 2
2
EN CSON PC18
2 PDTC115EU_SOT323-3
6
5
7
8
3
G 40 3S/4S# 2 0.047U_0402_16V7K
1 2 CSOP PQ15
4 21
1
CELLS CSOP PR29 AO4466L_SO8
S 20_0402_5%
1
PQ14A PC19 6800P_0402_25V7K

2 PQ14B 2
3 1 2 2 1
2
DMN66D0LDW -7_SOT363-6 DMN66D0LDW -7_SOT363-6 5 ICOMP 20
CSIN
3
D PR30 4
PC21
5 PC20
1
PR31
2 0.1U_0603_25V7K
1
20_0402_5%
2 TCR=50ppm / C
<40,41>
1
G 1 2 6 VCOMP CSIP 19 PR32
0.01U_0402_25V7K
10K_0402_1%
LX_CHG
2_0402_5% PL2
10UH_PCMB104T-100MS_6A_20%
CHG
BATT+
1
2
3
S 40,50 ADP_I
4
1 2 7 18 1 2 1 4 PR34
PR33 100_0402_1% ICM PHASE 0.02_1206_1%
6
5
7
8
1 2
1
6251VREF DH_CHG 2 3
4.7_1206_5%
PR38
8 17
PR35
47K_0402_5% PC22 .1U_0402_16V7K VREF UGATE PR37 PC23
PACIN PR36
1 2 0_0603_5%
10U_1206_25V6M
0.1U_0603_25V7K
10U_1206_25V6M
80.6K_0402_1% BST_CHG BST_CHGA
40 IREF 2 1 1 2 2 1
9
1
16 @
0.01U_0402_25V7K
CHLIM BOOT
2
1
4
1
1
PD8
1
PC25
PC26
6251VREF PR40 6251aclim 6251VDDP
PC24
1
PR39 RB751V-40_SOD323-2
680P_0402_50V7K
1 2 10 15
100K_0402_1% ACLIM VDDP
PC27
2
6251VDD
2
20K_0402_1%
1
12.1K_0402_1% 1 2
2
ACOFF DL_CHG
2.55K_0402_1%
2
1
2
3
40,47 ACOFF 2 @
2
2
11 14
PR43
VADJ LGATE PR41
PR42
4.7_0603_5% PQ16
PC28
1
12 13 4.7U_0603_6.3V6M
AO4466L_SO8
1 2
PQ17 GND PGND

2
3
PDTC115EU_SOT323-3 D
40,50 65W/90W# 2 ISL6251AHAZ-T_QSOP24
G
PQ18 S
3
2N7002W -T/R7_SOT323-3
CP mode 1 2
3
40 CALIBRATE# PR44
3
Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05) 15.4K_0402_1%
where Vaclm=1.502V, Iinput=4.07A
2
PR45
31.6K_0402_1%
6251VDD
Charging Voltage
BATT Type CV mode CC=0.6~4.48A
1
(0x15) PR48
1
IREF=0.7224*Icharge 10K_0402_1% ACIN 15,22,40,44,45
1
PR46 1 2
PR47
Normal 3S LI-ON Cells 47K_0402_5%
10K_0402_1%
12600mV 12.60V IREF=0.43V~3.24V
2
PACIN
1
Ki
Vchlim=Iref*(PR374/(PR372+PR374)) PR49
1
=Iref*(100K/(80.6K+100K)) 14.3K_0402_1%
=Iref*0.5537
ACPRN
2
Ichanrge=(165mV/PR369)*(Vchlim/3.3V)
=(165m/20m)*(1/3.3V)*Iref*0.5537 2
=1.3842*Iref
Iref=0.7224*Ichanrge =>Ki=0.7224
PQ19
PDTC115EU_SOT323-3
3
4
Kv 4
Rinternal ic=514K Rec=3K R1=PR379=15.4K R2=PR381=31.6K

R=514K//31.6K//(15.4K+3k)=11.372K
r=514K//514K//31.6K=28.14K
Vcell=0.175*Vadj+3.99v
4.2V=0.175*Vadj+3.99V =>Vadj=1.2V
Vadj=Vref*(R/(R+514K))+CALIBRATE*(r/(r=514K))
1.1483=CALIBRATE*0.6046 =>CALIBRATE=1.899 Security Classification Compal Secret Data Compal Electronics, Inc.
1.899=(4.2-(Vcell+A*0.175))*Kv=(4.2-(4.2+A*0.175))*Kv Issued Date 2010/10/15 Deciphered Date 2011/10/15 Title
A=Vref*(R/(R+514K))=0.052
Kv=9.451 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-CHARGER
Custom
A B C
Date: W ednesday, October 27,
D
2010 Sheet 48 of 61
5 4 3 2 1
2VREF_8205
1U_0603_10V6K
D D
1
PC29
2
PR50 PR51
13K_0402_1% 30K_0402_1%
1 2 1 2
PR52 PR53
RT8205_B+ 20K_0402_1% 20K_0402_1% RT8205_B+
1 2 1 2
PL3
B+ HCB4532KF-800T90_1812
1 2 Typ: 175mA +3VLP
ENTRIP2
ENTRIP1
PR54 PR55
2200P_0402_50V7K
0.1U_0603_25V7K
4.7U_0805_25V6-K
0.1U_0603_25V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
2200P_0402_50V7K
4.7U_0805_25V6-K
110K_0402_1% 154K_0402_1%
1 2
PC38
1 2
4.7U_0805_10V6K
PC31
1
1
1
1
1
1
PC37
PC33
PC32
PC36
PC35
PC34
2
5
1
6
6
5
7
8
6
8
7
5
PU2
2
2
2
2
2
2
PC39
PQ20 PQ21
FB1
ENTRIP1
FB2
TONSEL
REF
ENTRIP2
1
C C
AO4466L_SO8 AO4466L_SO8
25 P PAD
2
4 4
7 24
VO2 VO1 SPOK 50
8 VREG3 PGOOD 23 PR57 PC41
PR56 0_0603_5% 0.1U_0603_25V7K
1
2
3
1
2
3
BST_3V 9 22 BST_5V
1 21 2 BOOT2 BOOT1 1 21 2
0_0603_5%
UG_3V
VFB=2.0V 21 UG_5V PL5
4.7UH_PCMC063T-4R7MN_5.5A_20% PC40 10 UGATE2 UGATE1
PL4 0.1U_0603_25V7K 4.7UH_PCMC063T-4R7MN_5.5A_20%
LX_3V 11 20 LX_5V 1 2 +5VALWP
+3VALWP 1 2 PHASE2 PHASE1
1
LG_3V LG_5V
6
5
7
8
1
12 19
4.7_1206_5%
LGATE2 LGATE1
4.7_1206_5%
6
5
7
8
@ PR60
SKIPSEL
PQ22
@ PR58
PR59 @
VREG5
AO4712_SO8
0_0402_5%
GND
VIN
MAINPW ON RT8205EGQW _W QFN24_4X4
NC
EN
1 2 1
2
1
2
PC42 + 4
4 PC43 +
14
18
17
16
15
13
1
1
220U_6.3V_M
680P_0402_50V7K
PR61
680P_0402_50V7K
AO4712_SO8
@ PC45
@ PC44
2 499K_0402_1% 220U_6.3VM_R15
PQ23 2
1 2
2
2
3
2
1
B+
3
2
1
VL
1
100K_0402_1%
1U_0603_10V6K
1
PC46
1
Typ: 175mA
PC47
4.7U_0805_10V6K
B B
PR62
2
2
ENTRIP1 ENTRIP2 RT8205_B+
1
D
6
0.1U_0603_25V7K
PQ24A 2 5
DMN66D0LDW -7_SOT363-6 G 2VREF_8205
2
G PQ24B
PC48
DMN66D0LDW -7_SOT363-6 TONSEL=VREF (1)SMPS1=300KHZ (+5VALWP)
50 MAINPWON S S
1
(2)SMPS2=375KHZ(+3VALWP)
4
PR63
0_0402_5%
2 1
PR64
100K_0402_1%
VL 2 1
+3.3VALWP +5VALWP
Ipeak=5.78A ; 1.2Ipeak=6.94A; Imax=4.05A Ipeak=7A ; 1.2Ipeak=8.4A; Imax=4.9A
f=375KHz, L=4.7UH f=300KHz, L=4.7UH,Rentrip=154k ohm
Rdson=15~18m ohm Rdson=15~18m ohm
1
2N7002W -T/R7_SOT323-3
PR65
PQ26 PQ25 1/2Delta I = 1/2 *(19-3)*(3/19)/(375KHz*4.7UH)=0.716A 1/2Delta I = 1/2 *(19-5)*(5/19)/(300KHz*4.7UH)=1.306A
PDTC115EU_SOT323-3
D Vlimit=10*10^-6*110Kohm/10=0.11V Vlimit=10*10^-6*154Kohm/10=0.15V
1
48 ACPRN 200K_0402_5%
2 1 2 VS 1 2 2 Ilimit=0.11/(18m*1.2)~0.11/(15m)=6.34A~9.13A Ilimit=0.15/(18m*1.2)~0.15/(15m)=7.13~10.26A
G
A Iocp=7.06A~9.85AA (7.06A>6.94A -> ok) -DVT- Iocp=8.44~11.57A (8.44>8.4 -> OK) A
2.2U_0603_6.3V6K
PR66
40.2K_0402_1%
S
1
3
100K_0402_1%
1
PC49
1
PR67
3
2
40,41 EC_ON
2
2 PQ27
PDTC115EU_SOT323-3
3VALWP/5VALWP
3
Custom 0.4
5 4 3 2 1
5 4 3 2 1
PJP2
SUYIN_200275GR008G13GZR
D D
GND 10
9
GND
8
8
7
7 EC_SMDA
6
2
6 EC_SMCA
5 5
4 TH PR68
4 PI 100_0402_1%
3 3
2
2
1 PH1 under CPU botten side :
1
1
2
PR69
CPU thermal protection at 92 degree C
<40,41> 100_0402_1% EC_SMB_DA1 40
VL
Recovery at 72 degree C
VMB
1
1
PL6
SMB3025500YA_2P
<40,41> EC_SMB_CK1 40
1 2 BATT+ PR70
1
2
1K_0402_5%
2
PR73 PC50 PR71 PR72
1
VL
1
6.49K_0402_1% 0.1U_0603_25V7K 10K_0402_1% 21K_0402_1%
2
PC51 PC52 2 1 +3VALWP
1000P_0402_50V7K 0.01U_0402_25V7K
2
2
1
2
PU3
@ PR74 1 8
1
100K_0402_1% VCC TMSNS1
PR75 2 7 2 1
1K_0402_1% GND RHYST1
1
C 3 OT1 TMSNS2 6 PR76 C
49 MAINPWON 9.53K_0402_1%
2
4 5 2 1
OT2 RHYST2
BATT_TEMP 40
G718TM1U_SOT23-8 @ PR77
47K_0402_1%
1
1
PH2 @ PH1
100K_0402_1%_NCP15WF104F03RC 100K_0402_1%_NCP15WF104F03RC
2
2
PQ28
TP0610K-T1-E3_SOT23-3
B+ 3 1 +VSBP
100K_0402_1%
0.22U_0603_25V7K
1
PR78
1
1
PC53
PC54
0.1U_0603_25V7K
2
2
2
PR79 65W@ PR240 120W@ PR240

VL 3.92K_0402_1% 15.4K_0402_1%
22K_0402_1%
1 2
Change 5VALW to 3VALW on DVT
2
PR80
B 100K_0402_1% +3VALWP B
PR245
PR81 0_0402_5% ADP_I 40,48
1
D
1
1K_0402_5%
PQ29
1
49 SPOK 1 2 2 1 2 @
G 2N7002W-T/R7_SOT323-3 PR243
1U_0402_6.3V6K
S 7.15K_0402_1%
3
1
1
PC55
+3VS @ PC170
2
1
0.1U_0603_25V7K 90W@
2
PR244
2
PR240
1
10K_0402_1% D
9.09K_0402_1% 65W/90W# 40,48
2
@ PR250 G
2
0_0402_5%
2
PR239 S
3
1 2 PU13 @
5,40 H_PROCHOT# 100K_0402_1%
1 8 PQ66
VCC TMSNS1 2N7002W-T/R7_SOT323-3
2
2 7 1 2
GND RHYST1
1
D
3 6 PR241 90W@
PQ65 2 OT1 TMSNS2 16.2K_0402_1%
2N7002W-T/R7_SOT323-3 G
S 4 5
OT2 RHYST2
1
3
G718TM1U_SOT23-8 PR242
65W@ PR241 10K_0402_1%
10.5K_0402_1%
2
For 65W adapter==>action 70W , Recovery 54W
A A
For 90W adapter==>action 97W , Recovery 75W 120W@ PR241
17.4K_0402_1%
For 120W adapter==>action 135W , Recovery 100W

PWR-BATTERY CONN/OTP
Custom 0.4
5 4 3 2 1
A B C D
PL7
HCB4532KF-800T90_1812
1.5_8209_B+ 1 2
B+
5
6
7
8
2200P_0402_50V7K
0.1U_0603_25V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PQ30
1
PC173
PC172
PC56
PC57
PR83
267K_0402_1% 4
2
PR84 1 2
0_0402_5%
1 2
1 39,40,44,46 SYSON AO4406AL_SO8 1
3
2
1
2
PR85 PC59 PL8
47K_0402_5%
0.1U_0603_25V7K 1UH_FDUE1040D-1R0M-P3_21.3A_20%
@ PR86
0_0603_5%
15
14
+1.5VP
1
1
@ PU4 BST_1.5V 1 BST_1.5V-1
2 1 2 1 2
PC60
EN/DEM
NC
BOOT
.1U_0402_16V7K
2
2 13 DH_1.5V
TON UGATE
1
3 12 LX_1.5V
VOUT PHASE 1
5
6
7
8
@ PR87
4 VDD VFB=0.75V CS 11 +5VALW PQ31 4.7_1206_5% + PC61
330U_6.3V_M
5 10
2
FB VDDP 2
6 9 DL_1.5V
PGOOD LGATE 4
PGND
PR88
GND
1
15K_0402_1%
100_0603_5% @ PC63
1
PR89
1 2 680P_0402_50V7K
+5VALW RT8209MGQW _W QFN14_3P5X3P5 PC62
2
3
2
1
4.7U_0805_10V6K AO4456_SO8
2
1
2
PC64
4.7U_0603_10V6K
2
<Vo=1.5V> VFB=0.75V
PR90
V=0.75*(1+10K/10K)=1.5V
1 2
Fsw=298KHz
1
Cout ESR=15m ohm Rdson(max)=5.6 mohm Rdson(typ)=4.5 mohm. 10K_0402_1%
2 Ipeak=19.53A, Imax=23.44A, Iocp=13.67A PR91 2
Delta I=((19-1.5)*(1.5/19))/(L*Fsw)=4.63A 10K_0402_1%

=>1/2Delta I=2.315A
choose Rcs=15K 2
Iocpmax=((15K*11uA)/0.0045)+2.315A=35.65A
Iocpmin=((15K*9uA)/(0.0056*1.3))+2.315A=23.06A
Iocp=23.06A~35.65A
VGA@ PL9
1.5VDGPU_8209_B+ HCB4532KF-800T90_1812
1 2
B+
6
5
7
8
4.7U_0805_25V6-K
2200P_0402_50V7K
4.7U_0805_25V6-K
0.1U_0603_25V7K
1
1
1
VGA@ PC66
1
VGA@ PC65
VGA@ PC174
VGA@ PC175
VGA@
PR92
2
2
2
2
VGA@ 267K_0402_1% 4
PR94 1 2
0_0402_5% VGA@
BST_1.5VDGPU PQ32
45,54 VGA_ON 1 2
AO4466L_SO8
1
2
3
VGA@ VGA@
2
PR96 VGA@ PL10

47K_0402_5%
PC68
@ PR95
0_0603_5% 0.1U_0603_25V7K 1UH_FDUE1040D-1R0M-P3_21.3A_20%

+1.5VSDGPUP
14
15 BST_1.5VDGPU-1
1
1
@ PU5 1 2 1 2 1 2
PC69
EN/DEM
NC
BOOT
.1U_0402_16V7K
1
DH_1.5VDGPU
2
2 TON 13
3 UGATE 3
LX_1.5VDGPU
1
3 12
6
5
7
8
VOUT PHASE @ PR97 1
VGA@
4
VFB=0.75V +5VALW 4.7_1206_5% + PC70
VDD CS 11
330U_6.3V_M
5 10
2
FB VDDP 2
DL_1.5VDGPU
VGA@ 6 9 4
PGOOD LGATE
PGND
PR98
GND
1
1
@ PC72
1
100_0603_5% VGA@
10K_0402_1%
VGA@ 680P_0402_50V7K
+5VALW
PR99
1 2 PC71 PQ33
RT8209MGQW _W QFN14_3P5X3P5 4.7U_0805_10V6K
3
2
1
2
7
AO4456_SO8
2
VGA@
1
VGA@ PC73 2
4.7U_0603_10V6K VGA@
2
VGA@
PR100
10K_0402_1%
1 2
1
VGA@
PR101
<Vo=1.5V> VFB=0.75V 10K_0402_1%
V=0.75*(1+10K/10K)=1.5V
2
Fsw=298KHz
Cout ESR=15m ohm Rdson(max)=5.6 mohm Rdson(typ)=4.5 mohm.
4 Ipeak=10.4A, Imax=12.48A, Iocp=7.28A 4
Delta I=((19-1.5)*(1.5/19))/(L*Fsw)=4.63A
=>1/2Delta I=2.315A
choose Rcs=10K
Iocpmax=((10K*11uA)/0.0045)+2.315A=24.59A
Iocpmin=((10K*9uA)/(0.0056*1.3))+2.315A=15.95A
Iocp=15.95A~24.59A
PWR-+1.5VP/+1.5VSDGPU
Custom
A B C
Date: W ednesday, October 27,D 2010 Sheet 51 of 61
5 4 3 2 1
1.8VSP
Ipeak=3.35A ; 1.2Ipeak=4.02 ;Imax=2.345A
Vout=0.6*(1+(20K/10K))=1.8V
PU6 PL11
4
PJ22 2.2UH_FDVE0630-H-2R2M=P3_8.3A_20%
2 1 10 2 LX_1.8V 1 2
+5VALW
PG
2 1 PVIN LX +1.8VSP
@ JUMP_43X118 9 3
68P_0402_50V8J
PVIN LX
1
1
4.7_1206_5%
1
1
PC74 8
PC75
SVIN
22U_0805_6.3VAM PR103
PR102
6 FB_1.8V 20K_0402_1%
D FB D
2
EN_1.8V 5
22U_0805_6.3VAM
22U_0805_6.3VAM
EN
1
2
1
NC
NC
TP
PC76
PC77
FB=0.6Volt
11
2
1 2
38,40,44,53 SUSP#
1
1
PR104 100K_0402_5%
680P_0402_50V7K
0.1U_0402_10V7K
2
SY8033BDBC_DFN10_3X3 PR105
PC78
PC79
1
D
1
PR106 10K_0402_1%
2
2 1M_0402_5%
38,44,53 SUSP
2
G
2
PQ67 S
1
2N7002W-T/R7_SOT323-3
PL23
HCB3225KF-151T50_1210
5603_VCCSAP_B+ 1 2 B+
2200P_0402_50V7K
4.7U_0805_25V6-K
0.1U_0603_25V7K
4.7U_0805_25V6-K
1
1
1
PC81
PC177
PC80
PC176
6
5
7
8
2
2
2
C PR107 C
4
267K_0402_1%
1 2
PQ34
AO4466L_SO8
1
3
2
EN_VCCSAP BST_VCCSAP
PC82 PL12
PR108 PR109
14
15
2.2UH_FDVE0630-H-2R2M=P3_8.3A_20%
1
0_0402_5% PU7 0.1U_0603_25V7K

0_0603_5% BST_VCCSAP-1
1 2 1 2 +VCCSAP
53 VCCPPWRGOOD 1 2
1
1 2
EN/DEM
NC
BOOT
UG_VCCSAP
1
@ PR110
2 13
1
47K_0402_5% @ PC83 TON UGATE
0.1U_0402_16V7K LX_VCCSAP 1
6
5
7
8
3 12
2
VOUT PHASE @ PR111 + PC84

2
+5VALW
4 11 4.7_1206_5% 330U_6.3V_M
VDD CS PQ35
2
AO4712_SO8 2
2
PR112 5 10
FB VDDP
100_0603_1% +3VS LG_VCCSAP PR113
1
4
1 2 6 9 0_0402_5% PR114
+5VALW PGOOD LGATE
PGND
@ PC85
GND
470P_0603_50V8J 1 2 VSSSA_SENSE 9
2
2
0_0402_5%
10K_0402_5%
1
PR116
15K_0402_1%
1
PC86
3
2
1
RT8209MGQW_WQFN14_3P5X3P5
1
4.7U_0805_10V6K
PR115
2
PC87
2
0_0402_5%
1
4.7U_0603_6.3V6K
PR117 SA_PGOOD 40
2
2 1
PR118
2K_0402_1% PR119
VCCSA_SENSE 9
VFB=0.75V 1 2 1 2
10_0402_5%
B B
+3VS
1
PR120
15K_0402_1% PR121
10K_0402_5%
2
PR123
1
D
10K_0402_5%
2 2 1
PR122 G
1
30K_0402_1% S PQ37 <Vo=0.9V> VFB=0.75V

3
PMBT2222A_SOT23-3
1
PQ36 V=0.75*(1+2K/10K)=0.9V
2
PR124 @
2N7002W-T/R7_SOT323-3 @ PC88 100K_0402_5% 2 2 1 Fsw=298KHz
4700P_0402_25V7K VCCSA_VID1 9
1
2
PR125 0_0402_5% @ PR126 Cout ESR=15m ohm Rdson(max)=18 mohm Rdson(typ)=15 mohm.
3
10K_0402_5% Ipeak=6A, Imax=4.2A, Iocp=7.2A

Delta I=((19-0.9)*(0.9/19))/(L*Fsw)=1.31A
2
=>1/2Delta I=0.655A
choose Rcs=15K
Iocpmax=((15K*11uA)/0.015)+0.655A=11.48A
Iocpmin=((15K*9uA)/(0.018*1.2))+0.655A=7.27A
VID[0] VID[1] VCCSA Vout Require on 2011/ 2012 Required Iocp=7.27A~11.48A
0 0 0.9 V Yes/Yes
0 1 0.8 V Yes/Yes
1 1 0.75V No/Yes
1 1 0.65V No/Yes
A A
Note:Use VCCSA_SEL to switch High & Low Level for VID[1]

(ie. VCCSA_SEL) due to the VID[0] is don't care for this setting.
2010/10/15
Compal Secret Data
2011/10/15 Title
PWR +VCCSAP
C 0.4
5 4 3 2 1
5 4 3 2 1
PU8
+1.5V 1 VIN VCNTL 6 +3VALW
2 GND NC 5
1
PC90
1
PC89 3 7 1U_0603_10V6K
4.7U_0805_6.3V6K PR127 VREF NC
2
1K_0402_1% 4 8
VOUT NC
D 9 D
2
TP
G2992F1U_SO8
PR128
.1U_0402_16V7K
+0.75VS
1
1
D
1
24.9K_0402_1% PQ39
38,44,52 SUSP
PC91
1 2 2 2N7002W -T/R7_SOT323-3
D
1
G PR129 PC93
2
1
S SUSP 2 1K_0402_1% 10U_0603_6.3V6M
3
PC92 G
2
1U_0402_6.3V6K PQ38 S
3
2N7002W -T/R7_SOT323-3
PL13
HCB4532KF-800T90_1812
1.05VS_51117_B+ 1 2 B+
4.7U_0805_25V6-K
2200P_0402_50V7K
0.1U_0603_25V7K
4.7U_0805_25V6-K
7
5
6
8
C C
1
1
1
PC94
PR130
PC179
PQ40
PC178
PC95
267K_0402_1% AO4406AL_SO8
1 2
2
2
2
PR131
680K_0402_5% 4
1
38,40,44,52 SUSP# 2
1
PR132 PC98
14
15
1
1
@ PR249 PU9 0_0603_5% 0.1U_0603_25V7K PL14
D
1
1
2
3
47K_0402_5% BST_1.05VS_VCCP 1 2 1UH_FDUE1040D-1R0M-P3_21.3A_20%
1 2
EN/DEM
+1.05VS_VCCPP
NC
BOOT
SUSP
2 2 1
2
G PC97 2 13 DH_1.05VS_VCCP
2
4.7U_0603_6.3V6K TON UGATE

S
3
LX_1.05VS_VCCP
1
PQ68 3 12
VOUT
6
5
PHASE
7
8
2N7002W -T/R7_SOT323-3 @ PR133
4 VDD 11 4.7_1206_5% 1
CS
5 VFB=0.75V 10 +5VALW + PC99
FB VDDP
2
1 2
330U_6.3V_M
DL_1.05VS_VCCP 4
PR135 6 PGOOD LGATE 9
PGND
100_0603_5% PR134 2
GND
@ PC100
+5VALW 1 2 680P_0402_50V7K 0_0603_5%
2
PQ41
1
1
AO4456_SO8
1
RT8209MGQW _W QFN14_3P5X3P5
15K_0402_1%
3
2
1
7
8
1
PC102
PR136
PC101 4.7U_0805_10V6K
2
4.7U_0603_10V6K
2
B B
2
PR137
4.02K_0402_1%
1 2
PR140
1
52 VCCPPW RGOOD 10_0402_5% VCCIO_SENSE 8

PR139 2 1
PR138 +3VALW
10K_0402_1% 1 2
2
10K_0402_1%
2
PR141 @
10K_0402_1%
<Vo=1.05V> VFB=0.75V
1
V=0.75*(1+4.02K/10K)=1.052V
Fsw=298KHz
Cout ESR=15m ohm Rdson(max)=5.6 mohm Rdson(typ)=4.5 mohm.
Ipeak=12.866A, Imax=9A, Iocp=15.439A
Delta I=((19-1.05)*(1.05/19))/(L*Fsw)=3.33A
A =>1/2Delta I=1.665A A
choose Rcs=15K
Iocpmax=((15K*11uA)/0.0045)+1.665A=37.62A
Iocpmin=((15K*9uA)/(0.0056*1.3))+1.665A=23.02A
Iocp=23.02A~37.62A Security Classification Compal Secret Data Compal Electronics, Inc.
PWR +1.05VS_VCCPP/+0.75VSP
Custom 0.4
5 4 3 2 1
5 4 3 2 1
VGA@ PL15
HCB3225KF-151T50_1210
B+ 1 2 B+_CORE
+3VS
1
1
VGA@ PC103 VGA@ PC104 VGA@ PC107
1
10U_1206_25V6M 10U_1206_25V6M 10U_1206_25V6M
@ PR142
2
2
10K_0402_5%
5
TPCA8030-H_SOP-ADV8-5
D D
PQ42
PQ43
18 VGA_PWROK 4 4
VGA@
VGA@
VGA@ PR143 VGA@ PC105
PU10 VGA@ 0_0603_5% 0.1U_0603_25V7K
VGA@ PR145 1 10 BST_VCORE 1 2 VGA@ PR144
1 2
3
2
1
PGOOD VBST
3
2
1
75K_0402_1% 0_0603_5%
1 2 2 9 DH_VCORE 1 2 VGA@ PL16
TRIP DRVH 0.36UH_MMD-12CE-R36M-M1L_34A_20%
+3VS SW_VCORE
3 8 1 2 +VGA_CORE
EN SW
4 VFB V5IN 7 +5VALW
5 6 DL_VCORE
1 2 RF DRVL
2
ESR=10mohm
2
@ PR146 VGA@ PR148 11
1
5
TP
5
TPCA8028-H_SOP-ADVANCE8-5
10K_0402_5% 200K_0402_1% VGA@
PQ44
VGA@ PR147
PQ45
TPS51218DSCR_SON10_3X3 PC106
1
VGA@ PR149 VFB=0.6V 1U_0603_6.3V6M 4.7_1206_5%
1 1
1
10K_0402_1% VGA@ PR150 VGA@ PC108

VGA_ON 10_0402_5% VGA@ PC171 + +
45,51 VGA_ON 1 2 470U_V_2.5VM
2
Switch freq. (RF pin setting) 4 4 470U_V_2.5VM
1
VGA@
VGA@ PR151
VGA@
47K ==>450KHz
2
1
VGA@ PC109 VGA@ PR152 2 2 0_0402_5%

VGA@ PC110 1 2
100K ==>390KHz 680P_0402_50V7K 0_0402_5%
2
C .1U_0402_16V7K C
2 1 24 FB_GND
3
2
1
2
200K ==>350KHz (Currently setting)
1
3
2
470K ==>300KHz
2
GCORE_SEN
VGA@ PR153
GCORE_SEN 24
1.82K_0402_1%
1
D VGA@
45 VGA_ON#
1
2 PQ46 GS@ PR157
G 2N7002W-T/R7_SOT323-3 6.49K_0402_1%
+3VSDGPU
S
3
2
1
GV@ PR157
2
TPCA8057-H Rds=2.6m/3.2m ohm
1
12.4K_0402_1%
VGA@ PC113 VGA@ PR156 VGA@ PR158
2200P_0402_25V7K 10K_0402_1% 10K_0402_5%
1
2
VGA@ PR159
1
6
D 10K_0402_5%
2 1 2
G
2
1
1
GS@ PR160 VGA@ PQ47A S
Vtrip range ==> 0.2V ~ 3V
1
8.25K_0402_1% GV@ PR160 VGA@ PC114 @ PR161
+3VSDGPU 4700P_0402_25V7K
16.2K_0402_1% 10K_0402_5%
2
VFB=0.7V
1
V=0.7*(1+Rtop/Rbottom)
2
B
Fsw=350KHz VGA@ PR162 B
10K_0402_5%
Cout ESR=12m ohm Rdson(max)=3.2 mohm Rdson(typ)=2.6 mohm. VGA@ PR163
3
D
Ipeak=41.02A, Imax=28.714A, Iocp=43A 10K_0402_5% +3VSDGPU
1
5 1 2
Delta I=((19-0.9)*(0.9/19))/(L*Fsw)=6.8A G
1
1
=>1/2Delta I=3.4A
2
VGA@ PQ47B S VGA@ PC115
choose Rcs=75K
4
DMN66D0LDW-7_SOT363-6 4700P_0402_25V7K @ PR165
2
Iocpmax=((75K*11uA)/0.0013)+3.4A=75.52A 10K_0402_5%
@ PR164
Iocpmin=((75K*9uA)/(0.0016*1.35))+3.4A=48.42A
2
10K_0402_5%
Iocp=48.42A~75.52A
1
VGA@ PR166
6
D
10K_0402_5%
2 2 1 GPU_VID1 22
1
VGA@ PQ48A G
DMN66D0LDW-7_SOT363-6 VGA@ PR167
S
1
10K_0402_5%
+3VSDGPU
2
2
GPU_VID1 GPU_VID0 NVIDIA/N12P-GS NVIDIA/N12P-GV1 @ PR168
VGA@ PR169 10K_0402_5%
3
D 10K_0402_5%
5 2 1 GPU_VID0 22
11
P8/P12 1 1 0.825V(0.827V) 0.825V(0.827V) VGA@ PQ48B G
VGA@ PR170
DMN66D0LDW-7_SOT363-6 10K_0402_5%
A S A
4
P0(Hot) 1 0 0.975V(0.982V) 0.90V(0.907V)
2
P0(Cold) 0 1 1.0V(1.024V) 0.925V(0.930V)
AP
0 0 ---- ----
+VGA_COREP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom P5WE0 0.4
5 4 3 2 1
5 4 3 2 1
Alert# PU resister need close CPU, @ PC116 GFX_B+ 1 2 B+

so the PU resister in HW schematic. 470P_0402_50V7K PL24
10U_1206_25V6M
10U_1206_25V6M
220U_25V_M
2 1 NTCG GFX@ @ HCB4532KF-800T90_1812 1
but DAT and CLK need close PWM-IC,
5
5
GFX@ PC118
GFX@ PC119
PQ50 GFX@
TPCA8028-H_SOP-ADVANCE8-5 TPCA8030-H_SOP-ADV8-5
PQ49
so the PU resister in POWER schematic. +
PC117
GFX@ PH3 0_0603_5%
1
1
470K_0402_5%_TSM0B474J4702RE PR226
2 1 2 1 UGATEG 2 1
1000P_0402_50V7K
2
8.06K_0402_1%
PR172 GFX@
2
2
PC120 GFX@
GFX@ PR171 4 4
1
3.83K_0402_1%
1
1 2
GFX@ PL18
GFX@ PR173 0.36UH_PCMC104T-R36MN1R17_30A_20% +VGFX_COREP
3
2
1
GFX@ PR174 +VGFX_COREP
3
2
1
27.4K_0402_1%
2
10_0402_1% PHASEG 4 1
2 1 PR175 PC122 1
330P_0402_50V7K
5
5
D BOOTG D
PC121 GFX@ +5VS 2 1 2 1 3 2
PC125 GFX@
330U_X_2VM_R6M
1
PQ51
@ +
24.7_1206_5%
GFX@ PR178
1 2
1
1
PC124 GFX@
1
PQ52 GFX@ PR180
GFX@ PC123
PC126 GFX@ VCC_AXG_SENSE 9 2.2_0603_5% 0.22U_0603_10V7K GFX@ PR179
1
PR176 @ 39P_0402_50V7K GFX@ PR177 680P_0402_50V7K 330P_0402_50V7K GFX@ GFX@ 10K_0402_1% 1_0402_5%
2 1 2 1 PC127 VSS_AXG_SENSE 9 2
499K_0402_1% 2 1 LGATEG
GFX@
422_0402_1% 2 1 4 4
2
1U_0603_10V6K
QC@ PC129
PC128 GFX@ GFX@ GFX@ PR184 PH4 GFX@
2
2
150P_0402_50V8J 1000P_0402_50V7K GFX@ PR183 10K_0402_5%_TSM0A103J4302RE

7.5K_0402_1%
680P_0402_50V7K
GFX@ PC130
1
2 1 2 1 1 2 2
2 1 PR181 GFX@
1
GFX@ PR182 2 1 1
QC@ PR185
2
10_0402_1%
3
2
1
0_0402_5%
3
2
1
475K_0402_1% 2.55K_0402_1%
0.22U_0603_10V7K
GFX@ 11K_0402_1%
GFXVR_IMON
2
QC@ PR186 .1U_0402_16V7K
PC131
1 PR187 2
1
18.2K_0402_1%
GFX@ PC133
2
0_0603_5%
ISNG
ISPG
+1.05VS_VTT PR189 @
PC135 @
2
0.047U_0603_16V7K 16.5K_0402_1% 1 2 1 2
2
54.9_0402_1%
GFX@
.1U_0402_16V7K
PR188
GFX@ PC134
UGATEG
PHASEG
LGATEG
2
PU11 QC@
BOOTG
GFX@ PC132
100_0402_1%
NTCG
1
5 1 .1U_0402_16V7K
QC@
VCC BOOT
1
2
@ PR192
2
1
130_0402_1%
2
470P_0402_50V7K
VSS_AXG_SENSE CPU_B+ 1 2
PR191
6 8 1 2
FCCM UGATE
PC137
1
PC139 ISPG
@ PC136
590_0402_1%
GFX@ PR193
10U_1206_25V6M
10U_1206_25V6M
1
5
PQ53
PR190 2 7
@ PQ54
1
For shortage changed +3VS PWM PHASE 0.01U_0402_16V7K
Parallel and tune length
2
+5VS
2
3 4
1
1
GND LGATE
PC138
1.91K_0402_1%
PR196 GFX@
37
40
39
38
42
41
44
43
47
46
45
49
48
@
QC@ PR194 ISNG
QC@
9
2
8 VR_SVID_DAT PGND 2 1
1
0_0402_5% 4 4
2
2
LGG
PHG
BOOTG
UGG
NTCG
PROG2
GND
RTNG
ISPG
ISNG
COMPG
FBG
VSENG
BOOT2 ISL6208ACRZ-T_QFN8_3X3
8 VR_SVID_ALRT# DIS@ PR195
1 36 0_0402_5%
2
VWG BOOT2 UGATE2
8 VR_SVID_CLK
2 35
2
40 GFX_CORE_PWRGD UG2 PHASE2 QC@ PL19
1
3
2
IMONG
3
2
1
PR197 +5VS
1 2 0.36UH_PCMC104T-R36MN1R17_30A_20%
+3VS 1 2 3 34 +CPU_CORE
SVID_SDA PGOODG PH2 4 1
DC@ PR198
5
1.91K_0402_1% 4 33
5
SVID_ALERT# VSSP2 LGATE2 0_0402_5% 3 2
4.7_1206_5%
C SDA C
@ PQ55
1
PQ56
PR202 @
SVID_SCLK 5 32
ALERT# LG2
VGATE 15,40 1 2
VSSSENSE 6 31
QC@ PR207
10K_0402_1%
SCLK VDDP
QC@ PR199
40 VR_ON PR200
10K_0402_1%
4
QC@ PR205
1_0402_5%
1
10K_0402_1%
QC@
1 PR203
QC@ PR201
2 4
3.65K_0402_1%
QC@ PR204
7 LGATE1
2
30 0_0402_5%
1 2
2
VR_ON
1
IMVP_IMON PWM3
680P_0402_50V7K
PC140 @
0_0402_5%
19.1K_0402_1%
0.047U_0603_16V7K
8 PGOOD 29
1
LG1
PC141
2.2U_0603_10V6K
PC142
ISL95831CRZ-T_TQFN48_6X6
1
2
3
PHASE1
2
9
1
2
3
2
28
2
1
IMON
VSUM+
VSSP1
VSUM-
PR206
1
ISEN2
ISEN1
ISEN3
1
2
10 UGATE1
27
For shortage changed VR_HOT# PH1
2
2
2
11 BOOT1
26
NTC
ISEN3/ FB2
UG1
40 VR_HOT# CPU_B+
12 25
PROG1
PC144
ISUMN
ISUMP
VW BOOT1 QC@ PR212
COMP
ISEN2
ISEN1
VSEN
1 @
VDD
RTN
2 590_0402_1%
47P_0402_50V8J
VIN
FB
+1.05VS_VTT
10U_1206_25V6M
1 2 470P_0402_50V7K
5
1
10U_1206_25V6M
@ PQ58
PC143
PR209 PU12
13
14
15
16
17
18
19
20
21
22
23
24
1
PQ57
@ PR208
PC145
1 2 0_0603_5%
1
1 2
PC146
499_0402_1% PR230
2
UGATE2
3.83K_0402_1% PH5 2 1
2
470K_0402_5%_TSM0B474J4702RE 4
2
2 PR210 1 4
27.4K_0402_1%
1
DC@
1000P_0402_50V7K
change from 43P to 47P PR211 CPU_B+ PR212

8.06K_0402_1%
4.32K_0402_1%
1
for shortage problem PHASE2 PL20
1
2
3
1 2 (Ipeak=56A)
PC147
+CPU_CORE
PR213
0.36UH_PCMC104T-R36MN1R17_30A_20%
1
2010-03-15
2
3
(Vboot=0)
2
4 1
4.7_1206_5%
DC@ PC148 22P_0402_50V8J 0_0603_5%
1
5
PR215
@ PR216
5
+5VS BOOT2
0_0603_5% 3 2
PQ60
2 1
2
@ PQ59
2 1 PR214 2 1
PC152
B B
ISEN2
ISEN1
ISEN3
1_0603_5% 2 1
1U_0603_10V6K
PC149
1
LGATE2
2
1
1_0402_5%
PR219
0.22U_0603_10V7K4
1
2
10K_0402_1%
10K_0402_1%
QC@ PR246
PR220
4
1
1
3.65K_0402_1%
10K_0402_1%
PR218
PC151
PR217
QC@ PC150 0.22U_0402_6.3V6K
0.22U_0603_25V7K
2
PC155
680P_0402_50V7K
VSUM- 2 1 VSUM+
2
33P_0402_50V8J
@ PC154
@ PR221 PR222 PC153
2.61K_0402_1%
VSUM+
PC156
VSUM-
ISEN2
ISEN1
1
ISEN3
1
1
2
3
1 2 2 1 2 1
1
2
3
2
1
2
2 1 2 1
2
PC157 0.22U_0402_6.3V6K
2
499_0402_1%
PR223
499K_0402_1% DC@ PR225 2 1

470P_0402_50V7K
0.068U_0402_16V7K
PR224 0.22U_0402_6.3V6K
2 1
0.33U_0603_10V7K
PC158
1
QC@ PR229
11K_0402_1%
150P_0402_50V8J 412K_0402_1% 2.15K_0402_1% CPU_B+

2 1
2
1.24K_0402_1% B+
PR227
2 1
PC160
PC159
1
1
+CPU_CORE
5
1 2
10U_1206_25V6M
PR228
1
PL17
10U_1206_25V6M
@ PQ62
2
2 1 PC161 330P_0402_50V7K
2
HCB4532KF-800T90_1812
2
5
PH6
@
1
10_0402_1%
PC164
QC@ PR225
330P_0402_50V7K
1
2 1
1
@
PC163
VSUM-
10KB_0603_5%_ERTJ1VR103J
PQ61
1
3.83K_0402_1% PR248 8 VCCSENSE UGATE1

PC162
2K_0402_1% DC@ PR229 0_0603_5%
2
4
1
.1U_0402_16V7K
2
2
8 VSSSENSE 2 1 PR251
2
PC167
698_0402_1% 2 1
PR232
2
4
2 1
2
2 1
10_0402_1% 2 1 2 1
@
1
2
3
PHASE1
1
PC180 PC165 1000P_0402_50V7K PL21 +CPU_CORE

@ PC166 @PR231
@ PR231
100P_0402_50V8J 0.36UH_PCMC104T-R36MN1R17_30A_20%
100_0402_1%
1
2
3
330P_0402_50V7K
4 1
2
4.7_1206_5%
BOOT1
@ PR234
0_0603_5% 3 2
*Iccmax in Turbo Mode for SV (35W) is 53A
5
5
PR233
@ PQ64
PQ63
1
2 1 2
3.65K_0402_1%
PR236
1
10K_0402_1%
QC@ PR247
LGATE1
2
1_0402_5%
10K_0402_1%
PR237
PR238
+CPU_CORE +VGFX_COREP
1
10K_0402_1%
PR235
2
A PC168 A
0.22U_0603_10V7K
Icc-max=53A Ipeak=26A , Imax=18.2A , 1.2Ipeak=31.2A 4 4
2
Rdson=3.6~4.5m ohm Rdson=3.6~4.5m ohm
VSUM+
680P_0402_50V7K
2
ISEN2
VSUM-
ISEN1
ISEN3
DCR=1.1m ohm DCR=1.1m ohm
@ PC169
2
HW output cap: HW output cap:
2
1
2
3
1
2
3
(1)10U_0805_4V *10 (1)22U_0805_6.3V *12
(2)22U_0805_6.3V *15 (2)470U_D2_2V *2(ESR=4.5m ohm)
(3)470U_D2_2V *4(ESR=4.5m ohm) Compal Secret Data
2010/10/15 2011/10/15 Title
PWR +CPU_CORE/+VGFX_CORE
*OCP setting value=71.5A *OCP setting value=37A Size Document Number Rev
Custom 0.4
5 4 3 2
Date: Wednesday, October 27, 2010 1 Sheet 55 of 61
5 4 3 2 1
Page 1 of 1
Version change list (P.I.R. List) for PWR
Item Fixed Issue Reason for change Rev.PG# Modify List Date Phase
D D
(1)Add PR638(0_0603_5%)
Shut down for IF the PWM3 no used, between PWM3 and +5VS 2010-03-29 DVT
please pull high it for
1 PWM3
+5VS and not floating
0.1 P.55 (2)connect the ISNG to +5VS
pin floating
OVP problem If the HW side is 0V,

with PWR and through the jumper will
2 HW side cause the sense pin to 0.1 P.55 Change the +VGFX_CORE
to +VGFX_COREP 2010-03-29 DVT
over the votage setting
and it may happen OVP
problem.
C C
B B
3
A COMPAL ELECTRONICS A
Title
<Title> PIR POWER1
A PAW00(LA-6361P) 0.1
5 4 3 2 1
5 4 3 2 1
(PU1000)
VR_ON +CPU_CORE
ISL6266ACRZ-T +1.5VS_DMC
D D
TQFN48 Page 55
VGA_ON (U13) VGA_ON# (U40)

(PU998) SUSP
+VGA_CORE SI4800BDY-T1-GE3 +1.5VS AO4430L +1.5VSDGPU
APW7138NITRL Page 44
SO8 Page 44
SSOP16 Page 54
ADAPTER
SYSON (PU5) SUSP (PU8)
+1.5V
RT8209BGQW APL5331KAC-TRL +0.75VS
SO8 Page 53
B+ WQFN14 Page 51
(PU6) PJP25 L76

BATTERY VS_ON +1.05V_VCCP +1.05VS_PCH +CLK_1.05VS
RT8209BGQW
(SUSP#)
WQFN14 Page 53
U38
+1.05VSDGPU
(PU3)
VCCPWRGOOD +VCCSA
RT8205EGQW
C C
CHARGER WQFN24 Page 49
(PU3)
RT8205EGQW
WQFN24 Page 49
+5VALW +3VALW
SUSP SYSON# SUSP PCH_PWR_EN# SUSP SUSP
(U49) (U46) (PU6) (U14) (U68) (UB1)

SI4800BDY TPS2062ADR SY8033BDBC SI4800BDY R599 (RE1) SI4800BDY RT9701-PB
SO8 Page 44 DFN10 Page 51 SO8 Page 44 SO8 Page 44 SOT23-5 Page 45
B B
+5VS +USB_VCCB +1.8VS +3VALW_PCH +3V_LAN +3VALW_EC +3VS +3V
(U39) ENVDD ENVDD VGA_ON

+CRT_VCC
BCM57780 (Q51) (Q30) (Q34)
+3VS_CK505
AO3413L AO3413L AO3413L
SO23-3 Page 37 SO23-3 Page 30 SO23-3 Page 24
+HDMI_5V_OUT
+1.2V_LAN +DVDD_AUDIO
+BT_VCC +LCDVDD +3VSDGPU
+5VS_HDD1
+3V_WLAN
+5VS_ODD
+3V_DMC
A A
+5VAMP +VDDA

Power Rail
Custom 0.4
5 4 3 2 1
5 4 3 2 1
D D
PCH_PWR_EN# 2
U14,+3VALW_PCH
V
AC A1
MODE VIN QH4,+5VALW_PCH
V V
A2 A3 B5
VV
PU2 A5 2
V
PU3
V
B+ +3VALW_PCH
+3VALW B7 2 3
BATT V +5VALW_PCH
BATT
MODE B1
B2
B+ B4 V
V
V
EC 4 SYS_PWROK
13
PQ2 PCH_RSMRST# PM_DRAM_PWRGD
V
PCH
V
V V
B3 A5 B7 5 14
PBTN_OUT# H_CPUPWRGD
CPU
V V
V
51ON# EC_ON
PM_SLP_S3#
PM_SLP_S4# PLT_RST# 15
C C
PM_SLP_S5#
A4 B6 PM_SLP_A# 6
PM_SLP_SUS#
V
V
ON/OFF V
SYSON 7 SYSON# +1.5V
V
PU5
DGPU_PWR_EN 8a (DIS) VGA_ON
+3VSDGPU
V
Q6 11
8
SUSP#,SUSP U49
V
VGATE
+5VS
V
+1.5VSDGPU
U40
V
U68
VGA
V
+3VS +1.8VSDGPU
U37
B B
V
U13
V
+1.5VS +1.05VSDGPU
U38
V
PU8
V
+0.75V +VGA_CORE
VCCPPWRGOOD
PU998
V
V
PU9 PU7
+1.05VS_VCCP +VCCSA
VGA_PWROK 8b (DIS)
U47
CK505
VR_ON 9 PU1000
V
10
V
+CPU_CORE
A A

Power sequence
Custom 0.4
5 4 3 2 1
5 4 3 2 1
V ersion Change L ist ( P. I. R . L ist ) Page 1

R equest
Item Page# Title D ate Issue D escription Solution D escription R ev.
O w ner
1 P.18 PCH_GPIO71 09/01 SW For identofy VRAM 900 or 800 MHz 0.2
D D
2 P.31 DPST buffer 09/03 HW Change U1 from NOT gate to Buffer 0.2
3 P.39 EC_MUTE# pull high 09/03 HW Change EC_MUTE# Pull high from +3VALW to +3VS 0.2
4 P.40 TP Conn. Reverse 09/03 HW TP Mudule change,so reverse TP pin 0.2
5 P.13 R624 pop @ 09/03 HW Already pull high R655~ 0.2

C696,C368,C717,C718,C695,C366,C697,
6 P.45 Change Cap from 09/03 HW C401,C370,C369,C715 change to 0.01U
0.1u to 0.01u 0.2
Follow Vendor Suggest ..
R199,R207,R211,R215,R168,R171,R179,
Change 0 Ohm R182,R195,R216,R192 change to 47 Ohm
7 P.35 to 47 Ohm 09/04 Broadcom 0.2
Follow Vendor Suggest ..
CPU XDP socket take off
8 P.5 09/17 HW 0.2
C C
TP pin reverse
9 P.40 09/17 HW 0.2
10 P.13 09/17 HW R624 change to 4.7K 0.2
11 P.45 09/17 HW OCI2B(R313) place @ for BOM 0.2
12 P.33 09/17 HW HDMI output from PCH (by UMA) 0.2
P.35 switch the LAN MIDI0 and MIDI2 pin
13 09/17 HW 0.2
P.17,35 Change IO port PLT_RST# to PLT_RST_BUF# 0.2
14 ,37,38, 09/17 HW
39,45
15 P.18 09/17 HW OPTIMUS_EN# pull high, pull low resistor
value both change to 10K 0.2
modify the VRAM strap pin ROM_SI

16 P.24 09/20 HW pull low resistor for implement VRAM 900MHz 0.3
B B
17 P.33 09/23 HW Add R784 and R785 for DDC pull high... 0.3
18 P.44 09/23 HW Add C818 and C819 for coupling noise

from other spare trace... 0.3
Add R786,R787,R788 and R789 pull down

19 P.45 09/23 HW from vendor's suggestion.. 0.3
20 P.37 Add C820,R790 and Q58 for 3G/B 0.3

09/23 HW and change source voltage from +3VS to +3VALW..
Add C821,C822,C823,C824 for +1.5V...

21 09/23 HW and move the PJ26 & PJ27 between 0.3
P.45
1.5V to 1.5VSDGPUH
Change JUSB5 to USB2.0 Conn.

22 P.46 09/24 HW Add D34 as ESD Diode for USB3.0
A 0.3 A

EE P.I.R (1)
Custom 0.4
5 4 3 2 1
5 4 3 2 1

R equest
O w ner
Add R791 pull down 22k Ohm to ground
23 P.41 09/24 HW Vendor's request... 0.3
D D
Add D31 to connect to ACIN

24 P.22 09/24 HW 0.3

Vendor's request...
Add JP1,JP2 and JP3 for
25 P.36 09/29 HW ESD protection 0.3
26 P.36 09/29 ME Update the JREAD1 symbol 0.3
27 P.13 09/29 HW Add R792 follow DG1.5 0.3
28 P.33 09/29 HW Change HDMI termination R to 680 Ohm 0.3
HW 0.3
29 P.44 09/29 Add C825 fro +1.05VSDGPU
30 P.17,38 Change the M/B to USB port to port 1

,45 09/30 HW Sub/B to port 0 and port 2 0.3
C Add test point for TCK,TMS, C

31 P.5 10/04 HW TRST#,TDO,TDI 0.3
WWAN_OFF# from GPIO51 to GPIO37
32 P.17,18 10/04 HW WL_OFF# from GPIO55 to GPIO49 0.3
33 P.17,45 10/04 HW M/B USB port from port 2 change to port1 0.3
34 P.26 10/04 HW C1 and C604 chaneg to 470uF 0.3

0.3
35 P.36 10/04 HW Add C827 as DGND and RJ45_GND bridge
0.3
36 P.36 10/04 HW Change R490,R491,R492 and R493 to 0603 package
37 P.35 10/04 HW Chaneg R214 to 0603 package 0.3
38 P.35 10/04 HW Chaneg R192,R195,R199,R207,R211 0.3

,R215,R168,R171,R179,R182 to 0 Ohm
39 P.40 10/04 HW follow broadcom suggestion,add R496 0.3

B B
40 P.40 10/04 HW Add keyboard cap for EMI 0.3
41 P.44 10/04 HW Add C826 for +1.5VSDGPU 0.3

42 P.37 10/05 HW Add RTS5138 circuit 0.4
Add D35 ,R799 and C838 for
43 P.13 changing the RTC to samll size...
10/12 HW 0.4
and can be charged!!
44 P.14 10/12 HW Add CLK_SD_48M for Card Reader 5138 0.4

45 P.24 10/12 HW Pop R129 follow NV suggestion 0.4
46 P.25 10/12 HW Pop R82 and De-pop R92 follow NV suggestion 0.4
47 P.25 10/12 HW Add R800 and R801 10K Ohm pull down
follow NV suggestion 0.4
A A
48 P.24 10/12 HW Change R775,R777,R778 and R779 to GV@ 0.4

EE P.I.R (2)
Custom 0.4
5 4 3 2 1
5 4 3 2 1

R equest
O w ner
D D
C C
B B
A A

EE P.I.R (3)
Custom 0.4
5 4 3 2 1

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JE50-HR/SJV50-HR(P5WE0/P5WS0) M/B Schematics Document

Security Classification Compal Secret Data Compal Electronics, Inc.

100MHz PCI-E 2.0x16 5GT/s PER LANE

TMDS(UMA/OPTIMUS) Cougar Point-M

Sub-board ENE KB930

Power Circuit DC/DC

PCI EXPRESS* - GRAPHICS

15 FDI_LSYNC0 PEG_TX#[9] H29 C550

should not be left floating EDP_COMP PEG_TX#[14] F26

Security Classification Compal Secret Data

Buffered reset to CPU

AP29 R03 modify

JTAG & BPM

Security Classification Compal Secret Data Compal Electronics, Inc.

11 DDR_A_D[0..63] AB6 SA_CLK_DDR0 11 12 DDR_B_D[0..63] AE2 SB_CLK_DDR0 12

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY A

Follow CRB1.0 +1.5V

SM_DRAMRST# DIMM_DRAMRST#_R 1K_0402_5%

A 4.99K_0402_1% RST_GATE hgih ,MOS ON A

CFG Straps for Processor

JCPU1E PEG Static Lane Reversal - CFG2 is for the 16x

RSVD50 R107 R108

VCCIO_SEL RSVD25 RSVD56

1/NC : (Default) +1.05VS_VTT

PEG DEFER TRAINING

1: (Default) PEG Train immediately following xxRESETB

SV type CPU JCPU1F POWER

PEG AND DDR

4*470uF,16*22uF and 10*10uF 2 2 2

UMA@ UMA@ UMA@ UMA@ UMA@ UMA@ AT23 AK34 VSS_AXG_SENSE 55

DDR3 -1.5V RAILS

1 1 AM18 AC4 +1.5VS

Security Classification Compal Secret Data Compal Electronics, Inc.

1 DDR_A_MA13 CAS# ODT0 SA_ODT1 1K_0402_5%

1 1 1 DDRA_CS1_DIMMA# VDD15 VDD16 SA_ODT1 6

6 DDRA_CS1_DIMMA# A13 ODT1

B DDR_A_D42 DM5 DQS5 DDR_A_D46 B

Security Classification Compal Secret Data Compal Electronics, Inc.

DDR_B_D27 DQ26 DQ30 DDR_B_D31

DDR_B_MA3 VDD7 VDD8 DDR_B_MA2

1 1 DDR_B_DQS#6 DQ49 DQ53 DDR_B0_DM6

Place near JDIMM2.203,204 DDR_B_D59 VSS49 VSS50 DDR_B_D63

0_0402_5% 2 1 R349 +0.75VS SA1 SCL +0.75VS

DDR_B0_DM5 205 206

0_0402_5% 2 1 R338 DDR_B0_DM6 G1 G2

DIMM_2 Reserve H:4mm

Security Classification Compal Secret Data Compal Electronics, Inc.

R567 1 2 1M_0402_5% SM_INTRUDER#

(INTVRMEN should always be pull high.)

R294 1 @ 2 1K_0402_5% PCH_SPKR U33A

ME debug mode,this signal has a weak internal PD AM3 SATA_PRX_DTX_N0 34

PCH_SATALED# <BOM Structure>

D13 20mil SPI ROM FOR ME (4MB)

Issued Date 2010/10/15 2011/10/15 Title

1 CHN202UPT_SC70-3 Deciphered Date

PCIE_PRX_DTX_N1 BG34 EC_LID_OUT# R240 1 2 10K_0402_5%

PCH_GPIO46 V37 CLKOUT_PCIE7P 2 1

PEG_CLKREQ#_R 2N7002H_SOT23-3 Pull high @ VGA side

0_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.

4470uF,1622uF and 10*10uF 2 2 2