CHAPTER 9: MOS Diode Modeling

9.1 Diode IV Model

The diode IV modeling now supports a resistance-free diode model and a current-
limiting feature by introducing a new model parameter ijth (defaulting to 0.1A). If
ijth is explicitly specified to be zero, a resistance-free diode model will be
triggered; otherwise two critical junction votages Vjsm for S/B diode and Vjdm for
D/B diode will be computed from the value of ijth.

9.1.1 Modeling the S/B Diode

If the S/B saturation current Isbs is larger than zero, the following equations
is used to calculate the S/B diode current Ibs.

Case 1 - ijth is equal to zero: A resistance-free diode.

(9.1)
V
Ibs = Isbs exp bs 1 + GminVbs
NVtm

where NV tm = NJ  KbT  q ; NJ is a model parameter, known as the junction

emission coefficient.

Case 2 - ijth is non-zero: Current limiting feature.

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Diode IV Model

If Vbs < Vjsm

(9.2)
V
Ibs = Isbs exp bs 1 + GminVbs
NVtm

otherwise

(9.3)
ijth+ Isbs
Ibs = ijth+ (Vbs Vjsm) + GminVbs
NVtm

with Vjsm computed by

ijth
Vjsm = NVtm ln + 1
I sbs

The saturation current Isbs is given by

(9.4)
I sbs = As J s + Ps J ssw

where Js is the junction saturation current density, AS is the source junction

area, Jssw is the sidewall junction saturation current density, Ps is the
perimeter of the source junction. Js and Jssw are functions of temperature
and can be written as

(9.5)
Eg 0 Eg T
+ XTI ln
Vtm0 Vtm Tnom
J s = J s 0 exp
NJ

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Diode IV Model

(9.6)
Eg 0 Eg T
+ XTI ln
Vtm0 Vtm nom
T
J ssw = J s 0 sw exp
NJ

The energy band-gap Eg0 and Eg at the nominal and operating temperatures
are expressed by (9.7a) and (9.7b), repectively:

(9.7a)
7.02 10 4 Tnom
2
E g 0 = 1.16
Tnom + 1108

(9.7b)
4
7 .02 10 T 2
E g = 1 .16
T + 1108

In the above derivatoins, Js0 is the saturation current density at Tnom. If Js0 is
4
not given, J s0 = 1 10 A/m2. Js0sw is the sidewall saturation current density
at Tnom, with a default value of zero.

If Isbs is not positive, Ibs is calculated by

(9.8)
I bs = Gmin Vbs

9.1.2 Modeling the D/B Diode

If the D/B saturation current Isbd is larger than zero, the following equations
is used to calculate the D/B diode current Ibd.

Case 1 - ijth is equal to zero: A resistance-free diode.

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Diode IV Model

(9.9)
V
Ibd = I sbd exp bd 1 + GminVbd
NVtm

Case 2 - ijth is non-zero: Current limiting feature.

If Vbd < Vjdm

(9.10)

V
Ibd = I sbd exp bd 1 + GminVbd
NVtm
otherwise

(9.11)
ijth + I sbd
I bd = ijth + (Vbd Vjdm) + GminVbd
NVtm

with Vjdm computed by

ijth
Vjdm = NVtm ln + 1
I sbd

The saturation current Isbd is given by

(9.12)

I sbd = Ad J s + Pd J ssw

where Ad is the drain junction area and Pd is the perimeter of the drain
junction. If Isbd is not positive, Ibd is calculated by

(9.13)
I bd = Gmin Vbd

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MOS Diode Capacitance Model

9.1.3 Model Parameter Lists

The diode DC model parameters are listed in Table 9-1.

Symbols Symbols
used in used in Description Default Unit
equation SPICE
Js0 js Saturation current density 1e-4 A/m2
Js0sw jssw Side wall saturation current density 0 A/m
NJ nj Emission coefficient 1 none
XTI xti Junction current temperature expo- 3.0 none
nent coefficient
ijth ijth Limiting current 0.1 A

Table 9-1. MOS diode model parameters.

9.2 MOS Diode Capacitance Model

Source and drain junction capacitance can be divided into two components:
the junction bottom area capacitance Cjb and the junction periphery
capacitance Cjp. The formula for both the capacitances is similar, but with
different model parameters. The equation of Cjb includes the parameters
such as Cj, Mj, and Pb. The equation of Cjp includes the parameters such as
Cjsw, Mjsw, Pbsw, Cjswg, Mjswg, and Pbswg.

9.2.1 S/B Junction Capacitance

The S/B junction capacitance can be calculated by

If Ps > Weff
(9.14)
Capbs = As C jbs + (Ps Weff )C jbssw + Weff C jbsswg

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MOS Diode Capacitance Model

Otherwise

(9.15)
Capbs = As C jbs + Ps C jbsswg

where Cjbs is the unit bottom area capacitance of the S/B junction,
Cjbssw is the periphery capacitance of the S/B junction along the
field oxide side, and Cjbsswg is the periphery capacitance of the S/B
junction along the gate oxide side.

If Cj is larger than zero, Cjbs is calculated by

if Vbs < 0
(9.16)
M j
V
C jbs = C j 1 bs
Pb

otherwise
(9.17)

V
C jbs = C j 1 + M j bs
Pb

If Cjsw is large than zero, Cjbssw is calculated by

if Vbs < 0

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MOS Diode Capacitance Model

(9.18)
M jsw
V
C jbssw = C jsw 1 bs
Pbsw

otherwise

(9.19)
V
C jbssw = C jsw1 + M jsw bs
Pbsw

If Cjswg is larger than zero, Cjbsswg is calculated by

if Vbs < 0

(9.20)
M jswg
V
C jbsswg = C jswg1 bs
P
bswg

otherwise

(9.21)

V
C jbsswg = C jswg1 + M jswg bs
Pbswg

9.2.2 D/B Junction Capacitance

The D/B junction capacitance can be calculated by

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MOS Diode Capacitance Model

If Pd > Weff
(9.22)
Capbd = Ad C jbd + (Pd Weff )C jbdsw + Weff C jbdswg

Otherwise

(9.23)
Capbd = Ad C jbd + Pd C jbdswg

where Cjbd is the unit bottom area capacitance of the D/B junction,
Cjbdsw is the periphery capacitance of the D/B junction along the
field oxide side, and Cjbdswg is the periphery capacitance of the D/B
junction along the gate oxide side.

If Cj is larger than zero, Cjbd is calculated by

if Vbd < 0
(9.24)
M j
V
C jbd = C j 1 bd
Pb

otherwise
(9.25)

V
C jbd = C j 1 + M j bd
Pb

If Cjsw is large than zero, Cjbdsw is calculated by

if Vbd < 0

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MOS Diode Capacitance Model

(9.26)
M jsw
V
C jbdsw = C jsw 1 bd
Pbsw

otherwise

(9.27)
V
C jbdsw = C jsw1 + M jsw bd
Pbsw

If Cjswg is larger than zero, Cjbdswg is calculated by

if Vbd < 0

(9.28)
M jswg
V
Cjbdswg = Cjswg1 bd
P
bswg

otherwise

(9.29)
V
C jbdswg = C jswg 1 + M jswg bd
Pbswg

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MOS Diode Capacitance Model

9.2.3 Temperature Dependence of Junction Capacitance

The temperature dependence of the junction capacitance is mod-

eled. Both zero-bias unit-area junction capacitance (Cj, Cjsw and
Cjswg) and built-in potential of the junction (Pb, Pbsw and Pbswg) are
temperature dependent and modeled in the following.
For zero-bias junction capacitance:

(9.30a)
C j (T ) = C j (Tnom ) (1 + tcj T )

(9.30b)

C jsw (T ) = C jsw (Tnom ) (1 + tcjsw T )

(9.30c)
C jswg (T ) = C jswg (Tnom ) (1 + tcjswg T )

For the built-in potential:

(9.31a)
Pb (T ) = Pb (Tnom ) tpb T

(9.31b)
Pbsw(T ) = Pbsw(Tnom ) tpbsw T

(9.31c)
Pbswg (T ) = Pbswg (Tnom ) tpbswg T

In Eqs. (9.30) and (9.31), the temperature difference is defined as

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MOS Diode Capacitance Model

(9.32)
T = T Tnom

The six new model parameters in the above equations are described
in Table 9-2.

9.2.4 Junction Capacitance Parameters

The following table give a full description of those model parame-

ters used in the diode junction capacitance modeling.

Symbols Symbols
used in used in Description Default Unit
equation SPICE
Cj cj Bottom junction capacitance per 5e-4 F/m2
unit area at zero bias
Mj mj Bottom junction capacitance grad- 0.5 none
ing coefficient
Pb pb Bottom junction built-in potential 1.0 V
Cjsw cjsw Source/drain sidewall junction 5e-10 F/m
capacitance per unit length at zero
bias
Mjsw mjsw Source/drain sidewall junction 0.33 none
capacitance grading coefficient
Pbsw pbsw Source/drain side wall junction 1.0 V
built-in potential
Cjswg cjswg Source/drain gate side wall junc- Cjsw F/m
tion capacitance per unit length at
zero bias
Mjswg mjswg Source/drain gate side wall junc- Mjsw none
tion capacitance grading coeffi-
cient
Pbswg pbswg Source/drain gate side wall junc- Pbsw V
tion built-in potential
tpb tpb Temperature coefficient of Pb 0.0 V/K
tpbsw tpbsw Temperature coefficient of Pbsw 0.0 V/K

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MOS Diode Capacitance Model

Symbols Symbols
used in used in Description Default Unit
equation SPICE
tpbswg tpbswg Temperature coefficient of Pbswg 0.0 V/K
tcj tcj Temperature coefficient of Cj 0.0 1/K
tcjsw tcjsw Temperature coefficient of Cjsw 0.0 1/K
tcjswg tcjswg Temperature coefficient of Cjswg 0.0 1/K

Table 9-2. MOS Junction Capacitance Model Parameters.

9-12 BSIM3v3.2.2 Manual Copyright 1999 UC Berkeley