Diode

Current HmAL
Simplified model

Material: p-type n-type 10

Designation: Anode Cathode
Ideal 8 Real diode
diode
6
Symbol:
4
Positive
2
Voltage HVL
Current flow:
0.5 1 1.5 2
Simplified equivalent circuit V

V is the cut-in voltage, which is material

V dependent
open
closed Si: V ~ 0.6-0.7 V
Ge: V ~ 0.2 V

Forward Reverse
bias bias
Diode: Continues
V
D1
VL
VD1
Vm
+ VS
VS RL Vout
- t

-Vm
Half-wave rectifier D1 ON D1 OFF D1 ON D1 OFF

Equivalent circuit

positive cycle negative cycle

Diode: Continues
V
VS
2VD(ON) VL
D1 D2 Vm

t
VS - +
-Vm
D3 D2 ON D1 ON D2 ON D1 ON
D4 D4 ON D3 ON D4 ON D3 ON

Full-wave rectifier
Transistor
Emitter (E) Base (B) Collector (C)
Collector Collector
N P N

Base Base
IE IC

IB

Emitter Emitter
VEE VCC PNP NPN
Structure of an npn transistor Circuit symbol

Transistor operation mode

Cut off Switch (Open state)
Forward Active Amplifier
Saturation Switch (Closed state)
Reversed Active Rarely used
Transistor: Forward Active Mode
IC
the base-emitter junction acts as a
IB forward biased diode, thus has a
voltage dope of ~ 0.6 V

VBE
IE VBE ~ 0.6 0.7 V

Characteristic curves for an npn transistor in the

common-emitter configuration

From KCL, we get I E = IC + I B (1)

From transistor action IC = I E (2)

values of commercial transistors are betweens 0.95 - 0.99

Eq. (1) and (2) IC = I B

Where = /(1) =current gain (also used hFE)
Transistor: Continues

Example of Transistor Circuit Properties

Configuration
Common Common Common
Base Emitter Collector
Power gain yes yes yes
Voltage gain yes yes no
Current gain no yes Yes
Input resistance 30 3.5 k 580 k
Output resistance 3.1 M 200 k 35

The values depend upon the particular transistor and other circuit
components. To obtain the values int this table, a 2N3904 transistor
was uses with RL = 5000 and Rs = 500
Transistor: Common Collector
VCC
IB

VBB
IE VCC
VBB +
Vout
RL Vout
-

Ri

Vout = VBB VBE VBB 0.7 V Simplified diagram

Thus, we can easily see that Vout follows the input voltage (differed by
VBE drop, and also called Emitter follower)

VBB VBE + I E RL VBE + ( + 1) I B RL If VBE can be neglected, the input

Ri = = =
IB IB IB impedance is therefore equal to (+1)
times RL
Ri ( + 1) RL
Transistor: Common Collector
Given = 100 Simulate using a SPICE progarm:
VCC = 9 V, RL = 10 k
and Vin = 0-5V triangular wave

~0.6-0.7V
Vin
Vout
Vin

Vout

cut-off
 JFET iD
Drain (D)
Depletion Region widens as
vDS is increased, until the
channel is pinched off
Channel

G
p G iG vDS (large)
Gate (G) p n

vGS (constant

S
Source (S) iD

Depletion Depletion
region region

G
G iG vDS (small)

vGS

S
 JFET: Continues

D D
Cutoff: VGS < VP , I D = 0

Triode region: VP VGS 0, VDS VGS VP

G G
V VDS VGS
2

I D = I DSS 2 GS
1 1
VP VP VP
S S
n-channel p-channel Saturation (pinch-off) region:
VP VGS 0, VDS VGS VP
Circuit symbol
VGS 2
I D = I DSS (1 )
VP

where IDSS = the drain-to-source current with the

gate shorted to the source
Vp= the pinch-off voltage
 JFET: Source Follower
VDD Use KVL: VGG + VGS + I D RL = 0

1
ID = (VGG VGS ) (1)
VGG RL

VGS Vout If we assume that the n-channel JFET is in the saturation

region, therefore, we can write the ID-VGS relation as
RL ID 2
V
I D = I DSS 1 GS (2)
VP

To get ID and Vout, we must solve the above two equaitons simultaneously.
ID

2
IDSS
V 1
I D = I DSS 1 GS ID = (VGG VGS )
VP VGG/RL RL

VGS
VP VGG
JFET: Source Follower
Given ID = 1 mA, VP = -2 V Simulate using a SPICE progarm:
VDD = 9 V, RL = 10 k
and Vin = 0-5V triangular wave

Vout

Vin
Vout

Vin
JFET: Source Follower
Given = 100
ID = 1 mA, VP = -2 V
VDD = 9 V, RL = 10 k
and Vin = 0-5V triangular wave

Vout
Vin
Vout

Vin
Operational Amplifier: Op Amp
VCC(+)

I1
Inverting _ _
Input I2
Output
Non-inverting
Input
+ +
V-
V+ Vout

VEE(-)

(a) Electrical Symbol for the op amp (b) Minimum connections to an op amp

Ideal Op Amp Rules:

1. No current flows in to either input terminal
2. There is no voltage difference between the two input terminals

Rule 1: I1 = I2 = 0; R+/- =
Rule 2: V+ = V-; Virtually shorted
 Inverting Amplifier

KCL Rf Use KCL at point A and apply Rule 1:

(no current flows into the inverting input)
R1 v A vin v A vout
_ + =0
A R1 Rf
+ + Rearrange
vin vout 1 1 vin vout
- vA + + = 0
R
1 R f R1 R f

Apply Rule 2: (no voltage difference between inverting and non-inverting inputs)

Since V+ at zero volts, therefore V- is also at zero volts too. vA = 0

vin vout vout Rf
+ =0 =
R1 R f vin R1
 Inverting Amplifier: another approach

No current flows Rf i From Rule 2: we know that V- = V+ = 0,

into op amp
and therefore 0
R1 vin
_ vin + iR1 V = 0 i=
R1
i + +Since there is no current into op amp
vin vout (Rule 1)
- 0
V + iR f + vout = 0 vout = iR f
Combine the results, we get mV
vout
vout Rf 60
= 40
vin R1 20 vin
time
Given vin = 5sin3t, R1=4.7 k and Rf =47 k 1 2 3 4 5 6
-20
vout = -10vin = -50 sin 3t mV -40
-60
 Non-inverting Amplifier

KCL Rf Use KCL at point A and apply Rule 1:

v A v A vout
R1 + =0
R1 Rf
_
A Apply Rule 2: vin = v A
+ +
vout
vin vout Rf
- = 1+
vin R1
mV
vout
60
Given vin = 5sin3t, R1=4.7 k and Rf =47 k 40
20 vin
vout = 11vin = 55 sin 3t mV time
1 2 3 4 5 6
-20
-40
-60
 Summing Amplifier: Mathematic Operation

i = i1 + i2 + i3 Use KCL and apply Rule 1:

i Rf v A v1 v A v2 v A v3 v A vout
+ + + =0
R R R Rf
i1 R vA Since vA = 0 (Rule 2)
_
i2
R vB
+ + Rf
i3
R vout vout = ( v1 + v2 + v3 )
R
v1 -
v2 Sum of v1, v2 and v3
v3
 Difference Amplifier: Mathematic Operation

R4 Use KCL and apply Rule 1:

v A v1 v A vout (1)
+ =0
R1 vA R1 R4
_
R2 vB Since vA = vB (Rule 2) and
+ +
vout R3
v1 v A = vB = (2)
R3 - v2
v2 R2 + R3

vout R1 + R4 R3 v1
Substitute eq. (2) into eq. (1), we get = v
2
R4 R1 R4 R2 + R3 R1

Rf
If R1 = R2 = R and R3 = R4 = Rf vout = ( v2 v1 )
R
Difference of v1and v2
 Differentiator and Integrator: Mathematic Operation
R i
vout = iR
C dvC
_ But i=C and vin = vC
dt
i +
+
vout dvin
vin - vout = RC
dt
Differentiator
C i
vout = vC
+ vc -
R 1
t

But vC (t ) = idt + vC (0) and vin = iR

_ C 0
i + + t
vout 1
vin -
vout =
RC 0
vin dt + vC (0)

Integrator