Online Instructors Manual

to accompany

HCS12 Microcontroller and

Embedded Systems: Using Assembly
and C with CodeWarrior
1st Edition

Muhammad Ali Mazidi

Danny Causey

Prentice Hall

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___________________________________________________________________________________________
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Where those designations appear in this book, and the publisher was aware of a trademark claim, the designations
have been printed in initial caps or all caps.

10 9 8 7 6 5 4 3 2 1

ISBN-13: 978-0-13-504837-5
ISBN-10: 0-13-504837-0
CHAPTER 0: INTRODUCTION TO COMPUTING

SECTION 0.1: NUMBERING AND CODING SYSTEMS

1.
(a) 12 10 = 1100 2
(b) 123 10 = 0111 1011 2
(c) 63 10 = 0011 1111 2
(d) 128 10 = 1000 0000 2
(e) 1000 10 = 0011 1110 1000 2
2.
(a) 100100 2 = 36 10
(b) 1000001 2 = 65 10
(c) 11101 2 = 29 10
(d) 1010 2 = 10 10
(e) 00100010 2 = 34 10
3.
(a) 100100 2 = 24 16
(b) 1000001 2 = 41 16
(c) 11101 2 = 1D 16
(d) 1010 2 = 0A 16
(e) 00100010 2 = 22 16
4.
(a) 2B9 16 = 0010 1011 1001 2 , 697 10
(b) F44 16 = 1111 0100 0100 2 , 3908 10
(c) 912 16 = 1001 0001 0010 2 , 2322 10
(d) 2B 16 = 0010 1011 2 , 43 10
(e) FFFF 16 = 1111 1111 1111 1111 2 , 65535 10
5.
(a) 12 10 = 0C 16
(b) 123 10 = 7B 16
(c) 63 10 = 3F 16
(d) 128 10 = 80 16
(e) 1000 10 = 3E8 16
6.
(a) 1001010 = 0011 0110
(b) 111001 = 0000 0111
(c) 10000010 = 0111 1110
(d) 111110001 = 0000 1111
7.
(a) 2C+3F = 6B
(b) F34+5D6 = 150A
(c) 20000+12FF = 212FF
(d) FFFF+2222 = 12221

8. (a) 24F-129 = 126 16

 (b) FE9-5CC = A1D 16
(c) 2FFFF-FFFFF = 30000 16
(d) 9FF25-4DD99 = 5218C 16

9. (a) Hex: 30, 31, 32 , 33, 34, 35, 36, 37, 38, 39
(b) Binary: 11 0000, 11 0001, 11 0010, 11 0011, 11 0100, 11 0101, 11 0110, 11
0111, 11 1000, 11 1001.

ASCII (hex) Binary

0 30 011 0000
1 31 011 0001
2 32 011 0010
3 33 011 0011
4 34 011 0100
5 35 011 0101
6 36 011 0110
7 37 011 0111
8 38 011 1000
9 39 011 1001

10. 000000 22 55 2E 53 2E 41 2E 20 69 73 20 61 20 63 6F 75 "U.S.A. is a

cou
000010 6E 74 72 79 22 0D 0A 22 69 6E 20 4E 6F 72 74 68 ntry".."in
North
000020 20 41 6D 65 72 69 63 61 22 0D 0A America"..

SECTION 0.2: DIGITAL PRIMER

11. A 1
3
B 2

4
6
C 5

12.
A B C Y
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1
13.
A 1
3
B 2
.
4
6
C 5

14.
A B C Y
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1

15.
A B C Y
0 0 0 0
A 1
3 0 0 1 1
B 2
0 1 0 1
4 0 1 1 0
6
C 5 1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 1

16.
A B C Y
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0
17.
A B C Y
0 0 0 1
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 0

18.
LSB

19.
LSB

20.
CLK D Q
No X NC
Yes 0 0
Yes 1 1

SECTION 0.3: SEMICONDUCTOR MEMORY

21. (a) 4
(b) 4
(c) 4
(d) 1 048 576, 220
(e) 1024K
(f) 1 073 741 824, 230
(g) 1 048 576 K
(h) 1024M
(i) 8388608, 8192K
22. Disk storage capacity / size of a page = (2*230) / (25*80) = 1 million pages
23. (a) 9FFFFh 10000h = 8FFFFh = 589 824 bytes
(b) 576 kbytes
24. 232 1 = 4 294 967 295
25. (a) FFh, 255
(b) FFFFh, 65535
(c) FFFF FFFFh, 4 294 967 295
(d) FFFF FFFF FFFF FFFFh, 18 446 744 073 709 551 615
26. (a) 216 = 64K
(b) 224 = 16M
(c) 232 = 4096 Mega, 4G
(d) 248 = 256 Tera, 262144 Giga, 268435456 Mega
27. Data bus is bidirectional, address bus is unidirectional (exit CPU).
28. The storage of the chip is measured in Megabits while the Computer memory is
measured in Megabytes.
29. True, the more address lines the more memory locations.
30. True, the memory location size is fixed.
31. True, the more data lines the more memory locations
32. True
33. access time
34. True
35. electrically erasable
36. True
37. DRAM
38. SRAM
39. DRAM and SRAM
40. (c)
41. (c)
42. (a) 32Kx8, 256K (f) 8Kx1, 8K
(b) 8Kx8, 64K (g) 4Kx8, 32K
(c) 4Kx8, 32K (h) 2Kx8, 16K
(d) 8Kx8, 64K (i) 256Kx4, 1M
(e) 4Mx1, 4M (j) 64Kx8, 512K
43. (a) 128K 14 8 (f) 256K 8 4
(b) 256K 15 8 (g) 8M 20 8
(c) 512K 16 8 (h) 16M 11 4
(d) 2M 18 8 (i) 512K 16 8
(e) 512K 16 8
44. 4000h - 7FFFh
45.
A0

A11

A12 1
3
A13 1 2 2 ~CS
46. 8000h - 8FFFh, B000h - BFFFh, E000 - EFFFh
47. A0

A12
8kx8
U?
15
A13 1 Y0N 14 ~CS
A14 2 A Y1N 13
A15 3 B Y2N 12
Vcc 6 C Y3N 11
4 G1 Y4N 10
5 G2AN Y5N 9
G2BN Y6N 7
Y7N
74138

Each controls 8K bytes block

48. 6000h - 7FFFh, C000h - DFFFh, E000h - FFFFh
49.
A0

A14
32kx8
U?
15
A15 1 Y0N 14 ~CS
A16 2 A Y1N 13
A17 3 B Y2N 12
Vcc 6 C Y3N 11
4 G1 Y4N 10
5 G2AN Y5N 9
G2BN Y6N 7
Y7N
74138

Each controls 32K bytes block

50. 4000h - 7FFFh, 8000h - BFFFh, C000h - FFFFh

SECTION 0.4: CPU AND HARVARD ARCHITECTURE

51. PC ( Program Counter )

52. ALU is responsible for all arithmetic and logic calculations in the CPU.
53. Address, control and data

SECTION 0.5: RISC ARCHITECTURE

54. RISC stands for "Reduced Instruction Set Computer". CISC stands for "Complex
(or Complete) Instruction Set Computer".
55. CISC
56. RISC
57. RISC
58. CISC
CHAPTER 1: THE HCS12 MICROCONTROLLERS: HISTORY AND
FEATURES

SECTION 1.1: MICROCONTROLLERS AND EMBEDDED PROCESSORS

1. False.
2. True.
3. True.
4. True.
5. CPU, RAM, ROM, EEPROM, I/O, Timer, Serial COM port, ADC.
6. RAM and ROM.
7. Keyboard, mouse, printer.
8. Computing power and compatibility with millions and millions of PCs.
9. PIC 16x Microchip Technology, 8051 - Intel, AVR Atmel, Z8 Zilog,
68HC11 Freescale Semiconductor (Motorola).
10. 8051.
11. Power consumption.
12. The ROM area is where the executable code is stored.
13. Very, in case there is a shortage by one supplier.
14. Suppliers other than the manufacturer of the chip.
15. B is absolutely wrong, 16 bit software can not run on a 8 bit system due to special
instructions and registers. But A can be true (in the case of software
compatibility).

SECTION 1.2: OVERVIEW OF THE CPU12 AND CPU08

16. 512 Kbytes

17. 64 Kbytes
18. 8 Kbytes
19. 4K K1bytes
20. 2
21. Flash
22. Flash
23. (a) 14 Kbytes (b) 12 Kbytes (c) 2 Kbytes
24. OTP (see the letter 'C')
CHAPTER 2: HCS12 ARCHITECTURE & ASSEMBLY LANGUAGE PROGRAMMING

SECTION 2.1: INSIDE THE HCS12

1. 16
2. 8
3. 8
4. FFH
5. necessary
6. The result is 28H, stored in Accumulator A.
7. In (a) and (d) the operand exceeds allowed range. The syntax of (g) is wrong, since
ADDA can have only one operand ( ADDA mybyte , or , ADDA #$50 ).
8. (a), (c) and (d) exceed the allowed range.
9. The result is 44H in accumulator A.
10. The result is FFH in accumulator A.
11. FFH
12. False. There is only one register A and one register B.

SECTION 2.2: THE HCS12 MEMORY MAP

13. 64KBytes
14. True
15. False. Registers are part of Register space.
16. True
17. False
18. False. There are also Register Space and unused space.
19. (a) 14 KBytes
(b) 1 KBytes
20. Data RAM is used to store temporary data, and when power goes off its information is
lost. But, we use EEPROM to store nonvolatile data that must remain intact even when
the power is turned off.
21. Yes, some chips have no EEPROM, page 66.
22. No, the HCS12 needs RAM for volatile data.
23. Flash.
24. 32 KBytes.
25. 0000H
26. Registers 000-3FFF, RAM 0800-3FFF, EEPROM 7000-7FFF, Code ROM C000-FFFF

SECTION 2.3: HCS12 ADDRESSING MODES

27. 800H
28. LDAA #$30
STAA $805
LDAA #$97
STAA $806
29. LDAA #$55
STAA $300
STAA $301
STAA $302
STAA $303
STAA $304
STAA $305
STAA $306
STAA $307
STAA $308
30. LDAA #5F
STAA PORTB
31. (b) LDAA $30 is Extended mode addressing.
32. (a) Direct, (b) Immediate, (c) Extended, (d) Immediate, (e) Inherent, (f) Inherent
33. (a) 3 Byte, (b) 2 Byte, (c) 3 Byte, (d) 2 Byte, (e) 1 Byte, (f) 1 Byte
34. 0000H
35. Direct Addressing
36. Immediate Addressing
37. Direct Addressing
38. Extended Addressing
39. Invalid
40. 800H 8FFH
41. Registers X and Y
42. True

SECTION 2.4: CONDITION CODE REGISTER

43. 8 bit
44. C = bit 0, H = bit 5
45. V = bit 1 , N = bit 3
46. The C flag = 1 when there is a carry out from the D7 bit after an 8-bit arithmetic
operation.
47. The H flag = 1 when there is a carry from the D3 to D4 bit after an 8-bit arithmetic
operation.
48. FFH + 1 = 100H, but since register A is only 8-bit the Z and C flags are both = 1.
49. (a) 118H, so C = 1
(b) FFH, so C = 0
(c) 104H, so C = 1
50. LDAA #$55
ADDA #$55
ADDA #$55
STAA $1200
SECTION 2.5: HCS12 DATA FORMAT AND DIRECTIVES

51. MYDAT_1 = 37H

MYDAT_2 = 62H
MYDAT_3 = 47H
MYDAT_4 = 50H
MYDAT_5 = C8H
MYDAT_6 = 41H
MYDAT_7 = AAH
MYDAT_8 = FFH
MYDAT_9 = 90H
MYDAT_10 = 7EH
MYDAT_11 = 0AH
MYDAT_12 = 0FH

52. DAT_1 = 16H

DAT_2 = 56H
DAT_3 = 99H
DAT_4 = 20H
DAT_5 = F6H
DAT_6 = 7BH

53. R0 EQU $300

R1 EQU $301
R2 EQU $302
R3 EQU $303
R4 EQU $304
R5 EQU $305
(a)
LDAA #$11
STAA R0
STAA R1
STAA R2
STAA R3
STAA R4
STAA R5
(b)
CLRA
ADDA R0
ADDA R1
ADDA R2
ADDA R3
ADDA R4
ADDA R5
SECTION 2.6: INTRODUCTION TO HCS12 ASSEMBLY PROGRAMMING AND
SECTION 2.7: ASSEMBLING AND LINKING A HCS12 PROGRAM

54. low - high

55. Assembly.
56. Assembler
57. True.
58. List file, with extension .lst .
59. False.
60. False. END is optional for HCS12, but is good practice to make the code readable.
61. No.
62. Because they only tell the assembler what to do and do not generate any op-codes.
63. True.
64. False.
65. True.
66. The file with .s19 extension is downloaded.
67. Three file extensions include: .asm , .lst , and .s19 .

SECTION 2.8: STACK AND DATA TRANSFER INSTRUCTIONS

68. The stack pointer points to the last used location.

69. decremented, 2
70. incremented, 2
71. False, RAM is used for stack.
72. True