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2SJ117

Silicon P-Channel MOS FET

ADE-208-1180 (Z)
1st. Edition
Mar. 2001

Application

High speed power switching

Features

High speed switching


Good frequency characteristics
Wide area of safe operation
Suitable for switching regulator, DC-DC converter and ultrasonic power oscillators.

Outline

TO-220AB

D 1
2
3
1. Gate
G 2. Drain
(Flange)
3. Source

S
2SJ117
Absolute Maximum Ratings (Ta = 25C)
Item Symbol Ratings Unit
Drain to source voltage VDSS 400 V
Gate to source voltage VGSS 20 V
Drain current ID 2 A
Drain peak current I D(pulse) 4 A
Body to drain diode reverse drain current I DR 2 A
1
Channel dissipation Pch* 40 W
Channel temperature Tch 150 C
Storage temperature Tstg 55 to +150 C
Notes: 1. Value at TC = 25C

Electrical Characteristics (Ta = 25C)


Item Symbol Min Typ Max Unit Test conditions
Drain to source breakdown V(BR)DSS 400 V I D = 10 mA, VGS = 0
voltage
Gate to source leak current I GSS 1 A VGS = 20 V, VDS = 0
Zero gate voltage drain current I DSS 1 mA VDS = 320 V, VGS = 0
Gate to source cutoff voltage VGS(off) 2.0 5.0 V I D = 1 mA, VDS = 10 V
Static drain to source on state RDS(on) 5 7 I D = 1 A, VGS = 15 V*1
resistance
Forward transfer admittance |yfs| 0.4 0.7 S I D = 1 A, VDS = 20 V*1
Input capacitance Ciss 520 pF VDS = 10 V, VGS = 0,
Output capacitance Coss 110 pF f = 1 MHz
Reverse transfer capacitance Crss 15 pF
Turn-on delay time t d(on) 10 ns I D = 2 A, VGS = 15 V,
Rise time tr 25 ns RL = 15
Turn-off delay time t d(off) 45 ns
Fall time tf 35 ns
Body to drain diode forward VDF 0.8 V I F = 1 A, VGS = 0
voltage
Body to drain diode reverse t rr 300 ns I F = 1 A, VGS = 0,
recovery time diF/dt = 100 A/s
Note: 1. Pulse test

2
2SJ117
Waveforms
Switching Time Test Circuit
Vin
Vin Monitor
10%
Vout Monitor
D.U.T 90%
RL 90% 90%

50 Vout 10%
VDD 10%
Vin .
=. 30 V
15 V td (on) tr td (off) tf

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