EXPERIMENT 1

REALIZATION OF GATES USING DISCRETE COMPONENTS

Aim: To construct logic gates OR, AND, NOT, NOR, NAND using discrete components and
verify their truth tables
Apparatus:
1. Bread Board
2. Resistors 10k,1k,220ohms
3. Transistors 2N2222(NPN)
4. Diodes 1N 4001
5. Connecting wires

Circuit Diagrams: TRUTH TABLE

Procedure:
1. Connections are made as per the circuit diagram
2. Switch on the power supply
3. Apply different combinations of inputs an d observe the outputs; compare the outputs with the
truth tables.
Precautions:
All the connections should be made properly.
Result: Different logic gates are constructed and their truth tables are verified.
 EXPERIMENT 2
REALIZATION OF GATES USING UNIVERSAL GATES
Aim: To construct logic gates NOT, AND, OR, EX-OR,EX-NOR using Universal gates and
verify their truth tables .
Apparatus:
1. IC’s – 7400 & 7402
2. Bread Board
3. Connecting wires.
Circuit Diagrams: TRUTH TABLE

Using NAND Gates only

Using NOR Gates only

Input A Output Q
NOT Gate
0 1

1 0

Input A Input B Output Q

OR Gate 0 0 0

0 1 1

1 0 1

1 1 1

AND Gate Input A Input B Output Q

0 0 1

0 1 1

1 0 1

1 1 0

Procedure:
1. Connect the logic gates as shown in the diagrams.
2. Apply the 0v or 5v from the logic input switches in different combinations at the inputs A &
B.
3. Monitor the output using logic output LED indicators.
4. Repeat steps 1 to 3 for NOT, AND, OR, EX – OR & EX-NOR operations and compare the
outputs with the truth tables.
Precautions:
1. All the connections should be made properly.
2. IC should not be reversed.
Result: Different logic gates are constructed using Universal gates and their truth tables are
verified.
 STUDY OF R-S & J-K FLIP-FLOPS

1. Aim: To verify truth tables of RS and JK flip-flops using logic gates.

2. Apparatus required:

Power Supply : 5V
Bread Board :1 No
IC 7400 – NAND Gate:2 No
IC 7410 – NAND Gate (3 i/p) :2 No
LEDs
Connecting Wires

3. Theory:

Flip-flop is a digital circuit which is having a combinational circuit and a memory unit .so
the output of flip flop is depends upon the previous state of the outputs. This flip-
flop consists two outputs one is complemented of the other. These flip-flops are
having very much applications in digital circuitry.

4. Circuit diagrams:

(i). SR FLIP-FLOP

Truth Table for S-R Flip-Flop:

 (ii). JK FLIP FLOP

Truth Table for J-K Flip-Flop:

5. Procedure:

1. Place the required NANAD gate IC‟s on the bread board.

2. Connect Vcc (Power Supply) and Ground to the corresponding pin numbers
of IC as shown in Appendix.

3. Connect the NAND gates terminals as shown in the figure .

4. Apply input voltages 0 volts for logic 0 , 5 volts for logic 1.

5. Verify the truth table of SR & JK Flip Flop

6. Result: The operations and truth tables of SR and JK flip flops are observed
 NON-LINEAR WAVE SHAPING (CLIPPERS)
1. Aim: To obtain the output characteristics of various diode clipper circuits.

2. Apparatus required:

Bread Board:1 No
Function Generator:1 No
Diodes:2 No
DC Regulated Power Supply: (0-30V; 1 Amp)
BNC Cables:3No
Connecting Wires

3. Theory:

The basic action of a clipper circuit is to remove c e r t a i n portions of the

waveform above or below certain levels as per the requirements. Thus the circuits
which are used to clip off unwanted portion of the waveform, without distorting
the remaining part of the waveform are called clipper circuits or Clippers. The
half wave rectifier is the best and simplest type of clipper circuit which clips off
the positive/negative portion of the input signal. The clipper circuits are also called
limiters or slicers.
4. Circuit diagrams:

Positive peak clipper with reference voltage, V=2V

Positive Base Clipper with Reference Voltage, V=2V

Negative Base Clipper with Reference Voltage,V=-2V

Negative peak clipper with reference voltage, V=-2v

Slicer Circuit:

5. Procedure:

i. Connect the circuit as per circuit diagram shown in Figure. Obtain a sine wave of
constant amplitude 8 V p-p from function generator and apply as input to the circuit .
ii. Observe the output waveform and note down the amplitude at which clipping
occurs.
 iii. Draw the observed output waveforms.
iv. To obtain the transfer characteristics apply dc voltage at input terminals and vary the
voltage insteps of 1V up to the voltage level more than the reference voltage and
note down the corresponding voltages at the output.
v. Plot the transfer characteristics between o u t p u t and inputvoltages.
vi. Repeat the steps (i) to(v) for all other circuits.

6. Model wave forms and Transfer characteristics

Positive peak clipper: Reference voltage V=2v

Positive base clipper: Reference voltage V=2v

Negative base clipper: Reference voltage V=2v

Negative peak clipper: Reference voltage V=2v

Slicer Circuit:

7. Result:

Performance of different clipping circuits is observed, their transfer characteristics are

obtained and graphs are plotted for the circuits
 NON-LINEAR WAVE SHAPING (CLAMPERS)
1. Aim: To obtain the output characteristics of various diode clamper circuits.

2. Apparatus required:

Bread Board:1 No
Function Generator:1 No
Diodes:2 No
DC Regulated Power Supply:(0-30V; 1 Amp)
BNC Cables :3No
Connecting Wires

3. Theory:

The circuits which are used to add a d.c level as per the requirement to the a.c
signals are called clamper circuits. Capacitor, diode, resistor are the three basic
elements of a clamper circuit. The clamper circuits are also called d.c restorer or d.c
inserter circuits. The clampers are classified as

1. Negative clampers

2. Positive clampers

4. Circuit Diagrams

Positive peak clamping to 0V :

 Positive peak clamping to Vr=2v

Negative peak clamping to Vr=0v

Negative peak clamping to Vr= -2v

5. Procedure:

1. Connect the circuit as per circuit diagram.

 2. Obtain a constant amplitude sine wave from function generator of 6 V, frequency of
1KHz and give the signal as input to the circuit.

3. Observe and draw the output waveform and note down the amplitude at which
clamping occurs.

4. Repeat the steps 1 to 3 for all circuits.

6. Model waveforms:

Positive peak clamping to 0V:

Positive peak clamping to Vr=2V

Negative peak clamping to 0V

 Negative peak clamping to Vr= -2V

7. Result:

Different clamping circuits are constructed their performance is observed and graphs are
plotted for the circuit
 LINEAR WAVE SHAPING – RC LOW PASS
1. Aim: To study the response of RC Low Pass Circuit applied with a given square
waveform for T<<RC,T=RC and T>>RC and to calculate the rise time of the circuit.

2. Apparatus required:

Bread Board :1 No
Function Generator :1 No
Decade Resistance Box :1 No
Decade Capacitance Box :1No
BNC Cables :3No
Connecting Wires

3. Theory:

The process whereby the form of a non sinusoidal signal is altered by

transmission through a linear network is called “linear wave shaping” An ideal low pass
circuit is one that allows all the input frequencies below a frequency called c u t o f f
f r e q u e n c y f c and a t t e n u a t e s a l l t h o se a bo ve t h i s frequency. For the low pass circuit
when RC >> T, for the high value of capacitor it take more time to charge and RC << T it
takes less time to charge and discharge.

4. Circuit Diagram:

5. Response of the circuit for different time constants:

Time period of the circuit T = _____ ms

 1. Apply a square wave of 2v p-p amplitude as input.

2. Adjust the time constant of the circuit (RC) so that T>>RC, T=RC, T<<RC and
observe the output in each case.

3. Draw the input and output wave forms for different cases.

6. Model Graphs and Wave forms

Low Pass RC circuit

7. Result: The response of RC low pass circuit app lied with square wa ve f or
vario us conditions o f RC compared with T is studied, graphs are plotted and
rise time of the circu it is calcu la ted.
 LINEAR WAVE SHAPING – RC HIGHPASS
1. Aim: To study the response of RC High Pass Circuit applied with a given
square waveform for T<<RC,T=RC and T>>RC and to calculate % tilt of the circuit.

2. Apparatus required:

Bread Board :1 No
Function Generator :1 No
Decade Resistance Box :1 No
Decade Capacitance Box :1No
BNC Cables :3No
Connecting Wires

3. Theory:

The process whereby the form of a non-sinusoidal signal is altered by

transmission through a linear network is called “linear wave shaping” An ideal H i g h pass
circuit is one that allows all the input frequencies a b o v e a frequency called c u t o f f
f r e q u e n c y f c and a t t e n u a t e s a l l th o se below t h i s frequency. For the High pass circuit
when RC >> T, for the high value of capacitor it resemble the input signal i.e square wave
and RC << T it gives peaks in the output response and it double the input signal amplitude.
This circuit is also called peaking circuit.

4. Circuit Diagram:

5. Response of the circuit for different time constants:

Time period of the circuit T= _______ ms

1. Apply a square wave of 2v p-p amplitude as input.

 2. Adjust the time constant of the circuit so that T>>RC, T=RC, T<<RC
and observe the output in each case.

3. Draw the input and output wave forms for different cases.

6. Model Graphs and Wave forms

High Pass RC circuit

7. Result: The response of RC High pass circuit app lied wit h square wa ve
f or various conditions o f RC co mpared with T is st udied, graphs a re p
lotted and % tilt of the circuit is calculated