Stretchable Silicon and its Biomedical

Applications
Rachit Mohan, 4039513

I. Introduction

Stretchable or flexible electronics is a growing area of interest. At present the integrated electronic
industry cannot fulfil all the market requirements. There are a whole host of applications like
biomedical implants, wearable electronics, paper-like displays that require flexible or stretchable
technology. This flexibility of technology will allow the devices to be more easily integrated into our
environment.

A great number of electronic devices available which are foldable make use of available flexible
printed circuit boards. However their “bendiness” is limited to only one axis at a time. To conform to
a real 3D shape, the device should be flexible in all directions on the sub-millimeter scale. This can be
achieved only if the wiring substrate is stretchable [1]. Hence there is a need for creating
“stretchable silicon”. The goal is not only to develop a process of fabricating stretchable silicon but
also so that it conforms to the existing CMOS technology for the convenience of seamless
integration.

Since silicon is a rigid material, we need to apply tricks to make the system stretchable. The most
straightforward method is to divide the whole system into multiple nodes of “silicon islands”. Each
of these islands is then interconnected by a stretchable element [2] Fig 1. This can be achieved in
two different ways.

Figure 1 - Connecting functional silicon nodes with stretchable interconnect [2]

-The required electronic circuit is fabricated as usual on rigid silicon substrate and the stretching
mechanism is introduced by creating a free-standing metal or silicon interconnection between the
modules from the remaining area on the substrate.
- Fabricate and then transfer the rigid electronic circuit/module onto a flexible polymer substrate.
Then the interconnection between the modules is made stretchable to make the whole system
expandable.

The drawback of the second approach is the difficulty in integration of high performance electronics.
Usually in this approach, it is imperative to have the electronic circuits close-by for a good
performance which might not be feasible in such systems [3]. Therefore the choice of method and
interconnection scheme is decided by various factors such as size of the system, application, and
amount of interconnection.

In Sections II and III the fabrication sequences for each of the two approaches is presented. Section
IV analyses the relative advantages and disadvantages of both the methods. A few of the possible
applications are presented Section V.

II. Free-standing metal interconnect

There have been many interconnect materials investigated for creating such an interconnect scheme
– deformable metal such as Cu, high aspect parylene beams [3] or simply connect different the
silicon islands by spiral-like structures. These metals have to be appropriately shaped into spirals to
enhance their stretchability and durability. The choice of shape itself can greatly affect the
elongation properties of the system [2].

The processing steps for realizing the interconnection by using metals such as Cu or Al is presented
first. In this method, the interconnect metal is formed on the front side of the wafer by deposition of
the metal layer (Cu or Al). The interconnect metal becomes a free-standing one after subsequent
silicon segmentation and removal of the sacrificial metal layer. The metal interconnect is then
patterned into a mesh shape to increase its elongation and durability. One advantage of this method
are that the interconnect layer is a metallic one, thus multiple signal wires between islands
realizable. But copper has a permanent character of plastic deformation and thus can be stretched
only a bit.

The Fig. 2 below describes the above steps in detail. Firstly, a 4um thick Al layer is sputtered to act as
an etch-stop and also as a mechanical support. On the wafer back-side a 6um PECVD oxide is
deposited. It is then patterned to define a terraced oxide layer for DRIE masking. This, thus allows
DRIE formation of silicon islands.

A parylene layer of 10um thickness is deposited on the back-side of the wafer as a protection. Since
by this time, the wafer has become quite fragile, a carrier wafer is used to support it as well as mask
the front-side. The Al layer is then removed and another sacrificial resist layer, AZ 9260, of 5um
thickness is formed. This layer is then patterned to open the interconnect anchoring points. The
metal that is intended to be used for interconnect is deposited on the resist. Finally the protective
parylene layer and the resist layer are removed by oxygen plasma etching. Thus what is left is the
arrays anchored to the wafer frame and the suspended interconnects. A thin layer of parylene can
be additionally added to provide further mechanical support and protection.
 Figure 2 - Fabrication sequence [2]

We will next examine the formation of stretchable metal interconnects using high aspect parylene
beams. In this approach, flexible meander-shaped parylene beams in which metal wires are
embedded are used.

Parylene is a polymer that is deposited at low pressures and room temperature and which results in
pinhole-free layers. It can conform to virtually any shape including sharp edges and crevices. Its
biocompatibility has been already proven in implantable medical devices such as pacemaker and
defibrillator.
The height of these parylene beams is equal to the silicon substrate. This helps in providing
mechanical support by partially compensating the loss of stiffness of the segmented silicon and thus
increases the reliability. The maximum elongation is determined by the mechanical properties of the
embedded metal layer. The deformations, as opposed to the first approach are reversible and
elastic.

Like in the first method, the fabrication sequence can be divided into front and back side of the
wafer. The front-side is processed first. The standard CMOS procedure applies and the metal
interconnects are patterned into a meander-shape. An Al layer is then sputtered on the front-side
which would act as an etch-stop for DRIE process that would be carried out on the backside and as a
mechanical support. The sputtered layer and the metal interconnect layer are isolated by a
separation layer of silicon oxide. An overview of the fabrication sequence is shown in the figure
below.

Through wafer trenches are then created on the backside by the Bosch DRIE process. This silicon
trench acts as a scaffold for formation of high aspect parylene beams. These trenches are then
coated with a parylene layer. The sacrificial separation layer silicon oxide is partially or completely
removed using a dry process. Depending on the width of the trenches and thickness of parylene,
some trenches are completely filled whereas some stay wide open. Parylene penetration depths of
around 1mm can be expected for 20um thick trenches. Parylene is etched only vertically in fully filled
trenches whereas they are also etched horizontally in wide-open ones. This exposes the silicon side-
walls of the fully-filled trenches which can then later be removed by subsequent processing. Finally,
the etch-stop layer is removed by a PES etch.

Figure 3 - Simplified fabrication sequence of parylene beams [3]

III. Flexible polymer substrate

Another popular approach is to fabricate these silicon islands on a polymer substrate such as PDMS
(polydimethylsiloxane) and once again connect them with stretchable metal interconnect. The
polymer substrate is soft and compliant and thus the whole structure is deformable as much of the
deformation is taken up by the largely exposed substrate.

Figure 4 - elastic electronic surface on a flexible substrate [4]

The stretchable metal interconnect used currently in these cases are silicones (conductive rubber).
But their electrical resistivity is not only high but also depends a lot on the strain that they are
subjected to. This paper [4] has proposed using thin film of gold as a conductor instead. They grew a
100nm gold film of a PDMS substrate and reported experimental results of achieving 15% reversible
elongation while maintaining electrical conduction.

Thin gold films of around 100-500nm thickness and a 5nm thick adhesion of chromium are deposited
in one run by electron beam evaporation on the PDMS at room temperature. The deposition is
carried out at a rate of 0.002nm/s at 1mPa. The PDMS substrate can either be relaxed during the
deposition process or stretched although the type of shadow mask used would differ in each case.

In a relaxed substrate, a shadow mask of 0.5um thick polyimide foil is used to pattern the thin film
gold on PDMS. In the pre-stretched position, metal film is patterned using dry photo-resist. On
relaxation of the substrate after patterning, the gold film will form surface waves.

IV. Comparison

In the second approach, the biggest drawback is its reliability. The substrate PDMS/PI directly
transfers the stress to the electrical interconnections thus causing disconnection and reduction in
reliability [3],[4]. It could be improved by embedding the interconnection in a material with a lower
Young’s modulus [3].

Figure 5 - Transfer of strain to silicon islands and interconnection

By removing the stretchable substrate completely such as in the first approach would get rid of this
problem permanently. But this is at the cost of lower achievable stretchability and possibly plastic
deformation also. The stretchability can be further improved by investigating further mesh
geometries [2]. In the second approach, the yield strains of about 15% can be achieved [4] whereas
in the first case with parylene coating yield strains of 3% can be obtained [2].

Another parameter to be considered is the change in electrical characteristics from the relaxed
position to the stretched position. [3], which has followed the second approach, has reported
resistance change of around 250% between relaxed and maximum stretched position.

V. Biomedical Applications

Stretchable silicon is quite important in the context of biomedical devices especially implantable
ones. As stated earlier since flexible implantable devices are less obtrusive and more body-friendly,
stretchable silicon helps in increasing the horizon of possible applications and devices in the
biomedical field. Below, three such applications are discussed– stretchable 2D array of ISFET devices
which would be used for biomedical imagers, electronic eye and fingernail sensors.

A. Biomedical Imagers [5]

In this work, the authors have aimed to develop a 2D array of ISFET devices to be used as ion-
sensitive biomedical imagers. They identified three basic specifications that would be required to
realize such a device:
1. Integration of flexible metal interconnects for addressing and powering individual
devices.
2. Selective biocompatible encapsulation and opening of sensitive ISFET devices.
3. Possibility to address large arrays through limited amount of available interconnects.

The arrays generate a large amount of data and therefore need CMOS available side by side to aid in
processing. The addressing requirements could be relaxed by utilizing multiplexing techniques which
again would require CMOS integration [6].

Thus for all these reasons, the authors decided to go with the first approach of making the system
stretchable. For encapsulation they used parylene coating. They used parylene also for
encapsulation and integration of metal interconnection.

B. Electronic Eye [1]

In this work, the electronic eye has not been developed per se but the authors have tried to take a
step in that direction. The device should have a hemispherical shape, similar to the human eye. This
would require strains in the range of 20-40% and simple bendability wouldn’t suffice.

Therefore the authors have proposed and demonstrated the feasibility of using carbon nanotubes as
interconnection material on top of the PDMS substrate, quite similar to the gold interconnect
scheme discussed above. The advantage of using carbon nanotubes is the superior electrical
resistivity offered. The authors have reviewed various geometries of the layout for robustness in [7].
 Figure 6 - Covering of golf ball surface with elastic silicon

C. Fingernail sensors [8]

A fingernail sensor uses photoplethysmography to measure the change in blood perfusion in the
fingernail bed and thus sense the touch. Thus stretchable silicon incorporating LEDs and
photodetectors needs to be fabricated.
The authors have built upon the second approach of depositing metal lines on pre-stretched PDMS.
But due to the shape of our fingernail, instead of stretching laterally, they stretched it radially to
obtain a better performance.

VI. Conclusion

Truly stretchable silicon has now moved from just a concept to reality. In this essay, possible
methods of fabricating it have been presented. From comparing the results of different approaches,
it became clear that there is no one fixed methodology for creating a stretchable system and it
would vary depending on application. A few possible applications were also briefly looked at.

References

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