IRF9530, RF1S9530SM

Data Sheet January 2002

12A, 100V, 0.300 Ohm, P-Channel Power Features

MOSFETs • 12A, 100V
These are P-Channel enhancement mode silicon gate power
• rDS(ON) = 0.300Ω
field effect transistors. They are advanced power MOSFETs
designed, tested, and guaranteed to withstand a specified • Single Pulse Avalanche Energy Rated
level of energy in the breakdown avalanche mode of • SOA is Power Dissipation Limited
operation. All of these power MOSFETs are designed for
applications such as switching regulators, switching • Nanosecond Switching Speeds
convertors, motor drivers, relay drivers, and drivers for high • Linear Transfer Characteristics
power bipolar switching transistors requiring high speed and
• High Input Impedance
low gate drive power. The high input impedance allows these
types to be operated directly from integrated circuits. • Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Formerly developmental type TA17511.
Components to PC Boards”

Ordering Information Symbol

PART NUMBER PACKAGE BRAND D

IRF9530 TO-220AB IRF9530

RF1S9530SM TO-263AB RF1S9530

G
NOTE: When ordering, use the entire part number. Add the suffix 9A to
obtain the TO-263AB variant in the tape and reel, i.e., RF1S9530SM9A.
S

Packaging
JEDEC TO-220AB JEDEC TO-263A

SOURCE
DRAIN
GATE DRAIN
(FLANGE)
GATE
DRAIN (FLANGE) SOURCE

©2002 Fairchild Semiconductor Corporation IRF9530, RF1S9530SM Rev. B

 IRF9530, RF1S9530SM

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified

IRF9530,
RF1S9530SM UNITS
Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS -100 V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR -100 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID -12 A
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID -7.5 A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM -48 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS ±20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD 75 W
Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6 W/oC
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS 500 mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL 300 oC
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg 260 oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:
1. TJ = 25oC to TJ = 125oC.

Electrical Specifications TC = 25oC, Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BVDSS ID = -250µA, VGS = 0V, (Figure 10) -100 - - V
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = -250µA -2 - -4 V
Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - -25 µA
VDS = 0.8 x Rated BVDSS, VGS = 0V, TC= 125oC - - -250 µA
On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX, VGS = -10V, -12 - - A
(Figure 7)
Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA
Drain to Source On Resistance (Note 2) rDS(ON) ID = -6.5A, VGS = -10V, (Figures 8, 9) - 0.250 0.300 Ω
Forward Transconductance (Note 2) gfs VDS > ID(ON) x rDS(ON) Max, ID = -6.5A 2 3.8 - S
(Figure 12)
Turn-On Delay Time td(ON) VDD = 50V, ID ≈ -12A, RG = 50Ω, VGS = 10V - 30 60 ns
Rise Time tr RL = 4.2Ω, (Figures 17, 18) - 70 140 ns
MOSFET Switching Times are Essentially Inde-
Turn-Off Delay Time td(off) - 70 140 ns
pendent of Operating Temperature
Fall Time tf - 70 140 ns
Total Gate Charge Qg(TOT) VGS = -10V, ID = -12A, VDSS= 0.8 x Rated BVDSS, - 25 45 nC
(Gate to Source + Gate to Drain) (Figure 14, 19, 20) Gate Charge
Gate to Source Charge Qgs is Essentially Independent of Operating - 13 - nC
Temperature
Gate to Drain (“Miller”) Charge Qgd - 12 - nC
Input Capacitance CISS VDS = -25V, VGS = 0V, f = 1MHz, (Figure 11) - 500 - pF
Output Capacitance COSS - 300 - pF
Reverse Transfer Capacitance CRSS - 100 - pF
Internal Drain Inductance LD Measured From the Modified MOSFET - 3.5 - nH
Contact Screw On Tab To Symbol Showing the
Center of Die Internal Devices
Measured From the Drain Inductances - 4.5 - nH
D
Lead, 6mm (0.25in) From
Package to Center of Die LD
Internal Source Inductance LS Measured From The - 7.5 - nH
Source Lead, 6mm G
(0.25in) From Header to LS
Source Bonding Pad
S

Thermal Resistance Junction to Case RθJC - - 1.67 oC/W

Thermal Resistance Junction to Ambient RθJA Typical Socket Mount - - 62.5 oC/W

©2002 Fairchild Semiconductor Corporation IRF9530, RF1S9530SM Rev. B

 IRF9530, RF1S9530SM

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current ISD Modified MOSFET - - -12 A
Symbol Showing the In- D
Pulse Source to Drain Current ISDM - - -48 A
tegral Reverse
(Note 2)
P-N Junction Diode
G

Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = -12A, VGS = 0V, - - -1.5 V
(Figure 13)
Reverse Recovery Time trr TJ = 150oC, ISD = -12A, dISD/dt = 100A/µs - 300 - ns
Reverse Recovery Charge QRR TJ = 150oC, ISD = -12A, dISD/dt = 100A/µs - 1.8 - µC
NOTES:
2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.
3. Repetitive rating: pulse width limited by max junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 25V, starting TJ = 25oC, L = 5.2mH, RG = 25Ω, peak IAS = 12A. See Figures 15, 16.

Typical Performance Curves Unless Otherwise Specified

1.2 -12.0
POWER DISSIPATION MULTIPLIER

1.0
-9.6
ID, DRAIN CURRENT (A)

0.8
-7.2

0.6
-4.8
0.4

-2.4
0.2

0 0
0 25 50 75 100 125 150 25 50 75 100 125 150
TC , CASE TEMPERATURE (oC) TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE CASE TEMPERATURE

1
THERMAL IMPEDANCE
ZθJC, NORMALIZED

0.5

0.2

0.1 PDM
0.1
0.05
0.02
0.01 t1
SINGLE PULSE t2 t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC + RθJA +TC
0.01
10-5 10-4 10-3 10-2 10-1 1 10
t 1, RECTANGULAR PULSE DURATION (s)

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

©2002 Fairchild Semiconductor Corporation IRF9530, RF1S9530SM Rev. B

 IRF9530, RF1S9530SM

Typical Performance Curves Unless Otherwise Specified (Continued)

-100 -20
VGS = -9V
VGS = -10V
10µs -16

ID, DRAIN CURRENT (A)

ID, DRAIN CURRENT (A)

100µs VGS = -8V

-10 PULSE DURATION = 80µs
-12 DUTY CYCLE = 0.5% MAX
1ms
VGS = -7V
OPERATION IN THIS 10ms -8
AREA MAY BE VGS = -6V
100ms
-1 LIMITED BY rDS(ON)
DC
TC = 25oC -4 VGS = -5V
TJ = MAX RATED VGS = -4V
SINGLE PULSE
-0.1 0 -10 -20 -30 -40 -50
-1 -10 -100 -1000
VDS, DRAIN TO SOURCE VOLTAGE (V) VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

-10 -20
VDS ≥ I D(ON) x rDS(ON)

ID(ON), ON-STATE DRAIN CURRENT (A)

VGS = -7V
PULSE DURATION = 80µs
VGS = -8V
-8 -16 DUTY CYCLE = 0.5% MAX
ID, DRAIN CURRENT (A)

VGS = -9V
VGS = -6V
VGS = -10V
-55oC
-6 -12
25oC
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
-4 -8 125oC
VGS = -5V

-2 -4
VGS = -4V

0 0
0 -2 -4 -6 -8 -10 0 -2 -4 -6 -8 -10
VDS, DRAIN TO SOURCE VOLTAGE (V) VGS, GATE TO SOURCE VOLTAGE (V)

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

1.0
2µs PULSE TEST 2.2
VGS = -10V, ID = -6.5A
PULSE DURATION = 80µs
rDS(ON) DRAIN TO SOURCE

NORMALIZED DRAIN TO SOURCE

0.8 VGS = -10V DUTY CYCLE = 0.5% MAX

1.8
ON RESISTANCE (Ω)

ON RESISTANCE

0.6
1.4

0.4
VGS = - 20V 1.0

0.2
0.6

0
0 -10 -20 -30 -40 -50 0.2
-40 0 40 80 120
ID, DRAIN CURRENT (A)
TJ , JUNCTION TEMPERATURE (oC)
NOTE: Heating effect of 2µs pulse is minimal.
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
VOLTAGE AND DRAIN CURRENT RESISTANCE vs JUNCTION TEMPERATURE

©2002 Fairchild Semiconductor Corporation IRF9530, RF1S9530SM Rev. B

 IRF9530, RF1S9530SM

Typical Performance Curves Unless Otherwise Specified (Continued)

1.25 1000
ID = 250µA VGS = 0V, f = 1MHz
CISS = CGS + CGD
NORMALIZED DRAIN TO SOURCE

800 CRSS = CGD

1.15
COSS ≈ CDS + CGD
BREAKDOWN VOLTAGE

C, CAPACITANCE (pF)
1.05 600
CISS

0.95 400 COSS

0.85 200 CRSS

0.75 0
-40 0 40 80 120 160 0 -10 -20 -30 -40 -50
TJ , JUNCTION TEMPERATURE (oC) VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
VOLTAGE vs JUNCTION TEMPERATURE

5 -100
TJ = -55oC PULSE DURATION = 80µs
TJ = 25oC DUTY CYCLE = 0.5% MAX
gfs, TRANSCONDUCTANCE (S)

4 TJ = 125oC
ISD, DRAIN CURRENT (A)

TJ = 150oC
-10
3

2
TJ = 25oC
-1.0

1
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
0 -0.1
0 -4 -8 -12 -16 -20 -0.4 -0.6 -0.8 -1.0 -1.2 -1.4 -1.6 -1.8
ID , DRAIN CURRENT (A) VSD, SOURCE TO DRAIN VOLTAGE (V)

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

0
I D = -12A
VGS, GATE TO SOURCE (V)

-5

- 10
VDS = -20V
VDS = -50V VDS = -80V

- 15

0 8 16 24 42 40
Qg(TOT) , TOTAL GATE CHARGE (nC)

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

©2002 Fairchild Semiconductor Corporation IRF9530, RF1S9530SM Rev. B

 IRF9530, RF1S9530SM

Test Circuits and Waveforms

VDS
tAV

L 0

VARY tP TO OBTAIN
REQUIRED PEAK IAS RG
-
VDD
+

0V DUT VDD
tP IAS
VGS
VDS
IAS tP
0.01Ω
BVDSS

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

tON tOFF

td(ON) td(OFF)

tr tf
0
RL 10% 10%

DUT - VDS
VDD 90% 90%
RG
VGS + VGS
0
10%

50% 50%
PULSE WIDTH
90%

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
-VDS
CURRENT (ISOLATED
REGULATOR SUPPLY) 0

VDS
DUT
12V
0.2µF 50kΩ
BATTERY
0.3µF
Qgs VGS
Qgd
D
Qg(TOT)
G DUT
VDD

0
IG(REF) S 0
+VDS
IG CURRENT ID CURRENT
SAMPLING SAMPLING IG(REF)
RESISTOR RESISTOR

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

©2002 Fairchild Semiconductor Corporation IRF9530, RF1S9530SM Rev. B

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PRODUCT STATUS DEFINITIONS
Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

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Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.

Rev. H4
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