EE334

State Machine Design

Today’s lesson is another example of it all coming together. Today you will learn how to design
state machines out of flip-flops. The design process uses many of the logic principles and
practices that you’ve learned over the past several lecture periods. You’ll walk through one
design step-by-step and then do another on your own. A key point about this design process is
that it can only be used for edge-triggered synchronous devices.

000

101 001

100 010

011

Figure 1. Mod-6 Up Counter

You’ll first design a mod-6 up counter, the state diagram of which is shown in Figure 1.

1. The mod-6 counter is a ___________-bit device.

2. The counter will be built using T flip-flops. How many T flip-flops are needed?

3. With three bits, you can count from 000 to 111, for a total of ___________ states.

4. The counter is missing two states. List them.

5. The MSB of the counter’s three bits is labeled Q2, the middle bit is Q1, and the LSB is Q0,
fill out the following table to show the progression of the counter. The table arbitrarily starts
with the bit pattern 000.

Q2 Q1 Q0
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State Machine Design
Table 1. A truth table for the mod-6 up counter problem.
Present State Next State Flip-Flop Inputs
Q2 Q1 Q0 Q’2 Q’1 Q’0 T2 T1 T0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

Listed here are all the For each present List here the commands
possible states of the state, fill in the bit (flip-flop inputs) that need
machine. pattern of the next to be given to each flip-flop
state. to make its Q value change
from its Present State to its
Next State
Shown above in Table 1 is a blank truth table that you’ll use to generate the control logic for the
flip-flops. What is “control logic”? To build the counter, we have to control the behavior of the
flip-flops. That is we need to make them change their outputs so that the bit pattern of the mod-6
up counter is realized. Remember, this is a state machine. The machine’s next state depends on
the state its in now. In this case, since you’re using T flip-flops, the control logic will feed the Q
values of the counter’s three flip-flops through some logic gates (ironically, sometimes no logic
gates are needed) that will generate the values for the flip-flop inputs T2, T1, and T0.

6. Fill in the Next State portion of the truth table in Table 1. Use the state diagram and the table
you completed on the previous page (problem #5) to guide you. Note: Eight states are listed
in the Present State columns, but only six are actually used. What do you do about the Next
State entries for the two missing states?

7. Use the truth table for the T flip-flop to fill in the Flip-Flop Inputs column of Table 1. You
need to think about the input value that a T flip-flop needs to make it move from its current
state (bit value of 0 or 1) to the next required state. For example, in the first row, the flip-
flop controlling Q2 needs to remain a 0 (Q’2 = Q2 = 0). Thus, the input of the flip-flop
controlling Q2, which is labeled T2, needs to be set to 0. On the other hand, T0 needs to
receive a 1 input (the toggle command) because Q0 changes from 0 to 1 (Q2 = 0, but Q’2 = 1).
The first row has been done for you.

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State Machine Design
The next step is to generate the logic that will determine the input signals for each T flip-flop.
Remember that the logic needs to use the current state of the machine to generate the signals that
will put the flip-flops in their next state. Each flip-flop will be done separately to avoid
confusion while learning.

8. Set up a blank K-map for the Q values. (A k-map for three variables.) This K-map
represents the eight possible Present States.

9. Focus on the T2 column of Table 1. Fill in the K-map of problem #8 using the T2 column.

10. Since the T2 column contains the commands for the flip-flop that maintains Q2, if we use the
K-map to generate a logic equation and implement the logic, that logic will generate the input
signals for T2 and make Q2 behave as is required to count. Use the K-map of problems #8
and #9 to make a simplified logic equation for T2.

T2 =

11. Repeat problems #8, #9, and #10 but for T1.

T1 =

12. Repeat problems #8, #9, and #10 for T0.

T0 =

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State Machine Design
Now it’s time to complete the design by drawing a circuit diagram.

13. Lay out as many T flip-flops as are needed. If you can’t remember how many, look at the
first page. The flip-flops should be edge-triggered and share a common clock. Decide
which flip-flop is producing which output (Q2, Q1, and Q0) and label them accordingly.
Don’t forget to label the flip-flop inputs to match!

14. Referencing the equations for the flip-flop control logic from problems #10, #11, and #12,
hook up the logic to control the flip-flops you drew in the previous problem.

UNBELIEVABLE!!!!

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State Machine Design

00

10 01

11

Figure 3. A state diagram for a 4-state Gray-code state machine.

Now you’re on your own. This time you need to build a state machine that implements the
Grey-code shown in Figure 3. A Gray-code is any sequence of bits where the next pattern in the
sequence differs from the previous pattern by just one bit. Do to the great deal we got from the
manufacturer, you’ll be using falling-edge D flip-flops for this design. A starter truth table has
been provided for you.

Present State Next State Flip-Flop

Inputs
Q1 Q0 Q’1 Q’0 D1 D0
0 0
0 1
1 0
1 1

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