Department of AEIE

RCC Institute of Information Technology, Kolkata

Canal South Road, Kolkata - 700015

Test No.: Second Class Test

Paper Name: Digital Electronic Circuits Paper Code: EC (EI) 301
Semester: III Academic Session: 2017-2018
QUESTION PAPER
Full Marks: 15 Duration: 45 min

The figures in the margin indicate full marks.

Candidates are required to give their answers in their own words as far as practicable.

A. Answer any two questions.

A.1. What are the differences between a latch and a flip-flop? Realize T flip-flop using S-R flip-flop. 2.5
A.2. What are the differences between a level triggered and an edge triggered flip flop? Convert a J-K
flip-flop into a D flip-flop. 2.5
A.3. What do you mean by race around condition? Explain with suitable circuit diagram, how it can be
eliminated. 2.5

B. Answer any two questions.

B.1. What do you mean by SAR type ADC? What do you mean by R-2R ladder type DAC? How many clock pulses
are required in worst case conversion cycle of an 8 bit SAR type? 2+2+1
B.2. Explain the advantages and disadvantages of Johnson Counter and Ring counter with proper circuit
diagram. Draw and explain the circuit diagram of a 4-bit universal shift register. 3+2
B.3. Design a 3-bit binary UP/DOWN counter with a direction control M using J-K flip-flop. 5
B.4. Design a sequential circuit that implements the following state diagram using D flip-flops. 5