DIGITAL SYSTEM DESIGN (DSD)

II Semester : ECE Scheme : 2017

Course Code Hours/Week Credits Maximum Marks
Continuous
L T P CInternal End Exam TOTAL
Assessment
3 - - 3 40 60 100
Sessional Exam Duration : 2 Hrs End Exam Duration: 3 Hrs
Course Outcomes : At the end of the course the student will be able to
CO1: Apply the basic knowledge of number systems, Boolean algebra to solve simple problems
CO2: understand Boolean algebra, and apply it to minimize and realize Boolean functions
CO3: design various common combinational logic circuits
CO4: design simple sequential logic circuits
CO5: distinguish types of FSMs and design them following the standard procedure
UNIT1: Number System & Boolean Algebra
Number systems: Binary numbers, Number-base Conversions, Octal and Hexadecimal numbers, Complements of
numbers, Signed binary numbers, Binary codes, binary logic; Boolean Algebra: basic definitions, basic theorems and
properties, Boolean functions, canonical and standard forms, all logic operations of variables, digital logic gates
UNIT2: Minimization & Realization Methods:
2,3,4,5 - variable K-map method, prime implicants, essential prime implicants, POS, SOP simplifications, simplifications with
don’t cares conditions, NAND/NOR implementations of digital gates, 2-level and multi-level NAND/NOR realizations, AND-OR-
INVERT(AOI), OR-AND-INVERT(OAI), Quine-McCluskey (QM) Technique or Tabulation Method

UNIT3: Combinational Logic Design

Combinational circuits, analysis & design procedures, half-adder, full-adder, binary adder, carry look ahead adder, half-
subtractor, full-subtractor, binary adder with subtractor, BCD adder, binary multiplier, magnitude comparator, decoder and
its applications for comb. Logic implementation, encoder, priority encoder, multiplexer (MUX), comb. Logic implementation
using MUX, hazards in combinational logic
UNIT4: Sequential Logic Design
Sequential circuit, types of sequential circuits, latches, flip-flops, excitation tables, flip-flop conversions, Registers, shift registers
and its types, counters: ripple counter, BCD ripple counter, synchronous counter, Ring counter, Johnson counter
UNIT5: Finite State Machines
Mealy and Moore state machines, algorithmic State Machines, ASM chart, Design examples(ASMD chart), design of
asynchronous sequential circuits, state reduction and flow tables, race-free state assignment, hazards, design examples.

Text Books :
1. Mano, Morris. M and Ciletti, Michael D, Digital Design with an Introduction to Verilog HDL, 5th edition, Pearson, New
Delhi, 2013
2. Jain, R. P., Modern Digital Electronics, 4th edition, Tata McGraw-Hill Education, New Delhi, 2010
Reference Books :
1. Kumar, Anand. A., Fundamentals of Digital Circuit, 4th Edition, Prentice-Hall India, New Delhi, 2016
2. Fletcher, W.L., An Engineering Approach to Digital Design, Pearson India, 2015
3. Kohavi, Zvi, Switching and Finite Automata Theory, ; 3rd edition, Cambridge University Press, 2009
4. Roth, Charles H., Fundamentals of Logic Design, 5th Edition, Cengage Learning, 2004
5. Taub, H and D. Schilling, Digital Integrated Electronics, McGraw Hill, New York, 1977
Web References:
1. http://nptel.ac.in/courses/117106086/1
2. http://www.nptelvideos.in/2012/12/digital-systems-design.html
3. http://www.nptelvideos.in/2012/12/digital-circuits-and-systems.html
4. http://nptel.ac.in/courses/117105080/
Question Paper Pattern:
Sessional Exam:
The question paper for sessional examination is for 30 marks, covering half of the syllabus for first sessional and
remaining half for second sessional exam. Question No 1 which carries 6 marks contains three short answer questions of two
marks each. The remaining three questions shall be EITHER/OR type questions carrying 8 marks each
End Exam:
Question Paper Contains Six Questions. Question 1 contains 5 short Answer questions each of 2 marks. (Total 10 marks)
covering one question from each unit. The remaining five questions shall be EITHER/OR type questions carrying 10 marks each.
Each of these questions is from one unit and may contain sub-questions. i.e there will be two questions from each unit and the
student should answer any one question.