Background and detailed explanation of the HDL language

Logic gate had existence before 1980s, Integrated circuits (ICs) were manufactured
before 1980s. Design of those ICs were done manually. It all started when demand were
surpassing technology. When, technology was challenged to be much more faster. US
Defence were seeking for very fast logic for their F22 Raptor. So, running out of
technological advancements, they kept an open project to develop a fast logic (faster).
This project was taken by three companies combined, out which one was IBM.

After two years of continual research, in winter of 1983, they came up with one language.
This language was pretty similar as C(structured). Purpose of this language was to create
logic circuit when constructed using proper syntax.

Any code which was written (proper syntax and coding rules), could produce logic
design. This language was VHSIC (Very High Speed Integrated Circuit) Hardware
Descriptor Language (HDL), later got popularized as VHDL.

This is where it all began. We Indians are very smart but don't show up unless anyone
(except Indian) is doing same. I may look like I'm criticising but, when VHDL was
developing an Indian was developing same functionality for verifying digital logic (and
can be used to develop logic as well). When VHDL was registered as IEEE Standard in
1993, Verilog was registered in 1995. That was an Indian (Mr. Prabhu Goel) working
in Gateway Design Automation, now know as Cadence Design Automation.

A history lesson is always an important part to learn while learning something in detail.
Today there are 3 to 4 IEEE standards for each (VHDL and Verilog). Verilog is much
more popular. It holds 66% opportunities in VLSI frontend development (It's all about
RTL Design). VHDL is still used in defence development of many countries including US
and India. Not sure about European countries.

HDL is different than any other languages in the world because it isn't sequential coding.
Compare with C language. Execution of code is done sequentially, one line at a time.
HDL excute parallelly. Two always blocks in HDL will run at the same line. This was
necessity in F22 Raptor. Tools and development cycle in VLSI differ because of HDL.
Developer who uses HDL is known as RTL Design Engineer and hold different
responsibility when compared with any frontend developer.

I as a RTL Design Engineer, deals with clocking issues, timing optimisation and resource
management. These are same things one did learn in digital design.

Because of HDL(parallel programming), development cycle of VLSI is different than any

software development cycle.

How one can learn Verilog HDL?

I read almost all the answers. I wasn’t satisfied. All the answers refer to some sites or
some text books. First of all, let me make the answer plot. By the end of this answer,
one shall have clear understanding of Verilog HDL and where is one standing in
process of learning.

Verilog is not computational language. It is not part of ease of doing programming

(referring scripting) and neither used in any platform to serve development purpose.
It doesn’t create any intriguing interface or experience. What does it do? It creates
hardware.

Verilog create a digital circuits. A coding that emulates as well as develop digital
circuit for behavioral requirement. Before jumping to Verilog, ensure digital circuit is
in your blood not in your heart. It breaks and fail too!

How do you proceed for digital circuits? Start learning everything from gates, flip-
flops, shift register, counters, adders, subtracters, multiplexer & de-multiplexer,
encoders, decoder, priority encoder, K-map, boolean algebra and De-morgan’s law.
That’s it? Nope. State machines too! They’re the heart of design cycle.

Best references :

1. Digital Design by M. Morris Mano. You shall have clear ground from this
book. You shall not struggle here to understand it.
2. Digital Design by Wakerly (Pearson publication). You can take advanced
learning of digital designs from this book.
3. CMOS VLSI Design by Neil Weste and David Harris. Read 3 chapter with
full concentration without skipping a word. Understand maximum out of it.
At least how gates and flops are formed in hardware.
Now, since digital circuit is in your blood. You know how nano-meter technology
processes and how does electrical signals take finite time to reach from one point to
another point(3rd reference in digital circuit). Let’s move to learning Verilog in
depth.

My answer Could you give a detailed explanation of the HDL language? Talks about
need of HDL. Reading this will tell evolution that happened 3 decodes ago which
made semiconductor as innovation of century.

Best References

1. Verilog by Samir Palnitkar. Try to understand what is synthesizable

keywords. You can follow this book as a beginner. It doesn’t keep you up
with actual use. It helps you to write the codes.
2. Digital Design references. Have a look at it and check what you can write.
3. A cited reference Cliff Cummings' Award-Winning Verilog & SystemVerilog
Papers . Consider this reference as verilog scripture. Patiently read
everything related to verilog. It’s free. Go for this reference if you’ve clear
understanding of what is timing, power and optimization in digital circuits.
That’s it? Naah. There are some dos and don’t.

Never ever ever ever try to learn from http://asicworld.com . Use this only for syntax.

Do not ever believe in any code sourced from internet. It sucks. You’ll understand it
later. It doesn’t help anyone to grow.

Not able learn some topics? Try to use top university names in search box. Like
“Digital design questions Stanford”. Materials are developed by researchers and
smart people on earth. You’ll love it.

Try to learn tools such as ModelSim, Xilinx Vivado, ISE. It’s free.
It will fairly take someone at least 3–4 months. I know my references and
recommendations are heavy in size but, look at quality. There is no single material
for Verilog because it is not just a language. Now you know, why? ;-)