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bq32000
SLUS900E – DECEMBER 2008 – REVISED AUGUST 2015
Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
bq32000 SOIC (8) 4.90 mm x 3.91 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
3.0 to 3.6 V
bq32000
SCL
Controller
SDA Real-Time
____ Clock
IRQ
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
bq32000
SLUS900E – DECEMBER 2008 – REVISED AUGUST 2015 www.ti.com
Table of Contents
1 Features .................................................................. 1 7.4 Device Functional Modes........................................ 10
2 Applications ........................................................... 1 7.5 Programming........................................................... 10
3 Description ............................................................. 1 7.6 Register Maps ......................................................... 12
4 Revision History..................................................... 2 8 Application and Implementation ........................ 19
8.1 Application Information............................................ 19
5 Pin Configuration and Functions ......................... 3
8.2 Typical Application .................................................. 19
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ..................................... 4 9 Power Supply Recommendations...................... 23
6.2 ESD Ratings ............................................................ 4 10 Layout................................................................... 23
6.3 Recommended Operating Conditions....................... 4 10.1 Layout Guidelines ................................................. 23
6.4 Thermal Information .................................................. 4 10.2 Layout Example .................................................... 23
6.5 Electrical Characteristics........................................... 5 11 Device and Documentation Support ................. 24
6.6 I2C Timing Requirements.......................................... 5 11.1 Device Support .................................................... 24
6.7 Typical Characteristics .............................................. 6 11.2 Community Resources.......................................... 24
7 Detailed Description .............................................. 7 11.3 Trademarks ........................................................... 24
7.1 Overview ................................................................... 7 11.4 Electrostatic Discharge Caution ............................ 24
7.2 Functional Block Diagram ......................................... 7 11.5 Glossary ................................................................ 24
7.3 Feature Description................................................... 7 12 Mechanical, Packaging, and Orderable
Information ........................................................... 24
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................ 1
• Added Storage Temperature to Absolute Maximum Ratings ................................................................................................. 4
• Changed VCC = 0 to VCC needs a pulse................................................................................................................................ 5
D Package
8-Pin SOIC
Top View
OSCI 1 8 VCC
OSCO 2 7 IRQ
VBACK 3 6 SCL
GND 4 5 SDA
Pin Functions
PIN
I/O DESCRIPTION
NAME NO.
POWER AND GROUND
GND 4 - Ground
VBACK 3 - Backup device power
VCC 8 - Main device power
SERIAL INTERFACE
SCL 6 I I2C serial interface clock
SDA 5 I/O I2C serial data
INTERRUPT
IRQ 7 O Configurable interrupt output. Open-drain output.
OSCILLATOR
OSCI 1 - Oscillator input
OSCO 2 - Oscillator output
6 Specifications
6.1 Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VCC to GND –0.3 4 V
Input voltage, VIN
All other pins to GND –0.3 VCC + 0.3 V
Operating junction temperature, TJ –40 150 °C
Storage temperature, Tstg –60 150 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
(1) The currents measured after issuing a pulse on VCC. The pulse amplitude 0-VCC; pulse width min 1 ms.
(2) Typical accuracy is measured using reference board design and KDS DMX-26S surface-mount 32.768-kHz crystal. Variation in board
design and crystal section results in different typical accuracy.
0.7 VCC
SDA
0.3 VCC
tscl
tsth 1/fscl
Stop Condition
tvd tbuf
0.7 VCC
SDA D7/A
0.3 VCC
Start Condition
tsds
0.7 VCC
SCL 8 9
0.3 VCC
tsps
50 100 20
Icc (uA) 107.5
VCC = 2 V 90 VCC = 3.3 V
Iback (uA)
45 80 15
70 106
40 10
60
Iback (uA)
Iback (uA)
ICC (uA)
ICC (uA)
50 104.5
35 5
40
30 103
30 0
20
25 10 101.5 -5
Icc (uA)
0
Iback (uA)
20 -10 100 -10
0.5 1.0 1.5 2.0 2.5 3.0 2.4 2.9 3.4 3.9
Vbackup (V) C001 Vbackup (V) C002
Figure 2. Current Consumption vs Backup Supply Voltage Figure 3. Current Consumption vs Backup Supply Voltage
7 Detailed Description
7.1 Overview
The bq32000 is a real-time clock that features an automatic backup supply with an integrated trickle charger.
VCC
Place supply-decoupling
1 µF
capacitor near supply pin
VCC
VCC
Trickle Automatic
Charge Backup
VBACK Switch
Use only 4.7 kW 4.7 kW 4.7 kW
super-capacitor 0.22 F VCORE
or battery,
not both IRQ
Interrupt
OSCI Generator
32-kHz SCL
OSCO Oscillator I2C Register
Interface With
Undervoltage
Lockout
SDA
Registers
GND
NOTE: All pullup resistors should be connected to VCC such that no pullup is applied during backup supply operation.
3.3V 3.3V
VB AC K VB AC K
VR E F VR E F
VCC
VC C
Voltage
Voltage
–5 V/ms (max)
T ime Time
On VC C On V BAC K On V BAC K On V C C
3.3V 3.3V
VR E F VR E F
VB AC K VB AC K
VCC VCC
Voltage
Voltage
–5 V/ms (max)
T ime Time
On VC C On V BAC K On V BAC K On V C C
20 kW
VBACK
180 W
940 W
7.5 Programming
Programming (continued)
A data byte follows the address acknowledge. If the R/W bit is low, the data is written from the master. If the R/W
bit is high, the data from this device are the values read from the register previously selected by a write to the
subaddress register. The data byte is followed by an acknowledge sent from this device. Data is output only if
complete bytes are received and acknowledged.
A stop condition, which is a low-to-high transition on the SDA I/O while the SCL input is high, is sent by the
master to terminate the transfer. A master device must wait at least 60 μs after the RTC exits backup mode to
generate a START condition.
1 1 1 1 1 1 R
S (AN) S (DN) (DN+1)
0 0 0 0W 0 0 0 0
DataN+1
NACK
START
START
STOP
Slave Sub Slave DataN
ACK
ACK
ACK
ACK
Address Address Address
(1) 10_DATE and 1_DATE must form a valid date, 01 to 31, dependent on month and year.
Table 4. Calibration
CAL (DEC) S=0 S=1
0 +0 ppm –0 ppm
1 +2 ppm –4 ppm
N +N / 491520 (per minute) –N / 245760 (per minute)
30 +61 ppm –122 ppm
31 +63 ppm –126 ppm
Description – Configuration 2
Figure 18. CFG2 Register
7 6 5 4 3 2 1 0 BIT(S)
RSVD TCFE RSVD TCHE Name
r/w r/w r/w r/w Read/Write
1 0 1 0 1 0 1 0 Initial
1 0 UC UC 1 0 1 0 Cycle
RSVD Reserved. The RSVD bits should always be written as 0.
TCFE Trickle charge FET bypass. The TCFE bit is used to enable the trickle charge FET. When TCFE is 0, the FET is off.
When TCFE is 1, the FET is on.
0 Open
1 Closed
TCHE Trickle charge enable. The TCHE bits determine if the trickle charger is active. If TCHE is 0x5, then the trickle charger is
active, otherwise, the trickle charger is inactive.
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
OSCI V CC
32.768 kHz 1 µF
4.7 kΩ 4.7 kΩ 4.7 kΩ
OSCO
V BACK IRQ
SCL
GND SDA
Figure 23. Master and Slave I2C Communication for the SECONDS Register
Figure 24. Master and Slave I2C Communication for the SECONDS Register After Recovering From the
Backup Supply
10 Layout
1 µF
VCC
4.7 kΩ
4.7 kΩ
4.7 kΩ
OSCI
____
OSCO IRQ
0.22F
VBACK SCL
GND SDA
11.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
www.ti.com 11-Apr-2013
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Top-Side Markings Samples
(1) Drawing Qty (2) (3) (4)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 24-Apr-2013
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 24-Apr-2013
Pack Materials-Page 2
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