ECEN 2350, Digital Logic, Fall 2016 - De0 Board Test

ECEN 2350, Digital Logic, Fall 2016 - DE0 Board Test http://ecee.colorado.edu/~mathys/ecen2350/AlteraSoftware/DE0test.ht...
ECEN 2350 - Digital Logic

Peter Mathys, Fall 2016
Quartus II: Example for DE0 Board Test
Quick Links
Goals
Project Setup
Verilog Program
Compilation
Pin Assignments
USB Blaster
Programmer
Goals
The goals of this page are to provide a detailed description of how to create a project in Quartus II, compile it, and use it to configure the FPGA on the DE0
board to implement a logic circuit described in Verilog. The specific circuit used as an example is a 2-to-4 decoder with select inputs B (MSB), A (LSB),
enable inputs G1 (active high), G2_ (active low), and outputs Y0, Y1, Y2, Y3 (all active high).
Project Setup
Start the Quartus II software by clicking on "Quartus II 13.0sp1" (choose the 32-bit or 64-bit version according to the harware in your laptop). This brings up
the following "Getting Started" screen.
Click on "Create a New Project". You will see the following "Introduction" screen.
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A Quartus project consists of a collection of design files which are brought together in a common working environment. It is best to use a separate directory
for each different project. To keep things simple and to avoid problems related to file naming it is recommended to use the same name for the directory, the
project name, and the top-level design entity (i.e., the name of the top-level Verilog module for Verilog coding). The module name is case sensitive, cannot
begin with a digit or $, and cannot contain spaces, slashes, dashes and other special characters (except $ and _). Instead of spaces you can use the
underscore (_) character. Here is how you can fill in the names for the decoder2to4 project.
On the next screen you can add preexisting design files (e.g., a Verilog file that you already developed and tested using ModelSim) to your project. We do
not have such a file for this project and thus leave this screen blank. Note: It is also possible to add existing design files to a project later on in the Quartus II
main window.
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Next come the "Family & Device Settings". The DE0 Board uses a EP3C16F484C6N device from the Cyclone III FPGA device family. Select it as shown
below.
On the next screen third-party EDA (Electronic Design Automation) tools that should be used can be specified. An example would be the ModelSim
simulator software. We will not use any additional tools and leave this screen blank.
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The summary page below shows the options selected for this project. If you need to change something press the "Back" button, otherwise press "Finish".
This concludes the setup of the project and you should now see the main Quartus II window.
Verilog Program
At this point you should have setup the project with a project name and a top-level design entity name (it is recommended that both names be the same,
decoder2to4 in this case) and you should see the following main Quartus II window.
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To enter the Verilog code for the top-level design entity, click on "File" and select "New..." as shown below.
On the pop-up window that opens select "Verilog HDL File" under "Design Files".
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Now you are ready to enter Verilog code with the text editor in the right half pane of the main Quartus II window.
Enter the Verilog code as shown below and save the files as decoder2to4.v. Note that it is necessary that the name of this file (without the .v extension)
matches the module name exactly (including upper/lower case variations).
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This concludes the Verilog coding for this example and you can move on to the compilation of the circuit described in the Verilog file.
Compilation
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Pin Assignments
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USB Blaster
When you are using the DE0 board for the first time with your computer you need to install the USB Blaster download cable driver. Start by connecting the
DE0 board to the computer using the USB cable. A message will appear saying "Device driver software was not successfully installed" (or similar). Do not
run any wizards or search online for the driver software. Instead, open the "Devices and Printers" window by clicking on "Start" and then selecting "Devices
and Printers" as shown below.
The USB-Blaster should appear under "Unspecified" as shown next.
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Right-click on the USB-Blaster icon and select "Properties".
In the new window click on "Properties again".
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Now click on "Change Settings".
Then click on "Update Driver...".
When you see the screen captured above, select "Browse my computer for driver software". Find the altera\13.0sp1 directory where you installed the
Quartus II software. The default location is shown in the screen below.
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Click "Install" on the Windows Security screen shown below.
If all went well you should see the Successful Installation screen below.
In the main Quartus II window click on "Tools" and then select "Programmer". In the Programmer window click on "Hardware Setup...". Now you should see
the Hardware Setup window shown below.
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Select "USB-Blaster [USB-0]" as shown above and the nclick on "Close". This concludes the USB-Blaster setup. Note that this setup is only necessary the
first time you connect the DE0 board to your computer.
Programmer
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©2012-2016, P. Mathys. Last revised: 8-21-16, PM.
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ECEN 2350, Digital Logic, Fall 2016 - De0 Board Test

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ECEN 2350, Digital Logic, Fall 2016 - DE0 Board Test http://ecee.colorado.edu/~mathys/ecen2350/AlteraSoftware/DE0test.ht...

ECEN 2350 - Digital Logic

Quartus II: Example for DE0 Board Test

The USB-Blaster should appear under "Unspecified" as shown next.

Right-click on the USB-Blaster icon and select "Properties".

In the new window click on "Properties again".

Now click on "Change Settings".

Then click on "Update Driver...".

Click "Install" on the Windows Security screen shown below.

©2012-2016, P. Mathys. Last revised: 8-21-16, PM.

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