Compal LA-4595P KML50 Half Penny Bridge 15.4 DIS Rev 1.0

A B C D E
Model Name: KML50 DIS

PCB NO: LA-4595PR04
BOM P/N: DA80000DR00
1 1
Half Penny Bridge 15.4

2 Compal Confidential 2
Schematic Document
Cantiga + ICH9
2009 / 02 / 17 Rev:1.0(A00)
3 3
4 4
1bios.ru Security Classification

Issued Date 2007/1/15
Compal Secret Data
Deciphered Date 2008/1/15 Title
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-4595P
Date: Tuesday, February 17, 2009 Sheet 1 of 49
A B C D E
A B C D E
Compal confidential
File Name : LA-4595P
Half Penny Bridge 15.4 DIS
ZZZ1
1
PCB Thermal Sensor Penryn -4MB (Socket P) 1
+CPU_CORE
EMC1402-2-ACZL-TR
CRT +VCCP
uFCPGA-478 CPU
+CRT_VCC P.16
+3VS P.4
P.4,5,6
+1.5VS CK505 TSSOP-64
LVDS Panel Interface Fan conn Clock Generator

+5VS P.4 H_A#(3..35)
+B+ FSB ICS9LPRS387AKLFT
+3VS P.16 H_D#(0..63) 800/1066MHz 1.05V
+LCDVDD +1.05VS_CK505
DDR2 667/800MHz 1.8V DDR2-SO-DIMM X2 +3VS_CK505 P.15
BANK 0, 1, 2, 3
Intel Cantiga MCH +1.8V +0.9VS
P.13,14
nVidia 1329pin BGA

NB9M-GS +VCCP Dual Channel
+3VS_DAC_CRT
+VGA_CORE +1.05VS_DPLLA
+3VS_DAC_BG
VRAM x 2 +1.1V_GFX_PCIE +1.05VS_DPLLB USB conn x 4
+1.8VS P.35 +1.8VS +1.8V_TXLVDS P.7,8,9,10,11,12 +USB_AS +USB_BS +USB_CS P.29
2
+3VS P.31,32,33,34 2
CardBus Controller DMI X4 C-Link FingerPrinter

+3VS P.29
PCI -E BUS
O2MICRO OZ888
+1.8VS_CB
Felica Conn
+3VS_PHY P.30 USB2.0 +5VS P.29
Intel ICH9-M Azalia

BT Conn
1394 Media Card
+3VS_CR
+RTCVCC
+3VS P.29
+1.5VS
PCI-E BUS 676pin BGA SATA 0
+VCCP SATA 1
+3VALW P.17,18,19,20 Camera
+3VS +5VS P.16
10/100/1000 LAN Mini-Card-2 Mini-Card-1 Express Card Express Card

REALTEK (WLAN)
+1.5VS
(WWAN)
+1.5VS
+1.5VS +3VS +1.5VS P.26
+3VS P.23 P.23 +3VS P.26
RTL8111DL P.21
+LAN_IO
+3VS
3 3
Mini-Card-1 P.23
+3VS +1.5VS
RJ45/11 CONN SIM CON

P.21 +UIM_PWR
LPC BUS Mini-Card-2 P.23
+3VS +1.5VS
Digi Mic
+3VS P.16
TPM Audio CODEC
SLB 9635 IDT92HD81 P.24 Audio Jack
Mini-Card-2 P.23 +3VALW
ENE KB926 +3VALW
+5VS +3VS
+3VS +1.5VS +MIC1_VREFO P.24
+EC_AVCC P.27 +3VS P.28
SATA HDD Connector
+5VS P.22
Touch Pad CONN. Int.KBD BIOS(System/EC)
Power On/Off CKT. +5VS +3VALW
P.28 P.28 P.27
+3VALW P.28 CDROM Conn.
4
+5VS P.22 4
DC/DC Interface CKT. RTC CKT.
1bios.ru
+3VS +5VS P.36 +RTCVCC P.18
Security Classification Compal Secret Data Compal Electronics, Inc.

2007/1/15 2008/1/15 Title
Power Circuit DC/DC Issued Date Deciphered Date
Block diagram
P.39~P.49 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom LA-4595P 1.0
A B C D E
A
Symbol Note :
O MEANS ON X MEANS OFF
Voltage Rails
: means Digital Ground
+5VS
+3VS
+1.5VS : means Analog Ground
power
plane +0.9VS
+VCCP @ : means just reserve , no build
+5VALW +1.8V +CPU_CORE CON@ : means ME connectors
+B +VGA_CORE TPM@ : means TPM function
+3VALW +1.8VS
+1.1V_GFX_PCIEP
State
PCI EXPRESS DESTINATION SATA DESTINATION
Lane 1 MINI CARD-1 WWAN Lane 0 HDD
Lane 2 GLAN RTL8111DL Lane 1 ODD

S0
O O O O Lane 3 MINI CARD-2 WLAN Lane 4 NA
S1
O O O O Lane 4 EXPRESS CARD Lane 5 NA
S3
O O O X Lane 5 CARD READER OZ888
S5 S4/AC
O O X X Lane 6 NA
S5 S4/ Battery only
O X X X
S5 S4/AC & Battery
don't exist X X X X
SMBUS Control Table
USB PORT# DESTINATION
1 1
THERMAL
SERIAL SENSOR
SOURCE INVERTER BATT EEPROM (CPU) SODIMM CLK CHIP MINI CARD LCD
0 JUSBP1
1 CAMERA SMB_EC_CK1
SMB_EC_DA1
KB926 X V V X X X X X
2 JUSBP3 TOP SMB_EC_CK2
SMB_EC_DA2
KB926 X X X V X X X X
SMB_CK_CLK1
3 Felica SMB_CK_DAT1 ICH9 X X X X V V X X
4 Blue Tooth LCD_CLK
ICH9-M LCD_DAT Cantiga
X X X X X X X V
5 Finger Printer
6 JMINI2-WLAN
I2C / SMBUS ADDRESSING
7 Express card
DEVICE HEX ADDRESS
8 JUSBP3 BOT DDR SO-DIMM 0 A0 10100000
DDR SO-DIMM 1 A4 10100100
9 JMINI1-WWAN CLOCK GENERATOR (EXT.) D2 11010010
LED panel 58 01011000
10 JUSBP4
11 NA

Compal Secret Data
Notes List
Custom LA-4595P 1.0
A
5 4 3 2 1
+VCCP
XDP_TDI R5 1 2 54.9_0402_1%
XDP_TMS R4 1 2 54.9_0402_1%
D D
XDP_TRST# R11 1 2 54.9_0402_1%
XDP_TCK R35 1 2 54.9_0402_1%
<7> H_A#[3..16]
CONN@ This shall place near CPU
JCPU1A
H_A#3 J4 H1 H_ADS#
A[3]# ADS# H_ADS# <7>
ADDR GROUP_0
H_A#4 L5 E2 H_BNR#
H_A#5 A[4]# BNR# H_BPRI# H_BNR# <7>
L4 A[5]# BPRI# G5 H_BPRI# <7>
H_A#6 K5
H_A#7 A[6]# H_DEFER#
M3 A[7]# DEFER# H5 H_DEFER# <7>
H_A#8 N2 F21 H_DRDY#
H_A#9 A[8]# DRDY# H_DBSY# H_DRDY# <7>
J1 A[9]# DBSY# E1 H_DBSY# <7>
H_A#10 N3
H_A#11 A[10]# H_BR0#
P5 A[11]# BR0# F1 H_BR0# <7>
H_A#12 P2 A[12]#
CONTROL
H_A#13 L2 D20 H_IERR#
H_A#14 A[13]# IERR# H_INIT#
P4 A[14]# INIT# B3 H_INIT# <18>
H_A#15 P1
H_A#16 A[15]# H_LOCK#
R1 A[16]# LOCK# H4 H_LOCK# <7>
H_ADSTB#0 M1
<7> H_ADSTB#0 ADSTB[0]# H_RESET#
RESET# C1 H_RESET# <7>
H_REQ#0 K3 F3 H_RS#0
<7> H_REQ#0 H_REQ#1 REQ[0]# RS[0]# H_RS#1 H_RS#0 <7>
<7> H_REQ#1 H2 REQ[1]# RS[1]# F4 H_RS#1 <7>
H_REQ#2 K2 G3 H_RS#2
<7> H_REQ#2 H_REQ#3 REQ[2]# RS[2]# H_TRDY# H_RS#2 <7>
<7> H_REQ#3 J3 REQ[3]# TRDY# G2 H_TRDY# <7>
H_REQ#4 L1
<7> H_REQ#4 REQ[4]# H_HIT#
<7> H_A#[17..35] HIT# G6 H_HIT# <7>
H_A#17 Y2 E4 H_HITM#
C H_A#18 A[17]# HITM# H_HITM# <7> C
U5 A[18]#
H_A#19 R3 AD4
A[19]# BPM[0]#
ADDR GROUP_1
H_A#20 W6 AD3
H_A#21 A[20]# BPM[1]# +3VS
U4 AD1
H_A#22 Y5
A[21]#
A[22]#
BPM[2]#
BPM[3]# AC4 Thermal Sensor EMC1402-1-ACZL-TR
XDP/ITP SIGNALS
H_A#23 U1 AC2
H_A#24 A[23]# PRDY#
R4 A[24]# PREQ# AC1
0.1U_0402_16V4Z
H_A#25 T5 AC5 XDP_TCK 1
H_A#26 A[25]# TCK XDP_TDI
T3 AA6
H_A#27 A[26]# TDI XDP_TDO C13
W2 AB3 T84
H_A#28 A[27]# TDO XDP_TMS
W5 AB5
H_A#29 A[28]# TMS XDP_TRST# 2
Y4 AB6
H_A#30 A[29]# TRST# XDP_DBRESET# U2
U2 C20 XDP_DBRESET# <19>
H_A#31 A[30]# DBR# EC_SMB_CK2
V4 1 8 EC_SMB_CK2 <16,27,31>
H_A#32 A[31]# VDD SCLK
W3
H_A#33 A[32]# H_THERMDA EC_SMB_DA2
AA4
A[33]# THERMAL 2
D+ SDATA
7 EC_SMB_DA2 <16,27,31>
H_A#34 AB2 H_PROCHOT# R146 68_0402_1%~D +VCCP C5
H_A#35 A[34]# H_THERMDC
AA3 D21 1 2 3 6
H_ADSTB#1 A[35]# PROCHOT# H_THERMDA_R R57 H_THERMDA D- ALERT#
<7> H_ADSTB#1 V1
ADSTB[1]# THERMDA
A24 1 2 100_0402_5% 2200P_0402_50V7K
B25 H_THERMDC_R R53 1 2 100_0402_5% H_THERMDC L_THERM# 4 5
H_A20M# THERMDC THERM# GND
<18> H_A20M# A6
A20M#
ICH
H_FERR# A5 C7 H_THERMTRIP# R16

<18> H_FERR# FERR# THERMTRIP# H_THERMTRIP# <7,18>
H_IGNNE# C4 +3VS 1 2 EMC1402-2-ACZL-TR MSOP 8P
<18> H_IGNNE# IGNNE#
H_THERMDA, H_THERMDC routing together, 10K_0402_5%
H_STPCLK# D5 Address:100_11000
<18> H_STPCLK# H_INTR STPCLK# Trace width / Spacing = 10 / 10 mil
<18> H_INTR C6
LINT0 H CLK
H_NMI B4 A22 CLK_CPU_BCLK
<18> H_NMI LINT1 BCLK[0] CLK_CPU_BCLK <15>
H_SMI# A3 A21 CLK_CPU_BCLK#
<18> H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# <15>
C76
M4
N5
RSVD[01] FAN Control circuit 10U_1206_16V4Z~N
2 1
RSVD[02] +5VS
T2
B RSVD[03] C88 B
V3
RSVD[04] 1000P_0402_50V7K~N
B2 1 2
RESERVED
RSVD[05] C77 10U_1206_16V4Z~N

D2 2 1
RSVD[06]
D22
RSVD[07] U3
D3
RSVD[08]
F6 1 8
RSVD[09] VEN GND
2 7
FAN1_POWER VIN GND
3 6
EN_DFAN1 VO GND
<27> EN_DFAN1 4 5
VSET GND
Penryn +3VS RT9027BPS SO 8P
1
JFAN1
R61
40mil
1
+VCCP 10K_0402_5% 1
2
2
3
3
2
<27> FAN_SPEED1 4
GND
1
@ 2 5
R17 GND
2
56_0402_5% C94 ACES_85205-03001
0.01U_0402_16V7K D61
1 conn@
PJSOT24C_SOT23-3
2 2
@ FAN1
B
1
E
H_PROCHOT# 3 1 OCP#
OCP# <19>
C
@ Q2
MMBT3904_SOT23
+VCCP
A A
2
1bios.ru
R18
56_0402_5%
1
H_IERR# Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/02/13 Deciphered Date 2006/03/10 Title
Penryn(1/3)-AGTL+/ITP-XDP
Custom LA-4595P 1.0
5 4 3 2 1
5 4 3 2 1
+CPU_CORE +CPU_CORE
<7> H_D#[0..15] CONN@ CONN@
H_D#[32..47] <7>
JCPU1B JCPU1C
H_D#0 E22 Y22 H_D#32 A7 AB20
H_D#1 D[0]# D[32]# H_D#33 VCC[001] VCC[068]
F24 AB24 A9 AB7
H_D#2 D[1]# D[33]# H_D#34 VCC[002] VCC[069]
E26 V24 A10 AC7
D[2]# D[34]# VCC[003] VCC[070]
DATA GRP 0
H_D#3 G22 V26 H_D#35 A12 AC9
DATA GRP 2
D H_D#4 D[3]# D[35]# H_D#36 VCC[004] VCC[071] D
F23 V23 A13 AC12
H_D#5 D[4]# D[36]# H_D#37 VCC[005] VCC[072]
G25 T22 A15 AC13
H_D#6 D[5]# D[37]# H_D#38 VCC[006] VCC[073]
E25 U25 A17 AC15
H_D#7 D[6]# D[38]# H_D#39 VCC[007] VCC[074]
E23 U23 A18 AC17
H_D#8 D[7]# D[39]# H_D#40 VCC[008] VCC[075]
K24 Y25 A20 AC18
H_D#9 D[8]# D[40]# H_D#41 VCC[009] VCC[076]
G24 W22 B7 AD7
H_D#10 D[9]# D[41]# H_D#42 VCC[010] VCC[077]
J24 Y23 B9 AD9
H_D#11 D[10]# D[42]# H_D#43 VCC[011] VCC[078]
J23 W24 B10 AD10
H_D#12 D[11]# D[43]# H_D#44 VCC[012] VCC[079]
H22 W25 B12 AD12
H_D#13 D[12]# D[44]# H_D#45 VCC[013] VCC[080]
F26 AA23 B14 AD14
H_D#14 D[13]# D[45]# H_D#46 VCC[014] VCC[081]
K22 AA24 B15 AD15
H_D#15 D[14]# D[46]# H_D#47 VCC[015] VCC[082]
H23 D[15]# D[47]# AB25 B17 VCC[016] VCC[083] AD17
H_DSTBN#0 J26 Y26 H_DSTBN#2 B18 AD18
<7> H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 <7> VCC[017] VCC[084]
H_DSTBP#0 H26 AA26 H_DSTBP#2 B20 AE9
<7> H_DSTBP#0 H_DINV#0 DSTBP[0]# DSTBP[2]# H_DINV#2 H_DSTBP#2 <7> VCC[018] VCC[085]
<7> H_DINV#0 H25 DINV[0]# DINV[2]# U22 H_DINV#2 <7> C9 VCC[019] VCC[086] AE10
<7> H_D#[16..31] H_D#[48..63] <7> C10 VCC[020] VCC[087] AE12
C12 VCC[021] VCC[088] AE13
H_D#16 N22 AE24 H_D#48 C13 AE15
H_D#17 D[16]# D[48]# H_D#49 VCC[022] VCC[089]
K25 D[17]# D[49]# AD24 C15 VCC[023] VCC[090] AE17
H_D#18 P26 AA21 H_D#50 C17 AE18
H_D#19 D[18]# D[50]# H_D#51 VCC[024] VCC[091]
R23 D[19]# D[51]# AB22 C18 VCC[025] VCC[092] AE20
H_D#20 L23 AB21 H_D#52 D9 AF9
D[20]# D[52]# VCC[026] VCC[093]
DATA GRP 1
H_D#21 M24 AC26 H_D#53 D10 AF10
DATA GRP 3
H_D#22 D[21]# D[53]# H_D#54 VCC[027] VCC[094]
L22 D[22]# D[54]# AD20 D12 VCC[028] VCC[095] AF12
H_D#23 M23 AE22 H_D#55 D14 AF14
H_D#24 D[23]# D[55]# H_D#56 VCC[029] VCC[096]
P25 D[24]# D[56]# AF23 D15 VCC[030] VCC[097] AF15
H_D#25 P23 AC25 H_D#57 D17 AF17
H_D#26 D[25]# D[57]# H_D#58 VCC[031] VCC[098]
P22 D[26]# D[58]# AE21 D18 VCC[032] VCC[099] AF18
H_D#27 T24 AD21 H_D#59 E7 AF20 +VCCP
H_D#28 D[27]# D[59]# H_D#60 VCC[033] VCC[100]
R24 D[28]# D[60]# AC22 E9 VCC[034]
H_D#29 L25 AD23 H_D#61 E10 G21
H_D#30 D[29]# D[61]# H_D#62 VCC[035] VCCP[01]
T25 D[30]# D[62]# AF22 E12 VCC[036] VCCP[02] V6
C H_D#31 H_D#63 C
N25 D[31]# D[63]# AC23 E13 VCC[037] VCCP[03] J6
H_DSTBN#1 L26 AE25 H_DSTBN#3 E15 K6 1
<7> H_DSTBN#1 DSTBN[1]# DSTBN[3]# H_DSTBN#3 <7> VCC[038] VCCP[04]
220U_D2_4VY_R15M
H_DSTBP#1 M26 AF24 H_DSTBP#3 E17 M6
<7> H_DSTBP#1 H_DINV#1 DSTBP[1]# DSTBP[3]# H_DINV#3 H_DSTBP#3 <7> VCC[039] VCCP[05] +
<7> H_DINV#1 N24 DINV[1]# DINV[3]# AC20 H_DINV#3 <7> E18 VCC[040] VCCP[06] J21
C10
E20 VCC[041] VCCP[07] K21
+V_CPU_GTLREF AD26 R26 COMP0 F7 M21
TEST1 GTLREF COMP[0] COMP1 VCC[042] VCCP[08] 2
T50 C23 TEST1 MISC COMP[1] U26 F9 VCC[043] VCCP[09] N21
TEST2 D25 AA1 COMP2 F10 N6
T51 TEST3 TEST2 COMP[2] COMP3 VCC[044] VCCP[10]
T2 C24 Y1 F12 R21
TEST4 TEST3 COMP[3] VCC[045] VCCP[11]
T3 AF26 F14 R6
TEST5 TEST4 H_DPRSTP# R23 R24 R25 R26 VCC[046] VCCP[12]
T4 AF1 E5 H_DPRSTP# <7,18,47> F15 T21
TEST5 DPRSTP# VCC[047] VCCP[13]
54.9_0402_1%
27.4_0402_1%
54.9_0402_1%
27.4_0402_1%
TEST6 A26 B5 H_DPSLP# F17 T6
T5 TEST6 DPSLP# H_DPSLP# <18> VCC[048] VCCP[14]
1
TEST7 C3 D24 H_DPWR# F18 V21
T6 TEST7 DPWR# H_DPWR# <7> VCC[049] VCCP[15]
CPU_BSEL0 B22 D6 H_PWRGOOD F20 W21
<15> CPU_BSEL0 CPU_BSEL1 BSEL[0] PWRGOOD H_CPUSLP# H_PWRGOOD <18> VCC[050] VCCP[16]
<15> CPU_BSEL1 B23 D7 H_CPUSLP# <7> AA7
CPU_BSEL2 BSEL[1] SLP# H_PSI# VCC[051]
<15> CPU_BSEL2 C21 AE6 H_PSI# <47> AA9 B26
BSEL[2] PSI# VCC[052] VCCA[01] +1.5VS
AA10 C26
2
VCC[053] VCCA[02]
10U_0805_6.3V6M
0.01U_0402_16V7K
Penryn AA12
VCC[054]
AA13 AD6 CPU_VID0 <47>
VCC[055] VID[0]
AA15 AF5 CPU_VID1 <47> 1 1
VCC[056] VID[1]
AA17 AE5 CPU_VID2 <47>
VCC[057] VID[2] C12 C11
AA18 AF4 CPU_VID3 <47>
VCC[058] VID[3]
layout note: Rout H_DPRSTP# from ICH9 to IMVP6 then to GMCH & CPU AA20
VCC[059] VID[4]
AE3 CPU_VID4 <47> 2 2
Resistor placed within AB9
VCC[060] VID[5]
AF3 CPU_VID5 <47>
layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs 0.5" of CPU pin.Trace AC10
VCC[061] VID[6]
AE2 CPU_VID6 <47>
AB10
VCC[062]
should be at least 25 AB12
VCC[063]
CPU_BSEL CPU_BSEL2 CPU_BSEL1 CPU_BSEL0 AB14 AF7 VCCSENSE
mils away from any other AB15
VCC[064] VCCSENSE VCCSENSE <47>
Near pin B26
toggling signal. VCC[065]
AB17
VCC[066] VSSSENSE
COMP[0,2] trace width is AB18 AE7 VSSSENSE <47>
VCC[067] VSSSENSE
166 0 1 1
B 18 mils. COMP[1,3] trace Penryn B
width is 4
200 0 1 0
266 0 0 0 For 8 layer condition

+VCCP
Length match within 25 mils.Z0=27.4 ohm
1
The trace width/space/other is 20/7/25.

R27
1K_0402_1%
2
+V_CPU_GTLREF
+CPU_CORE
1
R29 R28 1 2 100_0402_1% VCCSENSE

2K_0402_1%
2
R30 1 2 100_0402_1% VSSSENSE
Close to CPU pin AD26

within 500mils.
A A
Close to CPU pin
within 500mils.

Compal Secret Data
Custom LA-4595P 1.0
5 4 3 2 1
5 4 3 2 1
High Frequence Decoupling

10uF 0805 X5R -> 85 degree.
+CPU_CORE Place these caps inside

the CPU socket.
Place these caps inside
1 1 1 1 1 1 1 1 1 1 ( Left side on Top ).
the CPU socket cavity. C204 C205 C529 C232 C258 C505 C504 C257 C261 C214
( Left side on Top ). 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
2 2 2 2 2 2 2 2 2 2
D D
CONN@
JCPU1D
A4 P6
VSS[001] VSS[082]
A8 P21
VSS[002] VSS[083]
A11
A14
VSS[003] VSS[084]
P24
R2 +CPU_CORE Place these caps inside
VSS[004] VSS[085]
A16
VSS[005] VSS[086]
R5 the CPU socket.
A19
VSS[006] VSS[087]
R22 Place these caps inside
A23
VSS[007] VSS[088]
R25 1 1 1 1 1 1 1 1 1 1 ( Right side on Top ).
AF2
VSS[008] VSS[089]
T1 the CPU socket cavity. C178 C202 C254 C190 C203 C200 C182 C199 C208 C226
B6 VSS[009] VSS[090] T4
B8 T23 ( Right side on Top side). 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[010] VSS[091] 2 2 2 2 2 2 2 2 2 2
B11 VSS[011] VSS[092] T26
B13 VSS[012] VSS[093] U3
B16 VSS[013] VSS[094] U6
B19 VSS[014] VSS[095] U21
B21 VSS[015] VSS[096] U24
B24 VSS[016] VSS[097] V2
C5 VSS[017] VSS[098] V5
+CPU_CORE
C8 VSS[018] VSS[099] V22
C11 VSS[019] VSS[100] V25
C14 VSS[020] VSS[101] W1
C16
C19
VSS[021] VSS[102] W4
W23
Place these caps inside 1 1 1 1 1 1
VSS[022] VSS[103]
C2 VSS[023] VSS[104] W26 the CPU socket cavity. C501
10U_0805_6.3V6M
C508
10U_0805_6.3V6M
C514
10U_0805_6.3V6M
C519
10U_0805_6.3V6M
C522
10U_0805_6.3V6M
C533
10U_0805_6.3V6M
C22 VSS[024] VSS[105] Y3
2 2 2 2 2 2
C25 VSS[025] VSS[106] Y6 ( Left side on Bottom ).
D1 VSS[026] VSS[107] Y21
D4 VSS[027] VSS[108] Y24
D8 VSS[028] VSS[109] AA2
D11 VSS[029] VSS[110] AA5
C C
D13 VSS[030] VSS[111] AA8
D16 VSS[031] VSS[112] AA11
D19 VSS[032] VSS[113] AA14
+CPU_CORE
D23 VSS[033] VSS[114] AA16
D26 VSS[034] VSS[115] AA19
E3 VSS[035] VSS[116] AA22
E6
E8
VSS[036] VSS[117] AA25
AB1
Place these caps inside 1 1 1 1 1 1
VSS[037] VSS[118]
E11
VSS[038] VSS[119]
AB4 the CPU socket cavity. C502
10U_0805_6.3V6M
C510
10U_0805_6.3V6M
C515
10U_0805_6.3V6M
C520
10U_0805_6.3V6M
C526
10U_0805_6.3V6M
C532
10U_0805_6.3V6M
E14 AB8
VSS[039] VSS[120] 2 2 2 2 2 2
E16
VSS[040] VSS[121]
AB11 ( Right side on Bottom ).
E19 AB13
VSS[041] VSS[122]
E21 AB16
VSS[042] VSS[123]
E24 AB19
VSS[043] VSS[124]
F5 AB23
VSS[044] VSS[125]
F8 AB26
VSS[045] VSS[126]
F11 AC3
VSS[046] VSS[127]
F13 AC6
VSS[047] VSS[128]
F16 AC8
VSS[048] VSS[129] +CPU_CORE
F19 AC11
VSS[049] VSS[130]
F2 AC14
VSS[050] VSS[131]
F22 AC16
VSS[051] VSS[132]
F25 AC19
VSS[052] VSS[133]
ESR <= 1.5m ohm
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
G4
G1
VSS[053] VSS[134]
AC21
AC24
Place these caps inside 1 1 1 1
Place these caps inside
VSS[054] VSS[135]
G23
VSS[055] VSS[136]
AD2 the CPU socket. the CPU socket.
C196
C198
C259
C255
G26 AD5 + + + +
H3
H6
VSS[056]
VSS[057]
VSS[137]
VSS[138]
AD8
AD11
( Left side on Top ). ( Right side on Top side). Capacitor > 880 uF
VSS[058] VSS[139] 2 2 2 2
H21 AD13
VSS[059] VSS[140]
H24 AD16
VSS[060] VSS[141]
J2 AD19
B VSS[061] VSS[142] B
J5 AD22
VSS[062] VSS[143]
J22 AD25
VSS[063] VSS[144]
J25 AE1
VSS[064] VSS[145]
K1 AE4
VSS[065] VSS[146]
K4 AE8
VSS[066] VSS[147]
K23 AE11
VSS[067] VSS[148]
K26 AE14
VSS[068] VSS[149]
L3 AE16
VSS[069] VSS[150]
L6 AE19
VSS[070] VSS[151]
L21 AE23 Place these inside
VSS[071] VSS[152]
L24 AE26 socket cavity on L8
VSS[072] VSS[153]
M2 A2 (North side
VSS[073] VSS[154]
M5 AF6
VSS[074] VSS[155] Secondary)
M22 AF8
VSS[075] VSS[156]
M25 AF11
VSS[076] VSS[157] +VCCP
N1 AF13
VSS[077] VSS[158]
N4 AF16
VSS[078] VSS[159]
N23 AF19
VSS[079] VSS[160]
N26 AF21
VSS[080] VSS[161]
P3 A25 1 1 1 1 1 1
VSS[081] VSS[162] C213 C209 C212 C185 C183 C184
AF25
VSS[163]
Penryn 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
2 2 2 2 2 2
.
A A

Compal Secret Data
Custom LA-4595P 1.0
5 4 3 2 1
5 4 3 2 1
H_A#[3..35] <4> U4B

<5> H_D#[0..63] U4A
A14 H_A#3 M36
H_D#0 H_A#_3 H_A#4 T7 RSVD1 M_CLK_DDR0
DDR CLK/ CONTROL/COMPENSATION

F2 H_D#_0 H_A#_4 C15 T11 N36 RSVD2 SA_CK_0 AP24 M_CLK_DDR0 <13>
0.01U_0402_25V7K
H_D#1 H_A#5 M_CLK_DDR1
2.2U_0603_6.3V4Z
G8 H_D#_1 H_A#_5 F16 T12 R33 RSVD3 SA_CK_1 AT21 M_CLK_DDR1 <13>
H_D#2 F8 H13 H_A#6 T33 AV24 M_CLK_DDR2 M_CLK_DDR2 <14>
H_D#3 H_D#_2 H_A#_6 H_A#7 +1.8V T13 RSVD4 SB_CK_0 M_CLK_DDR3
E6 H_D#_3 H_A#_7 C18 T14 AH9 RSVD5 SB_CK_1 AU20 M_CLK_DDR3 <14>
H_D#4 G2 M16 H_A#8 AH10
H_D#5 H_D#_4 H_A#_8 H_A#9 T15 RSVD6 M_CLK_DDR#0
H6 H_D#_5 H_A#_9 J13 1 1 T16 AH12 RSVD7 SA_CK#_0 AR24 M_CLK_DDR#0 <13>
1
C398
C400
H_D#6 H2 P16 H_A#10 AH13 AR21 M_CLK_DDR#1
H_D#7 H_D#_6 H_A#_10 H_A#11 T17 RSVD8 SA_CK#_1 M_CLK_DDR#2 M_CLK_DDR#1 <13>
F6 R16 R331 K12 AU24
H_D#8 H_D#_7 H_A#_11 H_A#12 T18 RSVD9 SB_CK#_0 M_CLK_DDR#3 M_CLK_DDR#2 <14>
D4 N17 1K_0402_1% AL34 AV20
H_D#9 H_D#_8 H_A#_12 H_A#13 2 2 T19 RSVD10 SB_CK#_1 M_CLK_DDR#3 <14>
H3 M13 T20 AK34
H_D#10 H_D#_9 H_A#_13 H_A#14 RSVD11 DDR_CKE0_DIMMA
M9 E17 T21 AN35 BC28 DDR_CKE0_DIMMA <13>
2
H_D#11 H_D#_10 H_A#_14 H_A#15 +SMRCOMP_VOH RSVD12 SA_CKE_0 DDR_CKE1_DIMMA
M11 P17 T22 AM35 AY28 DDR_CKE1_DIMMA <13>
D H_D#12 H_D#_11 H_A#_15 H_A#16 RSVD13 SA_CKE_1 DDR_CKE2_DIMMB D
J1 F17 T24 T24 AY36 DDR_CKE2_DIMMB <14>
H_D#_12 H_A#_16 RSVD14 SB_CKE_0
1
H_D#13 J2 G20 H_A#17 BB36 DDR_CKE3_DIMMB
H_D#_13 H_A#_17 SB_CKE_1 DDR_CKE3_DIMMB <14>
RSVD
H_D#14 N12 B19 H_A#18 R332 B31
H_D#15 H_D#_14 H_A#_18 H_A#19 T25 RSVD15 DDR_CS0_DIMMA#
J6 J16 3.01K_0402_1% B2 BA17
H_D#16 H_D#_15 H_A#_19 H_A#20 T26 RSVD16 SA_CS#_0 DDR_CS1_DIMMA# DDR_CS0_DIMMA# <13>
P2 E20 T27 M1 AY16 DDR_CS1_DIMMA# <13>
H_D#17 H_D#_16 H_A#_20 H_A#21 RSVD17 SA_CS#_1 DDR_CS2_DIMMB#
L2 H16 AV16
2
H_D#18 H_D#_17 H_A#_21 H_A#22 +SMRCOMP_VOL SB_CS#_0 DDR_CS3_DIMMB# DDR_CS2_DIMMB# <14>
R2 J20 AR13 DDR_CS3_DIMMB# <14>
H_D#19 H_D#_18 H_A#_22 H_A#23 SB_CS#_1
N9 L17 T28 AY21
H_D#_19 H_A#_23 RSVD20
1
0.01U_0402_25V7K
H_D#20 H_A#24 M_ODT0
2.2U_0603_6.3V4Z
L6 A17 BD17 M_ODT0 <13>
H_D#21 H_D#_20 H_A#_24 H_A#25 R333 SA_ODT_0 M_ODT1
M5 B17 1 1 AY17 M_ODT1 <13>
H_D#22 H_D#_21 H_A#_25 H_A#26 1K_0402_1% SA_ODT_1 M_ODT2 +1.8V
J3 L16 BF15 M_ODT2 <14>
H_D#_22 H_A#_26 SB_ODT_0
C403
C404
H_D#23 N2 C21 H_A#27 BG23 AY13 M_ODT3
H_D#_23 H_A#_27 T41 RSVD22 SB_ODT_1 M_ODT3 <14>
H_D#24 R1 J17 H_A#28 BF23
T44
2
H_D#25 H_D#_24 H_A#_28 H_A#29 2 2 RSVD23 SMRCOMP R328
N5 H20 T73 BH18 BG22 1 2 80.6_0402_1%
H_D#26 H_D#_25 H_A#_29 H_A#30 RSVD24 SM_RCOMP SMRCOMP# R329
N6 H_D#_26 H_A#_30 B18 T74 BF18 RSVD25 SM_RCOMP# BH21 1 2 80.6_0402_1%
H_D#27 P13 K17 H_A#31
H_D#28 H_D#_27 H_A#_31 H_A#32 +SMRCOMP_VOH
N8 H_D#_28 H_A#_32 B20 SM_RCOMP_VOH BF28
H_D#29 L7 F21 H_A#33 BH28 +SMRCOMP_VOL
H_D#30 H_D#_29 H_A#_33 H_A#34 SM_RCOMP_VOL
N10 H_D#_30 H_A#_34 K21
H_D#31 M3 L20 H_A#35 AV42 +V_DDR_MCH_REF
H_D#32 H_D#_31 H_A#_35 +3VS SM_VREF
Y3 H_D#_32 SM_PWROK AR36
H_D#33 AD14 H12 H_ADS# R82 BF17 SM_REXT R40 1 2 499_0402_1%
H_D#34 H_D#_33 H_ADS# H_ADSTB#0 H_ADS# <4> PM_EXTTS#0 SM_REXT TP_SM_DRAMRST#
Y6 B16 H_ADSTB#0 <4> 1 2 BC36 T29 PAD
H_D#35 H_D#_34 H_ADSTB#_0 H_ADSTB#1 SM_DRAMRST#
Y10 H_D#_35 H_ADSTB#_1 G17 H_ADSTB#1 <4>
H_D#36 Y12 A9 H_BNR# 10K_0402_5% B38
H_D#_36 H_BNR# H_BNR# <4> DPLL_REF_CLK
H_D#37 Y14 F11 H_BPRI# A38
H_D#38 H_D#_37 H_BPRI# H_BR0# H_BPRI# <4> DPLL_REF_CLK#
Y7 G12 R83 E41
HOST
H_D#39 H_D#_38 H_BREQ# H_DEFER# H_BR0# <4> PM_EXTTS#1 DPLL_REF_SSCLK
W2 H_D#_39 H_DEFER# E9 H_DEFER# <4> 1 2 DPLL_REF_SSCLK# F41
H_D#40 AA8 B10 H_DBSY#
H_D#_40 H_DBSY# H_DBSY# <4>
H_D#41 CLK_MCH_BCLK 10K_0402_5% CLK_MCH_3GPLL
CLK
Y9 H_D#_41 HPLL_CLK AH7 CLK_MCH_BCLK <15> PEG_CLK F43 CLK_MCH_3GPLL <15>
H_D#42 AA13 AH6 CLK_MCH_BCLK# E43 CLK_MCH_3GPLL#
H_D#43 H_D#_42 HPLL_CLK# H_DPWR# CLK_MCH_BCLK# <15> PEG_CLK# CLK_MCH_3GPLL# <15>
AA9 H_D#_43 H_DPWR# J11 H_DPWR# <5>
C H_D#44 H_DRDY# C
AA11 H_D#_44 H_DRDY# F9 H_DRDY# <4>
H_D#45 AD11 H9 H_HIT#
H_D#_45 H_HIT# H_HIT# <4>
H_D#46 AD10 E12 H_HITM# AE41 DMI_MRX_ITX_N0
H_D#47 H_D#_46 H_HITM# H_LOCK# H_HITM# <4> DMI_RXN_0 DMI_MRX_ITX_N1 DMI_MRX_ITX_N0 <19>
AD13 H_D#_47 H_LOCK# H11 H_LOCK# <4> DMI_RXN_1 AE37 DMI_MRX_ITX_N1 <19>
H_D#48 AE12 C9 H_TRDY# AE47 DMI_MRX_ITX_N2
H_D#49 H_D#_48 H_TRDY# H_TRDY# <4> DMI_RXN_2 DMI_MRX_ITX_N3 DMI_MRX_ITX_N2 <19>
AE9 H_D#_49 DMI_RXN_3 AH39 DMI_MRX_ITX_N3 <19>
H_D#50 AA2
H_D#51 H_D#_50 DMI_MRX_ITX_P0
AD8 AE40 DMI_MRX_ITX_P0 <19>
H_D#52 H_D#_51 MCH_CLKSEL0 DMI_RXP_0 DMI_MRX_ITX_P1
AA3 <15> MCH_CLKSEL0 T25 AE38 DMI_MRX_ITX_P1 <19>
H_D#53 H_D#_52 H_DINV#0 MCH_CLKSEL1 CFG_0 DMI_RXP_1 DMI_MRX_ITX_P2
AD3 J8 H_DINV#0 <5> <15> MCH_CLKSEL1 R25 AE48 DMI_MRX_ITX_P2 <19>
H_D#54 H_D#_53 H_DINV#_0 H_DINV#1 MCH_CLKSEL2 CFG_1 DMI_RXP_2 DMI_MRX_ITX_P3
AD7 L3 H_DINV#1 <5> <15> MCH_CLKSEL2 P25 AH40 DMI_MRX_ITX_P3 <19>
H_D#55 H_D#_54 H_DINV#_1 H_DINV#2 CFG_2 DMI_RXP_3
AE14 Y13 H_DINV#2 <5> PAD T8 P20
H_D#56 H_D#_55 H_DINV#_2 H_DINV#3 CFG_3 DMI_MTX_IRX_N0
AF3 Y1 H_DINV#3 <5> PAD T9 P24 AE35 DMI_MTX_IRX_N0 <19>
H_D#57 H_D#_56 H_DINV#_3 CFG5 CFG_4 DMI_TXN_0 DMI_MTX_IRX_N1
AC1 <9> CFG5 C25 AE43 DMI_MTX_IRX_N1 <19>
H_D#58 H_D#_57 H_DSTBN#0 CFG6 CFG_5 DMI_TXN_1 DMI_MTX_IRX_N2
AE3 L10 H_DSTBN#0 <5> <9> CFG6 N24 AE46 DMI_MTX_IRX_N2 <19>
H_D#59 H_D#_58 H_DSTBN#_0 H_DSTBN#1 CFG7 CFG_6 DMI_TXN_2 DMI_MTX_IRX_N3
AC3 M7 H_DSTBN#1 <5> <9> CFG7 M24 AH42 DMI_MTX_IRX_N3 <19>
H_D#60 H_D#_59 H_DSTBN#_1 H_DSTBN#2 CFG_7 DMI_TXN_3
AE11 AA5 H_DSTBN#2 <5> PAD T37 E21
H_D#_60 H_DSTBN#_2 CFG_8
DMI
CFG
H_D#61 AE8 AE6 H_DSTBN#3 CFG9 C23 AD35 DMI_MTX_IRX_P0
H_D#_61 H_DSTBN#_3 H_DSTBN#3 <5> <9> CFG9 CFG_9 DMI_TXP_0 DMI_MTX_IRX_P0 <19>
H_D#62 AG2 PAD T65 C24 AE44 DMI_MTX_IRX_P1
H_D#63 H_D#_62 H_DSTBP#0 CFG_10 DMI_TXP_1 DMI_MTX_IRX_P2 DMI_MTX_IRX_P1 <19>
AD6 L9 H_DSTBP#0 <5> PAD T40 N21 AF46 DMI_MTX_IRX_P2 <19>
H_D#_63 H_DSTBP#_0 H_DSTBP#1 CFG12 CFG_11 DMI_TXP_2 DMI_MTX_IRX_P3
M8 H_DSTBP#1 <5> PAD T67 P21 AH43 DMI_MTX_IRX_P3 <19>
H_DSTBP#_1 H_DSTBP#2 CFG13 CFG_12 DMI_TXP_3
AA6 H_DSTBP#2 <5> PAD T47 T21
H_SWNG H_DSTBP#_2 H_DSTBP#3 CFG_13
C5 AE5 H_DSTBP#3 <5> PAD T10 R20
H_RCOMP H_SWING H_DSTBP#_3 CFG_14
E3 PAD T66 M20
H_RCOMP H_REQ#0 CFG16 CFG_15
B15 H_REQ#0 <4> <9> CFG16 L21
H_REQ#_0 H_REQ#1 CFG_16
K13 H_REQ#1 <4> PAD T68 H21
H_REQ#_1 H_REQ#2 CFG_17
F13 P29
GRAPHICS VID
H_REQ#_2 H_REQ#2 <4> PAD T39 CFG_18
B13 H_REQ#3 CFG19 R28
H_RESET# H_REQ#_3 H_REQ#4 H_REQ#3 <4> <9> CFG19 CFG20 CFG_19
<4> H_RESET# C12 B14 H_REQ#4 <4> <9> CFG20 T28 B33 T30
H_CPUSLP# H_CPURST# H_REQ#_4 CFG_20 GFX_VID_0
<5> H_CPUSLP# E11 B32 T31
H_CPUSLP# H_RS#0 GFX_VID_1
B6 H_RS#0 <4> G33 T32
H_RS#_0 H_RS#1 GFX_VID_2
F12 H_RS#1 <4> F33 T33
B H_RS#_1 H_RS#2 PM_BMBUSY# GFX_VID_3 B
C8 H_RS#2 <4> <19> PM_BMBUSY# R29 E33 T34
+H_VREF H_RS#_2 H_DPRSTP# PM_SYNC# GFX_VID_4
A11 <5,18,47> H_DPRSTP# B7
H_AVREF PM_EXTTS#0 PM_DPRSTP#
B11 <13> PM_EXTTS#0 N33
H_DVREF PM_EXTTS#1 PM_EXT_TS#_0
<14> PM_EXTTS#1 P32
PM_EXT_TS#_1
PM
CANTIGA_1p0 PM_PWROK_R AT40 C34
PLT_RST# PLT_RST#_NB PWROK GFX_VR_EN T35 +VCCP
<17,27,30,31> PLT_RST# 1 2 AT11
R523 100_0402_5% H_THERMTRIP# RSTIN#
H_RCOMP Dual core 24.9 ohm_1% pull down <4,18> H_THERMTRIP# T20
THERMTRIP#
DPRSLPVR R32
Quad core 16.9 ohm_1% pull down <19,47> DPRSLPVR DPRSLPVR
1
H_SWNG Dual core 100 ohm_1% pull down AH37 CL_CLK0 R100
CL_CLK CL_CLK0 <19>
Quad core 75 ohm_1% pull down <19,27> ICH_PWROK 1 2 PM_PWROK_R AH36 CL_DATA0
CL_DATA0 <19>
1K_0402_1%
R408 0_0402_5% CL_DATA M_PWROK
BG48 AN36 M_PWROK <19>
NC_1 CL_PWROK CL_RST#
<19,27,47> VGATE 1 2 BF48 AJ35 CL_RST# <19>
2
NC_2 CL_RST#
ME
@ R407 0_0402_5% BD48 AH34 +CL_VREF
NC_3 CL_VREF
Layout Note: BC48
NC_4
1
BH47 1
H_RCOMP / H_VREF / H_SWNG BG47
NC_5 C181 R99
NC_6
trace width and spacing is 10/20 +1.8V
BE47
NC_7 DDPC_CTRLCLK
N28 T36
0.1U_0402_16V4Z 511_0402_1%
Layout Note: BH46
NC_8 DDPC_CTRLDATA
M28 T48 2
V_DDR_MCH_REF BF46 G36 T63
2
+VCCP NC_9 SDVO_CTRLCLK
NC
BG45 E36 T64
NC_10 SDVO_CTRLDATA
1
+VCCP trace width and BH44 K36 CLKREQ#_7

NC_11 CLKREQ# MCH_ICH_SYNC# CLKREQ#_7 <15>
spacing is 20/20. R42 BH43 H36
NC_12 ICH_SYNC# MCH_ICH_SYNC# <19>
1K_0402_1%
221_0603_1%
1K_0402_1% BH6
MISC
NC_13
1
BH5
R45 R322 NC_14
BG4 B12 2 R1071 1 +VCCP
2
+V_DDR_MCH_REF NC_15 TSATN# 56_0402_5%

<13,14> +V_DDR_MCH_REF BH3
NC_16
BF3
NC_17
1
0.1U_0402_16V4Z
BH2
2
+H_VREF H_RCOMP H_SWNG R43 NC_18

1 BG2 B28 T99
C121 1K_0402_1% NC_19 HDA_BCLK
BE2 B30 T100
NC_20 HDA_RST#
24.9_0402_1%
0.1U_0402_16V4Z
@ BG1 B29
NC_21 HDA_SDI T101
1
1
100_0402_1%
A A
0.1U_0402_16V4Z
1 1 BF1 C29
2
2 NC_22 HDA_SDO T102

2K_0402_1%
HDA
R46 C391 R324 R323 C386 BD1 A28
NC_23 HDA_SYNC T103
BC1
1bios.ru
NC_24
F1 NC_25
2 2 A47
2
NC_26
CANTIGA_1p0
within 100 mils from NB Near B3 pin Issued Date 2008/09/24 Deciphered Date 2006/03/10 Title
Cantiga(1/6)-AGTL/DMI/DDR
CRB-no stuff DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-4595P 1.0
Checklist-no MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
10/16 5 4 3 2 1
5 4 3 2 1
D D
<13> DDR_A_D[0..63] <14> DDR_B_D[0..63]

U4D U4E
DDR_A_D0 AJ38 BD21 DDR_A_BS#0 DDR_B_D0 AK47 BC16 DDR_B_BS#0
DDR_A_D1 SA_DQ_0 SA_BS_0 DDR_A_BS#1 DDR_A_BS#0 <13> DDR_B_D1 SB_DQ_0 SB_BS_0 DDR_B_BS#1 DDR_B_BS#0 <14>
AJ41 BG18 DDR_A_BS#1 <13> AH46 BB17 DDR_B_BS#1 <14>
DDR_A_D2 SA_DQ_1 SA_BS_1 DDR_A_BS#2 DDR_B_D2 SB_DQ_1 SB_BS_1 DDR_B_BS#2
AN38 AT25 DDR_A_BS#2 <13> AP47 BB33 DDR_B_BS#2 <14>
DDR_A_D3 SA_DQ_2 SA_BS_2 DDR_B_D3 SB_DQ_2 SB_BS_2
AM38 AP46
DDR_A_D4 SA_DQ_3 DDR_A_RAS# DDR_B_D4 SB_DQ_3
AJ36 BB20 DDR_A_RAS# <13> AJ46
DDR_A_D5 SA_DQ_4 SA_RAS# DDR_A_CAS# DDR_B_D5 SB_DQ_4 DDR_B_RAS#
AJ40 BD20 DDR_A_CAS# <13> AJ48 AU17 DDR_B_RAS# <14>
DDR_A_D6 SA_DQ_5 SA_CAS# DDR_A_WE# DDR_B_D6 SB_DQ_5 SB_RAS# DDR_B_CAS#
AM44 AY20 DDR_A_WE# <13> AM48 BG16 DDR_B_CAS# <14>
DDR_A_D7 SA_DQ_6 SA_WE# DDR_B_D7 SB_DQ_6 SB_CAS# DDR_B_WE#
AM42 AP48 BF14 DDR_B_WE# <14>
DDR_A_D8 SA_DQ_7 DDR_B_D8 SB_DQ_7 SB_WE#
AN43 SA_DQ_8 AU47 SB_DQ_8
DDR_A_D9 AN44 DDR_B_D9 AU46
SA_DQ_9 DDR_A_DM[0..7] <13> SB_DQ_9
DDR_A_D10 AU40 DDR_B_D10 BA48
DDR_A_D11 SA_DQ_10 DDR_A_DM0 DDR_B_D11 SB_DQ_10
AT38 SA_DQ_11 SA_DM_0 AM37 AY48 SB_DQ_11 DDR_B_DM[0..7] <14>
DDR_A_D12 AN41 AT41 DDR_A_DM1 DDR_B_D12 AT47 AM47 DDR_B_DM0
DDR_A_D13 SA_DQ_12 SA_DM_1 DDR_A_DM2 DDR_B_D13 SB_DQ_12 SB_DM_0 DDR_B_DM1
AN39 SA_DQ_13 SA_DM_2 AY41 AR47 SB_DQ_13 SB_DM_1 AY47
DDR_A_D14 AU44 AU39 DDR_A_DM3 DDR_B_D14 BA47 BD40 DDR_B_DM2
AU42 SA_DQ_15 SA_DM_4 BB12 BC47 SB_DQ_15 SB_DM_3 BF35
DDR_A_D16 AV39 AY6 DDR_A_DM5 DDR_B_D16 BC46 BG11 DDR_B_DM4
AY44 SA_DQ_17 SA_DM_6 AT7 BC44 SB_DQ_17 SB_DM_5 BA3
A
DDR_A_D18 BA40 AJ5 DDR_A_DM7 DDR_B_D18 BG43 AP1 DDR_B_DM6
B
DDR_A_D19 SA_DQ_18 SA_DM_7 DDR_B_D19 SB_DQ_18 SB_DM_6 DDR_B_DM7
BD43 SA_DQ_19 DDR_A_DQS[0..7] <13> BF43 SB_DQ_19 SB_DM_7 AK2
DDR_A_D20 AV41 AJ44 DDR_A_DQS0 DDR_B_D20 BE45
DDR_A_D21 SA_DQ_20 SA_DQS_0 DDR_A_DQS1 DDR_B_D21 SB_DQ_20 DDR_B_DQS0 DDR_B_DQS[0..7] <14>
AY43 SA_DQ_21 SA_DQS_1 AT44 BC41 SB_DQ_21 SB_DQS_0 AL47
DDR_A_D22 BB41 BA43 DDR_A_DQS2 DDR_B_D22 BF40 AV48 DDR_B_DQS1
SA_DQ_22 SA_DQS_2 SB_DQ_22 SB_DQS_1
DDR_A_D23 BC40 MEMORY BC37 DDR_A_DQS3 DDR_B_D23 BF41 BG41 DDR_B_DQS2
MEMORY
DDR_A_D24 SA_DQ_23 SA_DQS_3 DDR_A_DQS4 DDR_B_D24 SB_DQ_23 SB_DQS_2 DDR_B_DQS3
AY37 SA_DQ_24 SA_DQS_4 AW12 BG38 SB_DQ_24 SB_DQS_3 BG37
DDR_A_D25 BD38 BC8 DDR_A_DQS5 DDR_B_D25 BF38 BH9 DDR_B_DQS4
DDR_A_D26 SA_DQ_25 SA_DQS_5 DDR_A_DQS6 DDR_B_D26 SB_DQ_25 SB_DQS_4 DDR_B_DQS5
AV37 SA_DQ_26 SA_DQS_6 AU8 BH35 SB_DQ_26 SB_DQS_5 BB2
DDR_A_D27 AT36 AM7 DDR_A_DQS7 DDR_B_D27 BG35 AU1 DDR_B_DQS6
DDR_A_D28 SA_DQ_27 SA_DQS_7 DDR_A_DQS#0 DDR_A_DQS#[0..7] <13> DDR_B_D28 SB_DQ_27 SB_DQS_6 DDR_B_DQS7
AY38 SA_DQ_28 SA_DQS#_0 AJ43 BH40 SB_DQ_28 SB_DQS_7 AN6 DDR_B_DQS#[0..7] <14>
C DDR_A_D29 DDR_A_DQS#1 DDR_B_D29 DDR_B_DQS#0 C
BB38 SA_DQ_29 SA_DQS#_1 AT43 BG39 SB_DQ_29 SB_DQS#_0 AL46
DDR_A_D30 AV36 BA44 DDR_A_DQS#2 DDR_B_D30 BG34 AV47 DDR_B_DQS#1
DDR_A_D31 SA_DQ_30 SA_DQS#_2 DDR_A_DQS#3 DDR_B_D31 SB_DQ_30 SB_DQS#_1 DDR_B_DQS#2
AW36 SA_DQ_31 SA_DQS#_3 BD37 BH34 SB_DQ_31 SB_DQS#_2 BH41
DDR_A_D32 BD13 AY12 DDR_A_DQS#4 DDR_B_D32 BH14 BH37 DDR_B_DQS#3
AU11 SA_DQ_33 SA_DQS#_5 BD8 BG12 SB_DQ_33 SB_DQS#_4 BG9
DDR_A_D34 BC11 AU9 DDR_A_DQS#6 DDR_B_D34 BH11 BC2 DDR_B_DQS#5
BA12 AM8 BG8 AT2
SYSTEM
DDR_A_D36 SA_DQ_35 SA_DQS#_7 DDR_A_MA[0..14] <13> DDR_B_D36 SB_DQ_35 SB_DQS#_6 DDR_B_DQS#7
SYSTEM
AU13 BH12 AN5
DDR_A_D37 SA_DQ_36 DDR_A_MA0 DDR_B_D37 SB_DQ_36 SB_DQS#_7
AV13 BA21 BF11 DDR_B_MA[0..14] <14>
DDR_A_D38 SA_DQ_37 SA_MA_0 DDR_A_MA1 DDR_B_D38 SB_DQ_37 DDR_B_MA0
BD12 BC24 BF8 AV17
DDR_A_D39 SA_DQ_38 SA_MA_1 DDR_A_MA2 DDR_B_D39 SB_DQ_38 SB_MA_0 DDR_B_MA1
BC12 BG24 BG7 BA25
BB9 BH24 BC5 BC25
BA9 BG25 BC6 AU25
AU10 BA24 AY3 AW25
AV9 BD24 AY1 BB28
BA11 BG27 BF6 AU28
BD9 BF25 BF5 AW28
AY8 AW24 BA1 AT33
BA6 BC21 BD3 BD33
DDR
AV5 BG26 AV2 BB16

DDR
AV7 BH26 AU3 AW33
AT9 BH17 AR3 AY33
AN8 AY25 AN2 BH15
DDR_A_D52 SA_DQ_51 SA_MA_14 DDR_B_D52 SB_DQ_51 SB_MA_13 DDR_B_MA14
AU5 AY2 AU33
DDR_A_D53 SA_DQ_52 DDR_B_D53 SB_DQ_52 SB_MA_14
AU6 AV1
DDR_A_D54 SA_DQ_53 DDR_B_D54 SB_DQ_53
AT5 AP3
AN10 AR1
AM11 AL1
AM5 AL2
AJ9 AJ1
AJ8 AH1
AN12 AM2
B DDR_A_D61 SA_DQ_60 DDR_B_D61 SB_DQ_60 B
AM13 AM3
AJ11 AH3
AJ12 AJ3
SA_DQ_63 SB_DQ_63
CANTIGA_1p0 CANTIGA_1p0
A A

Compal Secret Data
Cantiga(2/6)-DDR2 A/B CH
Custom LA-4595P 1.0
5 4 3 2 1
5 4 3 2 1
U4C
R56 within 500 mils from Strap Pin Table
pin T37,T36 PEGCOMP trace width
L32 R95 +VCC_PEG and spacing is 20/25 mils. 000 = FSB 1066MHz
L_BKLT_CTRL
G32 T37 PEGCOMP 1 2 CFG[2:0] FSB Freq select
L_BKLT_EN PEG_COMPI 49.9_0402_1% 010 = FSB 800MHz
M32 L_CTRL_CLK PEG_COMPO T36
M33
011 = FSB 667MHz
L_CTRL_DATA PEG_NRX_GTX_N0
K33 L_DDC_CLK PEG_RX#_0 H44 Others = Reserved
J33 J46 PEG_NRX_GTX_N1
L_DDC_DATA PEG_RX#_1 PEG_NRX_GTX_N2
PEG_RX#_2 L44
L40 PEG_NRX_GTX_N3 CFG[4:3] Reserved
PEG_RX#_3 PEG_NRX_GTX_N4
M29 L_VDD_EN PEG_RX#_4 N41
C44 P48 PEG_NRX_GTX_N5 PEG_NRX_GTX_N[0..15] 0 = DMI x 2
LVDS_IBG PEG_RX#_5 PEG_NRX_GTX_N[0..15] <31>
B43 N44 PEG_NRX_GTX_N6 CFG5 (DMI select) 1 = DMI x 4
E37
E38
LVDS_VBG
LVDS_VREFH
PEG_RX#_6
PEG_RX#_7 T43
U43
PEG_NRX_GTX_N7
PEG_NRX_GTX_N8 *
0 = The iTPM Host Interface is enable
D LVDS_VREFL PEG_RX#_8
* D
LVDS
C41 Y43 PEG_NRX_GTX_N9 CFG6
LVDSA_CLK# PEG_RX#_9 PEG_NRX_GTX_N10
C40 LVDSA_CLK PEG_RX#_10 Y48 1 = The iTPM Host Interface is disable
B37 Y36 PEG_NRX_GTX_N11
LVDSB_CLK# PEG_RX#_11 PEG_NRX_GTX_N12
A37 LVDSB_CLK PEG_RX#_12 AA43 0 =(TLS)chiper suite with no confidentiality
AD37 PEG_NRX_GTX_N13 CFG7 (Intel Management
PEG_RX#_13 PEG_NRX_GTX_N14
H47 AC47 1 =(TLS)chiper suite with confidentiality
E46
G40
LVDSA_DATA#_0
LVDSA_DATA#_1
PEG_RX#_14
PEG_RX#_15 AD39 PEG_NRX_GTX_N15 Engine Crypto strap)
*
LVDSA_DATA#_2 PEG_NRX_GTX_P0
T38 A40 LVDSA_DATA#_3 PEG_RX_0 H43
GRAPHICS
J44 PEG_NRX_GTX_P1 CFG8 Reserved
PEG_RX_1 PEG_NRX_GTX_P2
H48 LVDSA_DATA_0 PEG_RX_2 L43
D45 L41 PEG_NRX_GTX_P3 PEG_NRX_GTX_P[0..15]
LVDSA_DATA_1 PEG_RX_3 PEG_NRX_GTX_P[0..15] <31>
F40 N40 PEG_NRX_GTX_P4 CFG9 0 = Reverse Lane,15->0, 14->1
LVDSA_DATA_2 PEG_RX_4 PEG_NRX_GTX_P5
T46 B40 P47
LVDSA_DATA_3 PEG_RX_5 PEG_NRX_GTX_P6
PEG_RX_6
N43 (PCIE Graphics Lane Reversal) 1 = Normal Operation,Lane Number in order
A41 T42 PEG_NRX_GTX_P7
H38
G37
LVDSB_DATA#_0
LVDSB_DATA#_1
PEG_RX_7
PEG_RX_8
U42
Y42
PEG_NRX_GTX_P8
PEG_NRX_GTX_P9 0 = Enable
*
LVDSB_DATA#_2 PEG_RX_9 PEG_NRX_GTX_P10
J37
LVDSB_DATA#_3 PEG_RX_10
W47 CFG10 (PCIE Lookback enable)
Y37 PEG_NRX_GTX_P11 1 = Disable
B42
G38
LVDSB_DATA_0
PEG_RX_11
PEG_RX_12
AA42
AD36
PEG_NRX_GTX_P12
PEG_NRX_GTX_P13 CFG11 Reserved
*
LVDSB_DATA_1 PEG_RX_13 PEG_NRX_GTX_P14
F37 AC48 PEG_NTX_GRX_N[0..15] <31>
LVDSB_DATA_2 PEG_RX_14 PEG_NRX_GTX_P15 CFG[13:12] (XOR/ALLZ) 00 = Reserved
PCI-EXPRESS
T49 K37 AD40
LVDSB_DATA_3 PEG_RX_15
01 = XOR Mode Enabled
J41 PEG_TXN0 C568 1 2 0.1U_0402_16V7K PEG_NTX_GRX_N0 10 = All Z Mode Enabled
PEG_TX#_0 PEG_TXN1 C537 0.1U_0402_16V7K PEG_NTX_GRX_N1
M46 1 2 11 = Normal Operation(Default)
F25
H25
TVA_DAC
PEG_TX#_1
PEG_TX#_2
M47
M40
PEG_TXN2
PEG_TXN3
C538
C539
1
1
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
PEG_NTX_GRX_N2
PEG_NTX_GRX_N3 CFG[15:14] Reserved
*
TVB_DAC PEG_TX#_3 PEG_TXN4 C540 0.1U_0402_16V7K PEG_NTX_GRX_N4
K25 M42 1 2
TVC_DAC PEG_TX#_4
TV
R48 PEG_TXN5 C541 1 2 0.1U_0402_16V7K PEG_NTX_GRX_N5
H24
TV_RTN PEG_TX#_6
N38 1 2 CFG16 (FSB Dynamic ODT) 0 = Disabled
T40 PEG_TXN7 C543 1 2 0.1U_0402_16V7K PEG_NTX_GRX_N7
U37 1 2 1 = Enabled
C31
PEG_TX#_8
PEG_TX#_9
U40
Y40
PEG_TXN9
PEG_TXN10
C545
C546
1
1
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
PEG_NTX_GRX_N9
PEG_NTX_GRX_N10
*
TV_DCONSEL_0 PEG_TX#_10 PEG_TXN11 C547 0.1U_0402_16V7K PEG_NTX_GRX_N11
C E32
TV_DCONSEL_1 PEG_TX#_11
AA46 1 2 CFG[18:17] Reserved C
AA37 PEG_TXN12 C548 1 2 0.1U_0402_16V7K PEG_NTX_GRX_N12
AA40 1 2
AD43 1 2 CFG19 (DMI Lane Reversal) 0 = Normal Operation
PEG_TX#_14
PEG_TX#_15
AC46 PEG_TXN15 C551 1 2 0.1U_0402_16V7K PEG_NTX_GRX_N15
PEG_NTX_GRX_P[0..15] <31>
(Lane number in Order)

*
E28 J42 PEG_TXP0 C552 1 2 0.1U_0402_16V7K PEG_NTX_GRX_P0
CRT_BLUE PEG_TX_0 PEG_TXP1 C553 0.1U_0402_16V7K PEG_NTX_GRX_P1
PEG_TX_1
L46 1 2 1 = Reverse Lane
G28 M48 PEG_TXP2 C554 1 2 0.1U_0402_16V7K PEG_NTX_GRX_P2
CRT_GREEN PEG_TX_2 PEG_TXP3 C555 0.1U_0402_16V7K PEG_NTX_GRX_P3
M39 1 2
J28
CRT_RED
PEG_TX_3
PEG_TX_4
M43 PEG_TXP4 C556 1 2 0.1U_0402_16V7K PEG_NTX_GRX_P4 CFG20 (PCIE/SDVO concurrent) 0 = Only PCIE or SDVO is operational. *
G29
CRT_IRTN
VGA PEG_TX_5
PEG_TX_6
R47
N37
PEG_TXP5
PEG_TXP6
C557
C558
1
1
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
PEG_NTX_GRX_P5
PEG_NTX_GRX_P6 1 = PCIE/SDVO are operating simu.
T39 PEG_TXP7 C559 1 2 0.1U_0402_16V7K PEG_NTX_GRX_P7
PEG_TX_7 PEG_TXP8 C560 0.1U_0402_16V7K PEG_NTX_GRX_P8
H32 U36 1 2
CRT_DDC_CLK PEG_TX_8 PEG_TXP9 C561 0.1U_0402_16V7K PEG_NTX_GRX_P9
J32 U39 1 2
CRT_DDC_DATA PEG_TX_9 PEG_TXP10 C562 0.1U_0402_16V7K PEG_NTX_GRX_P10 @ R66
J29 Y39 1 2 <7> CFG5 1 2 2.21K_0402_1%~D
CRT_HSYNC PEG_TX_10 PEG_TXP11 C563 0.1U_0402_16V7K PEG_NTX_GRX_P11
E29 Y46 1 2
CRT_TVO_IREF PEG_TX_11 PEG_TXP12 C564 0.1U_0402_16V7K PEG_NTX_GRX_P12 @ R58
L29 AA36 1 2 <7> CFG6 1 2 2.21K_0402_1%~D
CRT_VSYNC PEG_TX_12 PEG_TXP13 C565 0.1U_0402_16V7K PEG_NTX_GRX_P13
AA39 1 2
PEG_TX_13 PEG_TXP14 C566 0.1U_0402_16V7K PEG_NTX_GRX_P14 @ R59
AD42 1 2 <7> CFG7 1 2 2.21K_0402_1%~D
PEG_TX_14 PEG_TXP15 C567 0.1U_0402_16V7K PEG_NTX_GRX_P15
AD46 1 2
PEG_TX_15 @ R55
<7> CFG9 1 2 2.21K_0402_1%~D
CANTIGA_1p0 @ R70 1 2 2.21K_0402_1%~D

<7> CFG16
CFG[5:16] have internal pullup
+3VS
@ R72 1 2 4.02K_0402_1%~D
<7> CFG19
@ R73 1 2 4.02K_0402_1%~D
<7> CFG20
B B
CFG[19:20] have internal pulldown
A A
1bios.ru Security Classification Compal Secret Data Compal Electronics, Inc.

Cantiga(3/6)-VGA/LVDS/TV
Custom LA-4595P 1.0
5 4 3 2 1
5 4 3 2 1
+VCCP
+V1.05VS_AXF +VCCP
U4H R101
852mA 1 2
10U_0805_4VAM~D
1U_0603_10V4Z
U13 0_0805_5%
VTT_1
4.7U_0805_10V4Z
73mA T13 1
VTT_2
220U_D2_4VY_R15M
B27 U12 1 1 1
VCCA_CRT_DAC_1 VTT_3
C384
C113
C69
A26 T12 +
VCCA_CRT_DAC_2 VTT_4
C370
U11
2.68mA VTT_5
T11
VTT_6 2 2 2 2
A25 U10
CRT
VCCA_DAC_BG VTT_7
B25 T10
VSSA_DAC_BG VTT_8
D U9 D
VTT_9
T9
VTT_10
U8
64.8mA F47 VTT_11
T8
VCCA_DPLLA VTT_12
2.2U_0603_10V7K~D
0.47U_0603_10V7K
4.7U_0805_10V4Z
U7
VTT
VTT_13 +1.8V_SM_CK
64.8mA L48 T7 1 1 1 +1.8V
VCCA_DPLLB VTT_14 R102
U6
VTT_15 +1.05VS_HPLL +VCCP
C383
C373
C56
+1.05VS_HPLL 24mA AD1 T6 1 2
PLL
VCCA_HPLL VTT_16
1_0402_5%~D 10U_0805_4VAM~D
U5 L29 0_0805_5%
139.2mA AE1 VTT_17 2 2 2
+1.05VS_MPLL T5 1 2
VCCA_MPLL VTT_18
R124
V3 MBK2012121YZF_0805
VTT_19
4.7U_0805_10V4Z
0.1U_0402_16V4Z
U3
VTT_20
0.1U_0402_16V4Z
13.2mA J48 V2 1 1
VCCA_LVDS VTT_21
C388
U2 1
A LVDS
VTT_22
C102
C387
+1.5VS_PEG_BG J47 VSSA_LVDS VTT_23 T2 1
C96
VTT_24 V1
2 2
VTT_25 U1
414uA 2
AD48 2
+1.5VS VCCA_PEG_BG
1 0.1U_0402_16V4Z~D
A PEG
C175 50mA
+1.05VS_PEGPLL AA48 VCCA_PEG_PLL
2
720mA AR20
VCCA_SM_1
AP20 VCCA_SM_2 +VCCP
AN20 +VCC_PEG
AR17
AP17
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
POWER +1.05VS_MPLL
L9
+VCCP PJP13
JUMP_43X39
+VCCP AN17 1 1
+1.05VS_A_SM VCCA_SM_6 1 2 2 2
0_0603_5%
100U_D2E_6.3VM_R15M~D
AT16 VCCA_SM_7
4.7U_0805_10V4Z
22U_0805_6.3V6M~D
R50 0_0805_5% AR16 LQH32CNR15M33L_1210~D 1
A SM
VCCA_SM_8
C117
1U_0603_10V4Z~D
C
1 2 AP16 VCCA_SM_9 1 1 C
R74
C389
+
22U_0805_6.3V6M~D
1
C82
C95
220U_D2_4VY_R15M
1 1 1
C68
+ C83
1
2 2 2
C72
22U_0805_6.3V6M~D
C62
2 2 2 2 1 1
C63
4.7U_0805_10V4Z 26mA AP28 321.35mA
VCCA_SM_CK_1 0.1U_0402_16V4Z
AN28 B22 +V1.05VS_AXF
VCCA_SM_CK_2 VCC_AXF_1 2 2
AP25 B21
AXF
R71 +1.05VS_A_SM_CK VCCA_SM_CK_3 VCC_AXF_2
AN25 A21
VCCA_SM_CK_4 VCC_AXF_3
1 2 AN24
0_0603_5% VCCA_SM_CK_5 124mA
AM28
VCCA_SM_CK_NCTF_1
0.1U_0402_16V4Z~D
22U_0805_6.3V6M~D
AM26
A CK
VCCA_SM_CK_NCTF_2
C104
1 1 AM25
VCCA_SM_CK_NCTF_3
AL25 BF21 +1.8V_SM_CK
VCCA_SM_CK_NCTF_4 VCC_SM_CK_1
C123
AM24 BH20
SM CK
AL24 BG20
2 2 VCCA_SM_CK_NCTF_6 VCC_SM_CK_3
AM23 BF20
AL23
TVA 24.15mA VCCA_SM_CK_NCTF_8 118.8mA
TVB 39.48mA +1.05VS_DMI
K47 +1.05VS_PEGPLL +VCCP +VCC_PEG
TVX 24.15mA VCC_TX_LVDS L12
B24 R112
VCCA_TV_DAC_1 +3VS
A24 C35 1 2 1 2
VCCA_TV_DAC_2 VCC_HV_1
1_0402_5%~D
TV
B35 105.3mA BLM21PG221SN1D_0805~D 0_0805_5%

VCC_HV_2
0.1U_0402_16V4Z
A35
HV
VCC_HV_3
R123
0.1U_0402_16V4Z
HDMI disable connected to GND 50mA A32 1
VCC_HDA
C116
HDA
V48 1732mA +VCC_PEG 1

VCC_PEG_1
0.1U_0402_16V4Z
C410
U48
VCC_PEG_2
V47 1 1
PEG
VCC_PEG_3 2
C176
C179
U47
VCC_PEG_4 2
10U_0805_4VAM~D
D TV/CRT
58.67mA M25 U46

VCCD_TVDAC VCC_PEG_5
B 48.363mA L28 2 2 B
+1.5VS_QDAC VCCD_QDAC
AH48 456mA +1.05VS_DMI
157.2mA VCC_DMI_1
+1.05VS_HPLL AF1 AF48
VCCD_HPLL VCC_DMI_2
AH47
DMI
50mA VCC_DMI_3
+1.05VS_PEGPLL AA47 AG47
VCCD_PEG_PLL VCC_DMI_4
C251 0.1U_0402_16V4Z
C233 0.1U_0402_16V4Z
2 60.31mA
2 M38 20mils
VCCD_LVDS_1
LVDS
L37 A8 +1.5VS_QDAC
VCCD_LVDS_2 VTTLF1 +1.5VS
L1
VTTLF2
VTTLF
AB2 R69
1 1 VTTLF3 BLM18PG181SN1_0603~D
0.47U_0603_10V7K
0.47U_0603_10V7K
0.47U_0603_10V7K
2 1
1 1 1
C382
C385
C65
0.01U_0402_25V7K~N
0.1U_0402_16V4Z
CANTIGA_1p0
C97
C98
1 1
2 2 2
2 2
A A
1bios.ru Security Classification Compal Secret Data Compal Electronics, Inc.

Cantiga(4/6)-PWR
Custom LA-4595P 1.0
5 4 3 2 1
5 4 3 2 1
U4G
Extnal Graphic: 1210.34mA 3000mA
integrated Graphic: 1930.4mA AP33 W28
VCC_SM_1 VCC_AXG_NCTF_1
AN33 VCC_SM_2 VCC_AXG_NCTF_2 V28
+1.8V BH32 VCC_SM_3 VCC_AXG_NCTF_3 W26
C148 330U_V_2.5VM
U4F BG32 V26
+VCCP VCC_SM_4 VCC_AXG_NCTF_4
22U_0805_6.3V6M~D
C165
22U_0805_6.3V6M~D
C147
0.1U_0402_10V7K~D
BF32 W25
1 BD32 V25
1 1 2 BC32 W24
D + VCC_SM_7 VCC_AXG_NCTF_7 D
AG34 BB32 V24
VCC_1 VCC_SM_8 VCC_AXG_NCTF_8
C164
AC34 BA32 W23
AB34 AY32 V23
VCC_3 2 2 2 1 VCC_SM_10 VCC_AXG_NCTF_10
AA34 AW32 AM21
Y34 AV32 AL21
V34 AU32 AK21
U34 AT32 W21
AM33 AR32 V21
POWER
AK33 AP32 U21
AJ33 AN32 AM20
22U_0805_6.3V6M~D
0.22U_0402_10V4Z
0.22U_0402_10V4Z
0.1U_0402_16V4Z
AG33 BH31 AK20
1 AF33 VCC_12 BG31 VCC_SM_19 VCC_AXG_NCTF_19 W20
220U_D2_4VY_R15M
1 1 1 1 BF31 VCC_SM_20 VCC_AXG_NCTF_20 U20

C118
C143
C119
+ C120
AE33 VCC_13 BG30 VCC_SM_21 VCC_AXG_NCTF_21 AM19
C374
VCC CORE
AC33 VCC_14 BH29 VCC_SM_22 VCC_AXG_NCTF_22 AL19
AA33 VCC_15 BG29 VCC_SM_23 VCC_AXG_NCTF_23 AK19
2 2 2 2 2 Y33 BF29 AJ19
W33 VCC_17 BD29 VCC_SM_25 VCC_AXG_NCTF_25 AH19
VCC SM
V33 VCC_18 BC29 VCC_SM_26 VCC_AXG_NCTF_26 AG19
U33 VCC_19 BB29 VCC_SM_27 VCC_AXG_NCTF_27 AF19
AH28 VCC_20 BA29 VCC_SM_28 VCC_AXG_NCTF_28 AE19
AF28 VCC_21 AY29 VCC_SM_29 VCC_AXG_NCTF_29 AB19
AC28 VCC_22 AW29 VCC_SM_30 VCC_AXG_NCTF_30 AA19
AA28 VCC_23 AV29 VCC_SM_31 VCC_AXG_NCTF_31 Y19
AJ26 VCC_24 AU29 VCC_SM_32 VCC_AXG_NCTF_32 W19
AG26 VCC_25 AT29 VCC_SM_33 VCC_AXG_NCTF_33 V19
AE26 VCC_26 AR29 VCC_SM_34 VCC_AXG_NCTF_34 U19
AC26 VCC_27 AP29 VCC_SM_35 VCC_AXG_NCTF_35 AM17
AH25 VCC_28 VCC_AXG_NCTF_36 AK17
AG25 VCC_29 BA36 VCC_SM_36/NC VCC_AXG_NCTF_37 AH17
AF25 VCC_30 BB24 VCC_SM_37/NC VCC_AXG_NCTF_38 AG17
AG24 VCC_31 BD16 VCC_SM_38/NC VCC_AXG_NCTF_39 AF17
C
AJ23 +VCCP BB21 AE17 C
VCC_32 VCC_SM_39/NC VCC_AXG_NCTF_40
AH23 VCC_33 POWER AW16 VCC_SM_40/NC VCC_AXG_NCTF_41 AC17
AF23 VCC_34 AW13 VCC_SM_41/NC VCC_AXG_NCTF_42 AB17
VCC_NCTF_1 AM32 AT13 VCC_SM_42/NC VCC_AXG_NCTF_43 Y17
T32 VCC_35 VCC_NCTF_2 AL32 VCC_AXG_NCTF_44 W17
VCC_NCTF_3 AK32 6326.84mA VCC_AXG_NCTF_45 V17
VCC GFX NCTF

VCC_NCTF_4 AJ32 VCC_AXG_NCTF_46 AM16
AH32 Y26 AL16
VCC_NCTF_5 VCC_AXG_1 VCC_AXG_NCTF_47
AG32 AE25 AK16
AE32 AB25 AJ16
AC32 AA25 AH16
AA32 AE24 AG16
Y32 AC24 AF16
W32 AA24 AE16
U32 Y24 AC16
AM30 AE23 AB16
AL30 AC23 AA16
AK30 AB23 Y16
AH30 AA23 W16
AG30 AJ21 V16
AF30 AG21 U16
AE30 AE21
VCC_NCTF_19 VCC_AXG_15
AC30 AC21
AB30 AA21
AA30 Y21
Y30 AH20
W30 AF20
VCC NCTF
V30 AE20
U30 AC20
AL29 AB20
AK29 AA20
AJ29 T17
B VCC_NCTF_29 VCC_AXG_25 B
AH29 T16
AG29 AM15
AE29 AL15
AC29 AE15
AA29 AJ15
Y29 AH15
W29 AG15
V29 AF15
AL28 AB15
AK28 AA15
VCC GFX
AL26 Y15
AK26 V15
AK25 U15
AK24 AN14
AK23 AM14
U14 AV44 VCCSM_LF1
VCC_AXG_41 VCC_SM_LF1
BA37 VCCSM_LF2
VCC SM LF
T14
VCC_AXG_42 VCC_SM_LF2
AM40 VCCSM_LF3
VCC_SM_LF3
AV21 VCCSM_LF4
VCC_SM_LF4
AY5 VCCSM_LF5
VCC_SM_LF5
AM10 VCCSM_LF6
VCC_SM_LF6
CANTIGA_1p0 BB13 VCCSM_LF7
VCC_SM_LF7
C70
C71
C67
C81
C146
C145
C163
1 1 1 1 1 1 1
PAD T42 AJ14

VCC_AXG_SENSE
0.1U_0402_16V4Z
0.1U_0402_16V4Z
PAD T43 AH14
VSS_AXG_SENSE 2 2 2 2 2 2 2
0.22U_0603_10V7K
0.22U_0603_10V7K
0.47U_0402_6.3V6K
1U_0603_10V4Z
1U_0603_10V4Z
A A
CANTIGA_1p0

Compal Secret Data
Cantiga(5/6)-PWR/GND
Custom LA-4595P 1.0
5 4 3 2 1
5 4 3 2 1
U4J
U4I BG21 AH8
VSS_199 VSS_297
L12 VSS_200 VSS_298 Y8
AU48 VSS_1 VSS_100 AM36 AW21 VSS_201 VSS_299 L8
AR48 VSS_2 VSS_101 AE36 AU21 VSS_202 VSS_300 E8
AL48 VSS_3 VSS_102 P36 AP21 VSS_203 VSS_301 B8
BB47 VSS_4 VSS_103 L36 AN21 VSS_204 VSS_302 AY7
AW47 VSS_5 VSS_104 J36 AH21 VSS_205 VSS_303 AU7
AN47 F36 AF21 AN7
VSS_6 VSS_105 VSS_206 VSS_304
AJ47 B36 AB21 AJ7
AF47 AH35 R21 AE7
D VSS_8 VSS_107 VSS_208 VSS_306 D
AD47 AA35 M21 AA7
AB47 Y35 J21 N7
Y47 U35 G21 J7
T47 T35 BC20 BG6
N47 BF34 BA20 BD6
L47 AM34 AW20 AV6
G47 AJ34 AT20 AT6
BD46 AF34 AJ20 AM6
BA46 AE34 AG20 M6
AY46 W34 Y20 C6
AV46 B34 N20 BA5
AR46 VSS_20 VSS_119 A34 K20 VSS_220 VSS_318 AH5
AM46 VSS_21 VSS_120 BG33 F20 VSS_221 VSS_319 AD5
V46 VSS_22 VSS_121 BC33 C20 VSS_222 VSS_320 Y5
R46 VSS_23 VSS_122 BA33 A20 VSS_223 VSS_321 L5
P46 VSS_24 VSS_123 AV33 BG19 VSS_224 VSS_322 J5
H46 VSS_25 VSS_124 AR33 A18 VSS_225 VSS_323 H5
F46 VSS_26 VSS_125 AL33 BG17 VSS_226 VSS_324 F5
BF44 VSS_27 VSS_126 AH33 BC17 VSS_227 VSS_325 BE4
AH44 VSS_28 VSS_127 AB33 AW17 VSS_228
AD44 P33 AT17 BC3
AA44
Y44
VSS_29
VSS_30
VSS_31
VSS_128
VSS_129
VSS_130
L33
H33
R17
M17
VSS_229
VSS_230
VSS_231
VSS VSS_327
VSS_328
VSS_329
AV3
AL3
U44 VSS_32 VSS_131 N32 H17 VSS_232 VSS_330 R3
T44 K32 C17 P3
M44
F44
VSS_33
VSS_34
VSS_35
VSS VSS_132
VSS_133
VSS_134
F32
C32 BA16
VSS_233
VSS_235
VSS_331
VSS_332
VSS_333
F3
BA2
BC43 VSS_36 VSS_135 A31 VSS_334 AW2
AV43 VSS_37 VSS_136 AN29 AU16 VSS_237 VSS_335 AU2
AU43 VSS_38 VSS_137 T29 AN16 VSS_238 VSS_336 AR2
AM43 VSS_39 VSS_138 N29 N16 VSS_239 VSS_337 AP2
J43 VSS_40 VSS_139 K29 K16 VSS_240 VSS_338 AJ2
C C
C43 VSS_41 VSS_140 H29 G16 VSS_241 VSS_339 AH2
BG42 VSS_42 VSS_141 F29 E16 VSS_242 VSS_340 AF2
AY42 VSS_43 VSS_142 A29 BG15 VSS_243 VSS_341 AE2
AT42 VSS_44 VSS_143 BG28 AC15 VSS_244 VSS_342 AD2
AN42 VSS_45 VSS_144 BD28 W15 VSS_245 VSS_343 AC2
AJ42 VSS_46 VSS_145 BA28 A15 VSS_246 VSS_344 Y2
AE42 VSS_47 VSS_146 AV28 BG14 VSS_247 VSS_345 M2
N42 AT28 AA14 K2
L42 AR28 C14 AM1
BD41 AJ28 BG13 AA1
AU41 AG28 BC13 P1
AM41 AE28 BA13 H1
AH41 AB28
VSS_53 VSS_152
AD41 Y28 U24
VSS_54 VSS_153 VSS_351
AA41 P28 AN13 U28
Y41 K28 AJ13 U25
U41 H28 AE13 U29
T41 F28 N13
M41 C28 L13
G41 BF26 G13 AF32
VSS_60 VSS_159 VSS_260 VSS_NCTF_1
B41 AH26 E13 AB32
BG40 AF26 BF12 V32
BB40 AB26 AV12 AJ30
AV40 AA26 AT12 AM29
AN40 C26 AM12 AF29
H40 B26 AA12 AB29
VSS NCTF
E40 BH25 J12 U26
AT39 BD25 A12 U23
AM39 BB25 BD11 AL20
AJ39 AV25 BB11 V20
AE39 AR25 AY11 AC19
N39 AJ25 AN11 AL17
B VSS_72 VSS_171 VSS_272 VSS_NCTF_13 B
L39 AC25 AH11 AJ17
B39 Y25 AA17
VSS_74 VSS_173 VSS_NCTF_15
BH38 N25 Y11 U17
BC38 L25 N11
BA38 J25 G11
AU38 G25 C11 BH48
VSS SCB
VSS_78 VSS_177 VSS_278 VSS_SCB_1
AH38 E25 BG10 BH1
AD38 BF24 AV10 A48
AA38 AD12 AT10 C1
Y38 AY24 AJ10 A3
U38 AT24 AE10
T38 AJ24 AA10 E1
VSS_84 VSS_183 VSS_284 NC_26
J38 AH24 M10 D2
VSS_85 VSS_184 VSS_285 NC_27
F38 AF24 BF9 C3
VSS_86 VSS_185 VSS_286 NC_28
C38 AB24 BC9 B4
VSS_87 VSS_186 VSS_287 NC_29
BF37 R24 AN9 A5
VSS_88 VSS_187 VSS_288 NC_30
BB37 L24 AM9 A6
VSS_89 VSS_188 VSS_289 NC_31
AW37 K24 AD9 A43
VSS_90 VSS_189 VSS_290 NC_32
AT37 J24 G9 A44
VSS_91 VSS_190 VSS_291 NC_33
AN37 G24 B9 B45
NC
VSS_92 VSS_191 VSS_292 NC_34
AJ37 F24 BH8 C46
VSS_93 VSS_192 VSS_293 NC_35
H37 E24 BB8 D47
VSS_94 VSS_193 VSS_294 NC_36
C37 BH23 AV8 B47
VSS_95 VSS_194 VSS_295 NC_37
BG36 AG23 AT8 A46
VSS_96 VSS_195 VSS_296 NC_38
BD36 Y23 F48
VSS_97 VSS_196 NC_39
AK15 B23 E48
AU36 A23 C48
AJ6 B48
VSS_199 NC_42
CANTIGA_1p0 CANTIGA_1p0
A A

Compal Secret Data
Cantiga(6/6)-PWR/GND
Custom LA-4595P 1.0
5 4 3 2 1
5 4 3 2 1
Close to VREF pins of SO-DIMM

+1.8V
<8> DDR_A_DQS#[0..7] +V_DDR_MCH_REF <7,14>
<8> DDR_A_D[0..63] JDIM2
2.2U_0805_16V4Z
0.1U_0402_16V4Z
1 VREF VSS 2
3 4 DDR_A_D5 1 1
<8> DDR_A_DM[0..7] VSS DQ4
C201
C220
DDR_A_D4 5 6 DDR_A_D0
DDR_A_D1 DQ0 DQ5
<8> DDR_A_DQS[0..7] 7 DQ1 VSS 8
9 10 DDR_A_DM0
DDR_A_DQS#0 VSS DM0 2 2
<8> DDR_A_MA[0..13] 11 DQS0# VSS 12
DDR_A_DQS0 13 14 DDR_A_D6
DQS0 DQ6 DDR_A_D7
15 16
DDR_A_D2 VSS DQ7
17 18
DDR_A_D3 DQ2 VSS DDR_A_D13
19 20
D DQ3 DQ12 DDR_A_D12 D
21 22
DDR_A_D8 VSS DQ13
23 24
DDR_A_D9 DQ8 VSS DDR_A_DM1
Layout Note: 25
DQ9 DM1
26
27 28
Place near JDIM1 DDR_A_DQS#1 29
VSS VSS
30 M_CLK_DDR0
M_CLK_DDR0 <7>
DDR_A_DQS1 DQS1# CK0 M_CLK_DDR#0
31 32 M_CLK_DDR#0 <7>
DQS1 CK0#
33 34
DDR_A_D14 VSS VSS DDR_A_D11
35 36
DDR_A_D15 DQ10 DQ14 DDR_A_D10
37 38
DQ11 DQ15
39 40
VSS VSS
+1.8V 41 42
43 DQ16 DQ20 44
DQ17 DQ21
47 VSS VSS 48
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
330U 2.5V Y D2
1 DDR_A_DQS#2 49 50
DDR_A_DQS2 DQS2# NC DDR_A_DM2 PM_EXTTS#0 <7>
1 1 1 1 1 1 1 1 1 51 DQS2 DM2 52
C105
C124
C149
C166
C169
C154
C131
C130
C108
C84
+ 53 54
55 DQ18 DQ22 56
@ DDR_A_D19 57 58 DDR_A_D22
2 2 2 2 2 2 2 2 2 2 DQ19 DQ23
59 VSS VSS 60
63 DQ25 DQ29 64
65 VSS VSS 66
DDR_A_DM3 67 68 DDR_A_DQS#3
DM3 DQS3# DDR_A_DQS3
69 NC DQS3 70
71 VSS VSS 72
75 DQ27 DQ31 76
Layout Note: DDR_CKE0_DIMMA
77 VSS VSS 78
DDR_CKE1_DIMMA
<7> DDR_CKE0_DIMMA 79 CKE0 NC/CKE1 80 DDR_CKE1_DIMMA <7>
C Place one cap close to every 2 pullup 81 82 C
VDD VDD
resistors terminated to +0.9V DDR_A_BS#2
83 NC NC/A15 84
DDR_A_MA14
<8> DDR_A_BS#2 85 BA2 NC/A14 86 DDR_A_MA14 <8>
87 VDD VDD 88
DDR_A_MA12 89 90 DDR_A_MA11
DDR_A_MA9 A12 A11 DDR_A_MA7
91 A9 A7 92
DDR_A_MA8 93 94 DDR_A_MA6
A8 A6
95 96
DDR_A_MA5 VDD VDD DDR_A_MA4
97 98
99 100
101 102
A1 A0
103 104
DDR_A_MA10 VDD VDD DDR_A_BS#1
105 106 DDR_A_BS#1 <8>
DDR_A_BS#0 A10/AP BA1 DDR_A_RAS#
<8> DDR_A_BS#0 107 108 DDR_A_RAS# <8>
+0.9VS DDR_A_WE# BA0 RAS# DDR_CS0_DIMMA#
109 110 DDR_CS0_DIMMA# <7>
<8> DDR_A_WE# WE# S0#
111 112
DDR_A_CAS# VDD VDD M_ODT0
<8> DDR_A_CAS# 113 114 M_ODT0 <7>
DDR_CS1_DIMMA# CAS# ODT0 DDR_A_MA13
115 116
<7> DDR_CS1_DIMMA# NC/S1# NC/A13
117 118
VDD VDD
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
M_ODT1 119 120

<7> M_ODT1 NC/ODT1 NC
121 122
1 1 1 1 1 1 1 1 1 1 1 1 1 1 123 124
125 126
DQ33 DQ37
127 128
DDR_A_DQS#4 VSS VSS DDR_A_DM4
129 130
2 2 2 2 2 2 2 2 2 2 2 2 2 2 DDR_A_DQS4 DQS4# DM4
131 132
DQS4 VSS
C106
C125
C126
C127
C150
C151
C167
C107
C128
C129
C152
C153
C168
C234
133 134 DDR_A_D39

DDR_A_D35 VSS DQ38 DDR_A_D38
135 136
DDR_A_D34 DQ34 DQ39
137 138
DQ35 VSS DDR_A_D45
139 140
DDR_A_D40 VSS DQ44 DDR_A_D47
141 142
DDR_A_D44 DQ40 DQ45
143 144
B DQ41 VSS DDR_A_DQS#5 B
145 146
DDR_A_DM5 VSS DQS5# DDR_A_DQS5
147 148
DM5 DQS5
149 150
151 152
Layout Note: 153
DQ43 DQ47
154
Place these resistor 155 156
157 158
closely JP41,all DDR_A_D48 159
DQ48 DQ52
160 DDR_A_D53
trace length Max=1.5" DQ49 DQ53
161 162
VSS VSS M_CLK_DDR1
163 164 M_CLK_DDR1 <7>
NC,TEST CK1 M_CLK_DDR#1
165 166 M_CLK_DDR#1 <7>
DDR_A_DQS#6 VSS CK1#
167 168
+0.9VS DDR_A_DQS6 DQS6# VSS DDR_A_DM6
169 170
DQS6 DM6
171 172
173 174
175 176
DQ51 DQ55
177 178
179 180
RP14 RP22 56_0404_4P2R_5% DDR_A_D60 DQ56 DQ60 DDR_A_D56
181 182
DDR_A_MA5 DQ57 DQ61
1 4 4 1 DDR_A_MA12 183 184
DDR_A_MA8 VSS VSS
2 3 3 2 DDR_CKE0_DIMMA DDR_A_DM7 185
DM7 DQS7#
186 DDR_A_DQS#7
187 188 DDR_A_DQS7
RP13 56_0404_4P2R_5% RP17 56_0404_4P2R_5% DDR_A_D59 VSS DQS7
189 190
DDR_A_MA1 DQ58 VSS
1 4 4 1 DDR_A_MA7 DDR_A_D58 191
DQ59 DQ62
192 DDR_A_D62
DDR_A_MA3 2 3 3 2 DDR_A_MA6 193 194 DDR_A_D63
ICH_SM_DA VSS DQ63
<14,15,19> ICH_SM_DA 195 196
RP7 56_0404_4P2R_5% RP15 56_0404_4P2R_5% ICH_SM_CLK SDA VSS
<14,15,19> ICH_SM_CLK 197 198
DDR_A_RAS# SCL SA0
1 4 4 1 DDR_A_MA9 +3VS 199
VDDSPD SA1
200
DDR_CS0_DIMMA# 2 3 3 2 DDR_A_BS#2 1
1
10K_0402_5%
10K_0402_5%
1 1
RP6 56_0404_4P2R_5% RP16 56_0404_4P2R_5% C58 C59 FOX_ASOA426-M2RN-7F
R31
R32
DDR_A_BS#0 1 4 4 1 DDR_A_MA4
A DDR_A_MA10 2 3 3 2 DDR_A_MA2 0.1U_0402_16V4Z
2 2
2.2U_0603_6.3V6K SO-DIMM A A
REVERSE
2
RP5 56_0404_4P2R_5% RP8 56_0404_4P2R_5%
1bios.ru
DDR_A_CAS# 1 4 4 1 DDR_A_MA0
DDR_A_WE# 2 3 3 2 DDR_A_BS#1
Bottom side
RP1 56_0404_4P2R_5% RP2 56_0404_4P2R_5%
DDR_CS1_DIMMA# 2 3 4 1 M_ODT0
M_ODT1 1 4 3 2 DDR_A_MA13
56_0404_4P2R_5% RP23 56_0404_4P2R_5%
DDR_CKE1_DIMMA 1 2 4 1 DDR_A_MA14 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR2 SO-DIMM I
R96 56_0402_5% 3 2 DDR_A_MA11 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom LA-4595P 1.0
5 4 3 2 1
5 4 3 2 1
<8> DDR_B_DQS#[0..7] Close to VREF pins of SO-DIMM

+1.8V
<8> DDR_B_D[0..63]
+V_DDR_MCH_REF
+V_DDR_MCH_REF <7,13>
<8> DDR_B_DM[0..7] JDIM1
2.2U_0805_16V4Z
0.1U_0402_16V4Z
<8> DDR_B_DQS[0..7] 1 VREF VSS 2
3 4 DDR_B_D5 1 1
DDR_B_D0 VSS DQ4 DDR_B_D4
<8> DDR_B_MA[0..13] 5 DQ0 DQ5 6
C221
C222
DDR_B_D1 7 8
DQ1 VSS DDR_B_DM0
9 VSS DM0 10
DDR_B_DQS#0 11 12 2 2
DDR_B_DQS0 DQS0# VSS DDR_B_D6
13 14
DQS0 DQ6 DDR_B_D7
15 16
DDR_B_D2 VSS DQ7
17 18
D DDR_B_D3 DQ2 VSS DDR_B_D12 D
Layout Note: 19
DQ3 DQ12
20
DDR_B_D13
21 22
Place near JDIM2 DDR_B_D8 VSS DQ13
23 24
DDR_B_D9 DQ8 VSS DDR_B_DM1
25 26
DQ9 DM1
27 28
DDR_B_DQS#1 VSS VSS M_CLK_DDR2
29 30 M_CLK_DDR2 <7>
DDR_B_DQS1 DQS1# CK0 M_CLK_DDR#2
31 32 M_CLK_DDR#2 <7>
DQS1 CK0#
33 34
DDR_B_D10 VSS VSS DDR_B_D14
35 36
DDR_B_D11 DQ10 DQ14 DDR_B_D15
37 38
+1.8V DQ11 DQ15
39 40
VSS VSS
41 VSS VSS 42
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
330U 2.5V Y D2
1 DDR_B_D17 43 44 DDR_B_D21
1 1 1 1 1 1 1 1 1 45 DQ17 DQ21 46
C112
C139
C160
C138
C177
C109
C132
C133
C155
C189
+ 47 48
DDR_B_DQS#2 VSS VSS
49 DQS2# NC 50 PM_EXTTS#1 <7>
@ DDR_B_DQS2 51 52 DDR_B_DM2
2 2 2 2 2 2 2 2 2 2 DQS2 DM2
53 VSS VSS 54
DDR_B_D18 55 56 DDR_B_D22
57 DQ19 DQ23 58
59 VSS VSS 60
DDR_B_D28 61 62 DDR_B_D29
63 DQ25 DQ29 64
65 VSS VSS 66
DDR_B_DM3 67 68 DDR_B_DQS#3
DM3 DQS3# DDR_B_DQS3
69 NC DQS3 70
Layout Note: DDR_B_D30
71 VSS VSS 72
DDR_B_D26
73 74
Place one cap close to every 2 pullup DDR_B_D31 75
DQ26 DQ30
76 DDR_B_D27
DQ27 DQ31
C resistors terminated to +0.9VS DDR_CKE2_DIMMB
77 VSS VSS 78
DDR_CKE3_DIMMB C
<7> DDR_CKE2_DIMMB 79 CKE0 NC/CKE1 80 DDR_CKE3_DIMMB <7>
81 VDD VDD 82
83 NC NC/A15 84
DDR_B_BS#2 85 86 DDR_B_MA14
<8> DDR_B_BS#2 BA2 NC/A14 DDR_B_MA14 <8>
87 VDD VDD 88
DDR_B_MA12 89 90 DDR_B_MA11
DDR_B_MA9 A12 A11 DDR_B_MA7
91 A9 A7 92
DDR_B_MA8 93 94 DDR_B_MA6
A8 A6
95 96
DDR_B_MA5 VDD VDD DDR_B_MA4
97 98
99 100
101 102
+0.9VS A1 A0
103 104
DDR_B_MA10 VDD VDD DDR_B_BS#1
105 106 DDR_B_BS#1 <8>
DDR_B_BS#0 A10/AP BA1 DDR_B_RAS#
<8> DDR_B_BS#0 107 108 DDR_B_RAS# <8>
DDR_B_WE# BA0 RAS# DDR_CS2_DIMMB#
<8> DDR_B_WE# 109 110 DDR_CS2_DIMMB# <7>
WE# S0#
111 112
DDR_B_CAS# VDD VDD M_ODT2
<8> DDR_B_CAS# 113 114 M_ODT2 <7>
CAS# ODT0
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_CS3_DIMMB# 115 116 DDR_B_MA13

<7> DDR_CS3_DIMMB# NC/S1# NC/A13
117 118
M_ODT3 VDD VDD
1 1 1 1 1 1 1 1 1 1 1 1 1 <7> M_ODT3 119 120
NC/ODT1 NC
121 122
123 124
125 126
2 2 2 2 2 2 2 2 2 2 2 2 2 DQ33 DQ37
127 128
VSS VSS
C110
C134
C135
C156
C157
C170
C171
C111
C136
C158
C137
C172
C159
DDR_B_DQS#4 129 130 DDR_B_DM4

DDR_B_DQS4 DQS4# DM4
131 132
DQS4 VSS DDR_B_D39
133 134
135 136
DDR_B_D35 DQ34 DQ39
137 138
DQ35 VSS DDR_B_D44
139 140
141 142
B DDR_B_D41 DQ40 DQ45 B
143 144
DQ41 VSS DDR_B_DQS#5
145 146
DDR_B_DM5 VSS DQS5# DDR_B_DQS5
Layout Note: 147
DM5 DQS5
148
Place these resistor 149 150
151 152
closely JP42,all DDR_B_D43 153
DQ42 DQ46
154 DDR_B_D47
trace length Max=1.5" DQ43 DQ47
155 156
157 158
159 160
+0.9VS DQ49 DQ53
161 162
VSS VSS M_CLK_DDR3
163 164 M_CLK_DDR3 <7>
NC,TEST CK1 M_CLK_DDR#3
165 166
DDR_B_DQS#6 VSS CK1# M_CLK_DDR#3 <7>
167 168
DDR_B_DQS6 DQS6# VSS DDR_B_DM6
169 170
DQS6 DM6
171 172
173 174
RP18 RP24 56_0404_4P2R_5% DDR_B_D50 DQ50 DQ54 DDR_B_D55
175 176
DDR_B_MA1 DDR_B_MA9 DQ51 DQ55
1 4 4 1 177 178
DDR_B_MA3 DDR_B_MA12 DDR_B_D56 VSS VSS DDR_B_D60
2 3 3 2 179 180
181 182
RP10 56_0404_4P2R_5% RP26 56_0404_4P2R_5% DQ57 DQ61
183 184
DDR_B_MA10 DDR_B_MA14 DDR_B_DM7 VSS VSS DDR_B_DQS#7
1 4 4 1 185 186
DDR_B_BS#0 DDR_B_MA11 DM7 DQS7# DDR_B_DQS7
2 3 3 2 187 188
DDR_B_D59 VSS DQS7
189 190
RP12 56_0404_4P2R_5% RP19 56_0404_4P2R_5% DDR_B_D58 DQ58 VSS DDR_B_D62
191 192
DDR_B_BS#1 DDR_B_MA5 DQ59 DQ62 DDR_B_D63
1 4 4 1 193 194
DDR_B_MA0 DDR_B_MA8 ICH_SM_DA VSS DQ63
2 3 3 2 <13,15,19> ICH_SM_DA 195 196
ICH_SM_CLK SDA VSS R33
<13,15,19> ICH_SM_CLK 197 198
RP11 56_0404_4P2R_5% RP21 56_0404_4P2R_5% SCL SAO
+3VS 199 200 1 2 +3VS
DDR_B_RAS# DDR_B_MA7 VDDSPD SA1
1 4 4 1
1
10K_0402_5%
DDR_CS2_DIMMB# 2 3 3 2 DDR_B_MA6 1 1 10K_0402_5%
R34
C61 C60 FOX_AS0A426-NARN-7F~N
A RP9 56_0404_4P2R_5% RP20 56_0404_4P2R_5% A
DDR_B_CAS#
DDR_B_WE#
1
2
4
3
4
3
1
2
DDR_B_MA4
DDR_B_MA2
0.1U_0402_16V4Z
2 2
2.2U_0603_6.3V6K SO-DIMM B
REVERSE
1bios.ru
2
RP3
56_0404_4P2R_5% RP4 56_0404_4P2R_5%
DDR_CS3_DIMMB# 2 3 4 1 DDR_B_MA13 Bottom side
M_ODT3 1 4 3 2 M_ODT2
56_0404_4P2R_5% RP25 Security Classification Compal Secret Data Compal Electronics, Inc.
4 1 DDR_B_BS#2 2007/1/15 2008/1/15 Title
DDR_CKE3_DIMMB 1 DDR_CKE2_DIMMB
Issued Date Deciphered Date
2 3 2
R335 56_0402_5%
DDR2 SO-DIMM II
56_0404_4P2R_5% Size Document Number Rev
Custom LA-4595P 1.0
5 4 3 2 1
5 4 3 2 1
+3VS_CK505
FSC FSB FSA CPU SRC PCI REF DOT_96 USB Routing the trace at least 10mil R971
+3VS 1 2
CLKSEL2 CLKSEL1 CLKSEL0 MHz MHz MHz MHz MHz MHz CLK_XTAL_OUT 0_0805_5% 1
C1189
1
C1190
1
C1191
1
C1192
1
C1193
1
C1194
1
C1195
CLK_XTAL_IN
*
2
0_0402_5%
0 0 0 266 100 33.3 14.318 96.0 48.0 2
10U_0805_10V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
R986
0 0 1 133 100 33.3 14.318 96.0 48.0 14.31818MHZ_16P
Y7 0905 Connect to +VCCP
1
+VCCP +1.05VS_CK505
0 1 0 200 100 33.3 14.318 96.0 48.0 2 1
Place close to U55
D D
0 1 1 166 100 33.3 14.318 96.0 48.0 2 2 R972
1 2 0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z
C1196 C1197 0_0805_5% 1 1 1 1 1 1 1
1 0 0 333 100 33.3 14.318 96.0 48.0 22P_0402_50V8J
1 1
22P_0402_50V8J C1198 C1199 C1200 C1201 C1202 C1203 C1204
+1.05VS_CK505 2 2 2 2 2 2 2
1 0 1 100 100 33.3 14.318 96.0 48.0
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
1 1 0 400 100 33.3 14.318 96.0 48.0

+3VS_CK505
1 1 1 Reserved MEDIA_REQ#32
MEDIA_REQ#32 <30>
R1019 1 2 0_0402_5% CLK_PCIE_Media <30>CardBus OZ888
R1021 1 2 0_0402_5% CLK_PCIE_Media# <30>
R976 1 2 0_0402_5% R_MCH_BCLK# EXPCARD_REQ#16

<7> CLK_MCH_BCLK# EXPCARD_REQ#16 <26>
NB R978 0_0402_5% R_MCH_BCLK R_PCIE_EXPR R979 1 2 0_0402_5%
<7> CLK_MCH_BCLK 1 2
R_CPU_BCLK# R_PCIE_EXPR# CLK_PCIE_EXPR <26> Express Card
R980 2 1 0_0402_5% R981 1 2 0_0402_5%
R37 <4> CLK_CPU_BCLK# R_CPU_BCLK CLK_PCIE_EXPR# <26>
R983 CPU R982 2 1 0_0402_5%
FSA <4> CLK_CPU_BCLK
1 2 1 2 MCH_CLKSEL0 <7> +3VS_CK505
2.2K_0402_5%
1K_0402_1%
73
71
68
72
70
67
64
61
57
66
62
60
56
55
65
63
58
69
59
<5> CPU_BSEL0
U55
+3VS_CK505 +1.05VS_CK505
VDD_CPU_IO
VDD_SRC_IO
CPU_0
CPU_1
SRC_7
SRC_6
CPU_0#
CPU_1#
SRC_7#
SRC_6#
SRC_8/CPU_ITP
GND
SRC_8#/CPU_ITP#
VDD_CPU
CLKREQ_7#
CLKREQ_6#
VDD_SRC
VSS_CPU
VSS_SRC
C C
CK_PWRGD 1 54 H_STP_PCI#
<19> CK_PWRGD CKPWRGD/PD# PCI_STOP# H_STP_PCI# <19>
CPU_BSEL1 2 53 H_STP_CPU# CPU_STP
FS_B/TEST_MODE CPU_STOP# H_STP_CPU# <19>
C1209 @ 3 52
CLK_XTAL_OUT VSS_REF VDD_SRC_IO R_CLK_WWAN# R988 1
2 1 4 XTAL_OUT SRC_10# 51 2 0_0402_5% CLK_PCIE_WWAN# <23>
For SED TEST 22P_0402_50V8J CLK_XTAL_IN R_CLK_WWAN R989 1 2 0_0402_5%
5 XTAL_IN SRC_10 50 CLK_PCIE_WWAN <23> MiniCard_WWAN
6 49 WWAN_REQ#10
VDD_REF CLKREQ_10# WWAN_REQ#10 <23>
R991 1 2 33_0402_1% FSC 7
REF_0/FS_C/TEST_ SRC_11
48 R_PCIE_SATA R992 1 2 0_0402_5% CLK_PCIE_SATA <18>
<19> CLK_14M_ICH R_PCIE_SATA# R994 2 0_0402_5%
PAD T120
ICH_SM_DA
8
REF_1 SRC_11#
47
R_CLKSATAREQ#
1 CLK_PCIE_SATA# <18> ICH_SATA
<13,14,19> ICH_SM_DA 9 46 R56 1 2475_0402_1%~D
ICH_SM_CLK SDA CLKREQ_11# R_CLK_PCIE_LAN# CLKSATAREQ# <19>
SB, MINI PCI <13,14,19> ICH_SM_CLK 10 45 R996 1 2 0_0402_5%
R39 SCL SRC_9# CLK_PCIE_LAN# <21>
11 44 R_CLK_PCIE_LAN R997 1 2 0_0402_5% GLAN
CPU_BSEL1 NC SRC_9 GLAN_REQ#9 CLK_PCIE_LAN <21>
1 2 MCH_CLKSEL1 <7> 12 43 GLAN_REQ#9 <21>
VDD_PCI CLKREQ_9#
13 42
R1001 33_0402_1% PCI2_TME PCI_1 VSS_SRC WLAN_REQ#4
1 2 14 41 WLAN_REQ#4 <23>
1K_0402_1% <23> CLK_DEBUG_PORT R1004 33_0402_1% R_CLK_PCI_EC PCI_2 CLKREQ_4# R_CLK_PCIE_MCARD# R1005 1
<5> CPU_BSEL1 1 2 15 40 2 0_0402_5% CLK_PCIE_MCARD# <23>
<27> CLK_PCI_EC R1006 33_0402_1% 27_SEL PCI_3 SRC_4# R_CLK_PCIE_MCARD R1007 1
1 2 16
PCI_4/SEL_LCDCL SRC_4
39 2 0_0402_5% CLK_PCIE_MCARD <23>MiniCard_WLAN
<28> CLK_PCI_TPM
USB_1/CLKREQ_A#
R1008 1 2 33_0402_1% ITP_EN 17 38
<17> PCI_CLK
LCDCLK#/27M_SS
PCIF_5/ITP_EN VDD_SRC_IO
SRC_0#/DOT_96#
18 37
VSS_PCI CLKREQ_3#
SRC_0/DOT_96
C1205
C1206
C1207
C1208
2 2 2 2
VDD_PLL3_IO
LCDCLK/27M
USB_0/FS_A
VDD_PLL3
VSS_PLL3
VSS_SRC
VDD_48
SRC_2#
SRC_3#
VDD_IO
VSS_48
VSS_IO
SRC_2
SRC_3
1 1 1 1
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
@ @ @ @
For SED TEST
C1251 @ S IC ICS9LPRS387AKLFT MLF 72P CLK GEN
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
2 1 +3VS_CK505
22P_0402_50V8J R_PCIE_ICH# R1010 1 2 0_0402_5%
R_PCIE_ICH CLK_PCIE_ICH# <19>
R1012 1 2 0_0402_5% ICH
FSA CLK_PCIE_ICH <19>
R1013 1 2 33_0402_1%
<19> CLK_48M_ICH
B R47 R_CLKREQ#_7 R_MCH_3GPLL# B
R1016 1 2 R1015 1 2 0_0402_5%
FSC <7> CLKREQ#_7 R_MCH_3GPLL CLK_MCH_3GPLL# <7>
1 2 1 2 R51 475_0402_1%~D +1.05VS_CK505 R1018 1 2 0_0402_5% NB_3GPLL
MCH_CLKSEL2 <7> CLK_MCH_3GPLL <7>
10K_0402_5% +1.05VS_CK505
R1024 2 1 0_0402_5% R_MCH_DREFCLK
1K_0402_1% <31> CLK_PCIE_VGA
VGA (Discrete)<31> R1026 2 1 0_0402_5% R_MCH_DREFCLK# SSCDREFCLK# R1067 1 2 33_0402_1%
<5> CPU_BSEL2 CLK_PCIE_VGA# SSCDREFCLK CLK_NVSS_27M <31>
R1195 2 33_0402_1%
1 CLK_NV_27M <31> VGA_27M (DIS)
+3VS
ITP_EN * 01 = SRC8/SRC8#
= ITP/ITP#
0 = Enable DOT96 & SRC1(UMA)
27_SEL
EXPCARD_REQ#16 1
* 01 = Enable SRC0 & 27MHz(DIS)
= Overclocking of CPU and SRC Allowed WWAN_REQ#10
R90
1
2
10K_0402_5%
2
PCI2_TME R89 10K_0402_5%
CLKSATAREQ#
*1 = Overclocking of CPU and SRC NOT allowed 1 2
R88 10K_0402_5%
GLAN_REQ#9 1 2
+3VS_CK505 +3VS_CK505 R87 10K_0402_5%
WLAN_REQ#4 1 2
R85 10K_0402_5%
1
CLKREQ#_7 1 2
R1030 R1031 R60 10K_0402_5%
A 10K_0402_5% MEDIA_REQ#32 A
10K_0402_5% 1 2
R80 10K_0402_5%
1bios.ru
2
ITP_EN 27_SEL PCI2_TME

1
R1032
10K_0402_5%
Clock Generator CK505
2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4595P 1.0
5 4 3 2 1
A B C D E
D11 D18 D20

DAN217_SC59-3 DAN217_SC59-3 DAN217_SC59-3
CRT
1
+CRT_VCC +CRT_VCC +3VS +3VS +3VS
+5VS +CRT_VCC
W=40mils
2
For NVidia R140 D14 R7 R6 R77 R103
W=40mils
2K_0402_5%
2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
+5VS 1 2 +5VS_CRTVCC 2 1
3
0_1210_5%~D RB411DT146 SOT23
1
@ @ @ 1 1
0.1U_0402_16V4Z
2
C43
C44
G
0.1U_0402_16V4Z
2 2 VGA_DDC_DATA_C 1 3 VGA_DDCDATA <31>
1 @ 1
2
G
<27> MSEN# MSEN#
VGA_DDC_CLK_C Q3
1 3 VGA_DDCCLK <31>
JCRT1 SSM3K7002FU_SC70-3
S
VGA_CRT_R 1 2 CRT_R_L 6
<31> VGA_CRT_R
L8 11
BK1608LL121-T 0603 Q5
1 16
VGA_CRT_G 1 2 CRT_G_L 7 17 SSM3K7002FU_SC70-3
<31> VGA_CRT_G
L10 12
BK1608LL121-T 0603 2
VGA_CRT_B 1 2 CRT_B_L 8
<31> VGA_CRT_B
L14 13
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
1 BK1608LL121-T 0603 3
150_0402_1%
150_0402_1%
1 1
1
@ @ @ 1 1 1 DDC_MD2 9
150_0402_1%
1
C45 C46 C47

R65
R63
For EMI 14
C48 C49 C50
R64
4
2 2 2
10
2 2 2
15
2
2 1 5
2
4.7P_0402_50V8C 4.7P_0402_50V8C 4.7P_0402_50V8C C51
100P_0402_50V8J
SUYIN_070549FR015S208CR
+CRT_VCC HSYNC_L
1 2 CONN@
L11 0_0603_5% 2
1 2 2 1 1 VGA_DDC_DATA_C
C52 0.1U_0402_16V4Z R62 10K_0402_5% 1 2 VSYNC_L C53
L13 0_0603_5% 1
5
1
100P_0402_50V8J
100P_0402_50V8J
2
1 1
P
OE#
VGA_HSYNC 2 4 D_CRT_HSYNC C54 VGA_DDC_CLK_C

<31> VGA_HSYNC A Y C55 C144 @2
G
U62
15P_0402_50V8J
15P_0402_50V8J
74AHCT1G125GW_SOT353-5 2 2
3
+CRT_VCC 1
2 2
@
100P_0402_50V8J
1 2 C140
C115 0.1U_0402_16V4Z 2
1
5
P
OE#
VGA_VSYNC 2 4 D_CRT_VSYNC
<31> VGA_VSYNC A Y
G
U63
74AHCT1G125GW_SOT353-5
3
+3VS
LCD
1
R21
+LCDVDD +5VALW
W=60mils D26 4.7K_0402_5%
+3VS CH751H-40_SC76 JCA1
2
2
BKOFF# 1 2 DISPOFF# 1
100_0603_1%
47K_0402_5%
<27> BKOFF# 1
D25
R67
R75
2 2
@ CH751H-40_SC76 3
<19> USB20_P1 3
<27,31> G7X_ENBKL G7X_ENBKL 1 2 4 4
<19> USB20_N1 5
1 1
L42 MBK1608221YZF_0603 5
+5VS 1 2 6 6
3
D S
SI2301BDS-T1-E3 1P SOT23 MIC_SIG
G <24> MIC_SIG 7 7
3 Q7 2 2 1 2 Q6 R652 +3VS 1 L43 2 MBK1608221YZF_0603
R81 8 3
SSM3K7002FU_SC70-3 G R68 1K_0402_5% 2.2K_0402_5% MIC_CLK1 8
W=60mils <24> MIC_CLK
MIC_DIAG0_0603_5%
2 9 9
S <27> MIC_DIAG 10
3
Q9 7.3 +LCDVDD 10
1 D 11 GND
12
1
SSM3K7002FU_SC70-3 C173 +LCDVDD @ C38 GND

1
D8 D ACES_88460-1001
1 2
VGA_LVDDEN 2 0.1U_0402_16V4Z
<31> VGA_LVDDEN 2 1 2 1 1 CAMERA
CH751H-40PT_SOD323-2 G C174 C41 JLVDS1
1
S 0.047U_0402_16V7K +LCDVDD 1 2 +LCDVDD

3
LCD_VCC_TEST_EN 1 2
2 R662 1 4.7U_0805_10V4Z 0.1U_0402_16V4Z 3 4 LCD_CBL_DET#
10K_0402_5%
<27> LCD_VCC_TEST_EN 2 2 +3VS 3 4 LCD_CBL_DET# <27>

0_0402_5% VGA_CLK_LCD LCD_TST
R15
<31> VGA_CLK_LCD 5 5 6 6 LCD_TST <27>

VGA_LVDSA0- 7 8 VGA_DAT_LCD
<31> VGA_LVDSA0- 7 8 VGA_DAT_LCD <31>
9 10 VGA_LVDSA0+ VGA_LVDSA0+ <31>
2
VGA_LVDSA1+ 9 10 VGA_LVDSA1-
<31> VGA_LVDSA1+ 11 11 12 12 VGA_LVDSA1- <31>
<31> VGA_LVDSA2- VGA_LVDSA2- 13 14
13 14 VGA_LVDSA2+
15 15 16 16 VGA_LVDSA2+ <31>
<31> VGA_LVDSAC+ VGA_LVDSAC+ 17 18 VGA_LVDSAC- VGA_LVDSAC- <31>
VGA_LVDSB0- 17 18
<31> VGA_LVDSB0- 19 19 20 20
21 22 VGA_LVDSB0+ VGA_LVDSB0+ <31>
VGA_LVDSB1+ 21 22 VGA_LVDSB1-
<31> VGA_LVDSB1+ 23 23 24 24 VGA_LVDSB1- <31>
<31> VGA_LVDSB2- VGA_LVDSB2- 25 26
25 26 VGA_LVDSB2+
27 27 28 28 VGA_LVDSB2+ <31>
<31> VGA_LVDSBC+ VGA_LVDSBC+ 29 30 VGA_LVDSBC- VGA_LVDSBC- <31>
EC_SMB_CK2_R 29 30
31 31 32 32
+B+ 33 34 EC_SMB_DA2_R
INVT_PWM 33 34
<27> INVT_PWM 35 35 36 36 +B+
DAC_BRIG 37 38 DISPOFF#
<27> DAC_BRIG 37 38
39 39 40 40
LCD_TST 41 42
D60 GND GND
LCD_CBL_DET# 2 2
3 INVT_PWM ACES_88242-4001 C32 C34
1 DAC_BRIG
2 INVT_PWM DISPOFF# 0.1U_0603_50V4Z
0.1U_0603_50V4Z
1 1
4 4
PJSOT24C_SOT23-3
@
C3
C4
C6
100P_0402_25V8K C14
C17
1 2 EC_SMB_CK2_R
1bios.ru
<4,27,31> EC_SMB_CK2
@ R19 0_0402_5%
100P_0402_25V8K
100P_0402_25V8K
100P_0402_25V8K
100P_0402_25V8K
<4,27,31> EC_SMB_DA2 1 2 EC_SMB_DA2_R

@ R12 0_0402_5%

CRT CONN/LCD CONN
ESD EMI Size Document Number Rev
Custom LA-4595P 1.0
A B C D E
5 4 3 2 1
+3VS
R1035 1 2 8.2K_0402_5% PCI_DEVSEL#
R1036 1 2 8.2K_0402_5% PCI_STOP#
R1037 1 2 8.2K_0402_5% PCI_TRDY#
R1038 1 2 8.2K_0402_5% PCI_FRAME# U56B

D11 F1 PCI_REQ0#
R1039 1 PCI_PLOCK# AD0 REQ0# PCI_GNT0#
2 8.2K_0402_5% C8
AD1 PCI GNT0#
G4
D PCI_REQ1# D
D9 B6
R1040 1 PCI_IRDY# AD2 REQ1#/GPIO50
2 8.2K_0402_5% E12
AD3 GNT1#/GPIO51
A7
E9 F13 PCI_REQ2#
R1041 1 PCI_SERR# AD4 REQ2#/GPIO52
2 8.2K_0402_5% C9 F12
AD5 GNT2#/GPIO53 PCI_REQ3#
E10 E6
R1042 1 PCI_PERR# AD6 REQ3#/GPIO54 PCI_GNT3#
2 8.2K_0402_5% B7
AD7 GNT3#/GPIO55
F6
C7
AD8
C5 D8
AD9 C/BE0#
G11 B4
AD10 C/BE1#
F8 D6
AD11 C/BE2#
F11 A5
AD12 C/BE3#
E7 AD13
A3 D3 PCI_IRDY#
+3VS AD14 IRDY#
D2 AD15 PAR E3
F10 R1 PCI_PCIRST#
AD16 PCIRST# PCI_DEVSEL#
D5 AD17 DEVSEL# C6
R1043 1 2 8.2K_0402_5% PCI_PIRQA# D10 E4 PCI_PERR#
AD18 PERR# PCI_PLOCK#
B3 AD19 PLOCK# C2
R1044 1 2 8.2K_0402_5% PCI_PIRQB# F7 J4 PCI_SERR#
AD20 SERR# PCI_STOP#
C3 AD21 STOP# A4
R1045 1 2 8.2K_0402_5% PCI_PIRQC# F3 F5 PCI_TRDY#
AD22 TRDY# PCI_FRAME#
F4 AD23 FRAME# D7
R1046 1 2 8.2K_0402_5% PCI_PIRQD# C1 AD24 PCI_PLTRST#
G7 AD25 PLTRST# C14
R1047 1 2 8.2K_0402_5% PCI_PIRQE# H7 D4 PCI_CLK
AD26 PCICLK PCI_CLK <15>
D1 R2 PME#
R1048 1 PCI_PIRQF# AD27 PME#
2 8.2K_0402_5% G5 AD28
H6 AD29
R1049 1 2 8.2K_0402_5% PCI_PIRQG# G1 AD30
H3 AD31
R1050 2 1 8.2K_0402_5% PCI_PIRQH#
C PCI_PIRQA# J5
Interrupt I/F H4 PCI_PIRQE# C
PCI_PIRQB# PIRQA# PIRQE#/GPIO2 PCI_PIRQF#
E1 PIRQB# PIRQF#/GPIO3 K6
R1051 1 2 8.2K_0402_5% PCI_REQ0# PCI_PIRQC# J6 F2 PCI_PIRQG#
PCI_PIRQD# PIRQC# PIRQG#/GPIO4 PCI_PIRQH#
C4 PIRQD# PIRQH#/GPIO5 G2
R1052 1 2 8.2K_0402_5% PCI_REQ1#
ICH9M REV 1.0
R1053 1 2 8.2K_0402_5% PCI_REQ2#
PCI_REQ3# C2
R1054 1 2 8.2K_0402_5%
2 1 1 2 PCI_CLK
@ R10 @ 33_0402_5%
R20 1 2 10K_0402_5% PME# +3VALW
22P_0402_50V8J
1
C78
0.1U_0402_16V4Z
2
5
@ U61
PCI_PCIRST# 2
P
B PCI_RST#
4 PCI_RST# <21,23,26,28>
Y
1
A
G
MC74VHC1G08DFT2G SC70 5P
3
A16 swap override Strap R1094
0_0402_5%
2 1
Low= A16 swap override Enble
Boot BIOS Strap
B PCI_GNT3# High= Default * B
PCI_GNT0# SPI_CS#1 Boot BIOS Location
0 1 SPI
@R1055
@R1055 +3VALW
PCI_GNT3# 1 2
1K_0402_5%
1 0 PCI 1
C57
0.1U_0402_16V4Z
2
1 1 LPC *
@
5
@ U58
PCI_PLTRST# 2
P
+3VALW B PLT_RST#
4 PLT_RST# <7,27,30,31>
Y
1
A
G
@ R1058
SPI_CS1#_R 1 2 MC74VHC1G08DFT2G SC70 5P
<19> SPI_CS1#_R
3
1K_0402_5%
@ R1060 R1061
PCI_GNT0# 1 2 0_0402_5%
1K_0402_5% 2 1
A A

Compal Secret Data
ICH9(1/4)-PCI/INT
5 4 3 2 1
5 4 3 2 1
+RTCVCC
+3VS
1 2 SM_INTRUDER# R1063
R1062 1M_0402_5% GATEA20 1 2
LAN100_SLP_INTVRMEN 10K_0402_5%
R1064 332K_0402_1%~D
R1066
KB_RST# 1 2
10K_0402_5%
D D
+RTCVCC
U56A LPC_AD[0..3] <23,27,28>

1 2
R1068 20K_0402_5% ICH_RTCX1 C23 K5 LPC_AD0
ICH_RTCX2 RTCX1 FWH0/LAD0 LPC_AD1
1 2 C24 K4
R1109 20K_0402_5% RTCX2 FWH1/LAD1 LPC_AD2
L6
ICH_RTCRST# FWH2/LAD2 LPC_AD3
A25 RTCRST# FWH3/LAD3 K2
SRTCRST#
RTC
LPC
F20 SRTCRST#
SM_INTRUDER# C22 K3 LPC_FRAME#
INTRUDER# FWH4/LFRAME# LPC_FRAME# <23,27,28>
1 1 +VCCP
2
C1220 C1210 LAN100_SLP_INTVRMEN B22 J3 LPC_DRQ0# T121 PAD
JOPEN2 JOPEN1 LAN100_SLP_INTVRMEN A22 INTVRMEN LDRQ0#
LAN100_SLP LDRQ1#/GPIO23 J1 T122 PAD
1U_0603_10V4Z @ 1U_0603_10V4Z @
2
2 2 GATEA20
Need to place JMINI1 E25 GLAN_CLK A20GATE N7
H_A20M# GATEA20 <27>
AJ27 R1070
A20M# H_A20M# <4>
ICH_RTCX1 C13 56_0402_5%
LAN_RSTSYNC H_DPRSTP#
DPRSTP# AJ25 H_DPRSTP# <5,7,47>
R1069 F14 AE23 H_DPSLP#
LAN / GLAN
H_DPSLP# <5>
1
ICH_RTCX2 LAN_RXD0 DPSLP#
1 2 2 R984 1 G13 LAN_RXD1
0_0402_5% D14 AJ26 R_H_FERR# R1072 1 2 H_FERR#
LAN_RXD2 FERR# H_FERR# <4>
10M_0402_5% 56_0402_5%
1 1 D13 AD22 H_PWRGOOD
LAN_TXD0 CPUPWRGD H_PWRGOOD <5>
C1211 C1212 D12 LAN_TXD1 H_IGNNE#
E13 LAN_TXD2 IGNNE# AF25 H_IGNNE# <4>
CPU
12P_0402_50V8J 12P_0402_50V8J
2 2 +1.5VS H_INIT#
B10 GPIO56 INIT# AE22 H_INIT# <4>
AG25 H_INTR +VCCP
C INTR KB_RST# H_INTR <4> C
B28 GLAN_COMPI RCIN# L3 KB_RST# <27>
R1073 24.9_0402_1% 1 2 GLAN_COMP B27 GLAN_COMPO
1
AF23 H_NMI
HDA_BITCLK NMI H_SMI# H_NMI <4>
R1074 33_0402_5% 1 2 AF6 AF24 R1075
<24> ACZ_BITCLK HDA_SYNC HDA_BIT_CLK SMI# H_SMI# <4>
R1076 33_0402_5% 1 2 AH4 56_0402_5%
<24> ACZ_SYNC HDA_SYNC H_STPCLK#
STPCLK# AH27 H_STPCLK# <4>
4
1
Y8 R1077 33_0402_5% 1 2 HDARST# AE7

<24> ACZ_RST#
2
HDA_RST# THRMTRIP_ICH# R1078
AG26 1 2 54.9_0402_1%
OUT
IN
ADC_ACZ_SDIN0 THRMTRIP# H_THERMTRIP# <4,7>

<24> ADC_ACZ_SDIN0 AF4
HDA_SDIN0
AG4 AG27 T52 PAD
HDA_SDIN1 TP12
IHDA
AH3
HDA_SDIN2
NC
NC
AE5
HDA_SDIN3
AH11
R1079 33_0402_5% HDA_SDOUT SATA4RXN
<24> ACZ_SDOUT 1 2 AG5 AJ11
2
HDA_SDOUT SATA4RXP
AG12
SATA4TXN
PAD T123 AG7 AF12
HDA_DOCK_EN#/GPIO33 SATA4TXP
+3VS 1 2 PAD T124 AE8
32.768KHZ_12.5P_1TJS125BJ2A251 R1080 10K_0402_5% HDA_DOCK_RST#/GPIO34
AH9
SATA_LED# SATA5RXN
<28> SATA_LED# AG8 AJ9
SATALED# SATA5RXP
AE10
SATA5TXN
<22> PSATA_IRX_DTX_N0_C AJ16 AF10
0.01U_0402_50V7K SATA0RXN SATA5TXP
<22> PSATA_IRX_DTX_P0_C AH16
SATA
PSATA_ITX_DRX_N0C1213 1 PSATA_ITX_DRX_N0_C AF17 SATA0RXP CLK_PCIE_SATA#
HDD <22> PSATA_ITX_DRX_N0 PSATA_ITX_DRX_P0C1214 1
2
2 PSATA_ITX_DRX_P0_C AG17 SATA0TXN SATA_CLKN
AH18
AJ18 CLK_PCIE_SATA CLK_PCIE_SATA# <15>
<22> PSATA_ITX_DRX_P0 SATA0TXP SATA_CLKP CLK_PCIE_SATA <15>
C1321 15P_0402_50V8J @
1 2 ACZ_BITCLK 0.01U_0402_50V7K AH13 AJ7
<22> ODD_IRX_DTX_N0_C SATA1RXN SATARBIAS#
0.01U_0402_50V7K AJ13 AH7 R1081 1 2
<22> ODD_IRX_DTX_P0_C SATA1RXP SATARBIAS
C1307 15P_0402_50V8J @ ODD_ITX_DRX_N0 C1215 1 2 ODD_ITX_DRX_N0_C
1 2 ACZ_SDOUT
ODD <22> ODD_ITX_DRX_N0 ODD_ITX_DRX_P0 1 2 ODD_ITX_DRX_P0_C
AG14
AF14
SATA1TXN 24.9_0402_1%
<22> ODD_ITX_DRX_P0 SATA1TXP
C1216 Within 500 mils
0.01U_0402_50V7K ICH9M REV 1.0
B For EMI TEST B
XOR CHAIN ENTRANCE STRAP:RSVD

+3VS
@ R1082
1 2 ACZ_SDOUT
1K_0402_5%
@ R1083
1 2 ICH_RSVD
ICH_RSVD <19>
1K_0402_5%
A A

Compal Secret Data
ICH9(2/4)_LAN,HD,IDE,LPC
Custom LA-4595P 1.0
5 4 3 2 1
5 4 3 2 1
1 2 SERIRQ Place closely pin AF3 Place closely pin H1

+3VS
R1084 10K_0402_5% +3VALW R1085 1 2 2.2K_0402_5%
1 2 PCI_CLKRUN# R1087 1 2 2.2K_0402_5%
R1086 8.2K_0402_5% U56C CLK_48M_ICH CLK_14M_ICH
1 2 EC_THERM# ICH_SMBCLK G16 AH23 GPIO21 1 2 +3VS
<26> ICH_SMBCLK ICH_SMBDATA SMBCLK SATA0GP/GPIO21 GPIO19
@R1088
@ R1088 8.2K_0402_5% A13 AF19 R1089 8.2K_0402_5%
<26> ICH_SMBDATA SMBDATA SATA1GP/GPIO19
1
1 2 OCP# CL_RST#1 E17 AE21 GPIO36 @ @
SATA
GPIO
ME_EC_CLK1 LINKALERT#/GPIO60/CLGPIO4 SATA4GP/GPIO36 GPIO37
SMB
R1090 10K_0402_5% C17 AD20 R1091 R1092
ME_EC_DATA1 SMLINK0 SATA5GP/GPIO37
B18 SMLINK1
1 2 LAN_CABDT CLK14 H1 CLK_14M_ICH
CLK_14M_ICH <15>
10_0402_5% 10_0402_5%
R310 10K_0402_5% ICH_RI# F19 AF3 CLK_48M_ICH
Clocks
CLK_48M_ICH <15>
2
RI# CLK48
1 2 EC_SCI# PAD T125 SUS_STAT# R4 P1 ICH_SUSCLK T126 PAD 1 @ 1 @
R1095 8.2K_0402_5% XDP_DBRESET# SUS_STAT#/LPCPD# SUSCLK C1217 C1218
<4> XDP_DBRESET# G19
SYS_RESET# SLP_S3#
@ C16 SLP_S3# <27>
D PM_BMBUSY# SLP_S3# SLP_S4# 4.7P_0402_50V8C 4.7P_0402_50V8C D
<7> PM_BMBUSY# M6 E16 SLP_S4# <27>
PMSYNC#/GPIO0 SLP_S4# SLP_S5# 2 2
G17 SLP_S5# <27>
EC_LID_OUT# SLP_S5#
<27> EC_LID_OUT# A17
SMBALERT#/GPIO11 R695 100_0402_5%
C10 T127 PAD
H_STP_PCI# S4_STATE#/GPIO26 M_PWROK
<15> H_STP_PCI# A14 1 2
R_STP_CPU# STP_PCI# ICH_PWROK
SYS GPIO
<15> H_STP_CPU# E19 G20 ICH_PWROK <7,27>
STP_CPU# PWROK
+3VS 1 2 SB_SPKR 1 2
R1096 @ 10K_0402_5% PCI_CLKRUN# L4 M2 R1097 10K_0402_5%
<27,28> PCI_CLKRUN# CLKRUN# DPRSLPVR/GPIO16 DPRSLPVR <7,47>
low-->default 0_0402_5%
ICH_PCIE_WAKE# 1 R658 2 @ ICH_PCIE_WAKE#_R E20 B13 ICH_LOW_BAT#
Power MGT
<21,23,26,27> ICH_PCIE_WAKE# WAKE# BATLOW#
High -->No boot SERIRQ M5
<27,28> SERIRQ EC_THERM# SERIRQ PBTN_OUT#
<27> EC_THERM# AJ23 THRM# PWRBTN# R3 PBTN_OUT# <27>
<7,27,47> VGATE 1 2 VRMPWRGD D21 D20

R1099 0_0402_5% VRMPWRGD LAN_RST# R1104
+3VS 1 2 GPIO49 1 2 PAD T128 A20 D22 R_EC_RSMRST# 1 2 10K_0402_5%
R1101
@ 10K_0402_5% R1102 100K_0402_5% TP11 RSMRST#
OCP# AG19 R5 CK_PWRGD_R R1105 1 2 0_0402_5%
@ <4> OCP# GPIO1 CK_PWRGD CK_PWRGD <15>
LAN_LOPWEN AH21
<21> LAN_LOPWEN GPIO6 M_PWROK
checklist pull hi AG21 GPIO7 CLPWROK R6 M_PWROK <7>
<27> EC_SMI# EC_SMI# A21
EC_SCI# GPIO8 +3VS
<27> EC_SCI# C12 GPIO12 SLP_M# B16 T129 PAD
PAD T130 C21 GPIO13
AE18 F24 CL_CLK0 R1106
GPIO17 CL_CLK0 CL_CLK0 <7>
K1 B19 0.1U_0402_16V4Z 1 2
GPIO18 CL_CLK1 3.24K_0402_1%
T53 AF8 GPIO20
1
AJ22 F22 CL_DATA0 1
SCLOCK/GPIO22 CL_DATA0 CL_DATA0 <7>
PAD T131 A9 C19 C1219 R1107
Controller Link
GPIO
GPIO27 CL_DATA1 453_0402_1%
PAD T132 D19 GPIO28
CLKSATAREQ# L1 C25 CL_VREF0_ICH
<15> CLKSATAREQ# SATACLKREQ#/GPIO35 CL_VREF0 2 NA lead free
AE19 A19
2
SLOAD/GPIO38 CL_VREF1
AG22 SDATAOUT0/GPIO39
C CL_RST# C
AF21 SDATAOUT1/GPIO48 CL_RST0# F21 CL_RST# <7>
GPIO49 AH24 D18
CL_RST#1 GPIO49 CL_RST1#
+3VALW 1 2 A8 GPIO57/CLGPIO5
R1108 10K_0402_5% A16
ICH_LOW_BAT# SB_SPKR MEM_LED/GPIO24
1 2 <24> SB_SPKR M7 SPKR GPIO10/SUS_PWR_ACK C18
R1110 8.2K_0402_5% MCH_ICH_SYNC# AJ24 C11
<7> MCH_ICH_SYNC# MCH_SYNC# GPIO14/AC_PRESENT ACIN <27,39,40>
1 2 ICH_PCIE_WAKE#_R ICH_RSVD B21 C20 1 2 LAN_CABDT LAN_CABDT <21>
<18> ICH_RSVD TP3 WOL_EN/GPIO9
R1111 10K_0402_5%
MISC
PAD T133 AH20
ICH_RI# TP8 @ 0_0402_5% R657
1 2 PAD T134 AJ20
R1113 10K_0402_5% TP9
PAD T135 AJ21
XDP_DBRESET# TP10
1 2
R1114 10K_0402_5% ICH9M REV 1.0
1 2 ME_EC_CLK1 RSMRST circuit
R1115 10K_0402_5% U56D
1 2 ME_EC_DATA1 N29 V27 DMI_MTX_IRX_N0 R1103 @ R656
PERN1 DMI0RXN DMI_MTX_IRX_N0 <7>
R1116 10K_0402_5% N28 V26 DMI_MTX_IRX_P0 0_0402_5% 0_0402_5%
PERP1 DMI0RXP DMI_MTX_IRX_P0 <7>
Direct Media Interface

1 2 EC_LID_OUT# P27 U29 DMI_MRX_ITX_N0 1 2 1 2 POK <41>
PETN1 DMI0TXN DMI_MRX_ITX_N0 <7>
R1117 10K_0402_5% P26 U28 DMI_MRX_ITX_P0 DMI_MRX_ITX_P0 <7>
EC_SMI# PETP1 DMI0TXP
1 2
R1119 8.2K_0402_5% GLAN_RXN L29 Y27 DMI_MTX_IRX_N1 R_EC_RSMRST#
<21> GLAN_RXN PERN2 DMI1RXN DMI_MTX_IRX_N1 <7>
GLAN_RXP L28 Y26 DMI_MTX_IRX_P1
<21> GLAN_RXP PERP2 DMI1RXP DMI_MTX_IRX_P1 <7> <27> EC_RSMRST#
GLAN <21> GLAN_TXN
0.1U_0402_16V7K~N2 1 C1221GLAN_TXN_C M27
PETN2 DMI1TXN
W29 DMI_MRX_ITX_N1
DMI_MRX_ITX_N1 <7>
<21> GLAN_TXP
0.1U_0402_16V7K~N2 1 C1222GLAN_TXP_C M26 W28 DMI_MRX_ITX_P1 DMI_MRX_ITX_P1 <7>
PETP2 DMI1TXP
PCIE_RXN3 J29 AB27 DMI_MTX_IRX_N2
<23> PCIE_RXN3 PERN3 DMI2RXN DMI_MTX_IRX_N2 <7>
PCIE_RXP3 J28 AB26 DMI_MTX_IRX_P2
<23> PCIE_RXP3 PERP3 DMI2RXP DMI_MTX_IRX_P2 <7>
PCI-Express
WLAN <23> PCIE_TXN3 0.1U_0402_16V7K~N2 1 C1223PCIE_C_TXN3 K27 AA29 DMI_MRX_ITX_N2 DMI_MRX_ITX_N2 <7>
PETN3 DMI2TXN
<23> PCIE_TXP3 0.1U_0402_16V7K~N2 1 C1224PCIE_C_TXP3 K26
PETP3 DMI2TXP
AA28 DMI_MRX_ITX_P2 DMI_MRX_ITX_P2 <7>
R113 10K_0402_5% PCIE_RXN4 G29 AD27 DMI_MTX_IRX_N3
<26> PCIE_RXN4 PERN4 DMI3RXN DMI_MTX_IRX_N3 <7>
EC_SWI# 1 2 Express Card PCIE_RXP4 G28 AD26 DMI_MTX_IRX_P3
+3VALW <26> PCIE_RXP4 PERP4 DMI3RXP DMI_MTX_IRX_P3 <7>
R114 10K_0402_5% <26> PCIE_TXN4 0.1U_0402_16V7K~N2 1 C1225PCIE_C_TXN4 H27 AC29 DMI_MRX_ITX_N3 DMI_MRX_ITX_N3 <7>
B PETN4 DMI3TXN B
USB_OC#1 1 2 <26> PCIE_TXP4 0.1U_0402_16V7K~N2 1 C1226PCIE_C_TXP4 H26
PETP4 DMI3TXP
AC28 DMI_MRX_ITX_P3
DMI_MRX_ITX_P3 <7>
R125 10K_0402_5%
USB_OC#2_#8 1 2 E29 T26 CLK_PCIE_ICH#
<30> PCIE_RXN5 PERN5 DMI_CLKN CLK_PCIE_ICH CLK_PCIE_ICH# <15>
R129 10K_0402_5% E28 T25
<30> PCIE_RXP5 PERP5 DMI_CLKP CLK_PCIE_ICH <15>
USB_OC#4 1 2 Card Reader <30> PCIE_TXN5 0.1U_0402_16V7K~N2 1 C1228 F27
PETN5
R130 10K_0402_5% <30> PCIE_TXP5 0.1U_0402_16V7K~N2 1 C1227 F26
PETP5 DMI_ZCOMP
AF29 R1120 24.9_0402_1% Within 500 mils
USB_OC#7 1 2 AF28 DMI_IRCOMP 1 2 +1.5VS
R132 10K_0402_5% PCIE_RXN1 DMI_IRCOMP
<23> PCIE_RXN1 C29
USB_OC#9 PCIE_RXP1 PERN6/GLAN_RXN USB20_N0
1 2 WWAN <23> PCIE_RXP1 C28
PERP6/GLAN_RXP USBP0N
AC5 USB20_N0 <29>
R134 10K_0402_5% <23> PCIE_TXN1 0.1U_0402_16V7K~N2 1 C1309PCIE_C_TXN1 D27
PETN6/GLAN_TXN USBP0P
AC4 USB20_P0
USB20_P0 <29>JUSBP1
USB_OC#0 1 2 <23> PCIE_TXP1 0.1U_0402_16V7K~N2 1 C1308PCIE_C_TXP1 D26 AD3 USB20_N1
PETP6/GLAN_TXP USBP1N USB20_N1 <16>
R135 10K_0402_5% USB20_P1
USB_OC#3 USBP1P
AD2
USB20_N2 USB20_P1 <16>Camera
1 2 D23 AC1 USB20_N2 <29>
R136 10K_0402_5% SPI_CLK USBP2N USB20_P2
USB_OC#5 SPI_CS1#_R
D24
SPI_CS0# USBP2P
AC2
USB20_N3 USB20_P2 <29>JUSBP3
1 2 <17> SPI_CS1#_R F23 AA5 USB20_N3 <29>
R137 10K_0402_5% SPI_CS1#/GPIO58/CLGPIO6 USBP3N USB20_P3
USB_OC#10 USBP3P
AA4
USB20_N4 USB20_P3 <29>Felica
1 2 D25 AB2 USB20_N4 <29>
R138 10K_0402_5% SPI_MOSI USBP4N USB20_P4
SPI
USB_OC#11
E23
SPI_MISO USBP4P
AB3
USB20_N5 USB20_P4 <29>BlueTooth
1 2 AA1 USB20_N5 <29>
USB_OC#0 USBP5N USB20_P5
<29> USB_OC#0 N4
OC0#/GPIO59 USBP5P
AA2 USB20_P5 <29>FingerPrinter
USB_OC#1 N5 W5 USB20_N6
USB_OC#2_#8 OC1#/GPIO40 USBP6N USB20_P6 USB20_N6 <23>
<29> USB_OC#2_#8 USB_OC#3
N6
OC2#/GPIO41 USBP6P USB W4
USB20_N7 USB20_P6 <23>Mini Card
P6 Y3 USB20_N7 <26>
USB_OC#4 OC3#/GPIO42 USBP7N USB20_P7
M1
OC4#/GPIO43 USBP7P
Y2 USB20_P7 <26>Express Card
USB_OC#5 N2 W1 USB20_N8
+3VS EC_SWI# OC5#/GPIO29 USBP8N USB20_P8 USB20_N8 <29>
<27> EC_SWI# USB_OC#7
M4
OC6#/GPIO30 USBP8P
W2
M3 V2 USB20_N9 <29>
USB_OC#2_#8 OC7#/GPIO31 USBP9N USB20_P9
USB_OC#9
N3
OC8#/GPIO44 USBP9P
V3
<29> USB_OC#9 N1 U5 USB20_N10 <23>
OC9#/GPIO45 USBP10N
1
2.2K_0402_5% USB_OC#10 P5 U4 USB20_P10 Mini Card2

USB_OC#11 OC10#/GPIO46 USBP10P USB20_P10 <23>
2.2K_0402_5% R1123 R1124 P3 U1
OC11#/GPIO47 USBP11N
USBP11P U2
A Q106 USBRBIAS A
AG2 USBRBIAS
SSM3K7002FU_SC70-3 AG1
2
USBRBIAS#
1
S
3 1 ICH_SMBDATA Within 500 mils

ICH_SMBDATA <26>
1bios.ru
<13,14,15> ICH_SM_DA
ICH9M REV 1.0
S
<13,14,15> ICH_SM_CLK 3 1ICH_SMBCLK ICH_SMBCLK <26> R1125

22.6_0402_1%
G
2
Q107
G

2
+3VS SSM3K7002FU_SC70-3
ICH9(3/4)_DMI,USB,GPIO,PCIE
Custom LA-4595P 1.0
5 4 3 2 1
5 4 3 2 1
+RTCVCC +VCCP U56E

20 mils G3: 6uA U56F 1634mA AA26 VSS[1] VSS[107] H5
A23 VCCRTC VCC1_05[1] A15 AA27 VSS[2] VSS[108] J23
1U_0603_10V4Z~D
0.1U_0402_16V4Z
0.1U_0402_16V4Z
VCC1_05[2] B15 AA3 VSS[3] VSS[109] J26
1 1 1 +ICH_V5REF_RUN 2mA A6 C15 0.1U_0402_16V4Z 0.1U_0402_16V4Z AA6 J27
V5REF VCC1_05[3] VSS[4] VSS[110]
C1229
C1230
VCC1_05[4] D15 1 1 AB1 VSS[5] VSS[111] AC22
C1231
+ICH_V5REF_SUS 2mA AE1 E15 C1232 C1233 AA23 K28
V5REF_SUS VCC1_05[5] VSS[6] VSS[112]
VCC1_05[6] F15 AB28 VSS[7] VSS[113] K29
2 2 2 AA24 L11 AB29 L13
VCC1_5_B[1] VCC1_05[7] 2 2 VSS[8] VSS[114]
AA25 VCC1_5_B[2] VCC1_05[8] L12 AB4 VSS[9] VSS[115] L15
AB24 VCC1_5_B[3] VCC1_05[9] L14 AB5 VSS[10] VSS[116] L2
AB25 L16 L97 AC17 L26
L96 VCC1_5_B[4] VCC1_05[10] VSS[11] VSS[117]
40 mils AC24
VCC1_5_B[5] VCC1_05[11]
L17 BLM18PG181SN1_0603~D AC26
VSS[12] VSS[118]
L27
+1.5VS 1 2 +VCC1_5_B 22U_0805_6.3V6M~D646mA AC25 L18 1 2 +1.5VS AC27 L5
BLM21PG600SN1D_0805~D VCC1_5_B[6] VCC1_05[12] VSS[13] VSS[119]
1 AD24 M11 AC3 L7
D VCC1_5_B[7] VCC1_05[13] VSS[14] VSS[120]
0.01U_0402_16V7K
D
1 1 1 AD25 M18 1 1 AD1 M12
VCC1_5_B[8] VCC1_05[14] VSS[15] VSS[121]
220U_D2_4VM
+ C1235 C1236 C1237 AE25 P11 C1238 C1239 AD10 M13
VCC1_5_B[9] VCC1_05[15] VSS[16] VSS[122]
C1234
AE26 P18 10U_0805_10V4Z AD12 M14
VCC1_5_B[10] VCC1_05[16] VSS[17] VSS[123]
AE27 T11 AD13 M15
2 2 2 2 VCC1_5_B[11] VCC1_05[17] 2 2 VSS[18] VSS[124]
AE28 T18 AD14 M16
VCC1_5_B[12] VCC1_05[18] VSS[19] VSS[125]
AE29 U11 AD17 M17
CORE
2.2U_0603_6.3V4Z VCC1_5_B[13] VCC1_05[19] VSS[20] VSS[126]
F25 U18 AD18 M23
+5VS +3VS 22U_0805_6.3V6M~D VCC1_5_B[14] VCC1_05[20] VSS[21] VSS[127]
G25 V11 AD21 M28
VCC1_5_B[15] VCC1_05[21] 5ohm@100MHz VSS[22] VSS[128]
H24 V12 AD28 M29
VCC1_5_B[16] VCC1_05[22] VSS[23] VSS[129]
H25 V14 1 2 +VCCP AD29 N11
VCC1_5_B[17] VCC1_05[23] VSS[24] VSS[130]
1
22U_0805_6.3VAM
J24 V16 L98 AD4 N12
R1127 D45 VCC1_5_B[18] VCC1_05[24] BLM18PG181SN1_0603~D VSS[25] VSS[131]
J25 VCC1_5_B[19] VCC1_05[25] V17 1 AD5 VSS[26] VSS[132] N13
100_0402_5%~D K24 V18 C1240 AD6 N14
CH751H-40PT_SOD323-2 VCC1_5_B[20] VCC1_05[26] VSS[27] VSS[133]
K25 VCC1_5_B[21] AD7 VSS[28] VSS[134] N15
L23 R29 +VCCDMIPLL AD9 N16
2
VCC1_5_B[22] VCCDMIPLL 2 VSS[29] VSS[135]

L24 VCC1_5_B[23] AE12 VSS[30] VSS[136] N17
+ICH_V5REF_RUN L25 W23 23mA +VCC_DMI AE13 N18
VCC1_5_B[24] VCC_DMI[1] +VCCP VSS[31] VSS[137]
1 20 mils M24 VCC1_5_B[25] VCC_DMI[2] Y23 AE14 VSS[32] VSS[138] N26
M25 VCC1_5_B[26] AE16 VSS[33] VSS[139] N27
C1241 N23 AB23 48mA AE17 P12
1U_0603_10V6K~D VCC1_5_B[27] V_CPU_IO[1] VSS[34] VSS[140]
N24 VCC1_5_B[28] V_CPU_IO[2] AC23 AE2 VSS[35] VSS[141] P13
2
4.7U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
N25 VCC1_5_B[29] AE20 VSS[36] VSS[142] P14
P24 AG29 2mA 0.1U_0402_16V4Z +3VS 1 1 1 AE24 P15
VCC1_5_B[30] VCC3_3[1] VSS[37] VSS[143]
C1242
C1243
C1244
P25 VCC1_5_B[31] AE3 VSS[38] VSS[144] P16
VCCA3GP
R24 AJ6 0.1U_0402_16V4Z 1 +3VS 1 AE4 P17
+5VALW +3VALW VCC1_5_B[32] VCC3_3[2] VSS[39] VSS[145]
R25 VCC1_5_B[33] AE6 VSS[40] VSS[146] P2
2 2 2
C1245
C1246
R26 AC10 0.1U_0402_16V4Z 1 +3VS AE9 P23
VCC1_5_B[34] VCC3_3[7] VSS[41] VSS[147]
R27 VCC1_5_B[35] AF13 VSS[42] VSS[148] P28
1
2 2
C1247
D46 T24 AD19 AF16 P29
R1128 VCC1_5_B[36] VCC3_3[3] VSS[43] VSS[149]
T27 AF20 AF18 P4
VCCP_CORE
100_0402_5%~D VCC1_5_B[37] VCC3_3[4] 2 (DMI) VSS[44] VSS[150]
T28 VCC1_5_B[38] VCC3_3[5] AG24 AF22 VSS[45] VSS[151] P7
CH751H-40PT_SOD323-2 T29 AC20 +3VS AH26 R11
C VCC1_5_B[39] VCC3_3[6] VSS[46] VSS[152] C
U24 308mA AF26 R12
2
+ICH_V5REF_SUS VCC1_5_B[40] VSS[47] VSS[153]

U25 VCC1_5_B[41] VCC3_3[8] B9 AF27 VSS[48] VSS[154] R13
0.1U_0402_16V4Z
C1248
0.1U_0402_16V4Z
C1249
0.1U_0402_16V4Z
C1250
20 mils V24 VCC1_5_B[42] VCC3_3[9] F9 1 1 1 AF5 VSS[49] VSS[155] R14
1 V25 VCC1_5_B[43] VCC3_3[10] G3 AF7 VSS[50] VSS[156] R15
U23 VCC1_5_B[44] VCC3_3[11] G6 AF9 VSS[51] VSS[157] R16
C1306 W24 J2 AG13 R17
1U_0603_10V6K~D VCC1_5_B[45] VCC3_3[12] 2 2 2 VSS[52] VSS[158]
PCI
W25 VCC1_5_B[46] VCC3_3[13] J7 AG16 VSS[53] VSS[159] R18
2
K23 K7 AG18 R28
VCC1_5_B[47] VCC3_3[14] VSS[54] VSS[160]
Y24 AG20 T12
L99 VCC1_5_B[48] 0.1U_0402_16V4Z VSS[55] VSS[161]
Y25 AJ4 +3VS AG23 T13
10UH_LB2012T100MR_20%_0805~D 47mA VCC1_5_B[49] VCCHDA VSS[56] VSS[162]
1 AG3 T14
+VCCSATAPLL 11mA 0.1U_0402_16V4Z C1252 VSS[57] VSS[163]
+1.5VS 1 2 AJ19 AJ3 +3VALW AG6 T15
VCCSATAPLL VCCSUSHDA VSS[58] VSS[164]
1 AG9 T16
VSS[59] VSS[165]
10U_0805_10V4Z
1U_0603_10V4Z
+1.5VS AC16 AC8 11mA C1253 AH12 T17

VCC1_5_A[1] VCCSUS1_05[1] T140 2 VSS[60] VSS[166]
1 AD15 F17 AH14 T23
VCC1_5_A[2] VCCSUS1_05[2] T141 VSS[61] VSS[167]
C1254
1 1 AD16 AH17 B26

VCC1_5_A[3] 2 VSS[62] VSS[168]
ARX
C1255
C1256 AE15 AD8 +VCCSUS1_5_ICH_1 AH19 U12

VCC1_5_A[4] VCCSUS1_5[1] T142 VSS[63] VSS[169]
AF15 AH2 U13
2 1U_0603_10V4Z VCC1_5_A[5] +VCCSUS1_5_ICH_2 VSS[64] VSS[170]
AG15 F18 AH22 U14
2 2 VCC1_5_A[6] VCCSUS1_5[2] T143 VSS[65] VSS[171]
AH15 1 AH25 U15
VCC1_5_A[7] C1257 VSS[66] VSS[172]
AJ15 AH28 U16
VCC1_5_A[8] VSS[67] VSS[173]
A18 AH5 U17
VCCPSUS
VCCSUS3_3[1] +3VALW VSS[68] VSS[174]

AC11 D16 0.1U_0402_16V4Z AH8 AD23
+1.5VS VCC1_5_A[9] VCCSUS3_3[2] 2 VSS[69] VSS[175]
1 AD11 D17 AJ12 U26
C1258 VCC1_5_A[10] VCCSUS3_3[3] VSS[70] VSS[176]
AE11 E22 AJ14 U27
VCC1_5_A[11] VCCSUS3_3[4] VSS[71] VSS[177]
ATX
AF11 AJ17 U3
1U_0603_10V4Z VCC1_5_A[12] VSS[72] VSS[178]
AG10 AJ8 V1
2 VCC1_5_A[13] VSS[73] VSS[179]
AG11 AF1 B11 V13
AH10
VCC1_5_A[15]
212mA B14
VSS[75] VSS[181]
V15
AJ10 T1 B17 V23
T2 B2 V28
VCCSUS3_3[7] VSS[77] VSS[183]
AC9 T3 B20 V29
B VCC1_5_A[17] VCCSUS3_3[8] +3VALW VSS[78] VSS[184] B
T4 B23 V4
VCCSUS3_3[9] VSS[79] VSS[185]
0.1U_0402_16V4Z~D
0.022U_0402_16V7K~D
0.022U_0402_16V7K~D
1342mA AC18
VCC1_5_A[18] VCCSUS3_3[10]
T5 B5
VSS[80] VSS[186]
V5
AC19 T6 B8 W26
U6 1 1 1 C26 W27
VCCPUSB
+1.5VS VCCSUS3_3[12] VSS[82] VSS[188]

AC21 U7 C27 W3
C1259
C1260
C1261
1 V6 E11 Y1
C1262 VCCSUS3_3[14] VSS[84] VSS[190]
G10 V7 E14 Y28
VCC1_5_A[21] VCCSUS3_3[15] 2 2 2 VSS[85] VSS[191]
G9 W6 E18 Y29
0.1U_0402_16V4Z VCC1_5_A[22] VCCSUS3_3[16] VSS[86] VSS[192]
W7 E2 Y4
2 VCCSUS3_3[17] VSS[87] VSS[193]
AC12 Y6 E21 Y5
AC13 Y7 E24 AG28
+1.5VS AC14 T7 E5 AH6
1 11mA E8
VSS[91] VSS[197]
AF2
C1263 AJ5 G22 +VCCCL1_05_ICH F16 B25
11mA VCCUSBPLL VCCCL1_05 T144 VSS[92] VSS[198]
1 F28
0.1U_0402_16V4Z +VCCCL1_5_ICH C1264 VSS[93]
AA7 G23 F29 A1
2 VCC1_5_A[26] VCCCL1_5 VSS[94] VSS_NCTF[1]
USB CORE
AB6 19/73/73mA G12 A2

VCC1_5_A[27] 0.1U_0402_16V4Z VSS[95] VSS_NCTF[2]
AB7 A24 +3VS 1 1 G14 A28
VCC1_5_A[28] VCCCL3_3[1] 2 VSS[96] VSS_NCTF[3]
AC6 B24 G18 A29
VCC1_5_A[29] VCCCL3_3[2] VSS[97] VSS_NCTF[4]
C1265 1U_0603_10V4Z
C1266 0.1U_0402_16V4Z~D
AC7 G21 AH1

VCC1_5_A[30] VSS[98] VSS_NCTF[5]
G24 AH29
VCC_LAN1_05_INT_ICH_1 2 2 VSS[99] VSS_NCTF[6]
1 2 A10 G26 AJ1
+3VS C1267 VCCLAN1_05[1] VSS[100] VSS_NCTF[7]
A11 G27 AJ2
0.1U_0402_16V4Z~D VCCLAN1_05[2] VSS[101] VSS_NCTF[8]
G8 AJ28
+VCCLAN3_3 VSS[102] VSS_NCTF[9]
1 2 19/78/78mA A12 H2 AJ29
VCCLAN3_3[1] VSS[103] VSS_NCTF[10]
0.1U_0402_16V4Z
1 R1129 0_0603_5% B12 H23 B1

VCCLAN3_3[2] VSS[104] VSS_NCTF[11]
C1268 23mA H28 B29
+VCCGLANPLL VSS[105] VSS_NCTF[12]
+1.5VS 1 2 A27 H29
VCCGLANPLL VSS[106]
L100 80mA
2
GLAN POWER
10U_0805_10V4Z
1UH_20%_0805~D ICH9M REV 1.0

2.2U_0603_6.3V4Z
+1.5VS D28
VCCGLAN1_5[1]
D29
VCCGLAN1_5[2]
1 1 1 E26 VCCGLAN1_5[3]
A C1269 C1270 C1271 A
E27 VCCGLAN1_5[4]
1mA
+3VS A26
1bios.ru
2 2 2 VCCGLAN3_3
ICH9M REV 1.0
4.7U_0603_6.3V6M~D

ICH9(4/4)_POWER&GND
Custom LA-4595P 1.0
5 4 3 2 1
5 4 3 2 1
W=60mils W=60mils
+3VALW +LAN_IO
Q128 +LAN_VDD
1.5A
D
6 1 2 +LAN_DVDD12
S
1 5 4 +LAN_IO_R 2 1
0.1U_0402_10V7K~N C1463
0.1U_0402_10V7K~N C1464
0.1U_0402_10V7K~N C1465
0.1U_0402_10V7K~N C1466
0.1U_0402_10V7K~N C1467
C1455 2 L109 1 1 1 1 1 1 1 R1238 1 1 1 1 1
1U_0603_10V6K 1 0_1210_5%~D C1456 C1457 C1458 C1459 C1460 C1461 C1462 0_0603_5%
SI3456BDV-T1-E3 1N TSOP6 @
G
2
3
2 2 2 2 2 2 2 2 2 2 2 2
22U_1206_6.3V6M
22U_1206_6.3V6M
0.1U_0402_10V7K~N
0.1U_0402_10V7K~N
0.1U_0402_10V7K~N
0.1U_0402_10V7K~N
0.1U_0402_10V7K~N
+B+_BIAS
2
D D
R1239
470K_0402_5%
1
EN_WOL
These caps close to U64: Pin 30, 36,13,10,39
1
2
D
These caps close to U64: Pin 29, 37, 44, 45
2 Q58 R1240
<27> EN_WOL#
G SSM3K7002FU_SC70-3 1.5M_0402_5%
S
3
1
+LAN_IO
1 1
C1474 C1475
22U_1206_6.3V6M
0.1U_0402_10V7K~N
2 2
+LAN_IO
These caps close to U64: Pin 4
U64 +LAN_DVDD12
2 1 GLAN_RXP_C 20 33 LAN_LED3 R1241 3.6K_0402_5%

<19> GLAN_RXP HSOP LED3/EEDO LAN_LED2
C1473 0.1U_0402_16V7K~N 34 1 2
LED2/EEDI/AUX
0.1U_0402_10V7K
2 1 GLAN_RXN_C 21 35 LAN_LED1 1 These caps close to U64: Pin 44,45
<19> GLAN_RXN HSON LED1/EESK
C1476 0.1U_0402_16V7K~N 32
EECS
C1743
GLAN_TXP 15 ( Should be place within 200 mils )
<19> GLAN_TXP HSIP LAN_LED0
LED0 38
C GLAN_TXN 16 2 C
<19> GLAN_TXN HSIN LAN_MDIP0
RTL8111DL MDIP0 2 W=60mils +LAN_VDD
17 3 LAN_MDIN0
<15> CLK_PCIE_LAN REFCLK_P MDIN0 LAN_MDIP1
18 5 L107
<15> CLK_PCIE_LAN# REFCLK_M MDIP1 LAN_MDIN1
MDIN1 6 1 2
25 8 LAN_MDIP2
<15> GLAN_REQ#9 CLKREQB MDI P2
9 LAN_MDIN2 4.7UH_1008HC-472EJFS-A_5%_1008
1 1
PCI_RST# MDI N2 LAN_MDIP3 C1478 C1479
<17,23,26,28> PCI_RST# 27 11
PERSTB MDI P3
22U_1206_6.3V6M
0.1U_0402_10V7K~N
12 LAN_MDIN3 These components close to U64: Pin 48
MDI N3
2 2
1 2 46
RSET FB12
4 +LAN_DVDD12 ( Should be place within 200 mils )
R1244 2.49K_0402_1%
R1245 +LAN_SROUT12
<19,23,26,27> ICH_PCIE_WAKE# 26 48 W=60mils W=30mils L110 W=30mils
ISOLATEB LANWAKEB SROUT12 0_0603_5%
+3VS 1 2 28
ISOLATEB +LAN_EVDD12
19 2 1 +LAN_VDD
1K_0402_5% EVDD12
C1470 220P 25V K NPO 0402
C1469 220P 25V K NPO 0402

41 30 +LAN_DVDD12
CKTAL1 DVDD12
2
42 36 1 2
R1246 CKTAL2 DVDD12 C1484 1U_0402_6.3V6K~D
13
DVDD12
15K_0402_5% 10 1 2
AVDD12
2
C1485 1U_0402_6.3V6K~D
R1253 39
1
AVDD12
0_0402_5%
<19> LAN_CABDT 23
NC VDDSR
44 +LAN_IO These caps close to U64: Pin 19
24 45
1
NC VDDSR
1 1
7 29
GND VDD33
Y9 14 37
GND VDD33
27P_0402_50V8J
27P_0402_50V8J
31 0_0603_5% L108
GND +LAN_AVDD33 2 2
1 2 47 1 2 1 +LAN_IO
GND AVDD33 JLAN1
2 2 40
AVDD33
C1488
C1489
25MHZ_20P_1BX25000CK1A 22 43 +LAN_IO 1 2 R1247 220_0402_5%

EGND ENSR LAN_LED0
C1486 0.1U_0402_16V7K~N 1 2 LAN_ACTIVITY# 13
B Yellow LED- B
1 2
1 1 RTL8111DL-GR_LQFP48 C1487 0.1U_0402_16V7K~N +LAN_IO 12
Yellow LED+
1 2
C1477 0.1U_0402_10V7K~N RJ45_TX3- 8
PR4-
1 2
C1480 0.1U_0402_10V7K~N RJ45_TX3+ 7
PR4+
RJ45_RX1- 6
0_0402_5% PR2-
LAN_LOPWEN 1 2 ISOLATEB These caps close to U64: Pin 1,29,37,40 RJ45_TX2- 5
<19> LAN_LOPWEN PR3-
@ R1374
RJ45_TX2+ 4
D54 PR3+
TS1 LAN_LED2 1 2 LED2_LED3 RJ45_RX1+ 3
75_1206_8P4R_5% PR2+
C1490 1 2 0.01U_0402_16V7K +V_DAC 1 24 5 4 CH751H-40PT_SOD323-2 RJ45_TX0- 2
LAN_MDIN3 TCT1 MCT1 RJ45_TX3- PR1-
2 23 6 3 15
LAN_MDIP3 TD1+ MX1+ RJ45_TX3+ D55 RJ45_TX0+ GND
3 22 7 2 1
TD1- MX1- LAN_LED3 1 PR1+
8 1 2 14
C1491 1 +V_DAC LED2_LED3 1 R1251 2 LINK_10_1000# GND
2 0.01U_0402_16V7K 4 21 11
LAN_MDIN2 TCT2 MCT2 RJ45_TX2- RP42 CH751H-40PT_SOD323-2 220_0402_5% Green LED-
5 20
LAN_MDIP2 TD2+ MX2+ RJ45_TX2+ LED1_LED3 1 R1252 2 LINK_100_1000#
6 19 2 9
TD2- MX2- C1493 220_0402_5% Orange LED-
C1492 1 2 0.01U_0402_16V7K +V_DAC 7 18 1000P_1206_2KV7K 10
TCT3 MCT3 +LAN_IO Green-Orange LED+
LAN_MDIN1 8 17 RJ45_RX1- D56
LAN_MDIP1 TD3+ MX3+ RJ45_RX1+ 1 LAN_LED1 1 LED1_LED3
9 16 2
TD3- MX3- C-1775553
C1494 1 2 0.01U_0402_16V7K +V_DAC CH751H-40PT_SOD323-2 CONN@
220P 25V K NPO 0402
220P 25V K NPO 0402
220P 25V K NPO 0402

10 15 1 1 1
LAN_MDIN0 TCT4 MCT4 RJ45_TX0-
11 14
LAN_MDIP0 TD4+ MX4+ RJ45_TX0+ D57
12 13
TD4- MX4- LAN_LED3 1 2
2 2 2
C1471
C1472
C1481
A CH751H-40PT_SOD323-2 A
BOTH_GST5009-LF
CM1293-04SO_SOT23-6 CM1293-04SO_SOT23-6
1bios.ru
RJ45_TX0- 1 4 RJ45_RX1- RJ45_TX2- 1 4 RJ45_TX3-
CH1 CH4 CH1 CH4
2 Vn Vp 5 +3VS 2 Vn Vp 5 +3VS
Gigabit LAN_RTL8111C
RJ45_TX0+ 3 6 RJ45_RX1+ RJ45_TX2+ 3 6 RJ45_TX3+ Size Document Number Rev
CH2 CH3 CH2 CH3 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
@ D28 @ D29
LA-4595P
5 4 3 2 1
5 4 3 2 1
SATA HDD CONN
JSATA1
1
PSATA_ITX_DRX_P0 GND
2
D <18> PSATA_ITX_DRX_P0
<18> PSATA_ITX_DRX_N0
PSATA_ITX_DRX_N0 3
4
A+
A- SATA ODD CONN D
PSATA_IRX_DTX_N0 GND
<18> PSATA_IRX_DTX_N0_C 1 2 5
C393 0.01U_0402_50V7K B-
6
PSATA_IRX_DTX_P0 B+
<18> PSATA_IRX_DTX_P0_C 1 2 7
C392 0.01U_0402_50V7K GND
JODD2
8
V33 close JODD2
9 1
V33 ODD_ITX_DRX_P0 GND
10 <18> ODD_ITX_DRX_P0 2
V33 ODD_ITX_DRX_N0 RX+
11 <18> ODD_ITX_DRX_N0 3
GND RX-
12 GND 4 GND
13 1 2 ODD_IRX_DTX_N0 5
GND <18> ODD_IRX_DTX_N0_C TX-
14 <18> ODD_IRX_DTX_P0_C
C327 1 2 0.01U_0402_50V7K ODD_IRX_DTX_P0 6
V5 C326 0.01U_0402_50V7K TX+
+5VS 15 V5 7 GND
16 V5
17 GND GND 23
18 Reserved
19 GND GND 24
20 V12 8 DP
21 V12 +5VS 9 5V
22 V12 10 5V GND 14
11 MD GND 15
SUYIN_127043FR022G226ZL_NR 12 GND
13 GND
+5VS CONN@
SUYIN_127382FR013S52_NR
10U_0805_10V4Z~N 0.1U_0402_16V7K~N
1 1 1 1
C C574 C296 C377 C376 C
2 2 2 2 +5VS
0.1U_0402_16V7K~N 1000P_0402_50V7K~N
10U_0805_10V4Z 0.1U_0402_16V4Z
1 1 1 1
Close to SATA HDD C499
C498 C506 C503
2 2 2 2
1U_0603_10V4Z 1000P_0402_50V7K~N
Close to ODD Conn
B B
A A

Compal Secret Data
HDD/CDROM
Custom LA-4595P 1.0
5 4 3 2 1
A B C D E
WWAN +3VS +1.5VS
0.01U_0402_16V7K~N 0.01U_0402_16V7K~N 4.7U_0805_10V4Z~N

1
1 1 1 1 1 1
C86
C316 C294 C321 + C298 C312 C320
@
1 2 2 2 2 2 2 2 1
330U 2.5V Y D2
0.1U_0402_16V4Z~N 4.7U_0805_10V4Z~N 0.1U_0402_16V4Z~N
+1.5VS U23
+3VS 1 6
CH1 CH4
2 5
JMINI1 Vn Vp
ICH_PCIE_WAKE# 1 2 3 4
1 2 CH2 CH3 +UIM_PWR +3VS
3 3 4 4
5 6 S DIO(BR) NUP4301MR6T1 TSOP-6
WWAN_REQ#10 5 6 D9 @
<15> WWAN_REQ#10 7 7 8 8 +UIM_PWR
9 10 UIM_DATA JSIM2 3
CLK_PCIE_WWAN# 9 10 UIM_CLK
<15> CLK_PCIE_WWAN# 11 12 2 1 1
CLK_PCIE_WWAN 11 12 UIM_RST UIM_VPP GND VCC UIM_RST
<15> CLK_PCIE_WWAN 13 13 14 14 4 VPP RST 3 2
15 16 R2851 0_0402_5%
2 UIM_VPP UIM_DATA 6 5 UIM_CLK
PCI_RST# 15 16 @ R2861 0_0402_5% UIM_DET I/O CLK DAN217_SC59-3
1 2 17 17 18 18 2 EC_TX_P80_DATA <27> <27> UIM_DET 7 DET
R288 1 0_0402_5%
2 19 20 WL_OFF# 8
<27> EC_RX_P80_DATA 19 20 WL_OFF# <27> DET
R287 @ 0_0402_5% 21 22
PCIE_RXN1 21 22 +3VALW_R 1 PCI_RST# <17,21,26,28>
<19> PCIE_RXN1 23 23 24 24 2 +3VALW
PCIE_RXP1 25 26 0_0402_5% R284 9 1 1
<19> PCIE_RXP1 25 26 GND
27 28 C571 10 C573 C329 C330
27 28 GND
100P_0402_25V8K
29 29 30 30 100P_0402_25V8K
4.7U 10V Z Y5V 0805
0.1U 16V K X7R 0402

PCIE_TXN1 31 32 SUYIN_254070FB008H505ZL
<19> PCIE_TXN1 PCIE_TXP1 31 32 2 2
33 33 34 34
<19> PCIE_TXP1 USB20_N10
35 35 36 36 USB20_N10 <19>
2 1 37 38 USB20_P10
37 38 USB20_P10 <19>
R141 100K_0402_5% 39 40
39 40 LED_WWAN#
+3VS @ 41 41 42 42 T23 PAD
43 43 44 44
2 2
45 45 46 46 C571 & C573 as close as JSIM1
47 47 48 48
49 49 50 50
51 51 52 52
53 GND1 GND2 54
FOX_AS0B226-S52N-7F~N
Power status(Left)
LED1
12-21-BHC-ZL1M2RY-2C BLUE +5VALW
PWR_BLUE_LED# 2 1 1 R472 2
<27,28> PWR_BLUE_LED#
200_0603_5%
Mini-Express Card---WLAN
LED2 +5VALW
BATT_LOW_LED# 3 Y
+3V_WLAN <27> BATT_LOW_LED#
1 1 R471 2
3 +3V_WLAN BATT_CHG_LED# 2 3
<27> BATT_CHG_LED#
@ 0.01U_0402_16V7K~N 4.7U_0805_10V4Z~N B 200_0603_5%
1 2 +3VALW 12-22/Y2BHC-A30/2C_Y/B~D
R411 0_0805_5% 1 1 1
+1.5VS 1 2 C500 C489 C456
+3VS
R412 0_0805_5%
@
2 2 2
JMINI2
ICH_PCIE_WAKE# 1 2 0.1U_0402_16V4Z~N
,21,26,27> ICH_PCIE_WAKE# 1 2
CH_DATA @ R380 1 0_0402_5%
2 MINI_PIN3 3 4
<29> CH_DATA 3 4 +3V_WLAN
CH_CLK @ R381 1 0_0402_5%
2 MINI_PIN4 5 6 +3VALW
<29> CH_CLK WLAN_REQ#4 5 6 +1.5VS
<15> WLAN_REQ#4 7 8 LPC_FRAME# <18,27,28> Q130
7 8 LPC_AD3
9 10
9 10
D
11 12 LPC_AD2 0.01U_0402_16V7K~N 6
S
<15> CLK_PCIE_MCARD# 11 12
13 14 LPC_AD1 1 5 4
<15> CLK_PCIE_MCARD 13 14 LPC_AD0
15 16 1 1 C1468 2
PCI_RST# 1 15 16 C488 1U_0603_10V6K
2 17 18 LPC_AD[0..3] <18,27,28> 1
R445 0_0402_5% 17 18 WL_OFF# SI3456BDV-T1-E3 1N TSOP6
19 20
G
<15> CLK_DEBUG_PORT 19 20 WL_OFF# <27> 2
21 22 C485
3
PCIE_RXN3 PCIE_C_RXN3 23 21 22 PCI_RST# <17,21,26,28> 2 2 +B+_BIAS
<19> PCIE_RXN3 1 2 24 +3V_WLAN
PCIE_RXP3 R4031 23 24
<19> PCIE_RXP3 20_0402_5% PCIE_C_RXP3 25 25 26
26
R404 0_0402_5% 27 28 +1.5VS 0.01U_0402_16V7K~N
27 28
2
29 30
PCIE_TXN3 29 30 R1242
<19> PCIE_TXN3 31 32
PCIE_TXP3 31 32
<19> PCIE_TXP3 33 34 470K_0402_5%
33 34 USB20_N6
35 36 USB20_N6 <19>
35 36 USB20_P6
37 38 USB20_P6 <19>
1
37 38 WLANPW_DIS
+3V_WLAN 39 40
39 40
41 42 T61 PAD
41 42
2
LED_WLAN# D
43 44 LED_WLAN# <28>
43 44 WLANPW_EN# Q59 R1243
45 46 2 1 +3V_WLAN <27> WLANPW_EN# 2
4 45 46 100K_0402_5% R86 G SSM3K7002FU_SC70-3 1.5M_0402_5% 4
47 47 48 48 +1.5VS
49 50 S @
3
49 50
51 52 +3V_WLAN
1bios.ru
1
51 52
53 GND1 GND2 54 Rename
ACES_88910-5204
Mini-Card/LED
Custom LA-4595P 1.0
A B C D E
5 4 3 2 1
+3VS
+AVDD_HD +5VS
1 2
40mil +DVDD_IO 40mil +AVDD_HD 1 2
R128 0_0603_5% L6 0_0805_5%
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
1 1 1 1 1 1 1 1 1
1U_0402_6.3V
1U_0402_6.3V
1U_0402_6.3V
10U_0603_6.3V
10U_0603_6.3V
C796
C1399
C1398
C1397
C1403
C1404
C1405
C1406
C1407
+AVDD_HD
2 2 2 2 2 2 2 2 2
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
27
38
39
45
9
3
1
D D
U60
DVDD
AVDD
AVDD
PVDD
PVDD
DVDD_IO
DVDD_CORE
C23 @ 10P_0402_50V8J R41 @ 10_0402_5%
1 2 2 1
2
R514
R515
R522
R524
<18> ACZ_BITCLK ACZ_BITCLK 6 28 AMP_LEFT
HDA_BITCLK HP0_PORT_A_L AMP_RIGHT
<18> ADC_ACZ_SDIN0 29
HP0_PORT_A_R
2 R8 1 33_0402_5% 8 23 @ @ @ @
1
HDA_SDI VREFOUT_A_or_F SPR_L1
<18> ACZ_SDOUT HP_LEFT SPR_L2
5
HDA_SDO HP1_PORT_B_L
HP1_PORT_B_R
31
32 HP_RIGHT SPR_R1 HEADPHONE OUT JACK
10 +MIC1_VREFO SPR_R2
<18> ACZ_SYNC HDA_SYNC
19 MIC_LEFT
PORT_C_L MIC_RIGHT
<18> ACZ_RST# 11 20
HDA_RST# PORT_C_R
24
VREFOUT_C FOX_JA6333L-B3S0-7F
<16> MIC_CLK 1 2 2
R126 0_0603_5% DMIC_CLK/GPIO1 SPR_L1 R696 1 INTSPK_L1
40 2 5
SPKR_PORT_D_L+ SPR_L2 R697 1 0_0603_5% INTSPK_L2
R519
R518
R517
R516
<16> MIC_SIG 1 2 4 41 2
1
DMIC0/GPIO2 SPKR_PORT_D_L- HP_JD
R127 0_0603_5% @ 0_0603_5% L23 4
46 @
DMIC1/GPIO0/SPDIF_OUT_1
For IDT 43 SPR_R1 R698 1 2 INTSPK_R2 HP_RIGHT 1 2 HP_R 1 2 HPR 3
10K_0402_5%
10K_0402_5%
SPKR_PORT_D_R- L22
48 44 SPR_R2 R699 1 0_0603_5%
2 INTSPK_R1 R360 56_0402_5% BLM18BD601SN1D_0603~D 6
10K_0402_5%
10K_0402_5%
@ SPDIF_OUT_0 SPKR_PORT_D_R+ HP_LEFT HP_L 1 HPL
@ 0_0603_5% 1 2 2 2
0.01U_0402_16V7K
0.01U_0402_16V7K
EC_MUTE 1 2 47 15 @ R361 56_0402_5% 1
<27> EC_MUTE R1190 0_0402_5% EAPD PORT_E_L BLM18BD601SN1D_0603~D
16 1 1
C1421 PORT_E_R JHP1
2 35
CAP-
C99
C100
17 1 1
PORT_F_L
PACDN042Y3R_SOT23-3
2.2U_0603_6.3V6K 36 18
CAP+ PORT_F_R 2 2
+AVDD_HD @ @
1000P_0402_50V7K~N
3
2 1 14 12 1 2 MONO_IN @ @ @ @
1000P_0402_50V7K~N
R139 100K_0402_5% SENSE_B PC_BEEP R1189 0_0402_5% 2 2 D23
C260
C252
+AVDD_HD 25
MONO_OUT @
1 2 13
R915 2.49K_0402_1% SENSE_A
22
HP_JD CAP2 @ @
1 2 7
1
DVSS
C R13 20K_0402_1% 42
PVSS VREFFILT
21 For IDT C
MIC_JD 1 2 26
R892 10K_0402_1% AVSS
30 34
AVSS V-
2 1 33
C114 1000P_0402_50V7K~N AVSS
49 37
GND VREG
1 1 1 1
+MIC1_VREFO MICROPHONE IN JACK
1U_0402_6.3V
10U_0603_6.3V
92HD81B1X5NLGXA1X8 48P
2.2U_0603_6.3V6K
C66
C141
C1414
C1413
C1322 15P_0402_50V8J @ 4.7U_0603_6.3V
1 2 ACZ_SDOUT
GNDA 2 2 2 2
1
1U_0402_6.3V
C7
@
4.7K_0402_5%
4.7K_0402_5%
2
2
2
For SED TEST
W=40Mil 1 2 FOX_JA6333L-B3S0-7F
+5VS
1 1 R537 0_0603_5% 5
R3481
R3491
C648 C651 +5VS MIC_JD 4
0.1U_0402_16V4Z 10U_0805_10V4Z
2 2 MIC_RIGHT
16
15
1 2 3
6
U18 R520 1 2 10K_0402_5% C24 2.2U_0402_6.3V6 L34 BLM18BD601SN1D_0603~D 6

MIC_LEFT 1 2 2
VDD
PVDD1
PVDD2
@ R512 1 2 10K_0402_5% C25 2.2U_0402_6.3V6 L35 BLM18BD601SN1D_0603~D 1
@ C525 @ C524 JMIC1
PACDN042Y3R_SOT23-3
C642 1 2 7 2 R513 1 2 10K_0402_5%
RIN+ GAIN0
100P_0402_25V8K
100P_0402_25V8K
0.47U_0603_10V7K
3
3 @ R521 1 2 10K_0402_5%
GAIN1 D16
AMP_RIGHT C638 1 2 AMP_R 17
0.47U_0603_10V7K RIN- SPK_R1 INTSPK_R1 @
18 1 2
ROUT+ R505 0_0603_5%
1
14 SPK_R2 1 2 INTSPK_R2
C650 1 ROUT- R504 0_0603_5%
2 9
0.47U_0603_10V7K LIN+
B B
4 SPK_L1 1 2 INTSPK_L1
LOUT+ R502 0_0603_5%
AMP_LEFT C636 1 2 AMP_L 5
0.47U_0603_10V7K LIN- SPK_L2 INTSPK_L2
8 1 2
LOUT- R503 0_0603_5% EC Beep C1412 0.1U_0402_16V4Z
R1183
1 2 MONO_IN
<27> BEEP
R14 1 2
0_0805_5%
499K_0402_1%~D
12
NC R115 1 2
10 0_0805_5%
EC_MUTE 19
SHUTDOWN
BYPASS ICH Beep C1416 0.1U_0402_16V4Z
R1188
1 R116 1 2 1 2
<19> SB_SPKR
C654 @ 0_0805_5%
GND1
GND2
GND3
GND4
GND
R117 1 499K_0402_1%~D
2
2 1U_0603_10V4Z @ 0_0805_5%
P3017THF TSSOP 20P
21
20
13
11
1
R118 1 2
@ 0_0805_5%
HPR
GND GNDA
HPL
Speaker Connector
1
D D D D
GAIN0 GAIN1 GAIN PACDN042Y3R_SOT23-3 D12 @
INTSPK_R2
INTSPK_R1
INTSPK_L1
INTSPK_L2
+5VALW Q15 2 Q131 2 2 Q132
2 Q10 2 ACES_88266-04001
@
@
@
2N7002_SOT23-3 G SSM3K131TU_UFM-3 G G G 2N7002_SOT23-3 1 INTSPK_L2 4 6
INTSPK_L1 4 G2
@S S S SSM3K131TU_UFM-3S @ 3 3 5
3
3 G1
0 0 6dB 2 INTSPK_R2 2
100P_0402_25V8K
100P_0402_25V8K
100P_0402_25V8K
100P_0402_25V8K
2
C8
C9
INTSPK_R1
C15
C16
SSM3K131TU_UFM-3 1 1
3
@ S S S
Q134
S @ 1
3
2
2N7002_SOT23-3 2 SSM3K131TU_UFM-3 2N7002_SOT23-3 JSPK1

G G G G
2 2 2
R1424 Q11 Q133 Q16 0 1 10dB PACDN042Y3R_SOT23-3 D17 @
A 10K_0402_1% D D D D * A
1
1
1
1bios.ru
1 0 15.6dB
1
D
EC_MUTE 2 R1425 1 1 21.6dB
G Q135 100K_0402_5%
S SSM3K7002FU_SC70-3
3
@
Security Classification Compal Secret Data
2

For pop/click noise from S3/S4/cold boot/warm boot HD CODEC 92HD81
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
LA-4595P
5 4 3 2 1
5 4 3 2 1
FD1 FD2 FD3 FD4 FD5 FD6

FIDUCAL FIDUCAL FIDUCAL FIDUCAL FIDUCAL FIDUCAL
@ @ @ @ @ @
1
D D
H7 H8 H9 H10 H11 H12 H29 H15 H16 H20 H21 H23 H22
H_3P0 @ HOLEA
1 @ HOLEA @ HOLEA @ HOLEA @ HOLEA @ HOLEA @ HOLEA @ HOLEA @ HOLEA @ HOLEA @ HOLEA @ HOLEA @ HOLEA
1
H17 H18 H25 H27
@ HOLEA @ HOLEA @ HOLEA @ HOLEA
H_3P2
1
1
H30
@ HOLEA
H_3P1
1
H26
@ HOLEA
H_3P7
C C
1
H3 H4 H5 H6
@ HOLEA @ HOLEA @ HOLEA @ HOLEA
H_4P2
1
H1 H2
@ HOLEA @ HOLEA
H_4P5
1
B B
A A

Compal Secret Data
Screws
Custom LA-4595P 1.0
5 4 3 2 1
5 4 3 2 1
Express card
D JEXP1 D
+1.5VS_PEC
Express Card Power Switch 4.7U_0805_10V4Z~N 1
USB20_N7 GND
<19> USB20_N7 2 USB_D-
+1.5VS_PEC USB20_P7 3
+1.5VS U11 1 1 <19> USB20_P7 USB_D+
EXPR_CPUSB# 4
C90 C89 CPUSB#
2 1 12 1.5Vin 1.5Vout 11 5 RSV
C91 0.1U_0402_16V4Z~N 14 13 0.1U_0402_16V4Z~N 6
1.5Vin 1.5Vout +3VS_PEC 2 2 ICH_SMBCLK RSV
+3VS <19> ICH_SMBCLK 7 SMB_CLK
ICH_SMBDATA 8
<19> ICH_SMBDATA SMB_DATA
2 1 2 3.3Vin 3.3Vout 3 +1.5VS_PEC 9 +1.5V
C74 0.1U_0402_16V4Z~N 4 5 10
3.3Vin 3.3Vout +3V_PEC +1.5VS_PEC +1.5V
+3VALW <19,21,23,27> ICH_PCIE_W AKE# 11 WAKE#
2 1 17 AUX_IN AUX_OUT 15 +3V_PEC 12 +3.3VAUX
C85 0.1U_0402_16V4Z~N +3V_PEC PERST# 13
PCI_RST# 4.7U_0805_10V4Z~N PERST#
<17,21,23,28> PCI_RST# 6 SYSRST# OC# 19 +3VS_PEC 14 +3.3V
15 +3.3V
SYSON 20 8 PERST# <15> EXPCARD_REQ#16 EXPCARD_REQ#16 16
<27,36,43> SYSON SHDN# PERST# CLKREQ#
1 1 CPPE# 17
SUSP# CLK_PCIE_EXPR# CPPE#
<27,30,36,42,44,46> SUSP# 1 STBY# NC 16 <15> CLK_PCIE_EXPR# 18 REFCLK-
C92 C93 CLK_PCIE_EXPR 19
<15> CLK_PCIE_EXPR REFCLK+
CPPE# 10 7 0.1U_0402_16V4Z~N 20
CPPE# GND 2 2 PCIE_RXN4 GND
<19> PCIE_RXN4 21 PERn0
EXPR_CPUSB# 9 <19> PCIE_RXP4 PCIE_RXP4 22
CPUSB# PERp0
23 GND
18 PCIE_TXN4 24
RCLKEN +3VS_PEC <19> PCIE_TXN4 PETn0
PCIE_TXP4 25
<19> PCIE_TXP4 PETp0
P2231NF_QFN20 4.7U_0805_10V4Z~N 26 GND
C +1.5V_CARD Max. 650mA, Average 500mA 27 GND
C
1 1 28 GND
+3V_CARD Max. 1300mA, Average 1000mA 29 GND GND 31
C75 C73 30 32
0.1U_0402_16V4Z~N GND GND
2 2 FOX_1CX41202-KH_26P
conn@
B B
A A

Compal Secret Data
EXPRESS CARD
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4595P 1.0
5 4 3 2 1
L18
+3VALW +EC_AVCC 2 1
+EC_AVCC
1
+3VALW
2 FBM-11-160808-601-T_0603
Board ID +3VALW
C481
C482
1 1 1 1 1 1 1000P_0402_50V7K~N 0.1U_0402_16V4Z~N
+3VALW
0.1U_0402_16V4Z~N
C281
0.1U_0402_16V4Z~N
C285
0.1U_0402_16V4Z~N
C277
0.1U_0402_16V4Z~N
C493
1000P_0402_50V7K~N
C269
1000P_0402_50V7K~N
C291
1
ECAGND2 12 1
FBM-11-160808-601-T_0603 L19 R232
2
2 2 2 2 2 2 100K_0402_5%
Ra
R405
2
10K_0402_5% AD_BID
71.5K_0402_1%
1
111
125
2
PCIE_PME#_R R231
22
33
96
67
9
U29 C272
0.1U_0402_16V4Z
Rb
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
2
R281 0_0402_5%
1
<19,21,23,26> ICH_PCIE_WAKE# 2 1
GATEA20 1 21
<18> GATEA20 KB_RST# GA20/GPIO00 INVT_PWM/PWM1/GPIO0F BEEP INVT_PWM <16>
<18> KB_RST# 2
KBRST#/GPIO01 BEEP#/PWM2/GPIO10
23 BEEP <24> M/B rev:0.1; 0.2; 0.3; 1.0
SERIRQ 3 26 W_DISABLE# W_DISABLE# <28>
<19,28> SERIRQ LPC_FRAME# 4
SERIRQ# FANPWM1/GPIO12
27 ACOFF Voltage:0.0; 0.4; 0.8; 1.0
<18,23,28> LPC_FRAME# LPC_AD3 LFRAME# ACOFF/FANPWM2/GPIO13 ACOFF <40>
<18,23,28> LPC_AD3 5
CLK_PCI_EC LPC_AD2 LAD3 ECAGND
<18,23,28> LPC_AD2 7
LAD2 PWM Output C273 1 2 0.01U_0402_16V7K
VCC 3.3V+/-5% 0.6V~1.6V
LPC_AD1 8 63 BATT_TEMP
<18,23,28> LPC_AD1 LAD1 BATT_TEMP/AD0/GPIO38 BATT_TEMP <48>
1
LPC_AD0 BATT_OVP Ra 100k

LAD0 LPC & MISC
<18,23,28> LPC_AD0 10 64 BATT_OVP <48>
R272 BATT_OVP/AD1/GPIO39 ADP_I
65 ADP_I <40> Board ID Rb
CLK_PCI_EC ADP_I/AD2/GPIO3A AD_BID 26.1K +/-1%
<15> CLK_PCI_EC 12 PCICLK AD Input AD3/GPIO3B 66 C79 0
34.8K +/-1%
0.683
@ 10_0402_5% R228 PLT_RST# 13 75 MIC_DIAG 1 0.8519
<7,17,30,31> PLT_RST# PCIRST#/GPIO05 AD4/GPIO42 MIC_DIAG <16> 46.4K +/-1%
1 2 EC_RST# 37 76 POW_MON BATT_OVP 1 2 ECAGND 2 1.0459
+3VALW POW_MON <47>
2
EC_SCI# ECRST# SELIO2#/AD5/GPIO43 56.2K +/-1%

1 <19> EC_SCI# 20 SCI#/GPIO0E
3 1.1873
PCI_CLKRUN# 71.5K +/-1%
@ C282 47K_0402_5% 38 4 1.3758
<19,28> PCI_CLKRUN# CLKRUN#/GPIO1D DAC_BRIG 100P_0402_50V8J 91K +/-1%
2 DAC_BRIG/DA0/GPIO3C 68 DAC_BRIG <16> 5 1.5723
15P_0402_50V8J C268 70 EN_DFAN1
2 KSI[0..7] EN_DFAN1/DA1/GPIO3D EN_DFAN1 <4>
0.1U_0402_16V4Z DA Output 71 IREF
<28> KSI[0..7] KSI0 IREF/DA2/GPIO3E M_PWROK_EC IREF <40>
55 KSI0/GPIO30 DA3/GPIO3F 72 CHGVADJ <40>
1 KSO[0..15] KSI1 56
<28> KSO[0..15] KSI2 KSI1/GPIO31
57 KSI2/GPIO32
KSI3 58 83 EC_MUTE
KSI4 KSI3/GPIO33 PSCLK1/GPIO4A LCD_TST EC_MUTE <24>
59 KSI4/GPIO34 PSDAT1/GPIO4B 84 LCD_TST <16>
KSI5 60 85 VGA_ON
KSI6 KSI5/GPIO35 PSCLK2/GPIO4C LCD_CBL_DET# VGA_ON <45>
+5VALW 61 KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D 86 LCD_CBL_DET# <16>
KSI7 62 87 TP_CLK
KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_CLK <28>
EC_SMB_DA1 R263 2 1 4.7K_0402_5% KSO0 39 88 TP_DATA
KSO1 KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA <28>
40
EC_SMB_CK1 R262 2 1 4.7K_0402_5% KSO2
KSO3
KSO4
41
42
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23 SDICS#/GPXOA00 97 SPI_PULLDOWN 2 R274
EN_WOL#
1 4.7K_0402_5%
SPI Flash (8Mb*1)
43 98 EN_WOL# <21> @ C507
+3VS KSO5 KSO4/GPIO24 SDICLK/GPXOA01 BT_OFF# SPI_CLK_R
KSO6
44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99
VGATE
BT_OFF# <29> 1 2 0_0402_5% 1 2
R419
45 KSO6/GPIO26 Matrix SDIDI/GPXID0 109 VGATE <7,19,47>
EC_SMB_DA2 R264 2 1 4.7K_0402_5% KSO7 46 SPI Device Interface 0.1U_0402_16V4Z~N @
KSO8 KSO7/GPIO27 +3VALW
47 KSO8/GPIO28
EC_SMB_CK2 R265 2 1 4.7K_0402_5% KSO9 48 119 FRD#SPI_SO C314
KSO10 KSO9/GPIO29 SPIDI/RD# FWR#SPI_SI 20mils
49 KSO10/GPIO2A SPIDO/WR# 120 1 2
LCD_TST @ R269 2 1 4.7K_0402_5% KSO11 50 SPI Flash ROM 126 SPI_CLK 2 R437 1
KSO12 KSO11/GPIO2B SPICLK/GPIO58 FSEL#SPICS# 0.1U_0402_16V4Z~N 10K_0402_5%
51 128
LCD_CBL_DET# R276 2 KSO13 KSO12/GPIO2C SPICS#
1 4.7K_0402_5% 52 U37
KSO14 KSO13/GPIO2D FSEL#SPICS# 2
53
KSO14/GPIO2E 1 SPI_CS# 1
CS# VCC
8
MIC_DIAG R308 1 2 10K_0402_5% KSO15 54 73 WLANPW_EN# R439 15_0402_5% 2 7
KSO15/GPIO2F CIR_RX/GPIO40 WLANPW_EN# <23> SO HOLD#
81 74 MSEN# FRD#SPI_SO 1 2 SPI_SO 3 SPI_CLK_R 1
6 2 SPI_CLK
EC_FB_SDATA KSO16/GPIO48 CIR_RLC_TX/GPIO41 FSTCHG MSEN# <16> WP# SCLK
R303 2 1 4.7K_0402_5% 82 89 15_0402_5% R275 4 15_0402_5%
5 R420
<23> UIM_DET KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 BATT_CHG_LED# FSTCHG <40> GND SI SPI_SI 1
BATT_CHGI_LED#/GPIO52
90 BATT_CHG_LED# <23> 2 FWR#SPI_SI
EC_FB_SCLK R304 2 1 4.7K_0402_5% 91 CAPSLED# MX25L1605AM2C-12G_SO8 15_0402_5% R438
CAPS_LED#/GPIO53 CAPSLED# <28>
EC_SMB_CK1 77 GPIO 92 BATT_LOW_LED#
MSEN# <48> EC_SMB_CK1 EC_SMB_DA1 SCL1/GPIO44 BATT_LOW_LED#/GPIO54 SCRLED# BATT_LOW_LED# <23>
R309 1 2 10K_0402_5% 78 93
<48> EC_SMB_DA1 EC_SMB_CK2 SDA1/GPIO45 SUSP_LED#/GPIO55 SYSON SCRLED# <28>
<4,16,31> EC_SMB_CK2 79
SCL2/GPIO46 SM Bus SYSON/GPIO56
95 SYSON <26,36,43>
EC_SMB_DA2 80 121 VR_ON
<4,16,31> EC_SMB_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 VR_ON <47>
127 ACIN
AC_IN/GPIO59 ACIN <19,39,40>
SLP_S3# 6 100 EC_RSMRST#

<19> SLP_S3# SLP_S5# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_LID_OUT# EC_RSMRST# <19>
<19> SLP_S5# 14 101 EC_LID_OUT# <19>
+5VS EC_SMI# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 EC_ON
<19> EC_SMI# 15 102 EC_ON <28>
R271 LID_SW# EC_SMI#/GPIO08 EC_ON/GPXO05 EC_SWI#
<28> LID_SW# 16 103 EC_SWI# <19> C1323
4.7K_0402_5% EC_FB_SCLK LID_SW#/GPIO0A EC_SWI#/GPXO06 ICH_PWROK
<28> EC_FB_SCLK 17 104 ICH_PWROK <7,19>
TP_DATA EC_FB_SDATA SUSP#/GPIO0B ICH_PWROK/GPXO06 BKOFF# SPI_CLK
1 2 <28> EC_FB_SDATA 18
PBTN_OUT#/GPIO0C GPO BKOFF#/GPXO08
105 BKOFF# <16> 2 1
TP_CLK 1 2 PCIE_PME#_R 19 GPIO 106 WL_OFF#
VGA_THER EC_PME#/GPIO0D WL_OFF#/GPXO09 LCD_VCC_TEST_EN WL_OFF# <23>
R270
<31> VGA_THER 25
EC_THERM#/GPIO11 GPXO10
107
LCD_VCC_TEST_EN <16>
For SED TEST 22P_0402_50V8J
4.7K_0402_5% FAN_SPEED1 28 108 PSID_DISABLE#
<4> FAN_SPEED1 FAN_SPEED1/FANFB1/GPIO14 GPXO11 PSID_DISABLE# <39>
<28> TOUCHKEY_TINT TOUCHKEY_TINT 29
EC_TX_P80_DATA 30 FANFB2/GPIO15
<23> EC_TX_P80_DATA EC_RX_P80_DATA31 EC_TX/GPIO16 SLP_S4#
<23> EC_RX_P80_DATA 110 SLP_S4# <19>
ON_OFF EC_RX/GPIO17 PM_SLP_S4#/GPXID1 G7X_ENBKL
<28> ON_OFF 32 112 G7X_ENBKL <16,31>
PWR_BLUE_LED# 34 ON_OFF/GPIO18 ENBKL/GPXID2 USB_EN
<23,28> PWR_BLUE_LED# 114 USB_EN <29>
+3VALW NUMLED# PWR_LED#/GPIO19 GPXID3 EC_THERM#
<28> NUMLED# 36
NUMLED#/GPIO1A GPI GPXID4
115 EC_THERM# <19>
116 SUSP#
GPXID5 PBTN_OUT# SUSP# <26,30,36,42,44,46>
117 PBTN_OUT# <19>
GPXID6
1 R278 2 XCLKI GPXID7
118 PS_ID
XCLKO@ 20M_0603_5% XCLKI 122 PS_ID <39>
XCLKO XCLK1 +V18R
123
XCLK0 V18R
124 1 2 1U_0603_10V4Z
EC_MUTE R312 1 2 C322
2
AGND
GND
GND
GND
GND
GND
10K_0402_5% R277 C270 2 1 0.1U_0402_16V4Z

0_0402_5%
KSO1 R76 1 2 KB926QFA1_LQFP128
11
24
35
94
113
69
1
@ 47K_0402_5%
KSO2 R78 1 2 ECAGND
For ENE D2 @ 47K_0402_5% 2 2

C297
4
1
C292
22P_0402_50V8J 22P_0402_50V8J
OUT
IN
1 1
NC
NC
2
32.768KHZ_12.5P_1TJS125BJ2A251
X2

Compal Secret Data
BIOS & EC I/O Port
Custom LA-4595P 1.0
A B C D E
INT_KBD CONN. KSO8 @ C449 100P_0402_25V8K KSI7 @ C235 100P_0402_25V8K
KSI3 @ C239 100P_0402_25V8K KSI6 @ C236 100P_0402_25V8K

KSI[0..7]
<27> KSI[0..7] KSO9 KSI5
JKB1 @ C249 100P_0402_25V8K @ C237 100P_0402_25V8K
KSO[0..15] KSI0 1
<27> KSO[0..15] KSI1 1 KSI2 KSO0
+3VALW 2 @ C240 100P_0402_25V8K @ C441 100P_0402_25V8K
KSI2 2
3
Power Button KSI3 4
3
4
KSI1 @ C241 100P_0402_25V8K KSO1 @ C442 100P_0402_25V8K
100K_0402_5%
KSI4 5
KSI5 5 KSO10 @ C248 100P_0402_25V8K KSO2 @ C443 100P_0402_25V8K
6 6
R297
KSI6 7
KSI7 7 KSO11 @ C247 100P_0402_25V8K KSI4 @ C238 100P_0402_25V8K
8
KSO0 8
9
1
1 D15 KSO1 9 KSI0 @ C242 100P_0402_25V8K KSO3 @ C444 100P_0402_25V8K 1
10
KSO2 10
2 ON_OFF <27> 11
11
PWR_ON-OFF_BTN# 1 KSO3 12 KSO12 @ C246 100P_0402_25V8K KSO4 @ C445 100P_0402_25V8K
51ON# KSO4 12
3 51ON# <39> 13
KSO5 13 KSO13 @ C245 100P_0402_25V8K KSO5 @ C446 100P_0402_25V8K
14
CHN202UPT SC-70 KSO6 14
15
KSO7 15 KSO14 @ C244 100P_0402_25V8K KSO6 @ C447 100P_0402_25V8K
16
+3VALW KSO8 16
17
17
1
2 KSO9 18 KSO15 @ C243 100P_0402_25V8K KSO7 @ C448 100P_0402_25V8K
KSO10 18
19
19
2
C313 D13 KSO11 20

R296 1000P_0402_50V7K~N RLZ20A_LL34 KSO12 20
4.7K_0402_5% 1 KSO13
21
22
21 For EMI
2
@ KSO14 22
23 23
1
D KSO15 24
1
EC_ON 24
<27> EC_ON 1 2 2 25
R291 G Q26 25
26 26
0_0402_5% S SSM3K7002FU_SC70-3 27
3
@ SW3 G1
28 G2
SW_1BT002-0121L_4P
ACES_88514-2601_26P
PWR_ON-OFF_BTN# 3 1 POWER SWITCH CONN@
4 2
Function/B CONN.
5
6
10U_0603_6.3V
1
+3VALW
C80
CONN@
ACES_88512-1641_16P
+3VS_FUN
+3VS R881 @ 2
18 GND
0_0603_5% 17
2 GND 2
1 2 16 16
R623 1 2 R_SATA_LED# 15
Wireless_BTN Regulator for ENE sensor <18> SATA_LED#

0_0402_5%
PWR_ON-OFF_BTN#
14
13
15
14
L2 LED_WLAN# 13
<23> LED_WLAN# 12 12
2 1 FB_SDATA 11
+5VS SW1 <27> EC_FB_SDATA 11
Adjustable Output 2KC FBMA-11-100505-301T
1 0402 FB_SCLK 10
1BS003-1211L_3P +5VS <27> EC_FB_SCLK 10
L3 KC FBMA-11-100505-301T 0402 9
R901 RT9198-33PBR SOT-23 5P BLUETOOTH_LED# 9
<29> BLUETOOTH_LED# 8
FB_SDATA 8
3
BP 4
1 2 7
SHDN# 7
1
+3VS_FUN PWR_BLUE_LED# 6
<23,27> PWR_BLUE_LED# 6
10K_0603_1% 2 <27> TOUCHKEY_TINT TOUCHKEY_TINT 1 2 R607 5
1
1U_0402_6.3V4Z
GND C27 FB_SCLK NUMLED# 0_0402_5% 5

<27> NUMLED# 4
CAPSLED# 4
1 1 5 <27> CAPSLED# 3
VIN VOUT 3
C250
SCRLED# 2
<27> SCRLED# 2
33P_0402_50V8J
U54 @ BTOP_BTN# 1
C28 1
2 33P_0402_50V8J JFN1
@ For ENE
near JFN1
D59
W_DISABLE# 2
<27> W_DISABLE# 1
3
@ +3VALW
PJSOT24C_SOT23-3 D58 U10 +3VALW U9
@ PWR_ON-OFF_BTN# 2 APX9132ATI-TRL_SOT23-3 APX9132ATI-TRL_SOT23-3
1
BTOP_BTN# 3 LID_SW# 3 2 LID_SW# 3 2
GND
GND
3 VOUT VDD <27> LID_SW# VOUT VDD 3
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
1 C26
TPM 1.2 PESD24VS2UT_SOT23-3~D C29
1
@
2
2
@
Touch PAD/B CONN.
TP/B TO M/B CONN@
ACES_85201-0405N
+5VS
6
G2
5
G1
4
TP_CLK 4
1 <27> TP_CLK 3
TP_DATA 3
<27> TP_DATA 2
JTPM1 C300 2
1
0.01U_0402_16V7K 1
2 1 1
LPC_FRAME# 1 2 LPC_AD0 @ @ JP1
<18,23,27> LPC_FRAME# GND1 RES0 LPC_AD0 <18,23,27>
C309
PCI_RST# 3 4 LPC_AD1
<17,21,23,26> PCI_RST# IAC_SDATA_OUT RES1 LPC_AD1 <18,23,27>
100P_0402_25V8K C310
SERIRQ 5 6 LPC_AD2
<19,27> SERIRQ GND2 3.3V LPC_AD2 <18,23,27>
3
PCI_CLKRUN# LPC_AD3 2 2
<19,27> PCI_CLKRUN# 7 8 LPC_AD3 <18,23,27>
12mA IAC_SYNC GND3 CLK_PCI_TPM D24
+3VS 9 10 CLK_PCI_TPM <15>
IAC_SDATA_IN GND4
100P_0402_25V8K
+3VALW 11 12 PACDN042Y3R_SOT23-3
IAC_RESET# IAC_BITCLK
@
GND
GND
GND
GND
GND
GND
1
4 ACES_88018-124L 4
13
14
15
16
17
18
CONN@ Base I/O Address

0 = 02Eh
1bios.ru
* 1 = 04Eh

PWR_OK/BTN/TP
Custom LA-4595P 1.0
A B C D E
+USB_AS
+5VALW
0.1U_0402_16V4Z
1
U12
80 mils
2
1 8 + C434 C223
GND OUT
2 IN OUT 7
3 6 150U_B2_6.3VM_R45M R155
USB_EN# IN OUT 2 470_0603_5%
1 4 EN# OC# 5
C228
1 1
RT9711PS SO 8P
0.1U_0402_16V4Z D
2 USB_EN# Q14
2
G SSM3K7002FU_SC70-3
1
USB_OC#0 <19> S
3
R154
100K_0402_5% +USB_AS
@
W=60mils JUSBP1
2
USB20_N0 2 1 1
<19> USB20_N0 USB_N0 VCC
R1 0_0402_5% 2
USB_P0 USB_N
2 1 3
USB20_P0 R3 0_0402_5% USB_P
<19> USB20_P0 4
GND
5
+USB_CS GND
6 GND
+5VALW 7 GND
8 GND
U14 SUYIN_020133MR004S536ZL
80 mils 1 GND OUT 8 CONN@
2 IN OUT 7
3 IN OUT 6
2
1 USB_EN# 4 5
C253 EN# OC#
RT9711PS SO 8P R38
0.1U_0402_16V4Z 470_0603_5%
2
1
CM1293-04SO_SOT23-6 CM1293-04SO_SOT23-6
USB_OC#2_#8 <19> USB_P0 USB20_P9
1 CH1 CH4 4 1 CH1 CH4 4
1
D
USB_EN# 2 Q13 2 5 2 5
Vn Vp +USB_AS Vn Vp +USB_BS
S
3
+USB_BS 3 6 USB_N0 3 6 USB20_N9
+5VALW CH2 CH3 CH2 CH3
@ D19 @D27
@ D27
U13
80 mils 1
GND OUT
8
2 7 0.1U_0402_16V4Z
IN OUT +USB_BS
3 6 1
USB_EN# IN OUT
1 4 5
C64 EN# OC# + C435 C224
2
RT9711PS SO 8P
0.1U_0402_16V4Z 150U_B2_6.3VM_R45M
2 2 R36 W=60mils
470_0603_5%
CM1293-04SO_SOT23-6
1
JUSBP4
1 4 USB20_P5 USB20_N9 2 1 1
CH1 CH4 <19> USB20_N9 USB_P9- VCC
USB_OC#9 <19> R1410 0_0402_5% 2
USB_P9+ USB_N
2 1 3
USB20_P9 R1411 0_0402_5% USB_P
<19> USB20_P9 4
GND
1
D
2 5 +3VS 5
Vn Vp USB_EN# Q8 GND
2 6
G SSM3K7002FU_SC70-3 GND
7
GND
S 8
3
USB20_N5 GND
3 6
CH2 CH3 SUYIN_020133MR004S536ZL
Fingerprint D21 CONN@
JFP1
<19> USB20_N5 6 7
6 G1
<19> USB20_P5 5 8
5 G2
4
4
+3VS 3
3
2
2 +3VS
1
1
Bluetooth
R282
10K_0402_5%
ACES_88512-0641_6P
2
CONN@ JBT1
1
1 +USB_CS
<19> USB20_P4 2
2
<19> USB20_N4 3
BT_ACTIVE 3
PAD T62 4
1
4
Felica Conn <23>
BT_OFF#
CH_CLK 5
6
5 W=80mils
JUSBP3
<27> BT_OFF# 6
<23> CH_DATA 7 1
7 1
+3VS 8 2
CONN@ 8 2
<28> BLUETOOTH_LED# 9 <30> IEEE1394_TPBN0 3
+5VS ACES_88512-0641_6P 9 3
10 <30> IEEE1394_TPBP0 4
10 4
11 <30> IEEE1394_TPAN0 5
GND 5
1 12 <30> IEEE1394_TPAP0 6
USB20_N3 1 GND 6
<19> USB20_N3 2 7
USB20_P3 2 +5VALW ACES_88460-1001 7
<19> USB20_P3 3 <19> USB20_P2 8
3 8
4 <19> USB20_N2 9
TP1 LEC 4 9
5 8 CONN@ 10
5 G2 10
2
6 7 <19> USB20_P8 11
6 G1 R222 11
1 <19> USB20_N8 12
JFE1 10K_0402_5% 12
C315 13
1
10U_0805_10V4Z 2 USB_EN# GND1

14 GND2
1
D ACES_87213-1200G
USB_EN 2 Q4 CONN@
<27> USB_EN
1bios.ru
S
3

USB/BlueTooth/FP/Felcia
Custom LA-4595P 1.0
5 4 3 2 1
+1.8VS_CB +1.8VS_CB
R1375
1 2 +1.8PE_VCCA U16
0_0402_5% 1 5 R1376
+3VALW VIN VOUT
2
4.7U_0603_6.3V6K~D
2 61.9K +-1% 0402
GND
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
1 1 1 1 SUSP# 3 4
<26,27,36,42,44,46> SUSP# EN FB
C1746
C1747
C1748
C1771
1U_0402_6.3V6K~D
RT9043-GB_SOT23-5~D
1
0_0402_5%
1
2
2 2 2 2
R1023
1
@ R1421 1
C218
10K_0402_5%
1
C217
2
@ 2 22U_0805_6.3V6M~D R1409 Layout Note: Place close to
1
Q129 2
100K_0402_5%
D AO3413_SOT23 +1.8VS_CB OZ888 and Shield GND. D
O2 recommend @
C1745
2
S
+VCCA_OUT
+1.8V 3 1
1 2 OZ888XI
4.7U_0603_6.3V6K~D
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
@ R1377
G
1 1 1 1
2
15P_0402_50V8J
2
C1750
<36,46> SUSP 1 2
C1751
C1752
C1753
X3
100K_0402_5% 1 U46 24.576MHz_16P_X5H024576FG1H-H
2 2 2 2 R1379
C1749
1
C1754 1 2 R1408
0.01U_0402_16V7K 0_0402_5% 7 33 IEEE1394_TPBN0 1 2 OZ888XO_L 1 2 OZ888XO
2 @ PE_VCCA 1394_TPBN IEEE1394_TPBP0
14 PE_VCCA 1394_TPBP 34
17 0_0402_5%
@ +3VS PE_VCCA IEEE1394_TPAN0 18P_0402_50V8J
O2 recommend 1394_TPAN 36
IEEE1394_TPAP0
FOR DELL TEST
+VCCD_OUT
1 VCCA_OUT 1394_TPAP 37
POWER
4 38 IEEE1394_TPBIAS0
CORE_VCCD 1394_TPBIAS
0.1U_0402_10V6K
0.1U_0402_10V6K
4.7U_0603_6.3V6K~D
18 CORE_VCCD
+3VS_PHY 1 1 1 24 IEEE1394 42 OZ888XI
0_0603_5% CORE_VCCD 1394_XI OZ888XO
41 CORE_VCCD 1394_XO 43
C1757
C1756
C1755
1 2 64 R1378
+3VS R1381 CORE_VCCD +3VS_CR
1394_REF 39 1 2
2 2 2 5.9K_0402_1%
20 VCCD_OUT
0.1U_0402_10V6K
0.1U_0402_10V6K
4.7U_0603_6.3V6K~D
28 VCCD_OUT MMI_VCC 26
1 1 1
44 3.3VCCD 1
C1760
C1761
C1762
27 25 XD_CD#
+3VS_PHY 3.3VCCD MMI_XD_CD# MS_CD# C1772
19 3.3VCCD MMI_MS_CD# 29
2 2 2 SD_CD# 4.7U_0603_6.3V6K~D
MMI_SD_MMC_CD# 30
2
2 3.3VCCA
40 45 MSCLK_XDCE# R1420
C 3.3VCCA MS_CLK/XD_CE# SD_CLK_R C
35 3.3VCCA SD_MMC_CLK 46 2 1SD_CLK
0_0603_5% 61 MMI_WPI#
+PE_3.3VCCA MMI_WPI# MMI_XD_WPO 0_0402_5% +3VS_CR
1 2 3 PE_3.3VCCA MMI_XD_WPO 63
R1380 C1758 4.7U_0603_6.3V6K~D 62 XD_RE#
R1423 0_0402_5% MMI_XD_RE# XD_RB#
1 2 1 2 MMI_XD_RB# 23
C1759 0.1U_0402_10V6K 22 XD_CLE
MMI_XD_CLE SD_CMD
1 2 1 2 11 PLL_REF_RETURN SD_MMC_CMD 48 For EMI TEST 1 1 1
R1422 0_0402_5% 21 XD_WE#
@ @ @ @ MMI_XD_WE# MSBS_XDALE C1768 C1767 C1765
2 1 9 PE_RTERM2 MS_BS/XD_ALE 47
R1382 1.2K_0402_1% 1U 10V Z Y5V 0603 1U 10V Z Y5V 0603 1U 10V Z Y5V 0603
5.1K_0402_1% 2 R1383 1 MMC_XD_D7 2 2 2
10 PE_RTERM1 MMC_MS_XD_D7 49
50 MMC_XD_D6
MMC_MS_XD_D6 MMC_XD_D5
<19> PCIE_TXP5 12 PE_RXP MMC_MS_XD_D5 51
13 52 MMC_XD_D4
<19> PCIE_TXN5 PE_RXN MMC_MS_XD_D4
PCIe
C1763 2 1 0.1U_0402_10V6K 15 CardReader
<19> PCIE_RXP5 PE_TXP
+3VS C1764 2 1 0.1U_0402_10V6K 16 53 MS_XD_D3
<19> PCIE_RXN5 PE_TXN MS_XD_D3
R1384 54 MMC_SD_D3
SD_MMC_D3 MS_XD_D2
1 2 <15> CLK_PCIE_MEDIA 5 PE_REFCLKP MS_XD_D2 55
10K_0402_5% 6 56 MMC_SD_D2 R1418 @ C1766
<15> CLK_PCIE_MEDIA# PE_REFCLKN SD_MMC_D2
57 MS_XD_D1 SD_CLK 2 1 1 2 @
MS_XD_D1 MMC_SD_D1
<15> MEDIA_REQ#32 32 PE_CLKREQ# SD_MMC_D1 58
59 MS_XD_D0 0_0402_5% 10P_0402_50V8J~D
MS_XD_D0 MMC_SD_D0 R1419 @ C1773
<7,17,27,31> PLT_RST# 31 PE_RST# SD_MMC_D0 60
MSCLK_XDCE# 2 1 1 2 @
65 DGND AGND 8
GND 0_0402_5% 10P_0402_50V8J~D
For EMI TEST and Colse to J8IN1

OZ888GS0L1N_QFN64_8X8
B +3VS_CR +3VS_CR B
JSD1
3 XD-VCC SD-VCC 21
MS-VCC 28
MS_XD_D0 R1387 1 2 0_0402_5% XDD0_MSD0 32
MS_XD_D1 R1388 0_0402_5% XDD1_MSD1 XD-D0 SDCLK R1093 33_0402_5%~D SD_CLK
1 2 10 XD-D1 7 IN 1 CONN SD_CLK 20 1 2
IEEE1394_TPBIAS0 MS_XD_D2 R1389 1 2 0_0402_5% XDD2_MSD2 9 14 SDDAT0 R1412 1 2 0_0402_5% MMC_SD_D0
MS_XD_D3 R1390 0_0402_5% XDD3_MSD3 XD-D2 SD-DAT0 SDDAT1 R1413 0_0402_5% MMC_SD_D1
1 2 8 XD-D3 SD-DAT1 12 1 2
MMC_XD_D4 R1391 1 2 0_0402_5% XDD4_MMCD4 7 30 SDDAT2 R1414 1 2 0_0402_5% MMC_SD_D2
XD-D4 SD-DAT2
1
1 MMC_XD_D5 R1392 1 2 0_0402_5% XDD5_MMCD5 6 29 SDDAT3 R1415 1 2 0_0402_5% MMC_SD_D3

MMC_XD_D6 R1393 0_0402_5% XDD6_MMCD6 XD-D5 SD-DAT3 XDD4_MMCD4
1 2 5 XD-D6 SD-DAT4 27
R1385 R1386 C1770 MMC_XD_D7 R1394 1 2 0_0402_5% XDD7_MMCD7 4 23 XDD5_MMCD5
56.2_0402_1% 56.2_0402_1% XD-D7 SD-DAT5 XDD6_MMCD6
1U_0402_6.3V6K SD-DAT6 18
2 XD_WE# R1395 0_0402_5% XDWE XDD7_MMCD7
1 2 34 16
2
MMI_XD_WPO R1396 0_0402_5% XDWP XD-WE SD-DAT7

1 2 33 XD-WP
MSBS_XDALE R1397 1 2 0_0402_5% XDALE_MSBS 35 1 SDCD R1398 1 2 0_0402_5% SD_CD#
XD_CD# R1399 0_0402_5% XDCD XD-ALE SD-CD SDWP R1416 1 MMI_WPI#
1 2 40 XD-CD SD-WP 2 2 0_0402_5%
IEEE1394_TPAP0 XD_RB# R1402 1 2 0_0402_5% XDRB 39 25 SDCMD R1417 1 2 0_0402_5% SD_CMD
IEEE1394_TPAP0 <29> XD-R/B SD-CMD
XD_RE# R1403 1 2 0_0402_5% XDRE 38
IEEE1394_TPAN0 MSCLK_XDCE# R1404 33_0402_5%~D XDCE_MSCLK XD-RE XDCE_MSCLK
IEEE1394_TPAN0 <29> 1 2 37 XD-CE MS-SCLK 26
XD_CLE R1405 1 2 0_0402_5% XDCLE 36 13 XDALE_MSBS
IEEE1394_TPBP0 XD-CLE MS-BS MSINS R1406 1 MS_CD#
IEEE1394_TPBP0 <29> MS-INS 22 2 0_0402_5%
IEEE1394_TPBN0 11 17 XDD0_MSD0
IEEE1394_TPBN0 <29> 7in1-GND MS-DATA0
31 15 XDD1_MSD1
7in1-GND MS-DATA1 XDD2_MSD2
41 7in1-GND MS-DATA2 19
1
42 24 XDD3_MSD3
R1401 R1400 7in1-GND MS-DATA3
56.2_0402_1% 56.2_0402_1%
TAITW_R015-A10-LM
2
A A
All DATA spacing=8mil, CLK spacing=15mil
2
2
R1407
5.1K_0402_1% C1769
270P_0402_50V7K Security Classification Compal Secret Data
1
1

OZ888GS0L1N Media Card/1394
Layout Note: Place close to OZ888 Chipset. Size Document Number Rev
1bios.ru
5 4 3 2 1
5 4 3 2 1
PEG_NRX_GTX_P[0..15] @ C1077
<9> PEG_NRX_GTX_P[0..15]
U59A 0.1U_0402_10V7K~D U59C
PEG_NRX_GTX_N[0..15] 1 2 VGA_LVDSAC+ AC4 G4
<9> PEG_NRX_GTX_N[0..15] <16> VGA_LVDSAC+ IFPA_TXC IFPC_AUX
PEG_NTX_GRX_P0 AE12 Part 1 of 5 N1 <16> VGA_LVDSAC- VGA_LVDSAC- AD4 Part 3 of 5 G5
PEG_NTX_GRX_N0 PEX_RX0 GPIO0 VGA_LVDSA0+ IFPA_TXC_N IFPC_AUX_N
AF12 G1 <16> VGA_LVDSA0+ V5 P4
PEG_NTX_GRX_P[0..15] PEG_NTX_GRX_P1 PEX_RX0_N GPIO1 NV_INVTPWM VGA_LVDSA0- IFPA_TXD0 IFPC_L0
<9> PEG_NTX_GRX_P[0..15] AG12 C1 PAD T145 <16> VGA_LVDSA0- V4 N4
PEG_NTX_GRX_N1 PEX_RX1 GPIO2 VGA_LVDDEN VGA_LVDSA1+ IFPA_TXD0_N IFPC_L0_N
AG13 M2 VGA_LVDDEN <16> <16> VGA_LVDSA1+ AA5 M5
PEG_NTX_GRX_N[0..15] PEG_NTX_GRX_P2 PEX_RX1_N GPIO3 G7X_ENBKL VGA_LVDSA1- IFPA_TXD1 IFPC_L1
<9> PEG_NTX_GRX_N[0..15] AF13 M3 G7X_ENBKL <16,27> <16> VGA_LVDSA1- AA4 M4
PEG_NTX_GRX_N2 PEX_RX2 GPIO4 GPU_VID0 For Internal Thermal VGA_LVDSA2+ IFPA_TXD1_N IFPC_L1_N
AE13 K3 GPU_VID0 <45> <16> VGA_LVDSA2+ W4 L4
PEG_NTX_GRX_P3 PEX_RX2_N GPIO5 GPU_VID1 Sensor VGA_LVDSA2- IFPA_TXD2 IFPC_L2
AE15 K2 GPU_VID1 <45> <16> VGA_LVDSA2- Y4 K4
PEG_NTX_GRX_N3 PEX_RX3 GPIO6 MEM_VID R1131 2 IFPA_TXD2_N IFPC_L2_N
AF15 J2 PAD 1 +3VS AB4 H4
PEX_RX3_N GPIO7 IFPA_TXD3 IFPC_L3
DVO / GPIO
PEG_NTX_GRX_P4 VGA_THER T150 10K_0402_5%
MXM/DVI/DP
AG15 C2 VGA_THER <27> AB5 J4
PEG_NTX_GRX_N4 PEX_RX4 GPIO8 THER_ALERT# VGA_LVDSBC+ IFPA_TXD3_N IFPC_L3_N
AG16 M1 <16> VGA_LVDSBC+ AB3
PEG_NTX_GRX_P5 PEX_RX4_N GPIO9 VGA_LVDSBC- IFPB_TXC
AF16 D2 2 1 +3VS <16> VGA_LVDSBC- AB2 R5 1 2
PEX_RX5 GPIO10 IFPB_TXC_N IFPC_RSET
LVDS
D PEG_NTX_GRX_N5 AE16 D1 R1130 10K_0402_5% VGA_LVDSB0+ W1 R720 1K_0402_1%~D D
PEX_RX5_N GPIO11 <16> VGA_LVDSB0+ IFPB_TXD4
PEG_NTX_GRX_P6 AE18 J3 <16> VGA_LVDSB0- VGA_LVDSB0- V1 D3
PEG_NTX_GRX_N6 PEX_RX6 GPIO12 VGA_LVDSB1+ IFPB_TXD4_N IFPE_AUX
AF18 J1 <16> VGA_LVDSB1+ W3 D4
PEG_NTX_GRX_P7 PEX_RX6_N GPIO13 VGA_LVDSB1- IFPB_TXD5 IFPE_AUX_N
AG18 K1 <16> VGA_LVDSB1- W2 F5
PEG_NTX_GRX_N7 PEX_RX7 GPIO14 VGA_LVDSB2+ IFPB_TXD5_N IFPE_L0
AG19 F3 <16> VGA_LVDSB2+ AA2 F4
PEG_NTX_GRX_P8 PEX_RX7_N GPIO15 VGA_LVDSB2- IFPB_TXD6 IFPE_L0_N
AF19 G3 <16> VGA_LVDSB2- AA3 E4
PEG_NTX_GRX_N8 PEX_RX8 GPIO16 IFPB_TXD6_N IFPE_L1
AE19 G2 AB1 D5
PEG_NTX_GRX_P9 PEX_RX8_N GPIO17 DVI_MODE1 IFPB_TXD7 IFPE_L1_N
AE21 F1 T148PAD~D AA1 C3
PEG_NTX_GRX_N9 PEX_RX9 GPIO18 HDMI_DET1 IFPB_TXD7_N IFPE_L2
AF21 F2 T149PAD~D C4
PEG_NTX_GRX_P10 PEX_RX9_N GPIO19 IFPE_L2_N
AG21 2 1 AB6 B3
PEG_NTX_GRX_N10 PEX_RX10 VGA_HSYNC @R1134
@R1134 1K_0402_5%~D IFPAB_RSET IFPE_L3
AG22 AD2 VGA_HSYNC <16> B4
PEG_NTX_GRX_P11 PEX_RX10_N DACA_HSYNC VGA_VSYNC IFPE_L3_N
AF22 AD1 VGA_VSYNC <16> A7
PEG_NTX_GRX_N11 PEX_RX11 DACA_VSYNC VGA_CRT_R HDA_BCLK @
AE22 AE2 VGA_CRT_R <16> B7 M6 1 2
HDA
PEG_NTX_GRX_P12 PEX_RX11_N DACA_RED VGA_CRT_B HDA_SYNC IFPE_RSET R721 1K_0402_1%~D
AE24 AD3 VGA_CRT_B <16> A6
PEG_NTX_GRX_N12 PEX_RX12 DACA_BLUE VGA_CRT_G HDA_SDI ROM_SCLK_GPU
AF24 AE3 VGA_CRT_G <16> B6 C9
PEG_NTX_GRX_P13 PEX_RX12_N DACA_GREEN DACA_RSET HDA_SDO ROM_SCLK ROM_SI_GPU
AG24 AE1 1 2 1 2 C6 A10
PEG_NTX_GRX_N13 PEX_RX13 DACA_RSET DACA_VREF R1140 124_0402_1%~D 1 R54 10K_0402_1% HDA_RST_N ROM_SI ROM_SO_GPU
AF25 AF1 2 C10
PEG_NTX_GRX_P14 PEX_RX13_N DACA_VREF C1272 ROM_SO
AG25 C15 B10
PEG_NTX_GRX_N14 PEX_RX14 0.1U_0402_10V7K~D RFU0(NC) ROMCS_N
AG26 F7 D15
PEG_NTX_GRX_P15 PEX_RX14_N DACB_RED RFU1(NC) STRAP0
AF27 E6 J5 C7
PEG_NTX_GRX_N15 PEX_RX15 DACB_BLUE RFU2(NC) STRAP0 STRAP1
AE27
PEX_RX15_N DACB_GREEN
E7
F8
F6
J22
RFU3(NC) GENERAL STRAP1
B9
A9 STRAP2
DACB_RSET RFU4(NC) STRAP2
DACs
PEG_NRX_GTX_P0 C1273 1 2 0.1U_0402_16V7K PEG_NRX_C_GTX_P0 AD10 D6 L22 F10 STRAP_CAL_PU_GND0
PEG_NRX_GTX_N0 C1274 0.1U_0402_16V7K PEG_NRX_C_GTX_N0 PEX_TX0 DACB_CSYNC RFU5(NC) STRAP_CAL_PD_3V3(NC) STRAP_CAL_PU_GND1
1 2 AD11 G6 AG9 F11
PCI EXPRESS
PEG_NRX_GTX_P1 C1275 0.1U_0402_16V7K PEG_NRX_C_GTX_P1 PEX_TX0_N DACB_VREF RFU6(NC) STRAP_CAL_PD_MIOB(NC)
1 2 AD12 AE9
PEG_NRX_GTX_N1 C1276 0.1U_0402_16V7K PEG_NRX_C_GTX_N1 PEX_TX1 RFU7(NC)
1 2 AC12 U6 F9 1 2
PEG_NRX_GTX_P2 C1277 0.1U_0402_16V7K PEG_NRX_C_GTX_P2 PEX_TX1_N DACC_HSYNC SPDIF R722 1K_0402_1%~D
1 2 AB11 U4 AA6 N5
PEG_NRX_GTX_N2 C1278 0.1U_0402_16V7K PEG_NRX_C_GTX_N2 PEX_TX2 DACC_VSYNC NC0 BUFRST_N
1 2 AB12 T5 AC19
PEG_NRX_GTX_P3 C1279 0.1U_0402_16V7K PEG_NRX_C_GTX_P3 PEX_TX2_N DACC_RED NC1 D+
1 2 AD13 R4 E15 D9 D+
PEG_NRX_GTX_N3 C1280 0.1U_0402_16V7K PEG_NRX_C_GTX_N3 PEX_TX3 DACC_BLUE NC2 THERMDP
1 2 AD14 T4 T6 D8 1
PEG_NRX_GTX_P4 C1281 0.1U_0402_16V7K PEG_NRX_C_GTX_P4 PEX_TX3_N DACC_GREEN NC3 THERMDN C1283 @
1 2 AD15 V6
PEG_NRX_GTX_N4 C1282 0.1U_0402_16V7K PEG_NRX_C_GTX_N4 PEX_TX4 DACC_RSET 2200P_0402_50V7K
1 2 AC15 R6
C PEG_NRX_GTX_P5 C1284 0.1U_0402_16V7K PEG_NRX_C_GTX_P5 PEX_TX4_N DACC_VREF NB9M-GS_BGA533~D C
PEG_NRX_GTX_N5 C1285
1 2
0.1U_0402_16V7K PEG_NRX_C_GTX_N5
AB14
PEX_TX5 2 D-
Close to Sensor
1 2 AB15 D-
PEX_TX5_N
PEG_NRX_GTX_P6 C1286 1 2 0.1U_0402_16V7K PEG_NRX_C_GTX_P6 AC16
PEX_TX6 I2CA_SCL
R1 VGA_DDCCLK VGA_DDCCLK <16> <---CRT
PEG_NRX_GTX_N6 C1287 1 2 0.1U_0402_16V7K PEG_NRX_C_GTX_N6 AD16 T3 VGA_DDCDATA VGA_DDCDATA <16>
PEG_NRX_GTX_P7 C1288 0.1U_0402_16V7K PEG_NRX_C_GTX_P7 PEX_TX6_N I2CA_SDA I2CA_SCL
1 2 AD17 R2
PEG_NRX_GTX_N7 C1289 0.1U_0402_16V7K PEG_NRX_C_GTX_N7 PEX_TX7 I2CB_SCL I2CA_SDA
1 2 AD18
PEX_TX7_N I2CB_SDA
R3 Strap pin define +3VS
PEG_NRX_GTX_P8 C1290 1 2 0.1U_0402_16V7K PEG_NRX_C_GTX_P8 AC18
PEX_TX8 I2CC_SCL
A2 VGA_CLK_LCD VGA_CLK_LCD <16> <---LVDS
PEG_NRX_GTX_N8 C1291 1 2 0.1U_0402_16V7K PEG_NRX_C_GTX_N8 AB18 B1 VGA_DAT_LCD +3VS
VGA_DAT_LCD <16>
I2C
PEG_NRX_GTX_P9 C1292 0.1U_0402_16V7K PEG_NRX_C_GTX_P9 PEX_TX8_N I2CC_SDA I2CD_SCL
1 2 AB19 N2
PEG_NRX_GTX_N9 C1293 0.1U_0402_16V7K PEG_NRX_C_GTX_N9 PEX_TX9 I2CD_SCL I2CD_SDA R142
1 2 AB20 N3
4.99K_0402_1%~D
PEX_TX9_N I2CD_SDA
1
PEG_NRX_GTX_P10 C1294 1 2 0.1U_0402_16V7K PEG_NRX_C_GTX_P10 AD19 Y6 I2CE_SCL VGA_CLK_LCD 1 2
10K_0402_5%
1K_0402_5%~D
1K_0402_5%~D
1K_0402_5%~D
45.3K_0402_1%~D
1
PEG_NRX_GTX_N10 C1295 0.1U_0402_16V7K PEG_NRX_C_GTX_N10 PEX_TX10 I2CE_SCL I2CE_SDA
R1142
R1144
1 2 AD20 W6
PEG_NRX_GTX_P11 C1296 0.1U_0402_16V7K PEG_NRX_C_GTX_P11 PEX_TX10_N I2CE_SDA I2CH_SCL 2.2K_0402_5%
R1143
R1145
R1146
R1147
1 2 AD21 A3
PEG_NRX_GTX_N11 C1297 0.1U_0402_16V7K PEG_NRX_C_GTX_N11 PEX_TX11 I2CH_SCL I2CH_SDA
1 2 AC21 A4
PEG_NRX_GTX_P12 C1298 0.1U_0402_16V7K PEG_NRX_C_GTX_P12 PEX_TX11_N I2CH_SDA EC_SMB_CK2 R273
1 2 AB21 T1 EC_SMB_CK2 <4,16,27>
2
PEG_NRX_GTX_N12 C1299 0.1U_0402_16V7K PEG_NRX_C_GTX_N12 PEX_TX12 I2CS_SCL EC_SMB_DA2 VGA_DAT_LCD @ @ @
1 2 AB22 T2 EC_SMB_DA2 <4,16,27> 1 2
2
PEG_NRX_GTX_P13 C1300 0.1U_0402_16V7K PEG_NRX_C_GTX_P13 PEX_TX12_N I2CS_SDA STRAP0
1 2 AC22
PEG_NRX_GTX_N13 C1301 0.1U_0402_16V7K PEG_NRX_C_GTX_N13 PEX_TX13 2.2K_0402_5% STRAP1
1 2 AD22 AF3 PAD TP2
PEG_NRX_GTX_P14 C1302 0.1U_0402_16V7K PEG_NRX_C_GTX_P14 PEX_TX13_N JTAG_TCK STRAP2
1 2 AD23 AG4 PAD TP3
PEG_NRX_GTX_N14 C1303 0.1U_0402_16V7K PEG_NRX_C_GTX_N14 PEX_TX14 JTAG_TDI ROM_SCLK_GPU
1 2 AD24 AE4 PAD TP4
PEG_NRX_GTX_P15 C1304 0.1U_0402_16V7K PEG_NRX_C_GTX_P15 PEX_TX14_N JTAG_TDO ROM_SI_GPU
1 2 AE25
PEX_TX15 JTAG_TMS
AF4 PAD TP5 CLOSE TO GPU
TEST
PEG_NRX_GTX_N15 C1305 1 2 0.1U_0402_16V7K PEG_NRX_C_GTX_N15 AE26 AG3 PAD ROM_SO_GPU
PEX_TX15_N JTAG_TRST_N TP6
AD25 2 1
CLK_PCIE_VGA TESTMODE R1148 10K_0402_5%~D VGA_CRT_R
<15> CLK_PCIE_VGA AB10 1 2
CLK_PCIE_VGA# PEX_REFCLK R1161 150_0402_5%~D
AC10 AF10
30K_0402_5%
1K_0402_5%~D
4.99K_0402_1%~D
<15> CLK_PCIE_VGA#
1
PEX_REFCLK_N PEX_TSTCLK_OUT VGA_CRT_G
AE10 1 2 1 2
10K_0402_5%
15K_0402_5%
1K_0402_5%~D
R1150 1 PEX_TSTCLK_OUT_N
2 0_0402_5%~D AD9 R1149 200_0402_5% R1162 150_0402_5%~D
@ R1151
R1152
R1154
R1155
R1156
<7,17,27,30> PLT_RST# PEX_RST_N
PEX_TERMP VGA_CRT_B
Check reset timing
R1153
AG10 1 2
PEX_TERMP R1164 150_0402_5%~D
<34> XTALOUTBUFF XTALOUTBUFF E9 D10 1 2 STRAP_CAL_PU_GND0 1 2 @
2
XTALOUTBUFF XTALIN CLK_NV_27M <15>
R1197 0_0402_5%~D R1168 40.2K_0402_1% @ @
<34> XTALSSIN 1 2XTALSSIN_R D11 CLK E10 STRAP_CAL_PU_GND1 1 2
B R1158 1 XTALSSIN XTALOUT B
<15> CLK_NVSS_27M 2 0_0402_5%~D @ R1169 40.2K_0402_1%
R1159 0_0402_5%~D
NB9M-GS_BGA533~D
Resistor Multilevel Tied to VCC Tied to Ground
Each strap pin represents a 4 bit value
R143 2.2K_0402_5% +3VS Value
I2CA_SCL 1 2 Pullup or Pulldown configures the MSB 3 Kohms Y 1000 0000

Y5 R144 2.2K_0402_5% 6 Kohms Y 1001 0001
4 3 I2CA_SDA 1 2 Resistor Value determines the 3 LSBs 12 Kohms Y 1010 0010
GND OUT R145 2.2K_0402_5% 24 Kohms Y 1011 0011
2
1 2 I2CD_SCL 1 2 Resistor range is R*n 48 Kohms Y 1100 0100
IN GND R1198 R147 2.2K_0402_5% 96 Kohms Y 1101 0101
1 2 PEX_TERMP 27MHZ_16PF_X7T027000BG1H-V~D 0_0402_5%~D I2CD_SDA 1 2 where n is 0-9 and R is 5K ohm. 192 Kohms Y 1110 0110
R1160 2.49K_0402_1% @ @ R148 2.2K_0402_5% 284 Kohms Y 1111 0111
I2CE_SCL 1 2 2 Kohms* N 1xxx 0xxx
1
1 R149 2.2K_0402_5%
C616 1 I2CE_SDA 1 2
C617 R150 2.2K_0402_5%
18P_0402_50V8J I2CH_SCL 1 2
2 18P_0402_50V8J R151 2.2K_0402_5%
@ 2 @ I2CH_SDA 1 2
+3VS
External Thermal sensor

1
R79
200_0402_5%
C197 @ @
A 0.1U_0402_16V4Z U7 A
2
2 1 1 8 EC_SMB_CK2
VCC SCLK
D+ 2 7 EC_SMB_DA2
D-
DXP SDA
THER_ALERT#
DELL CONFIDENTIAL/PROPRIETARY
3 6
DXN ALERT#
NVidia
VGA_THER 4
OVERT# GND
5 Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
MAX6649MUA+T_UMAX8~D TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
@ BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NVG98 PCIE,GPIO,CLK,LVDS
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-4595P
5 4 3 2 1
1bios.ru
5 4 3 2 1
FBAD[0:63]
FBAD[0:63] <35> FBAA[0..11]
DQMA#[0:7] FBAA[0..11] <35>
D DQMA#[0:7] <35> D
DQSA_WP[0:7] FBBA[2..5]
DQSA_WP[0:7] <35> FBBA[2..5] <35>
DQSA_RN[0:7]
DQSA_RN[0:7] <35>
U59B
FBAD0 D21 F26 FBAA4

FBAD7 FBAD0 FBA_CMD0 FBARAS#
C22 FBAD1 FBA_CMD1 J24 FBARAS# <35>
FBAD6 B22 F25 FBAA5
FBAD4 FBAD2 Part 2 of 5 FBA_CMD2 FBA_BA1
A22 FBAD3 FBA_CMD3 M23 FBA_BA1 <35>
FBAD1 C24 N27 FBBA2
FBAD5 FBAD4 FBA_CMD4 FBBA4
B25 FBAD5 FBA_CMD5 M27
FBAD3 A25 K26 FBBA3
FBAD2 FBAD6 FBA_CMD6
A26 FBAD7 FBA_CMD7 J25
FBAD10 D22 J27 FBACS0#
FBAD12 FBAD8 FBA_CMD8 FBAA11 FBACS0# <35>
E22 FBAD9 FBA_CMD9 G23
FBAD9 E24 G26 FBACAS#
FBAD15 FBAD10 FBA_CMD10 FBAWE# FBACAS# <35>
D24 FBAD11 FBA_CMD11 J23 FBAWE# <35>
FBAD13 D26 M25 FBA_BA0
FBAD8 FBAD12 FBA_CMD12 FBBA5 FBA_BA0 <35>
D27 FBAD13 FBA_CMD13 K27
FBAD11 C27 G25 FBAA12
FBAD14 FBAD14 FBA_CMD14 FBAA12 <35>
B27 FBAD15 FBA_CMD15 L24 FBA_RST_R 1 2 FBA_RST FBA_RST <35>
1
FBAD16 D16 K23 FBAA7 R560 0_0402_5%
C FBAD20 FBAD16 FBA_CMD16 FBAA10 R571 C
E16 FBAD17 FBA_CMD17 K24
FBAD18 D17 G22 FBA_CKE 10K_0402_5%
FBAD18 FBA_CMD18 FBA_CKE <35>
FBAD22 F18 K25 FBAA0
FBAD19 FBA_CMD19
1
FBAD17 D20 H22 FBAA9
2
FBAD21 FBAD20 FBA_CMD20 FBAA6 R563
F20 FBAD21 FBA_CMD21 M26
FBAD19 E21 H24 FBAA2 10K_0402_5% R571 & R563 Pull-down for initialization
FBAD23 FBAD22 FBA_CMD22 FBAA8
F21 F27 CKE & RESET/ODT
INTERFACE
C16 J26
2
B18 G24
MEMORY
FBAD30 FBAD25 FBA_CMD25
C18 G27
FBAD31 FBAD26 FBA_CMD26 FBA_BA2_CMD27 1
D18 M24 2 FBA_BA2 FBA_BA2 <35>
FBAD27 FBAD27 FBA_CMD27 SNN_FBA_CMD28
C19
FBAD28 FBA_CMD28
K22 T152PAD~D R561 0_0402_5%
FBAD25 C21
FBAD26 FBAD29 DQMA#0
B21 D23
FBAD24 FBAD30 FBADQM0 DQMA#1
A21 C26
P22 D19
P24 B19
R23 T24
R24 T26
T23 AA23
U24 AB27
FBAD34 FBAD37 FBADQM7
V23
FBAD33 FBAD38 DQSA_RN0
V24 B24
FBAD44 FBAD39 FBADQS_RN0 DQSA_RN1
N25 D25
N26 E18
R25 A18
R26 R22
T25 R27
V26 Y24
V25 AA27
FBAD40 FBAD46 FBADQS_RN7
V27
FBAD48 FBAD47 DQSA_WP0
V22 A24
B FBAD53 FBAD48 FBADQS_WP0 DQSA_WP1 +1.8VS B
W22 C25
FBAD50 FBAD49 FBADQS_WP1 DQSA_WP2
W23 E19
W24 A19
FBAD51 FBADQS_WP3
1
1K_0402_1%~D
R1172
FBAD49 AA22 T22 DQSA_WP4
AB23 T27
AB24 AA24
AC24 AA26 @
FBAD61 FBAD55 FBADQS_WP7
W25
2
FBAD62 FBAD56 FBA_VREF 10mil
W26 A16
FBAD59 FBAD57 FB_VREF
W27
FBAD58
0.1U_0402_10V7K~D
FBAD57 AA25 F24 FBACLK0 FBACLK0 <35>
FBAD59 FBA_CLK0
1
1K_0402_1%~D
R1173
FBAD60 AB25 F23 FBACLK0# FBACLK0# <35> 1
FBAD58 FBAD60 FBA_CLK0_N FBACLK1
AB26 N24 FBACLK1 <35>
FBAD61 FBA_CLK1
C1310
FBAD56 AD26 N23 FBACLK1#
FBAD62 FBA_CLK1_N FBACLK1# <35>
FBAD63 AD27 M22 @
FBAD63 FBA_DEBUG T153PAD~D 2
2 1 +1.8VS
2
R1174 @
NB9M-GS_BGA533~D 10K_0402_5%~D
A A
1bios.ru
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NVG98 Memory Interface
LA-4595P
5 4 3 2 1
5 4 3 2 1
Place near GPU

+1.1V_GFX_PCIE
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
4.7U_0603_6.3V4Z~D
4.7U_0603_6.3V4Z~D
22U_0805_6.3V6M
22U_0805_6.3V6M
D D
PEX_IOVDD = 500mA 1 1 1 1 1 1 1
C916
C917
C1313
C1314
C1327
C1315
C1316
PEX_IOVDDQ = 1600mA
+VGA_CORE 2 2 2 2 2 2 2
Place near Balls U59D
J10 AC9
VDD_0 Part 4 of 5 PEX_IOVDD_0
J12 AD7
VDD_1 PEX_IOVDD_1
4.7U_0603_6.3V6M~D
4.7U_0603_6.3V6M~D
4.7U_0603_6.3V6M~D
J13 AD8
VDD_2 PEX_IOVDD_2
J9 AE7
VDD_3 PEX_IOVDD_3 +1.1V_GFX_PCIE
1 1 1 L9 VDD_4 PEX_IOVDD_4 AF7
M11 AG7 PEX_PLLVDD = 100mA +1.1V_GFX_PCIE
VDD_5 PEX_IOVDD_5
C1422
C1423
C1424
M17 VDD_6 PEX_IOVDDQ_0 AB13 10 mil
M9 AB16 +PEX_PLLVDD 2 1
2 2 2 VDD_7 PEX_IOVDDQ_1
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.47U_0402_6.3V6K
0.47U_0402_6.3V6K
0.47U_0402_6.3V6K
0.1U_0402_10V7K~D
0.01U_0402_16V7K~D
1U_0402_6.3V6K~D
4.7U_0603_6.3V4Z~D
N11 AB17 L101
VDD_8 PEX_IOVDDQ_2 10NH_LQG15HS10NJ02D_5%_0402~D
N12 VDD_9 PEX_IOVDDQ_3 AB7
N13 VDD_10 PEX_IOVDDQ_4 AB8 1 1 1 1 1 1 1 1 1 1
N14 VDD_11 PEX_IOVDDQ_5 AB9
C1325
C1311
C1312
C193
C194
C195
C1317
C1318
C1319
C1320
N15 VDD_12 PEX_IOVDDQ_6 AC13
N16 VDD_13 PEX_IOVDDQ_7 AC7
N17 AD6 2 2 2 2 2 2 2 2 2 2
VDD_14 PEX_IOVDDQ_8
0.47U_0402_6.3V6K
0.47U_0402_6.3V6K
0.47U_0402_6.3V6K
0.47U_0402_6.3V6K
0.47U_0402_6.3V6K
N19 VDD_15 PEX_IOVDDQ_9 AE6
N9 VDD_16 PEX_IOVDDQ_10 AF6
1 1 1 1 1 P11 VDD_17 PEX_IOVDDQ_11 AG6 Place near Balls
P12 VDD_18
C161
C162
C180
C188
C192
P13 VDD_19 PEX_PLLVDD AF9 +PEX_PLLVDD
2 2 2 2 2
P14 VDD_20 Place near Balls Place near GPU
P15 W15 +1.8VS
VDD_21 VDD_SENSE NVVDD_SENSE <45>
P16 VDD_22
P17 VDD_23 FBVDDQ_0 A13
4.7U_0603_6.3V4Z~D
R11 VDD_24 FBVDDQ_1 B13
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
C C
R12 VDD_25 FBVDDQ_2 C13
+1.1V_GFX_PCIE FB_PLLVDD = 40 mA R13 D13
L102 VDD_26 FBVDDQ_3
R14 VDD_27 FBVDDQ_4 D14 1 1 1 1 1 1 1 1
BLM18AG121SN1D_0603~D R15 E13
POWER
VDD_28 FBVDDQ_5
C1365
C1366
C1367
C1368
C1343
C1344
C1347
C1346
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.47U_0402_6.3V6K
0.47U_0402_6.3V6K
1 2 +FB_PLLVDD R16 F13
VDD_29 FBVDDQ_6
R17 VDD_30 FBVDDQ_7 F14
2 2 2 2 2 2 2 2
0.01U_0402_16V7K~D
1 1 1 1 1 1 1 1 1 R9 VDD_31 FBVDDQ_8 F15

4.7U_0603_6.3V6M~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
T11 F16
VDD_32 FBVDDQ_9
C1425
C1430
C1431
C1432
C1433
C1434
C1435
C1436
C1437
T17 F17
VDD_33 FBVDDQ_10
1 1 1 1 T9 F19
2 2 2 2 2 2 2 2 2 VDD_34 FBVDDQ_11
C1421
U19 F22
VDD_35 FBVDDQ_12
C1353
C1354
C1355
U9 H23
VDD_36 FBVDDQ_13
2 2 2 2
W10
VDD_37 FBVDDQ_14
H26 IFPAB_PLLVDD = 140 mA +1.8VS
W12 J15 L105
VDD_38 FBVDDQ_15 BLM18AG121SN1D_0603~D
W13 J16
VDD_39 FBVDDQ_16 +IFPAB_PLLVDD
W18 J18 1 2
VDD_40 FBVDDQ_17
4700P_0402_25V7K~D
W19 J19
VDD_41 FBVDDQ_18
470P_0402_50V7K~D
4.7U_0603_6.3V6M~D
4.7U_0603_6.3V6M~D
W9 L19
+3VS VDD_42 FBVDDQ_19
L23
FBVDDQ_20
A12 L26 1 1 1 1
VDD33_0 FBVDDQ_21
4.7U_0603_6.3V6M~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
B12 M19
VDD33_1 FBVDDQ_22
C1381
C1388
C1389
C1384
C12 N22
VDD33_2 FBVDDQ_23
1 1 1 1 D12 U22
VDD33_3 FBVDDQ_24 2 2 2 2
E12 Y22
VDD33_4 FBVDDQ_25
C843
C1369
C1370
C1371
F12
VDD33_5 +IFPAB_IOVDD
V3
2 2 2 2 IFPA_IOVDD
+DACA_VDD AG2 V2
+DACB_VDD DACA_VDD IFPB_IOVDD
D7 J6
+DACC_VDD DACB_VDD IFPC_IOVDD +IFPE_IOVDD
W5
DACC_VDD IFPE_IOVDD
H6 2 R1166 1 +IFPX_IOVDD= 385mA
10K_0402_5%
R19 AD5 +IFPAB_PLLVDD
+FB_PLLVDD FB_PLLAVDD IFPAB_PLLVDD
B
T19
FB_DLLAVDD IFPC_PLLVDD
P6 IFPAB_IOVDD = 100mA +1.8VS B
N6 +IFPE_PLLVDD 2 1 L106
IFPE_PLLVDD
+1.8VS 1 2 FB_CAL_PD_VDDQ B15 R1167 10K_0402_5% +IFPX_PLLVDD= 160mA BLM18AG121SN1D_0603~D
R1175 44.2_0402_1%~D FBCAL_PD_VDDQ +GPU_PLLVDD +IFPAB_IOVDD
K5 1 2
PLLVDD
470P_0402_50V7K~D
4700P_0402_25V7K~D
470P_0402_50V7K~D
4700P_0402_25V7K~D
4.7U_0603_6.3V6M~D
K6
+DACB_VDD VID_PLLVDD
DACA VDD= 120mA 1 2 SP_PLLVDD
L6
+3VS L104 R49 10K_0402_5% 1 1 1 1 1
BLM18AG121SN1D_0603~D 2 1 +DACC_VDD
C1391
C1392
C1385
C1386
C1387
1 2 +DACA_VDD R1176 10K_0402_5%~D NB9M-GS_BGA533~D
2 2 2 2 2
4.7U_0603_6.3V6M~D
4700P_0402_25V7K~D
470P_0402_50V7K~D
0.1U_0402_10V7K~D
1 1 1 1
C1377
C1378
C1379
C1372
2 2 2 2
GPU_PLLVDD = 140 mA +1.1V_GFX_PCIE
+GPU_PLLVDD 1 2
L103
4.7U_0603_6.3V6M~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
BLM18AG121SN1D_0603~D
1 1 1 1 1
C1390
C1375
C1374
C1380
C1376
2 2 2 2 2
A A
1bios.ru
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NVG98 POWER
LA-4595P
5 4 3 2 1
5 4 3 2 1
D_C L50 @
BLM18AG121SN1D_0603~D
+3VS +3VL 1 2 +3VS
0.1U_0402_10V7K~D
-1.75% (DOWN) 0
10U_0805_10V4Z~D
@ @
10K_0402_5%~D
10K_0402_5%~D
@ @ 1 1
C870
D
±0.875% (CENTER) 1 D
R708
R709
C871
2 2
D_C Internal pull up
U45
2
<31> XTALOUTBUFF 1 XIN/CLKIN XOUT 8
2 VSS VDD 7
3 D_C PD# 6
<31> XTALSSIN 4 ModOUT REFCLK 5
1
10K_0402_5%~D
10K_0402_5%~D
0_0402_5%~D
P1819GF-08SR_SO8~D
R710
R711
R712
@
2
@ @ @
U59E
AC11 GND_0
AC14 Part 5 of 5 L16
GND_1 GND_48
AC17 GND_2 GND_49 L17
C AC2 GND_3 GND_50 L2 C
AC20 GND_4 GND_51 L5
AC23 GND_5 GND_52 M12
AF11 GND_9 GND_56 M16
AF14 GND_10 GND_57 P19
AF5 GND_16 GND_63 T12
AF8 GND_17 GND_64 T13
B11 GND_18 GND_65 T14
B14 GND_19 GND_66 T15
B17 GND_20 GND_67 T16
B2 GND_21 GND_68 U11
B20 GND_22 GND_69 U12
B23 GND_23 GND_70 U13
B26 GND_24 GND_71 U14
E11 U17
GND
B B
GND_27 GND_74
E14 GND_28 GND_75 U2
E17 GND_29 GND_76 U23
E23 GND_32 GND_79 V19
E26 GND_33 GND_80 V9
E5 GND_34 GND_81 W11
E8 GND_35 GND_82 W14
H2 GND_36 GND_83 W17
H5 GND_37 GND_84 Y2
J11 GND_38 GND_85 Y23
J14 GND_39 GND_86 Y26
J17 GND_40 GND_87 Y5
K19 GND_41
K9 GND_42 RFU_GND AC6 Close to U44 pin W16
L11 GND_43
L12 W16 GND_SENSE 1 2
GND_44 GND_SENSE R707 0_0402_5%~D
L13 GND_45
L14 A15 FB_CAL_PU_GND 1 2
GND_46 FBCAL_PU_GND FB_CAL_TERM_GND R703 1
L15 GND_47 FBCAL_TERM_GND B16 2 30.9_0402_1%~D
R702 40.2_0402_1%~D
NB9M-GS_BGA533~D
A A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NVG98 GND
LA-4595P
1bios.ru
5 4 3 2 1
5 4 3 2 1
+1.8VS FBAD[0..63]
<32> FBAD[0..63]
FBADQS#[0..7]
<32> DQSA_RN[0:7]
1 R911 DQSA_WP[0:7]
G11
G11
D12
D12
B12
P12
B12
P12
T12
T12
<32> DQSA_WP[0:7]
L11
L11
G2
G2
D1
D4
D9
D1
D4
D9
1.05K_0402_1%
B1
B4
B9
P1
P4
P9
B1
B4
B9
P1
P4
P9
T1
T4
T9
T1
T4
T9
L2
L2
U51 U52 DQMA#[0..7]
<32> DQMA#[0:7]
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
2
+VREFA1 FBAA[0..11]
<32> FBAA[0..11]
1
1 FBAA0 K4 FBAA0 K4 FBBA[2..5]

R916 C949 FBAA1 A0 FBAD1 FBAA1 A0 FBAD40 <32> FBBA[2..5]
H2 B2 H2 B2
2.49K_0402_1% 0.01U_0402_16V7K FBAA2 A1 DQ0 FBAD3 FBBA2 A1 DQ0 FBAD41
K3 B3 K3 B3
FBAA3 A2 DQ1 FBAD2 FBBA3 A2 DQ1 FBAD42 FBA_BA0
M4 C2 M4 C2 <32> FBA_BA0
D 2 FBAA4 A3 DQ2 FBAD5 +1.8VS FBBA4 A3 DQ2 FBAD43 D
K9 C3 K9 C3
2
FBAA5 A4 DQ3 FBAD7 FBBA5 A4 DQ3 FBAD44 FBA_BA1

H11 E2 H11 E2 <32> FBA_BA1
FBAA6 A5 DQ4 FBAD4 FBAA6 A5 DQ4 FBAD45
K10 F3 K10 F3
A6 DQ5 A6 DQ5
1
FBAA7 L9 F2 FBAD0 FBAA7 L9 F2 FBAD46 FBA_BA2
FBAA8 A7 DQ6 FBAD6 FBAA8 A7 DQ6 FBAD47 <32> FBA_BA2
K11 G3 R910 K11 G3
FBAA9 A8/AP DQ7 FBAD16 1.05K_0402_1% FBAA9 A8/AP DQ7 FBAD35
M9 B11 M9 B11
+1.8VS FBAA10 A9 DQ8 FBAD17 FBAA10 A9 DQ8 FBAD34
K2 B10 K2 B10
FBAA11 A10 DQ9 FBAD18 FBAA11 A10 DQ9 FBAD32
L4 C11 L4 C11
2
FBA_BA0 A11 DQ10 FBAD19 +VREFB0 FBA_BA0 A11 DQ10 FBAD33
G4 C10 G4 C10
BA0 DQ11 BA0 DQ11
1
FBA_BA1 G9 E11 FBAD20 FBA_BA1 G9 E11 FBAD39

BA1 DQ12 BA1 DQ12
1
R925 F10 FBAD21 1 F10 FBAD36
1.05K_0402_1% DQMA#0 DQ13 FBAD22 R914 C948 DQMA#5 DQ13 FBAD37
E3 DM0 DQ14 F11 E3 DM0 DQ14 F11
+VREFA0 DQMA#2 E10 G10 FBAD23 2.49K_0402_1% 0.01U_0402_16V7K DQMA#4 E10 G10 FBAD38
DQMA#3 DM1 DQ15 FBAD27 DQMA#6 DM1 DQ15 FBAD51
N10 M11 N10 M11
2
+VREFB1 DQMA#1 DM2 DQ16 FBAD25 2 DQMA#7 DM2 DQ16 FBAD48

N3 L10 N3 L10
2
DM3 DQ17 FBAD24 DM3 DQ17 FBAD53
DQ18 N11 DQ18 N11
1
1 DQSA_WP0 D2 M10 FBAD26 DQSA_WP5 D2 M10 FBAD50

R926 C944 DQSA_WP2 WDQS0 DQ19 FBAD31 DQSA_WP4 WDQS0 DQ19 FBAD52
D11 WDQS1 DQ20 R11 D11 WDQS1 DQ20 R11
2.49K_0402_1% 0.01U_0402_16V7K DQSA_WP3 P11 R10 FBAD28 DQSA_WP6 P11 R10 FBAD49
DQSA_WP1 WDQS2 DQ21 FBAD30 DQSA_WP7 WDQS2 DQ21 FBAD54
P2 WDQS3 DQ22 T11 P2 WDQS3 DQ22 T11
2 FBAD29 FBAD55
T10 T10
2
+VREFA0 DQ23 FBAD10 +VREFB0 DQ23 FBAD59

H1 VREF DQ24 M2 H1 VREF DQ24 M2
+VREFA1 H12 L3 FBAD12 +VREFB1 H12 L3 FBAD57
VREF DQ25 FBAD9 VREF DQ25 FBAD61
J2 RFU1 DQ26 N2 J2 RFU1 DQ26 N2
FBAA12 J3 M3 FBAD15 FBAA12 J3 M3 FBAD62
<32> FBAA12 RFU2 DQ27 <32> FBAA12 RFU2 DQ27
R2 FBAD8 R2 FBAD60
FBARAS# DQ28 FBAD13 FBARAS# DQ28 FBAD63
<32> FBARAS# H3 RAS# DQ29 R3 H3 RAS# DQ29 R3
FBACAS# F4 T2 FBAD11 FBACAS# F4 T2 FBAD56
<32> FBACAS# FBAWE# CAS# DQ30 FBAD14 FBAWE# CAS# DQ30 FBAD58
<32> FBAWE# H9 WE# DQ31 T3 H9 WE# DQ31 T3
FBACS0# F9 FBACS0# F9
<32> FBACS0# CS# CS#
FBA_CKE H4 A1 FBA_CKE H4 A1
C <32> FBA_CKE CKE VDDQ +1.8VS CKE VDDQ +1.8VS C
FBACLK0 J11 A12 FBACLK1 J11 A12
<32> FBACLK0 FBACLK0# CK VDDQ <32> FBACLK1 FBACLK1# CK VDDQ
<32> FBACLK0# J10 CK# VDDQ C1 <32> FBACLK1# J10 CK# VDDQ C1
VDDQ C4 VDDQ C4
1 2 A4 ZQ VDDQ C9 1 2 A4 ZQ VDDQ C9
R919 243_0402_1% A9 C12 R920 243_0402_1% A9 C12
MF VDDQ MF VDDQ
VDDQ E1 VDDQ E1
DQSA_RN0 D3 E4 DQSA_RN5 D3 E4
DQSA_RN2 RDQS0 VDDQ DQSA_RN4 RDQS0 VDDQ
D10 E9 D10 E9
P10 E12 P10 E12
P3 J4 P3 J4
RDQS3 VDDQ RDQS3 VDDQ
J9 J9
VDDQ VDDQ
+1.8VS A2 N1 +1.8VS A2 N1
VDD VDDQ VDD VDDQ
A11 N4 A11 N4
VDD VDDQ VDD VDDQ
F1 N9 F1 N9
VDD VDDQ VDD VDDQ
F12 N12 F12 N12
VDD VDDQ VDD VDDQ
M1 R1 M1 R1
VDD VDDQ VDD VDDQ
M12 R4 M12 R4
VDD VDDQ VDD VDDQ
V2 R9 V2 R9
VDD VDDQ VDD VDDQ
V11 R12 V11 R12
VDD VDDQ VDD VDDQ
V1 V1
VDDQ +1.8VS VDDQ +1.8VS
V4 V12 V4 V12
FBA_RST SEN VDDQ FBA_RST SEN VDDQ
<32> FBA_RST V9 V9
FBA_BA2 RESET FBA_BA2 RESET
H10 K1 H10 K1
BA2 VDDA BA2 VDDA
K12 K12
VDDA VDDA
1 1 1 1
J1 J1
VSSA C889 C890 VSSA C891 C892
J12 J12
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSA 0.1U_0402_16V4Z 0.1U_0402_16V4Z VSSA 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2
K4J52324QE-BC14_FBGA136~D K4J52324QE-BC14_FBGA136~D
A3
A10
G1
G12
L1
L12
V3
V10
A3
A10
G1
G12
L1
L12
V3
V10
B B
@ @
+1.8VS
GDDR3 BGA MEMORY +1.8VS
GDDR3 BGA MEMORY
0.01U_0402_16V7K 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1U_0402_6.3V4Z 10U_0805_10V4Z 0.01U_0402_16V7K 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1U_0402_6.3V4Z 10U_0805_10V4Z
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
C894 C895 C896 C897 C898 C899 C900 C901 C902 C903 C904 C905 C906 C907 C908 C909 C910 C911 C912 C913 C914 C915
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
1000P_0402_50V7K 0.01U_0402_16V7K 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1U_0402_6.3V4Z 22U_0805_6.3V6M 1000P_0402_50V7K 0.01U_0402_16V7K 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1U_0402_6.3V4Z 22U_0805_6.3V6M
FBACLK0 FBACLK1
<32> FBACLK0 <32> FBACLK1
2
2
R613 R614
475_0402_1%~D 475_0402_1%~D
A A
1
1
1bios.ru
FBACLK0# FBACLK1#
<32> FBACLK0# <32> FBACLK1#

VRAM GDDR3 A
5 4 3 2 1
A B C D E
+3VALW to +3VS Transfer +5VALW to +5VS Transfer +1.8V to +1.8VS Transfer

+3VALW +3VS
+B+_BIAS +5VALW +5VS +1.8V +1.8VS 4.7A
U40 +B+_BIAS
8 1 10U_0805_10V4Z~N U39 U41
1 D S 10U_0805_10V4Z~N
7 D S 2 8 D S 1 8 D S 1
47K_0402_5%
R198 1 6 3 7 2 7 2
D S D S D S
R559
5 4 1 1 1 6 3 1 6 3
330K_0402_5% C271 D G C465 C256 C278 D S D S
5 4 1 1 5 4 1 1
SI4800DY_SO8 D G C284 C283 C727 D G C728 C697
2
1 2 10U_0805_10V4Z~N SI4800DY_SO8 SI4800DY_SO8 1
1
2 2 2 10U_0805_10V4Z~N 10U_0805_10V4Z~N 2 10U_0805_10V4Z~N 0.1U_0402_16V4Z~N
RUNON 1 2 3VS_GATE 2 2 2 2
R197 1 RUNON 1 2 1 5VS_GATE 0.1U_0402_16V4Z~N
100K_0402_5% 0.1U_0402_16V4Z~N R267 C279
C264 47K_0402_5%
1
D 0.01U_0402_25V7K~N 0.01U_0402_25V7K~N 1.8VS ON 1 1.8VS_GATE

2
SUSP 2 2 2 R608 1
G Q18 100K_0402_5%
S SSM3K7002FU_SC70-3 C696
3
1
D 0.01U_0402_25V7K~N
VGA_PWGOD# 2 2
G Q48
S SSM3K7002FU_SC70-3
3
SUSP 1 R665 2
@ 0_0402_5%
2 +3VALW 2
1
R409
100K_0402_5%
2
SYSON#
1
D
SYSON 2 Q42
<26,27,43> SYSON
S
3
2
R365
10K_0402_5%
1
+5VALW
+1.1V_GFX_PCIE +VGA_CORE +1.8VS

1
R340
2
3 3
2
100K_0402_5%
R647 R609
2
SUSP R646 470_0603_5% 470_0603_5%

<30,46> SUSP
VGA Discharge circuit 470_0603_5%
1
1
1 1
SUSP# 2 Q32
<26,27,30,42,44,46> SUSP#
1
G SSM3K7002FU_SC70-3 D D D
2
S SUSP 2 SUSP 2 VGA_PWGOD# 2

3
G G G
S Q61 S Q62 S Q65
3
R338 SSM3K7002FU_SC70-3 SSM3K7002FU_SC70-3 SSM3K7002FU_SC70-3
10K_0402_5%
1
Discharge circuit-1 +1.8V +0.9VS +1.5VS

+5VS +3VS
+1.8VS_CB
2
2
2
+5VALW +3VALW
R133 @ R351 @ R391 @ R383 R382 @
R536 @ 470_0603_5% 470_0603_5% 470_0603_5% 39_0603_5% 470_0603_5%
1
470_0603_5%
1
1
1
R668
1
R551
1
1
100K_0402_5% D D D D D
1
100K_0402_5% D SYSON# SUSP SUSP SUSP SUSP

2 2 2 2 2
2
VGA_PWGOD# SUSP 2 Q50 G G G G G

2
4 SSM3K7002FU_SC70-3 4
G S Q12 @ S Q33 @ S Q39 @ S Q38 S Q37 @
3
3
1
D SSM3K7002FU_SC70-3 SSM3K7002FU_SC70-3 SSM3K7002FU_SC70-3 SSM3K7002FU_SC70-3 SSM3K7002FU_SC70-3

S @
3
VGA_PWGOD 2 Q49
1bios.ru
<45> VGA_PWGOD
S
3

SYSON -> SUSP# -> VGA_ON->VGA_PWGOD THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC/DC Circuits
Custom LA-4595P 1.0
A B C D E
A
KAL80 POWER UP SEQUENCE
ACIN/BATT-IN
51ON#
(only BATT-IN)
← 126ms →
5VALW/3VALW
644ms
RSMRST# ←→
Suspend Clock (32KHz) SUSCLK
ICH9 internal clock 864us 244ms
ON/OFF# → ←←→
EC_ON 360ms
PWRBTN_OUT# ←→
1.59ms →
← 2.74ms
SYSON#
1.8V ←250ms
→
SLP_S5# ← → 30.6us
SLP_S4# ←→30us
SLP_S3# ←→
SUSP# ← 3.88s → 888us
+5VS ←→ 104us
+3VS
←→ ←112us
→
+1.5VS
2.02ms
+0.9VS ←
→1.46ms
VCCP ←→ 24.1ms
VR_ON ← → 1.20ms
CPU_CORE ←→ 5.26ms
This signal is
VGATE ←→
asserted high when
A both SLP_S3# and A
VRMPWRGD are high CK_PWRGD
1.03ns
CLK_MCH_BCLK →
←
ICH_PWROK ←114ms→ 1.20ms
PCI_RST# ←→
1.06ms ←→
H_PWRGOOD
H_RESET# ←2.20ms→
1bios.ru
Title
Power Sequence

CustomLA-4595P 1.0

A
5 4 3 2 1
Version Change List ( P. I. R. List ) Page 1/1

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
1 Swap SW1 12/02 EE
D
2 Update JUSBP3 pin define 12/02 EE D
3 R405 POP 12/02 EE

4 U50 unPOP & R1190 POP 12/02 EE
5 WWAN move to PORT6 12/02 BIOS
6 Add C1391 & C1392 12/02 NVidia LVDS single channel issue Short U59.V2 & U59.V3. Add C1391 C1392 for IFPB_IOVDD
7 Swap JSPK1 Pin 12/02 EE
8 R101 12/04 EE Change to 0805
9 TPM Con 12/04 EE Modify to Con
10 R76 & R78 UnPOP 12/09 EE EC update to Rev:C1
11 Q7 & Q9 12/09 EE Update Q7 & 9 footprint
12 R658 & R281 12/11 EE R685 UnPOP & R281 UnPOP for wake on LAN
13 U89 & WLANPW_DIS# 12/11 EE Add U89 for wake on LAN. Add WLANPW_DIS# of EC
14 C1484 & C1485 12/11 EE C1484 & C1485 modify to 1U form LAN vendor
15 Update PW schematic 12/12 PW
16 C260 & C252 12/15 EE IDT ask UnPop
17 Add D29 D28 12/15 ESD ESD for LAN
C
18 U9 Pop & U10 UnPop 12/15 ME C
19 Wake On WLAN 12/16 EE Modify WLANPW_DIS# circuit

20 Add T49 & T53 12/16 Layout
21 C696 12/16 EE Update PN
22 WLANPW_DIS# 12/17 EE Move WLANPW_DIS# to EC-GPIO40 and Del BTOP_ON
23 L42 & L43 12/17 EMI L42 & L43 update to Bead from 0 ohm
24 C3 C4 C6 C14 C17 12/17 EMI POP 100 P
25 R69 12/17 EE Update to Bead drom 100 ohm
26 Cap 12/17 EMI Add C1469 C1470 C1471 C1472 C1481 R81
27 D21 D12 D17 12/17 ESD ESD ask POP
28 Update PW schematic 12/17 PW
29 Update Q128 Q130 PN 12/18 EE
30 Update Board ID 12/18 EE R231
31 Add U16 for OZ888 12/18 EE
32 C1323 POP 12/18 EE For Kepart
33 R1421 UnPOP 12/22 EE
B
34 C292 C297 12/22 EE Modify to 22P form 18P (Crystal Vendor) B
35 C1745 C1749 12/22 EE Modify to 18P form 10P(C1749) and 15P from 10P(C1745)(Crystal Vendor)
36 C1211 12/22 EE Modify to 12P form 15P (Crystal Vendor)
37 R1423 & R1422 01/07 EE Add for O2
38 L6 & R1190 01/10 EE Change to 0805
39 Modify LDO to +5VS 01/12 EE
40 Add C80 & D59 & D60 01/12 EE
41 Add components of JHP1 01/13 EE For vendor
42 R360 & R361 01/19 EE Update R360 & R361 to 56 ohm
43 U37 01/19 EE Update U37 to SA00001KN10
44 R231 01/19 EE Update Board ID
A A

Compal Secret Data
EEW PIR-1
Custom LA-4595P 1.0
5 4 3 2 1
5 4 3 2 1
PL16
PJPDC1 FBM-L11-160808-601LMT 0603~D
TYCO_1566065-2~D 2 1 DOCK_PSID ADPIN VIN
Low_PWR 1
9 PL17
GND_4 SMB3025500YA_2P
DC+_1 2
8 GND_3
DC+_2 3 1 2
7 4 PR189
GND_2 DC-_1 @ 1M_0402_1%~D
D D
6 5 1 2
GND_1 DC-_2
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
0.1U_0603_25V7K~D
MH1 VIN
MH2 VS VIN
100P_0402_50V8J~D
100P_0402_50V8J~D
100P_0402_50V8J~D
0.01U_0402_25V7K~D
1
1
PC157
PC159
0.01U_0402_25V7K~D
PC313
PC311
PC312
PC314
PC158
PC160
@
1
PR191 @ PR192
@PR192
1
PC161
@ PR190 @ 10K_0402_5%~D 1K_0402_5%~D
82.5K_0402_1%~D 1 2
@ ACIN <19,27,40>
2
PR193 @
2
8
@ 22K_0402_1%~D
N41 1 2 N40 3 PU12A
P
+
O 1
19.6K_0402_1%~D
.1U_0402_16V7K~D
@ @ N35 2 -
G
1
1
@
1
PC162
PR194
@ LM393DR_SO8 @ PR195
4
PC163 PD1 10K_0402_5%~D
1000P_0402_50V7K~D RLZ4.3B_LL34
2
2
2
@ PR198
VIN 10K_0402_5%~D
2 1
RTCVREF
2
3.3V
8
PD3 @
5 PU12B
P
PJP1 +
PD4 @ JUMP_43X118 RLS4148_LL34-2 O 7
6
1 1
-
G
BATT+ 2 1 1 1 2 2 LM393DR_SO8
Vin Detector
4
1
C CH751H-40PT_SOD323-2 C
PR203 PR204
68_1206_5% 68_1206_5%
Max. typ. Min.
2
PQ50
L-->H 18.234 17.841 17.449
2
0.22U_1206_25V7K~D
CHGRTCP 3 TP0610K-T1-E3_SOT23-3
1 VS
H-->L 17.597 17.210 16.813
32.8
1
PR205
PC164
100K_0402_5%~D PC165
0.1U_0603_25V7K~D
2
PR206
2
22K_0402_1%~D
<28> 51ON# 1 2
1
RTCVREF PR207
200_0805_5%
3.3V APL5156-33DI-TRL_SOT89-3
PU14 +5VALWP +3VALWP
2
3 2
VOUT VIN
1
DA204U_SOT323
B B
4.7U_0805_6.3V6K~D
1
GND
PC166
PC167
1U_0805_25V4Z~D
2
2
1
PD5
2.2K_0402_5%~D
@ PR208
2
1 2
2
0_0402_5%~D
PR209
PR212
1
PQ53 33_0402_5%~D
1
DOCK_PSID 1 3 1 2
S
PS_ID <27>
FDV301N_NL_SOT23-3~D
G
2
15K_0402_1%~D 100K_0402_1%~D
+5VALWP
2
+5VALWP
DA204U_SOT323
PR213
PJP2 PJP4
@ JUMP_43X118 @ JUMP_43X118
10K_0402_1%~D
1 1
2 2
1 1
+1.1V_GFX_PCIEP +1.1V_GFX_PCIE 2 2 +1.5VS
2
PD6
+1.5VSP
1
2
PR214
C
PJP3 PJP6 2 PQ54
@ JUMP_43X118 @ JUMP_43X118 B MMST3904-7-F_SOT323-3 @
2
1 1 E
2 2
1 1
+5VALWP +0.9VSP 2 2 +0.9VS
2
+5VALW
PR215
1
@
1
PJP5 PJP8 PD7 PR216

@ JUMP_43X118 @ JUMP_43X118 SM24_SOT23 1 2 PSID_DISABLE# <27>
1
1 1
2 2
1 1
+VCCPP 2 2 +VCCP @ 10K_0402_1%~D
PJP7 PJP10
A @ JUMP_43X118 @ JUMP_43X118 A
+3VALWP 1 1 2 2 1 1 2 2
+3VALW
1bios.ru
PJP9
@ JUMP_43X118 PJP12
1 1 @ JUMP_43X118
+1.8VP 2 2 +1.8V
1 1 2 2
+VGA_COREP +VGA_CORE Security Classification Compal Secret Data
PJP11 Issued Date 2006/10/1 2007/5/01 Title
@ JUMP_43X118 PJP14
Deciphered Date
1 1 @ JUMP_43X118
DCIN / Vin Detector
2 2 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1 1 2 2 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom LA-4595P 1.0
5 4 3 2 1
A B C D E
PQ55 PQ56 +B+

VIN FDS4435BZ_SO8 FDS4435BZ_SO8
PR217
8 1 1 8 0.015_2512_1%
D S S D
0.01U_0402_25V7K~D
7 2 2 7 PJP15
D S S D CHG_B+
6 D S 3 3 S D 6 1 4 2 2 1 1
1
5 D G 4 4 G D 5
2
PC171
PC315
PC172
PC316
PC173
3.3_1210_5%~D 3.3_1210_5%~D
2 3 @ JUMP_43X118 PC168 PR218
1
100K_0402_1%~D
2
PR339
0.01U_0402_25V7K~D
1
2
100K_0402_1%~D
CHGEN#
2
1
1000P_0402_50V7K~D
1000P_0402_50V7K~D
4.7U_1206_25V6K~D
4.7U_1206_25V6K~D
4.7U_1206_25V6K~D
PC170 PC175 PC177
1
2
5
6
7
8
1
PC174
PR219
0.01U_0603_50V7K~D .1U_0402_16V7K~D PU15 0.1U_0805_25V7K
1 2
1
1
1 2 1 28 1 2 /BATDRV 1
CHGEN PVCC PQ57
2
1
4
3
2
1
PR272
PR220 FDS8884_SO8
2
PC178 PC176 2.2_0603_5%~D PQ58
G
S
S
S
0.1U_0603_25V7K~D 0.1U_0603_25V7K~D 27 1 2 4 FDS4435BZ_SO8
2
BTST
2
2
PR221
D
D
D
D
340K_0402_1%~D 2 26 DH_CHG
ACN HIDRV
3
5
6
7
8
3
2
1
ACP PR222
1
2
4 25 LX_CHG PL18 0.02_2512_1%

PC169 ACDET ACDRV PH PD8 10UH_SIL1045RA-100PF_4.5A_30% BATT+
5 ACDET
2.2U_0805_25V6K 2 1 1 2 1 2 1 4
1
4.7_1206_5%~D
REGN
RLS4148_LL34-2 PC179 2 3
10U_1206_25V6M~D
10U_1206_25V6M~D
PR224 0.1U_0603_25V7K~D
10U_1206_25V6M~D
5
6
7
8
PR394
PR223 56.2K_0402_1% ACSET @
PC180
1
1
PC181
PC223
54.9K_0402_1% 1 2 6
+3VALW ACSET
24 PQ59
REGN
1
FDS6690AS_NL_SO8
1
2
1
1
PR225 PC183
PC182 100K_0402_1%~D 4
1 2
680P_0603_50V7K~D
0.01U_0402_25V7K~D 1U_0603_10V6K~D
2
2
PC361
90W adapter 1 2 7 ACOP @
PR226 PC184 23 DL_CHG @
3
2
1
2
340K_0402_1%~D 0.47U_0603_16V7K~N LODRV
Icharge=(Vsrset/Vvdac)*(0.1/PR34)=3.34A CP setting
1
Iadapter=(Vacset/Vvdac)*(0.1/PR217)=4.27A PGND 22
OVPSET 8 PC185
OVPSET .1U_0402_16V7K~D
Input OVP : 22.3V
1 2
2 2
Input UVP : 16.98V 9 AGND LEARN 21 ACOFF <27>
2
1
Fsw : 300KHz PR227
54.9K_0402_1% VREF PC186 PC187
20 CELLS 0.1U_0603_25V7K~D 0.1U_0603_25V7K~D
2
CELLS
1
10 VREF
1
PQ60 3
1
SI2301BDS-T1-E3_SOT23-3 PC188
1U_0603_10V6K~D PR370
VREF PR228 @ 0_0402_5%~D 19
2
100K_0402_1%~D SRP
CELLS GND 3 Cell
2
1 2 GATE 2 11
VDAC SRN
18
2
VREF 4 Cell
PR229 1 2 17
+3VALW BAT
1
47K_0402_1%~D PR371
1
PC189 0_0402_5%~D VADJ 12
0.1U_0603_25V7K~D VADJ PC190
1
ACSET 0.1U_0603_25V7K~D
2
CELLS 29
ACGOOD# TP RTCVREF
13 ACGOOD ICHG setting
1
D VREF
2 3cell/4cell# <48> PR231
G REGN 16 2 1 IREF <27>
SRSET
2
S PQ61 /BATDRV 14 49.9K_0402_1%~D
3
BATDRV
1
SSM3K7002F_SC59-3 PR232
1
PR234 PR230 100K_0402_1%~D
1
Cells selector 15 1 2 100K_0402_1%~D PC191

PR51 IADAPT @0.01U_0402_25V7K~D 100K_0402_1%~D
1
@ 0_0402_5%~D BQ24751ARHDR_QFN28_5X5 PR233
2
PR53 CHGVADJ Pre Cell 10_0603_5%~D ACIN <19,27,39>
210K_0402_1%~D
2
1
3 VADJ D 3
<27> CHGVADJ 1 2
3.282V 4.35V <27> ADP_I ACGOOD# 2 PQ62
1
G SSM3K7002F_SC59-3
1
PR54 S
3
499K_0402_1%~D 0V 4V PC192 IREF Current
100P_0402_50V8J~D
2
2
CHGVADJ=9.3755*(charger voltage per cell - 4) 2.968V 3A

+COINCELL
要要要EC DA pin
PR235 PR53 = 210K
PQ63
+B+ 1 2 3 TP0610K-T1-E3_SOT23-3
1 +B+_BIAS CHGVADJ
1
470K_0402_5%~D
100_0805_5%~D 32.8 VREF

0.1U_0805_25V7M~D
VREF PR1
2
+5VALW 1K_0402_5%~D
COIN RTC Battery
1SS355_SOD323-2 PR236
PC193 VREF
1
2
GATE RTCVREF
1
PR395 PJP24 PR237

2
200K_0402_1%~D
Z4012
100K_0402_1%~D
1
1
1
220K_0402_5%
PD9
2
D
2
1
PR238
PR396 2 PQ89
2
100K_0402_1%~D G SSM3K7002F_SC59-3 CHGEN#

S +COINCELL 1 2
2
+ -
1
1
D +RTCVCC D
32.8
1
PQ64 D ACOFF 1 2 2 PQ90 <27> FSTCHG 2 PQ65

2 G SSM3K7002F_SC59-3 G SSM3K7002F_SC59-3
1
0.1U_0603_25V7K~D
G RHU002N06_SOT323 PC362 S PD2 S

3
3
220K_0402_5%
S .1U_0402_16V7K~D BAT54CW_SOT323~D
3
2
PR397
SUYIN_060003FA002G201NL~D
1
PC194
PR239
340K_0402_1%~D 1
4 PC1 @ 4
27.4
2
1U_0603_10V4Z~D
2
1bios.ru
1

Charger/RTC BATTERY
B KML50 1.0
A B C D E
5 4 3 2 1
TPS51427_B+
TPS51427_B+
+B+
PJP20 PR240
@ JUMP_43X118 0_0805_5%~D
1 1 2 2 1 2
2200P_0402_50V7K~D
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
4.7U_1206_25V6K~D
4.7U_1206_25V6K~D
0.1U_0603_25V7K~D
VL
4.7U_1206_25V6K~D
4.7U_1206_25V6K~D
1
5
6
7
8
PC215
PC195
PC196
PC197
8
7
6
5
1
PC200
PC216
D D
PQ67
PC198
PC199
2
2
PQ66 AO4466_SO8
1U_0603_10V6K~D
2
2
AO4466_SO8 PC201
4.7U_0805_6.3V6K~D
2
0.1U_0603_25V7K~D 4
1
PC202
4
PC203
1
+5VALWP
3
2
1
1
2
3
PL21
7
3
6
PL20 PU16 PC207 2 1
1 2 1U_0603_10V6K~D 3.3UH_1164AY-3R3N-P3_7.5A_30%
LDO
VIN
V5FILT
+3VALWP 3.3UH_1164AY-3R3N-P3_7.5A_30% 33 19 1 2
TP V5DRV
8
7
6
5
5
6
7
8
1
4.7_1206_5%~D
1
DH3 DH5
PR242
26 15
4.7_1206_5%~D
PQ68 PR243 DRVH2 DRVH1 PR245 PQ69
PR241
AO4712_SO8 1 BST3A BST5A 2 AO4712_SO8
0_0402_5%~D
2 24 VBST2 VBST1 17 1
2
1 2.2_0603_5%~D
2
2
2
2.2_0603_5%~D PC208
PR244
4 4
61.9K_0402_1%~D
2
PC204 + PC205
2
0.1U_0603_25V7K~D 0.1U_0603_25V7K~D
1
1
330U_D3L_6.3VM_R25M LX3 LX5
PC209
PR246
25 16 1
680P_0603_50V8J~D
1
2 LL2 LL1
PC206
680P_0603_50V8J~D
1
2
3
3
2
1
2
+ PC210
2
DL3 23 18 DL5 330U_D3L_6.3VM_R25M
1
DRVL2 DRVL1
10K_0402_1%~D
2
2
PGND 22
2
FB3
PR247
C 30 C
VOUT2
PR248
10K_0402_1%~D
VOUT1 10
VL 32
1
REFIN2
1
@ 11 FB5
2VREF_TPS51427 FB1
1 2 1 VREF2
PC211 0.22U_0603_10V7K~D
VSW 9
8 LDOREFIN @ PR249 0_0402_5%~D
Rds(on) = 18m ohm(max) ; Rds(on) = 15m ohm(typical) SKIPSEL 29 2 1 VL
PR250 0_0402_5%~D
1 2
3.3VALWP PD10 PR251
20 NC PGOOD2 28
Imax=6A VS RLZ5.1B_LL34 100K_0402_1%~D

POK <19>
1 2 1 2 4 EN_LDO PGOOD1 13 PR253
2
309K_0402_1%
200K_0402_5%~D
Iocp=8.94A
2
PC212 TRIP1
PR252
14 EN1 TRIP1 12 2 1
0.22U_0603_25V7K~D
PR255
TONSE
VREF3
1
27 31 TRIP2 2 1
GND
1
EN2 TRIP2
2
B 309K_0402_1% B
2
@ PR254 SN0806081RHBR_QFN32_5X5
0_0402_5%~D
21
VL 0_0402_5%~D
806K_0603_1%~D
PR256
Rds(on) = 18m ohm(max) ; Rds(on) = 15m ohm(typical)
2
1
PR257
2VREF_TPS51427 1
PR260
1
@ 47K_0402_5%~D PR258
PR259 PC308 @
5VALWP
1
2 1 1 2 Imax=6A
2
2VREF_TPS51427 2
<48> MAINPW ON 1U_0603_10V6K~D
0_0402_5%~D
0_0402_5%~D
0.047U_0402_16V7K~D
Iocp=8.81A
1
PC213
2
0.047U_0603_16V7K~D
PC214
2
PQ74
TP0610K-T1-E3_SOT23-3
@
1 3
PD16
1 2
A
1SS355TE-17_SOD323-2 A

Compal Secret Data
+3VALWP, +5VALWP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4595P 1.0
5 4 3 2 1
5 4 3 2 1
D D
PJP25
VCCPP_B++ 2 1 +B+
JUMP_43X118
@
10U_1206_25V6M~D
10U_1206_25V6M~D
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
1
PC218
PC217
PC317
PC318
2
2
C C
PR340
FDS6676AS
267K_0402_1%~D Rds(on)=5.9mohm~7.25mohm
1 2
VCCPP
5
6
7
8
PR341
0_0402_5%~D PR342 PC319 Imax=9A
2 1 EN_VCCP BST_VCCP1 2 1 2
<26,27,30,36,44,46> SUSP#
1
PC320 2.2_0603_5%~D 0.1U_0603_25V7K~D PQ79

PR343 .1U_0402_16V7K~D 4 FDS8884_SO8
Iocp=14.04A
30.1K_0402_1%~D @
Fsw=298KHz
2
+5VALW
14
15
2
PU23
3
2
1
PL29
VBST
EN_PSV
TP
1UH_FDUE1040D-1R0M-P3_21.3A_20%
TON_VCCP 2 13 UG_VCCP 1 2
TON DRVH +VCCPP
2
PR344 3 12 LX_VCCP 1
300_0603_5%~D VOUT LL PR347 PR345 PR346 PC321 PC322
4.7U_0805_6.3V6K~D
5
6
7
8
1
1 2 V5FILT_VCCP 4 11 TRIP_VCCP
1 2 0_0603_5%~D @ 4.7_1206_5%~D +
+5VALW V5FILT TRIP 10.2K_0402_1%~D
220U_D2_4VM
D
D
D
D
FB_VCCP 5 10 V5DRV_VCCP PQ80
2 1
2
VFB V5DRV
1
B FDS6676AS_SO8 2 B
PC324 6 9 LG_VCCP PC323
PGOOD DRVL
G
PGND
S
S
S
1U_0603_10V6K~D @ 680P_0603_50V8J~D
GND
2
4
3
2
1
1
1
TPS51117RGYR_QFN14_3.5x3.5 PC325
7
PC326 4.7U_0805_10V6K~D
2
47P_0402_50V8J~D
2 1
2 1
PR348
8.66K_0402_1%~D
1
PR349
21.5K_0402_1%~D
2
A A

Compal Secret Data
+VCCPP
5 4 3 2 1
5 4 3 2 1
D D
PJP26
+1.8VP_B++ 2 1 +B+
JUMP_43X118
@
10U_1206_25V6M~D
10U_1206_25V6M~D
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
1
PC220
PC219
PC327
PC328
2
2
C C
PR350
FDS6670AS
267K_0402_1%~D Rds(on)=9mohm~11.5mohm
1 2
1.8VP
5
6
7
8
PR351
<26,27,36> SYSON
0_0402_5%~D PR352 PC329 Imax=9A
2 1 EN_1.8 BST_1.8 1 2 1 2
1
PC330 2.2_0603_5%~D 0.1U_0603_25V7K~D PQ81

PR353 .1U_0402_16V7K~D 4 FDS8884_SO8
Iocp=10.95A
30.1K_0402_1%~D @
Fsw=297KHz
2
+5VALW
14
15
2
PU24
3
2
1
PL30
EN_PSV
VBST
TP
1.8UH_SIL104R-1R8PF_9.5A_30%
TON_1.8 2 13 UG_1.8 1 2
TON DRVH +1.8VP
2
PR354 3 12 LX_1.8 1
VOUT LL
5
6
7
8
300_0603_5%~D PR357 PR355 PR356 PC331 PC332
4.7U_0805_6.3V6K~D
1
1 2 V5FILT_1.8 4 11 TRIP_1.81 2 0_0603_5%~D @ 4.7_1206_5%~D +
D
D
D
D
+5VALW V5FILT TRIP 12.1K_0402_1%~D PQ82
220U_D2_4VM
B FB_1.8 V5DRV_1.8 FDS6670AS_NL_SO8 B
5 10
2 1
2
VFB V5DRV
1
2
PC333 6 9 LG_1.8 4 PC334
PGOOD DRVL G
PGND
1U_0603_10V6K~D @ 680P_0603_50V8J~D
GND
2
1
1
S
S
S
7
3
2
1
PC336 4.7U_0805_10V6K~D
2
47P_0402_50V8J~D
2 1
2 1
PR358
30.1K_0402_1%~D
1
PR359
21.5K_0402_1%~D
2
A A

Compal Secret Data
+1.8VP
5 4 3 2 1
5 4 3 2 1
D D
PJP27
+1.5VSP_B++ 2 1 +B+
JUMP_43X118
@
10U_1206_25V6M~D
10U_1206_25V6M~D
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
1
PC222
PC221
PC337
PC338
2
2
C C
PR360
AO4712
267K_0402_1%~D Rds(on)=15mohm~18mohm
1 2
1.5VSP
5
6
7
8
PR361
0_0402_5%~D PR362 PC339 Imax=3.5A
2 1 EN_1.5 BST_1.5 1 2 1 2
<26,27,30,36,42,46> SUSP#
1
PC340 2.2_0603_5%~D 0.1U_0603_25V7K~D PQ83

PR363 .1U_0402_16V7K~D 4 AO4466_SO8
Iocp=6.87A
30.1K_0402_1%~D @
Fsw=298KHz
2
+5VALW
15
14
2
1
PU25
3
2
1
PL31
EN_PSV
TP
VBST
2.2UH_PCMC063T-2R2MN_8A_20%
TON_1.5 2 13 UG_1.5 1 2
TON DRVH +1.5VSP
2
PR364 3 12 LX_1.5 1
VOUT LL
5
6
7
8
300_0603_5%~D PR365 PR366 PR367 PC341 PC342
4.7U_0805_6.3V6K~D
1
1 2 V5FILT_1.5 4 11 TRIP_1.51 2 0_0603_5%~D @ 4.7_1206_5%~D +
+5VALW V5FILT TRIP 12K_0402_1%~D
220U_D2_4VM
FB_1.5 5 10 V5DRV_1.5 PQ84
2 1
2
VFB V5DRV
1
AO4712_SO8 2
PC343 6 9 LG_1.5 4 PC344
PGOOD DRVL
PGND
B 1U_0603_10V6K~D @ 680P_0603_50V8J~D B
GND
2
1
1
7
3
2
1
PC346 4.7U_0805_10V6K~D
2
47P_0402_50V8J~D
2 1
2 1
PR368
22.1K_0402_1%~D
1
PR369
22.1K_0402_1%~D
2
A A

Compal Secret Data
+1.5VSP
5 4 3 2 1
5 4 3 2 1
PJP28
1 2 VGA_B++
+B+
JUMP_43X118
FDS6690AS
@ Rds(on)=12mohm~15mohm
2200P_0402_50V7K~D
10U_1206_25V6M~D
10U_1206_25V6M~D
0.1U_0603_25V7K~D
6268_VGA PHASE_VGA
+VGA_COREP
1
UG_VGA Imax=7A
PC363
PC364
PC365
PC366
PR399 PR400
D 10K_0402_1%~D 1 2 1 2 D
2
2.2_0603_5%~D PC367 0.1U_0603_25V7K~D
Iocp=10.74A
2
+5VALW
<36> VGA_PW GOD
Fsw=301KHz
1
BOOT_VGA
PR401
5
6
7
8
0_0603_5%~D
PR402 PR403
15
16
1
8
PVCC_VGA
0_0603_5%~D PU26 4.7_0603_5%
2
1 2 6268_VGA PQ85
PHASE
GND
UG
BOOT
PGOOD
FDS8884_SO8
2
PC368 4
VIN_VGA 3 14 1 2
VIN PVCC
1
2.2U_0603_6.3V6K~D
PC369
3
2
1
0.1U_0603_25V7K~D 6268_VGA 4 13 LG_VGA PL32
2
VCC LG 1.8UH_SIL104R-1R8PF_9.5A_30%
@
1
1 2 +VGA_COREP
PC370
2
2.2U_0603_6.3V6K~D ISL6268CAZ-T_SSOP16 12 1
4.7U_0805_6.3V6K~D
2 PGND
5
6
7
8
PR404
220U_X_2VM
1
PR405 4.7_1206_5%~D +
PC371
PC352
22K_0402_1%~D PQ86
1 2 EN_VGA 5 11 ISEN_VGA
1 2 FDS6690AS_NL_SO8
2 1
2
<27> VGA_ON EN ISEN 2
COMP
1
FSET
PR406 4 PC373
1
VO
PC372 11.8K_0402_1%~D @ 680P_0603_50V8J~D
FB
C .1U_0402_16V7K~D C
1
2
10
PR407
3
2
1
2
10_0402_1%~D
FSET_VGA
COMP_VGA
1 2
NVVDD_SENSE <33>
1
PR408
0_0402_5%~D
68P_0402_50V8J~D
1
2
PR409
1
33K_0402_1%~D
PC374
2200P_0402_25V7K~D
1
2
2
PR410 PC375
0.01U_0402_25V7K~D
1
1 PR411
PC376
2
1.5K_0402_1%~D
2
44.2K_0402_1%~D
FB_VGA
0.90V 1.09V 1.17V
GPU_VID_0 0 0 1
1
GPU_VID_1 0 1 1
1
PR412
0_0402_5%~D PR413
+3VS 3K_0402_1%~D
2
1
output voltage adjustable network
2
PR414
1
B 0_0402_5%~D B
1
2
PR416 PR415 PC377

10K_0402_5%~D 4.7K_0402_1%~D 820P_0402_50V7K~D
2
1
+3VS
PR417 1
1
1
11.5K_0402_1%~D D
PC378 2 1 2 PQ88
2
820P_0402_50V7K~D G BSS138W -7-F_SOT323
0.01U_0402_16V7K~D
2
PR419 PR418 S
100K_0402_5%~D
3
10K_0402_5%~D 10K_0402_5%~D
1
1
1
PR420
PR421
PC379
1
D 10K_0402_5%~D
2 1 2 PQ87 @
<31> GPU_VID0 2
G BSS138W -7-F_SOT323
0.01U_0402_16V7K~D
PR422 S
100K_0402_5%~D
10K_0402_5%~D
1
1 <31> GPU_VID1
PR423
PR424
PC380
10K_0402_5%~D
@
2
2
A A

Compal Secret Data
+VGA_CORE
5 4 3 2 1
5 4 3 2 1
+5VALW +1.5VSP
PJP18
2
D @ JUMP_43X118 +1.8V D
1U_0603_10V6K~D
2
1
PC273
1
1
PJP17
1
2
4.7U_0805_6.3V6K~D
@ JUMP_43X118
2
PC274
2
2
PU20
4.7U_0805_6.3V6K~D
PU21 1 6 +3VALW
VIN VCNTL
5
VCNTL
VIN
1
PC267
4.7U_0805_6.3V6K~D
7 POK 2 GND NC 5
1
PC268
VOUT 3 +1.1V_GFX_PCIEP
1
3 7
2
VREF NC
1K_0402_1%~D
10U_0805_6.3V6M~D
4
2
PR321 VOUT PR317 4 VOUT NC 8
PC276
1 2 8 2 1K_0402_1%~D
<26,27,30,36,42,44> SUSP# EN FB
PR322
PC275 9
GND
2
0_0402_5%~D TP
9
2
VIN APL5331KAC-TRL_SO8
PR318
2
1
APL5913-KAC-TRL_SO8 0.01U_0402_25V7K~D +0.9VSP
1
0_0402_5%~D D
1
1U_0603_10V6K~D
1 2 2
1
<30,36> SUSP
PC271
PC277 G PR320 PC270
2.61K_0402_1%~D
.1U_0402_16V7K~D S
2
2
1
@ PQ78
2
PR323
PC272
@
2
C .1U_0402_16V7K~D C
2
RHU002N06_SOT323 .1U_0402_16V7K~D
1K_0402_1%~D
B B
A A

Compal Secret Data
+0.9VSP/+1.1V_GFX_PCIEP
Custom LA-4595P 1.0
5 4 3 2 1
5 4 3 2 1
+5VS
2
<5>
<5>
<5>
<5>
<5>
<5>
<5>
PC112 +CPU_B+
CPU_VID6
CPU_VID5
CPU_VID4
CPU_VID3
CPU_VID2
CPU_VID1
CPU_VID0
PR142
PL13
<27>
2 1 1_0603_5%~D
VR_ON
FBMA-L18-453215-900LMA90T_1812
@ 1 2 +B+
1
5600P_0402_25V7K
1 1
100U_25V_M
100U_25V_M
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
1U_0603_10V6K~D
D D
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
1
1
PR143 499_0402_1%~D + +
PC114
PC115
PC116
PC113
PC155
PC225
PC226
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
1
1
PC118
PC119
<7,19> DPRSLPVR 1 2
1U_0603_10V6K~D
1
PC117
PC120
2
PR144 0_0402_5%~D @ 2 2
2
<5,7,18> H_DPRSTP# 1 2
5
PR146 0_0402_5%~D
PR147 0_0402_5%~D
PR148 0_0402_5%~D
PR149 0_0402_5%~D
PR150 0_0402_5%~D
PR151 0_0402_5%~D
PR152 0_0402_5%~D
PR145 0_0402_5%~D
1
CLK_EN# 1 2
0_0402_5%~D1
+3VS PR154 0_0402_5%~D PQ43
SI7686DP-T1-E3_SO8
PR153
1 2 4
2
+3VS PC122
1U_0603_10V6K~D
2
1.91K_0402_1%~D
1
PR155 0.22U_0603_10V7K~D P_0.36H_ETQP4LR36W FC_24A_20%
PC121
3
2
1
1 BOOT_CPU1 1 2 1 2 2 1 +CPU_CORE
2
PR157
PR156
4.7_1206_5%~D
2
1
5
5
2.2_0603_5%~D PQ44 @ PQ45 PL14
3.65K_1206_1%
10K_0402_1%~D
1
499_0402_1%~D
PR158
PR160
46
49
43
42
41
40
39
38
37
48
47
45
44
D
SI7636DP-T1-E3_SO8
PR161
PR159
2
SI7636DP-T1-E3_SO8
1_0402_5%~D
DPRSTP#
VID6
VID5
VID4
VID3
VID2
VID1
VID0
3V3
CLK_EN#
GND
DPRSLPVR
VR_ON
1
680P_0603_50V8J~D
1 2
2
<7,19,27> VGATE 1 36 4 4 PR162 @ 0_0402_5%~D
2
PGOOD BOOT1 G G
PC123
<5> H_PSI# 1 2
2 35 UGATE_CPU1 VSUM PC124
PSI# UGATE1
S
S
S
S
S
S
POW _MON <27> PC147 PR181 10K_0402_1%~D 1 2
2
1U_0603_10V6K~D
1 2 1 2 3 34 PHASE_CPU1 VCC_PRM
3
2
1
3
2
1
PMON PHASE1 ISEN1
C PR164 147K_0402_1%~D 4 33 0.22U_0603_16V7K~D C
RBIAS PGND1
1 2
VR_TT# 5 32 LGATE_CPU1
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
VR_TT# LGATE1 +CPU_B+
PR165 @ 4.22K_0402_1% PH2
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
5
1
1 2 1 2 6 NTC PVCC 31
PC125
PC126
PC127
PC227
PC228
@ 100K_0603_1%_TH11-4H104FT 7 30 LGATE_CPU2 PQ46
2
SOFT LGATE2 SI7686DP-T1-E3_SO8
1 2
@ 0.015U_0402_16V7K PC128 8 29 @
0.068U_0603_50V7K~N PC129 OCSET ISL6266ACRZ-T_QFN48_7X7 PGND2
4
1 2 9 28 PHASE_CPU2
VW PHASE2
PR166 11.5K_0402_1%~D 10 27 UGATE_CPU2 P_0.36H_ETQP4LR36W FC_24A_20%
COMP UGATE2 PR167 PC130
1 2
3
2
1
11 26 BOOT_CPU2
1 2 1 2 2 1
PC131 FB BOOT2 PL15
1 2
1
5
DROOP
1000P_0402_50V7K~D 12 25 2.2_0603_5%~D
0.22U_0603_10V7K~D PQ48
FB2 NC
1
VDIFF
ISEN2
ISEN1
VSUM
VSEN
PR169 8.25K_0402_1%~D PQ47 PR168
10K_0402_1%~D
GND
D
VDD
RTN
DFB
1
VIN
4.7_1206_5%~D
VO
PR172
PR170
1 2
3.65K_1206_1%
D
SI7636DP-T1-E3_SO8
PR171
SI7636DP-T1-E3_SO8
1 2 PU11 1_0402_5%~D
13
14
15
16
17
18
19
20
21
22
23
24
1 2
4
2
PC132 1000P_0402_50V7K~D G
4
2
29.1
ISEN1 G PC133 PR173 @ 0_0402_5%~D
S
S
S
ISEN2 680P_0603_50V8J~D 1 2
2
S
S
S
PR175 97.6K_0402_1%~D PC134 270P_0402_50V7K~D 1 2 +5VS
3
2
1
1
1 2 2 1 VSUM PC135
3
2
1
1
PR174 1_0603_5%~D 1 2
PR176 PC136 @
B 1K_0402_1%~D 1U_0603_10V6K~D 0.22U_0603_16V7K~D B
1 2
2
2
PC137 100P_0402_50V8J~D VCC_PRM

1
ISEN2
PR178
PR184 PR177 PC138 2200P_0402_50V7K~D
100K_0402_1%~D 1 2 1 2 1 2 +CPU_B+
1
@ 100_0402_1%~D
1 2 PC139 10_0603_5%~D
2
0.1U_0603_25V7K~D
2
PR179 1K_0402_1%~D
PC140 330P_0402_50V7K~D
<5> VCCSENSE 1 2 1 2
VSUM
1
PR180 0_0402_5%~D
1
PC141 PC142
2.61K_0402_1%~D
@ 330P_0402_50V7K~D 0.01U_0603_25V7K~D
PR182
2
1 2
<5> VSSSENSE PR183 0_0402_5%~D
2
1
PC143 180P_0402_50V8J~D
11K_0402_1%~D
PR185
1 2
2
1 2 1 2 PH3
2
PR186 1K_0402_1%~D PR187 3.57K_0402_1%~D 10KB_0603_ERTJ1VR103J

PC144 0.068U_0603_50V7K~N
1
VCC_PRM 1 2
A
PC146 0.22U_0603_10V7K~D A
PC145 2 1 2 1
0.22U_0603_16V7K~D

Compal Secret Data
+CPU_CORE
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4595P
5 4 3 2 1
5 4 3 2 1
1
PD12 PD13
BATT+ PJSOT24C_SOT23-3 PJSOT24C_SOT23-3
BATT++
3
D PL28 D
BATT+
SMB3025500YA_2P
1 2 BATT++
+3VALWP
Battery Connect/OTP
1000P_0402_50V7K~D
100P_0402_50V8J~D
100P_0402_50V8J~D
1
1
PC279
PC309
PC310
PC278
2
0.01U_0402_25V7K~D
2
2
PR324 Place clsoe to EC pin
47K_0402_5%~D
1 2 BATT_TEMP
BATT_TEMP <27>
1
PR325
2
1K_0402_5%~D
PC280
PJPB1 battery connector .1U_0402_16V7K~D
1
PJP19
SMART
@
1 PR326
Battery: 1
2 2
3 3cell/4cell# 1K_0402_5%~D
3 3cell/4cell# <40>
4 4 2 1
1.BAT+ 5 5 1 2 +3VALWP
6
2.BAT+ 6
7 PR327
7
3.ID 10 GND 8 8 6.49K_0402_1%~D
11 9
4.B/I GND 9
5.TS SUYIN_200275MR009G186ZL 1 2 EC_SMB_DA1 <27>
6.SMD @ PR328
100_0402_5%~D
C 7.SMC C
8.GND
9.GND 1 2 EC_SMB_CK1 <27> CPU
PR329
100_0402_5%~D PH1 under CPU botten side :
CPU thermal protection at 90 +-3 degree C
Recovery at 50 +-3 degree C
VL VS
BATT+
1
2
PR330
1
453K_0402_1%~D PC281
0.1U_0603_25V7K~D
CPU
1
VS
2
PR331
0.01U_0402_25V7K~D
10.7K_0402_1%~D VL
2
1
PR333
PR332 147K_0402_1%~D
2
499K_0402_1%~D 1 2
1
PC282
PR334
B 205K_0402_1%~D B
2
2
PR335
1
8
61.9K_0402_1%~D
PR398 1 2 3 PD11
P
+
8
PU22B LM358ADR_SO8 1 1 2
10K_0402_1%~D 5 1 2 2
0 MAINPWON <41>
P
+ VL -
G
2 1 7 1SS355_SOD323-2
0 PR336 PU22A
6
4
-
G
1
<27> BATT_OVP 150K_0402_1%~D LM358ADR_SO8
1
PH4
4
1
100K_0603_1%_TH11-4H104FT
1
PR337
86.6K_0402_1% PC283 PR338
2
1000P_0402_50V7K~D 150K_0402_1%~D
2
2
2
PC284
1U_0603_10V6K~D
LI-3S :13.5V----BATT-OVP=1.5V
BATT-OVP=0.111*BATT+
A A

Compal Secret Data
BATTERY CONN
Custom LA-4595P 1.0
5 4 3 2 1
5 4 3 2 1
Version Change List ( P. I. R. List ) Page 1/1

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
1 39 DCIN /Vin Detector 08/12/08 COMPAL common circuit design modify change PR203 from 33 to 68 and add PR204 to 68 0.3
D 2 08/12/08 COMPAL design modify change PL17 from SM010018880 to SM010008E10 0.3 D
3 40 Charger 08/12/08 COMPAL vendor FAE suggest change PR272 PR339 from 1 to 3.3 0.3
4 48 BATTERY CONN 08/12/08 COMPAL design modify change PL28 from SM010018210 to SM010008E10 0.3
5 39 DCIN /Vin Detector 08/12/12 COMPAL increase capacitor for EMI request add PC313 at 0.01uf and PC314 at 0.1uf 0.3
6 42 VCCPP 08/12/12 COMPAL change resister for EMI request change PR342 from 0 to 2.2 0.3
7 43 1.8VP 08/12/12 COMPAL change resister for EMI request change PR352 from 0 to 2.2 0.3
8 44 1.5VSP 08/12/12 COMPAL change resister for EMI request change PR362 from 0 to 2.2 0.3
10
11
12
C C
13
14
15
16
17
18
19
20
21
22
23
B B
24
25
26
27
28
29
30
31
32
33
A 34 A

Compal Secret Data
PW PIR-1
Custom LA-4595P 1.0
5 4 3 2 1

Compal LA-4595P KML50 Half Penny Bridge 15.4 DIS Rev 1.0

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Compal LA-4595P KML50 Half Penny Bridge 15.4 DIS Rev 1.0

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A B C D E

Model Name: KML50 DIS

Half Penny Bridge 15.4

1bios.ru Security Classification

LVDS Panel Interface Fan conn Clock Generator

nVidia 1329pin BGA

CardBus Controller DMI X4 C-Link FingerPrinter

Intel ICH9-M Azalia

10/100/1000 LAN Mini-Card-2 Mini-Card-1 Express Card Express Card

RJ45/11 CONN SIM CON

DC/DC Interface CKT. RTC CKT.

Security Classification Compal Secret Data Compal Electronics, Inc.

Lane 1 MINI CARD-1 WWAN Lane 0 HDD

Lane 2 GLAN RTL8111DL Lane 1 ODD

1bios.ru Security Classification

XDP_TRST# R11 1 2 54.9_0402_1%

XDP_TCK R35 1 2 54.9_0402_1%

H_FERR# A5 C7 H_THERMTRIP# R16

RSVD[05] C77 10U_1206_16V4Z~N

H_IERR# Security Classification Compal Secret Data Compal Electronics, Inc.

266 0 0 0 For 8 layer condition

The trace width/space/other is 20/7/25.

R29 R28 1 2 100_0402_1% VCCSENSE

R30 1 2 100_0402_1% VSSSENSE

Close to CPU pin AD26

1bios.ru Security Classification

High Frequence Decoupling

+CPU_CORE Place these caps inside

1bios.ru Security Classification

H_A#[3..35] <4> U4B

DDR CLK/ CONTROL/COMPENSATION

+VCCP trace width and BH44 K36 CLKREQ#_7

+V_DDR_MCH_REF NC_15 TSATN# 56_0402_5%

+H_VREF H_RCOMP H_SWNG R43 NC_18

2 NC_22 HDA_SDO T102

<13> DDR_A_D[0..63] <14> DDR_B_D[0..63]

DDR_A_D36 SA_DQ_35 SA_DQS#_7 DDR_A_MA[0..14] <13> DDR_B_D36 SB_DQ_35 SB_DQS#_6 DDR_B_DQS#7

AV5 BG26 AV2 BB16

1bios.ru Security Classification

(Lane number in Order)

CANTIGA_1p0 @ R70 1 2 2.21K_0402_1%~D

CFG[5:16] have internal pullup

CFG[19:20] have internal pulldown

1bios.ru Security Classification Compal Secret Data Compal Electronics, Inc.

B35 105.3mA BLM21PG221SN1D_0805~D 0_0805_5%

V48 1732mA +VCC_PEG 1

58.67mA M25 U46

1bios.ru Security Classification Compal Secret Data Compal Electronics, Inc.

1 1 1 1 BF31 VCC_SM_20 VCC_AXG_NCTF_20 U20

VCC GFX NCTF

PAD T42 AJ14

1bios.ru Security Classification

1bios.ru Security Classification

Close to VREF pins of SO-DIMM

<8> DDR_A_D[0..63] JDIM2

M_ODT1 119 120

133 134 DDR_A_D39

RP5 56_0404_4P2R_5% RP8 56_0404_4P2R_5%

<8> DDR_B_DQS#[0..7] Close to VREF pins of SO-DIMM

DDR_CS3_DIMMB# 115 116 DDR_B_MA13

DDR_B_DQS#4 129 130 DDR_B_DM4

1 1 0 400 100 33.3 14.318 96.0 48.0

R976 1 2 0_0402_5% R_MCH_BCLK# EXPCARD_REQ#16