1/ History of Computer Systems

a)Computer Classifications (see https://en.wikipedia.org/wiki/Classes_of_computers)

N.B : Computer's performance generally measured in FLOPS (Floating-point Operations Per Second)
or in MIPS (Millions of Instructions Per Second)

Classification by Size

- Supercomputers
* Largest computers ever
* Very Expensive
* Can occupy more than 1 cooled room
* Used for High-level Performance Computing
(compared to general-purpose computers)
* Used to perform intense Numerical Calculations
* Used in Computational Science, Scientific Research & for solving
Complex Scientific and Engineering problems (i.e. Cryptanalysis)
* 1960 – Present
* Performance measured using FLOPS or TEPS (Traversed Edges Per Second)
As of 2017, can perform up to a hundred quadrillions of FLOPS,
measured in P(eta)FLOPS
As of November 2017, all of the world's fastest 500 supercomputers run
Linux-based operating systems
* CPU Architectures used : Power Architecture : IBM-A2 in Blue
Gene/Q
Sunway Architecture : SW26010
SPARC Architecture : SPARC64 V

- Mainframes
* 2nd Largest computers after Supercomputers
* Used by large organizations (i.e. Governments, Banks) for Bulk Data
Processing (i.e. industry and consumer statistics, enterprise
resource planning) and Transaction / Batch Processing
* 1960 – Present
* Performance measured using MIPS or TPS (Transactions Per Second)
* Can respond to hundreds of millions of users at a time
* CPU Architectures used : IBM System/390 to IBM z/Architectures
Burroughs Architectures

- Minicomputers
* Large powerful machines, Smaller and cheaper than Mainframes
 * Used as High-End Network Servers to handle Large-Scale Processing of
many business/industrial applications
Used in Industrial Process-Control and Manufacturing Plants
(Computer-Aided Manufacturing (CAM))
Used for Computer-Aided Design (CAD) and other computation and
graphics-intensive applications
* 1960 – Present
* Recently called Midrange Computers (between Mainframes &
Microcomputers)
* CPU Architectures used : Power Architecture : POWER5 in IBM AS/400

Micro-VAX and Alpha Architectures

Intel Itanium (IA-64) Achitecture

- MicroComputers
* Small inexpensive, mass produced computers
* Introduced with advent of Single Chip Microprocessors
Replaced the many separate components that made up the minicomputer's
CPU with one Integrated Microprocessor Chip
* Used for Standard Applications & Tasks
Intended to be used by one person at a time
* 1975 (Altair 8800) – Present
* Work on DOS, Windows & similar operating systems
* Paved the way for Personal Computers (PC), Embedded Computers
* CPU Architectures used : x86 Architecture
Power Architecture
ARM Architecture

Classification by Function

- Servers
 * Dedicated to providing one or more services to 1 or more computers
* Can make use of either :
- Minicomputers : for High-End Servers
=> Alpha, Intel Itanium (IA-64) and Power Architectures
or
- Microcomputers : for Small Servers
=> x86, Power and ARM Architectures
* Expected to be Reliable (i.e. error-correction of RAM, redundant cooling,
self-monitoring, RAID), Fit for running for several years,
and giving useful diagnosis in case of an error
For even increased security, server may be mirrored
* i.e. "Database server" : Dedicated to a database
"File server" : Manages a large collection of computer files
"Web server" : Processes web pages and web applications

- Workstations
* Powerful user machines
* Used for Technical, Scientific & Engineering Applications
Intended to be used by one person at a time
* Use UNIX & NT operating systems
* Can be equipped with powerful RISC processors (Digital Alpha or MIPS)
* Used to offer higher performance than mainstream Microcomputers (PCs),
especially with respect to CPU and graphics, memory capacity, and
multitasking capability
Nowadays, Workstations are mostly MicroComputers (PCs) + some MiniComputers
* CPU Architectures used : x86, Power, Alpha, IA-64, MIPS, SPARC Architectures

- Embedded Computers
* Part of a machine or device ; Built-in ; Hardwired
* Usually used to perform a single task
* Execute a program that is :
- Stored in non-volatile memory
- Intended to operate only a specific machine or device
* Required to operate continuously without being reset or rebooted, and once
employed in their task the software usually cannot be modified
* CPU Archs used : ARM, Power and MIPS architectures
 b)Computer Design Models / Architectures (!= CPU Architectures)

N.B : Early computers (i.e. ENIAC) ran fixed programs

-> Programs = Hardwired Circuitry in Computers
Creating a new program for the computer required rewiring the machine
John von Neumann had the idea of storing the program instructions + data inside the memory

Program/Application (Single-Threaded?)

Program = Executable File : Stored as a Single File on the File System

Contains :
- Totality of Executable Code + Data : If No Dynamic
Linking
- Part of Executable Code + Data : If Dynamic Linking
May include Code from External Object Files that have
been Statically Linked to it
=> Executable File contains code from
External Object Files at Compilation-Time
May include References to Code from External Object
Files that have been Dynamically Linked to it
=> Executable File contains only references to code
from External Obj Files at Compilation-Time
=> Partial Executable Code
The remaining part of Executable Code will be
loaded at Execution-Time from External Object
Files

+
0 or more Shared Object Files : In case of External Object Files linked Dynamically
Code in them is loaded at Run-Time to form, with
Executable Code in Executable File,
the Totality of the Executable Code
 N.B : Assembly Directives are not universal. Every Assembler has its own set of directives
https://sourceware.org/binutils/docs/as/index.html

Assembler, while going through the Assembly File, keeps track of all Sections using a Section Stack
Assembler creates a Section Table in the Reloc. Obj. File to keep track of all created Sections

-> i.e. .data ... .section .rodata ... .text ... .section .rodata ... .text ... .data

.data .data first time encountered

=> .data section entry created by Assembly in Section Table
.data section content still not in Reloc. Obj. File
(in RAM)
Current_Section <- .data

.section .rodata Current_Section = .data pushed on top of Section Stack

.rodata first time encountered
=> .rodata section created by Assembly in Reloc. Obj. File
Current_Section <- .rodata

.text Current_Section = .rodata pushed on top of the Section Stack

.text first time encountered
=> .text section created by Assembly in Reloc. Obj. File
Current_Section <- .text

.section .rodata Current_Section = .text pushed on top of the Section Stack

.rodata section already exists in the Reloc. Obj. File
=> Assembler doesn't create a new section
=> Assembler will only write additional content

.section name attributes = - creates a new section named name with attributes (if not already
existing)
- assembles the following code into the new section name
- replaces the current section and subsection by section named name
Replaced section and subsection are pushed onto the section stack

.global / .globl = makes the symbol visible to ld, externally visible to other
modules
if defined => value visible to other Object Files
otherwise => .?

.comm = defines a Common Symbol (form of uninitialized)

Common Symbol can be common to more than 1 Module (!= .global)
-> Common symbol is in .bss section
i.e. Non-Static Const Uninitialized Global C Variable
 is translated to Assembly using .comm

.comm + .local / .lcomm = defines a Common (uninitialized) + Local (externally invisible) Symbol
-> Symbol is in .bss section
i.e. Static Uninitialized Global C Variable
Static Uninitialized Local C Variable
are translated to Assembly using .comm + .local / .lcomm
 -> Symbols are originally in the Source File (.c, .cpp)
Compiler then exports them in the Assembly File (.s)
Assembler builds Symbol Table in the Relocatable Object File (.o) using Symbols in .s
file
-> Each Relocatable Object File has a Symbol Table
Symbole Table contains info about Symbols in the Object File (3 types)
-> Each Symbol has a Value (= address/offset)
- Variable : offset relative to the beginning of corresponding section
- Function : offset relative to the beginning of .text section
-> Symbole Table : (Name, Value) pairs + other information (i.e. Type, Size)

* Assembly File Sections (output of the Compiler)

- named, .text and .data sections

* Contain the majority of the Relocatable Object File Binary Code
.text : must be unalterable at execution time
contains instructions, constants...
sharable between different processes
=> single copy needs to be in memory for frequently executed
programs, such as text editors, the C compiler, the shells,
and so on
.data : alterable at execution time
contains initialized variables (Global Static & Non-Static, Local
Static)
- bss section
* Contains zeroed bytes at execution time
* Contains uninitialized variables (Global Static & Non-Static, Local Static)
Either directly under .bss section for uninitialized variables storage
or
using directive .comm for common storage
or
using directives .lcomm / .local + .comm for local common storage
 Program/Application Source Code Organization :

1) Core Source
2) Core Header Files
2) External Header Files
à
: Included in Core Source Files;
Reference Routines implemented in External Object Files
(Static and Shared Object Files)

- Each Source File is subject to the following by the Compiler Driver (i.e. GCC)

* Pre-Processing : GCC calls "cpp" to do :

-Text Substitution (# pre-processor directives)
(conditionally include code : #ifdef)
-Macro Expansion (#define)
-Comment Removal (// and /* */)
-File Inclusion (#include Headers)

>> Preprocessed source code : contains HLL Instructions still

Consists of Symbol Definitions + Symbol
References
Extension = .i
>> In C, using GCC Compiler Driver : gcc -E test.c > test.i
 * Compilation : GCC calls "cc1" to do, on Each PreProcessed File :
Translation of Preprocessed Source Code/HLL Code into
Assembly Code

>> Compiled File : is in Assembly Language, Intermediate Representation

Extension = .s
Contains Symbols exported by the Compiler, placed in
their
appropriate sections

>> In C, using GCC Compiler Driver : gcc -S test.c or test.i // outputs test.s

1 HLL Instruction may be translated into Assembly :

- in multiple different ways (i.e. using 2 ADD or 1 MOV)
- using several Assembly Instructions
=> no 1 to 1 translation from HLL to Assembly
Basic Assembly Elements :

a) Constants = Data
-> Integer Constants (30d, -101b, +4Ch, -0CDh, +457o...)
-> Character Constants ('A', "x"...)
-> String Constants ("ABC", 'xyz'...)
-> Constant Expressions (16/2, 85*8...)

b) Language Statements = Code

-> Instructions
* Assembler translate them into Machine Code
for the CPU to execute at Run-Time
-> Directives
* Provide information to the Assembler during translation
* Non-Executable by the CPU, not part of ISA
* Define data, select memory model...
-> Macros
* Shorthand notation for a group of statements
i.e. Sequence of instructions, directives or macros
 Definition of Data Variables

- Assembler allocates memory for the Variable

- Assembler may assign a name = Data Label to the variable
Data Label : Marks the offset – address of data following it
- Usually in .data and .data? (uninitialized) sections
- Syntax :
Label(optional) Directive(Type)
Initializer(Constant)
val1 .int 1000h
- Type Directives are assembler-dependent

Definition of Symbolic Constants

- Assembler does a pure Text Substitution when it encounters Symbolic

Constants
- Assembler doesn't allocate memory for Symbolic Constants
- Syntax : 3 Directives :

* = Directive
-- name = integer-constant : count = 50
-- name = integer-constant-expression : count = 10*10 (100)
-> count is a Symbolic Constant
-> count is not a variable
-> count can be redefined using a String constant
count = "This is count"

* EQU Directive
-- name EQU integer-constant : count EQU 50
-- name EQU integer-constant-expression : count EQU
50*10(500)
 -- name EQU String : count EQU
<50*10>(50*10)

-> count cannot be redefined using EQU

* TESTEQU Directive (Text Macro)??

--

Assembly Instructions Format : [label:] mnemonic [operands] [;comment]

1-Label
-> optional
-> case sensitive
-> Marks the offset – address of code/instruction following it
-> Code Labels (usually in .text section)
-- Used as target of Jump and Loop instructions

2-Mnemonic
-> Required
-> lower case
-> Identifies the operation
-> 0,1,2,3-operand Mnemonics, Relative Jump Mnemonics

3-Operands
Can be
-> Constants
-> Registers (EAX, BX...)
-> Memory addresses (Data Labels, Code Labels for Jumps)
4-Comments
-> start with ; till the end of the line
-> optional

Assembly Directives :

-> start with .

-> assembler-dependent (not universal) (as != nasm != masm)
-> .data, .text : sections
.ascii, .int : data types
 Assembly Vocabulary :

* Assembly : GCC calls "as" to do, on Each Compiled File :

Convertion of Assembly Code into Binary Machine
Instructions/Code

>> Assembled File : is a Relocatable Object File

- Contains Code + Data in Binary Code
- Usually, Binary Code starts at address 0x0
- All Instructions + Data words are located at
addresses relative to address 0x0 = beginning
of Object File
=> absolute addresses
- Linking it will result in relocation of Code + Data
since
position of Object File is modified (!= address
0x0)
- Is in a form that can be combined with other
Relocatable Object Files to form an Executable
File,
a Static Library or a Shared Library
Extension = .o
Contains : (UNIX and for almost all Oses)

* Object File Section Header Table : size + position of Object File

sections
* Code Segment : may contain multiple Sections related to Code
* Data Segment : may contain multiple Sections related to Data
* Relocation information : instructions and data words are located at
absolute addresses (relative to position of Object File,
which is defined as 0x0 by Assembler). These addresses need to be
modified/fixed when the Object File is linked to other Files
=> They will be shifted by an offset = new address at which
the Object File begins
 * Symbol table : Tracks location of Symbols in Object File contains the
remaining labels that are not defined, such as external references.

>> In C, using GCC Compiler Driver : gcc -c test.c or test.i // outputs test.o

* Linking : Merges All Relocatable Object Files (from All Source Files)
Resolves External References to symbols defined in other object
files
Relocates Symbols from their relative locations in the Relocatable
Object
files to new Absolute Positions in the output
 Program/Application Source Code Content :

* Core Code : High-Level-Language Instructions implemented by the

Executable itself or implemented by an external Object File
which is linked Statically to the Core Code
i.e. Program calls Routines implemented by the Executable itself
[ Routines declared in Header Files (.h/.hpp)
and defined in Corresponding Source Files (.c/.cpp) ]
Program calls Routines implemented by other Object Files
[ Routines declared in included Header Files (.h/.hpp)
and precompiled in External Object Files (.o/.elf)
linked Statically => are part of the Executable Code
and Stored Execution File before Program Execution ]
+
* Data
+
* 0 or more Shared Code : HLL Instructions implemented in external files: Shared Object
files
which are linked Dynamically
i.e. Program calls Routines implemented in other Object Files
[ Routines declared in included Header Files (.h/.hpp)
and precompiled in External Object Files (.o/.elf)
linked Dynamically => are not part of the Stored File,
become part of the Program/Process at Execution Time ]

- 1 + 2 + 3 are subject to:

* Pre-Processing : Text Substitution (# pre-processor directives)
Macro Expansion (#define)
Comment Removal (// and /* */)
File Inclusion (Headers .h)

>> Preprocessed source code (text), still HLL Instructions

 >> In C : gcc -E test.c > test.i

* Compilation : Translation of Preprocessed Source Code/HLL Code into Assembly

Code

>> Assembly Language File, Intermediate Representation

Contains Machine Instructions in Assembly
>> In C : gcc -S test.c // => outputs test.s

* Assembly : Converting Assembly Code into Machine Instructions

Addition of Relocation Information

Compiled, Linked (to the files where the Shared Code comes from)
then Stored as an Executable File in the File System
Executable File is divided into Segments, which can contain each multiple Sections
Executable File contains a Section Table = describes the sections inside it

=> Program = Executable File (Sections) + 0 or more Shared Object Files

- When Program executed :
1) A Process is created by the OS for the Program
2) An Address Space is allocated to the process in the Memory
3) Program is loaded into the Process Address Space in Memory
Executable File + Shared Object Files which are looked for generally at execution
(Dynamic Linking)
4) Process' single Thread of Control executes the code

- Process Address Space Organization

* Read-Only Segment :
- Has the Read and Execute access rights only
- Is in a Memory area Protected from modification (Read-Only)
- Code + Data in this segment are unmodifiable during Program execution
- Holds multiple sections :
-- .text
.rodata

* Code :
- Instructions
- Modifiable by the dev before Program Execution
- Unmodifiable during Program Execution
- When Program is executed :
 * Code is loaded into memory in Read-Only state
loaded into Memory area Protected from modification
* Code can/should not be modifiable afterwards during the program execution
* Data :
- Variables
- Much of it is modifiable during Program Execution
* Global Data : scope/lifetime = whole thread (static allocation)
=> address space allocated remains for lifetime of thread
* Local : scope/lifetime = when thread enters block 2 when it exits
it (automatic allocation, run-time allocation in stack)
=> address space allocated remains allocated only when thread in

Pure von Neumann Design Model / Architecture (a.k.a Princeton Model)

In the 1940s in USA by John von Neumann
Idea : Store Program Instructions + Data inside the memory of the computer => Stored-Program Computer
EDSAC first Stored-Program Computer

- Theoratical Concept to build/implement Stored-Program Digital Computers

- Based on Universal Turing Machines theoratical concept
- Doesn't go deep into the computational capabilities of machine's implementations
- Basis of all new/recent Designs
- Defines 4/5 Primary parts for Computer's Hardware + their interconnections (Bus System)
1* CPU
2* Input
3* Output
4* Working Memory, or simply Memory (volatile, i.e. RAM)
[5* Permanent memory, considered as I/O Device (persistant)]

* Working Memory : (Memory)

-> Single Storage Structure/Unit where Instructions + Data cohabit
Shared by Program Code and Data on which Code Operates
-> 1 Address Space for both Code and Data : Both accessible via Pointers
=> Possible to Access Code as Data :
Read Code as Data, Write code as data, and then execute it as a code
=> Program can modify itself
-> Connected to CPU using 1 System Bus = 1 Data Bus (2-way) + 1 Address Bus (CPU-2-
Memory)

* CPU : Central Processing Unit

-> Can be either Accessing/Reading 1 instruction or Accessing/Reading Data in Memory at a
time
Cannot do both at the same time since Instructions and Data cohabit in the same Memory
and are transported using the same Bus to and from CPU
-> Instructions fetched + executed sequentially as controlled by Program Counter
=> Called Control-Flow Computer
 => Slow process
=> Von Neuman Bottleneck
=> Operation bandwidth limited
Solution : Parallel Processing may be implemented in which serial CPU’s are
connected in parallel : Modified Von Neumann Design

Non-Modified Harvard Design Model / Architecture

- Based on the computer organization defined by von Neumann (CPU, I/O, Memory)
- Physically separates Storage and Signal Pathways (Buses) for Instructions and
Data
=> 2 Memories : 1 for Code, 1 for Data
: => 2 Separate Address Spaces for Code and Data
(Code / Data Segments)
: => Cannot access Code Instructions as Data
(No pointers to code, only to data)
=> 2 Buses : 1 associated to Code Memory, 1 associated to Data Memory
- CPU can both Access/Read an instruction and Perform a Data Memory Access at the
same time
- Code is usually Read-Only; Data is usually Read-Write

Almost-Harvard – Access-Instruction-Memory-as-Data
 Designs found in real life

2/ PC : Personal Computer

- First introduced in 1981 by IBM as a Micro-Data-Processor Computer (Microcomputer) : IBM PC Model 5150
- IBM design :
-> Built over Single Chip Microprocessors : Replaced the many separate components that made up the
minicomputer's CPU with one Integrated Microprocessor
Chip i.e. IBM PC Model 5150 used Intel 8088 Processor
-> Inexpensive, simple and robust (definitely not advanced)
-> Standardized = IBM PC Standard
-> Had an Open Architecture
-> Well documented, had great possibilities for expansion

=> Other companies entered the market, manufacturing IBM compatible PCs and components for them,
creating IBM PC Clones (2 types of clones)
* Brand names : PCs from IBM, Compaq, AST...
Big companies that develop their own hardware components
* Real Clones : PCs built from standard components ; No names
Anyone can make a real clone by gathering components

- Concists of :
* Central Unit :
Motherboard : CPU, RAM, Cache, ROM chips + BIOS and start-up programs,
Chipsets(Controllers), Ports, Buses, Expansion Slots
Drives : Hard Disk(s), Floppy Drive(s), CD-ROM...
Expansion Cards : Graphics Card (Video Adapter), Network Controller,
SCSI Controller, Sound Card, Video and TV Card,
Internal modem and ISDN card

* Peripherals : Connected to the Central Unit using Cables + Adapters/Controllers

Keyboard and mouse, Joystick, Monitor, Printer, Scanner, Loudspeakers, External drives,
External tape station, External modem
 - John Von Neumann PC Architecture/Model

* Buses :

- Electrical conduits/wires that transfer bits back and forth between components
- 2 types : Internal Bus
- RISC (Reduced Instruction Set Computer) => Fixed-width = word size = 4 or 8 bytes
- CISC (Complex Instruction Set Computer) => Variable-width
- Macroscopic view : { System Bus, Memory Bus, I/O Bus, CPU Internal Bus }
- Microscopic view : Each Bus contains : { Data Bus, Address Bus }
Data Bus width = maximum data that can be transferred during 1 cycle; wider it is, faster it is
Address Bus width = length of memory address, how many memory arrays can be addressed (2^width);
wider it is, more memory addressable

* I/O devices :
system's connection with external world
generally 4 : keyboard + mouse for input, display for output, disk drive : long-term storage of
data + programs
 I/O devices connected to I/O buses through : controller OR adapter
** Controller : chips in the device OR on the system's circuit board (motherboard)
** Adapter : card that plugs into a slot on the motherboard
Both transfer data back and forth between I/O devices and I/O bus

* Main memory :
temporary-storage device, holds program code being executed and data being operated on by
the programs
Physically consists of collection of DRAM chips (Dynamic Random Access Memory)
Logically organized as linear array of bytes, each with its own unique address (array index)
starting at 0

* Processor:
1 core, multicore
Each core = Processing Engine
Each core = 1 set of registers + 1 CPU (1 Control Unit : fetch, decode, dispatch, 1 set of
Execution Units : ALU, FPU)
PC : Program Counter <=> IP (Instruction Pointer) = word-size register
Operates according to Instruction Set Architecture, sequentially, each instruction envolving steps
*CU : Fetch instruction whose address is in PC (pointed by it)
*CU : Decode the instruction : interpretation
*CU : Dispatch the instruction by activating/sending signals to appropriate circuitry
and Execution Units
*EUs : Perform operations
*CU : update PC with address of next instruction (if no jump, contiguous)
Operations : simple, revolve around Main Memory, Registers, Execution Units (ALU, FPU...)
*Registers = collections of word-size registers, each with unique name, gathered in
a Register Set/Register File
*Main Memory = holds program code (instructions) loaded + data on which instructions
operate
*ALU : compute address values + performs arithmetic + logic operations
Instructions :
*Load : copy byte/word from main memory to register, overwrite its previous content
*Store : copy byte/word from register to main memory location, overwrite its previous
content
*Operate : copy contents of 2 registers to ALU, perform arithmetic or logic operation
on the 2 words, store result in register
*Jump : extract word from instruction, copy that word into PC, overwrite its previous
content