8086 Supports 6 Types of Instructions

8086 Microprocessor
Instruction Set
8086 supports 6 types of instructions:
1. Data Transfer Instructions
2. Arithmetic Instructions
3. Logical Instructions
4. String manipulation Instructions
5. Process Control Instructions
6. Control Transfer Instructions
1
8086 Microprocessor
Instruction Set
Instructions that are used to transfer data/ address in to

registers, memory locations and I/O ports.
Generally involve two operands: Source operand and

Destination operand of the same size.
Source: Register or a memory location or an immediate data

Destination : Register or a memory location.
The size should be a either a byte or a word.
A 8-bit data can only be moved to 8-bit register/ memory

and a 16-bit data can be moved to 16-bit register/ memory.
2
8086 Microprocessor
Instruction Set
Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT …
MOV reg2/ mem, reg1/ mem
MOV reg2, reg1 (reg2)  (reg1)

MOV mem, reg1 (mem)  (reg1)
MOV reg2, mem (reg2)  (mem)
MOV reg/ mem, data
MOV reg, data (reg)  data

MOV mem, data (mem)  data
XCHG reg2/ mem, reg1
XCHG reg2, reg1 (reg2)  (reg1)

XCHG mem, reg1 (mem)  (reg1)
3
8086 Microprocessor
Instruction Set
PUSH reg16/ mem
PUSH reg16 (SP)  (SP) – 2

MA S = (SS) x 1610 + SP
(MA S ; MA S + 1)  (reg16)
PUSH mem (SP)  (SP) – 2

MA S = (SS) x 1610 + SP
(MA S ; MA S + 1)  (mem)
POP reg16/ mem
POP reg16 MA S = (SS) x 1610 + SP

(reg16)  (MA S ; MA S + 1)
(SP)  (SP) + 2
POP mem MA S = (SS) x 1610 + SP

(mem)  (MA S ; MA S + 1)
(SP)  (SP) + 2
4
8086 Microprocessor
Instruction Set
IN A, [DX] OUT [DX], A
IN AL, [DX] PORTaddr = (DX) OUT [DX], AL PORTaddr = (DX)

(AL)  (PORT) (PORT)  (AL)
IN AX, [DX] PORTaddr = (DX) OUT [DX], AX PORTaddr = (DX)

(AX)  (PORT) (PORT)  (AX)
IN A, addr8 OUT addr8, A
IN AL, addr8 (AL)  (addr8) OUT addr8, AL (addr8)  (AL)
IN AX, addr8 (AX)  (addr8) OUT addr8, AX (addr8)  (AX)
5
8086 Microprocessor
Instruction Set
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
ADD reg2/ mem, reg1/mem
ADC reg2, reg1 (reg2)  (reg1) + (reg2)

ADC reg2, mem (reg2)  (reg2) + (mem)
ADC mem, reg1 (mem)  (mem)+(reg1)
ADD reg/mem, data
ADD reg, data (reg)  (reg)+ data

ADD mem, data (mem)  (mem)+data
ADD A, data
ADD AL, data8 (AL)  (AL) + data8

ADD AX, data16 (AX)  (AX) +data16
6
8086 Microprocessor
Instruction Set
ADC reg2/ mem, reg1/mem
ADC reg2, reg1 (reg2)  (reg1) + (reg2)+CF

ADC reg2, mem (reg2)  (reg2) + (mem)+CF
ADC mem, reg1 (mem)  (mem)+(reg1)+CF
ADC reg/mem, data
ADC reg, data (reg)  (reg)+ data+CF

ADC mem, data (mem)  (mem)+data+CF
ADDC A, data
ADD AL, data8 (AL)  (AL) + data8+CF

ADD AX, data16 (AX)  (AX) +data16+CF
7
8086 Microprocessor
Instruction Set
SUB reg2/ mem, reg1/mem
SUB reg2, reg1 (reg2)  (reg1) - (reg2)

SUB reg2, mem (reg2)  (reg2) - (mem)
SUB mem, reg1 (mem)  (mem) - (reg1)
SUB reg/mem, data
SUB reg, data (reg)  (reg) - data

SUB mem, data (mem)  (mem) - data
SUB A, data
SUB AL, data8 (AL)  (AL) - data8

SUB AX, data16 (AX)  (AX) - data16
8
8086 Microprocessor
Instruction Set
SBB reg2/ mem, reg1/mem
SBB reg2, reg1 (reg2)  (reg1) - (reg2) - CF

SBB reg2, mem (reg2)  (reg2) - (mem)- CF
SBB mem, reg1 (mem)  (mem) - (reg1) –CF
SBB reg/mem, data
SBB reg, data (reg)  (reg) – data - CF

SBB mem, data (mem)  (mem) - data - CF
SBB A, data
SBB AL, data8 (AL)  (AL) - data8 - CF

SBB AX, data16 (AX)  (AX) - data16 - CF
9
8086 Microprocessor
Instruction Set
INC reg/ mem
INC reg8 (reg8)  (reg8) + 1
INC reg16 (reg16)  (reg16) + 1
INC mem (mem)  (mem) + 1
DEC reg/ mem
DEC reg8 (reg8)  (reg8) - 1
DEC reg16 (reg16)  (reg16) - 1
DEC mem (mem)  (mem) - 1
10
8086 Microprocessor
Instruction Set
MUL reg/ mem
MUL reg For byte : (AX)  (AL) x (reg8)

For word : (DX)(AX)  (AX) x (reg16)
MUL mem For byte : (AX)  (AL) x (mem8)

For word : (DX)(AX)  (AX) x (mem16)
IMUL reg/ mem
IMUL reg For byte : (AX)  (AL) x (reg8)

For word : (DX)(AX)  (AX) x (reg16)
IMUL mem For byte : (AX)  (AX) x (mem8)

For word : (DX)(AX)  (AX) x (mem16)
11
8086 Microprocessor
Instruction Set
DIV reg/ mem
DIV reg For 16-bit :- 8-bit :

(AL)  (AX) :- (reg8) Quotient
(AH)  (AX) MOD(reg8) Remainder
For 32-bit :- 16-bit :

(AX)  (DX)(AX) :- (reg16) Quotient
(DX)  (DX)(AX) MOD(reg16) Remainder
DIV mem For 16-bit :- 8-bit :

(AL)  (AX) :- (mem8) Quotient
(AH)  (AX) MOD(mem8) Remainder

(AX)  (DX)(AX) :- (mem16) Quotient
(DX)  (DX)(AX) MOD(mem16) Remainder
12
8086 Microprocessor
Instruction Set
IDIV reg/ mem
IDIV reg For 16-bit :- 8-bit :

(AL)  (AX) :- (reg8) Quotient
(AH)  (AX) MOD(reg8) Remainder

(AX)  (DX)(AX) :- (reg16) Quotient
(DX)  (DX)(AX) MOD(reg16) Remainder
IDIV mem For 16-bit :- 8-bit :

(AL)  (AX) :- (mem8) Quotient
(AH)  (AX) MOD(mem8) Remainder

(AX)  (DX)(AX) :- (mem16) Quotient
(DX)  (DX)(AX) MOD(mem16) Remainder
13
8086 Microprocessor
Instruction Set
CMP reg2/mem, reg1/ mem
CMP reg2, reg1 Modify flags  (reg2) – (reg1)
If (reg2) > (reg1) then CF=0, ZF=0, SF=0

If (reg2) < (reg1) then CF=1, ZF=0, SF=1
If (reg2) = (reg1) then CF=0, ZF=1, SF=0
CMP reg2, mem Modify flags  (reg2) – (mem)
If (reg2) > (mem) then CF=0, ZF=0, SF=0

If (reg2) < (mem) then CF=1, ZF=0, SF=1
If (reg2) = (mem) then CF=0, ZF=1, SF=0
CMP mem, reg1 Modify flags  (mem) – (reg1)
If (mem) > (reg1) then CF=0, ZF=0, SF=0

If (mem) < (reg1) then CF=1, ZF=0, SF=1
If (mem) = (reg1) then CF=0, ZF=1, SF=0
14
8086 Microprocessor
Instruction Set
CMP reg/mem, data
CMP reg, data Modify flags  (reg) – (data)
If (reg) > data then CF=0, ZF=0, SF=0

If (reg) < data then CF=1, ZF=0, SF=1
If (reg) = data then CF=0, ZF=1, SF=0
CMP mem, data Modify flags  (mem) – (mem)
If (mem) > data then CF=0, ZF=0, SF=0

If (mem) < data then CF=1, ZF=0, SF=1
If (mem) = data then CF=0, ZF=1, SF=0
15
8086 Microprocessor
Instruction Set
CMP A, data
CMP AL, data8 Modify flags  (AL) – data8
If (AL) > data8 then CF=0, ZF=0, SF=0

If (AL) < data8 then CF=1, ZF=0, SF=1
If (AL) = data8 then CF=0, ZF=1, SF=0
CMP AX, data16 Modify flags  (AX) – data16
If (AX) > data16 then CF=0, ZF=0, SF=0

If (mem) < data16 then CF=1, ZF=0, SF=1
If (mem) = data16 then CF=0, ZF=1, SF=0
16
8086 Microprocessor
Instruction Set
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
17
8086 Microprocessor
Instruction Set
18
8086 Microprocessor
Instruction Set
19
8086 Microprocessor
Instruction Set
20
8086 Microprocessor
Instruction Set
21
8086 Microprocessor
Instruction Set
22
8086 Microprocessor
Instruction Set
23
8086 Microprocessor
Instruction Set
24
8086 Microprocessor
Instruction Set
4. String Manipulation Instructions
 String : Sequence of bytes or words
 8086 instruction set includes instruction for string movement, comparison,

scan, load and store.
 REP instruction prefix : used to repeat execution of string instructions
 String instructions end with S or SB or SW.

S represents string, SB string byte and SW string word.
 Offset or effective address of the source operand is stored in SI register and

that of the destination operand is stored in DI register.
 Depending on the status of DF, SI and DI registers are automatically

updated.
 DF = 0  SI and DI are incremented by 1 for byte and 2 for word.
 DF = 1  SI and DI are decremented by 1 for byte and 2 for word.
25
8086 Microprocessor
Instruction Set

Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS
REP
REPZ/ REPE While CX  0 and ZF = 1, repeat execution of

string instruction and
(Repeat CMPS or SCAS until (CX)  (CX) – 1
ZF = 0)
REPNZ/ REPNE While CX  0 and ZF = 0, repeat execution of

string instruction and
(Repeat CMPS or SCAS until (CX)  (CX) - 1
ZF = 1)
26
8086 Microprocessor
Instruction Set

MOVS
MOVSB MA = (DS) x 1610 + (SI)

MAE = (ES) x 1610 + (DI)
(MAE)  (MA)
If DF = 0, then (DI)  (DI) + 1; (SI)  (SI) + 1

If DF = 1, then (DI)  (DI) - 1; (SI)  (SI) - 1
MOVSW MA = (DS) x 1610 + (SI)

MAE = (ES) x 1610 + (DI)
(MAE ; MAE + 1)  (MA; MA + 1)

27
8086 Microprocessor
Instruction Set

Compare two string byte or string word
CMPS
CMPSB MA = (DS) x 1610 + (SI)

MAE = (ES) x 1610 + (DI)
Modify flags  (MA) - (MAE)
If (MA) > (MAE), then CF = 0; ZF = 0; SF = 0

If (MA) < (MAE), then CF = 1; ZF = 0; SF = 1
CMPSW If (MA) = (MAE), then CF = 0; ZF = 1; SF = 0
For byte operation

For word operation

28
8086 Microprocessor
Instruction Set

Scan (compare) a string byte or word with accumulator
SCAS
SCASB MAE = (ES) x 1610 + (DI)

Modify flags  (AL) - (MAE)
If (AL) > (MAE), then CF = 0; ZF = 0; SF = 0

If (AL) < (MAE), then CF = 1; ZF = 0; SF = 1
If (AL) = (MAE), then CF = 0; ZF = 1; SF = 0
If DF = 0, then (DI)  (DI) + 1

If DF = 1, then (DI)  (DI) – 1
SCASW MAE = (ES) x 1610 + (DI)

Modify flags  (AL) - (MAE)
If (AX) > (MAE ; MAE + 1), then CF = 0; ZF = 0; SF = 0

If (AX) < (MAE ; MAE + 1), then CF = 1; ZF = 0; SF = 1
If (AX) = (MAE ; MAE + 1), then CF = 0; ZF = 1; SF = 0
If DF = 0, then (DI)  (DI) + 2

29
If DF = 1, then (DI)  (DI) – 2
8086 Microprocessor
Instruction Set

Load string byte in to AL or string word in to AX
LODS
LODSB MA = (DS) x 1610 + (SI)

(AL)  (MA)
If DF = 0, then (SI)  (SI) + 1

If DF = 1, then (SI)  (SI) – 1
LODSW MA = (DS) x 1610 + (SI)

(AX)  (MA ; MA + 1)
If DF = 0, then (SI)  (SI) + 2

If DF = 1, then (SI)  (SI) – 2
30
8086 Microprocessor
Instruction Set

Store byte from AL or word from AX in to string
STOS
STOSB MAE = (ES) x 1610 + (DI)

(MAE)  (AL)
If DF = 0, then (DI)  (DI) + 1

If DF = 1, then (DI)  (DI) – 1
STOSW MAE = (ES) x 1610 + (DI)

(MAE ; MAE + 1 )  (AX)
If DF = 0, then (DI)  (DI) + 2

If DF = 1, then (DI)  (DI) – 2
31
8086 Microprocessor
Instruction Set
5. Processor Control Instructions

Mnemonics Explanation
STC Set CF  1
CLC Clear CF  0
CMC Complement carry CF  CF/
STD Set direction flag DF  1
CLD Clear direction flag DF  0
STI Set interrupt enable flag IF  1
CLI Clear interrupt enable flag IF  0
NOP No operation
HLT Halt after interrupt is set
WAIT Wait for TEST pin active
ESC opcode mem/ reg Used to pass instruction to a coprocessor

which shares the address and data bus
with the 8086
LOCK Lock bus during next instruction 32

8086 Microprocessor
Instruction Set
Transfer the control to a specific destination or target instruction

Do not affect flags
 8086 Unconditional transfers
CALL reg/ mem/ disp16 Call subroutine
RET Return from subroutine
JMP reg/ mem/ disp8/ disp16 Unconditional jump
33
8086 Microprocessor
Instruction Set
 8086 signed conditional  8086 unsigned conditional

branch instructions branch instructions
Checks flags
If conditions are true, the program control is

transferred to the new memory location in the same
segment by modifying the content of IP
34
8086 Microprocessor
Instruction Set
 8086 signed conditional  8086 unsigned conditional

branch instructions branch instructions
Name Alternate name Name Alternate name

JE disp8 JZ disp8 JE disp8 JZ disp8
Jump if equal Jump if result is 0 Jump if equal Jump if result is 0
JNE disp8 JNZ disp8 JNE disp8 JNZ disp8

Jump if not equal Jump if not zero Jump if not equal Jump if not zero
JG disp8 JNLE disp8 JA disp8 JNBE disp8
Jump if greater Jump if not less or Jump if above Jump if not below
equal or equal
JGE disp8 JNL disp8 JAE disp8 JNB disp8
Jump if greater Jump if not less Jump if above or Jump if not below
than or equal equal
JL disp8 JNGE disp8 JB disp8 JNAE disp8
Jump if less than Jump if not Jump if below Jump if not above
greater than or or equal
equal
JLE disp8 JNG disp8 JBE disp8 JNA disp8
Jump if less than Jump if not Jump if below or Jump if not above
or equal greater equal 35
8086 Microprocessor
Instruction Set
 8086 conditional branch instructions affecting individual flags
JC disp8 Jump if CF = 1
JNC disp8 Jump if CF = 0
JP disp8 Jump if PF = 1
JNP disp8 Jump if PF = 0
JO disp8 Jump if OF = 1
JNO disp8 Jump if OF = 0
JS disp8 Jump if SF = 1
JNS disp8 Jump if SF = 0
JZ disp8 Jump if result is zero, i.e, Z = 1
JNZ disp8 Jump if result is not zero, i.e, Z = 1
36
8086 Instruction Set: Summary
AND Logical AND of byte or word

NOT Logical NOT of byte or word
OR Logical OR of byte or word
RCL Rotate left trough carry byte or word
RCR Rotate right trough carry byte or word
ROL Rotate left byte or word
ROR Rotate right byte or word
SAL Arithmetic shift left byte or word
SAR Arithmetic shift right byte or word
SHL Logical shift left byte or word
SHR Logical shift right byte or word
TEST Test byte or word
XOR Logical exclusive-OR of byte or word
CMPS Compare byte or word string
LODS Load byte or word string
IN Input byte or word from port
OUT Output byte or word to
MOV Move to/from register/memory
MOVS Move byte or word string
MOVSB Move string byte
MOVSW Move string word
DAA Decimal adjust for addition

DAS Decimal adjust for subtraction
DEC Decrement byte or word by one
DIV Divide byte or word
IDIV Integer divide byte or word
IMUL Integer multiply byte or word
INC Increment byte or word by one
MUL Multiply byte or word (unsigned)
NEG Negate byte or word
SBB Subtract byte or word and carry (borrow)
SUB Subtract byte or word
REP Repeat
REPE Repeat while equal
REPZ Repeat while zero
REPNE Repeat while not equal
REPNZ Repeat while not zero
SCAS Scan byte or word string
STOS Store byte or word string
38
LAHF Load AH from flags

LDS Load pointer using data segment
LEA Load effective address
LES Load pointer using extra segment port
POP Pop word off stack
POPF Pop flags off stack
PUSH Push word onto stack
PUSHF Push flags onto stack
SAHF Store AH into flags
XCHG Exchange byte or word
XLAT Translate byte
AAA ASCII adjust for addition
AAD ASCII adjust for division
AAM ASCII adjust for multiply
AAS ASCII adjust for subtraction
ADC Add byte or word plus carry
ADD Add byte or word
CBW Convert byte or word
CMP Compare byte or word
CWD Convert word to double-word
8086 Microprocessor
Assemble Directives
Instructions to the Assembler regarding the program being

executed.
Control the generation of machine codes and organization of

the program; but no machine codes are generated for
assembler directives.
Also called ‘pseudo instructions’
Used to :
› specify the start and end of a program
› attach value to variables
› allocate storage locations to input/ output data
› define start and end of segments, procedures, macros etc..
40
8086 Microprocessor
Assemble Directives
DB Define Byte
DW Define a byte type (8-bit) variable
SEGMENT Reserves specific amount of memory

ENDS locations to each variable
ASSUME Range : 00H – FFH for unsigned value;

00H – 7FH for positive value and
ORG 80H – FFH for negative value
END
EVEN General form : variable DB value/ values
EQU
PROC
FAR Example:
NEAR LIST DB 7FH, 42H, 35H
ENDP
Three consecutive memory locations are reserved for
SHORT the variable LIST and each data specified in the
instruction are stored as initial value in the reserved
MACRO memory location
ENDM 41
8086 Microprocessor
Assemble Directives
DB Define Word
DW Define a word type (16-bit) variable
SEGMENT Reserves two consecutive memory locations

ENDS to each variable
ASSUME Range : 0000H – FFFFH for unsigned value;

0000H – 7FFFH for positive value and
ORG 8000H – FFFFH for negative value
END
EVEN General form : variable DW value/ values
EQU
PROC
FAR Example:
NEAR ALIST DW 6512H, 0F251H, 0CDE2H
ENDP
Six consecutive memory locations are reserved for
SHORT the variable ALIST and each 16-bit data specified in
the instruction is stored in two consecutive memory
MACRO location.
ENDM 42
8086 Microprocessor
Assemble Directives
DB SEGMENT : Used to indicate the beginning of

a code/ data/ stack segment
DW
ENDS : Used to indicate the end of a code/
SEGMENT data/ stack segment
ENDS
General form:
ASSUME
ORG
END Segnam SEGMENT
EVEN
…
EQU … Program code
… or
PROC … Data Defining Statements
…
FAR …
NEAR
ENDP Segnam ENDS
SHORT
MACRO User defined name of

the segment
ENDM 43
8086 Microprocessor
Assemble Directives
DB Informs the assembler the name of the

program/ data segment that should be used
DW for a specific segment.
SEGMENT General form:

ENDS
ASSUME segreg : segnam, .. , segreg : segnam
ASSUME
ORG
User defined name of
END Segment Register
the segment
EVEN
EQU
PROC Example:
FAR
NEAR ASSUME CS: ACODE, DS:ADATA Tells the compiler that the
ENDP instructions of the program are
stored in the segment ACODE and
data are stored in the segment
SHORT ADATA
MACRO
ENDM 44
8086 Microprocessor
Assemble Directives
ORG (Origin) is used to assign the starting address

DB
(Effective address) for a program/ data segment
DW END is used to terminate a program; statements

after END will be ignored
SEGMENT
ENDS EVEN : Informs the assembler to store program/
data segment starting from an even address
ASSUME
EQU (Equate) is used to attach a value to a variable
ORG
Examples:
END
EVEN ORG 1000H Informs the assembler that the statements
EQU following ORG 1000H should be stored in
memory starting with effective address
1000H
PROC
FAR
LOOP EQU 10FEH Value of variable LOOP is 10FEH
NEAR
ENDP
_SDATA SEGMENT In this data segment, effective address of
SHORT ORG 1200H memory location assigned to A will be 1200H
A DB 4CH and that of B will be 1202H and 1203H.
EVEN
MACRO B DW 1052H
ENDM _SDATA ENDS 45
8086 Microprocessor
Assemble Directives
PROC Indicates the beginning of a procedure

DB
ENDP End of procedure
DW
FAR Intersegment call
SEGMENT
ENDS NEAR Intrasegment call
General form
ASSUME
ORG
procname PROC[NEAR/ FAR]
END
EVEN …
… Program statements of the
EQU procedure
…
PROC RET Last statement of the

procedure
ENDP
FAR procname ENDP
NEAR
SHORT User defined name of

the procedure
MACRO
ENDM 46
8086 Microprocessor
Assemble Directives
DB
Examples:
DW
SEGMENT ADD64 PROC NEAR The subroutine/ procedure named ADD64 is

ENDS declared as NEAR and so the assembler will
… code the CALL and RET instructions involved
… in this procedure as near call and return
ASSUME …
RET
ORG
ADD64 ENDP
END
EVEN
EQU CONVERT PROC FAR The subroutine/ procedure named CONVERT
is declared as FAR and so the assembler will
… code the CALL and RET instructions involved
PROC … in this procedure as far call and return
ENDP …
FAR
RET
NEAR CONVERT ENDP
SHORT
MACRO
ENDM 47
8086 Microprocessor
Assemble Directives
DB Reserves one memory location for 8-bit

signed displacement in jump instructions
DW
Example:
SEGMENT
ENDS
ASSUME JMP SHORT The directive will reserve one

AHEAD memory location for 8-bit
ORG displacement named AHEAD
END
EVEN
EQU
PROC
ENDP
FAR
NEAR
SHORT
MACRO
ENDM 48
8086 Microprocessor
Assemble Directives
DB MACRO Indicate the beginning of a macro
DW ENDM End of a macro
SEGMENT General form:

ENDS
ASSUME macroname MACRO[Arg1, Arg2 ...]

Program
… statements in
ORG … the macro
END …
EVEN
EQU macroname ENDM
PROC
ENDP
FAR User defined name of
NEAR the macro
SHORT
MACRO
ENDM 49

8086 Supports 6 Types of Instructions

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8086 Supports 6 Types of Instructions

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8086 Microprocessor

8086 supports 6 types of instructions:

1. Data Transfer Instructions

4. String manipulation Instructions

5. Process Control Instructions

6. Control Transfer Instructions

1. Data Transfer Instructions

Instructions that are used to transfer data/ address in to

Generally involve two operands: Source operand and

Source: Register or a memory location or an immediate data

The size should be a either a byte or a word.

A 8-bit data can only be moved to 8-bit register/ memory

1. Data Transfer Instructions

Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT …

MOV reg2/ mem, reg1/ mem

MOV reg2, reg1 (reg2)  (reg1)

MOV reg/ mem, data

MOV reg, data (reg)  data

XCHG reg2/ mem, reg1

XCHG reg2, reg1 (reg2)  (reg1)

1. Data Transfer Instructions

Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT …

PUSH reg16/ mem

PUSH reg16 (SP)  (SP) – 2

PUSH mem (SP)  (SP) – 2

POP reg16/ mem

POP reg16 MA S = (SS) x 1610 + SP

POP mem MA S = (SS) x 1610 + SP

1. Data Transfer Instructions

Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT …

IN A, [DX] OUT [DX], A

IN AL, [DX] PORTaddr = (DX) OUT [DX], AL PORTaddr = (DX)

IN AX, [DX] PORTaddr = (DX) OUT [DX], AX PORTaddr = (DX)

IN A, addr8 OUT addr8, A

IN AL, addr8 (AL)  (addr8) OUT addr8, AL (addr8)  (AL)

IN AX, addr8 (AX)  (addr8) OUT addr8, AX (addr8)  (AX)

ADD reg2/ mem, reg1/mem

ADC reg2, reg1 (reg2)  (reg1) + (reg2)

ADD reg/mem, data

ADD reg, data (reg)  (reg)+ data

ADD AL, data8 (AL)  (AL) + data8

ADC reg2/ mem, reg1/mem

ADC reg2, reg1 (reg2)  (reg1) + (reg2)+CF

ADC reg/mem, data

ADC reg, data (reg)  (reg)+ data+CF

ADD AL, data8 (AL)  (AL) + data8+CF

SUB reg2/ mem, reg1/mem

SUB reg2, reg1 (reg2)  (reg1) - (reg2)

SUB reg/mem, data

SUB reg, data (reg)  (reg) - data

SUB AL, data8 (AL)  (AL) - data8

SBB reg2/ mem, reg1/mem

SBB reg2, reg1 (reg2)  (reg1) - (reg2) - CF

SBB reg/mem, data

SBB reg, data (reg)  (reg) – data - CF

SBB AL, data8 (AL)  (AL) - data8 - CF

INC reg/ mem

INC reg8 (reg8)  (reg8) + 1

INC reg16 (reg16)  (reg16) + 1

INC mem (mem)  (mem) + 1

DEC reg/ mem

DEC reg8 (reg8)  (reg8) - 1