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DIgSILENT PowerFactory

Training Material

HVDC and FACTS


Publisher:
DIgSILENT GmbH
Heinrich-Hertz-Straße 9
72810 Gomaringen / Germany
Tel.: +49 (0) 7072-9168-0
Fax: +49 (0) 7072-9168-88

Please visit our homepage at:


http://www.digsilent.de

Copyright DIgSILENT GmbH


All rights reserved. No part of this
publication may be reproduced or
distributed in any form without written
permission of the publisher.

May 2017
r3795
CONTENTS

Contents

1 HVDC-LCC - Fundamentals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

1.1 Presentation: HVDC Classic Theory . . . . . . . . . . . . . . . . . . . . 2

1.2 Exercise: Steady-state model of HVDC-LCC . . . . . . . . . . . . . . . . 23

2 HVDC-LCC - Harmonic Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

2.1 Presentation: HVDC-LCC Harmonics . . . . . . . . . . . . . . . . . . . . 29

2.2 Exercise: Harmonics Mitigation . . . . . . . . . . . . . . . . . . . . . . . 45

3 HVDC-LCC - Dynamic Simulation . . . . . . . . . . . . . . . . . . . . . . . . . . 49

3.1 Presentation: HVDC-LCC Dynamics . . . . . . . . . . . . . . . . . . . . 49

3.2 Presentation: Handling in PowerFactory . . . . . . . . . . . . . . . . . . 63

3.3 Exercise: Analysis using EMT-Simulation . . . . . . . . . . . . . . . . . . 71

4 HVDC-VSC - Steady state analysis . . . . . . . . . . . . . . . . . . . . . . . . . 76

4.1 Presentation: HVDC-VSC Systems . . . . . . . . . . . . . . . . . . . . . 76

4.2 Exercise: Analysis of HVDC-MMC . . . . . . . . . . . . . . . . . . . . . 94

5 HVDC-VSC - Dynamic Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

5.1 Presentation: HVDC-VSC System Dynamics . . . . . . . . . . . . . . . 103

5.2 Exercise: Analysis of Embedded HVDC-MMC . . . . . . . . . . . . . . . 116

5.3 Exercise: Analysis of Offshore HVDC-MMC . . . . . . . . . . . . . . . . 121

6 FACTS – Static Var System (SVS) . . . . . . . . . . . . . . . . . . . . . . . . . . 123

6.1 Presentation: Static Var System (SVS) . . . . . . . . . . . . . . . . . . . 123

6.2 Exercise: SVS Integration and Analysis in Power System . . . . . . . . . 140

6.3 Optional Exercise: DSL Modelling of Thyristor Switched Shunts . . . . . 146

7 FACTS – STATCOM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152

7.1 Presentation: Analysis of STATCOM Systems using PowerFactory . . . 152

7.2 Exercise: Integration of STATCOM in the Power System . . . . . . . . . 158

8 FACTS – Thyristor-Controlled Series Capacitor (TCSC) . . . . . . . . . . . . . . 164

8.1 Presentation: TCSC - Thyristor-Controlled Series Capacitor . . . . . . . 164

8.2 Exercise: Analysis of TCSC operation in EMT simulation . . . . . . . . . 179

8.3 Exercise: Simulation of TCSC protection scheme (EMT simulation) . . . 181

8.4 Exercise: Power oscillation damping (POD) . . . . . . . . . . . . . . . . 182

HVDC and FACTS ii


Introduction

Introduction

The training course gives an overview of High-Voltage Direct Current (HVDC) transmission and
Flexible AC Systems (FACTS). Line-commutated converters (LCCs), modular multi-level con-
verters (MMCs), static VAR compensators (SVCs), STATCOMs and thyristor-controlled series
capacitors (TCSCs) are addressed. Topologies and controls, steady-state, harmonic as well as
dynamic behaviour are explained. The participants will learn how to model these systems in
PowerFactory. Practical use case scenarios are investigated.

This training aims at enabling the participant to understand modern HVDC/FACTS devices,
diligently analyse a power network including HVDC/FACTS and identify benefits as well as
limitations.

1 HVDC and FACTS


1 HVDC-LCC - Fundamentals

Purpose: Comprehension of the HVDC Classic systems.

Content: AC-DC Converter Theory


• DC versus AC Power Transmission
• Power Electronic Valve Circuits

• Line Commutated Converters - Overview


Line Commutated Converters - Steady State Analysis
• Ideal Behaviour of LCC

• Rectifier/Inverter Operation
• Power Flow Equations Including Commutation
• Commutation Reactance for Power Flow Calculations
HVDC Configurations

• Monopole HVDC
• Homopolar HVDC
• Bipolar HVDC
• Multi-terminal HVDC

PowerFactory Built-In Models for HVDC Modelling

Level: Advanced.

1.1 Presentation: HVDC Classic Theory

Notes:
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HVDC and FACTS 2


1.1 Presentation: HVDC Classic Theory

High Voltage DC Transmission (HVDC)


Line-Commutated Converters (LCC)
- Steady State -

DIgSILENT GmbH

Agenda – HVDC-LCC (Steady State)

• HVDC-LCC Applications

• AC vs DC Power Transmission

• Line Commutated Converters – Steady State Behavior


– Overview

– Rectifier/Inverter Operation

– Ideal/Non-Ideal Behaviour (including commutation)

– Power Flow Considerations

• HVDC-LCC Configurations

• PowerFactory Implementation of HVDC-LCC

• Large-Scale Projects Worldwide

HVDC Steady State

3 HVDC and FACTS


1.1 Presentation: HVDC Classic Theory

Terms and Definitions

• HVDC: High Voltage Direct Current


An HVDC link transfers active power with high voltage and direct current.
• HVAC: High Voltage Alternating Current
An HVAC link transfers active and reactive power with high voltage and alternating current
(50 Hz or 60 Hz).
• LCC: Line-Commutated Converter
An LCC is a power electronic converter which switches at power frequency. It typically uses
thyristors and/or diodes (thyristors for HVDC-LCC applications).
Main characteristic: constant current on the DC side.

HVDC Steady State 3

Typical Applications

• Long-Distance Power Transmission


– with Overhead lines

– with Underground/Subsea cables

• Back to Back Power Transmission:


– Systems with different nominal frequencies (50/60 Hz interconnections)

– Systems operating asynchronously (e.g. Nordic and Central Europe)

HVDC Steady State

HVDC and FACTS 4


1.1 Presentation: HVDC Classic Theory

AC vs. DC Transmission

AC Transmission DC Transmission
• Easy, robust and reliable • More complex, power electronics,
including controls are required
• Rather cheap • Expensive technology
• Only applicable to systems with • Can connect systems of different
the same nominal frequency nominal frequency/asynchronous
systems
• Cable capacitance limits the • No limitation by cable capacitance
distance of submarine cables (or
increases the cost because of
additional compensation)
• Contribution to short-circuit • No contribution to short-circuit
currents current in interconnected systems
• Dynamic/Transient stability limits • No dynamic or transient stability
limits

HVDC Steady State

AC vs. DC Transmission

HVDC Advantages
• Possibility to connect two networks with different frequency or
different power-frequency control strategies.

• Transmitted power can be controlled and can be held constant


independent of network situation within power range.

• Control is flexible and different control strategies can be used.

• The control is fast acting, so the transmitted power can be changed


rapidly.

• HVDC systems can also be used in parallel to AC lines for


stabilizing the network.

HVDC Steady State

5 HVDC and FACTS


1.1 Presentation: HVDC Classic Theory

AC vs. DC Transmission

AC vs. DC Transmission
• Break-even-distance with
overhead lines at about 600-
800km

• Break-even-distance is much
smaller for submarine cables
(e.g. 50 km)

• Distance depends on several


factors (both for lines and cables)
and a cost analysis is required.

DC transmission can only be justified, if AC-transmission is impossible


or extremely expensive because of additional compensation

HVDC Steady State

Valves/Semiconductor Devices

Classification of valves into three groups according to their controllability:

Diode Thyristor GTO IGBT

No-Control Turn-On Turn-On & Turn-Off

GTO IGBT

HVDC Steady State

HVDC and FACTS 6


1.1 Presentation: HVDC Classic Theory

HVDC Valve Halls

Chandrapur - Padghe
HVDC Transmission
1500MW, ±500kV
800km

New Zealand
Inter-Island HVDC Link
1240MW, ±300kV
600km

HVDC Steady State

Line-Commutated Converter

Fundamentals

HVDC Steady State

7 HVDC and FACTS


1.1 Presentation: HVDC Classic Theory

Line-Commutated Converter for HVDC

• Based on a three phase thyristor bridge (i.e. „6 pulse bridge“)


– AC side transformer
– DC side reactor
– Six power thyristors

• AC transformer may contain taps on HV side

HVDC Steady State

Line-Commutated Converter

• For thyristors, switch-on capability only (via a gate current trigger pulse)

• Firing of each thyristor:


– can be applied upon forward biasing
– occurs in a predefined sequence (1 → 2 → 3 → . .)
– can be delayed by a predefined amount of time 1 3 5

4 6 2

HVDC Steady State

HVDC and FACTS 8


1.1 Presentation: HVDC Classic Theory

DC-Voltage Wave-Forms for six pulse rectifier

• Example for:
– Ideal operation of 6 pulse rectifier bridge on a 50 Hz supply network
– Firing of thyristors is possible immediately upon forward biasing

DIgSILENT
400.00

200.00

6 DC voltage pulses
over a fundamental period
0.00

-200.00

-400.00
0.00 0.00 0.01 0.01 0.02 [s] 0.02
Term_R: Voltage Phasor, Magnitude in kV
Rectifier: Line-Line Phase Voltage A/Terminal AC in kV
Rectifier: Line-Line Phase Voltage B/Terminal AC in kV
Rectifier: Line-Line Phase Voltage C/Terminal AC in kV

Three-Phase Thyristor Rectifier Subplot/Diagramm(1) Date: 2/24/2006


DIgSILENT alpha = 0°, overlap angle u = 0° Annex: 1 /6

HVDC Steady State

Rectifier/Inverter operation

• Thyristors are mono-directional, i.e. single direction of


DC current
• Power flow reversal done by DC voltage polarity inversion:
𝑷𝑫𝑪 = 𝑰𝑫𝑪 ∙ 𝑽𝑫𝑪

+ −

+𝑽𝑫𝑪 → −𝑽𝑫𝑪
rectifier mode inverter mode

− +
HVDC Steady State

9 HVDC and FACTS


1.1 Presentation: HVDC Classic Theory

Rectifier/Inverter operation

• Firing angle 𝜶 ≝ angle separation in radians between the moment of


forward biasing and the gate triggering of a thyristor

𝛼 – used extensively in rectifier operation & control

• Extinction angle 𝜸 ≝ 𝜋 − 𝛼 , if commutation is ideal

𝛾 – used extensively in inverter operation & control

• Rectifier mode: π
– Firing angle α between 0 and
2
• Inverter mode: π
– Firing angle α between and π
2

HVDC Steady State

DC-Voltage Wave-Forms*

𝝅
𝟎 𝟐 𝝅
DIgSILENT

400.00

𝜶
200.00

0.00
Rectifier Inverter
mode mode

-200.00

-400.00
𝜶 𝜸
0.00 0.00 0.01 0.01 0.02 [s] 0.02
Term_R: Voltage Phasor, Magnitude in kV
Rectifier: Line-Line Phase Voltage A/Terminal AC in kV
Rectifier: Line-Line Phase Voltage B/Terminal AC in kV
Rectifier: Line-Line Phase Voltage C/Terminal AC in kV
Term_I: Voltage Phasor, Magnitude in p.u.
Term_R: Voltage Phasor, Magnitude in kV

Three-Phase Thyristor Rectifier Subplot/Diagramm(3)


Date: 2/24/2006
DIgSILENT alpha = 40°, overlap angle u = 0°
*commutation
Annex: 1 /5 is ideal
HVDC Steady State

HVDC and FACTS 10


1.1 Presentation: HVDC Classic Theory

DC-Voltage of Six Pulse Bridge*

Diode Rectifier:

 
6 6
3 3 3 3 2
Vd 0 
  ull ( )d 

 
 uˆ ll
cos( )d 

uˆ ll 

U ll
6 6

Thyristor Rectifier:
   
3 6
3 6
3      
Vd ( ) 
 
u ll ( )d 
 
 uˆ ll cos( )d  uˆll  sin      sin       
  6   6 
   
6 6

3  
uˆll 2 sin   cos   Vd 0 cos 
 3

*commutation is ideal
HVDC Steady State

DC-Voltage of n-pulse Bridge*

n-pulse Bridge:

s0  q   2 Ideal no-load dc voltage


Vd 0  sin     U ll
 q 3 s0 = sum of valves in series
q = number of branches in parallel

12-pulse Thyristor Rectifier:


43   2
Vd  Vd 0 cos( )  sin     U ll  cos( )
 3 3
23 2
  U ll  cos( )

*commutation is ideal
HVDC Steady State

11 HVDC and FACTS


1.1 Presentation: HVDC Classic Theory

AC-Current Wave-Forms*

DIgSILENT
3.00

2.00

 
1.00  ID
3 3
0.00

-1.00

-2.00

-3.00
0.00 0.00 0.01 0.01 0.02 [s] 0.02
Inverter: Phase Current A/Terminal AC in kA
Inverter: Phase Current B/Terminal AC in kA
Inverter: Phase Current C/Terminal AC in kA

Three-Phase Thyristor Rectifier Subplot/Diagramm Date: 2/24/2006


DIgSILENT alpha = 40°, overlap angle u = 0° Annex: 1 /7

*commutation is ideal
HVDC Steady State

AC Current/Power of 6 pulse bridge*

• RMS-value of fundamental frequency component:


2 3
2       2 3
I AC 
2 
I D
cosd  I D  sin   sin    
  3  3  2
ID
3

• Power balance AC/DC neglecting losses:

PAC  3U ll I AC cos  PDC  VD I D

• Power Factor (or “displacement factor”, or “vector power factor”):


6 3 2
PAC  U ll I D cos   U ll I D cos 
2 

cos  cos
*commutation is ideal
HVDC Steady State

HVDC and FACTS 12


1.1 Presentation: HVDC Classic Theory

Reactive Power Consumption*

• Active power decreases with increased firing angle


• Reactive power increases with increased firing angle

T1 T3 T5

Phase C

Phase B
𝑡[𝑠] Phase A
T4 T6 T2

𝛼[deg]

*commutation is ideal
HVDC Steady State

Thyristor Commutation of Six Pulse Bridge

• Property of LCC: constant DC current


• Commutation of DC current from T1 to T3 path is not ideal
• AC side impedance influences the commutation period

𝒊𝑻𝟏

𝒊𝑻𝟑
𝜶 𝝁
commutation
period

HVDC Steady State

13 HVDC and FACTS


1.1 Presentation: HVDC Classic Theory

Thyristor Commutation of Six Pulse Bridge

• Analysis of commutation T1->T3:

• AC L-N voltages can be defined for convenience as:


2
𝑢𝐿1 = 𝑈𝑙𝑙 cos 𝜔𝑡 + 600
3
2
𝑢𝐿2 = 𝑈𝑙𝑙 cos 𝜔𝑡 − 600 𝑢𝐿2 − 𝑢𝐿1 = 2𝑈𝑙𝑙 sin(𝜔𝑡)
3
2
𝑢𝐿3 = 𝑈𝑙𝑙 cos 𝜔𝑡 − 1800
3
HVDC Steady State

Thyristor Commutation of Six Pulse Bridge

• Kirchoff‘s law on loop of phases 1 and 2:


uL1(t)
i1(t)

Id di1 di
N DC u L 2  u L1  L L 2 0
dt dt
i2(t)
vL2 (t)

• Kirchoff‘s law in node DC: 𝑖1 + 𝑖2 = 𝐼𝑑

• Combining both and assume 𝐼𝑑 = 𝑐𝑜𝑛𝑠𝑡𝑎𝑛𝑡:


𝑑 𝑑𝑖2
𝑢𝐿2 − 𝑢𝐿1 = −L 𝐼𝑑 − 𝑖2 − 𝐿
𝑑𝑡 𝑑𝑡
𝑑𝑖2
𝑢𝐿2 − 𝑢𝐿1 = 2L
𝑑𝑡
HVDC Steady State

HVDC and FACTS 14


1.1 Presentation: HVDC Classic Theory

Thyristor Commutation of Six Pulse Bridge

• Line-Line voltage in time domain:


𝑑𝑖2
𝑢𝐿2 − 𝑢𝐿1 = 2𝑈𝑙𝑙 sin 𝜔𝑡 = 2𝐿
𝑑𝑡
• Separating independent variables 𝑡 and 𝑖2 and integrating over ON period:

𝑡 𝑖2
2𝑈𝑙𝑙 sin 𝜔𝑡 𝑑𝑡 = 2𝐿 𝑑𝑖2 →
𝛼/𝜔 0

𝑡
2𝑈𝑙𝑙
𝑖2 𝑡 = sin 𝜔𝑡 𝑑𝑡 →
𝛼/𝜔 2𝐿

2𝑈𝑙𝑙
𝑖2 𝑡 = (𝑐𝑜𝑠 𝛼) − cos(𝜔𝑡)
2𝜔𝐿

HVDC Steady State

Thyristor Commutation of Six Pulse Bridge

• DC Current equals 𝑖2 at end of commutation, i.e.:

– 𝜔𝑡 = 𝛼 + 𝜇 𝒇 𝛼 + 𝜇 = 𝐼𝑑
– 𝑖2 = 𝐼𝑑
– 𝑖1 = 0 𝒊𝟏
𝑰𝒅
𝒊𝟐
𝜶 𝝁 𝒇 𝒙 = 𝑐1 ( cos(𝑥 − 𝑐2 ) + cos(𝑥))

• DC current 𝐼𝑑 :

2𝑈𝑙𝑙
𝐼𝑑 = (𝑐𝑜𝑠 𝛼) − cos(𝜇 + 𝛼)
2𝜔𝐿

μ ≝ overlap angle

HVDC Steady State

15 HVDC and FACTS


1.1 Presentation: HVDC Classic Theory

DC-Voltage with Overlap

DIgSILENT
400.00

 
200.00

0.00

-200.00

 

-400.00
0.00 0.00 0.01 0.01 0.02 [s] 0.02
Term_R: Voltage Phasor, Magnitude in kV
Rectifier: Line-Line Phase Voltage A/Terminal AC in kV
Rectifier: Line-Line Phase Voltage B/Terminal AC in kV
Rectifier: Line-Line Phase Voltage C/Terminal AC in kV
Term_I: Voltage Phasor, Magnitude in p.u.

Three-Phase Thyristor Rectifier Subplot/Diagramm(3) Date: 2/24/2006


DIgSILENT alpha = 40°, overlap angle u = 10° Annex: 1 /5

HVDC Steady State

Commutation Reactance for steady state analysis

• Commutation reactance 𝑿𝒄 used for linking AC & DC sides in calculation

External
Grid
𝑈𝑟,𝑝𝑟𝑖 𝑈𝑟,𝑠𝑒𝑐

3
𝑍𝑐 = 𝑋
𝜋 𝑐

• Converter transformer reactance 𝑿𝒓,𝒔𝒆𝒄 usually has biggest contribution to


total reactance 𝑿𝒄
2
𝑢𝑘𝑟 𝑈𝑟,𝑠𝑒𝑐 Note: 𝑈𝑟,𝑠𝑒𝑐 - Rated transformer
Xc ≈ Xr,sec =
100 𝑆𝑟 voltage at secondary side
HVDC Steady State

HVDC and FACTS 16


1.1 Presentation: HVDC Classic Theory

DC-Voltage with Overlap (Rectifier)

Vdr  Vd 0 cos  Vd  Vd 0 (cos  d xr )


3
Vd  LI d  Z c I d

cos   cos    
Rectifier operation: Vdr  Vd 0
2

HVDC Steady State

DC-Voltage with Overlap (Inverter)

• Extinction angle: 𝛾 ≝ 𝜋 − 𝛼 − 𝜇, when commutation is non-ideal

Vdi  Vd 0 cos   Vd  Vd 0 (cos   d xr )


3
Vd  X c Id  Zc Id

Inverter operation: cos   cos    


Vd  Vd 0
2

HVDC Steady State

17 HVDC and FACTS


1.1 Presentation: HVDC Classic Theory

AC-Current with Overlap

DIgSILENT
3.00

2.00

1.00

0.00

-1.00

-2.00

-3.00
0.00 0.00 0.01 0.01 0.02 [s] 0.02
Inverter: Phase Current A/Terminal AC in kA
Inverter: Phase Current B/Terminal AC in kA
Inverter: Phase Current C/Terminal AC in kA

Three-Phase Thyristor Rectifier Subplot/Diagramm Date: 2/24/2006


DIgSILENT alpha = 40°, overlap angle u = 10° Annex: 1 /7

HVDC Steady State

AC Current with Overlap

• Active Power (neglecting losses):


𝑷𝑨𝑪 = 𝑷𝑫𝑪
cos  cos   
3U ll I AC cos  Vd 0 I d
2
6
• Approximation of AC/DC current (for 𝜇 = 0): 𝐼𝐴𝐶 ≈ 𝐼𝐴𝐶0 = ∙𝐼
– for 𝜇 = 60° the error is ε𝐼𝐴𝐶 = 4.3% 𝜋 𝑑
– for 𝜇 < 30° (typical) the error is ε𝐼𝐴𝐶 < 1.1%

cos  cos   
• Approximation of power factor: cos 
2

• In PowerFactory (for load flow calculation):


AC-current 𝐼𝐴𝐶 calculated based on Fourier analysis

HVDC Steady State

HVDC and FACTS 18


1.1 Presentation: HVDC Classic Theory

HVDC-LCC Configurations

HVDC Steady State

12-Pulse Configurations

• Monopolar - Short-distance connection


- Sea cable connection

• Homopolar - Short-distance connection


- Sea cable connection

- Long-distance transmission
• Bipolar () - Sea cable connection
- Single point grounding

- Long-distance transmission
• MTDC (Multi- with several connections
Terminal HVDC) () () ()
- Single point grounding

HVDC Steady State

19 HVDC and FACTS


1.1 Presentation: HVDC Classic Theory

Detailed 12-Pulse Bipolar HVDC System

HVDC Steady State

12-Pulse Bipolar System


in Power Factory
DIgSILENT
V

V
~

HVDC Steady State

HVDC and FACTS 20


1.1 Presentation: HVDC Classic Theory

HVDC-LCC Layout

HVDC Steady State

HVDC-LCC Components

Converter bridges

Converter Transformers: three- or single-phase transformer


two- or three-winding transformer
not grounded at valve side

Smoothing reactors: large inductance (<1H)


reduces harmonics in DC current and voltage
prevent commutation failures and discont. currents
limits extensive currents at DC short-circuit

Harmonic filters: reduce harmonics at AC and DC side


provide reactive power for converter operation

Electrodes: use earth or metallic return conductor as neutral

DC Line

HVDC Steady State

21 HVDC and FACTS


1.1 Presentation: HVDC Classic Theory

HVDC Converter Transformer Ratings

2
Rated Current: I rT  Id
3


Rated sec. Voltage: U r ,sec  Vd 0
3 2


Rated MVA: S rT  3U r ,sec  I rT  Vd 0  I d
3

HVDC Steady State

Large Scale HVDC-LCC Projects – Summary

• 1951 Moscow–Kashira HVDC – 30 MW, 100 kV DC, 100 km overhead line


(Former Elbe Project in Berlin)
• 1955 Gotland I link - 20 MW, 100 kV DC, 98 km submarine cable was completed
• Presently > 150 HVDC links in operation worldwide
– Approx. 80% are HVDC-LCC
• Longest transmission link (HVDC-LCC)
– Overhead line, 2375 km - Rio Madeira, Brasil (+/- 600kV, 3150MW)
– Submarine cable, 580 km – NorNed, Norway-Netherlands (+/-450kV,700MW)
– Underground cable, 180 km – Murray Link, Australia (+/-150kV,220MW)
• Largest capacity (HVDC-LCC)
– Onshore – 7.2 GW, 800kV – Jinping-Sunan, China
– Offshore – HVDC-LCC is not used for this purpose
• Highest voltage (HVDC-LCC)
– +/- 800 kV (many such installations)
• In planning/construction: +/- 1100kV, 3000 km, 12 GW
Changji-Guquan, China

HVDC Steady State

HVDC and FACTS 22


23
1.2

1.2

DIgSILENT
NA NB NF

Line NA-NB Line NB-NF


100,0 km 50,0 km

in Figure 1.1.
0 0 0

Trf GNA
Trf GNB

50,0 km
Trf_GNF

Step-up ..
Step-up ..

Line NB-NC
50,0 km
50,0 km

Line NB-ND 1
Line NB-ND 2
Step-up Trf Type 400/17kV
Inactive
Terminal GNA Out of Calculation Terminal GNB Terminal GNF
NC

100,0 km
100,0 km
De-energised

Line NF-NG 1
Line NF-NG 2

400,0 km
400,0 km
ND

Line NA-NH 1
Line NA-NH 2
Zones

SG Sub-group North
~ Sub-group South 0 0
GNA SG SG
SG Typ.. Elements belonging to more than 2 Zones ~ ~

20,0 km
20,0 km
GNB GNF

Line ND-NE 1
Line ND-NE 2
Reactor NC Cap NC SG Typ.. SG Type 2 (353 MVA)
Line NC-NE Load ND
100,0 km
NE NG
NH

Trf GNE
Step-up ..
0 0
Load NE Load NG

Load NH
Reactor NH Cap NH Terminal GNE

500,0 km
Line NG-SH

600,0 km
600,0 km
SG

Line NH-SA 1
Line NH-SA 2
~
GNE
SG Ty..

800,0 km
Line NC-SC
1000,0 km
SH

Line NE-SC 1
Exercise: Steady-state model of HVDC-LCC

800,0 km
Line NF-SJ

SA

5,0 km
Line SH-SI

30,0 km
Line SA-SB
Load SA SI

HVDC
SB
SC
Exercise: Steady-state model of HVDC-LCC

Load SI

Line SC-SF Line SF-SI


20,0 km 35,0 km
0
SJ

Trf GSB
Step-up ..
Load SB

20,0 km
20,0 km
Load SC

Line SC-SD 1
Line SC-SD 2
SF
Terminal GSB 0
Trf GSJ

SD Load SJ

Line SF-SG 0
20,0 km
Step-up Trf Type 400/17kV

Trf GSF
Step-up..

Terminal GSJ
SG
~

20,0 km
Line SD-SG
GSB
SG Typ.. Terminal GSF
Load SD

SG
SG

Figure 1.1: Single-line diagram of the 400 kV transmission network


~
Line SA-SG 1 SG GSJ
100,0 km ~ SG Type 2 (353 MVA)
GSF Line SG-SJ
3 SG Typ.. 300,0 km
Line SA-SG 2 SVS
100,0 km
SVC Load SG HVDC_01_LCCStart Project: Example
Capacitor SG DIgSILENT
Grid: AC Transmission System .. 2020 Study Case with new HVDC Link Graphic: AC Transmission
GmbH
Date: 11/3/2016
PowerFactory 2016 SP4 Network inspired by Cigré TB 536 Annex:

HVDC and FACTS


a complex model. The system under study is a generic 400 kV transmission network as shown
contain a set of network elements (and their dynamic controllers) that allow easy deployment of
based on an already defined general template directly available in the project library. Templates
This exercise will enable you to quickly deploy a HVDC-LCC model in a PowerFactory project
1.2 Exercise: Steady-state model of HVDC-LCC

The following preparatory steps are required:

• Import into PowerFactory the project file “HVDC 01 LCCStart”

Note: Importing: Main menu File → Import→ Data (*.dz; *.pfd)... and select the file on
disk that you want to import. If required, press the black arrow button to select another
path to which you want to import the objects in the file. Make sure that you do not
have already an active project before importing one.

• Activate the imported project and the study case “2016 BaseCase”. Hence, the current
state of the network corresponds to year 2016. By this time, there are no HVDC installa-
tions.

• Perform a load flow calculation and generate a summary report. Analyse the generation,
consumption and losses. Observe the power transfer between the two pre-defined zones.

A further network expansion is planned in 2020 comprising of the integration of a HVDC con-
nection as shown in Figure 1.2.

Line ND-NE 1

Line ND-NE 2
GNB
Reactor NC Cap NC SG Typ..
Line NC-NE Load ND
100,0 km
NE NG

Step-up ..
Trf GNE
0

Load NE Load NG

Terminal GNE

Line NG-SH
500,0 km
Inactive SG
Out of Calculation ~
De-energised GNE
SG Ty..
Line NC-SC
800,0 km

Zones
Line NE-SC 1
1000,0 km

Sub-group North
Sub-group South
Elements belonging to more than 2 Zones SH
Line SH-SI
5,0 km

SI

HVDC

SC
Load SI

Line SC-SF Line SF-SI


20,0 km 35,0 km
Line SC-SD 1

Line SC-SD 2
20,0 km

20,0 km

Load SC

SF

SD
HVDC_01_LCCSteadyState

Figure 1.2: Network expansion with a new HVDC-LCC system

To add the HVDC connection proceed as follows:

• Activate the study case “2020 Study Case with new HVDC Link”.
• Activate the network variation “New HVDC-LCC Link” and make sure that the contained
expansion stage is set to recording. This network variation is currently empty and is
intended to store all topological changes that follow when deploying the HVDC system.

HVDC and FACTS 24


1.2 Exercise: Steady-state model of HVDC-LCC

• Use the template “HVDC LCC 750MW” to add the HVDC system to the grid. Place it
within the green marked rectangle across buses NE and SC (e.g. one can first deploy it,
then rotate clockwise the graphic and then connect to the buses). Make sure the HVDC
system is connected on both sides to the corresponding terminals

Note: Adding a template: click the “General templates” button ( ) from the drawing
toolbar. Select the right item from the selection window which appeares. Click once
in the single line diagram to show the network elements of the template. Lastly, after
you have decided where to deploy the template, click once more and add the model
to the network.

• Combine into a branch all network elements belonging to the HVDC system. The HVDC
system is thus simplified graphically in the main single line diagram to a single branch
representation.

Note: Group to branch: select all wished elements, right click on the selection and choose
Group as new symbol → and convert to branch element.

• To see the branch’s detailed representation right click the branch and choose “Show
Graphic”.

• Verify through a load flow calculation ( ) the consistency of the input data. Make sure to
fix any error or warning message in the output window before proceeding.

The “HVDC LCC 750MW” template has the single line diagram as shown in Figure 1.3.

Figure 1.3: “HVDC LCC 750MW” template - single line diagram

The trainer will explain all relevant parts of the model as well as the load flow relevant control
parameters.

Note: The individual components of an LCC-HVDC system can be studied in detail in the
optional exercises given in sections below.

25 HVDC and FACTS


1.2 Exercise: Steady-state model of HVDC-LCC

1.2.1 Load Flow Analysis

Basics of rectifier behaviour

• Open the detailed HVDC branch diagram


• Create an additional result box and monitor: firing angle and overlap angle

• Open the Load Flow calculation command and make sure that the “Consider Reactive
Power Limits” and “Automatic Shunt adjustment” options are activated
• Perform a load flow and manually verify the AC voltage at the rectifier “Conv1a” busbar
based on the DC current equation function of the commutation reactance as provided in
the presentation

Calculus:

• Account for the transformer tap ratio and nominal transformer ratio parameters of the
rectifier type
• 𝑈 𝑎𝑐 𝑚𝑒𝑎𝑠𝑢𝑟𝑒𝑑 = kV
• 𝑈 𝑎𝑐 𝑐𝑎𝑙𝑐𝑢𝑙𝑎𝑡𝑒𝑑 = kV

• Deactivate the “Automatic firing angle control” of rectifier “Conv1a”


• Set the firing angle to minimum and maximum values and observe the power transfer on
AC side in each case
• 𝑃 𝑎𝑙𝑝ℎ𝑎𝑚𝑖𝑛 = MW
• 𝑄 𝑎𝑙𝑝ℎ𝑎𝑚𝑖𝑛 = MW
• 𝑃 𝑎𝑙𝑝ℎ𝑎𝑚𝑎𝑥 = MW
• 𝑄 𝑎𝑙𝑝ℎ𝑎𝑚𝑎𝑥 = MW

• What is the smallest firing angle starting from which power throughput is zero?
• 𝑎𝑙𝑝ℎ𝑎0= °

Rectifier Control:

• Activate the “Automatic firing angle control” of rectifier “Conv1a” and set the control strat-
egy to “P” (active power)
• What is the control strategy of the other rectifier i.e. “Conv1b” and what is the expected
combined behaviour?

• “Conv1b” load flow controller:


• “Conv1a” and “Conv1b” load flow behaviour:

HVDC and FACTS 26


1.2 Exercise: Steady-state model of HVDC-LCC

• Verify by means of applying various power setpoints that the two rectifiers behave as
expected:
𝑃 𝑠𝑒𝑡𝑝𝑜𝑖𝑛𝑡1 = MW; 𝑃 𝐶𝑜𝑛𝑣1𝑎 = MW; 𝑃 𝐶𝑜𝑛𝑣1𝑏 = MW
𝑃 𝑠𝑒𝑡𝑝𝑜𝑖𝑛𝑡2 = MW; 𝑃 𝐶𝑜𝑛𝑣1𝑎 = MW; 𝑃 𝐶𝑜𝑛𝑣1𝑏 = MW
• What is the ratio between reactive and active power for each of the setpoints?
𝑄𝑠𝑡𝑝1
𝑃𝑠𝑡𝑝1 =
𝑄𝑠𝑡𝑝2
𝑃𝑠𝑡𝑝2 =

Inverter Control Basics:

• Set the rectifier “Conv1a” to control active power with setpoint 375 MW (nominal per
rectifier)
• Make sure that the control mode of inverter “Conv2a” “Automatic firing angle control” is
deactivated (manual input of firing angle).
• Make sure that the control mode of inverter “Conv2b” is set to “EXT” and referring to
“Conv2a”
• Calculate the load flow.
• Create a new additional result box for “Conv2a” and monitor: firing angle, extinction angle
and overlap angle
• Identify (by increasing iteratively the firing angle from its minimum) several points of inter-
est:
• (1)Starting point where the inverter is forward biased (and load flow converges to a rea-
sonable active power output).
𝑎𝑙𝑝ℎ𝑎 𝑚𝑖𝑛 : °; 𝑔𝑎𝑚𝑚𝑎 𝑚𝑖𝑛 : °.
𝑄
• Note also the reactive/active power output ratio for this point: 𝑃 =
• (2)Point where the inverter delivers rated power output
𝑎𝑙𝑝ℎ𝑎 𝑟 : ° 𝑔𝑎𝑚𝑚𝑎 𝑟 : °.
𝑄
• Note also the reactive/active power output ratio for this point: 𝑃 =
• (3)Starting point where the inverter begins to fail (commutation failure)
𝑎𝑙𝑝ℎ𝑎 𝑚𝑎𝑥 : °; 𝑔𝑎𝑚𝑚𝑎 𝑚𝑎𝑥 : °

Inverter DC Voltage Control:

• Make sure that the control mode of inverter “Conv2a” is set to “Vdc”.
• Make sure that the DC voltage reference is -0.99 pu.
• Make sure that the rectifiers deliver rated power output by adjusting the reference
• Run a load flow and verify that DC voltage is controlled at the inverter side.

Optimize inverter reactive power consumption with transformer tap changer

• Set the control mode for the transformer tap changer of “Conv2a” and “Conv2b” to “gamma-
control” with a set point of 10°.

27 HVDC and FACTS


1.2 Exercise: Steady-state model of HVDC-LCC

𝑄
• Rerun the load flow and compute reactive/active power output ratio for this point: 𝑃 =

• Show the current tap position (min, max and actual) in an additional result box: variables
𝑡𝑎𝑝 (signal) 𝑡𝑎𝑝𝑚𝑖𝑛 and 𝑡𝑎𝑝𝑚𝑎𝑥 (calculation parameters)
• What is the advantage of reducing the extinction angle gamma with the tap?

Add capacitors for reactive power compensation

• For each side of the HVDC system identify the maximum reactive power consumption from
the unit as depending on the power output variation (typically the rated power scenario will
require the highest amount of reactive power):
𝑄𝑚𝑎𝑥𝑟𝑒𝑐𝑡𝑖𝑓 𝑖𝑒𝑟 : MVAr
𝑄𝑚𝑎𝑥𝑖𝑛𝑣𝑒𝑟𝑡𝑒𝑟 : MVAr

• Add shunt capacitors at the AC output of each side to compensate for the reactive power.

PowerFactory files

File Name Description


HVDC 01 LCCStart Starting project of exercise 1.2 Exercise:
Steady-state model of HVDC-LCC
HVDC 01 LCCSteadyState Solution of exercise 1.2 Exercise: Steady-
state model of HVDC-LCC

Notes:
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HVDC and FACTS 28


2 HVDC-LCC - Harmonic Analysis

Purpose: Comprehension of the HVDC Classic systems with focus on Harmonics


Analysis and Filter Design

Content: Harmonics and Filter Design


• AC-harmonics with ideal commutation

• Influence of overlap angle to harmonic currents


• DC-Harmonics
• Filter Design

Level: Advanced.

2.1 Presentation: HVDC-LCC Harmonics

Notes:
...............................................................................................

...............................................................................................

...............................................................................................

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29 HVDC and FACTS


2.1 Presentation: HVDC-LCC Harmonics

Harmonics of HVDC-LCC

DIgSILENT GmbH

Harmonics – General Information

• Harmonics are voltages or currents with a frequency fh which is a


multiple of the fundamental frequency f 1

𝐼ℎ 𝑡 = 𝐼ℎ ∙ 𝑒 𝑗(𝜔ℎ 𝑡+𝜑ℎ ) = 𝐼ℎ ∙ 𝑒 𝑗(ℎ(𝜔1 𝑡+𝜑1 )+Δ𝜑ℎ )


absolute phase angle of the harmonic phase angle of the harmonic related to
the phase angle of the fundamental
• With 𝜔ℎ = 2𝜋 ∙ fℎ = 2𝜋 ∙ ℎ ∙ 𝑓1 = ℎ ∙ 𝜔1
Δ𝜑ℎ = 𝜑ℎ − ℎ ∙ 𝜑1

• Integer orders (h = 2, 3, 4, …) are called Harmonics


• Non-integer orders are called Inter-harmonics
(for example f = 75 Hz in a system with a fundamental frequency of 50
Hz)

Harmonics of HVDC with LCC

HVDC and FACTS 30


2.1 Presentation: HVDC-LCC Harmonics

Harmonics of 6-Pulse Thyristor Rectifier/Inverter

Idc 2 3 cosht   
ia (h, t )   I dc
 h
  2  
Vdc Vac cos h t    
2 3   3 
ib (h, t )   I dc
 h
  4  
cos h t    
2 3   3 
Idc ic (h, t )   I dc
 h

+ sign: 1,7,13,19,...
Vdc Vac
- sign: 5,11,17,...

Harmonic Analysis in PowerFactory

Harmonics of 6-Pulse Thyristor Rectifier/Inverter

5th Order Harmonic

2 3 cos5t   
ia (5, t )   I dc
 5
 10   4 
cos 5t      cos 5t     
ib (5, t )  
2 3
I dc  3   2 3
I dc  3 
 5  5
 20   2 
cos 5t      cos 5t     
ic (5, t )  
2 3
I dc  3   2 3
I dc  3 
 5  5

5th order harmonic appears as negative sequence component

Harmonics of HVDC with LCC

31 HVDC and FACTS


2.1 Presentation: HVDC-LCC Harmonics

Harmonics of 6-Pulse Thyristor Rectifier/Inverter

7th Order Harmonic

2 3cos7t   
ia (7, t )   I dc
 7
 14   2 
cos 7t      cos 7t     
ib (7, t )  
2 3
I dc  3 

2 3
I dc  3 
 7  7
 28   4 
cos 7t      cos 7t     
ic (7, t )  
2 3
I dc  3 

2 3
I dc  3 
 7  7

7th order harmonic appears as positive sequence component

Harmonics of HVDC with LCC

Harmonics of 6-Pulse Thyristor Rectifier/Inverter

AC current harmonics
6,0

[A]

4,8

3,6

2,4

1,2

-0,0
5,00 11,0 17,0 23,0 29,0 35,0 41,0 47,0
6pulseBridge: Positive Sequence Current
6pulseBridge: Negative Sequence Current

Harmonics of HVDC with LCC

HVDC and FACTS 32


2.1 Presentation: HVDC-LCC Harmonics

Influence of non-ideal commutation


6-Pulse Converter

Reduction Factor:

I ( n,  ) A 2  B 2  2 AB cos 2   
Kn  
I ( n,   0) cos   cos    

sin  n  1  
A  2
n 1
sin  n  1  
B  2
n 1

n Order of harmonic
 Overlap Angle
 Commutation Angle

Overlapping leads to damping of harmonic currents

Harmonics of HVDC with LCC

Damping of harmonics by commutation overlap


6-Pulse Converter

Harmonics of HVDC with LCC

33 HVDC and FACTS


2.1 Presentation: HVDC-LCC Harmonics

DC-Voltage Harmonics – Six-Pulse Thyristor Rectifier/Inverter

DC Voltage Wave-Forms

DIgSILENT
400.00

𝜶 = 𝟎, 𝝁 = 𝟎

200.00

DIgSILENT
400.00

𝜶 ≠ 𝟎, 𝝁 = 𝟎
0.00

200.00

-200.00
400.00
0.00

𝜶 ≠ 𝟎, 𝝁 ≠ 𝟎
 
-400.00 200.00
0.00 0.00 -200.00 0.01 0.01 0.02 [s] 0.02
Term_R: Voltage Phasor, Magnitude in kV
Rectifier: Line-Line Phase Voltage A/Terminal AC in kV
Rectifier: Line-Line Phase Voltage B/Terminal AC in kV
Rectifier: Line-Line Phase Voltage C/Terminal AC in kV

Three-Phase Thyristor Rectifier Subplot/Diagramm(1) Date: 2/24/2006


DIgSILENT alpha = 0°, overlap angle u = 0°
-400.00 0.00 Annex: 1 /6
0.00 0.00 0.01 0.01 0.02 [s] 0.02
Term_R: Voltage Phasor, Magnitude in kV
Harmonics of HVDC with LCC Rectifier: Line-Line Phase Voltage A/Terminal AC in kV
Rectifier: Line-Line Phase Voltage B/Terminal AC in kV
Rectifier: Line-Line Phase Voltage C/Terminal AC in kV
Term_I: Voltage Phasor, Magnitude in p.u.
Term_R: Voltage Phasor, Magnitude in kV
-200.00
Three-Phase Thyristor Rectifier Subplot/Diagramm(3) Date: 2/24/2006
DIgSILENT alpha = 40°, overlap angle u = 0° Annex: 1 /5

-400.00
0.00 0.00 0.01 0.01 0.02 [s] 0.0
Term_R: Voltage Phasor, Magnitude in kV
Rectifier: Line-Line Phase Voltage A/Terminal AC in kV
Rectifier: Line-Line Phase Voltage B/Terminal AC in kV
Rectifier: Line-Line Phase Voltage C/Terminal AC in kV
Term_I: Voltage Phasor, Magnitude in p.u.

Three-Phase Thyristor Rectifier Subplot/Diagramm(3) Date: 2/24/2006


DIgSILENT alpha = 40°, overlap angle u = 10° Annex: 1 /5

DC-Voltage Harmonics – Six-Pulse Thyristor Rectifier/Inverter

• Value of 𝑛-th DC voltage harmonic 𝑉𝑑 𝑛 :

C 2  D 2  2CD cos 2   


Vd ( n ) 1

Vd 0 2
cos n  1  
C  2
n 1
cos n  1  

D  2
n 1

Harmonics of HVDC with LCC

HVDC and FACTS 34


2.1 Presentation: HVDC-LCC Harmonics

Harmonics of 12-Pulse Thyristor Rectifier/Inverter

isY ipY
IDC,Y

VAC,Y

VDC,Y ires = ipY + ipD


e.g. Yy0

IDC,D

e.g. Yd1

VDC,D
isD ipD

Harmonics of HVDC with LCC

Harmonics of 12-Pulse Thyristor Rectifier/Inverter

Yy0-Transformer

Voltages: 𝑢𝑠𝑦 (𝑡) = 𝑢𝑝𝑦 (𝑡) = 𝑢 ∙ 𝑒 𝑗𝜔1 𝑡

Currents:

𝑖𝑠𝑦 (𝑡) = 𝑖1 (𝑡) + 𝑖ℎ (𝑡) = 𝑖1 ∙ 𝑒 𝑗𝜔1 𝑡 + 𝑖ℎ ∙ 𝑒 𝑗 ℎ∙𝜔1 𝑡+Δ𝜑ℎ

ℎ=2 ℎ=2

𝑖𝑝𝑦 (𝑡) = 𝑖𝑠𝑦 𝑡 = 𝑖1 (𝑡) + 𝑖ℎ (𝑡) = 𝑖1 ∙ 𝑒 𝑗𝜔1 𝑡 + 𝑖ℎ ∙ 𝑒 𝑗 ℎ∙𝜔1 𝑡+Δ𝜑ℎ

ℎ=2 ℎ=2

𝑈 𝐼
𝑢= ,𝑖 =
𝑈𝑛 𝐼𝑛
Δ𝜑ℎ = 𝜑ℎ − ℎ ∙ 𝜑1 … phase angle of the harmonic related
to the phase angle of the fundamental
Harmonics of HVDC with LCC

35 HVDC and FACTS


2.1 Presentation: HVDC-LCC Harmonics

Harmonics of 12-Pulse Thyristor Rectifier/Inverter

k… clock number of Yd transformer,


Ydk-Transformer for Yd or Dy always odd
𝑗𝑘𝜋 𝑘𝜋
𝑗 𝜔1 𝑡−
Voltages: 𝑢𝑠𝑑 𝑡 = 𝑢𝑝𝑑 𝑡 ∙ 𝑒 − 6 =𝑢∙𝑒 6

Currents:
𝑘𝜋 𝑘𝜋
𝑗 𝜔1 𝑡− 𝑗 ℎ 𝜔1 𝑡− +Δ𝜑ℎ
𝑖𝑠𝑑 (𝑡) = 𝑖1 (𝑡) + 𝑖ℎ (𝑡) = 𝑖1 ∙ 𝑒 6 + 𝑖ℎ ∙ 𝑒 6
ℎ=2 ℎ=2

𝑘𝜋 𝑘𝜋 𝑘𝜋 𝑘𝜋 𝑘𝜋
𝑗 𝜔1 𝑡− + 𝑗 ℎ𝜔1 𝑡+Δ𝜑ℎ −ℎ ∓
𝑖𝑝𝑑 (𝑡) = 𝑖𝑠𝑑 (𝑡) ∙ 𝑒 ±𝑗 6 = 𝑖1 ∙ 𝑒 6 6 + 𝑖ℎ ∙ 𝑒 6 6
ℎ=2
Fundamental primary leads secondary by k·30°,
same for all pos. sequence orders,
neg. sequence with opposite rotation direction
 Negative sign

𝑘𝜋
𝑗 ℎ𝜔1 𝑡+Δ𝜑ℎ + −ℎ∓1 ∙
𝑖𝑝𝑑 (𝑡) = 𝑖1 ∙ 𝑒 𝑗𝜔1 𝑡 + 𝑖ℎ ∙ 𝑒 6
ℎ=2

Harmonics of HVDC with LCC

Harmonics of 12-Pulse Thyristor Rectifier/Inverter

Harmonic Currents:
Primary Side Ydk (only angles):
𝑘𝜋
𝑗 Δ𝜑ℎ + −ℎ+1 ∙
Pos. sequence: 𝑖𝑝𝑑 ℎ = 𝑖ℎ ∙ 𝑒 6
𝑘𝜋
𝑗 Δ𝜑ℎ + −ℎ−1 ∙
Neg. sequence: 𝑖𝑝𝑑 ℎ = 𝑖ℎ ∙ 𝑒 6

Characteristic Harmonics of a 6-pulse bridge:


Typical harmonic currents of a 6-pulse-bridge i6p(h) with h = 6·n ± 1 (n = 1, 2, 3, …)

5th-harmonic (neg.-seq.): 𝑖𝑟𝑒𝑠 5 = 𝑖6𝑝 5 + 𝑖6𝑝 5 ∙ 𝑒 −𝑗𝑘𝜋 = 0


7th-harmonic (pos.-seq.): 𝑖𝑟𝑒𝑠 7 = 𝑖6𝑝 7 + 𝑖6𝑝 7 ∙ 𝑒 −𝑗𝑘𝜋 = 0
11th-harmonic (neg.-seq.): 𝑖𝑟𝑒𝑠 11 = 𝑖6𝑝 11 + 𝑖6𝑝 11 ∙ 𝑒 −𝑗𝑘2𝜋 = 2 ∙ 𝑖6𝑝 (11)

13th-harmonic (pos.-seq.): 𝑖𝑟𝑒𝑠 13 = 𝑖6𝑝 13 + 𝑖6𝑝 13 ∙ 𝑒 −𝑗𝑘2𝜋 = 2 ∙ 𝑖6𝑝 (13)

 Cancellation of 5th,7th,17th,19th etc. harmonic components


Harmonics of HVDC with LCC

HVDC and FACTS 36


2.1 Presentation: HVDC-LCC Harmonics

Harmonics of 12-Pulse Thyristor Rectifier/Inverter

AC current harmonics
6,0

[A]

4,8

3,6

2,4

1,2

-0,0
5,00 11,0 17,0 23,0 29,0 35,0 41,0 47,0
12pulseBridge: Positive Sequence Current
12pulseBridge: Negative Sequence Current

Harmonics of HVDC with LCC

Harmonics in AC Networks

Harmonic Load Flow Calculation


in PowerFactory

Harmonics of HVDC with LCC

37 HVDC and FACTS


2.1 Presentation: HVDC-LCC Harmonics

Harmonic Load Flow Calculation

Harmonics / power quality assessment tool bar:

Harmonics of HVDC with LCC

Harmonic Load Flow Calculation

Results in the result boxes in the single line diagram:

• THD and RMS values


include all frequencies
• All other voltages, currents,
and HD displayed for
output frequency
Harmonics of HVDC with LCC

HVDC and FACTS 38


2.1 Presentation: HVDC-LCC Harmonics

Harmonic Load Flow Calculation

Selected result variables:

• Total RMS voltage : 𝑈𝑅𝑀𝑆 = 𝑈ℎ2


• Total RMS current: 𝐼𝑅𝑀𝑆 = 𝐼ℎ2


𝑈ℎ
• Harmonic Distortion: 𝑈1 ∙ 100 𝑏𝑎𝑠𝑒𝑑 𝑜𝑛 𝑈1
𝐻𝐷 =
(in %) 𝑈ℎ
𝑈𝑛 ∙ 100 𝑏𝑎𝑠𝑒𝑑 𝑜𝑛 𝑈𝑛

Harmonics of HVDC with LCC

Harmonic Load Flow Calculation

Total Harmonic Distortion THD (in %, idem for current I):

2
𝑈𝑅𝑀𝑆 − 𝑈12 𝑚𝑎𝑥 2
ℎ=2 𝑈ℎ
100 ∙ = 100 ∙ 𝑏𝑎𝑠𝑒𝑑 𝑜𝑛 𝑈1
𝑈1 𝑈1
𝑇𝐻𝐷 =
2
𝑈𝑅𝑀𝑆 − 𝑈12 𝑚𝑎𝑥 2
ℎ=2 𝑈ℎ
100 ∙ = 100 ∙ 𝑏𝑎𝑠𝑒𝑑 𝑜𝑛 𝑈𝑛
𝑈𝑛 𝑈𝑛

Harmonics of HVDC with LCC

39 HVDC and FACTS


2.1 Presentation: HVDC-LCC Harmonics

Harmonic Load Flow Calculation

Power: Variable

• Total Apparent Power: 𝑆 = 3 ∙ 𝑈𝑅𝑀𝑆 ∙ 𝐼𝑅𝑀𝑆 TS

• Total Active Power: 𝑃= 𝑃ℎ = 𝑈ℎ ∙ 𝐼ℎ ∙ cos(𝜑ℎ ) TP


ℎ ℎ

𝑃 Tcosphi
• Total Power Factor: 𝜆=
𝑆

• Displacement Factor: cos 𝜑ℎ = cos(𝜑𝑢ℎ − 𝜑𝑖ℎ ) cosphi

• Total Reactive Power: 𝑄= 𝑆2 − 𝑃2 TQ

• Note: Total reactive power includes Distortion Power

Harmonics of HVDC with LCC

Definition of Harmonic Injections for HVDC-LCC

LCC Harmonics Model:


• Built-in “Ideal Rectifier” Harmonic Current Spectrum

• User-Defined Harmonic Current Spectrum

Harmonics of HVDC with LCC

HVDC and FACTS 40


2.1 Presentation: HVDC-LCC Harmonics

Definition of Harmonic Injections

Types of Harmonic Sources (User-Defined Harmonic Current Spectrum):


• Balanced: magnitudes and phases of positive and negative sequence
harmonic injections at integer harmonic of odd-order non-multiple of 3.
Example: 5th , 7th , 11th , 13th… etc.
• Unbalanced: magnitudes and phases of positive, negative and zero
sequence harmonic injections at integer and non-integer harmonic

I h  k h  e  h  I1  e h1

fundamenta l

I I balanced
kh   h 1
 I ah I1 unbalanced
   h  1 balanced
 h   h
 ah  h   a1 unbalanced
Phase angle with respect to fundamental frequency current angle
Harmonics of HVDC with LCC

Frequency Sweep

Harmonics of HVDC with LCC

41 HVDC and FACTS


2.1 Presentation: HVDC-LCC Harmonics

Network Self Impedance

1 V 1( f )

I 1( f )

Self Impedance: V1 ( f )  Z11 ( f ) I1 ( f )

Harmonics of HVDC with LCC

Network Impedance
DIgSILENT

10000.

Parallel Resonance

Parallel Resonance
7500.0

Parallel Resonance Parallel Resonance

5000.0

Parallel Resonance
Parallel Resonance

2500.0

0.000

Series Resonance

Series Resonance Series Resonance


-2500.0
10.000 408.00 806.00 1204.0 1602.0 [Hz] 2000.0
UW-3: Network Impedance, Magnitude in Ohm
S0.0<->UW-3: Coupling Impedance Node 1 - Node 2 in Ohm
UW-3<->UW-1: Coupling Impedance Node 1 - Node 2 in Ohm

Harmonic Impedance Impedanz Date: 3/12/2003


Annex: 1 /1

Harmonics of HVDC with LCC

HVDC and FACTS 42


2.1 Presentation: HVDC-LCC Harmonics

Harmonic Filters for HVDC-LCC

Harmonics of HVDC with LCC

Typical Filter Configurations used in HVDC-LCC

R R
Rp
L L

C C

Single-tuned band-pass Damped, high-pass

Hint: Models for double-tuned filters available in PowerFactory Version 2017 onwards.

Harmonics of HVDC with LCC

43 HVDC and FACTS


2.1 Presentation: HVDC-LCC Harmonics

AC Filter Parameters

Input of filter parameters:

• Design parameters

or
• Layout parameters

Harmonics of HVDC with LCC

HVDC and FACTS 44


2.2 Exercise: Harmonics Mitigation

2.2 Exercise: Harmonics Mitigation

The HVDC terminal is modelled as typically as a two six-pulse bridge rectifier/inverter on both
sides of the link. It is of interest to analyse the cancellation effects due to the Y-y and Y-d
transformer connections.

The following preparatory steps are required:

• Import into PowerFactory the project file “HVDC 02 LCCStart”

• Activate study case “2020 Study Case with new HVDC Link”.
• Familiarise yourself with the system. Colour it according to the voltage levels. Execute a
load flow calculation and determine the total generation, total demand, installed capacity
and total network losses.
• Note that the imported system does not contain any distorting load.

Twelve-pulse HVDC

• Make sure the flag “Ideal rectifier” is enabled on the “Harmonics/Power Quality” page of
all rectifier/inverter elements and set the maximum harmonic order to 40(EN50160).

• What are the typical harmonic orders being represented for an ideal 6 pulse rectifier?

• Make sure that Conv 1a and Conv 2a are having transformers with a phase shift of 0 deg
and Conv 1b and Conv 2b are having transformers with a phase shift of 150 deg. This
corresponds to a wye-wye (Yy0) and a wye-delta (e.g. Yd5) transformer respectively.

Non-distorting loads

All loads are considered here in the system as linear as the focus of analysis is on the harmonics
stemming from the HVDC unit. It is important for the purpose of the harmonic analysis that we
define the loads as impedances.

• Create a new load type and set the harmonic load model to Impedance, Model 1.
• Set the load model to purely inductive/capacitive

• Assign the type of a linear load to all load elements in the system.

2.2.1 Exercise: Calculation of harmonic voltage distortion

Since the system has balanced loads and the transmission lines are transposed, a balanced
harmonic analysis will suffice to determine the harmonic distortion levels across the system.

• Change the calculation toolbar by clicking at the Change Toolbox icon ( )and selecting
Harmonic Analysis.

• Launch a harmonic load flow calculation for all frequencies using a balanced network
representation. ( )

45 HVDC and FACTS


2.2 Exercise: Harmonics Mitigation

• Adjust the command options accordingly. For the output frequency select the 5th harmonic
order: besides the result including all frequencies, PowerFactory will display results for this
output frequency as well.

Note: check that the nominal frequency in the command dialog corresponds to the nomi-
nal frequency of the grid.

• Check the output window for any warning/error message.


• Define a bar diagram for the harmonic voltage distortion at the busbars where distorting
elements are connected, hence busbars SG, SC and NE:
– Press the Create Distortion Plot button ( ) and select the busbars and their variable
HD in the diagram’s curves list.
– Validate the harmonic voltage distortions at the mentioned bus bars against the IEEE-
voltage distortion limits. On the edit dialogue of the harmonic distortion diagram you
can select among a list of pre-defined standard limits. Mind that different limits apply
to different voltage levels. Note that you can also add a user-defined limit.
– Identify those bus bars and frequencies where the system does not comply with the
maximum voltage distortion limits.
• List the total harmonic distortion for all bus bars in a flexible data page.
• Put the HVDC capacitors out of service and re-run the harmonic load flow. What is their
effect to the harmonics?
• Put the HVDC capacitors back in service

Unbalanced operation of the twelve pulse bridge

We will analyse now the operation of the twelve pulse HVDC (inverter side). A similar approach
can be taken for the rectifier side as well. Recall the presentation about balanced and unbal-
anced injections and the characteristic harmonics.

• Make sure that HVDC shunt capacitors are back in service


• Define a variable set for the current amplitude and phase angle at the AC output of each
converter as well as for the combined output of the HVDC system (e.g. the main circuit
breaker).

• Re-Execute a harmonic load flow.


• Create a Waveform plot and a Bar-Diagram to visualise the harmonic load current of the
three windings.
• Visualise the harmonic current spectrum (Bar-Diagram).

Note: Alternatively, a waveform plot can be created to observe the harmonic currents. On
the same virtual instrument page which displays the harmonic bar diagrams, define
a Waveform Plot by clicking on the “Create New Plot” icon in the second toolbar.

• What can you conclude about the behaviour of the 5th , 7th , 11th harmonics? Which ones
are in positive sequence and which ones in negative sequence?

• Reduce the active and reactive power of one of the six-pulse bridges by 20 %. This
represents an unbalanced operation of the 2 legs of the 12-pulse rectifier.

HVDC and FACTS 46


2.2 Exercise: Harmonics Mitigation

• Re-execute the harmonic load flow. Use again a balanced network representation and
select as output frequency the 5th harmonic order.

• Compare the results against the balanced load case in the previous exercise and explain
the differences.

2.2.2 Exercise: Analysis of HVDC-LCC Harmonic Filters

To understand the reason of requiring a filter within the HVDC system, proceed with the following
steps:

• Define Frequency Sweep results for the buses SG, SC and NE.
• Perform a frequency sweep up to the maximum frequency as defined in the converter
(#=40).

• Plot the impedance at the three 400 kV busbars.


• Identify the most problematic ones and the frequency at which they appear
• Provide arguments for your choice(i.e. the points of parallel resonance).

The existing capacitor bank of the HVDC system can be de-tuned to filter the harmonic current
injections at this busbar. Hence by adding a small inductor in series with the capacitance of the
bank, the capacitor bank turns into a filter that can be used to mitigate harmonic distortion.

The aim of this exercise is to design the filter bank at the rectifier bus “T AC C1” (bus SC in
the 400kV network). The following instructions give you guidance on how to size and verify
the filters. Note that filter sizing is not a straight forward but rather a back and forth procedure,
where more than one filter layout can be found as a feasible solution.

• The harmonic load flow analysis in previous section has shown that voltage distortion at
bus at harmonic orders 11, 13, 19 and 23 exceeds the emission limits. These harmonic
orders are therefore the natural candidates to tune the filters. The following filter arrange-
ment can be used to mitigate the HVDC converter generated harmonics:

– A single-tuned band-pass filter for the 11th harmonic order: 112 MVar
– A single-tuned band-pass filter for the 13th harmonic order: 95 MVar
– A single-tuned band-pass filter for the 23rd harmonic order: 54 MVar
– A high-pass filter for 25th harmonic order: 49 MVar, Rp=200 Ω

Note: The following considerations can be taken into account when the filter is being
designed:
– The total reactive power should be equal to 350 MVAr, which is the total reactive
power compensation at bus “T AC C1”.
– The reactive power sharing between the filters should correspond approximately
to the inverse of the respective tuning order (1/11 : 1/13 : 1/23 : 1/25). This
rule-of-thumb for the reactive power leads to feasible filters layout that can be
found in the market.
– Use a Quality factor at resonance frequency equal to 100.
– The high-pass filter should limit the network impedance to 400 Ω for high fre-
quencies.

47 HVDC and FACTS


2.2 Exercise: Harmonics Mitigation

To check the effectiveness and the validity of the solution, use the following tools which have
been already covered in the previous sections:

• Verify the harmonic voltage distortion limits by means of harmonic load flow calculations.
• Scan the network impedance to verify that existing resonance frequencies do not slide
towards lower harmonic orders or that the amplitudes get amplified by the filters.

• Use the Filter Report to verify the voltages and currents across the internal filter compo-
nents, specially the voltage across the capacitor at the tuning-order frequency.

• If the harmonic spectrum has been improved, but only locally, then the filter design proce-
dure must be performed for the inverter side converter as well.

Once you have completed the analysis and are satisfied with the solution print a Filter Layout
Report. This report summarises all design data of your filter.

PowerFactory files

File Name Description


HVDC 02 LCCStart Starting project of exercise 2.2 Exercise: Har-
monics Mitigation
HVDC 02 LCCHarmonics Solution of exercise 2.2 Exercise: Harmonics
Mitigation

Notes:
...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

HVDC and FACTS 48


3 HVDC-LCC - Dynamic Simulation

Purpose: Comprehension of the HVDC Classic systems with focus on dynamics


analysis

Content: HVDC Control and Simulation


• Converter model for EMT analysis

• Converter model for stability analysis (RMS-simulation)


• PowerFactory Built-In Models for EMT and Stability Simulation
PowerFactory Built-In Models for EMT and Stability Simulation
• DC-Line (stability/EMT)

• Smoothing Reactor (stability/EMT)


• DC-Filters (stability/EMT)
• DC-Breakers

Control Scheme for Stability and EMT Analysis


• Rectifier control
• Current control
• Tap control

• Active Power Control


• Inverter control
• Gamma control
• Voltage Control

HVDC Operation
• AC system strength and its influence (SCR and ESCR)
• Response to AC system faults

• Response to DC system faults


• Inversion of the power flow direction

Level: Advanced.

3.1 Presentation: HVDC-LCC Dynamics

49 HVDC and FACTS


3.1 Presentation: HVDC-LCC Dynamics

HVDC Training Course


Dynamic and Transient Performance

DIgSILENT GmbH

HVDC Control

• Thyristor bridges can be controlled by the firing angle 


• DC-equation of an HVDC system:
Vd 0r cos r  Z cr I d  Rl I d  Vd 0i cosg i  Z ci I d
Vd 0r cos r  (Z cr  Z ci  Rl )I d  Vd 0i cosg i

• DC control should:
– Regulate current (or power)
– keep the extinction angle sufficiently large for avoiding commutation
failures
• Standard Control Strategy:
– current-control at the rectifier station
– gmin - control at the inverter station

HVDC Dynamic and Transient Performance

HVDC and FACTS 50


3.1 Presentation: HVDC-LCC Dynamics

HVDC Control

Rectifier Rectifier Inverter Inverter


AC Side DC Side DC Side AC Side
HVDC Dynamic and Transient Performance

HVDC Control

Ideal V-I Characteristic

HVDC Dynamic and Transient Performance

51 HVDC and FACTS


3.1 Presentation: HVDC-LCC Dynamics

Rectifier Current Controller

DIgSILENT
12-pulse Rectifier Current Controller:

I alpha
Im ea Ictrl 0
StaImea* ElmIctrl* tap 1 Rec2
2
ElmRec*

tap 1 Rec1
F0Hz1 ElmRec*
Phi1 2
ElmPhi__PLL

HVDC Dynamic and Transient Performance

Rectifier Current Control


DIgSILENT

Ictrl_Rectifier:

Isetp
0

alpha_max

I
- dI o12 yi1 alpha
1 K Lim iter
Kp

alpha_min
o13

alpha_max

[1/sT]
Ti

alpha_min

HVDC Dynamic and Transient Performance

HVDC and FACTS 52


3.1 Presentation: HVDC-LCC Dynamics

Inverter Gamma-Controller

DIgSILENT
12-pulse Inverter Gamma Control:

gamma

alpha
gctrl 0
ElmGctrl* tap 1 Inv2
2
ElmRec*

tap 1 Inv1 gamma_min


F0Hz ElmRec*
Phi1 2
ElmPhi__PLL

HVDC Dynamic and Transient Performance

Inverter Gamma Control


DIgSILENT

gctrl_Inverter:

gamma_ref
0

alpha_max

gamma
- yi o12 yi1 gamma(1)
1 K Lim iter
Kp

alpha_min
o13

alpha_max

[1/sT]
Ti

alpha_min

HVDC Dynamic and Transient Performance

53 HVDC and FACTS


3.1 Presentation: HVDC-LCC Dynamics

HVDC Control

Actual V-I Characteristic

At reduced voltage

HVDC Dynamic and Transient Performance

Voltage Dependent Current Order Limiter (VDCOL)

HVDC Dynamic and Transient Performance

HVDC and FACTS 54


3.1 Presentation: HVDC-LCC Dynamics

Active Power Reversal

• Power reverses by changing voltage polarity on the DC link


• DC current direction remains same
• Time windows of minutes until procedure is completed (due to the high
stress sustained by the cables)
• Ramp limits existing on rectifier power runback/runup (dozens of secs)
• In practice: delay must be included for cable de-ionisation before
polarity reversal (e.g. order of minutes)
• Optional: AC filter controls to minimise system disturbance during
power reversals
• Procedure:
– Rectifier runback up to minimum -> Converters blocked -> cable de-
ionisation -> Deblocking -> Recti

HVDC Dynamic and Transient Performance

Active Power Reversal

• Typical Procedure:

– Rectifier runback up to minimum power at constant slope

– Converters blocked

– cable de-ionisation

– Converters deblocking and rectifier/inverter change roles

– Rectifier runup up to setpoint power at constant slope

HVDC Dynamic and Transient Performance

55 HVDC and FACTS


3.1 Presentation: HVDC-LCC Dynamics

Two-Directional Controller

HVDC Dynamic and Transient Performance

HVDC Controller Implementation in PowerFactory


DIgSILENT

12-pulse Converter Controller:

gamma

0
alpha
Controller 0
I ElmCtrl*
Im ea 1 1 Rec2
StaImea* 2
ElmRec*
tap

Tap Changer
vdc ElmTap*
Vm ea 1
StaVm ea*

0
1 Rec1 gamma_min
Fmeas ElmRec*
Phi1 2
ElmPhi__pll

HVDC Dynamic and Transient Performance

HVDC and FACTS 56


3.1 Presentation: HVDC-LCC Dynamics

HVDC Controller Implementation in PowerFactory

DIgSILENT
Ctrl_gamma_current:

Isetp
0

alpha_max

1
I - dI
K
o12 cosalpha
cos^-1(alpha)
Kp..

alpha_min

alpha_1
o13
Im
2 alpha_max

[1/sT]_cosalpha
TiI 0
alpha
MIN
alpha_min 1

gamma_ref

alpha2
3

alpha_max

alpha_no_limit
-
gamma dgamm.. Kdgam..
4 K(.. Limiter_deg
Kp..

alpha_min
Kdgam..

i_dga..
alpha_max

[1/sT]_deg
TiG

alpha_min

HVDC Dynamic and Transient Performance

Tap-Changer
DIgSILENT

tap_TapChanger:
alpha<pi/2

alpha_min
0
tap_order
0

dalpha Kdalpha
irec

1
alpha - Dband(K)_deg
yi
K
da Kalpha
tap_max

delta tap
[1/sT] bias 1
Ttap
Kdv

tap_min

2
vdc - dvdc
K
Kv

v_ref
3

HVDC Dynamic and Transient Performance

57 HVDC and FACTS


3.1 Presentation: HVDC-LCC Dynamics

Malfunctioning

HVDC Dynamic and Transient Performance

Commutation Failure

• One thyristor fails to commute from ON to OFF state

• Conduction of both upper and lower thyristors of a specific leg

• Occurs typically when


– converter is in inverter mode T1 T3 T5

– extinction angle 𝛾 reference is too small

– Overlap angle delays thyristor extinction by enough

• Results into short circuit of the affected leg T4 T6 T2

– DC voltage drops to zero

– Current increases considerably

• Inverter control: typically gamma min: to avoid commutation failure

HVDC Dynamic and Transient Performance

HVDC and FACTS 58


3.1 Presentation: HVDC-LCC Dynamics

Commutation Failure

• DC voltage in inverter operation mode (overlap angle margin)

DIgSILENT
400.00

T1 T3 T5
200.00

0.00

𝝁𝒎𝒂𝒙 T4 T6 T2

-200.00

𝜶 𝝁
-400.00
0.00 0.00 0.01 0.01 0.02 [s] 0.02
Term_R: Voltage Phasor, Magnitude in kV
Rectifier: Line-Line Phase Voltage A/Terminal AC in kV
Rectifier: Line-Line Phase Voltage B/Terminal AC in kV
Rectifier: Line-Line Phase Voltage C/Terminal AC in kV
Term_I: Voltage Phasor, Magnitude in p.u.

Three-Phase Thyristor Rectifier Subplot/Diagramm(3) Date: 2/24/2006


DIgSILENT
HVDC Dynamic and Transientalpha
Performance
= 40°, overlap angle u = 10° Annex: 1 /5

Commutation Failure
DIgSILENT

3.000

2.000

1.000

0.00

-1.000

-2.000

T4 fails to commute
-3.000
-0.008 -0.004 0.00 0.00 0.01 .. 0.01
Inv 1: Phase Current A/Terminal AC in kA
Inv 1: Phase Current B/Terminal AC in kA
Inv 1: Phase Current C/Terminal AC in kA

HVDC Dynamic and Transient Performance

59 HVDC and FACTS


3.1 Presentation: HVDC-LCC Dynamics

Commutation Failure

DIgSILENT
3.000 1.676

2.000
1.535

1.00
1.393

0.00

1.251
-1.000

1.109
-2.000

-3.000 0.97
-0.008 -0.004 0.00 0.00 0.01 .. 0.01 -0.008 -0.004 0.00 0.00 0.01 .. 0.01
Inv 1: Current, Magnitude/Terminal AC in kA Inv 1: Current, Magnitude/Terminal DC- in kA
Inv 1: Current, Magnitude/Terminal AC in kA
Inv 1: Current, Magnitude/Terminal AC in kA

16.00 30.00

12.00 25.00

8.000 20.00

4.000 15.00

0.00 10.00

-4.000 5.000
-0.008 -0.004 0.00 0.00 0.01 .. 0.01 -0.008 -0.004 0.00 0.00 0.01 .. 0.01
Inv 1: Extinction Angle Inv 1: overlap Angle in deg

HVDC Dynamic and Transient Performance

Commutation Failure
DIgSILENT

3.000

2.000

1.00

0.00

-1.000

-2.000

-3.000
-0.100 0.00 0.10 0.20 0.30 .. 0.40
Inv 1: Phase Current A/Terminal AC in kA
Inv 1: Phase Current B/Terminal AC in kA
Inv 1: Phase Current C/Terminal AC in kA

375.0

250.0

125.0

0.00

-125.0

-250.0
-0.100 0.00 0.10 0.20 0.30 .. 0.40
Inverter Bus Bar: Phase Voltage in kV

HVDC Dynamic and Transient Performance

HVDC and FACTS 60


3.1 Presentation: HVDC-LCC Dynamics

Commutation Failure

DIgSILENT
3.000

2.000

1.00

0.00

-1.000

-2.000

-3.000
-0.100 0.00 0.10 0.20 0.30 .. 0.40
Inv 1: Current, Magnitude/Terminal AC in kA
Inv 1: Current, Magnitude/Terminal AC in kA
Inv 1: Current, Magnitude/Terminal AC in kA

375.0

250.0

125.0

0.00

-125.0

-250.0
-0.100 0.00 0.10 0.20 0.30 .. 0.40
Inverter Bus Bar: Line-Neutral Voltage, Magnitude in kV

HVDC Dynamic and Transient Performance

Discontinuous Operation

• Occurs during low power operation modes

• DC Current contains ripple which may cause


discontinuous/intermittent operation

• Results to:
𝑑𝑖
– high stress of thyristor valves
𝑑𝑡

– potential for high voltages accross thyristor valve due to undamped


oscillations (resonant circuit between DC reactor and line capacitance)

• Avoid discontinuous operation by setting minimum power transfer


limits

HVDC Dynamic and Transient Performance

61 HVDC and FACTS


3.1 Presentation: HVDC-LCC Dynamics

Discontinuous Operation

DIgSILENT
0.04

0.02

0.00

-0.020

-0.040
0.00 0.00 0.01 0.01 0.02 .. 0.02
Inv 1: Phase Current A/Terminal AC in kA
Inv 1: Phase Current B/Terminal AC in kA
Inv 1: Phase Current C/Terminal AC in kA

0.03

0.02

0.02

0.01

0.01

-0.001
0.00 0.00 0.01 0.01 0.02 .. 0.02
Inv 1: DC-Current in kA

HVDC Dynamic and Transient Performance

HVDC and FACTS 62


3.2 Presentation: Handling in PowerFactory

3.2 Presentation: Handling in PowerFactory

Notes:
...............................................................................................

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...............................................................................................

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...............................................................................................

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63 HVDC and FACTS


3.2 Presentation: Handling in PowerFactory

Handling of Dynamic
Simulations in PowerFactory

DIgSILENT GmbH

Handling of Dynamic Simulations

Simulation Procedure

• Load-Flow
• Calculation of Initial Conditions Setup
• Definition of Variables
• Define Events

• Start Simulation
• Define/Change Events
• Continue Simulation Simulation
• Define Simulation Plots

Handling of Dynamic Simulations

HVDC and FACTS 64


3.2 Presentation: Handling in PowerFactory

Setup of Simulation

• Calculate a Load-Flow

• Calculation of Initial Conditions


● Select the simulation method (RMS values)
● Network representation: balanced/unbalanced
● Define the integration control options

• When the initial conditions are calculated, the


● Variables and
● simulation events
can be defined.

Handling of Dynamic Simulations

Define Variable Set

• Definition of variables to be recorded in result file (result variables):


● Select object
● Right mouse click
-> Define -> Variable Set (Sim)
● Double click object in appearing browser
● Select page “RMS (or EMT) Simulation”
● Select variables

Handling of Dynamic Simulations

65 HVDC and FACTS


3.2 Presentation: Handling in PowerFactory

Define Simulation Events

• Definition of simulation events before or during a simulation:


● Open the event list

● Insert a new event (object)

● Select the event type

Handling of Dynamic Simulations

Presenting Simulation Results

• Definition of Virtual Instrument Panel:


● Insert new graphic
● Select “Virtual Instrument Panel”

• Appending virtual instruments (VI)


● Click on Icon “Append Vis”
● Select “Subplot VI”

• Definition of Variables:
● Double click somewhere in the VI
● Input “Element”
● Input “Variables”

Handling of Dynamic Simulations

HVDC and FACTS 66


3.2 Presentation: Handling in PowerFactory

Presenting Simulation Results

Handling of Dynamic Simulations

User Defined Controller Models


in PowerFactory

using DIgSILENT Simulation Language (DSL)

Handling of Dynamic Simulations

67 HVDC and FACTS


3.2 Presentation: Handling in PowerFactory

Challenges of Dynamic Simulation in Power Systems

• Broad range of dynamic controllers/equipment implementations

– Impossible to represent all types as build-in within a simulation tool

– User defined models are needed to represent customized behavior

• Scope of a user defined model:

– Precise representation of dynamic behavior of components

– Model vs Real Equipment: imperfect realisation of simulation models

– RMS: only fundamental frequency is of interest

– EMT: a predefined frequency range is important (e.g. from DC to several kHz)

Handling of Dynamic Simulations

Challenges of Dynamic Simulation in Power Systems

• User defined model development


– Based on standards: IEEE, IEC, WECC, CIGRE etc.
• Many are already implemented in global libraries
• Possibility to share models across simulation environments (while pertaining the
dynamic behavior) via parameter mapping techniques
• Generic behavior of equipment class (e.g. IEC61400-27-1 4A Type D wind turbines)
– Supplied by equipment manufacturers
• Special agreement for model access (confidentiality NDA)

• Typically models are platform dependent

• Detailed behavior of the specific equipment type

– Based on other sources (generic functionality, research, examples, etc)


• Readily available in most simulation environments

• Generic behavior of an equipment class

• Models are platform dependent


Handling of Dynamic Simulations

HVDC and FACTS 68


3.2 Presentation: Handling in PowerFactory

Dynamic Models in PowerFactory: A Summary

Purpose: Type Objects: Element Objects:

Signal Linking
between network Composite Frame Composite Model
elements/controllers

Defining Custom
Block Definition Common Model
Dynamic Models (known also as Model Definition)

within Global / within Grid /


Project Library Network Data
folder folder
Handling of Dynamic Simulations

Block Definitions versus Common Models

Block Common model:


Definition

• The common model:


• The block definition:
– links to a block definition
– Contains the DSL
– assigns a specific set of
equations
parameter values
– Uses literals for parameters
Handling of Dynamic Simulations

69 HVDC and FACTS


3.2 Presentation: Handling in PowerFactory

Composite Frames versus Composite Models

DIgSILENT
Composite Frame:

curex

0 0

upss 1
VCO 0
* uerrs
2
Syn.Generator
1
ElmSym *
1

2
pt

PCO g PMU
* *

speed

Handling of Dynamic Simulations

Dynamic Modelling Concept - Versatility

Network Data Library

Network A Composite
Frame
Element 1 Model 1
B Slot A
Network A Composite
Element 2 Slot B
Model 2
B

Used macros

Common Macro 1
Model 1
Block Macro 2
Definition
Common
Model 2 Macro n

Handling of Dynamic Simulations

HVDC and FACTS 70


3.3 Exercise: Analysis using EMT-Simulation

3.3 Exercise: Analysis using EMT-Simulation

The following preparatory steps are required:

• Import into PowerFactory the project file “HVDC 03 LCCStart”


• Activate the imported project and the study case “2020 Study Case with new HVDC link”.
• Perform a load flow calculation and generate a summary report. Analyse the generation,
consumption and losses.

• Display the Composite Model/Frame of the HVDC system - you will see the same graphic
as shown in Figure 3.1. The trainer will explain the function of the different blocks.

Hint: Display the Composite Model/Frame

• Open the Data Manager ( ).


• Select the DSL model (either *.ElmDsl or *.ElmComp) you want to display on the
right side of the Data Manager.
• Right click and select Show Graphic:

• The displayed graphic is connected to the common or composite model which was
selected in the second step. Values of the signals and states can be seen for this
model if the simulation is already initialized.
• Right click at this greyed out graphic and select Show Library Object.
• If only a blank page is displayed then the DSL model is only defined via equations.

Initialize the simulation using the following options:

• Instantaneous Values (EMT), unbalanced.


• No automatic step size adaptation.
• Step size for simulation of 50 us.
• Starting time at -0.1 s.

71 HVDC and FACTS


3.3 Exercise: Analysis using EMT-Simulation
HVDC Controls:

Fmeas_R
PLL_R 0
ElmPhi*

tap 1
Rect D
ElmRec

Udmeas_R Id_ref 0
Ud_R

StaVmea* Rect Y
0 tap 1
ElmRec
Controller_R
1
ElmDsl alpha_R
1 2
Id_R
2

Idmeas_R
StaImea*

Fmeas_I
PLL_I 0
ElmPhi*
Idref

tap 1
Inv D
ElmRec

0 0

Id_I Inv Y
Idmeas_I 1 tap 1
ElmRec
StaImea*
Controller_I alpha_I
2 2
ElmDsl

gamma_min 4

gY

gD

Figure 3.1: Composite model of the HVDC control system

• Define simulation results for the following quantities:


– AC and DC currents for one of the rectifier and one inverter units
– AC voltages on both sides of the HVDC system (substations NE and SC)
– Rectifier firing angle
– Inverter extinction angle
– Active and reactive power on both sides

Hint: Defining a Variable Selection


– Before defining the variables to monitor the initial conditions have to be calculated
(using the button)

HVDC and FACTS 72


3.3 Exercise: Analysis using EMT-Simulation

– Then right-click on the element to be monitored and select Define → Results for
RMS/EMT Simulation.. from the context sensitive menu.
– All variable sets of selected elements are now shown. Double-click the element
you just selected.
– This brings a selection window, where you can create, select or edit a set of
variables. If a variable set is edited, then a variable set manager will pop up.
This variable set manager shows in the left pane the available variables, and in
the right pane the selected variables. Press the or buttons to move the
selected variable from the one to the other pane. Use the various filter settings
to show more available variables.
– The variable set will now consist of the selected variables, which are now ready
to show in a plot.

Running the simulation and visualising results:

• Run the simulation for 1 s


• Create result plots to visualise the results:

– Inverter Control: Idmeas I, Idref, alpha I, gamma min


– Rectifier Control: alpha R, Idmeas R, Ud R
– converter element ”Conv1a”: active and reactive power
– converter element ”Conv2a”: active and reactive power

• Observe the results and make sure that the simulation is steady

Changing the current reference:

• Apply parameter events on the input signal ”Id ref” of the ”Rectifier Control” common
model at
– time=0.5 s and a value 0.7 p.u.
– time=1.0 s and a value 0.8 p.u.
– time=1.5 s and a value 0.9 p.u.

• Re-run the simulation(for 2 seconds) and observe whether the HVDC system follows the
dispatch current reference.

Creating FFT Plots

Create an FFT plot for the DC voltage and the AC phase currents. Compare the results with the
calculation of the harmonics in the previous harmonics exercise with ideal rectifier circuits.

Use as a setting for the plot:

• 1024 samples
• Frequency step 25 Hz
• Show the plot using spectral lines

Keeping output power constant

73 HVDC and FACTS


3.3 Exercise: Analysis using EMT-Simulation

• Open the common model “Rectifier Control” and change the following parameters:
– “P I” set it to 1
– “Pd” set it to 0.8
• To create a disturbance in the network use a load switch event to disconnect a load.
Choose the nearby “Load SC” and disconnect it at 0.5 seconds.
• Monitor the additional “Rectifier Control” signal Idref
• Re-run the simulation and observe whether the HVDC system follows the dispatch power
reference.

3.3.1 Optional Exercise: Stability analysis using EMT-Simulation

In this exercise the power system including the HVDC-LCC link is verified for three phase faults.

The following preparatory steps are required:

• Import into PowerFactory the project file “HVDC 03 LCCStart”


• Activate the imported project and the study case “2020 Study Case with new HVDC link”.

It is of interest to test the HVDC system performance when various network events are occur-
ring:

• AC network faults
• Fault and loss of parallel AC line
• Loss of largest generator in the system

Applying AC fault events:

• Define a 3-phase short circuit on bus NB (in the ”AC Transmission System”) at 0.5 s with
5 Ohm fault impedance for a duration of 100ms duration (i.e. a second event after 100ms
to clear the fault).

Hint: Defining Simulation Events


Before running the simulation it is often necessary to define simulation events, which
will take place during the next simulation.
– Before specifying an event the initial conditions have to be calculated (using the
button).
– Then events can be created and defined by opening the current event list ( )
and then create new events using the New Object button .

• Run the simulation for 2 s and visualise the results in the range where the fault is applied
• Is the system recovering after the event?
• Monitor the inverter and rectifier behaviour.
• Verify the behaviour of the HVDC unit for a metallic fault (0 impedance) applied on the
same busbar and same timing conditions

HVDC and FACTS 74


3.3 Exercise: Analysis using EMT-Simulation

• Monitor the inverter and rectifier behaviour. Why is the DC current reference going to zero
during the fault?

Fault and loss of AC parallel line:

• Define a 3-phase short circuit on “Line NE-SC1” at 0.5 s with 0 Ohm fault impedance for
a duration of 100ms duration (i.e. a second event after 100ms to clear the fault).
• Run the simulation for 2 s and visualise the results

• Monitor the inverter and rectifier behaviour.

PowerFactory files

File Name Description


HVDC 03 LCCStart Starting project of exercise 3.3 Exercise:
Analysis using EMT-Simulation
HVDC 03 LCCDynamics Solution of exercise 3.3 Exercise: Analysis
using EMT-Simulation
Starting project of exercise 3.3.1 Optional
HVDC 04 LCCStart Exercise: Stability analysis using EMT-
Simulation
HVDC 04 LCCDynamics Solution of exercise 3.3.1 Optional Exercise:
Stability analysis using EMT-Simulation

Notes:
...............................................................................................

...............................................................................................

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...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

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75 HVDC and FACTS


4 HVDC-VSC - Steady state analysis

Purpose: Understanding of HVDC-VSC Systems.

Content: Voltage Source Converters


• Overview of VSC technology
• VSC Operation and configurations

• Practical topologies: 2 level, 3 level, MMC


• Converter Modelling Approaches
• HVDC-VSC converter application examples

Modular Multi-Level Converters


• PowerFactory MMC Modelling details
• Properties of MMC systems (harmonics, dynamic response, etc)
• Main control aspects (high-level controls)

HVDC-MMC Hands-on experience using PowerFactory Implemen-


tation of various HVDC-MMC applications in a HV system
• Embedded HVDC-MMC (50Hz/50Hz)
• Offshore HVDC-MMC link

• HVDC-MMC 50/60 Hz Interconnection link

Level: Advanced.

4.1 Presentation: HVDC-VSC Systems

Notes:
...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

HVDC and FACTS 76


4.1 Presentation: HVDC-VSC Systems

HVDC with VSC / MMC

DIgSILENT GmbH

Terms and Definitions

• HVDC: High Voltage Direct Current


An HVDC link transfers active power with high voltage and direct current.
• HVAC: High Voltage Alternating Current
An HVAC link transfers active and reactive power with high voltage and alternating current
(50 Hz or 60 Hz).
• VSC: Voltage-Sourced Converter / Voltage Source Converter
A VSC is a power electronic converter with constant voltage at the DC terminal.
It typically uses IGBTs and PWM.
• MMC: Modular Multi-Level Converter
An MMC is a VSC with a high number (>3) of voltage levels in a modular topology.
• IGBT: Insulated Gate Bipolar Transistor
An IGBT is a power electronic valve. It can be switched on and off and is typically used in
VSCs.
• PWM: Pulse Width Modulation
The PWM is used to form an AC voltage at the VSC’s AC terminal in order to inject a
sinusoidal AC current by varying the width of (DC voltage) pulses.

HVDC with VSC / MMC 2

77 HVDC and FACTS


4.1 Presentation: HVDC-VSC Systems

Terms and Definitions

• Monopole (symmetric monopole):

• Bipole (with or without metallic neutral return):

HVDC with VSC / MMC 3

Comparison VSC vs. LCC

Voltage-Sourced Converter Line Commutated Converter


+ Very good P and Q controllability  Only P controllability, Q resulting
+ Low Harmonic contents  High Harmonic contents, large
(high switching frequency, filters required
MMC provides almost sinusoidal
waveform)
+ Q can be controlled/provided by the  High Q consumption of both
converters rectifier and inverter
+ Independent from the strength of AC  Short-Circuit capacity of network is
network important for operation
+ Can “build” an AC grid  No capability to “build” an AC grid
 High no load losses + No load losses can be neglected
(total losses 2-level VSC: 2…4% Pn,
total losses MMC: 1% Pn)
 New technology + Well established, robust technology
 Possible up to ca. 1000 MW + Efficient for high power transfers
and ultra high voltage (UHVDC)
HVDC with VSC / MMC 4

HVDC and FACTS 78


4.1 Presentation: HVDC-VSC Systems

VSC Topologies

IGBT
Collector
• Insulated Gate Bipolar Transistor
• A power electronic valve Gate
• Can be switched on and off
• Usually combined with an anti-parallel diode Emitter

• Typical valve for VSC

Anti-parallel
Diode
IGBT

HVDC with VSC / MMC 5

VSC Topologies

General Representation of Power Electronic Valves

Diode Turn-On Valve Turn-On & Turn-Off Valve


(e.g. Thyristor) (e.g. IGBT)

HVDC with VSC / MMC 6

79 HVDC and FACTS


4.1 Presentation: HVDC-VSC Systems

VSC Topologies

2-Level VSC

• Was used in first VSC HVDC projects


• Voltage at AC side is formed just with
two DC voltage levels
• High harmonics around switching
frequency
• Harmonic filters needed

HVDC with VSC / MMC 7

VSC Topologies

3-Level VSC
• Most common topology:
3-Level Neutral Point Clamped VSC

• Not used for VSC HVDC projects

HVDC with VSC / MMC 8

HVDC and FACTS 80


4.1 Presentation: HVDC-VSC Systems

VSC Topologies

Modular Multi-level Converter (MMC)


• Nowadays used for HVDC converters
• Contains submodules (SM)
• Each SM represents a voltage level
• Number of SMs typically >100
• Submodules
are either
- Half Bridges:

or
- Full Bridges:

HVDC with VSC / MMC 9

Pulse Modulation

PWM for 2-Level VSC:



DIgSILENT

Comparison of sinusoidal and triangle curves


1.50

1.00

0.50

0.00

-0.50

-1.00

-1.50
0.00 0.20 0.40 0.60 0.80 [s] 1.00
Sinus: Control Voltage
Sawtooth Generator: Triangular Voltage

1.50

1.00

0.50

0.00

-0.50

-1.00

-1.50
0.00 0.20 0.40 0.60 0.80 [s] 1.00
Sw Model: PWM Signal

HVDC with VSC / MMC 10

81 HVDC and FACTS


4.1 Presentation: HVDC-VSC Systems

Pulse Modulation

Overmodulation:

DIgSILENT
1.50

1.00

0.50
VSC
in 0.00

Saturation! -0.50

-1.00

-1.50
0.00 0.20 0.40 0.60 0.80 [s] 1.00
Sinus: Control Voltage
Sawtooth Generator: Triangular Voltage

1.50

1.00

0.50

0.00

-0.50

-1.00

-1.50
0.00 0.20 0.40 0.60 0.80 [s] 1.00
Sw Model: PWM Signal

HVDC with VSC / MMC 11

Pulse Modulation DIgSILENT

Square wave (no modulation):


1.50

1.00

0.50

0.00

-0.50

-1.00

-1.50
0.00 0.20 0.40 0.60 0.80 [s] 1.00
Sinus: Control Voltage
Sawtooth Generator: Triangular Voltage

1.50

1.00

0.50

0.00

-0.50

-1.00

-1.50
0.00 0.20 0.40 0.60 0.80 [s] 1.00
Sw Model: PWM Signal

HVDC with VSC / MMC 12

HVDC and FACTS 82


4.1 Presentation: HVDC-VSC Systems

Pulse Modulation

Pulse Width Modulation Factor

linear overmodulation square-wave 

HVDC with VSC / MMC 13

Pulse Modulation

Modulation Factor
• No Modulation:

2 3
U ac  K o  U dc with K0   0.78

• Sinusoidal Modulation (three phase converter):

U control
U ac  K o U dc  Pm  K o U dc
U tri

3
with K0   0.612
2 2

HVDC with VSC / MMC 14

83 HVDC and FACTS


4.1 Presentation: HVDC-VSC Systems

Pulse Modulation

3rd Order Harmonic Modulation


• Extension of linear range of VSC is possible by
modulation of a 3rd order harmonic voltage
(3rd order harmonic injection)
• The 3rd order harmonic voltage is filtered by the VSC transformer
(transformer vector group with delta winding)
• Supported with PowerFactory Version 2017
(PWM Converter Element, Basic Data  Advanced):

SVPWM = Space Vector PWM

HVDC with VSC / MMC 15

Pulse Modulation

3rd Order Harmonic Modulation

HVDC with VSC / MMC 16

HVDC and FACTS 84


4.1 Presentation: HVDC-VSC Systems

Pulse Modulation

Modular Multi-level Converter (MMC)


• Typical Modulation Methods:
– Phase Shift PWM Modulation (PS-PWM)
– Phase Disposition PWM Modulation (PD-PWM)
– Nearest Level Control Modulation (NLC)
• MMC model for EMT simulation in PowerFactory

HVDC with VSC / MMC 17

Pulse Modulation

Small number
of submodules

HVDC with VSC / MMC 18

85 HVDC and FACTS


4.1 Presentation: HVDC-VSC Systems

Pulse Modulation

Modular Multi-level Converter (MMC)


• Phase Shift PWM Modulation (PS-PWM)

Example with
200 submodules

HVDC with VSC / MMC 19

Pulse Modulation

Modular Multi-level Converter (MMC)


• Phase Disposition PWM Modulation (PD-PWM)

Example with
200 submodules

HVDC with VSC / MMC 20

HVDC and FACTS 86


4.1 Presentation: HVDC-VSC Systems

Pulse Modulation

Modular Multi-level Converter (MMC)


• Nearest Level Control Modulation (NLC)

Example with
200 submodules

HVDC with VSC / MMC 21

VSC Models

Representation in PowerFactory
• Element “PWM Converter” (ElmVsc*)

For symmetric monopole For asymmetric


and bipole topologies monopole topologies
with earth return
HVDC with VSC / MMC 22

87 HVDC and FACTS


4.1 Presentation: HVDC-VSC Systems

VSC Models

Representation in PowerFactory
• Element “PWM Converter”
(ElmVsc*)

• 3rd Order Harmonic Modulation


(Basic Data  Advanced)
Supported with PowerFactory Version 2017

SVPWM = Space Vector PWM

• MMC model for EMT simulation in PowerFactory

HVDC with VSC / MMC 23

VSC Model Types – Cigré Nomenclature

Type Model Name Description

1 Full Physics Based Switches and diodes are represented by


differential equations
2 Full Detailed Models based on simpified nonlinear IGBT
models
2-L VSC

3 Models based on IGBT and diodes are represented by two value


simplified switchable resistors
resistances
4 Detailed Equivalent Based on Type 3 but with further topological
Circuit Models simplifications (node reduction)
MMC

5 Average Value Based on switching functions


Models
6 Simplified Average Controlled current and voltage sources without
Value Models any switching harmonics
7 RMS Load Flow Load Flow models will use steady state
Models converter outputs
HVDC with VSC / MMC 24

HVDC and FACTS 88


4.1 Presentation: HVDC-VSC Systems

VSC Model Types – Cigré Nomenclature

• Type 5:
– Non-repetitive behavior during protection operation can be incorporated
– Can be used to study harmonics generated by converters
– Implementation only in EMT (instantaneous values)
– Studies of AC and DC transients – high level control system design; harmonics
• Type 6:
– Non-repetitive behavior during protection operation can be incorporated
– Implementation in both RMS (phasor) and EMT (instantaneous values)
– Studies of remote AC and DC transients
• Type 7:
– Detailed transients are not modeled
– HVDC model reduces to a model of its steady-state output values
– Studies for power flow analysis
HVDC with VSC / MMC 25

Application: HVDC Link for Offshore Wind Power Plants

DC Link
155 kV AC AC
Neutral Point Earthing

~ =
AC Cable

= ~
Offshore Onshore
Converter Converter
(Remote-end
Reactor

HVDC Converter)

33 kV

Typical Setup with


Grid Connection Point
at Offshore Side

Cable Strings with Wind Turbines


HVDC with VSC / MMC 26

89 HVDC and FACTS


4.1 Presentation: HVDC-VSC Systems

Application: Embedded HVDC Link

• HVDC link is embedded in HVAC network


• Controllable active power transmission
• From/to dedicated points within the HVAC network
• Over long distances with comparable low losses
• Examples:
o Baixas/France – Santa Llogaia/Spain
2 x 1000 MW, MMC technology, +/- 320 kV DC voltage,
65 km DC cable, power inversion within 150 ms possible,
commissioning 2014/2015
o “Ultranet” within Germany (Emden – Osterath – Philippsburg),
MMC with full-bridge technology, 2000 MW, >300 km, sections with
DC cables and DC overhead lines, overhead line towers with DC
and AC lines, planned for 2020/2023
HVDC with VSC / MMC 27

Operational Behaviour

Control Modes
• HVDC link to offshore wind power plants
o Offshore converter (rectifier, sending side converter):
• AC voltage magnitude Vac and
• AC voltage angle phi (frequency f)
• “Builds” the offshore grid voltage
o Onshore converter (inverter, receiving side converter):
• DC voltage Vdc and
• AC voltage magnitude Vac or reactive power Q
• Cascaded controls possible
(e.g. fast Vac droop control with slow setpoint adaption
for Q control)

HVDC with VSC / MMC 28

HVDC and FACTS 90


4.1 Presentation: HVDC-VSC Systems

Operational Behaviour

Control Modes
• Embedded HVDC
o On one side:
• Active power P and
• AC voltage magnitude Vac or reactive power Q
o On other side:
• DC voltage Vdc and
• AC voltage magnitude Vac or reactive power Q
o Setpoint adaptions possible, for example:
• Active power participation depending on
power flow through parallel AC lines
• Active power droop depending on
voltage angle differences in AC network

HVDC with VSC / MMC 29

Operational Behaviour

Control Modes

HVDC with VSC / MMC 30

91 HVDC and FACTS


4.1 Presentation: HVDC-VSC Systems

Operational Behaviour

Reactive Power Capability (PQ Diagram)


• Q capability in all 4 quadrants
• Voltage-Dependent

HVDC with VSC / MMC 31

Operational Behaviour

Harmonic Emission
• 2-Level VSC:
o Large harmonic emission at switching frequency
o Harmonic filters necessary
• MMC:
o With high number of voltage levels (submodules),
the harmonic emission is negligible
o No harmonic filters needed

HVDC with VSC / MMC 32

HVDC and FACTS 92


4.1 Presentation: HVDC-VSC Systems

Operational Behaviour

Model of Voltage-Sourced Converters (VSC) in the Frequency Domain


for Harmonics Analysis
• Voltage source with impedance  Thevenin equivalent

AC
UDC

 Z(f)  I(f) Y(f) = 1/Z(f)


U(f)

Thevenin-Equivalent  Norton-Equivalent

HVDC with VSC / MMC 33

Operational Behaviour

Model of Voltage-Sourced Converters (VSC) for Harmonics Analysis

• VSC is:
o Harmonics Source,
o and Harmonics sink

I(f)
Y(f)

HVDC with VSC / MMC 34

93 HVDC and FACTS


4.2 Exercise: Analysis of HVDC-MMC

4.2 Exercise: Analysis of HVDC-MMC

This exercise will enable you to quickly deploy a HVDC-MMC model in a PowerFactory project
based on an already defined general template directly available in the project library. Templates
contain a set of network elements (and their dynamic controllers) that allow easy deployment of
a complex model. The studied system is the same as it has been proceeded with the HVDC-
LCC exercise.

The following preparatory steps are required:

• Import into PowerFactory the project file “HVDC 05 VSCStart”

Note: Importing: Main menu File → Import→ Data (*.dz; *.pfd)... and select the file on
disk that you want to import. If required, press the black arrow button to select another
path to which you want to import the objects in the file. Make sure that you do not
have already an active project before importing one.

• Activate the imported project and the study case “2016 BaseCase”. Hence, the current
state of the network corresponds to year 2016. By this time, there are no HVDC installa-
tions.
• Perform a load flow calculation and generate a summary report. Analyse the generation,
consumption and losses. Observe the power transfer between the two pre-defined zones.

The aim in this exercise is to implement the following HVDC systems:

• 50/60 Hz HVDC-MMC inter-connection link


• Embedded 50/50 Hz HVDC-MMC system within the 400 kV network
• Offshore HVDC-MMC link

4.2.1 HVDC Interconnection between 50 and 60 Hz networks

A link between a 50 and a 60 Hz network is being practiced in this part of the exercise. In the
project, a simplified “60 Hz network” is existing. The procedure of adding the system will be split
in two parts: (a) deploying the 60 Hz HVDC station and (b) adding the 50 Hz HVDC station to
bus “NH” in the AC Transmission System. Proceed as follows:

• Activate the study case “2020 Case 3 - 50/60 Hz HVDC Link”.


• Make sure the network variation “New 50/60 Hz Interconnection” is activated and that the
contained expansion stage is set to recording. This variation is empty and will store all
following modifications.
• Note that a new grid has been activated (named “60 Hz Network”) along to the original 50
Hz system.
• Step (a): Use the template “HVDC MMC 60Hz Station 900MW”to add the first part of the
HVDC system to the “60 Hz network” grid. Connect the 60 Hz transformer HV side to bus
“T 60Hz HVDC”. Leave for the time being the two DC cables unconnected.

• Step (b): Use the template “HVDC MMC 50Hz Station 900MW” to add the last part of the
HVDC system to the “AC Transmission System”.Place it in the green box marked “50/60Hz
HVDC Interconnection”.

HVDC and FACTS 94


4.2 Exercise: Analysis of HVDC-MMC

• Perform a load flow calculation and correct any errors that may have appeared.

Changing the power flow between the two networks

• Identify which HVDC converter controls active power flow.

• Apply various active power setpoints such that power is exported from the 60 Hz network
and re-run the load flow.
• Perform a “Total System Summary” report and mark the inter-grid flow values.
• Is reactive power flow between the two grids influenced by changing the active power
flow?
• To reverse the power direction do we need to change inverter/rectifier control modes (as
it was the case for LCC-HVDC)?

4.2.2 Embedded HVDC-MMC system

A further network expansion is planned in 2020 comprising of the integration of a HVDC-MMC


connection as shown in Figure 4.1. The same procedure will be taken as with the HVDC-LCC
unit deployed in the HVDC-LCC exercises, with the scope of observing the different behaviour
between the two.
Line ND-NE 1

Line ND-NE 2

GNB
Reactor NC Cap NC SG Typ..
Line NC-NE Load ND
100,0 km
NE NG
Step-up ..
Trf GNE

Load NE Load NG

Terminal GNE
Line NG-SH
500,0 km

Inactive SG
Out of Calculation ~
GNE
De-energised SG Ty..
Line NC-SC
800,0 km

Zones
Line NE-SC 1
1000,0 km

Sub-group North
Sub-group South
Elements belonging to more than 2 Zones
SH
Line SH-SI
5,0 km

SI

HVDC

SC
Load SI

Line SC-SF Line SF-SI


20,0 km 35,0 km
Line SC-SD 1

Line SC-SD 2
20,0 km

20,0 km

Load SC

SF

SD
HVDC_01_LCCSteadyState

Figure 4.1: Network expansion with a new embedded HVDC-MMC system

To add the HVDC connection proceed as follows:

95 HVDC and FACTS


4.2 Exercise: Analysis of HVDC-MMC

• Activate the study case “2020 Case 1 - Embedded HVDC Link”.


• Activate the network variation “New HVDC-MMC Link” and make sure that the contained
expansion stage is set to recording. This network variation is currently empty and is
intended to store all topological changes that follow when deploying the HVDC system.
• Use the template “HVDC MMC 900MW 50Hz/50Hz” to add the HVDC system to the grid.
Place it within the green marked rectangle across buses NE and SC (e.g. one can first
deploy it, then rotate (clockwise) the graphic and then connect to the buses). Make sure
the HVDC system is connected on both sides to the corresponding terminals

Note: Adding a template: click the “General templates” button ( ) from the drawing
toolbar. Select the right item from the selection window which appeares. Click once
in the single line diagram to show the network elements of the template. Lastly, after
you have decided where to deploy the template, click once more and add the model
to the network.

• Combine into a branch all network elements belonging to the HVDC system. The HVDC
system is thus simplified graphically in the main single line diagram to a single branch
representation.

Note: Group to branch: select all wished elements, right click on the selection and choose
Group as new symbol → and convert to branch element.

• To see the branch’s detailed representation right click the branch and choose “Show
Graphic”.

• Verify through a load flow calculation ( ) the consistency of the input data. Make sure to
fix any error or warning message in the output window before proceeding.

The “HVDC MMC 900MW 50Hz/50Hz” template has the single line diagram as shown in Fig-
ure 4.2.

Figure 4.2: “HVDC MMC 900MW 50Hz/50Hz” template - single line diagram

The trainer will explain all relevant parts of the model as well as the load flow relevant control
parameters.

HVDC and FACTS 96


4.2 Exercise: Analysis of HVDC-MMC

Operation of HVDC Converter 2

• Open the detailed HVDC branch diagram


• Identify the load flow control mode of each of the two HVDC stations.

• Set the power dispatch to:


– -810 MW and 0 MVAr (sending side converter)
– +800 MVAr (receiving side converter)
• Open the Load Flow calculation command and make sure that the “Consider Reactive
Power Limits” and “Automatic Shunt adjustment” options are activated
• Perform a load flow and manually verify the reactive power generated by “HVDC Converter
2”. Explain why the reactive power supplied is not reaching the setpoint.

Balancing power flow between HVDC and parallel AC lines by measuring active power
flow

Active power flow through the DC link can be controlled depending on a remote power mea-
surement. This can be very useful in case of trying to balance the power throughput in parallel
transmission branches. The active power setpoint of the HVDC is modified based on the actual
setpoint 𝑃𝑠𝑒𝑡 as introduced in the load flow pageof the PWM converter, the measured flow 𝑃𝑚𝑒𝑎𝑠 ,
a user defined proportional constant 𝐾𝑝, according to:

𝑃 = 𝑃𝑠𝑒𝑡 − 𝑃𝑚𝑒𝑎𝑠 · 𝐾𝑝

The aim in this exercise is to balance the power flow between the HVDC transmission and the
parallel Line NE-SC 1. To achieve this, do the following:

• Set the power dispatch back to initial settings:


– -200 MW and 0 MVAr (sending side converter, HVDC Converter 1)
– 0 MVAr (receiving side converter, HVDC Converter 2)

• Open the PWM converter element HVDC Converter 1, go to the Load Flow page, tab
P-setpoint Adaption.
• Enable the option “Active power participation”.
• For a one to one balancing, the participation factor must be set to 1.

• The active power must be measured at the cubicle connecting the Line NE-SC 1 to busbar
NE.
• Run the load flow calculation and monitor the results.
• Manually check the formula above and verify the correctness of results.

• Make sure that 𝑃𝑠𝑒𝑡 is set to zero (General tab of the PWM converter’s Load Flow page),
re-do the load flow and check at which side of the HVDC the parallel paths are delivering
equal power.

97 HVDC and FACTS


4.2 Exercise: Analysis of HVDC-MMC

Notes:

Balancing power flow between HVDC and parallel AC lines by measuring voltage angle
difference

Another method for balancing power flow is achieved by measuring the voltage angle difference
between two buses. In practice this is applied to buses where parallel transmission paths
are connected to. Using this method, the active power setpoint of the HVDC link is modified
according to equation below, where 𝐾𝑝ℎ𝑖 is a user defined participation factor, 𝑝ℎ𝑖𝑢𝑙𝑜𝑐𝑎𝑙 and
𝑝ℎ𝑖𝑢𝑟𝑒𝑚𝑜𝑡𝑒 are the voltage angles of two user defined network buses.

𝑃 = 𝑃𝑠𝑒𝑡 − 𝐾𝑝ℎ𝑖 · (𝑝ℎ𝑖𝑢𝑙𝑜𝑐𝑎𝑙 − 𝑝ℎ𝑖𝑢𝑟𝑒𝑚𝑜𝑡𝑒 )

Proceed as follows:

• Open the PWM converter element HVDC Converter 1, go to the Load Flow page, tab
P-setpoint Adaption.

• Disable the option “Active power participation”.


• Enable the option “Angle difference dependent P-droop”.
• Run a load flow and manually verify the equation above.
• What should be the participation factor 𝐾𝑝ℎ𝑖 such that the power flow gets balanced?
Mark the following results:
𝐾𝑝ℎ𝑖 = MW/deg; 𝑝ℎ𝑖𝑢𝑙𝑜𝑐𝑎𝑙 = deg; 𝑝ℎ𝑖𝑢𝑟𝑒𝑚𝑜𝑡𝑒 = deg
• Switch off Load SC and re-do the load flow. Note the results:
𝐾𝑝ℎ𝑖 = MW/deg; 𝑝ℎ𝑖𝑢𝑙𝑜𝑐𝑎𝑙 = deg; 𝑝ℎ𝑖𝑢𝑟𝑒𝑚𝑜𝑡𝑒 = deg

• Did the power balance between the HVDC and the parallel line change significantly?
• Discuss with your colleague other possible benefits for employing this function, besides
power balancing.

Notes:

Optional exercise: DC Voltage Control:

• The steady state DC voltage is controlled via the Load Flow page of the “HVDC Converter
2” dialog.

• Apply a reference at 1.03 and run the load flow.

HVDC and FACTS 98


4.2 Exercise: Analysis of HVDC-MMC

• Note below the main differences you observe in terms of steady state behaviour as com-
pared to the HVDC-LCC system studied in the previous section. Use the comparing of
results tool to observe the differences. After you have finished with the calculation set
back the DC voltage reference to 1 p.u..

Notes:

4.2.3 Offshore HVDC-MMC link

An Offshore Wind Power plant is planned for commissioning in 2020. The plant is shown in
Figure 4.3. It is connected with the HV system via an Offshore-Onshore HVDC link. For the
time being, at the point of common coupling there is installed an external grid element, which
ideally represents the Offshore converter. Further steps will be taken to replace it with an actual
HVDC system.

• Activate the study case “2020 Case 2 - Offshore HVDC Link”.


• Make sure the network variation “New Offshore HVDC Link” is activated and that the
contained expansion stage is set to recording.

• Remove the external grid, the PCC busbar and the 20/400 kV transformer as shown in
Figure 4.4.
• Use the template “HVDC MMC Offshore 500MW 20/400kV” to add the HVDC system to
the “Offshore Wind Farm” grid. Place it where the just removed External Grid element was
located. The HVDC link should be connected as in Figure

• Connect the Offshore side to the busbar “Windpark 20kV”


• Connect the Onshore side to bus “SF” in the “AC Transmission System”

Note: When in wire linking mode (there is a snapped wire connection linking the trans-
former to the mouse icon), click on the “AC Transmission System” tab of the Graphics
Board to open the target network diagram. Move the mouse to the place where the
transformer should be located and click once to deploy it. Finally, click once more on
the target busbar to link it.

99 HVDC and FACTS


DIgSILENT

360 MW Offshore Wind Farm Atlantis Project: Training


DIgSILENT
Graphic: Offshore Wind Fa
Date: 11/7/2016
PowerFactory 2016 SP4 Annex:

External Grid

HVDC and FACTS


PCC

Shunt/Filter

0
0

Tr
T-400/20-..
ONSHORE
Windpark 20k..

S5
S8(2) S7(2) S8(1) S7(1) S8 S7 S8 S7 S6 S6(2) S7(11) S8(11) S7(12) S8(12) S7(13) S8(13) S7(14)
OFFSHORE S8(14)

0,8 km
0,8 km 0,6 km 0,7 km 0,7 km 0,6 km 0,6 km 0,6 km 0,7 km 0,8 km 0,7 km 0,7 km 0,6 km 0,7 km 0,7 km 0,7 km 0,7 km 0,6 km 0,8 km

S5(2)
0,7 km
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Trf
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..

Trf(1)
Trf(2)
Trf(3)
Trf(4)
Trf(5)
Trf(6)
Trf(7)
Trf(8)
Trf(9)
S5
0,7 km
WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6..

S5(1)
0,6 km
S8(6) S7(6) S8(5) S7(5) S8(4) S7(4) S8(3) S7(3) S6 S6(3) S7(15) S8(15) S7(16) S8(16) S7(17) S8(17) S7(18) S8(18)
0,8 km 0,7 km 0,7 km 0,7 km 0,8 km 0,7 km 0,8 km 0,7 km 0,7 km 0,6 km 0,6 km 0,6 km 0,6 km 0,6 km 0,6 km 0,6 km 0,5 km 0,7 km

S5(3)
0,6 km
4.2

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..

Figure 4.3: 360 MW Offshore Wind Farm


WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6..

S8(10) S7(10) S8(9) S7(9) S8(8) S7(8) S8(7) S7(7) S6(1) S6(4) S7(19) S8(19) S7(20) S8(20) S7(21) S8(21) S7(22) S8(22)
0,6 km 0,5 km 0,6 km 0,5 km 0,6 km 0,6 km 0,6 km 0,6 km 0,6 km 0,8 km 0,7 km 0,7 km 0,7 km 0,7 km 0,8 km 0,7 km 0,7 km 0,8 km
S5(4)
0,8 km

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..
Trf..

WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6.. WTG 6..

100
Exercise: Analysis of HVDC-MMC
4.2 Exercise: Analysis of HVDC-MMC

Figure 4.4: External grid elements to be removed

Figure 4.5: Detailed HVDC System to be implemented

Optional Exercise: Station Controller

The station controller (ElmStactrl) is an object which can be used to coordinate the reactive
power control of several machines. The task for the following exercise is to find the reactive
power set point for the wind turbines to have a power factor of 1 at the PCC.

Note: The station controller reactive power set point will be added as an offset to the local
reactive power or voltage set point of the generators. You have to set the station controller
out of service or remove the generator from the station controller to use again the local
set point!

• Select all static generators (of the wind turbines) and define a station controller (right click
→ Define→ Station Control)
• Set the station controller on the load flow page to Control Mode: “Power Factor Control”

101 HVDC and FACTS


4.2 Exercise: Analysis of HVDC-MMC

• Select for Control Q at the terminal which connects the wind farm to the offshore converter
station.

• Change the reactive power set point of all static generators back to 0 Mvar.
• Run a load flow and check if the power factor becomes 1 at the PCC.
• Verify the influence of compensating the reactive power to the reactive power supply from
the Offshore converter.

• Verify the influence of compensating the reactive power to the reactive power supply from
the Onshore converter.

- How high is the reactive power output of the single static generator?

- MVar.

• Use the “Voltage Setpoint Adaption” option of the Station Controller to balance the voltage
on a single wind farm feeder.

PowerFactory files

File Name Description


HVDC 05 VSCStart Starting project of exercise 4.2 Exercise:
Analysis of HVDC-MMC
HVDC 05 VSCSteadyState Solution of exercise 4.2 Exercise: Analysis of
HVDC-MMC

Notes:
...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

HVDC and FACTS 102


5 HVDC-VSC - Dynamic Analysis

Purpose: Comprehension of the VSC-HVDC systems with focus on dynamics


analysis

Content: Modelling approaches


• Converter models for EMT analysis (focus on MMC topologies)

• Converter models for stability analysis (RMS-simulation)


• PowerFactory Built-In Models for EMT and Stability Simulation
HVDC Control and Simulation
• Converter model for EMT analysis

• Converter model for stability analysis (RMS-simulation)


• PowerFactory Built-In Models for EMT and Stability Simulation
• HVDC Applications (embedded, asynchronous grid interconnec-
tion, offshore)

Control Scheme for Stability and EMT Analysis


• Active Power Control
• DC Voltage Control

• Reactive Power/AC Voltage Control

Level: Advanced.

5.1 Presentation: HVDC-VSC System Dynamics

Notes:
...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

103 HVDC and FACTS


5.1 Presentation: HVDC-VSC System Dynamics

Dynamics of
HVDC with VSC / MMC

DIgSILENT GmbH

Control Scheme for VSC/MMC

Source: Cigré Technical Brochure No. 604


Dynamics of HVDC with VSC / MMC 2

HVDC and FACTS 104


5.1 Presentation: HVDC-VSC System Dynamics

Control Scheme for VSC/MMC

DSL Built-in
converter model
or DSL

Source: Cigré Technical Brochure No. 604


Dynamics of HVDC with VSC / MMC 3

Control Scheme for VSC/MMC

Dynamics of HVDC with VSC / MMC 4

105 HVDC and FACTS


5.1 Presentation: HVDC-VSC System Dynamics

Control Scheme for VSC/MMC

Dynamics of HVDC with VSC / MMC 5

Instantaneous / dq-Vectors

ia (t ) b

iabc (t )  ib (t )  
iabc (t )
ic (t ) 
a

Reference frame fixed in time

Dynamics of HVDC with VSC / MMC 6

HVDC and FACTS 106


5.1 Presentation: HVDC-VSC System Dynamics

Instantaneous / dq-Vectors


i (t )  b

i 0 (t )  i (t ) 
i (t )
 i0 (t ) 
 
iabc (t )  T 0 i 0 (t ) a/

Reference frame fixed in time

Dynamics of HVDC with VSC / MMC 7

Instantaneous / dq-Vectors


i   i  ji q
i   T dq (t )i dq i (t ) 

i   e
j ref t
i dq i dq
d

u

Rotating reference frame

Dynamics of HVDC with VSC / MMC 8

107 HVDC and FACTS


5.1 Presentation: HVDC-VSC System Dynamics

PLL (Phase-Locked Loop)

The PLL provides the reference for VSC controls in dq-system


• The PLL (Phase-Locked Loop) synchronises the voltage
with the d-axis
• Achieved by dq-Transformation of voltages and controlling
the q-component to zero
• Provides the voltage angle to controller

Dynamics of HVDC with VSC / MMC 9

PLL (Phase-Locked Loop)

Dynamics of HVDC with VSC / MMC 10

HVDC and FACTS 108


5.1 Presentation: HVDC-VSC System Dynamics

Control Scheme for VSC/MMC

Dynamics of HVDC with VSC / MMC 11

Control Scheme for VSC/MMC

Dynamics of HVDC with VSC / MMC 12

109 HVDC and FACTS


5.1 Presentation: HVDC-VSC System Dynamics

Control Scheme for VSC/MMC

Dynamics of HVDC with VSC / MMC 13

Control Scheme for VSC/MMC

Dynamics of HVDC with VSC / MMC 14

HVDC and FACTS 110


5.1 Presentation: HVDC-VSC System Dynamics

Control Scheme for VSC/MMC

Dynamics of HVDC with VSC / MMC 15

Protection Scheme for Network Faults

Protection against too high currents:


• Blocking of converter:
o All IGBTs are switched off
o Anti-parallel diodes remain

MMC Submodule
Protection against too high DC voltages:
• P-setpoint adaption with P/Vdc droop
• DC chopper:
o Resistor dumps energy
o Switched on via power electronic devices
o Pulsed operation possible
o Either with hysteresis controller or with V-I-characteristic

Dynamics of HVDC with VSC / MMC 16

111 HVDC and FACTS


5.1 Presentation: HVDC-VSC System Dynamics

Protection Scheme for Network Faults

DC Chopper

Source: Cigré Technical Brochure No. 604


Dynamics of HVDC with VSC / MMC 17

Example: HVDC Link for Offshore Wind Power Plants

DC Link
155 kV AC AC
Neutral Point Earthing

~ =
AC Cable

= ~
Offshore Onshore
Converter Converter
(Remote-end
Reactor

HVDC Converter)

33 kV

Typical Setup with


Grid Connection Point
at Offshore Side

Cable Strings with Wind Turbines


Dynamics of HVDC with VSC / MMC 18

HVDC and FACTS 112


5.1 Presentation: HVDC-VSC System Dynamics

Short-Circuit in Onshore Grid

Example: Short-Circuit near to HVDC Onshore Terminal


Results for
HVDC
Onshore
Converter

Dynamics of HVDC with VSC / MMC 19

Short-Circuit in Offshore Wind Power Plant AC Grid

Short-Circuit inside the Offshore Wind Power Plant


• Example: EMT simulation of Short-circuit inside first cable string
• Converter model
in phasor-domain
(switching of
valves neglected)

Voltages and currents


at beginning of
cable string

Voltages and currents


at end of cable string

Dynamics of HVDC with VSC / MMC 20

113 HVDC and FACTS


5.1 Presentation: HVDC-VSC System Dynamics

Representation in Frequency Domain

Model of Voltage-Sourced Converters (VSC) in the Frequency Domain


for Analysis of Harmonics and Small Signal Stability
• Voltage source with impedance  Thevenin equivalent

AC
UDC

 Z(f)  I(f) Y(f) = 1/Z(f)


U(f)

Thevenin-Equivalent  Norton-Equivalent
• Equivalent impedance includes transfer function of controller

Dynamics of HVDC with VSC / MMC 21

Representation in Frequency Domain

Small Signal Stability Analysis in the Frequency


• VSC controller forms closed loop with network impedance and other
controllers
IGrid(f)
ZGrid(f)
IVSC(f) YVSC(f) UGrid(f)
UTerminal(f)

VSC Grid

IVSC(s) + IGrid(s) UTerminal(s)


 ZGrid(s)
-

YVSC(s)

Dynamics of HVDC with VSC / MMC 22

HVDC and FACTS 114


5.1 Presentation: HVDC-VSC System Dynamics

Representation in Frequency Domain

Small Signal Stability Analysis in the Frequency


• VSC controller forms closed loop with network impedance and other
controllers
IGrid(f)
ZGrid(f)
IVSC(f) Z (f) UGrid(f)
VSC

VSC Grid
IVSC(s) + IGrid(s)
 𝑰𝑽𝑺𝑪 (𝒔)
- 𝑰𝑮𝒓𝒊𝒅 (𝒔) =
ZGrid(s) 𝒁 𝒔
𝟏 + 𝑮𝒓𝒊𝒅
𝒁𝑽𝑺𝑪 (𝒔)
ZVSC(s)

• Risk of sub-synchronous and super-synchronous instability


Dynamics of HVDC with VSC / MMC 23

Representation in Frequency Domain

Small Signal Stability Analysis in the Frequency


• Instability occurs if Nyquist Criterion is not met
Im
1
Unit Circle
𝑰𝑽𝑺𝑪 (𝒔)
𝑰𝑮𝒓𝒊𝒅 (𝒔) =
𝒁 𝒔 Gain Margin
𝟏 + 𝑮𝒓𝒊𝒅
𝒁𝑽𝑺𝑪 (𝒔)
Re
-1 1
Phase Margin

𝒁𝑮𝒓𝒊𝒅 𝒔 -1
𝒁𝑽𝑺𝑪 (𝒔)

• If stability is given, but with small (insufficient) margin, harmonics at


and near to frequency of intersection with unit circle become very high
Dynamics of HVDC with VSC / MMC 24

115 HVDC and FACTS


5.2 Exercise: Analysis of Embedded HVDC-MMC

5.2 Exercise: Analysis of Embedded HVDC-MMC

This exercise will focus on dynamic simulation of the MMC based HVDC systems developed in
the previous part. The following preparatory steps are required:

• Import into PowerFactory the project file “HVDC 06 VSCStart”


• Activate the imported project and the study case “2020 Case 1 - Embedded HVDC Link”.
This case is identical with the HVDC-LCC implementation studied before excepting only
the chosen HVDC technology.

Identifying the converter control modes:

• Note for each PWM converter (“HVDC Converter 1” and “HVDC Converter 2”) the load
flow control modes. These operation modes will be used as starting point in the dynamic
simulation:

• Display the Composite Model/Frame of each of the two HVDC stations - you will see the
same graphic as shown in Figure 5.1. The trainer will explain the function of the different
blocks.
• Are there any noticeable differences between the control structures of the two converters?

• Identify the Outer and the Inner control loops. Explain the control purpose of each one of
them

• Open the common models of the “Outer Control” blocks of each of the two converters.
Identify the value of parameter modeP for each of the two HVDC converter controllers.
What is the difference in the control approach between the two?

HVDC and FACTS 116


5.2

117
Frame Non islanded control: Non islanded HVDC control (simplified for RMS & EMT simulation)
DIgSILENT

Idc Measurement Idc


0
StaImea block
1 0
Protections
2
ElmDsl
3

Vdc+ Measurement Vdcp


0
StaVmea Vdc
Vdc Low pass filter 0
ElmDsl
Vdc- Measurement Vdcn
1
StaVmea

0 0
Vac_meas Id_ref
1 Signal Calculations 0 1 0 0 Converter
P_meas Outer Control
2 ElmDsl 1 2 ElmVsc*
Q_meas ElmDsl Iq_ref Vcd Pmr
3 2 3 1 1 0 1 0 1
Exercise: Analysis of Embedded HVDC-MMC

Valpha Vcq Limitations Pmi


Vac Measurement 0 0 Inner Control 1 2 2
Vbeta Vd ElmDsl 1
StaVmea 1 1 0 2 ElmDsl
Vq
1 3

Ialpha dq transformations Id
0 2 ElmDsl 2 4
Iac Measurement Ibeta Iq
StaImea 1 3 3 5

cosref
PLL 0 3
sinref
ElmPhi__pll 1 4
AC_Circuit_Br..

Figure 5.1: Composite model of the HVDC control system (for grid-tied applications)
ElmCoup,StaSw..

HVDC and FACTS


5.2 Exercise: Analysis of Embedded HVDC-MMC

5.2.1 Dynamic Analysis Overview

It is of interest to test the HVDC system performance for various operational cases, below a
short list of valid studies which we will perform in this exercise.

Steady state operational changes (either due to a steady state change of the system or an
internal reference change):

• Active power reference change


• Reactive power reference changes
• DC Voltage reference changes

Network disturbance events, e.g.:

• AC network faults (both remote and closeby the HVDC stations)


• Fault and loss of parallel AC line
• Others: Loss of largest generator in the system

5.2.2 Steady state operational changes

Changing active power throughput of the HVDC link

• Apply a step change in power on the HVDC system from the initial 0.22 p.u. importing to
0.4 p.u. importing. For this purpose, create an event at 0 seconds on parameter “P ref” of
common model “Outer Control” of “HVDC Converter 1”.

Note: Creating a parameter event on a common model:

• Open the simulation events dialog ( )


• Create a new event ( )
• Select as event type a “Parameter Event (EvtParam)”. Click OK.
• Set the event time
• Set the reference “Element” as being the corresponding common model.
• Set the parameter name and new value as required.

Define result variable sets for the analysis:

• for “HVDC Converter 1”: (Psum:busac and Qsum:busac), power on the DC side (Psum:busdp)
• for network buses: bus NB voltage magnitude (u1), AC voltages on both sides of the
HVDC system (substations NE and SC)
• for “HVDC Converter 2”:(Psum:busac and Qsum:busac), power on the DC side (Psum:busdp)
• busbars NE, SC: voltage magnitude (u1)
• common model “Outer Control” of “HVDC Converter 1”: Vac meas, Vac ref, Vdc meas,
Vdc ref, Q meas, Q ref, Id ref, Iq ref

HVDC and FACTS 118


5.2 Exercise: Analysis of Embedded HVDC-MMC

Set up the simulation (Calculation of initial conditions dialog):

• EMT simulation
• Variable time step simulation: “Automatic step size adaptation” checkbox ticked.

• Integration step size (minimum): 10 us


• Integration step size (maximum): 100 us

Perform the simulation:

• Run the simulation for 1 s


• Plot the active and reactive power output of “HVDC Converter 1”
• Plot the active and reactive power setpoints (P ref and Q ref ) of the Outer Control model

• Make observations on the obtained results, the expected behaviour and the behaviour
of a HVDC-LCC solution (setpoint tracking, response time, influence of active power to
reactive component).

Reverse power flow simulation:

• Reverse the power flow at 0.0 s in the simulation to a setpoint of 0.4 p.u.

• Make observations on the difference in procedure/behaviour for an HVDC-VSC based


solution as compared to an HVDC-LCC one.

Reactive power setpoint change:

• What is the reactive current control mode of converter “HVDC Converter 1” (i.e. parameter
mode Q of Outer Control model)?

• Apply a 50% reactive power injection on “HVDC Converter 1” at time 0.0s.


• Plot the reactive power (measured and setpoint) as well as the AC voltage magnitude at
bus NE.

• What is the voltage increase at this busbar by supplying reactive power?


• How would the reactive power be controlled in the HVDC-LCC solution?

119 HVDC and FACTS


5.2 Exercise: Analysis of Embedded HVDC-MMC

Notes:

DC Voltage setpoint change:

Define additional results for the analysis:

• common model “Outer Control” of “HVDC Converter 2”: Vdc meas, Vdc ref

• Change the DC voltage on the DC link at 0.0s to 1.02 p.u.

Note: Changing the DC voltage on the HVDC system implies changing the parameter
Vdc ref of the Outer Control of the HVDC station which actively controls the DC
voltage.

• Plot the DC voltage and check if it is behaving correctly.


• What is the influence of the DC voltage change to the steady state values of active/reactive
power output on both HVDC sides?

Notes:

5.2.3 Response to network disturbances

Response to AC fault applied on a network bus:

• Define a 3-phase short circuit on bus NB (in the ”AC Transmission System”) at 0.0 s with
0 Ohm fault impedance for a duration of 100ms duration (i.e. a second event after 100ms
to clear the fault).

Define additional results for the analysis:

• busbar NB: voltage magnitude (u1)


• for “HVDC Converter 1”: AC (phase A,B,C) and DC currents;

Set up the simulation (Calculation of initial conditions dialog):

HVDC and FACTS 120


5.3 Exercise: Analysis of Offshore HVDC-MMC

• EMT simulation

• Variable time step simulation: “Automatic step size adaptation” checkbox ticked.
• Integration step size (minimum): 10 us
• Integration step size (maximum): 50 us

Perform the simulation:

• Run the simulation for 2 s and visualise the results in the range where the fault is applied
• Is the system recovering after the event?
• What happens with the active and reactive current references id ref and iq ref of the Outer
Control models during the fault?
• What is the purpose of parameter 𝐾 𝑓 𝑙𝑡 of the Outer Control models?

Fault and loss of AC parallel line:

• Define a 3-phase short circuit in the middle of “Line NE-SC1” at 0.5 s with 0 Ohm fault
impedance for a duration of 100ms duration (i.e. a second event after 100ms to clear the
fault). Make sure to enable the short circuit on the EMT-Simulation page.
• Run the simulation for 2 s and visualise the results
• Is the system recovering after the event?

5.3 Exercise: Analysis of Offshore HVDC-MMC

This exercise will focus on dynamic behaviour of the HVDC protection system when an AC fault
is applied close to the Onshore converter. The following preparatory steps are required:

• The project from the previous exercise can be reused. Alternatively, import again into
PowerFactory the project file “HVDC 06 VSCStart”.
• Activate the imported project and the study case “2020 Case 2 - Offshore HVDC Link”.

AC fault close to the Onshore Station

• Create a 100 ms metallic fault on bus SF (the bus to which the HVDC Onshore station
connects).

Define result variable sets for the analysis:

• for “HVDC Onshore Converter”: (Psum:busac and Qsum:busac), power on the DC side
(Psum:busdp)
• for network buses: bus SF voltage magnitude (u1)
• for “HVDC Offshore Converter”:(Psum:busac and Qsum:busac), power on the DC side
(Psum:busdp)

121 HVDC and FACTS


5.3 Exercise: Analysis of Offshore HVDC-MMC

• common model “DC Chopper Control” of composite model “Chopper Control”: c:UdcUpper,
c:udc, s:gate

Set up the simulation (Calculation of initial conditions dialog):

• EMT simulation

• Variable time step simulation: “Automatic step size adaptation” checkbox ticked.
• Integration step size (minimum): 15 us
• Integration step size (maximum): 100 us
• Start time: -10ms

Perform the simulation:

• Run the simulation for 0.3 s and visualise the results


• Monitor the DC power injected by the Offshore station before, during and after the event.

• Plot the DC voltage and the chopper trigger limit. Plot also the gate command signal that
triggers the DC chopper.
• Why is the DC link voltage increasing?
• When ist the DC chopper being started?

• Is the system recovering after the event?


• Note the maximum DC voltage that the DC cable must withstand for riding through the
event. Notes:

PowerFactory files

File Name Description


HVDC 06 VSCStart Starting project of exercise 5.2 Exercise:
Analysis of Embedded HVDC-MMC
HVDC 06 VSCDynamics Solution of exercise 5.2 Exercise: Analysis of
Embedded HVDC-MMC

Notes:
...............................................................................................

HVDC and FACTS 122


6 FACTS – Static Var System (SVS)

Purpose: Comprehension of the Static Var Systems.

Content: Static Var Systems overview


• Basic functionality and usage
• Typical topologies and configurations

Implementation of SVS in PowerFactory


• Available models: SVS, Switchable Shunts, Load Flow controllers
• Steady state control options

• Dynamic controllers and behaviour


• Implementation in PowerFactory of SVSMO1 WECC standard-
ised model

Level: Advanced.

6.1 Presentation: Static Var System (SVS)

Notes:
...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

...............................................................................................

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...............................................................................................

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123 HVDC and FACTS


6.1 Presentation: Static Var System (SVS)

Flexible AC Transmission
Systems
(FACTS)

DIgSILENT GmbH

DIgSILENT PowerFactory – HVDC & FACTS

Overview of FACTS

• Shunt Compensation
– SVC (Static Var Compensator)

– STATCOM (Static Compensator)

• Series Compensation
– TCSC (Thyristor Controlled Series Compensator)

– SSSC (Static Synchronous Series Compensator)

• UPFC – Unified Power Flow Controller

DIgSILENT PowerFactory – HVDC & FACTS

HVDC and FACTS 124


6.1 Presentation: Static Var System (SVS)

Static VAR Compensation


with PowerFactory

DIgSILENT GmbH

DIgSILENT PowerFactory – HVDC & FACTS

Basics of
Shunt Compensation

DIgSILENT PowerFactory – HVDC & FACTS

125 HVDC and FACTS


6.1 Presentation: Static Var System (SVS)

Line midpoint compensation

• Power flow through an ideal reactance


𝑽𝒔 𝑽𝒓
P= 𝑿
𝒔𝒊𝒏(𝜹)
𝑽𝒓
Q= 𝑿
(𝑽𝒓 − 𝑽𝒔 𝒄𝒐𝒔 𝜹 )

𝑽𝒔 𝑽𝒓

DIgSILENT PowerFactory – HVDC & FACTS

Line midpoint compensation

• Introducing a voltage source in the middle of the line


• And assuming 𝑽𝒔 = 𝑽𝒓 = 𝑽𝒎 = 𝑽
𝑽𝒎
𝑽𝒔 𝜹
𝑽𝒓
𝟒
𝑰𝒎𝒓
𝜹

𝜹
𝟐

• Power transmitted to node r: 𝟐𝑽𝟐 𝜹


𝑷= 𝒔𝒊𝒏( )
𝑿 𝟐
𝟒𝑽𝟐 𝜹
• Reactive injection to keep 𝑽𝒔 = 𝑽𝒓 = 𝑽𝒎 : 𝑸= 𝟏 − 𝒄𝒐𝒔
𝑿 𝟐

DIgSILENT PowerFactory – HVDC & FACTS

HVDC and FACTS 126


6.1 Presentation: Static Var System (SVS)

Line midpoint compensation

• Power transfer can be doubled by using ideal mid point compensation

𝜹
𝟎 𝝅/2 𝝅
DIgSILENT PowerFactory – HVDC & FACTS

Line midpoint compensation

• Example: 3 ideal compensators 𝟒𝑽𝟐 𝜹


𝑷= 𝒔𝒊𝒏( )
• 4 times P can be transferred to Vr 𝑿 𝟒

𝟖𝑽𝟐 𝜹
𝑸= 𝟏 − 𝒄𝒐𝒔
𝑿 𝟒

𝑽𝒎𝟏 𝑽𝒎𝟐 𝑽
𝒎𝟑
𝑽𝒔 𝑽𝒓

DIgSILENT PowerFactory – HVDC & FACTS

127 HVDC and FACTS


6.1 Presentation: Static Var System (SVS)

Line midpoint compensation

Overview line midpoint compensation:

• Best place to apply compensation is in the middle of the line

• Transmittable power doubles with each doubling of the segments

• In practice:
– single midpoint compensation is applied
– Power transferred is increased at expense of reactive power
compensation

DIgSILENT PowerFactory – HVDC & FACTS

End of line compensation

• Voltage stability limit for radials represented with PV Curves

𝑽 PF=0.8
(lead)
𝑿
𝒁

PF=1
different
power factors
PF=0.8
(lag) 𝑷

• Injection of over-excited reactive power at the load increases power


transfer capability

DIgSILENT PowerFactory – HVDC & FACTS

HVDC and FACTS 128


6.1 Presentation: Static Var System (SVS)

Var Compensation Overview

Advantages

• Improves power transfer capability

• Improves voltage stability

• Improves transient stability

• Can provide further ancillary services (e.g. Power Oscillation Damper)

• Improvement of local power quality (depends on technology)

DIgSILENT PowerFactory – HVDC & FACTS

Var Compensation Overview

Disadvantages

• Additional investment cost

• Increase in harmonic levels ( depends on technology)

• Impact to system resonances ( further investigation required )

DIgSILENT PowerFactory – HVDC & FACTS

129 HVDC and FACTS


6.1 Presentation: Static Var System (SVS)

Var Compensation Devices

Types of Static VAR Generators

• Variable Impedance Type


• Mechanically-Switched Capacitor (MSC)

• Thyristor-Switched Reactor (TSR)

• Thyristor-Switched Capacitor (TSC)

• Thyristor-Controlled Reactor (TCR)

• Switching Converter Type


• Static Synchronous Compensator (STATCOM)

DIgSILENT PowerFactory – HVDC & FACTS

Mechanically-Switched Capacitor (MSC)

Properties

• Inexpensive (+)

• Harmonics (+)

• Stepwise adjustment (-)

• Wear of breaker to consider (-)

• Limited number of operations (-)

• Limited dynamic response (-)

• V-I impedance characteristic (-)

DIgSILENT PowerFactory – HVDC & FACTS

HVDC and FACTS 130


6.1 Presentation: Static Var System (SVS)

Mechanically-Switched Capacitor/Reactor (MSC/MSR)

Main weak component: Circuit Breaker

• Current must be interrupted properly

• High inrush current (for MSC)

• Risk of re-ignition or surges (for MSR)

• Number of operations limit:


• Example – max 1-2 operations per minute

• Vacuum CB and/or point on wave switching for

improved performance

DIgSILENT PowerFactory – HVDC & FACTS

Thyristor-Switched Reactor (TSR)


Thyristor-Switched Capacitor (TSC)

Properties

• Inexpensive (+)

• Harmonics (+)

• Switching Thyristor (+)

(instead of breaker)

• Stepwise adjustment (-)

• Limited dynamic response (-)

• V-I impedance characteristic (-)

DIgSILENT PowerFactory – HVDC & FACTS

131 HVDC and FACTS


6.1 Presentation: Static Var System (SVS)

Thyristor-Controlled Reactor (TCR)

Thyristor-Controlled Reactor (TCR)

• Thyristor firing angle is controlled

• Smooth adjustment of reactive power

• Non-sinusoidal current injection

Single phase 3 phase arrangement

DIgSILENT PowerFactory – HVDC & FACTS

Thyristor-Controlled Reactor (TCR)

Thyristor-Controlled Reactor (TCR)

• Operating V-I area:

• Impedance characteristic

• Reactive power: 𝑉 2 characteristic

• Q is more when you don’t need it

• Q is least when you need it most

DIgSILENT PowerFactory – HVDC & FACTS

HVDC and FACTS 132


6.1 Presentation: Static Var System (SVS)

Thyristor-Controlled Reactor (TCR)

Thyristor-Controlled Reactor (TCR)

• Harmonic currents injection of odd harmonics

• Zero sequence harmonics are trapped for three phase arrangements

(delta connected)

• Magnitude of harmonics depends on firing angle

• Possibility of minimizing harmonics by employing parallel units


Susceptance output 𝟔𝟎%:
𝜶𝟏 = 𝟎°
𝜶𝟐 = 𝟎°
𝜶𝟑 = 𝟐𝟎°
Only module 3
𝜶𝟒 = 𝟗𝟎° generates harmonics

DIgSILENT PowerFactory – HVDC & FACTS

Thyristor-Controlled Reactor (TCR)

Thyristor-Controlled Reactor (TCR)

Example:

Firing angle 0 deg voltage

current

DIgSILENT PowerFactory – HVDC & FACTS

133 HVDC and FACTS


6.1 Presentation: Static Var System (SVS)

Thyristor-Controlled Reactor (TCR)

Thyristor-Controlled Reactor (TCR)

Example:

Firing angle 40 deg voltage

current

DIgSILENT PowerFactory – HVDC & FACTS

Thyristor-Controlled Reactor (TCR)

Thyristor-Controlled Reactors:

• Less expensive than Switching converter types (+)

• Relatively fast response (+)

• Continuous control (+)

• Harmonics (-)

• V-I impedance characteristic (-)

DIgSILENT PowerFactory – HVDC & FACTS

HVDC and FACTS 134


6.1 Presentation: Static Var System (SVS)

Static Var System (SVS)

• Implementation based on TCR


• Contains any combination of TCR/TSC/TSR/MSC
• PowerFactory implementation as “ElmSvs”
• Supporting all PowerFactory calculation functions

DIgSILENT PowerFactory – HVDC & FACTS

Static Var System (SVS)

• Necessary control functions:

• TCR susceptance control

• Voltage droop control

• Behaviour during over/under voltage

• MS Shunt control

• Unit protection functions

DIgSILENT PowerFactory – HVDC & FACTS

135 HVDC and FACTS


6.1 Presentation: Static Var System (SVS)

Static Var System (SVS)

• Example: WECC standardized SVS controller – SVSMO1

REF: WECC Generic Static Var System Models for the Western Electricity Coordinating Council
DIgSILENT PowerFactory – HVDC & FACTS

Static Var System (SVS)

Example: WECC standardized SVS controller


• Slow Susceptance Regulator
• Keeping susceptance output within pre-defined limits

DIgSILENT PowerFactory – HVDC & FACTS

HVDC and FACTS 136


6.1 Presentation: Static Var System (SVS)

Static Var System (SVS)

Example: WECC standardized SVS controller

• Voltage droop control

/Isetp /I /I[pu]

𝒅𝒓𝒐𝒐𝒑/𝟏𝟎𝟎
Xc = 𝑸𝒓𝒂𝒏𝒈𝒆
𝑺𝒃𝒂𝒔𝒆
DIgSILENT PowerFactory – HVDC & FACTS

Static Var System (SVS)

Example: WECC standardized SVS controller

• Behaviour during over/under voltage


• Controls susceptance depending on min/max voltage thresholds
• Provides relatively fast reaction during network faults

DIgSILENT PowerFactory – HVDC & FACTS

137 HVDC and FACTS


6.1 Presentation: Static Var System (SVS)

Static Var System (SVS)

Example: WECC standardized SVS controller

• MSS Shunt Control functions

• Controls the number of switched in shunts

• Shunts can be capacitors or reactors

• Objective: constrain TCR susceptance within a pre-defined control band

• Initial fast reaction time (hundreds of ms) if susceptance outside max lim

• Time delay before second switching

DIgSILENT PowerFactory – HVDC & FACTS

Static Var System (SVS)

Example: WECC standardized SVS controller


• MSS Shunt Control functions
B
Switch shunt (short delay)
𝑩𝒎𝒂𝒙𝟐
Switch shunt (long delay)
𝑩𝒎𝒂𝒙𝟏
Steady state region
Steady state region time
𝑩𝒎𝒊𝒏𝟏
Switch shunt (long delay)
𝑩𝒎𝒊𝒏𝟐
Switch shunt (short delay)

DIgSILENT PowerFactory – HVDC & FACTS

HVDC and FACTS 138


6.1 Presentation: Static Var System (SVS)

Static Var System (SVS)

SVS Control Implementation in PowerFactory acc. to WECC (SVSMO1)

DIgSILENT PowerFactory – HVDC & FACTS

139 HVDC and FACTS


6.2 Exercise: SVS Integration and Analysis in Power System

6.2 Exercise: SVS Integration and Analysis in Power System

6.2.1 Integration of the WECC SVSMO1 template in the Transmission Network

• Load into PowerFactory the project file FACTS 01 SVSStart;

• Activate the study case “2020 Study Case with new SVS”.
• Use the template SVSMO1 MSC 100/-100/-80MVAr located in the project library to add
the SVS model to the grid. Place it within the green marked rectangle “SVS” and connect
the step up transformer to bus SG (see Figure 6.1).

Note: Adding a template: click the “General templates” button ( ) from the drawing
toolbar. Select the right item from the selection window which appeares. Click once
in the single line diagram to show the network elements of the template. Lastly, after
you have decided where to deploy the template, click once more and add the model
to the network.

• Change the step up transformer type to the project library type “Step-up Trf Type 400/20kV”

• Verify through a load flow calculation ( ) the consistency of the input data. Make sure to
fix any error or warning message in the output window before proceeding.

Figure 6.1: SVSMO1 MSC 100/-100/-80MVAr template - single line diagram

By default, the template comes pre-configured for use, containing a TCR/TSC (rated 100/-100)
and eight mechanically switched shunts rated 80 Mvar (7 MSCs and 1 MSR). The functionality
of the unit “as is” can be quickly verified by executing the below commands:

• Run the Load Flow command as pre-set

• Note the reactive power consumed/generated by the TCR/TSC (i.e. the “Static Var Sys-
tem” element)

HVDC and FACTS 140


6.2 Exercise: SVS Integration and Analysis in Power System

• Identify the load flow control objective of the “Static Var System” as seen in the load flow
page. Which busbar voltage is controlled by default?
• Note the shunt actual tap position of the MSC/MSR.
• Identify the load flow “Shunt Controller” element (accessible only from the Data Manager)
• What is the control objective of the shunts? Observe also the output window warnings if
the controller entered in limitation.

6.2.2 Changing the SVSMO1 rated values to comply with practical specifications

For the purpose of the exercise, the template which was deployed must be re-configured to fit
the practical installation specifications (and shown in Figure 6.2.

The following Static Var System is planned for integration:

• TCR: 1000 Mvar


• TSC: 2 x 400 Mvar
• MSC 1: 10 x 50 Mvar
• MSC 2: 10 x 50 Mvar

Figure 6.2: SVS actual installation in the single line diagram

Updating basic and load flow SVS unit parameters

Please follow the instructions below:

• Since only two MSCs are required, the other six shunts can be deleted. Hence, remove
the elements “Shunt 3”, “Shunt 4” and so on up to “Shunt 8” (included).

141 HVDC and FACTS


6.2 Exercise: SVS Integration and Analysis in Power System

• From the single line diagram, open the “Static Var System” element and edit:
– Q Reactance, set to TCR rating
– TCR, Max Limit, set to TCR rating
– TSC, max number of capacitors, set to 2
– TSC, Q per capacitor set to TSC capacitor rating
– Leave the MSC parameters set to zero in the SVS element
– Load Flow page: “Rated Reactive Power” set to 1000 Mvar
• Edit the “Shunt 1” and “Shunt 2” elements and update the basic data values:
– Max. No. of steps
– Rated reactive power (per step)
• Edit the Shunt Controller

Figure 6.3: Shunt Controller - load flow dialog

Updating dynamic parameters of SVS unit

The template as it has been deployed contains a dynamic model as well. The model is precon-
figured for the default ratings.

To update the dynamic parameters with the new settings follow the instructions below:

• From the Data/Model Manager edit the common model “SVSMO1”:


– Set the MSS small threshold (capacitive) to 200 [Mvar]
– Set the MSS small threshold (inductive) to -200 [Mvar]
– Set the MSS large threshold (capacitive) to 500 [Mvar]

HVDC and FACTS 142


6.2 Exercise: SVS Integration and Analysis in Power System

– Set the MSS large threshold (inductive) to -500 [Mvar]


– Bsvcr set to 1000 [Mvar]
– Set the Maximum capacitive susceptance to 0.8 p.u.
– Set the Minimum inductive susceptance to -1 p.u.

6.2.3 Controlling the voltage at a remote bus in the HV network

The current scheme is not practical as the SVS controls voltage at the low voltage terminal
instead of directly on the HV network (HV side of step-up transformer).

To apply a remote voltage control do the following:

• From the single line diagram, open the “Static Var System” element and go to the Load
Flow page. Activate the checbox “Remote Control”
• As Controlled Node select busbar “SG”
• Update of voltage measurement element (necessary for dynamic simulation only):
– From the Data/Model Manager, navigate to the composite model “Model SVS”.
– Inside this folder the voltage measurement device “Vmea SVS” is found. Open its
dialog.
– Set the measurement point to refer to busbar “SG”
• Perform a load flow calculation with the option “Automatic Shunt Adjustment” disabled
• Verify (via a hand calculation) if the the bus voltage is being controlled according to the
programmed droop
• Perform a load flow calculation with the option “Automatic Shunt Adjustment” enabled and
verify again the droop
Notes:

6.2.4 Dynamic Simulation (RMS) of the SVS system

The WECC SVSMO1 dynamic model is designed for fundamental frequency dynamic simula-
tions (RMS-Simulation). Several tests will be executed to verify its performance:

• Response to network events within the steady state region


• Response to AC system faults

Dynamic Controller

First we will inspect the dynamic controller of the SVS.

• Display the Composite Model/Frame - you will see the same graphic as shown in Figure
6.4. The trainer will explain the function of the different blocks.

143 HVDC and FACTS


6.2 Exercise: SVS Integration and Analysis in Power System

Hint: Display the Composite Model/Frame

• Open the Data Manager ( ).


• Select the DSL model (either *.ElmDsl or *.ElmComp) you want to display on the
right side of the Data Manager.
• Right click and select Show Graphic:

• The displayed graphic is connected to the common or composite model which was
selected in the second step. Values of the signals and states can be seen for this
model if the simulation is already initialized.
• Right click at this greyed out graphic and select Show Library Object.
• If only a blank page is displayed then the DSL model is only defined via equations.

Figure 6.4: Frame definition: WTG with fully rated converter

Response to network events (within steady state limits)

We will test the behaviour of the SVS by applying a step load event (to “Load SG”) in the
simulation:

HVDC and FACTS 144


6.2 Exercise: SVS Integration and Analysis in Power System

• Create a 30% increase of load event on “Load SG” at 2 seconds

• In the “SVSMO1” common model set parameter “flag1” to 1. This flag will activate the
mechanically switched shunts controller.
• Create result variables for the following:
– busbar SG: u1
– transformer “Tr SVS”: Psum:bushv, Qsum:bushv
– common model “SVSMO1”: B SVC (measured reactive power), Bsvc (susceptance
output), Blcs, Blis, Bscs, Bsis
• Run a RMS dynamic simulation for 50 seconds with the following settings:
– unbalanced
– Fixed time step simulation (“Automatic step size adaptation” checkbox unticked)
– Integration step size: 10 ms
• Plot the susceptance limits and the actual reactive power on a plot
• Plot also the bus voltage and the power flow through the transformer

• Identify in the output window the shunt switch events and cross-check the event time with
the results in the plots
• Why did the MSS controller actuate the shunt and which is the direction of control (induc-
tive/capacitive)?

• Identify the delay between shunt switchings and the corresponding delay parameters in
the “SVSMO1” common model.

Response to network faults

We will test the dynamic behaviour when considering the HVDC system as well. A fault on a
line will be applied as network disturbance.

Prepare a new study case:

• Copy the current study case and create a new copy (by pasting it, e.g. using the Data
Manager)
• Activate the new study case and rename it “2020 Study Case with SVS/HVDC (AC fault)”
• Activate the network variation “New HVDC-LCC Link”.

To define a fault on the line and run the simulation, proceed as follows:

• Define a 3-phase short circuit in the middle of line “NE-SC 1” (in the “AC Transmission
System”) at 2 s with 0 Ohm fault impedance for a duration of 100ms duration (i.e. a
second event after 100ms to clear the fault)

Note: You have to enable short circuits for the line on the RMS page of the line.

• Run the simulation for 10 s and visualise the results in the range where the fault is applied
• Is the system recovering after the event?

145 HVDC and FACTS


6.3 Optional Exercise: DSL Modelling of Thyristor Switched Shunts

• Comment on the behaviour of the SVS during fault. Is the reactive power injection of the
SVS beneficial?

• Observe the influence of the integral control gain “Kiv” to the transient response of the unit
by increasing/decreasing it.
• Make a comparison plot to observe the reactive power for two cases with different integral
gains.

• What is the disadvantage of increasing too much the control gains?

Hint: Detailed Instructions on Storing and Comparing Results All results from a simu-
lation are stored in one object. So it is possible to save the results of two simulations
in two different result objects. With the two objects is it possible to compare the
results in one plot (for example two runs with different control settings).
– Click on the button Calculate Initial Conditions ( )
– In the following dialogue is a link to the currently used result object:

– Click on the black triangle → Select


– In the following window is the focus on the currently used result object.
– Copy&Paste the object:
Note: The name can be different
– Select one of the result objects press OK and run a simulation.
In the virtual instrument is it now possible to select the result file. Normally are only
results shown from the currently active result object (selected in the Calculate Initial
Condition dialogue).
– Switch to a virtual instrument open a plot and double click in the cell Result File:

– Select the previously saved result file then select the element and the variable.

6.3 Optional Exercise: DSL Modelling of Thyristor Switched Shunts

In this exercise a switched shunt with 2 steps is connected to a busbar. A simple controller is
developed to keep the terminal voltage in a given voltage range. To step up and step down the
capacitor, internal and external events are used in the DSL model.

Creating the network:


– First insert the network diagram shown in Figure 6.5.
– Use the data given in the figure.
– The transformer data is shown in the table below.
Transformer Trf 40 MVA 110/20 kV :

HVDC and FACTS 146


6.3 Optional Exercise: DSL Modelling of Thyristor Switched Shunts

Sn 40 MVA
UnHV 110 kV
UnLV 20 kV
Xshc 10%
Vector Group YNd5

Figure 6.5: Single Line Graphic for the Switched Shunt Test System

– Add the switched shunt with the following data:

Un 20 kV
Shunt Type C
Max. No. of Steps 2
Q per Step 10 Mvar

– Set the switched shunt to Switchable on the load-flow page and enter the following
criteria for the voltage control:

Control Mode V
Upper Voltage Limit 1.02
Lower Voltage Limit 0.98

– The loads will have the data (P, cos(phi)) shown in Figure 6.5. Loads aLAdd and
Ladd2 are switched off initially.

147 HVDC and FACTS


6.3 Optional Exercise: DSL Modelling of Thyristor Switched Shunts

– Run a load-flow calculation with different loading and check the range of the switched
shunt.

6.3.1 Event Usage

First a simple DSL model is created, which is stepping up the shunt, when the voltage is getting
lower than a minimum voltage umin.

Defining the frame diagram:


– Create a new frame including the shunt, a voltage measurement device and the
controller model. See Figure 6.6.
– For the design of the shunt control, you will need as an input
* the voltage at the bus bar, which is to be controlled.
* the actual step of the shunt from the load-flow calculation.
– Therefore insert the following names for the input and output signals:

Slot Name U Meas Shunt TSC Controller


Outputs u ncapa –
Inputs – – u,ncap0

Inserting the DSL model:


– Create a new Block Diagram.
– Double-click the bounding box of the diagram to enter the DSL code directly into the
model without using predefined macros and the graphical interface.
– Insert the input signals for the block definition according to the frame.
– Define a voltage limit umin and a delay time Tdelay
– The shunt element does not have an input for inserting the actual number of steps.
Thus the DSL ’event’ command has to be used. You will find a description of the
command in the DSL manual in your exercise folder. Two possible options:
* Use an internal variable to add 1 to the actual step of the shunt.
* Insert an event command, which is activated, if the measured voltage u<umin.
Set the name of the event, the delay time and the new value, calling an external
“Set Parameter” event.
* Or else, insert an event command as before, but now calling an external “Tap
Event”, event to increase the number of parallel capacitor stages.

HVDC and FACTS 148


6.3 Optional Exercise: DSL Modelling of Thyristor Switched Shunts

Figure 6.6: Frame Diagram for the Switched Shunt

Creating and testing the models:


– Insert a Voltage Measurement Device (StaVmea) into the grid folder to measure the
bus voltage at Bus2.
– Create a Common Model using the block definition.
– Insert the parameter for the model:

umin 0.98
Tdelay 5s

– Use the “Event” button to insert a parameter event for the shunt to the parameter
ncapa. The value is then set by the DSL event. Mind that the name is identically to
the one defined in the DSL code of your model.
– Create a Composite Model and assign the shunt, the measurement device and the
controller to it.
– Run the simulation.
– Visualise the results in plots.
– Check if the DSL event is listed in the event queue.

6.3.2 Shunt Controller

The DSL model is now extended, that the controller is switching the shunt up and down again.

• Edit the definition of the block and add the next lines to it.

149 HVDC and FACTS


6.3 Optional Exercise: DSL Modelling of Thyristor Switched Shunts

• Define the initial condition of the internal variable ncap to the input of the capacitor.
• Introduce two variables for calculating the next step up and down (tapup, tapdown).
• Add a second DSL event to switch down the capacitor when the voltage is above umax
similar to the step-up event.
• Visualise the results of the model.
• Test the shunt model by switching the two loads on one following the other in the simulation
(at t2=0s, t2=20s). Afterwards switch the loads off again (at t3=40s, t4=50s). At 60s switch
on again one of the loads.

Umin 0.98
Umax 1.02
Tdelay 5s

6.3.3 Improved Shunt Controller

Think of a solution to step up and down the shunt, when more than two steps of the shunt are
required.

To test your solution you may change the configuration of your system.

– Modify the switched shunt with the following data:

Un 20 kV
Shunt Type C
Max. No. of Steps 20
Q per Step 2 Mvar

– Also the control criteria are changed to:

Control Mode V
Upper Voltage Limit 1.01
Lower Voltage Limit 0.99

PowerFactory files

File Name Description


FACTS 01 SVSStart Starting project of exercise 6.2 Exercise: SVS
Integration and Analysis in Power System
FACTS 01 SVS Solution of exercise 6.2 Exercise: SVS Inte-
gration and Analysis in Power System
HVDC 07 Switched Shunts.pfd Exercise solution
6.3 Optional Exercise: DSL Modelling of
Thyristor Switched Shunts

HVDC and FACTS 150


6.3 Optional Exercise: DSL Modelling of Thyristor Switched Shunts

Notes:
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151 HVDC and FACTS


7 FACTS – STATCOM

Purpose: Gain experience with STATCOM models in PowerFactory.

Content: Introduction to STATCOM Systems


• Operational Characteristics
• Construction overview

• Implementation in PowerFactory
• Introduction to STATCOM control structure
Practical implementation of a STATCOM in a HV network

• Use of the STATCOM Template


• Dynamic Analysis in RMS domain

Level: Advanced.

7.1 Presentation: Analysis of STATCOM Systems using PowerFactory

Notes:
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HVDC and FACTS 152


7.1 Presentation: Analysis of STATCOM Systems using PowerFactory

STATCOM devices

DIgSILENT GmbH

DIgSILENT PowerFactory – HVDC & FACTS

Var Compensation Devices

Types of Static VAR Generators

• Variable Impedance Type


• Mechanically-Switched Capacitor (MSC)

• Thyristor-Switched Reactor (TSR)

• Thyristor-Switched Capacitor (TSC)

• Thyristor-Controlled Reactor (TCR)

• Switching Converter Type


• Static Synchronous Compensator (STATCOM)

DIgSILENT PowerFactory – HVDC & FACTS

153 HVDC and FACTS


7.1 Presentation: Analysis of STATCOM Systems using PowerFactory

STATCOM Components

• Employing PWM Converters

• Based on GTO/IGBT devices with turn on/off capability

• DC Link capacitor

DIgSILENT PowerFactory – HVDC & FACTS

STATCOM Topologies

• PWM Converter topologies used for Statcom


• Two level

• Three-level (various)

• Multi-level schemes (MMC)

DIgSILENT PowerFactory – HVDC & FACTS

HVDC and FACTS 154


7.1 Presentation: Analysis of STATCOM Systems using PowerFactory

STATCOM Operational Behaviour

• Statcom V-I characteristic

• Constant current over V range

𝑉
𝑉𝑟

𝐼𝑟 𝐼

DIgSILENT PowerFactory – HVDC & FACTS

STATCOM Operational Behaviour

• Statcom two quadrant operation (default for all PWM converters)

• Extendable to four-quadrant if inertia function included (requires


battery - BESS)

• PQ capability:

DIgSILENT PowerFactory – HVDC & FACTS

155 HVDC and FACTS


7.1 Presentation: Analysis of STATCOM Systems using PowerFactory

STATCOM Control Approach

Statcom model in PowerFactory

• AC Voltage (local/remote) control

• DC Capacitor voltage regulation

DIgSILENT PowerFactory – HVDC & FACTS

STATCOM Overview

Overview

• Continuous control over dynamic range (+)

• Very fast control (++)

• Delivery of Over/Under-excited current (+)

• VAR characteristic is linear with voltage (+)

• Low harmonics (+)

• Economical in lower power ranges (-)

DIgSILENT PowerFactory – HVDC & FACTS

HVDC and FACTS 156


7.1 Presentation: Analysis of STATCOM Systems using PowerFactory

Shunt Compensation Overview

• Overview of Var compensation devices:

Advantages and disadvantages


Stepped / Number of Response Two THD Cost
continuous operations time quadrant
response control
Mechanically -- -- -- - + ++
switched
capacitors
Thyristor - + + - + ++
switched
capacitors
SVC + + + + - +
STATCOM + + ++ + + -

DIgSILENT PowerFactory – HVDC & FACTS

157 HVDC and FACTS


7.2 Exercise: Integration of STATCOM in the Power System

7.2 Exercise: Integration of STATCOM in the Power System

In this exercise a Static Synchronous Compensator (STATCOM) is introduced and simulated.


The STATCOM controls the local/remote voltage magnitude to a given setpoint. Various tests
are created to verify the correct operation of the STATCOM unit.

Start with assessing the necessity of a STATCOM in the power system:

• Load into PowerFactory the project file FACTS 02 STATCOMStart;

• Activate the study case “2021 Study Case with STATCOM”.


• Run a load flow and identify the busbar with the lowest voltage profile:
Busbar

• Provide reasons for/against using a STATCOM or an SVC as voltage regulation solution


in this case. Assume various scenarios for the loads nearby being supplied as well as
transient stability considerations.
Notes:

Assume that the identified problematic busbar is bus “NG” and a STATCOM solution has been
chosen. To implement it do the following:

• Use the template STATCOM 500MVAr 400kV located in the project library to add the
STATCOM model to the grid. Place it within the green marked rectangle “STATCOM”
and connect the step up transformer to bus NG (see Figure 7.1).

Note: Adding a template: click the “General templates” button ( ) from the drawing
toolbar. Select the right item from the selection window which appeares. Click once
in the single line diagram to show the network elements of the template. Lastly, after
you have decided where to deploy the template, click once more and add the model
to the network.

• Verify through a load flow calculation ( ) the consistency of the input data. Make sure to
fix any error or warning message in the output window before proceeding.

HVDC and FACTS 158


7.2 Exercise: Integration of STATCOM in the Power System

Figure 7.1: STATCOM 500MVAr 400kV template - single line diagram

7.2.1 Steady State (load flow) Analysis

We would like to investigate the following steady state functions:

• Voltage regulation of the 400kV bus


• Voltage profile improvement

Analyse the voltage regulation options of the PWM converter “STATCOM”:

• Open the Edit dialog of the statcom (PWM converter) element and set the “Controlled
Node(AC)” to refer to bus “NG”. Set also the “AC voltage setpoint” to 0.97.

• Perform a load flow calculation and verify that bus NG is controlled correspondingly.
• Perform a load flow results comparison between the cases “with” and “without” the STAT-
COM unit active. Asses the voltage profile improvement on bus NG and the other neigh-
bouring buses. Use the comparison function of PowerFactory detailed below.
Notes:

Note: Use the comparison function of PowerFactory ( ):


– Run at first the calculation you want to use as a base to compare.
– Press then the Comparing of results on/off button ( )

159 HVDC and FACTS


7.2 Exercise: Integration of STATCOM in the Power System

– Apply the required changes and then run the next calculation you want to com-
pare. The results are shown in %. The calculation of the difference can be
changed with the button Edit Comparing of results. . . ( )
– Press again the Comparing of results on/off button ( ) to disable the function.
.

7.2.2 STATCOM Testing of dynamic behaviour

Dynamic controller of the STATCOM:

• Using the Data Manager identify the dynamic controllers of the STATCOM.
• Show the block diagrams of the composite model “Statcom Model” and common model
“Statcom Controller”. The diagrams are also shown in Figure 7.2 and 7.3. The trainer will
provide an overview on the main dynamic control aspects and the practical implementation
in PowerFactory .

Figure 7.2: Frame definition for the STATCOM Test System

HVDC and FACTS 160


7.2 Exercise: Integration of STATCOM in the Power System

Figure 7.3: Block diagram for the STATCOM controller

Voltage setpoint steps

• Update the Voltage measurement element “Vac Meas” (located inside the composite model
“Statcom Model”) to measure the voltage on bus NG instead of the local LV bus of the
STATCOM.

• Set up the simulation:


– RMS Unbalanced
– Fixed time step simulation (“Automatic step size adaptation” checkbox unticked)
– Integration step size: 1 ms

• Define variable sets for the analysis:


– busbar NG: u1
– transformer “Tr STATCOM”: Psum:bushv, Qsum:bushv
– common model “STATCOM Controller”:Vac, Vac ref, Vdc, Vdc ref, Iq ref, Id ref
– PWM Converter “STATCOM”: active/reactive currents i1P, i1Q

• Run a simulation for 5 seconds without events (make sure the event list is empty or events
are disabled) and make sure that the power system is in steady-state.
• Create plots to visualise the results.

• Define a step from 0.97 to 0.95 to the ac voltage setpoint at time=2 seconds. To do
so, create a parameter event on parameter “Vac ref” of the common model “STATCOM
Controller”.

161 HVDC and FACTS


7.2 Exercise: Integration of STATCOM in the Power System

Note: Creating a parameter event on a common model:


– Open the simulation events dialog ( )
– Create a new event ( )
– Select as event type a “Parameter Event (EvtParam)”. Click OK.
– Set the event time
– Set the reference “Element” as being the corresponding common model.
– Set the parameter name and new value as required.

• Check the results and verify that the voltage is being controlled to the reference.
• Define a step from 0.97 to 1.0 to the ac voltage setpoint at time=2 seconds.
• Is the voltage being controlled to the setpoint? Comment on the results.

Notes:

AC Network Faults

• Apply a 150 ms three phase short circuit on bus NB


• Run a simulation for 10 seconds.

• Visualise/analyse the results. How is the STATCOM behaving during the fault?
• What is the maximum DC voltage that the DC capacitors must be rated in order to survive
the event?
• Create plots with the susceptance/reactive power outputs of the previously created SVC
unit (results are already recorded) and make a rough comparison between the dynamic
behaviour of the two units. What is the order of reaction time of each during/after the fault?

Notes:

HVDC and FACTS 162


7.2 Exercise: Integration of STATCOM in the Power System

PowerFactory files

File Name Description


FACTS 02 STATCOMStart Starting project of exercise 7.2 Exercise: In-
tegration of STATCOM in the Power System
FACTS 02 STATCOM Solution of exercise 7.2 Exercise: Integration
of STATCOM in the Power System

Notes:
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163 HVDC and FACTS


8 FACTS – Thyristor-Controlled Series Capacitor (TCSC)

Purpose: Gain experience with modelling and simulation of Thyristor-Controlled


Series Capacitor (TCSC) in PowerFactory.

Content: Introduction to Thyristor-Controlled Series Capacitor (TCSC)


• Theoretical Overview of series compensation

• Introduction to TCSC
• Operation of TCSC:
– Capacitive or inductive boost mode
– Fast adjustable compensation
– Power oscillation damping (POD)
• Implementation of TCSC in PowerFactory
Exercises: Implementation and simulation of TCSC in PowerFac-
tory

• Building a TCSC model in PowerFactory


• Analysis of TCSC operation in EMT simulation
• Simulation of TCSC protection scheme (EMT simulation)
• Simulation of power oscillation damping (POD)

Level: Advanced.

8.1 Presentation: TCSC - Thyristor-Controlled Series Capacitor

Notes:
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HVDC and FACTS 164


8.1 Presentation: TCSC - Thyristor-Controlled Series Capacitor

TCSC
Thyristor-Controlled Series Capacitor

DIgSILENT GmbH

Series Compensation

Overhead line without series compensation: jXL I


I U1
U2
δ
XL I
U1 U2

Overhead line with series compensation: -jXC I


jXL I
I
U1 U2
δ
XL I
XC
U1 U2

TCSC (Thyristor-Controlled Series Capacitor) 2

165 HVDC and FACTS


8.1 Presentation: TCSC - Thyristor-Controlled Series Capacitor

Series Compensation

With series compensation


P 𝑼𝟏 ∙ 𝑼𝟐
Pmax 𝑷= ∙ sin 𝛿
𝑿𝑳 − 𝑿𝑪

Pmax Without series compensation


𝑼𝟏 ∙ 𝑼𝟐
𝑷= ∙ sin 𝛿
Pload 𝑿𝑳

δ
90° 180°

TCSC (Thyristor-Controlled Series Capacitor) 3

Series Compensation

Series Compensation in Poste Montagnais, Canada (Source: Siemens PTD)


TCSC (Thyristor-Controlled Series Capacitor) 4

HVDC and FACTS 166


8.1 Presentation: TCSC - Thyristor-Controlled Series Capacitor

Series Compensation

Advantages

• Max. power transfer capability of line is increased

• Voltage angle deviation is decreased

Disadvantages
• Risk of subsynchronous resonance (SSR)

I
SG

Turbine XL
XC

TCSC (Thyristor-Controlled Series Capacitor) 5

TCSC Introduction

TCSC:

• Thyristor-Controlled Series Capacitor

• A device for series compensation

• Belongs to FACTS (Flexible AC Transmission System)

• Application in long transmission lines:

o Fast adjustable series compensation

o Power flow control in meshed AC networks

o Power oscillation damping (POD)

TCSC (Thyristor-Controlled Series Capacitor) 6

167 HVDC and FACTS


8.1 Presentation: TCSC - Thyristor-Controlled Series Capacitor

TCSC Setup

Basic Setup of a TCSC Module:

Series Capacitor

Reactor

Thyristors
TCSC (Thyristor-Controlled Series Capacitor) 7

TCSC Setup

Setup of a TCSC (TCSC in Slatt, Oregon, USA as example):

Source: [1] / [4]

TCSC (Thyristor-Controlled Series Capacitor) 8

HVDC and FACTS 168


8.1 Presentation: TCSC - Thyristor-Controlled Series Capacitor

TCSC Setup

TCSC Serra da Mesa,


Brazil,
• 500 kV
• 107 Mvar continuous
• 241 Mvar for
30 minutes
• 13,3...40 Ω
• Energy capability of
MOVs: 21 MJ
(Source: Siemens PTD)

TCSC (Thyristor-Controlled Series Capacitor) 9

TCSC Operation

Thyristor Valve:
Characteristic:

Ideal characteristic:

TCSC (Thyristor-Controlled Series Capacitor) 10

169 HVDC and FACTS


8.1 Presentation: TCSC - Thyristor-Controlled Series Capacitor

TCSC Operation

Firing of thyristors initiates a half internal oscillation cycle


VC
I IC C
I

𝟏 𝟏 𝟏
𝒇𝒐𝒔𝒄 = ∙ 𝝎𝒐𝒔𝒄 = ∙
𝟐𝝅 𝟐𝝅 𝑳𝑪
IL

TCSC (Thyristor-Controlled Series Capacitor) 11

TCSC Operation

Current and voltage at capacitor (capacitive boost mode)

Source: [1]

TCSC (Thyristor-Controlled Series Capacitor) 12

HVDC and FACTS 170


8.1 Presentation: TCSC - Thyristor-Controlled Series Capacitor

TCSC Operation

Boost Factor KB

TCSC (Thyristor-Controlled Series Capacitor) 13

TCSC Operation

Effective reactance as function of firing angle α

• Steady-state approximation

for

TCSC (Thyristor-Controlled Series Capacitor) 14

171 HVDC and FACTS


8.1 Presentation: TCSC - Thyristor-Controlled Series Capacitor

TCSC Operation

Effective reactance of TCSC as function of firing angle α:

XTCSC(α)

Source: [1]

TCSC (Thyristor-Controlled Series Capacitor) 15

TCSC Operation

Operating Area:

XTCSC
Imax
inductive

 = L,lim
XL,max
XL,min
 = 0°
0 I
 = 90°
capacitive

XC.min

XC.max
 = C,lim

Source: [1]

TCSC (Thyristor-Controlled Series Capacitor) 16

HVDC and FACTS 172


8.1 Presentation: TCSC - Thyristor-Controlled Series Capacitor

TCSC Operation

Operating Area:

VL
Imax

VL,max

VC,max

VC Source: [1]

TCSC (Thyristor-Controlled Series Capacitor) 17

TCSC Operation

Control Schemes [5]

• Constant impedance control (open loop)

• Constant current control (closed loop)

• Constant power control (closed loop)

• Constant voltage angle control (closed loop),


maintains const. voltage angle (voltage drop) along a transmission line

• Addition: power oscillation damping (POD) [3]


o D Controller (derivative of frequency, current or power)

o Lead-Lag controller

o Phasor estimation

TCSC (Thyristor-Controlled Series Capacitor) 18

173 HVDC and FACTS


8.1 Presentation: TCSC - Thyristor-Controlled Series Capacitor

TCSC Control Schemes

Usually
• Constant impedance control (open loop) PLL synchronised
Xmax with line current

Xref Xorder  Operating Firing


Lineari-
Mode Pulse To
sation Thyristors
Selector Generator
Normal operating mode
Xmin or protecting TCR mode

• Model for RMS simulation


Xmax

XL,order Operating 1
Xref Xorder Lineari-
Mode XL
sation 1 + sTTCSC
Selector
PT1 with
Xmin TTSCS = 15 ms
TCSC (Thyristor-Controlled Series Capacitor) 19

TCSC Control Schemes

I
• Constant current control (closed loop) [5]

Iref Iref

+ V
--
Filter PI Xref
Imeasure

POD

• Constant power control (closed loop)


Similar structure, measurement and control of power

TCSC (Thyristor-Controlled Series Capacitor) 20

HVDC and FACTS 174


8.1 Presentation: TCSC - Thyristor-Controlled Series Capacitor

TCSC Control Schemes

• Constant voltage angle control (closed loop) [5]

Iref
+
Imeasure + --
Filter PI Xref
--
Vmeasure
S I
S = 0 => Current Ctrl.
S = 1/Xline => Angle Ctrl.

POD
V
TCSC (Thyristor-Controlled Series Capacitor) 21

TCSC Control Schemes

• Power Oscillation Damping (POD)

o D Controller

1 sTw
KG s KD
1 + sTm 1 + sTw
Regulator Derivative
gain
o Lead-Lag Controller [2]
Input
Signal
1 sTw 1 + sT1 1 + sT3
KG
1 + sTm 1 + sTw 1 + sT2 1 + sT4

Measurement Washout Regulator


time constant Tm filter gain Phase compensation block
(lead-lag)
TCSC (Thyristor-Controlled Series Capacitor) 22

175 HVDC and FACTS


8.1 Presentation: TCSC - Thyristor-Controlled Series Capacitor

TCSC Operation

Power Oscillation Damping (POD)

• Example of power oscillations between the north- and south-Brazilian grid

Source: ABB Power Systems

TCSC (Thyristor-Controlled Series Capacitor) 23

TCSC Protection Scheme

• High short-circuit currents in cases network faults flow through TCSC


=> high voltages at capacitors

• To protect the TCSC:

1. Metal Oxide Varistors (MOVs) come into action

2. Thyristors are closed to release MOVs (high energy consumption),


“Thyristor Switched Reactor (TCR) Mode”
3. Bypass breaker are closed to release thyristors
(reactors in series to bypass breakers in order to damp
discharging of capacitors)

4. Additional spark gap as backup protection

TCSC (Thyristor-Controlled Series Capacitor) 24

HVDC and FACTS 176


8.1 Presentation: TCSC - Thyristor-Controlled Series Capacitor

Installed TCSCs

13 installed TCSCs worldwide (2013) [3]:


1. Kayenta, WAPA, USA, 1992, 230 kV, 2 x 165 Mvar (TCSC module: 45 Mvar); 1.0 kA
2. Slatt System, BPA, USA, 1993, 500 kV, 208 Mvar, 2.9 kA
3. Stöde, Svenska Kraftnät, Sweden, 1997, 400 kV, 493 Mvar total (TCSC 148 Mvar); 1.5 kA
4. Imperatriz, Eletronorte, Brazil, 1999, 500 kV, 108 Mvar, 1.5 kA
5. Serra da Mesa, FURNAS Centrais Elétricas S.A Brazil, 1999, 500 kV, 107 Mvar, 1.5 kA
6. Pingguo, State Power South Company, Guangzhou, China, 2002,
500 kV, TCSC 55 Mvar; FSC 350 Mvar, 2.0 kA
7. Serra da Mesa, Novatrans, Brazil, 2004, 500 kV, 107.5 Mvar, 1.5 kA
8. Imperatriz, Novatrans, Brazil, 2004, 500 kV, 107.5 Mvar, 1.5 kA
9. Chengxian, Gansu Electric Power Co. China, 2004, 220 kV, 86.7 Mvar, 1.1 kA
10. Raipur (end of Rourkela – Raipur DC line); Power Grid Corp. of India, 2004,
400 kV, FSC 394 Mvar, TCSC 71 Mvar, 1.55 kA
11. Gorakhpur (end of Muzaffarpur – Gorakhpur DC line), Power Grid Corp. of India, 2006,
420 kV, FSC 716 Mvar, TCSC 107 Mvar
12. Purnea (end of Purnea – Muzaffarpur DC line), Power Grid Corp. of India, 2006,
420kV, FSC 743 Mvar, TCSC 112 Mvar
13. Fengtun, Northeast China Grid Co., 2009, 500 kV, 326 Mvar, 2.33 kA
TCSC (Thyristor-Controlled Series Capacitor) 25

PowerFactory Model

Steady State and RMS simulation:

• Variable series reactor

EMT simulation:
• DC valves via Intercircuit Fault Event
(to connect DC elements with AC elements)

or
• AC switches with DSL model to give them a thyristor behaviour

TCSC (Thyristor-Controlled Series Capacitor) 26

177 HVDC and FACTS


8.1 Presentation: TCSC - Thyristor-Controlled Series Capacitor

Literature

[1] N. G. Hingorani, L. Gyugyi: Understanding FACTS: Concepts and Technology


of Flexible AC Transmission Systems,
IEEE Press, 2000, ISBN 0-7803-3455-8
[2] Y. H. Song, A. T. Johns: Flexible ac transmission systems (FACTS),
The Institution of Electrical Engineers, United Kingdom, 1999,
ISBN: 0-85296-771-3
[3] CIGRÉ Technical Brochure No. 554: Performance Evaluation and Applications
Review of Existing Thyristor Control Series Capacitor Devices –TCSC,
CIGRÉ, Working Group B4.49, October 2013, ISBN : 978-2-85873-249-4
[4] CIGRÉ Technical Brochure No. 185: FACTS Technology For Open Access,
CIGRÉ, Joint Working Group 14/37/38/39.24, April 2001
[5] M. Eremia, C.-C. Liu, A.-A. Edris: Advanced Solutions in Power Systems –
HVDC, FACTS, and Artificial Intelligence,
IEEE Press, Wiley, 2016, ISBN 978-1-119-03569-5

TCSC (Thyristor-Controlled Series Capacitor) 27

HVDC and FACTS 178


8.2 Exercise: Analysis of TCSC operation in EMT simulation

8.2 Exercise: Analysis of TCSC operation in EMT simulation

Import the file “FACTS 03 TCSC Control Start.pfd” and activate the imported project. The
project contains a model of a TCSC prepared for EMT simulation. The trainer will explain the
components of the TCSC model.

• Put the TCSC into service by closing the TCSC isolators and opening the bypass discon-
nector.
• Run an EMT simulation with the prepared settings.

• Check the plots showing results for the terminals of the thyristors to make sure the thyris-
tors are connected.

We will now enhance the TCSC model in order to control the firing of the thyristors.

• Open the Composite Model “TCSC System” from within the Data Manager or Network
Model Manager.

• Put a new Common Model into the slot for the “Firing Pulse Generator”. Use the Block
Definition “Firing Pulse Generator” for this new model. You will find the according Block
Definition in the project library (User Defined Models).
• Put a new Common Model into the slot for the “Controller”. Use the Block Definition “Alpha
Control” for this new model. You will find the according Block Definition in the project library
(User Defined Models).
• Put a new Common Model into the slot for the “PLL”. Use the Block Definition “PLL EMT”
for this new model. You will find the according Block Definition in the project library (User
Defined Models).

• Put the current measurement device which is already prepared inside the Composite
Model “TCSC System” into the according slot.

Analyse the behaviour of the TCSC by varying the firing angle and investigating the resulting
voltages and currents of the TCSC.

• Prepare plots with results for the EMT simulation, containing the following quantities:
– Currents through the overhead line in all three phases (I:A, I:B, I:C) and as magnitude
(I1).
– Currents and voltages of the TCSC capacitor. You can use the calculation parameters
Icap and Usg.
• Prepare a plot with the above mentioned quantities of phase A.
• Add curves for the firing signals and the currents through the thyristors in phase A.

• Run the EMT simulation and investigate the results.


• Afterwards, change the firing angle in the “alpha Control” model from 90 degrees to 85
degrees. This will bring the TCSC in the capacitive boost operation.
• Repeat the simulation and investigate the results.

• Repeat to decrease the firing angle in steps of 5 degrees. Down to which firing angle is a
stable TCSC operation possible?

179 HVDC and FACTS


8.2 Exercise: Analysis of TCSC operation in EMT simulation

• Repeat the same analysis for the inductive boost operation. Start with a firing angle of -90
degrees and increase the firing angle in steps of 10 degrees.

For your reference, Fig. 8.1 shows the steady-state approximation of the effective TCSC reac-
tance as a function of the firing angle. Fig. 8.2 shows the steady-state approximation of the
effective reactance of the inductive branch of the TCSC.

TCSC Reactance
100

80

60
Reactance in Ohm

40

20

0
-45 -30 -15 0 15 30 45 60 75 90
-20

-40

-60

-80

-100
Firing Angle in deg

Figure 8.1: Steady-state approximation of the effective TCSC reactance (C = 0.16 mF,
L = 10 mH)

Effective Reactance of the Inductive Branch


1000

800
Reactance in Ohm

600

400

200

0
-45 -30 -15 0 15 30 45 60 75 90

-200
Firing Angle in deg

Figure 8.2: Steady-state approximation of the effective reactance of the inductive branch of the
TCSC (L = 10 mH)

HVDC and FACTS 180


8.3 Exercise: Simulation of TCSC protection scheme (EMT simulation)

In the next step, we will add a controller in order to control the current or the power flow through
the line.

• Open the Composite Model “TCSC System” from within the Data Manager or Network
Model Manager.
• Exchange the “alpha Control” by the model “Controller EMT”, which you will find in the
project library (User Defined Models).
• Prepare plots for showing the currents and power flow through the overhead line.
• Try to control the reactance, the current and the power flow (one after the other) by
adapting the controller settings. Use parameter events to change the reference values
(setpoints) at t = 0.4 s. Investigate the TCSC behaviour.

8.3 Exercise: Simulation of TCSC protection scheme (EMT simulation)

In this exercise we will simulate the control scheme of a TCSC in case of a short-circuit in the
network.

Import the file “FACTS 03 TCSC Protection Start.pfd” and activate the imported project.

• Run an EMT simulation of a short-circuit at “Node Grid 2”]. The short-circuit should be a
solid three-phase short-circuit starting at t = 20 ms.
• Investigate the currents and voltages of the TCSC.

In order to protect the TCSC against overvoltages, usually metal oxide varistors (MOVs) are
used.

• Enable the Metal Oxide Varistor option of the series capacitor (EMT simulation page →
Advanced).
• Use the settings for the MOV which are provided in Table 8.1.
• Run the simulation again.
• Investigate the current and power flow through the MOVs.
• Investigate the energy consumption of the MOVs (signals Emov a, Emov b, Emov c).

Current in kA Voltage in kV
0.0001 50
0.0002 100
0.01 160
500 200

Table 8.1: Parameters for Metal Oxide Varistor (MOV)

In order to reduce the energy consumed by the MOVs, the TCSC is switched into a protecting
TCR mode and a mechanical bypass breaker opened, if the TCSC protection detects the faults.

• Open the Composite Model “TCSC System” from within the Data Manager or Network
Model Manager.

181 HVDC and FACTS


8.4 Exercise: Power oscillation damping (POD)

• Put a new Common Model into the slot for the “Protection”. Use the Block Definition
“Protection” for this new model. You will find the according Block Definition in the project
library (User Defined Models).
• Put the bypass breaker in the according slot.
• Run the simulation again.
• Investigate the currents and voltages at the series capacitor.

• Investigate the energy consumption of the MOVs.


• When does the mechanical bypass breaker close?

8.4 Exercise: Power oscillation damping (POD)

In this exercise we will simulate a power oscillation and investigate the power oscillation damping
provided by the TCSC.

Import the file “FACTS 03 TCSC POD Start.pfd” and activate the imported project. In order to
let the synchronous machine we will introduce two events on the machine’s torque.

• Add a Synchronous Machine Event to reduce the torque by 0.1 p.u. at t = 2.0 s (additional
torque = -0.1 p.u.).

• Add a second Synchronous Machine Event to bring the torque back to the former value at
t = 2.1 s (additional torque = 0.0 p.u.).
• Run the simulation for 10 s and investigate the power flow (active power through the line).

We will now introduce a POD controller in the TCSC system.

• Open the Composite Model “TCSC System” from within the Data Manager or Network
Model Manager.
• Put a new Common Model into the slot for the “POD”. Use the Block Definition “POD
derivative” for this new model. You will find the according Block Definition in the project
library (User Defined Models). You can use the default settings.
• Run the simulation again.
• Display the POD signal and investigate the results.

Notes:
...............................................................................................

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HVDC and FACTS 182


8.4 Exercise: Power oscillation damping (POD)

PowerFactory files

File Name Description


Starting project for Section 8.2, Exercise:
FACTS 03 TCSC Control Start Analysis of TCSC operation in EMT simula-
tion
FACTS 03 TCSC Control Final Solution for Section 8.2, Exercise: Analysis of
TCSC operation in EMT simulation
Starting project for Section 8.3, Exercise:
FACTS 03 TCSC Protection Start Simulation of TCSC protection scheme (EMT
simulation)
FACTS 03 TCSC Protection Final Solution for Section 8.3, Exercise: Simulation
of TCSC protection scheme (EMT simulation)
FACTS 03 TCSC POD Start Starting project for Section 8.4, Exercise:
Power oscillation damping (POD)
FACTS 03 TCSC POD Final Solution for Section 8.4, Exercise: Power
oscillation damping (POD)

Notes:
...............................................................................................

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183 HVDC and FACTS

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