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LABORATORY EXPERIMENTS

Submitted in Partial Fulfillment of the Requirements


for the Award of the Degree of

A.M.I.E.
IN
COMPUTER SCIENCE ENGINEERING

COMPLETED AT

JSS ACADEMY OF TECHNICAL


EDUCATION NOIDA
Submitted By SUBMITTED TO

(MAAZ)

( ST 647562-6 ) JSS Academy of Technical

Education, Noida
INDEX

Title of Experiment Date Remarks Teacher’s Page


Initials Number
Pulse & Digital Circuits
To design a 4-bit synchronous counter & 31-07-2017 1-4
study its functions.
To design a 4-bit asynchronous counter 31-07-2017 4-6
& study its functions.
Data Structures
To obtain the given tree type structure 01-08-2017 7-12
using a suitable structure.
(Binary Search Tree)
To define a node with the given structure 01-08-2017 12-18
and to implement insert, delete & search.
(Singly Linked List)
Programming
To maintain an array whose size can be 02-08-2017 19
known during the execution time of the
program only.
To write a ‘C’ Program that will encrypt 02-08-2017 20-21
a given text in the given manner.
Computer Architecture
To design on paper a full 18 X 16 Barrel 03-08-2017 21-22
Shifter.
To design a 4-bit, 8 function arithmetic 03-08-2017 23-25
unit that will meet the given
specifications.
System Analysis
To draw the system flow-chart showing 04-08-2017 26-27
the given steps in processing customers
sales order.
To describe in detail a pay roll data 04-08-2017 28-31
processing application giving inputs,
outputs and files required. Draw the
system flow-chart and show the structure
of input documents and output reports.
1
Experiment No:- 1
OBJECTIVE :- To Design a 4-bit synchronous counter and study its functions.

REQUIREMENT :- JK FLIP FLOP, Square Wave Generator, AND gate IC7408, 7 Segment LED
driver.

THEORY

In Synchronous Counter, the external clock signal is connected to the clock input of EVERY
individual Flip-Flop within the counter so that all of the Flip-Flops are clocked together
simultaneously (in parallel) at the same time giving a fixed time relationship. In other words, changes
in the output occur in "synchronization" with the clock signal. This results in all the individual output
bits changing state at exactly the same time in response to the common clock signal with no ripple
effect and therefore, no propagation delay. Since all the flip-flops are clocked together, the delay time
is less.
Synchronous Counters use edge-triggered flip-flops that change states on either the "positive-edge"
(rising edge) or the "negative-edge" (falling edge) of the clock pulse on the control input resulting in
one single count when the clock input changes state. Generally, synchronous counters count on the
rising-edge (+ve edge) which is the low to high transition of the clock signal. Therefore this circuit
responds to each positive clock edge.

COUNTER STATE TABLE 1.1

QD QC QB QA JA KA JB KB JC KC JD KD
0 0 0 0 1 X 0 X 0 X 0 X
0 0 0 1 X 1 1 X 0 X 0 X

0 0 1 0 1 X X 0 0 X 0 X
0 0 1 1 X 1 X 1 1 X 0 X
0 1 0 0 1 X 0 X X 0 0 X
0 1 0 1 X 1 1 X X 0 0 X
0 1 1 0 1 X X 0 X 0 0 X
0 1 1 1 X 1 X 1 X 1 1 X
1 0 0 0 1 X 0 X 0 X X 0
1 0 0 1 X 1 1 X 0 X X 0
1 0 1 0 1 X X 0 0 X X 0
1 0 1 1 X 1 X 1 1 X X 0
1 1 0 0 1 X 0 X X 0 X 0
1 1 0 1 X 1 1 X X 0 X 0
1 1 1 0 1 X X 0 X 0 X 0
1 1 1 1 X 1 X 1 X 1 X 1
0 0 0 0

KARNAUGH MAP TABLE 1.2

SIMPLIFICATION USING KARNAUGH MAP

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JA = {0,2,4,6,8,10,12,14} KA = {1,3,5,7,9,11,13,15}

d{1,3,5,7,9,11,13,15} d{0,2,4,6,8,10,12,14}

QB’QA’ QB’QA QBQA QBQA’ QB’QA’ QB’QA QBQA QBQA’


QD’QC’ 1 X X 1 QD’QC’ X 1 1 X
QD’QC 1 X X 1 QD’QC X 1 1 X
QDQC 1 X X 1 QDQC X 1 1 X
QDQC’ 1 X X 1 QDQC’ X 1 1 X

JA = 1 KA = 1

JB = {1,5,9,13} KB = {3,7,11,15}

d{2,3,6,7,10,11,14,15} d{0,1,4,5,8,9,12,13}

QB’QA’ QB’QA QBQA QBQA’ QB’QA’ QB’QA QBQA QBQA’


QD’QC’ 0 1 X X QD’QC’ X X 1 0
QD’QC 0 1 X X QD’QC X X 1 0
QDQC 0 1 X X QDQC X X 1 0
QDQC’ 0 1 X X QDQC’ X X 1 0

JB = QA KB = QA

JC = {3,11} KC = {7,15}

d{4,5,6,7,12,13,14,15} d{0,1,2,3,8,9,10,11}

QB’QA’ QB’QA QBQA QBQA’ QB’QA’ QB’QA QBQA QBQA’


QD’QC’ 0 0 1 0 QD’QC’ X X X X
QD’QC X X X X QD’QC 0 0 1 0
QDQC X X X X QDQC 0 0 1 0
QDQC’ 0 0 1 0 QDQC’ X X X X

JC = QBQA KB = QBQA

JD = {7} KD = {15}

d{8,9,10,11,12,13,14,15} d{0,1,2,3,4,5,6,7}

QB’QA’ QB’QA QBQA QBQA’ QB’QA’ QB’QA QBQA QBQA’


QD’QC’ 0 0 0 0 QD’QC’ X X X X
QD’QC 0 0 1 0 QD’QC X X X X
QDQC X X X X QDQC 0 0 1 0
QDQC’ X X X X QDQC’ 0 0 0 0

JD = QA.QB.QC KD = QA.QB.QC

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PROCEDURE

To successfully design synchronous counters we may employ the following six basic steps:

1. Create the state transition diagram.


2. Create a present state-next state table (often referred to as the next state table).
3. Expand the table to form the transition table for each flip-flop in the circuit. The transition
table shows the flip-flop inputs required to make the counter go from present state to the
desired next state. This is also referred to as the excitation table.
4. Determine the logic functions of the J and K inputs as a function of the present states.
5. Analyse the counter to verify the design.
6. Construct and test the counter.

A 4-bit Synchronous counter made by using JK flip-flops is shown below

OBSERVATIONS

It can be seen that the external clock pulses (pulses to be counted) are fed directly to each J-K flip-
flop in the counter chain and that both the J and K inputs are all tied together in toggle mode, but only
in the first flip-flop, flip-flop A (LSB) are they connected HIGH, logic "1" allowing the flip-flop to
toggle on every clock pulse. Then the synchronous counter follows a predetermined sequence of states
in response to the common clock signal, advancing one state for each pulse.

The J and K inputs of flip-flop B are connected to the output "Q" of flip-flop A, but the J and K inputs
of flip-flops C and D are driven from AND gates which are also supplied with signals from the input
and output of the previous stage. If we enable each J-K flip-flop to toggle based on whether or not all
preceding flip-flop outputs (Q) are "HIGH" we can obtain the same counting sequence as with the
asynchronous circuit but without the ripple effect, since each flip-flop in this circuit will be clocked at
exactly the same.

This 4-bit synchronous counter counts sequentially on every clock pulse the resulting outputs count
upwards from 0 ( "0000" ) to 15 ( "1111" ).

RESULT

4-bit synchronous waveform diagram is shown below.


The counter counts sequentially on every clock pulse the resulting outputs count upwards from 0000
to 1111.

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CONCLUSIONS

1. They are called synchronous counters because the clock input of the flip-flops are clocked with the
same clock signal

2. Due to the same clock pulse all outputs change simultaneously

3. Synchronous binary counters use both sequential and combinational logic elements

4. The sequence of the count is controlled by combinational logic.

5. The memory section keeps track of the present state.

ADVANTAGE

1. Synchronous counters are easier to design

2. With all clock inputs wired together there is no inherent propagation delay.

3. Overall faster operation may be achieved compared to Asynchronous counters.

Experiment No:- 2

OBJECTIVE :- To Design a 4-bit Asynchronous counter and study its functions.

REQUIREMENT :- JK FLIP, Square Wave Generator, 7 segment LED driver.

THEORY

In an Asynchronous counter, the clock is applied only to the first stage with the output of one flip-
flop stage providing the clocking signal for the next flip-flop stage and subsequent stages derive the

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clock from the previous stage with the clock pulse being halved by each stage. The clock pulses are
not connected directly to clock input of each flip flop in the counter. The counter mostly uses JK flip
flops connected properly. This arrangement is commonly known as Asynchronous as each clocking
event occurs independently as all the bits in the counter do not all change at the same time. As the
counter counts sequentially in an upwards direction from 0 to 15.

Asynchronous Counters use edge-triggered flip-flops that change states on either the "positive-edge"
(rising edge) or the "negative-edge" (falling edge) of the clock pulse on the control input resulting in
one single count when the clock input changes state.

COUNTER STATE TABLE 2.1

Clock Count QD QC QB QA Decimal


Value
1 0 0 0 0 0
2 0 0 0 1 1
3 0 0 1 0 2
4 0 0 1 1 3
5 0 1 0 0 4
6 0 1 0 1 5
7 0 1 1 0 6
8 0 1 1 1 7
9 1 0 0 0 8
10 1 0 0 1 9
11 1 0 1 0 10
12 1 0 1 1 11
13 1 1 0 0 12
14 1 1 0 1 13
15 1 1 1 0 14
16 1 1 1 1 15
4 BIT ASYNCHRONOUS COUNTER FIGURE 2.1

PROCEDURE

1. Make Excitation Table as shown in Figure.

2. Realize Truth Table using K Map as shown.

2. Make connections of components as per excitation table.

3. Connect the Square Wave Generator to the Clock input of JK flip flops.

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4. Switch On the setup.

OBSERVATIONS

This 4-bit Asynchronous counter counts sequentially on every clock pulse the resulting outputs count
upwards from 0 ( "0000" ) to 15 ( "1111" ).

Figure 2.1 show the observed waveform of Flip Flop A, B ,C, D

RESULT
4-bit asynchronous waveform diagram is shown below

TIMING DIAGRAM AND SQAURE WAVEFORM FIGURE 2.2

The counter counts sequentially on every clock pulse the resulting outputs count upwards from 0000
to 1111.

CONCLUSIONS

1. They are called asynchronous counters because the clock input of the flip-flops are not all driven by
the same clock signal.

2. Each output in the chain depends on a change in state from the previous flip-flops output.

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Experiment No:- 3

OBJECTIVE :- To obtain the following tree-type using a suitable structure:

15

11 19

9 15 33
17

7 10
16 18

REQUIREMENTS :-
Laptop with Windows XP (1.73 GHz, 512 MB RAM) with Turbo-C compiler.

Analysis of given structure :-

After analysis of this tree structure it is clear that it is a Binary Search Tree. In binary search tree all
the elements in right sub-tree of any node are greater than or equal to the elements and in left sub tree,
there are elements less than the Root Element.

Determine the list for obtaining the objected tree structure :- For obtaining the given tree structure
using Binary Search Tree the elements order can be as given below:

15, 11, 19, 9, 15, 17, 33, 7, 10, 16,18

Binary Search Tree Implementation in C

#include<stdio.h>
#include<conio.h>
#include<string.h>
#include<dos.h>
#include<stdlib.h>

//Structure to hold one node of the tree and the info of its subtree nodes
struct node
{
char data[15];
struct node *left,*right;
};

//Function to insert a new element(node) in the tree


void insert(struct node *r,struct node *p)
{
if((r->right==NULL)&&(strcmp(p->data,r->data)>0))
r->right=p;

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else if((r->right!=NULL)&&(strcmp(p->data,r->data)>0))
insert(r->right,p);

if((r->left==NULL)&&(strcmp(p->data,r->data)< 0))
r->left=p;
else if((r->left!=NULL)&&(strcmp(p->data,r->data)< 0))
insert(r->left,p);
}

//Function for tree traversal


void tree(struct node *r,int c)
{
int top,flag;
struct node *w,*stack[20];
if(r!=NULL)
{
if(c!=4)
{
if(c == 1)
{
printf(" %s ",r->data);
tree(r->left,c);
}
if(c == 2)
{
printf(" %s ",r->data);
tree(r->right,c);
}
if(c == 3)
printf(" %s ",r->data);
}
}
if(c == 4)
{
top = 0;
w = r;
flag = 0;
while((top != -1)&&(w!=NULL))
{
while((flag == 0) && (w->left!=NULL))
{
stack[top] = w;
top++;
w = w->left;
}
printf(" %s ",w->data);
if(w->right != NULL)
{
w = w->right;
flag = 0;
}
else
{
top--;
w = stack[top];
flag = 1;

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}
}
}
}

// Main function
void main()
{
int choice,c,i,flag;
char temp='N',temp1[15]={'0'};
struct node *s,*root,*r,*q;
root = NULL;
do
{
clrscr();
//print menu
printf("\n 1. Enter");
printf("\n 2. Delete ");
printf("\n 3. Search ");
printf("\n 4. Display");
printf("\n 5. Exit");
//take input
printf("\nEnter Your Choice : ");
scanf("%d",&choice);
switch(choice)
{
case 1:printf("***** Data Entry ***** ");
do
{
s=malloc(sizeof(struct node));
s->left=NULL;
s->right=NULL;
printf("\nEnter Data : ");
scanf("%s",&s->data);
if(root==NULL)
root=s;
else
insert(root,s);
printf("\nEnter Your Elements[y/n] : ");
scanf("%c",&temp);
}
while(temp=='y');
break;

case 2:printf("****** Delete Operation *******\n");


do
{
printf("\n Enter Element To Be Deleted : ");
scanf("%s",temp1);
s=root;i=0;flag=0;
do
{
if(strcmp(s->data,temp1)>0)
{
r=s;

MAAZ ST-647562-6
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s=s->left;
i=2;
}
if(strcmp(s->data,temp1)==0)
{
flag=1;
if(i==0)
{
if(root->right!=NULL)
{
q=root->left;
root=root->right;
insert(root,q);
}
if(root->right==NULL)
root=root->left;
}
else
{
if(i==1)
{
q=s->left;
r->right=s->right;
if(s->left!=NULL)
insert(r,q);
}
if(i==2)
{
q=s->right;
r->left=s->left;
if(s->right!=NULL)
insert(r,q);
}
}
}
}
while(flag==0&&s!=NULL);
printf("\n Delete Any More[Y/N] : ");
scanf("%c",&temp);
}
while(temp=='y');
break;
case 3:printf("****** Search Operation *******\n");
do
{
printf("\n Enter Name To Be Searched");
gets(temp1);
i=0;
s=root;
while(s!=NULL&&i==0)
{
if(strcmp(s->data,temp1)< 0)
s=s->right;
if(strcmp(s->data,temp1)>0)
s=s->left;
if(strcmp(s->data,temp1)==0)

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i=1;
}
if(i==0)
printf("\nElement Not Found\n");
else
{
printf("\n\tElement Found\n");
printf("\nEnter More Elements[Y/N] : ");
scanf("%c",&temp);
}
}
while(temp=='y');
break;
case 4:clrscr();
do
{
clrscr();
printf("\n 1. Preorder\n 2. Inorder \n 3. Postorder \n 4. Non Recursion
\n 5. Exit");
printf("\nEnter Your Choice : ");
scanf("%d",&c);
if(root==NULL)
printf("Tree Not Started Yet");
else
tree(root,c);
printf("\n Press Any Key To Continue......");
getch();
}
while(c!=5);
break;
}
}
while(choice!=5);
}

OUTPUT :-

1. ENTER
2. DELETE
3. SEARCH
4. DISPLAY
5. EXIT

Enter Your Choice: 1


Enter Data: 15
Enter Your Choice: 1
Enter Data: 11
Enter Your Choice: 1
Enter Data: 19
Enter Your Choice: 1
Enter Data: 9
Enter Your Choice: 1
Enter Data: 15
Enter Your Choice: 1
Enter Data: 17
Enter Your Choice: 1

MAAZ ST-647562-6
12
Enter Data: 33
Enter Your Choice: 1
Enter Data: 7
Enter Your Choice: 1
Enter Data: 10
Enter Your Choice: 1
Enter Data: 16
Enter Your Choice: 1
Enter Data: 18
1. ENTER
2. DELETE
3. SEARCH
4. DISPLAY
5. EXIT

Enter Your Choice: 4

System will display- 1. Preorder\n 2. Inorder \n 3. Postorder \n 4. Non Recursion \n 5. Exit

******Data Entry******

Enter Your Choice : 2

7, 9, 10, 11, 15, 15, 16, 17, 18, 19, 33

Press any key to continue…

Experiment No:- 4

OBJECTIVE :- To define a node with the following structure:

Data Link

Read n elements, allocate them in to n nodes in a linked list:


a) Insert a node after a given node;
b) Delete a node containing some elements; and
c) Search a node for a given element.

REQUIREMENTS :- Laptop with Windows XP (1.73 GHz, 512 MB RAM) with Turbo-C compiler.

Implementation of Singly Link List


# include<stdio.h>
# include<conio.h>
# include<alloc.h>
# include<stdlib.h>

//Node for Singly Link List


struct node
{
int data;

MAAZ ST-647562-6
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struct node *link;
};

void create(struct node *,int); //for appending at the end of the list
void in_start(struct node *,int); //for insertion at the start of the list
void del(struct node *,int); //for deletion of an element from the list
void search(struct node *, int); //for searching an element
void in_pos(struct node *,int,int); //for insertion in Specified position
int count(struct node *); //for counting the no of nodes
void display(struct node *); //for displaying the list

void main()
{ struct node *list; /* list can be said as the head or a start ptr */

/* Printing the menu */


int num,loc;
char choice;
char ans;
list=NULL;
do
{
clrscr();
printf("PROGRAM TO IMPLEMENT SINGLY LINKED LIST ");
printf("\n=====================================");
printf("\n\n1.Create \\ Appending The List");
printf("\n2.Insert Node At Beginning/Start");
printf("\n3.Insert Node In Middle");
printf("\n4.Deleting a Node");
printf("\n5.Counting The No Of Nodes");
printf("\n6.Displaying the list");
printf("\n7.Search an Item");
printf("\n8.Exit");
printf("\n\nEnter ur Choice : ");
scanf(“%c”,&Choice);
switch(choice)
{
case '1':
printf("Enter any number (-1111 to terminate: ");
scanf("%d",&num);
create(&list,num);
break;

case '2':
printf("Enter The Data : ");
scanf("%d",&num);
in_start(&list,num);
break;

case '3':
printf("\nEnter The Position :");
scanf("%d",&loc);
printf("\nEnter The Data : ");
scanf("%d",&num);
in_middle(&list,loc,num);
break;

MAAZ ST-647562-6
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case '4':
printf("\nEnter The Data u Want To Delete : ");
scanf("%d",&num);
del(&list,num);
break;

case '5':
printf("\nThe No Of Nodes Are %d",count(list));
getch();
break;

case '6':
display(list);
getch();
break;

case '7':
printf("\nEnter the number to be searched.......");

scanf("%d",&num);
search(&list,num);
getch();

break;

case '8':
printf("\n\nQuiting.......");
getch();
exit(0);
break;

default:
printf("Invalid choice. Please Enter Correct Choice");
getch();

}while(choice !=7);

void create(struct node *list,int num)


{
struct node *temp,*current;

While(num!=-1111)
{
temp=(struct node *) malloc(sizeof(struct node));
temp->data=num;
temp->link=NULL;
if(list==null)
list=temp;
else
current->link=temp;
Current=temp;
}

MAAZ ST-647562-6
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return(list);
}

void display(struct node *list)


{
struct node *current;
current=list;
if(list==NULL)
{
printf("\n\nEmpty Link List.Can't Display The Data");
getch();
return(list);
}
else
{
printf(“\n the listing of nodes of linked list are \n”);
printf(“\n Start ->”);
while (current!=null)
{
printf(“\n %d->”, current->data);
current=current->link;
}
printf(“\n End ->”);
}
getch();
}

int count(struct node *list)


{
int c=0;
if(list==NULL)
{
printf("Empty Link List.\n");
getch();
}
while(list!=NULL)
{
c++;
list=list->link;
}
return c;
}

void in_start(struct node *list,int num)


{
struct node *temp;
if(list==NULL)
{
printf("Link List Is Empty.Can't Insert.");
getch();

}
else
{
temp=(struct node *)malloc(sizeof(struct node));
temp->data=num;

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temp->link=list;
q=temp; /* pointing to the first node */
}
return(list);
}

void in_pos(struct node *list,int loc,int num)


{
struct node *temp,*t, *p;
int i;
t=list;
if(list==NULL)
{
printf("\n\nLink List Is Empty.Can't Insert.");
getch();
return(list);
}
else
{
temp = (struct node *)malloc(sizeof(struct node));
temp->data=num;
if((loc==1)||(list==nul))
{

temp->link=list;
list=temp;
}
else
{
p=null;
t=list;
for(i=2;i<=loc;i++)
{
p=t;
t=t->link;
if(t=null)
break;
}
temp->link=p->link;
p->link=temp;
}

}
return(list);
}

void search(struct node *list,int num)


{
if(list==NULL)
{
printf("\n\nEmpty Linked List.Cant Find The Data.");
getch();
return(list);

MAAZ ST-647562-6
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}
else
{
while(list!=NULL)
{
if(num==list->data)
break;
else
list=list->link;
}
if(list==null)
printf("\nData Not Found...");
else
printf("\nData Found %d... ",num);
}
getch();
}

void del(struct node *list,int num)


{
struct node *current, *prev;
int i;
if(list==NULL)
{
printf("\n\nEmpty Linked List.Cant Delete The Data.");
getch();
return(list);
}
else
{
prev=null;
current=list;
if(loc==1)
{
num=current->data;
if(list->link==null)
list=null;
else
list=current->link;
}
else
{
for(i=1;i<loc;i++)
{
if(current->link==null)
{
Printf(“\n Not enough node”);
getch();
return(list);
}
prev=current;
current=current->link;
}
prev->link=current->link;
}

MAAZ ST-647562-6
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num=current->data;
printf(“\n Deleted item is %d”, num);
free(current);
return(list);
}
}

OUTPUT

PROGRAM TO IMPLEMENT SINGLY LINKED LIST


1. Create \ Appending the List
2. Insert Node at Beginning/Start
3. Insert Node in Middle
4. Deleting a Node
5. Counting the Number of Nodes
6. Displaying the List
7. Search an Item
8. Exit

Enter your choice: 1


Enter any number (-1111 to terminate) 10
Enter any number (-1111 to terminate) 6
Enter any number (-1111 to terminate) 15
Enter any number (-1111 to terminate) 90
Enter your choice: 4
Enter the data you want to delete:
15

Data Deleted

Enter your choice: 7

Enter the data to be searched:


10

Data found at position: 1

Enter your choice: 8

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Experiment No:- 5
OBJECTIVE : - To maintain an array whose size can be known during the execution time of the
program only. Implement such an array, initialize it, and display its contents.

REQUIREMENT : - PC having the OS minimum windows XP, Turbo C complier

C Program for Implementing Array

#include<stdio.h>

#include<conio.h>

unsigned char ArrayBuffer[]={0,1,2,3,4,5,6,7,8,9};

void DisplayArray(unassigned int index)

unsigned int temp=0;

printf(“\n\nArray Content Are =”);

while(temp!=index)

printf(“%d”, ArrayBuffer[temp++]);

void main(void)

clrscr(); //clear screen

printf(“\nProgram has been started……”);

printf(“\nSize of array is %d”, size of (ArrayBuffer)/sizeof (ArrayBuffer[0]]);

printf(“\nMemory size of array is %d Byte”,size of (ArrayBuffer));

DisplayArray(sizeof(ArrayBuffer)/sizeof (ArrayBuffer[o]));//display the array content

OOUTPUT

Program has been started……

Size of the array is 15

Memory size of the array is 15 Bytes

Array Contents are= 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14

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Experiment No:- 6
OBJECTIVE :- To write a ‘C’ Program that will encrypt a given text in the following manner. For
each line of text –
a) Convert each character to ACSII equivalents;

b) Generate a positive random integer (using library function);

c) Add the integer to ACSII values of each character;

d) Let A1 denotes lowest permissible value in ASCII code and A2 denotes highest permissible value
and ASCII code. If the integer generated in step (iii) exceeds A2 then subtract A2 from the integer and
add A1 to the remainder ensuring that the number will remain between A1 and A2 ;and

e) Write out the encrypted character

REQUIREMENT :- Laptop with Windows XP (1.73 GHz, 512 MB RAM) with Turbo-C compiler.

Implementation of the objective

#include<stdio.h>
#include<conio.h>
#include<stdlib.h>
#include<time.h>
#inculde<string.h>
#define MAX-STRING-SIZE 50
Int GetKeyRand(void);
char Encrypt(char character,int key);
//main function
void main(void)
{
char InputString[Max_STRING_SIZE];
int i=0;
unsigned char ch;
int EncryptionKey;
clrscr();
printf(“\n Program has been started*********”);
while(1)
{
i=0;
printf("\n\n Enter the string to encrypt (Max Length %d char)\n",MAX-
STRING_SIZE);
gets(InputString);
if(strlen(InputString) > MAX_STRING_SIZE)
{
printf(“/n String You Typed exceed from max Limit”);
}
else
{
EncryptionKey = GetKeyRand();
printf("\n The key is: %d",EncryptionKey);
printf("\n Here is the encrypted string you entered =");
while(InputString[i]!='\0')
{
printf("%c",Encrypt(InputString[i++],EncryptionKey));
}

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21
}
ch =getche();
if((ch!=’Y’) && (ch!=’y’))
break;
}
}
//function to generate random number
int GerKeyRand(void)
{
randomize();
return random(255);
}
//function to encrypt as per the objective
char Encrypt (char character, int key)
{
int number = (int)character + key;
if(number==255)
{
number = number - 255;
}
return ((char)number);
}

OUTPUT

Enter the string to encrypt (max length 100)


BCDEFGHI
The Key is
23
Here is the encrypted string you entered:
KLMNOPQR

Experiment No:- 7

OBJECTIVE :- To design on paper a full 18 X 16 bit Barrel Shifter.

Definition and Design of 16-bit Barrel Shifter

A barrel shifter is a combinational logic circuit with n data inputs, n data outputs, and a set of control
inputs that specify how to shift the data between put. A barrel shifter that is part of a microprocessor
CPU can typically specify the direction of shift (left or right), the type of shift (circular, arithmetic, or
logical), and the amount of shift (typically 0 to n-1 bits, but sometimes 1 to n bits).

In this subsection, we’ll look at the design of a simple 16-bit barrel shifter control input S[3:0] to
specify the amount of shift. For example, if the input word is ABCDEFGHGIHKLMNOP (where
each letter represents one bit), and the control input is 0101 (5), then the output word is
FGHGIHKLMNOPABCDE. From one point of view, this problem is deceptively simple. Each output
bit rolled by the shift-control s, which each multiplexer data input connected to the appropriate On the
other hand, when you look at the details of the design, you’ll see that there are trades-offs in the speed
and size of the circuit.

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22

Let us first consider a design that uses off-the-shelf MSI multiplexers. A 16-input, one bit multiplexer
can be built using two 74x151s, by applying S3 and its complement to the EN_L inputs and
combining the Y_L data outputs with a NAND gate, as we showed in Figure for a 32-input
multiplexer. The low-order shift-control inputs, S2-S0 connect to the like-named select inputs ‘151s.

We complete the design by replicating this 16-input multiplexer 16 times and hooking up the data
inputs appropriately, as shown in Figure. The top ’151 of each pair is enabled by S3_L, and the
bottom one by S3; the remaining select bits are connected to all 32 ’151s. Data inputs D0-D7 of each
’151 are connected to the DIN inputs in the listed order from left to right.

RESULT

Input Word Control Input S [3:0] Output Word


1011110001110011 0101 1000111001110111
1111100001110011 1001 1110011111110000

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23
Experiment No:- 8
OBJECTIVE :- To Design a 4-bit, 8 function arithmetic unit that will meet the following
specifications.
S1 S2 S3 Function
0 0 0 2A
0 0 1 A+B
0 1 0 A+B'
0 1 1 A-1
1 0 0 2A-1
1 0 1 A+B+1
1 1 0 A+B'+1
1 1 1 A

OVERVIEW

An arithmetic unit is a combinational circuit that performs arithmetic micro operations on a pair of n-
bit operands (ex. A[3:0] and B[3:0]). The operations performed by an AU are controlled by a set of
function-select inputs. Block diagram of 4-bit AU is given below:

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24
The diagram has four full adder circuits that constitute the 4-bit adder and four multiplexers for
choosing different operations. There are two 4-bit inouts A and B and a 4 bit output D. the four inputs
from A go directly to the X inputs of the binary adder. Each of the four inputs from B is connected to
the data inputs of the multiplexers. The multiplexer’s data inputs also receive the compliment of B.
The other two data imputs are connected to logic-0 and logic-1, Logic-0 is a fixed voltage value(0
bolts for TTl integrated circuits) and the logic-1 signal can be generated through an inverter whose
input is 0.

The four multiplexers are controlled by two selection inputs, S1 and S0. The input carry Cin goes to
the carry input of the FA in the least significant position. The other carries are connected from one
stage to the next.

The output of the binary adder is calculated from the following arithmetic sum:

D=A+Y+Cin

Where A is the 4-bit binary number at the X inouts and Y is the 4-bit binary number at the Y inputs of
the binary adder. Cin is the input carry, which can be equal to 0 or 1, it is possible to generate the
eight arithmetic micro operations.

1. When S1S0=00, the value of B is applied to the Y inputs of the adder. If Cin=0, the output
D=A+B. If Cin=1, output D=A+B+1. Both cases perform the add micro operation with or
without adding the input carry.
2. When S1S0=01, the complement of B is applied to the Y inputs of the adder. If Cin=1, then
D=A+B’+1. This produces A plus the 2’s complement of B, which is equivalent to a
subtraction of A-B. When Cin=0, then D=A+B’. This is equivalent to a subtraction with
borrow, that is A-B+1.
3. When S1S0=10, the inputs from B are neglected, and instead, all 0’s are inserted into Y Inputs.
The output becomes D=A+0+Cin. This gives D=A when Cin=0 and D=A+1 when Cin =1. In
the first case we have a direct transfer from input A to output D. In second case the value of A
is incremented by 1.
4. When S1S0=11, all 1’s are inserted into the Y inputs of the adder to produce the decrement
operation D=A-1 when Cin=0. This is because a number with all 1’s is equal to the 2’s
complement of 1 (the 2’s complement of binary 0000 is 1111). Adding a number A to the 2’s
complement of 1 produces F=A+ 2’s complement of 1=A-1. When Cin=1, then D=A-1+1=A,
which causes a direct transfer from input A to putput D. Note that the micro operation D=A is
generated twice so there are only seven distinct micro operations in the arithmetic circuit.

Design Strategies

When designing the AU we will follow the principle “Divide and Conquer” in order to use a modular
design that consists of smaller, more manageable blocks, some of which can be re-used. Instead of
designing the 4-bit AU as one circuit we will first design a one-bit AU, also called a bit-slice. These
bit-slices can then be put toghether to make a 4-bit AU.

DESIGN

1. Build a macro for logics A and B. This macro should have four inputs(S1, S0, Ai and Bi) and
two outputs (Xi and Yi). Call it bit-slice.
2. You need two 4-bit registers to store the value A and B.
3. You need four instances of the macro you built in step 1.
4. You need four full adders. You can build your own or fined one in the Xillinx library.
5. Connect four switched to the inouts of the two 4-bit registers (D3, D2, D1 and D0)
respectively.
6. Use switch to enable one of the registers and disable the other.
7. Use a button switch as a clock for the two registers.
8. Connect the outputs of the registers to the proper inputs of the bit-slice macro.

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25
9. Connect the outputs of the bit-slice macros to the full adder as in below given figure

10. Use the switches for the control signals S1, S0 and Cin respectively.
11. Import the multiplexed seven-segment display macro you built earlier and connect the outputs
of the register A to the most left display and the output of register B to the second left display.
Connect the outputs of the adder to the right most display as in Figure.
12. Use three LEDs for over-flow, carryout and signals.

OUTPUT

S1 S2 S3 Function Micro-operations
0 0 0 2A Multiply by 2
0 0 1 A+B Add
0 1 0 A+B' Subtract without carry
0 1 1 A-1 Decrement
1 0 0 2A-1 Multiply by 2 with carry
1 0 1 A+B+1 Addition with increment
1 1 0 A+B'+1 Subtraction
1 1 1 A Transfer A

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26
EXPERIMENT No:-9
OBJECTIVE :- To draw the system flow chart showing the following steps in processing customers
sales order:

a) Open the mail.


b) Make an entry in an ‘Order log’ recording the receipt of each order.
c) Edit the order for missing or erroneous information; if no errors go to (e), else go to (d).
d) Add any needed information.
e) Check the customer’s credit rating.
f) Forward orders from customers with bad credit ratings to the credit manager. If he rejects it,
the party is to be intimated: otherwise go to (g).
g) Forward orders from customers to the key punch department.
h) Place the sales order in a file.
i) Sort the sales order cards using computer into item number sequence.
j) Process the sales order cards against the inventory master file producing an updated master
file and a printed listing of each transaction.

FLOW-CHART

Open the Mail

Make an entry in an
‘Order Log’ recording
the receipt of each order.

Yes Add information or


Checking
remove the error
Errors
in

No

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Yes
Forward orders from
Is customer’s
cutomers with bad credit
credit rating
ratings to the credit
bad?
manager

No

Forward Customer’s order to No Credit


key punch department manager
rejects
order?
bad?
Place the sales order in a file

Inform Customer
Sort the sales order cards
about the rejection
using computer into item
of his order
number sequence.

Process the sales order cards Stop


against the inventory master file
producing an updated master
file
Inventory Master
File
Producing updated
master file

Print each transaction


on Printer

Stop

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28
Experiment No: - 10

OBJECTIVE :- To describe in detail a pay roll data processing application giving inputs, outputs and
files required. Draw a system flow – chart and show the structure of input documents and output
reports.

Definition of Payroll Application

In a company, payroll is the sum of all financial records of salaries, wages, bonuses and deductions.
Any system which is going to enable the company maintains and manages paychecks / pay slips,
salaries, wages etc., and different levels of employees etc., is called a Payroll System.

A payroll system is adopted by the employer to process payment of salaries of the employees. These
are various kinds of payroll system; one is an automated disbursement facility that enables fund
transfers from the employer’s bank account to various individual accounts of the employees. Under
this system, the employer need to maintain an account which should be sufficiently funded to cover
payroll amount of the employees, including the payroll processing fee, upon transmission of the
payroll data for faster and more convenient crediting of employee accounts.

Inputs for Payroll Application

The Inputs required are given below:


1. Files having all details of every employee like Name, Address, date of Birth, Employee ID,
Basic Salary, DA, HRA, Joining Date, Category of Employee (Temporary or Permanent),
Department, Designation, Location and PAN No. etc., with the basic format acceptable to the
payroll system.
2. Timesheet data for every employee like attendance report.
3. Leaves record data for each employee like paid and Unpaid leaves.
4. Employee Bank and PF account details.
5. File having the details of other finance related information like Loans etc.
6. Claims related information like food claims, tour claims etc.

Outputs for Payroll Application

The Outputs are mentioned below:

1. Payroll Register:
2. Pay Slips of employee.
3. To provide a tax efficient form of payment.
4. Personal & accident insurance.
5. Attract & retain staff of the right caliber.
6. Loan statement if any.
7. Provide Holidays & social facilities.
8. Provide sports & social facilities.
9. Claim status report.
10. Provides profits & Bonuses.
11. Employee appraisal report.

OUTPUT

 Employees without Pay codes list displays the names and ID number of employees who are not
assigned pay codes.

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 Employees list by department provides a list of departments and the employees assigned to each
department. The name, employee number, and position is given for each employee.

 Employees list by location includes the locations of each employee in the company.

 Employees list by supervisor includes the supervisor of each employee in the company.

 Vacation/ Sick Time Availability list displays the amount of vacation and sick time available for
employees who are eligible to receive vacation. Benefits and sick time.

 Employees Pay History Report shows the pay code, pay date, department, job, hours worked, days
worked, weeks worked, pay rate, and amount paid to each employee. Print this report to review the
pay history of each employee.

 Check Register shows detailed information for each payroll check in a computer check run or each
manual check. The employee ID, employee name, department, social security number, gross pay,
deductions, and net pay are shown for each check. The tax withholding and liability amounts for a
pay run are summarized at the end of the report. The payroll Check Register will be printed
automatically after you post a check your permanent records.

 Department posting journal shows the hour and dollar amounts for each department included in a
pay run. The Department Posting Journal will be printed automatically when you post a check run.
This report is a part of the audit trail are should be kept with your permanent records.

 Vacation/Sick Time Accural Register shows the amount of vacation benefits and sick Time acured
for eligible employees during a pay period. The Vacation/Sick Time Accural Register is printed
automatically when you post a acheck run. This report is a part of the audit trail and should be kept
with your permanent records.

Salient Features

1. Employee Management System with complete record.


2. Maintenance of Employee master, employee’s relative, Allowance, Deduction, Loan,
leave, etc.
3. Attendance System with In/Out Time Recording System.
4. Attendance for for thousand employees within few minutes.
5. Maintenance of Employee ledger, Payment, Receipt etc.
6. Reports for Provident Fund, ESIC, Minimum wages, Bonus Act, Equalization of
wages etc with complete details.
7. Printing of salary register, Form 1, Overtime Register, Form D, Form J, ESIC, Form
13, Form 9 Revised, Wage slip, P.F. Challan, Form 3, Form 5 etc.

Employee Report, Attendance Report, Loan Statement and Leave Report.

Why Payroll System is Used

1. Guaranteed Accuracy
2. Same Day Turnaround
3. Cost Effective Pricing

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FLOW CHART FOR PAYROLL APPLICATION

Start

Employee name, Address,


List of Employees DOB,DOJ,Designation CTC, PAN,
Account No, Location etc.

Update the Information of 1. Punching System


all the Employee 2. Leave Management

Record Time and 1.Punching System


attendance of employees 2.Saving
3.TDS, Insurance, PF, Medical
allowance
Loan
5.Any other deductions
Make necessary withholdings
from paychecks

Producing Updates in
master File

Pay Employees

Stop

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Payroll

Salary Setting Salary Payment Level Details Integration


to FA

Basic Pay Setting Salary Calculation Leave setting

Increment Setting Pay Slip generation Leave Entry


generation

Deduction Setting Salary statement to Leave Report


Bank generation

Report Salary paid report Leave Deduction


generation

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