EXPERIMENT NO: 3

SCHMITT TRIGGER

Aim: To Design a Schmitt trigger circuit for the given values of UTP and LTP.

Apparatus, Components Required: Function Generator, CRO, Power Supply,

Op-Amp741, Resistors.

Design:
R1 R2
Let UTP = 6V = Vref( ) + Vsat ( )
R1  R2 R1  R2

R1 R2
LTP = -2V = Vref( ) - Vsat ( )
R1  R2 R1  R2

Assume, Vsat = 12 V
R1 R1  R2
UTP + LTP = 4 = 2Vref( ) Vref = 2( )
R1  R2 R1

R2
UTP – LTP = 8 = 2Vsat( )  R1/ R2 = 2
R1  R2

Assume R2 = 1K  R1 = 2 K
Similarly design for, UTP = +4, +8, 2 and –2
LTP = -4, +2, -4 and –4

Circuit Diagram:
+15
V T
7 V
2 i
6 UTP
Vi 3 μA741 V0 t
4 R1 1 LTP 0
-15 V

R2 V
t
o
Vref
Transfer Characteristics:
Vo

UTP

Vi
LTP

Tabular Column:

Sl. UTP LTP

No. Practical Theory Practical Theory

1.
2.
3.
4.

Procedure:

1. Rig up the circuit as shown in the circuit diagram.

2. A sinusoidal input whose amplitude is greater than the magnitude of the
UTP & LTP is applied, a square wave output is obtained and observed on the
CRO.
3. UTP & LTP points are noted.
4. To obtain transfer characteristics, input is applied to channel A and output
to channel B.
5. UTP & LTP are measured on the transfer characteristics also and thus
verified.
Result: The characteristics of Schmitt trigger is studied and verified.

EXPERIMENT NO: 4
4 BIT R-2R DIGITAL TO ANALOG CONVERTER

Aim: To design 4 bit R-2R ladder DAC using Op-Amp.

Apparatus, Components Required: Multimeter, Power Supply, Op-Amp741,

Resistors.

Design:

The analog output voltage VO for a 4 bit DAC shown above can be written as,
VO  (2 3 D3  2 2 D2  21 D1  2 0 D0 )V
Where,
VR 2 R
V  ( )
2 4 3R
VR 2 R
V  (8D3  4 D2  2 D1  D0 )( )( )
2 4 3R
Where,
D0, D1, D2, D3 are digital inputs.
V R = Reference voltage can be selected depending on maximum analog
output voltage required.
V R =+5V.

For example:
D3 D2 D1 D0
(10)10 = ( 1 0 1 0 )2
Therefore D3 = 1 (MSB), D2 = 0, D1 = 1, D0 = 0 (LSB)
V= (8+0+2+0).(5/16).(2/3)=2.08V ( theoretical)
Circuit Diagram:

Observation:

Digital Inputs Analog output Analog output

Decimal Value Vo(volts) Vo(volts)

D3 D2 D1 D0 Theoretical values Practical values

0 0 0 0 0

15 1 1 1 1

Procedure:

1. Connections are made as shown in the circuit diagram.

2. Digital input data is given at D3, D2, D1, D0 and corresponding analog
output voltage Vo is measured using multimeter.
3. The designed values are verified.

Result: 4 bit R-2R Ladder circuit is designed, theoretical & practical values
are compared.

EXPERIMENT NO: 5
MONOSTABLE MULTIVIBRATOR AND ASTABLE MULTIVIBRATOR
Aim: To Design and test the following circuits using IC 555
a. Astable multivibrator for given frequency and duty cycle.
b. Monostable multivibrator for given pulse width.

Apparatus, Components Required: CRO, Power Supply, IC555, Resistors,

capacitors.

Design:

a). Astable Multivibrator:

Given:
f=1.5 KHZ and duty cycle=60%

Time period=1/f = (1/1.5) kHz =0.66msec.

TON
 0.60
T
TON
* 100  60
(0.66 * 10 3 )
TON =0.4msec
TON  0.69( R A  RB )C A
TOFF  0.69 R B C A
Choose C A =0.1μF.
TOFF  0.69 R B * 0.1 * 10 6
For R B =3.8KΩ , R A =2.2KΩ.
Circuit Diagram:

Procedure:
1. Connect the circuit as shown in Figure.
2. Observe the output wave form and voltage across the capacitor.
3. Calculate the frequency and compare it with the theoretical values.

Waveforms:
 T

Vcc
Output Voltage
0V

Ton Toff

(2/3)Vcc
Capacitor Voltage
(1/3)Vcc

b). Monostable Multivibrator:

For pulse width=10 ms,

 Tp=1.1 R1C1
Choose C1=0.1 μF
Hence, R1=90 kΩ

Circuit Diagram:

Procedure:
1. Connect the circuit as shown in Figure.
2. Observe the output wave form.
3. Calculate the pulse width, and compare it with the theoretical values.

Waveforms:
Result: Astable multivibrator, Monostable multivibrator circuits are
designed, theoretical & practical values are compared.