VOLTAGE SAGS MITIGATION TECHNIQUES ANALYSIS

NORSHAFINASH BINTI SAUDIN

A project report submitted in partial fulfillment of the

requirements for the award of the degree of
Master of Engineering (Electrical – Power)

Faculty of Electrical Engineering

Universiti Teknologi Malaysia

JUNE 2007
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To my beloved husband
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ACKNOWLEDGEMENT

I would like to express my gratitude to Allah S.W.T. for giving me the

opportunity to complete this Master’s Project. I am deeply indebted to individuals who,
directly or indirectly, are responsible for this project.

I am most grateful to the most kindheartedness supervisor Dr Ahmad Safawi bin

Mokhtar for his guidance in this project and to panel of seminar presentation, PM. Dr.
Mohd Wazir bin Mustafa and PM. Md. Shah Majid, with their superior guidance,
information and ideas for this project become abundance.

My admiration falls upon En. Saudin bin Mat, my father, and especially to my
mother, Pn. Siah binti Taharin for them to bear with me my absence in the family. Your
encouragement, pray and support are very much appreciated.

I would also like to express my sincere thanks to my entire friend for their
support and ideas during the development of the project.

And last but not the least, to my husband, thanks.

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ABSTRACT

For some decades, power quality did not cause any problem, because it had no
effect on most of the loads connected to the electric distribution system. When an
induction motor is subjected to voltage sag, the motor still operates but with a lower
output until the sag ends. With the increased use of sophisticated electronics, high
efficiency variable speed drive, and power electronic controller, power quality has
become an increasing concern to utilities and customers. Voltage sags is the most
common type of power quality disturbance in the distribution system. It can be caused
by fault in the electrical network or by the starting of a large induction motor. Although
the electric utilities have made a substantial amount of investment to improve the
reliability of the network, they cannot control the external factor that causes the fault,
such as lightning or accumulation of salt at a transmission tower located near to sea.
This project intends to investigate mitigation technique that is suitable for different type
of voltage sags source with different type of loads. The simulation will be using
PSCAD/EMTDC software. The mitigation techniques that will be studied are such as
Dynamic Voltage Restorer (DVR), Distribution Static Compensator (DSTATCOM) and
Solid State Transfer Switch (SSTS). All the mitigation techniques will be tested on
different type of faults. The analysis will focus on the effectiveness of these techniques
in mitigating the voltage sags. The study will also investigate the effects of using the
techniques to phase shift. At the end of the project it is expected that a few suggestions
can be made on the suitability of the techniques.
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ABSTRAK

Beberapa dekad yang lalu, kualiti kuasa tidak menjadi permasalahan kerana ia
tidak memberi kesan yang sangat nyata kepada beban yang bersambung dengan sistem
pengagihan. Apabila motor aruhan mengalami voltan lendut, motor tersebut masih
berfungsi tetapi dengan keluaran yang lebih rendah sehingga kejatuhan voltan tamat.
Walau bagaimanapun, dengan peningkatan penggunaan peralatan elektronik yang maju,
pemacu pelbagai halaju berkecekapan tinggi, dan pengawal elektronik kuasa, kualiti
kuasa mula menjadi perhatian kepada utiliti dan pelanggan. Di mana, voltan lendut
adalah gangguan kualiti kuasa yang seringkali terjadi terhadap sistem pengagihan yang
disebabkan oleh kerosakan pada rangkaian elektrik dan pemulaan yang besar untuk
motor aruhan. Walaupun utiliti telah membuat pelaburan untuk memperbaiki
keboleharapan rangkaian, faktor luaran yang menyebabkan kerosakan masih tidak dapat
dikawal, contohnya kilat dan pengumpulan garam pada menara penghantaraan yang
terletak berhampiran dengan laut. Oleh itu, projek ini bertujuan mengkaji kesesuaian
teknik mitigasi untuk pelbagai punca voltan lendut pada beban yang berbeza di mana
perisian PSCAD/EMTDC digunakan sebagai bantuan untuk simulasi. Teknik - teknik
mitigasi yang dikaji adalah seperti Dynamic Voltage Restorer (DVR), Distribution Static
Compensator (DSTATCOM), dan Solid State Transfer Switch (SSTS). Teknik - teknik ini
akan diuji dengan pelbagai kerosakan yang menyebabkan voltan lendut. Tumpuan akan
diberikan kepada keberkesanan teknik-teknik tersebut untuk mengatasi voltan lendut dan
kesannya terhadap anjakan fasa. Di akhir projek ini, beberapa cadangan akan diutarakan
berkenaan kesesuaian teknik - teknik tersebut digunakan untuk mengatasai voltan lendut.
 vii

TABLE OF CONTENTS

CHAPTER TITLE PAGE

DECLARATION ii
DEDICATION iii
ACKNOWLEDGEMENT iv
ABSTRACT v
ABSTRAK vi
TABLE OF CONTENTS vii
LIST OF TABLES xi
LIST OF FIGURES xii
LIST OF ABBREVIATIONS xv
LIST OF APPENDICES xvi

I INTRODUCTION 1

1.1 Introduction 1
1.2 Problem Statement 3
1.3 Project Objectives 6
1.4 Project Scope 6
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II VOLTAGE SAGS 7

2.1 Introduction 7
2.2 Definition of Voltage Sags 8
2.3 Standards Associated with Voltage Sags 9
2.3.1 IEEE Standard 10
2.3.2 Industry Standard 12
2.3.2.1 SEMI 12
2.3.2.2 CBEMA (ITI) Curve 14
2.4 General Causes and Effects of Voltage Sags 15
2.4.1 Voltage Sags due to Faults 15
2.4.2 Voltage Sags due to Motor Starting 17
2.4.3 Voltage Sags due to Transformer Energizing 18

III PSCAD/EMTDC SOFTWARE 19

3.1 Introduction 19
3.2 Characteristics of Software 20
3.3 Example of Circuit 22
3.4 Conclusion 25
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IV VOLTAGE SAG MITIGATION TECHNIQUES 26

4.1 Introduction 26
4.2 Dynamic Voltage Restorer (DVR) 28
4.2.1 Principles of DVR Operation 28
4.3 Distribution Static Compensator (DSTATCOM) 30
4.2.1 Basic Configuration and Function of
DSTATCOM 31
4.4 Solid State Transfer Switch (SSTS) 34
4.4.1 Basic Configuration and Function of SSTS 35

V MITIGATION TECNIQUES REALIZATION 39

5.1 Sinusoidal PWM-Based Control Scheme 39

5.2 Test System 42
5.3 Dynamic Voltage Restorer 43
5.4 Distribution Static Compensator 45
5.5 Solid State Transfer Switch 47
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VI SIMULATIONS AND RESULTS 49

6.1 Test case 49

6.2 Single line to ground fault 50
6.2.1 Phase A to ground 50
6.2.2 Phase B to ground 56
6.2.3 Phase C to ground 59
6.3 Double lines to ground fault 62
6.3.1 Phase A and B to ground 62
6.3.2 Phase A and C to ground 67
6.3.3 Phase B and C to ground 70
6.4 Conclusion 73

VII CONCLUSION 74

7.1 Conclusion 74
7.2 Suggestion 77

REFERENCES 78
Appendices A-C 81-85
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LIST OF TABLES

TABLE NO. TITLE PAGE

1.1 Cause of TNB network disruption. 4

6.1 (a) Test results for line A to the ground fault. (b) Recovery result. 5
6.2 (a) Test results for line B to the ground fault. (b) Recovery result. 8
6.3 (a) Test results for line C to the ground fault. (b) Recovery result. 1
6.4 (a) Test results for line AB to the ground fault. (b) Recovery result. 6
6.5 (a) Test results for line AC to the ground fault. (b) Recovery result. 9
6.6 (a) Test results for line BC to the ground fault. (b) Recovery result. 2
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LIST OF FIGURES

FIGURE NO. TITLE PAGE

1.1 Demarcation of the various power quality issues defined

by IEEE Std. 1159-1995 2
2.1 Depiction of voltage sag 9
2.2 Immunity curve for semiconductor manufacturing
equipment according to SEMI F47 13
2.3 Revised CBEMA curve, ITIC curve, 1996 14
2.4 Voltage sag due to a cleared line-ground fault 16
2.5 Voltage sag due to motor starting 17
2.6 Voltage sag due to transformer energizing 18
3.1 DVR with main components in PSCAD 23
3.2 The Wye-Connected DVR in PSCAD 24
4.1 Different protection options for improving performance during
power quality variation. 27
4.2 Principle of DVR with a response time of less than one
millisecond 29
4.3 Schematic diagram of the DSTATCOM as a custom
power controller 30
4.4 Building blocks of DSTATCOM 32
4.5 Operation modes of a DSTATCOM 33
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4.6 Schematic representations of the SSTS as a custom power device. 34

4.7 Solid State Transfer Switch systems 35
4.8 Thyristors of the SSTS conducting in the positive and
negative half cycle of the preferred source. 37
4.9 Thyristors on the alternate supply are turned ON on sensing
a disturbance on the preferred source. 38
5.1 Control scheme for the test system implemented in
PSCAD/EMTDC to carry out the DSTATCOM and DVR
simulations. 40
5.2 The test system implemented in PSCAD/EMTDC 42
5.3 One line diagram of the DVR test system 43
5.4 Schematic diagram of the DVR 44
5.5 Schematic diagram of the test system with DVR connected
to the system. 44
5.6 One line diagram of the DSTATCOM test system. 45
5.7 Schematic diagram of the test system with DSTATCOM
connected to the system. 46
5.8 One line diagram of the SSTS test system. 47
5.9 SSTS switches implemented in PSCAD/EMTDC 48
5.10 Schematic diagram of the test system with SSTS connected
to the system. 48
6.1 (a) Phase shift for line A to the ground fault
(b) Rms voltage drop 50
6.2 (a) Corrected phase with DVR
(b) Compensated voltage sag with DVR 51
6.3 (a) Corrected phase using DSTATCOM
(b) Compensated voltage sag using DSTATCOM 53
6.4 (a) Corrected phase using SSTS
(b) Compensated voltage sag using SSTS 54
6.5 Phase shift of line B to the ground fault. 56
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6.6 (a) Phase correction using DVR

(b) Phase correction using DSTATCOM; line B to
the ground fault. 57
6.7 Phase shift of line B to the ground fault. 59
6.8 (a) Phase correction using DVR
(b) Phase correction using DSTATCOM; line C to
the ground fault. 60
6.9 (a) Phase shift for line A and B to the ground fault
(b) Rms voltage drop 63
6.10 (a) Phase correction using DVR,
(b) Phase correction using DSTATCOM; line A and B
to the ground fault. 64
6.11 (a) Compensated voltage sag using DVR
(b) Compensated voltage sag using DSTATCOM;
Line A and B to the ground fault. 65
6.12 Phase shift for line A and C to the ground fault 67
6.13 (a) Phase correction using DVR,
(b) Phase correction using DSTATCOM; line A and C
to the ground fault. 68
6.14 Phase shift for line B and C to the ground fault. 70
6.15 (a) Phase correction using DVR,
(b) Phase correction using DSTATCOM; line B and C
to the ground fault. 71
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LIST OF ABBREVIATIONS

CBEMA - Computer Business Equipment Manufacturers Association

DSTATCOM - Distribution Static Compensator
DVR - Dynamic Voltage Restorer
EMTDC - Electromagnetic Transient Program with DC Analysis
ERM - Electronic Restart Modules
Hz - Hertz
IEC - International Electrotechnical Commission
IEEE - Institute of Electrical and Electronics Engineers
ITIC - Information Technology Industry Council
kV - kilovolt
MVA - megavolt ampere
MVAR - mega volt amps reactive
MW - megawatt
p.u. - per unit
PCC - point of common coupling
PSCAD - Power System Aided Design
PWM - Pulse Width Modulation
RMS - root mean square
SEMI - Semiconductor Equipment and Materials International
SSTS - Solid State Transfer Switch
TNB - Tenaga Nasional Berhad
TRV - transient recovery voltage
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LIST OF APPENDICES

APPENDIX TITLE PAGE

A Data generated by PSCAD/EMTDC for DSTATCOM 81

B Data generated by PSCAD/EMTDC for DVR 83
C Data generated by PSCAD/EMTDC for SSTS 85
 CHAPTER I

INTRODUCTION

1.1 Introduction

Both electric utilities and end users of electrical power are becoming increasingly
concerned about the quality of electric power. The term power quality has become one
of the most prolific buzzword in the power industry since the late 1980s [1]. The issue in
electricity power sector delivery is not confined to only energy efficiency and
environment but more importantly on quality and continuity of supply or power quality
and supply quality. Electrical Power quality is the degree of any deviation from the
nominal values of the voltage magnitude and frequency. Power quality may also be
defined as the degree to which both the utilization and delivery of electric power affects
the performance of electrical equipment [2]. From a customer perspective, a power
quality problem is defined as any power problem manifested in voltage, current, or
frequency deviations that result in power failure or disoperation of customer of
equipment [3].
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Power quality problems concerning frequency deviation are the presence of

harmonics and other departures from the intended frequency of the alternating supply
voltage. On the other hand, power quality problems concerning voltage magnitude
deviations can be in the form of voltage fluctuations, especially those causing flicker.
Other voltage problems are the voltage sags, short interruptions and transient over
voltages. Transient over voltage has some of the characteristics of high-frequency
phenomena. In a three-phase system unbalanced voltages also is a power quality
problem [2]. Among them, two power quality problems have been identified to be of
major concern to the customers are voltage sags and harmonics, but this project will be
focusing on voltage sags.

Figures 1.1 describe the demarcation of the various power quality issues defined
by IEEE Std. 1159-1995. [4]

Figure 1.1 Demarcation of the various power quality issues defined by IEEE
Std. 1159-1995[4]
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Three factors that are driving interest and serious concerns in power quality are
[1]:

i. Increased load sensitivity and production automation. The focus on

power quality is therefore more of voltage quality as the momentary drop
in voltage disrupts automated manufacturing processes.
ii. Automation and efficiency relies on digital components which requires dc
supply. As public utilities supply ac power, dc power supplies powered
by ac are needed by the dc loads.
iii. As more dc power supply are needed the converters that convert ac to dc
cause harmonics to be injected into the system and hence reduce wave
form quality

1.2 Problem Statement

With the increased use of sophisticated electronics, high efficiency variable

speed drive, and power electronic controller, power quality has become an increasing
concern to utilities and customers. Voltage sags is the most common type of power
quality disturbance in the distribution system. It can be caused by fault in the electrical
network or by the starting of a large induction motor. Although the electric utilities have
made a substantial amount of investment to improve the reliability of the network, they
cannot control the external factor that causes the fault, such as lightning or accumulation
of salt at a transmission tower located near to sea.
 4

Meanwhile during short circuits, bus voltages throughout the supply network are
depressed, severities of which are dependent of the distance from each bus to point
where the short circuit occurs. After clearance of the fault by the protective system the
voltages return to their new steady state values. Part of the circuit that is cleared will
suffer supply disruption or blackout. Thus in general a short circuit will cause voltage
sags throughout the system but cause blackout to a small portion of the network [1].

A comprehensive study on the cost of losses due to power quality problem has
not been carried out yet. However, it has been reported that a petrochemical based
industries customer in the Tenaga Nasional Berhad, Malaysia system can lose up to
RM164,000 (US$43,000) per incident related to power quality problem due to voltage
sag. Another semiconductor-based industry in the Klang Valley has estimated the loss of
RM5million for the year 2000. Other types of industries such the cement and garment
industries in Malaysia have also reported huge losses due power quality problems. One
cement plant has reported an average loss of RM300, 000 per incident [2].
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Table 1.1 Cause of TNB network disruption [2]

In general, voltage sags can causes:

i. Motor load to stall/stop

ii. Digital devices to reset causing loss of data
iii. Equipment damage and/or failure
iv. Materials Spoilage
v. Lost production due to downtime
vi. Additional costs
vii. Product reworks
viii. Product quality impacts
ix. Impacts on customer relations such as late delivery and lost of sales
x. Cost of investigations into problem

Therefore, this project intends to investigate mitigation technique that is suitable

for different type of voltage sags source with different type of loads.
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1.3 Project Objectives

The objectives of this project are:

i. To investigate suitable mitigation techniques for different type of voltage

sags source that connected to linear and non-linear load.
ii. To simulate and analyze the techniques using PSCAD/EMTDC software.
iii. To observe the effect on the characteristic of voltage sag such as the
magnitude and phase shift for each techniques.
iv. To make a few suggestions on the suitability of such techniques used for
both type of loads.

1.4 Project Scope

The scopes for the project are:

i. Mitigation techniques that will be studied

a. Dynamic Voltage Restorer (DVR),
b. Distribution Static Compensator (D-STATCOM),
c. Solid State Transfers Switch (SSTS), and
ii. All techniques will be tested on different type of loads.
iii. Analysis will focus on effectiveness of each techniques in mitigating the
voltage sags
 CHAPTER II

VOLTAGE SAGS

2.1 Introduction

Voltage sags are huge problems for many industries, and it is probably the most
pressing power quality problem today. Voltage sags may cause tripping and large torque
peaks in electrical machines. Tripping is caused by under voltage protection or over
current protection. These two protections operate independently. Large torque peaks
may cause damage to the shaft or equipment connected to the shaft. Some common
reason for voltage sags are lightning strikes in power lines, equipment failures,
accidental contact power lines, and electrical machine starts. Despite being a short
duration between 10 milliseconds to 1 second event during which a reduction in the
RMS voltage magnitude takes place, a small reduction in the system voltage can cause
serious consequences [5].
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2.2 Definition of Voltage Sags

The definition of voltage sags is often set based on two parameters, magnitude or
depth and duration. However, these parameters are interpreted differently by various
sources. Other important parameters that describe voltage sags are:

i. the point-on-wave where the voltage sags occurs, and

ii. how the phase angle changes during the voltage sag. A phase angle jump
during a fault is due to the change of the X/R-ratio. The phase angle jump
is a problem especially for power electronics using phase or zero-crossing
switching.

The voltage sags as defined by IEEE Standard 1159, IEEE Recommended

Practice for Monitoring Electric Power Quality, is “a decrease in RMS voltage or current
at the power frequency for durations from 0.5 cycles to 1 minute, reported as the
remaining voltage”. Typical values are between 0.1 p.u. and 0.9 p.u., and typical fault
clearing times range from three to thirty cycles depending on the fault current magnitude
and the type of over current detection and interruption [4].

Terminology used to describe the magnitude of voltage sag is often confusing.

The recommended terminology according to IEEE Std. 1159 is “the sag to 20%,” which
means that line voltage is reduced to 20% of normal value. Another definition as given
in IEEE Std. 1159, 3.1.73 is “A variation of the RMS value of the voltage from nominal
voltage for a time greater than 0.5 cycles of the power frequency but less than or equal
to 1 minute. Usually further described using a modifier indicating the magnitude of a
voltage variation (e.g. sag, swell, or interruption) and possibly a modifier indicating the
duration of the variation (e.g., instantaneous, momentary, or temporary)”. Figure 2.1
shows the rectangular depiction of the voltage sag.
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Figure 2.1 Depiction of voltage sag

2.3 Standards Associated with Voltage Sags

Standards associated with voltage sags are intended to be used as reference

documents describing single components and systems in a power system. Both the
manufacturers and the buyers use these standards to meet better power quality
requirements. Manufactures develop products meeting the requirements of a standard,
and buyers demand from the manufactures that the product comply with the standard
[2].

The most common standards dealing with power quality are the ones issued by
IEEE, IEC, CBEMA, and SEMI. A brief description of each of the standards is provided
in next subtopic.
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2.3.1 IEEE Standard

The Technical Committees of the IEEE societies and the Standards Coordinating
Committees of IEEE Standards Board develop IEEE standards. The IEEE standards
associated with voltage sags are given below [4].

IEEE 446-1995, “IEEE recommended practice for emergency and standby power
systems for industrial and commercial applications range of sensibility loads”

The standard discusses the effect of voltage sags on sensitive equipment, motor
starting, etc. It shows principles and examples on how systems shall be designed to
avoid voltage sags and other power quality problems when backup system operates.

IEEE 493-1990, “Recommended practice for the design of reliable industrial and
commercial power systems”

The standard proposes different techniques to predict voltage sag characteristics,

magnitude, duration and frequency. There are mainly three areas of interest for voltage
sags. The different areas can be summarized as follows [4]:

i. Calculating voltage sag magnitude by calculating voltage drop at critical

load with knowledge of the network impedance, fault impedance and
location of fault.
ii. By studying protection equipment and fault clearing time it is possible to
estimate the duration of the voltage sag.
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iii. Based on reliable data for the neighborhood and knowledge of the system
parameters an estimation of frequency of occurrence can be made.

IEEE 1100-1999, “IEEE recommended practice for powering and grounding

electronic equipment”

This standard presents different monitoring criteria for voltage sags and has a
chapter explaining the basics of voltage sags. It also explains the background and
application of the CBEMA (ITI) curves. It is in some parts very similar to Std. 1159 but
not as specific in defining different types of disturbances.

IEEE 1159-1995, “IEEE recommended practice for monitoring electric power

quality”

The purpose of this standard is to describe how to interpret and monitor

electromagnetic phenomena properly. It provides unique definitions for each type of
disturbance.

IEEE 1250-1995, “IEEE guide for service to equipment sensitive to momentary

voltage disturbances”

This standard describes the effect of voltage sags on computers and sensitive
equipment using solid-state power conversion. The primary purpose is to help identify
potential problems. It also aims to suggest methods for voltage sag sensitive devices to
operate safely during disturbances. It tries to categorize the voltage-related problems that
can be fixed by the utility and those which have to be addressed by the user or
 12

equipment designer. The second goal is to help designers of equipment to better

understand the environment in which their devices will operate. The standard explains
different causes of sags, lists of examples of sensitive loads, and offers solutions to the
problems [4].

2.3.2 Industry Standard

2.3.2.1 SEMI

The SEMI International Standards Program is a service offered by

Semiconductor Equipment and Materials International (SEMI). Its purpose is to provide
the semiconductor and flat panel display industries with standards and recommendations
to improve productivity and business. SEMI standards are written documents in the form
of specifications, guides, test methods, terminology, and practices. The standards are
voluntary technical agreements between equipment manufacturer and end-user. The
standards ensure compatibility and interoperability of goods and services. Considering
voltage sags, two standards address the problem for the equipment [6].

SEMI F47-0200, “Specification for semiconductor processing equipment voltage

sag immunity”

The standard addresses specifications for semiconductor processing equipment

voltage sag immunity. It only specifies voltage sags with duration from 50ms up to 1s. It
 13

is also limited to phase-to-phase and phase-to-neutral voltage incidents, and presents a

voltage-duration graph, shown in Figure 2.2.
SEMI F42-0999, “Test method for semiconductor processing equipment voltage
sag immunity”

This standard defines a test methodology used to determine the susceptibility of

semiconductor processing equipment and how to qualify it against the specifications. It
further describes test apparatus, test set-up, test procedure to determine the susceptibility
of semiconductor processing equipment, and finally how to report and interpret the
results [6].

Figure 2.2 Immunity curve for semiconductor manufacturing equipment according

to SEMI F47 [6]
 14

2.3.2.2 CBEMA (ITI) Curve

Information Technology Industry (ITI, formally known as the Computer &

Business Equipment Manufactures Association, CBEMA) is an organization with
members in the IT industry. Within the organization, the Technical Committee 3 (TC3)
has published the “ITI (CBEMA) curve application note” [7]. The note describes an AC
input voltage that typically can be tolerated by most information technology equipment.
The note is not intended to be a design specification (although it is often used by many
designers for that purpose), but a description of behavior for most IT equipment. The
curve assumes a nominal voltage of 120VAC RMS and 60Hz and is intended for single-
phase information technology equipment [IEEE 1100 – 1999].

The voltage-time curve in Figure 2.3 describes the border of an area. Above the
border the equipment shall work properly and below it shall shutdown in a controlled
way.

Figure 2.3 Revised CBEMA curve, ITIC curve, 1996 [7]

 15

This chapter has described the term “voltage sags” and provided a foundation for
the following chapters. The definitions provided by IEEE standards are the ones that are
used universally. The characterization of voltage sags has also been discussed. This
complies with the industry concerns related to the problem of power quality.

2.4 General Causes and Effects of Voltage Sags

There are various causes of voltage sags in a power system. Voltage sags can
caused by faults (more than 70% are weather related such as lightning) on the
transmission or distribution system or by switching of loads with large amounts of initial
starting or inrush current such as motors, transformers, and large dc power supply [3].

2.4.1 Voltage Sags due to Faults

Voltage sags due to faults can be critical to the operation of a power plant, and
hence, are of major concern. Depending on the nature of the fault such as symmetrical or
unsymmetrical, the magnitudes of voltage sags can be equal in each phase or unequal
respectively.

For a fault in the transmission system, customers do not experience interruption,

since transmission systems are looped or networked. Figure 2.4 shows voltage sag on all
three phases due to a cleared line-ground fault.
 16

Figure 2.4 Voltage sag due to a cleared line-ground fault

Factors affecting the sag magnitude due to faults at a certain point in the system
are:

i. Distance to the fault

ii. Fault impedance
iii. Type of fault
iv. Pre-sag voltage level
v. System configuration
a. System impedance
b. Transformer connections

The type of protective device used determines sag duration.

 17

2.4.2 Voltage Sags due to Motor Starting

Since induction motors are balanced 3 phase loads, voltage sags due to their
starting are symmetrical. Each phase draws approximately the same in-rush current. The
magnitude of voltage sag depends on:

i. Characteristics of the induction motor

ii. Strength of the system at the point where motor is connected.

Figure 2.5 represents the shape of the voltage sag on the three phases (A, B, and
C) due to voltage sags.

Figure 2.5 Voltage sag due to motor starting

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2.4.3 Voltage Sags due to Transformer Energizing

The causes for voltage sags due to transformer energizing are:

i. Normal system operation, which includes manual energizing of a

transformer.
ii. Reclosing actions

Figure 2.6 Voltage sag due to transformer energizing

The voltage sags are unsymmetrical in nature, often depicted as a sudden drop in
system voltage followed by a slow recovery. The main reason for transformer energizing
is the over-fluxing of the transformer core which leads to saturation. Sometimes, for
long duration voltage sags, more transformers are driven into saturation. This is called
Sympathetic Interaction. Figure 2.6 show the voltage sag due to transformer energizing.
 CHAPTER III

PSCAD/EMTDC SOFTWARE

3.1 Introduction

In this project, all the mitigation technique, PSCAD/EMTDC software will be

used to simulate and analyze the techniques. Power System Aided Design (PSCAD) was
first conceptualized in 1988 and began its evolution as a tool to generate data files for
the Electromagnetic Transient Program with DC Analysis (EMTDC) simulation
program. In its early form, Version was largely experimental. Nevertheless, it
represented a great leap forward in speed and productivity, since users of EMTDC could
now draw their systems, rather than creating text listings. PSCAD was first introduced as
a commercial product as Version 2 targeted for UNIX platform in 1994. Version 3
comes in 1994 bringing new usability by fully integrating the drafting and runtime
systems of its predecessors. This integration produced an intuitive environment for both
design and simulation [15].
 20

PSCAD Version 4 represents the latest developments in power system simulation

software. With much of the simulation engine being fully mature form many years, the
new challenges lie in the advancement of the design tools for the user. Version 4 retains
the strong simulation models of it predecessors, while bringing the table an updated and
fresh new look and feel to its windowing and plotting

3.2 Characteristics of Software

PSCAD is a powerful and flexible graphical user interface to the world-

renowned, EMTDC solution engine. PSCAD enables the user to schematically construct
a circuit, run a simulation, analyze the results, and manage the data in a completely
integrated, graphical environment. Online plotting function, controls and meters are also
included, so that the user can alter system parameters during a simulation run, and view
the results directly [15].

PSCAD comes complete with a library of pre-programmed and tested models,

ranging from simple passive elements and control functions, to more complex models,
such as electric machines, FACTS devices, transmission lines and cables. If a particular
model does not exist, PSCAD provides the flexibility of building custom models, either
by assembling them graphically using existing models, or by utilizing an intuitively
Design Editor.
 21

The following are some common models found in systems studied using
PSCAD:

i. Resistors, inductors, capacitors

ii. Mutually coupled windings, such as transformers
iii. Frequency dependent transmission lines and cables (including the most
accurate time domain line model in the world)
iv. Current and voltage sources
v. Switches and breakers
vi. Protection and relaying
vii. Diodes, thyristors and GTOs
viii. Analog and digital control functions
ix. AC and DC machines, exciters, governors, stabilizers and initial models
x. Meters and measuring functions
xi. Generic DC and AC controls
xii. HVDC, SVC and other FACTS controllers
xiii. Wind source, turbine and governors

PSCAD Version 4 has some major features that have been included prior to its
predecessors for users’ convenience in modeling and analysis of custom power system,
such as:

i. Windowing Interface – PSCAD V4 boasts a completely new windowing

interface, which includes full MFC (Microsoft Foundation Class)
compatibility, docking window support and a new integrated design
editor.
 22

ii. Drawing Interface – the drawing interface has been enhanced to provide
uniform messaging and core support, as well as a full double-buffered
display.
iii. On-Line Plotting Tools – the online plotting facilities in PSCAD V4 have
been completely redesigned and are now more powerful. The new
advanced graphs come complete with full features, including: full zoom
and panning support, marker control, Polymeter and XY plotting
capabilities.
iv. Off-Line Plotting Facilities – with the inclusion of Livewire, the best data
visualization and analysis software package available today, PSCAD
output come to life.
v. Single-Line Diagram Input – PSCAD now includes the ability to
construct a circuits in a convenient and space saving single-line format.
This new feature includes fully adaptive three-phase electrical
components in the Master Library can be adjusted easily to display a
single-line equivalent view.
vi. MATLAB®/SIMULINK® Interface – now interface PSCAD to both
MATLAB® and/or SIMULINK® files.

3.3 Example of Circuit

A typical DVR built in PSCAD and installed into a simple power system to
protect a sensitive load in a large radial distribution system [4] is presented in Figure 3.1.
The coupling transformer with either a delta or wye connection on the DVR side is
installed on the line in front of the protected load. Filters can be installed at the coupling
transformer to block high frequency harmonics caused by DC to AC conversion to
reduce distortion in the output. The DC voltage source is an external source supplying
 23

DC voltage to the inverter to convert to AC voltage. The optimization of the DC source

can be determined during simulation with various scenarios of control schemes, DVR
configurations, performance requirements, and voltage sags experienced at the point
DVR is installed.

Figure 3.1 DVR with main components in PSCAD

The inverter is a six-pulse gate turn off (GTO) thyristor controlled bridge.
Currents will follow in different directions at outputs depending on the control scheme,
eventually supplying AC output power to the critical load during power disturbances.
The control of this bridge is indeed the control of thyristor firing angles. Time to open
 24

and close gates will be determined by the control system. There are several methods for
controlling the inverter. To model a DVR protecting a sensitive load against only
balanced voltage sags, a simple method of using the measurement of three-phase rms
output voltage for controlling signals can be applied. Amplitude modulation (AM) is
then used. In addition, to provide appropriate firing angles to thyristor gates the
switching control using pulse width modulation (PWM) technique and interpolation
firing is employed.

Figure 3.2 The Wye-Connected DVR in PSCAD

 25

In Figure 3.2 the transformer is wye-connected with a common connection to the

midpoint of the DC source. This allows that current will pump into each phase through
each pair of GTO and then return without affecting the other two phases. It is noted that
to maintain an equal injecting voltage to each phase, the same value of DC voltage at
each half of the source would be required.

3.4 Conclusion

PSCAD Version 4 is a powerful tools to simulate and analysis custom power

systems. With all the benefits, designing a systems is as simple as using a drawing board
and a pencil in our hands. Many new models have been added to the PSCAD Master
Library since the last release of PSCAD V3 thus improving capability of designing.
Navigating the software is now has been made easy with the multi-window tab feature
and toolbars. Common components were made available and easy to drag-and-drop it to
the drawing board.

All those features were shadowed over with the limitation due to its commercial
value. It has been described in the manual as Dimension Limits. Those limits are divided
into two major groups which are Edition Specific Limits and Compiler Specific Limits.
As for this project those limitations be of less interest because only one subsystem that
will be analysis for each mitigation technique.
 CHAPTER IV

VOLTAGE SAG MITIGATION TECHNIQUES

4.1 Introduction

Different power quality problems would require different solution. It would be

very costly to decide on mitigate measure that do not or partially solve the problem.
These costs include lost productivity, labor costs for clean up and restart, damaged
product, reduced product quality, delays in delivery and reduced customer satisfaction.

Voltage sag can be classified in power quality problem. Hence, when a customer
or installation suffers from voltage sag, there is a number of mitigation methods are
available to solve the problem. These responsibilities are divided to three parts that
involves utility, customer and equipment manufacturer. Figure 4.1 shows the different
protection options for improving performance during power quality variation [1].
 27

Figure 4.1 Different protection options for improving performance during power
quality variation. [1]

This project intends to investigate mitigation technique that is suitable for

different type of voltage sags source with different type of loads. The simulation will be
using PSCAD/EMTDC software. The mitigation techniques that will be studied such as
using dynamic voltage restorer (DVR), distribution static compensator (DSTATCOM),
and solid state transfer switch (SSTS).
 28

4.2 Dynamic Voltage Restorer (DVR)

Voltage magnitude is one of the major factors that determine the quality of
power supply. Loads at distribution level are usually subject to frequent voltage sags due
to various reasons. Voltage sags are highly undesirable for some sensitive loads,
especially in high-tech industries. It is a challenging task to correct the voltage sag so
that the desired load voltage magnitude can be maintained during the voltage
disturbances [8].

The effect of voltage sag can be very expensive for the customer because it may
lead to production downtime and damage. Voltage sag can be mitigated by voltage and
power injections into the distribution system using power electronics based devices,
which are also known as custom power device [9]. Different approaches have been
proposed to limit the cost causes by voltage sag. One approach to address the voltage
sag problem is dynamic voltage restorer (DVR). It can be used to correct the voltage sag
at distribution level.

4.4.1 Principles of DVR Operation

A DVR is a solid state power electronics switching device consisting of either

GTO or IGBT, a capacitor bank as an energy storage device and injection transformers.
It is connected in series between a distribution system and a load that shown in Figure
4.2. The basic idea of the DVR is to inject a controlled voltage generated by a forced
commuted converter in a series to the bus voltage by means of an injecting transformer.
A DC capacitor bank which acts as an energy storage device, provides a regulated dc
 29

voltage source. A DC to Ac inverter regulates this voltage by sinusoidal PWM

technique.

During normal operating condition, the DVR injects only a small voltage to
compensate for the voltage drop of the injection transformer and device losses.
However, when voltage sag occurs in the distribution system, the DVR control system
calculates and synthesizes the voltage required to maintain output voltage to the load by
injecting a controlled voltage with a certain magnitude and phase angle into the
distribution system to the critical load [9].

Figure 4.2 Principle of DVR with a response time of less than one millisecond

Note that the DVR capable of generating or absorbing reactive power but the
active power injection of the device must be provided by an external energy source or
energy storage system. The response time of DVD is very short and is limited by the
power electronics devices and the voltage sag detection time. The expected response
time is about 25 milliseconds, and which is much less than some of the traditional
methods of voltage correction such as tap-changing transformers [8].
 30

4.3 Distribution Static Compensator (DSTATCOM)

In its most basic function, the DSTATCOM configuration consist of a two level
voltage source converter (VSC), a dc energy storage device, a coupling transformer
connected in shunt with the ac system, and associated control circuit [10, 11] as shown
in Figure 4.3. More sophisticated configurations use multipulse and/or multilevel
configurations as discussed in [12]. The VSC converts the dc voltage across the storage
device into a set of three phase ac output voltages. These voltages are in phase and
coupled with the ac system through the reactance of the coupling transformer. Suitable
adjustment of the phase and magnitude of the DSTATCOM output voltages allows
effective control of active and reactive power exchanges between the DSTATCOM and
the ac system.

Figure 4.3 Schematic diagram of the DSTATCOM as a custom power controller

 31

The VSC connected in shunt with the ac system provides a multifunctional

topology which can be used for up to three quite distinct purposes [13]:

i. Voltage regulation and compensation of reactive power;

ii. Correction of power factor;
iii. Elimination of current harmonics.

The design approach of the control system determines the priorities and functions
developed in each case. In this case, DSTATCOM is used to regulate voltage at the point
of connection. The control is based on sinusoidal PWM and only requires the
measurement of the rms voltage at the load point.

4.4.1 Basic Configuration and Function of DSTATCOM

The DSTATCOM is a three phase and shunt connected power electronics based device.
It is connected near the load at the distribution systems. The major components of the
DSTATCOM are shown in Figure 4.4 below. It consists of a dc capacitor, three phase
inverter module such as IGBT or thyristor, ac filter, coupling transformer and a control
strategy. The basic electronic block of the DSTATCOM is the voltage sourced converter
that converts an input dc voltage into three phase output voltage at fundamental
frequency.
 32

Figure 4.4 Building blocks of DSTATCOM

Referring to Figure 4.4, the controller of the DSTATCOM is used to operate the
inverter in such a way that the phase angle between the inverter voltage and the line
voltage is dynamically adjusted so that the DSTATCOM generates or absorbs the
desired VAR at the point of connection. The phase of the output voltage of the thyristor
based converter, Vi, is controlled in the same way as the distribution system voltage, Vs.
Figure 4.5 shows the three basic operation modes of the DSTATCOM output current, I,
which varies depending upon Vi.

For instance, if Vi is equal to Vs, the reactive power is zero and the DSTATCOM
does not generate or absorb reactive power. When Vi is greater than Vs, the
DSTATCOM ‘sees’ an inductive reactance connected at its terminal. Hence, the system
‘sees’ the DSTATCOM as a capacitive reactance. The current, I, flows through the
transformer reactance from the DSTATCOM to the ac system, and the device generates
capacitive reactive power. Furthermore, if Vs is greater than Vi, the system ‘sees’ and
inductive reactance connected at its terminal and the DSTATCOM ‘sees’ the system as a
capacitive reactance, then the current flows from the ac system to the DSTATCOM,
resulting in the device absorbing inductive reactive power.
 33

Figure 4.5 Operation modes of a DSTATCOM

 34

4.4 Solid State Transfer Switch (SSTS)

The SSTS can be used very effectively to protect sensitive loads against voltage
sags, swells and other electrical disturbance [14]. The SSTS ensures continuous high
quality power supply to sensitive loads by transferring, within a time scale of
milliseconds, the load from a faulted bus to a healthy one.

The basic configuration of this device consists of two three phase solid state
switches, one for main feeder and one for the backup feeder. These switches have an
arrangement of back-to-back connected thyristors, as illustrated in Figure 4.6

Figure 4.6 Schematic representations of the SSTS as a custom power device.

 35

Each time a fault condition is detected in the main feeder, the control system
swaps the firing signals to the thyristor in both switches, in example, Switch 1 in the
main feeder is deactivated and Switch 2 in the backup feeder is activated. The control
system measures the peak value of the voltage waveform at every half cycle and checks
whether or not it is within a prespecified range. If it is outside limits, an abnormal
condition is detected and the firing signals of the thyristors are changed to transfer the
load to the healthy feeder.

4.4.1 Basic Configuration and Function of SSTS

The SSTS as shown in Figure 4.7 is a high speed, open transition switch which
enables the transfer of electrical loads from one ac power source to another within a few
milliseconds.

Figure 4.7 Solid State Transfer Switch system

 36

The open-transition property of the SSTS means that the switch break contact
with one source before it makes contact with the other source. The advantage of this
transfer scheme over the closed-transition mechanical switch is that the electrical
sources are never cross-connected unintentionally. The cross connection of independent
ac sources, with the alternate source switching on to a faulted system is discouraged by
electric utilities.

The solid state transfer switch consists of two three phase ac thyristor switches.
The thyristor, operating in its two modes, forms the key component of the SSTS. In the
ON-state mode, low impedance forward conduction of current takes place. In the OFF-
state mode, an open circuit with almost infinite impedance occurs in the thyristor.

The basic ON-state and OFF-state properties of the thyristor are used to form an
intelligent switch which can choose between two upstream power sources providing the
better quality of supply available to the electrical load downstream. The basic
configuration is based on anti-parallel thyristor group on preferred and alternate sides of
the switch. A thyristor allows conduction only in forward direction. Figure 4.8 illustrate
how the thyristors of transfer switch 1 can conduct either in the positive or the negative
half cycle of the ac sinusoid and the supply path is indicated by the bold line.
 37

Figure 4.8 Thyristors of the SSTS conducting in the positive and negative half cycle
of the preferred source.

During normal operation, thyristors associated with the preferred source are in
the ON-state normally closed (NC) position, while those associated with the alternate
source are in the OFF-state normally open (NO) position.

Current sensing circuits constantly monitor the states of the preferred and
alternate sources and feed the information to the monitoring high speed controller. Upon
detecting the loss of the preferred source or voltage that is not within the preset range,
the controller blocks the firing impulse signals to the gate-driven thyristors of transfer
switch 1 and instructs the thyristors of transfer switch 2 to turn ON with a fail-safe
interlocking mechanism. Power then flows via the path as indicated by the bold line in
Figure 4.9.
 38

Figure 4.9 Thyristors on the alternate supply are turned ON on a sensing a

disturbance on the preferred source.

The mechanical bypass equipment provides conventional transfer switch

functionality when the SSTS is in a thermal overload condition or is out of service for
testing or maintenance.
 CHAPTER V

MITIGATION TECNIQUES REALIZATION

5.1 Sinusoidal PWM-Based Control Scheme

In order to mitigate the simulated voltage sags in the test system of each
mitigation technique, also to mitigate voltage sags in practical application, a sinusoidal
PWM-based control scheme is implemented, with reference to the DSTATCOM. The
control scheme for the DVR follows the same principle. The aim of the control scheme
is to maintain a constant voltage magnitude at the point where sensitive load is
connected, under the system disturbance.

The control system only measures the rms voltage at load point [10], in example,
no reactive power measurements is required [17]. The VSC switching strategy is based
on a sinusoidal PWM technique which offers simplicity and good response. Since
custom power is a relatively low-power application, PWM methods offer a more flexible
option than the fundamental frequency switching (FFS) methods favored in FACTS
applications. Besides, high switching frequencies can be used to improve the efficiency
 40

of the converter, without incurring significant switching losses. Figure 5.1 shows the
DSTATCOM controller scheme implemented in PSCAD/EMTDC. The DSTATCOM
control system exerts voltage angle control as follows: an error signal is obtained by
comparing the reference voltage with the rms voltage measured at the load point. The PI
controller processes the error signal and generates the required angle δ to drive the error
to zero, in example, the load rms voltage is brought back to the reference voltage. In the
PWM generators, the sinusoidal signal, vcontrol, is phase modulated by means of the angle
δ or delta as nominated in the Figure 5.1. The modulated signal, vcontrol, is compared
against a triangular signal (carrier) in order to generate the switching signals of the VSC
valves.

Figure 5.1 Control scheme for the test system implemented in PSCAD/EMTDC to
carry out the DSTATCOM and DVR simulations.
 41

The main parameters of the sinusoidal PWM scheme are the amplitude
modulation index, ma, of signal vcontrol, and the frequency modulation index, mf, of the
triangular signal. The vcontrol in the Figure 5.1 are nominated as CtrlA, CtrlB and CtrlC.
The amplitude index ma is kept fixed at 1 pu, in order to obtain the highest fundamental
voltage component at the controller output [13, 18]. The switching frequency mf is set at
450 Hz, mf = 9. It should be noted that, an assumption of balanced network and
operating conditions are made.

The modulating angle δ or delta is applied to the PWM generators in phase A,

whereas the angles for phase B and C are shifted by 240° or -120° and 120° respectively.
It can be seen in Figure 5.1 that the control implementation is kept very simple by using
only voltage measurements as feedback variable in the control scheme. The speed of
response and robustness of the control scheme are clearly shown in the test results.
 42

5.2 Test System

Figure 5.2 The test system implemented in PSCAD/EMTDC

Figure 5.2 depict the test system implemented in PSCAD/EMTDC to carry out
the simulations for the aforementioned mitigation techniques. The test system comprises
of a 230 kilovolt, 50 Hertz transmission system, represented in Thevenin equivalent,
feeding into the primary side of a 2-winding transformer. The load is connected to the 11
kilovolt secondary side of the transformer. Another 3-winding transformer will be used
to replace the 2-winding transformer to accommodate the implantation of the two-level
DSTATCOM and it will be connected in the tertiary winding of the transformer to
provide instantaneous voltage support at the load point. The transformer employ a
leakage reactance of 10% or 0.1 per unit with a unity turns ratio and no booster
capabilities exist.
 43

5.3 Dynamic Voltage Restorer

The DVR is a powerful controller that is commonly used for voltage sags
mitigation at the point of connection. The DVR employs the same block as the
DSTATCOM, but in this application the coupling transformer is connected in series with
the ac system, as illustrated in Figure 5.3. The VSC generates a three-phase ac output
voltage which is controllable in phase and magnitude. These voltages are injected into
the ac system in order to maintain the load voltage at the desired voltage reference. The
main features of the DVR control scheme have been explained in section 5.1.

Figure 5.3 One line diagram of the DVR test system

The DVR that have been used to test the system in section 5.1 is shown in Figure
5.4. The DVR is basically the same as DSTATCOM but instead of using a capacitor,
DVR employs 5 kilovolt dc storage supply. The DVR is then connected in series using
transformers in delta to the lines. Figure 5.5 will show the full test system to realize the
effectiveness of the DVR control.
 44

Figure 5.4 Schematic diagram of the DVR

Figure 5.5 Schematic diagram of the test system with DVR connected to the system.
 45

5.4 Distribution Static Compensator

The test system employed to carry out the simulations concerning the
DSTATCOM actuation is shown in Figure 2.9, which is the same system presented in
[16]. A two-level DSTATCOM is connected to the 11 kV tertiary winding to provide
instantaneous voltage support at the load point. A 750 µF capacitor on the dc side
provides the DSTATCOM energy storage capabilities.

The transformer of the test system has been changed to a 3-winding transformer
to accommodate DSTATCOM. The purpose of including the transformer is to protect
and provide isolation between the IGBT legs. This prevents the dc storage capacitor
from being shorted through switches in different IGBT. Figure 5.6 shows the build of
the DSTATCOM in PSCAD/EMTDC which is the two-level voltage source converter
and the realization of the test system being employed shown in Figure 5.7.

Figure 5.6 One line diagram of the DSTATCOM test system.

 46

Figure 5.7 Schematic diagram of the test system with DSTATCOM connected to the
system.
 47

5.5 Solid State Transfer Switch

In the test to carry out the SSTS simulations, the system comprises with two
identical feeders from section 5.1 and a sensitive load connected to the bus bar. Figure
5.8 shows the system that is employed.

Figure 5.8 One line diagram of the SSTS test system.

Simulations were carried out to assess the effectiveness of the simple control
scheme that has been employed in the system proposed earlier. Figure 5.9 shows the
SSTS system that being employed for the test in PSCAD/EMTDC. It comprises of two
sets of switches which is switch group 1 and switch group 2 that alternately turns ON
and OFF corresponds to the fault detector signals. The full system application to test the
SSTS is shown in Figure 5.10.
 48

Figure 5.9 SSTS switches implemented in PSCAD/EMTDC

Figure 5.10 Schematic diagram of the test system with SSTS connected to the system.
 CHAPTER VI

SIMULATIONS AND RESULTS

6.1 Test case

This section contains the results of the simulations to assess the capability of
each technique to mitigate various fault sources. In order to make a fair assessment, the
simulations only use one test system as proposed in section 5.1. The test were divide into
the most common faults which are

6.1.1 Single line to ground fault, and

6.1.2 Double line to ground fault

The most common fault is the single line to ground faults which covers 70% of
total faults. There are many situations that can make the occurrence of single line to
ground faults possible. The low impedance faults are referred to as bolted faults
indicating that the faulted conductors are effectively bolted together to create a line to
 50

line faults which cover 10% of the total faults or double line to fault for the total of 15%.
A much more common effect is where the fault has some finite impedance. When a line
falls on sandy soil or there is a significant distance for an arc to jump, then the
characteristic may have a constant voltage characteristic. The remaining 5% of the faults
are three phase faults.

6.2 Single line to ground fault

6.2.1 Phase A to ground

Using the faults generator, Figure 6.1a clearly shows a phase shift of line A after
the fault has been applied. The angle of the line shifted as much as 88.44° from the
reference angle for line A of -1.94°. For the rms value of the line, we can refer to Figure
6.1b which clearly shows the voltage sag. The value of the rms has been normalized and
for the phase A to the ground fault, the rms drops to 0.685 or nearly 31% from the
reference value
 51

(a)

(b)
Figure 6.1 (a) Phase shift for line A to the ground fault (b) Rms voltage drop

The simulations have two parts which have been run separately. This first part
involves simulating the test system on different fault as mention above. The second part
involves simulating the mitigation techniques with the test system so that each of the
technique can be assessed on their performance in mitigating voltage sags.
 52

(a)

(b)
Figure 6.2 (a) Corrected phase with DVR (b) Compensated voltage sag with DVR

The first technique that has been used is the DVR. Figure 6.2a shows the
capability of the technique to balance the phase shift while Figure 6.2b shows how the
technique compensates the voltage drop. DVR recover almost 96% of the reference
voltage.
 53

The second technique that has been used in mitigating the voltage sags and phase
shift is the DSTATCOM. Figure 6.3a shows the phase balance of the system and Figure
6.3b shows the recovery of the voltage sags. DSTATCOM manage to recover nearly
94% of the voltage with respect to the reference voltage.

(a)

(b)
Figure 6.3 (a) Corrected phase using DSTATCOM (b) Compensated voltage sag
using DSTATCOM
 54

The third technique that has been used is SSTS. In SSTS, whenever the fault
detector control scheme detects a faulty line, it changes the firing angle of the switches
that are connected to the line thus change the feed from the main feeder to the alternative
or backup feed. Figure 6.4a and Figure 6.4b clearly shows that no interruption can be
noticed since the backup feeder is healthy.

(a)

(b)
Figure 6.4 (a) Corrected phase using SSTS (b) Compensated voltage sag using
SSTS
 55

Since SSTS switch the faulty feeder with the healthy one whenever faults occur,
as long as the back up feeder is healthy, the result produced by this technique will
always be the same. Hence, the result of the SSTS will be omitted hereafter with the
assumption that the backup feeder is always healthy.

Table 6.1 (a) Test results for line A to the ground fault. (b) Recovery result

TEST 1: PHASE A TO GROUND

PHASE(°) VRMS(pu)
TECHNIQUES
A B C min max

FAULT -90.38 -121.94 118.06 0.685 0.991

DVR 0.75 -98.93 98.32 0.923 0.963

DSTATCOM 1.28 -147.87 142.4 0.948 1.011

SSTS -1.89 -121.89 118.11 0.989 0.989

(a)

TEST 1: PHASE A TO GROUND RECOVERY

PHASE(°) VRMS(%)
TECHNIQUES
A B C GAIN

DVR 89.63 23.01 19.74 95.85

DSTATCOM 89.1 25.93 24.34 93.77

SSTS 88.49 0.05 0.05 100

(b)
 56

From table 6.1a and 6.1b, we can see that SSTS has the best recovery rate since it
doesn’t involve compensating technique either to absorb or inject power to the system.
The rms value of the system is always constant. It is different than the other two
techniques which require them to inject or absorb power to and from the system. DVR
has better recovery in mitigating the voltage sag than DSTATCOM but poor in
correcting the phase of the lines. DVR recover 2% better in comparison with
DSTATCOM.

6.2.2 Phase B to ground

For test 2, the faults generator still emulates a single line to ground fault of line
B. it is applied from 25 milliseconds to 35 milliseconds. The rms value of the faulty
system is as the same as Figure 6.1b. The only difference is in the phase of the system.
Figure 6.5 show the shifted phase of the system when the fault occurs.

Figure 6.5 Phase shift of line B to the ground fault.

 57

It can be noticed that phase B has been shifted 90° to 150° for the duration of the
fault. Figure 6.6a shows the result from DVR mitigation and Figure 6.6b shows the
result for DSTATCOM for phase correction. Each technique recovers the same value of
the rms as when it mitigates the phase A to the ground fault.

(a)

(b)
Figure 6.6 (a) Phase correction using DVR (b) Phase correction using DSTATCOM;
line B to the ground fault.
 58

From the figure above, it can be observed that other line phases were also
affected when both techniques try to correct the lines phase. The effect can be clearly
noted in Figure 6.6a where the phase of line A and C are shifted even though those lines
were not in fault. This condition as well happen when DSTATCOM try to correct the
phases. The result of the test is shown in Table 6.2(a) whereas Table 6.2(b) will show
the recoveries that have been achieved by those three techniques.

Table 6.2 (a) Test results for line B to the ground fault. (b) Recovery result

TEST 2: PHASE B TO GROUND

PHASE(°) RMS(pu)
TECHNIQUES
A B C min max

FAULT -1.94 149.64 118.06 0.686 0.991

DVR -21 -118.56 140 0.923 0.963

DSTATCOM 15.83 -122.37 96.72 0.942 1.016

SSTS -1.89 -121.89 118.11 0.989 0.989

(a)

TEST 2: PHASE B TO GROUND RECOVERY

PHASE(°) VRMS(%)
TECHNIQUES
A B C GAIN

DVR 19.06 31.08 21.94 95.85

DSTATCOM 13.89 27.27 21.34 92.72

SSTS 0.05 27.75 0.05 100

(b)
 59

DVR manage to recover 95.85% of the rms voltage with respect to the reference
value and DSTATCOM recover 3% less of DVR. For SSTS, the recovery rate is always
100% since the backup feeder is healthy.

6.2.3 Phase C to ground

Test 3 involves line C of the system. This test is practically the same as previous
test which only involves 1 line of the system. The results of the rms voltage is the same
as Figure 6.1(b), but the phase of line C is shifted as much as 90° and can be seen in
Figure 6.7.

Figure 6.7 Phase shift of line B to the ground fault.

 60

Mitigation of the fault outcome is the same product as the preceding test which
DVR and DSTATCOM compensate the rms voltage similarly. Figure 6.8(a) and Figure
6.8(b) shows the phase difference for the mitigation technique accordingly.

(a)

(b)
Figure 6.8 (a) Phase correction using DVR (b) Phase correction using DSTATCOM;
line C to the ground fault.
 61

The numerical result will be shown in Table 6.3(a) whereas the recovery will be
shown in Table 6.3(b). The phase of line C has been corrected but at the same time,
other lines were also affected. This is true for both of the technique but not for SSTS
which is the same as Figure 6.4(a) and Figure 6.4(b).

Table 6.3 (a) Test results for line C to the ground fault. (b) Recovery result.

TEST 3: PHASE C TO GROUND

PHASE(°) RMS(pu)
TECHNIQUES
A B C min max

FAULT -1.94 -121.94 29.69 0.686 0.991

DVR 19.69 -139.45 117.42 0.923 0.963

DSTATCOM -22.83 -101.83 128.67 0.914 1.011

SSTS -1.89 -121.89 118.11 0.989 0.989

(a)

TEST 3: PHASE C TO GROUND RECOVERY

PHASE(°) VRMS(%)
TECHNIQUES
A B C GAIN

DVR 17.75 17.51 87.73 95.85

DSTATCOM 20.89 20.11 98.98 90.41

SSTS 0.05 0.05 88.42 100

(b)

From the table, line A and line B should have stay fixed on 0° and -120°
respectively but after DVR and DSTATCOM try to correct the phase of line C, the
phase of those lines were shifted to 20° and -149° for DVR and -23° and -102° for
DSTATCOM. This could be due to the control scheme that is too simple. In the mean
 62

time, the rms voltage compensation for both DVR and DSTATCOM are still above 90%
in respect to the reference voltage. DVR still maintain ±5% from the overall voltage.
This is true for the entire tests that have been carried out before, while SSTS results are
overwhelming with no ripple or overshoot.

6.3 Double lines to ground fault

The next line of test is double line to the ground fault. As an overall, those
techniques except SSTS suffer terrible loss when its try to mitigate double line to the
ground fault. This fault only covers 15% of overall fault that occurs practically, but it
pose much more danger to the loads that draw supply from the lines.

6.3.1 Phase A and B to ground

The first test to come is line A and line B to the ground fault. The effect of this
fault is depicted in Figure 6.8(a) which shows the phase fault and Figure 6.8(b) that
shows the rms voltage of the test system during the fault.
 63

(a)

(b)
Figure 6.9 (a) Phase shift for line A and B to the ground fault (b) Rms voltage drop

For this test, the phase A and B has been shifted 90° to -90° and 150°
respectively. The voltage drop is doubled from previous test set to 0.366 per unit with
respect to the reference voltage. Figure 6.10(a) shows the result of the DVR try to
correct the shifted phases for the fault and Figure 6.10(b) shows for the DSTATCOM.
 64

(a)

(b)
Figure 6.10 (a) Phase correction using DVR (b) Phase correction using DSTATCOM;
line A and B to the ground fault.

As we can see from the figure, DVR continue to correct the phases of the faulted
lines steadily with almost the same value at the time DVR is correcting the single line to
ground fault. The same abnormality happens with the line that doesn’t need any
correction and in this case, it is line C. The phase of line C is shifted nearly 10°.
However, DSTATCOM capability of correcting the phase of single line to the ground
fault has not been continual for the double line to the ground fault. For lines A and B to
the ground fault, DSTATCOM is able to correct the phase of line B but this is not
occurred to line A. The phase is shifted about 140° and rest at 50°.
 65

Even though the voltage sag is double from the previous value, DVR manage to
compensate the voltage drop and recovered nearly 90% with respect to the reference
voltage. DSTATCOM only manage to recover 78%. This is due to the inability of
DSTATCOM to mitigate double line to the ground fault with only using simple control
scheme that has been introduced in section 5.1. It is clearly shown in Figure 6.11(a) and
6.11(b) for DVR and DSTATCOM respectively.

(a)

(b)
Figure 6.11 (a) Compensated voltage sag using DVR (b) Compensated voltage sag
using DSTATCOM; Line A and B to the ground fault.
 66

The value of voltage sag that have been recovered for other double lines to the
ground fault, such as line A and C to the ground fault and line B and C to the ground
fault, is the same as the result shown in Figure 6.11. Hence, those results are omitted
hereafter.

Table 6.4(a) will show the full result of line A and B to the ground fault while
Table 6.4(b) shows the recovered voltage sag and corrected phase for those lines.

Table 6.4 (a) Test results for line A and B to the ground fault. (b) Recovery result.

TEST 4: PHASE AB TO GROUND

PHASE(°) VRMS(pu)
TECHNIQUES
A B C min max

FAULT -90.38 149.66 118.06 0.366 0.991

DVR -0.78 -110.6 110.331 0.858 0.963

DSTATCOM 49.61 -123.36 117.25 0.777 0.991

SSTS -1.89 -121.89 118.11 0.989 0.989

(a)

TEST 4: PHASE AB TO GROUND RECOVERY

PHASE(°) VRMS(%)
TECHNIQUES
A B C GAIN

DVR 89.6 39.06 7.729 89.1

DSTATCOM 40.77 26.3 0.81 78.41

SSTS 88.49 27.77 0.05 100

(b)
 67

6.3.2 Phase A and C to ground

The next test case is line A and C to the ground fault. As mention before, the
result of voltage sag that is mitigated is the same as the result for section 6.3.1. DVR and
DSTATCOM recover the same value as its try to mitigate test case 4. Therefore, the
results of voltage sag mitigation of this section are omitted.

Figure 6.12 Phase shift for line A and C to the ground fault

Figure 6.12 shows the phases that are in fault. The phase of line A is shifted 90°
to rest at -90° while the phase of line C is also shifted 90° and stays at 30° during the
fault. The result of the corrected phase will be shown in Figure 6.13(a) and 6.13(b) for
DVR and DSTATCOM respectively.
 68

(a)

(b)
Figure 6.13 (a) Phase correction using DVR (b) Phase correction using DSTATCOM;
line A and C to the ground fault.

The result in Figure 6.13(b) clearly shows the improper phase correction of line
C which definitely affect the result of DSTATCOM voltage mitigation while in Figure
6.13(a), DVR also cannot correct the phase accurately. The full test result is shown in
Table 6.5(a) while Table 6.5(b) shows the recovery result.
 69

Table 6.5 (a) Test results for line A and C to the ground fault. (b) Recovery result.

TEST 5: PHASE AC TO GROUND

PHASE(°) VRMS(pu)
TECHNIQUES
A B C min max

FAULT -90.38 -121.93 29.65 0.365 0.991

DVR -19.82 -119.38 139.3 0.858 0.963

DSTATCOM 2.86 -128.98 178.72 0.769 0.995

SSTS -1.89 -121.89 118.11 0.989 0.989

(a)

TEST 5: PHASE AC TO GROUND RECOVERY

PHASE(°) VRMS(%)
TECHNIQUES
A B C GAIN

DVR 70.56 2.55 109.65 89.1

DSTATCOM 87.52 7.05 149.07 77.29

SSTS 88.49 0.04 88.46 100

(b)
 70

6.3.3 Phase B and C to ground

The last test case is line B and C to the ground fault. In this case, phase B is
shifted 90° to end at 150° and phase C is also shifted 90° and stays at 30° respectively.
This can be seen in Figure 6.14 as it shows the phase shift of the faulty lines.

Figure 6.14 Phase shift for line B and C to the ground fault.

The phase of line A is unaffected by the fault of other lines throughout the fault
period. However, the phase of the line is affected and shifted 30° for the moment of
mitigation using DVR. This affect is obviously depicted in Figure 6.15(a).
 71

(a)

(b)
Figure 6.15 (a) Phase correction using DVR (b) Phase correction using DSTATCOM;
line B and C to the ground fault.

As typically happened for DSTATCOM, one of the faulty lines in Figure 6.15(b)
is not corrected appropriately and this time, it is line B. The phase of the line at the time
of mitigation is -60° as it suppose to be at -120°. The full result of the test is shown in
Table 6.6(a) and the recovery result is shown in Table 6.6(b).
 72

Table 6.6 (a) Test results for line B and C to the ground fault. (b) Recovery result.

TEST 6: PHASE BC TO GROUND

PHASE(°) VRMS(pu)
TECHNIQUES
A B C min max

FAULT -1.93 149.65 29.68 0.365 0.991

DVR 30.73 -135.93 147.93 0.858 0.963

DSTATCOM -6.26 -61.6 126.03 0.768 0.991

SSTS -1.89 -121.89 118.11 0.989 0.989

(a)

TEST 6: PHASE BC TO GROUND RECOVERY

PHASE(°) VRMS(%)
TECHNIQUES
A B C GAIN

DVR 28.8 13.72 118.25 89.1

DSTATCOM 4.33 88.05 96.35 77.5

SSTS 0.04 27.76 88.43 100

(b)
 73

6.4 Conclusion

In mitigating single line to the ground fault, DVR and DSTATCOM that has
been introduced in section 5 are able to compensate the voltage sag without any
difficulty. The problem lies in correcting the phase of the system. Even though the phase
of the faulty line has been corrected, the rest of the lines that are not in fault is also
affected and shifted a few degrees. This affect can be seen happened to DVR when it
mitigates the test system. In general, the capability of the techniques to mitigate single
line to the ground fault are uncontested especially SSTS as it pose the best result.

While mitigating double lines to the ground fault, the same problems occurred to
the DVR where the phase of the healthy line is unwontedly shifted a few degrees, but the
performance of DVR in mitigating voltage sag remain the same as it mitigates single
line to the ground fault. For DSTATCOM, a new problem occurred while DSTATCOM
is mitigating double line to the ground fault. One of the faulty lines is not corrected
appropriately and this brings an upsetting effect in mitigating the voltage sag of the
system. Once again, SSTS that has been introduced in section 5 remain as the best
mitigation technique. This is due to the nature of the SSTS where it doesn’t try to
compensate or correct the faulty line; instead, SSTS switch the faulty feeder to the
alternative feeder. The result is always and remains constant if and only if the backup or
alternative feeder is being kept healthy.
 CHAPTER VII

CONCLUSION

7.1 Conclusion

Nowadays, reliability and quality of electric power is one of the most discuss
topics in power industry. There are numerous types of power quality issues and power
problems and each of them might have varying and diverse causes. The types of power
quality problems that a customer may encounter classified depending on how the voltage
waveform is being distorted. There are transients, short duration variations (sags, swells,
and interruption), long duration variations (sustained interruptions, under voltages, over
voltages), voltage imbalance, waveform distortion (dc offset, harmonics, interharmonics,
notching, and noise), voltage fluctuations and power frequency variations. Among them,
two power quality problems have been identified to be of major concern to the
customers are voltage sags and harmonics, but this project is focusing on voltage sags.
 75

Voltage sags are huge problems for many industries, and it is probably the most
pressing power quality problem today. Voltage sags may cause tripping and large torque
peaks in electrical machines. Generally, voltage sags are short duration reductions in rms
voltage caused by faults in the electric supply system and the starting of large loads,
such as motors. Voltage sags are also generally created on the electric system when
faults occur due to lightning, which are accidental shorting of the phases by trees,
animals, birds, human error such as digging underground lines or automobiles hitting
electric poles, and failure of electrical equipment. Sags also may be produced when large
motor loads are started, or due to operation of certain types of electrical equipment such
as welders, arc furnaces, smelters, etc.

Therefore, this project intends to investigate mitigation technique that is suitable

for different type of voltage sags source. The simulation will be using PSCAD/EMTDC
software and the mitigation techniques that using such as dynamic voltage restorer
(DVR), distribution static compensator (DSTATCOM), and solid state transfer switch
(SSTS).

Dynamic voltage restorers (DVR) are used to protect sensitive loads from the
effects of voltage sags on the distribution feeder. In all cases it is necessary for the DVR
control system to not only detect the start and end of a voltage sag but also to determine
the sag depth and any associated phase shift. The DVR, which is placed in series with a
sensitive load, must be able to respond quickly to voltage sag if end users of sensitive
equipment are to experience no voltage sags.

The distribution static compensator (DSTATCOM) offers an alternative to

conventional series shunt compensation. In the traditional power transmission system,
controllable devices are restricted to the slow mechanisms such as transformer tap
changers and switched capacitor. In the late 1980’s, thanks to the major developments
 76

in the semiconductor technology, it became possible to apply power electronics in the

control of DSTATCOM. Based on the simulation, there’s a room for improvement.
DSTATCOM is a device that promises a prominent feature in power system in
mitigating power quality related problems in the future.

Solid state transfer switch (SSTS) is not the most cost effective but in many
cases, it is a practical mitigating technique to apply especially for sensitive loads. These
solutions involve fixing the two identical power source components in order to increase
the ride-through of the entire system. SSTS solutions are attractive since they in theory
do not require add on power conditioning equipment, but instead involve using another
source components. Furthermore, semiconductor tool suppliers are more comfortable
with this approach since it does not require the addition of unfamiliar technologies.

As conclusion, voltage sag is unwanted phenomenon which unavoidable but can

be reduced using all techniques, but not limited to the techniques that have been
discussed. There is no one mitigation technique that will suitable with every application,
and whilst the power supply utilities strive to supply improved power quality, it is up to
the applications engineer to minimize power quality problems. It means, power quality
problem cannot be eliminated but we can reduce and try to avoid this problem form
occur. The best way to avoid power quality problem is by ensuring that all equipment to
be installed in the industrial plants are compatible with power quality in the power
system. This can be achieved by procuring equipment with proper technical
specifications that incorporate power quality performance of its operating electrical
environment.
 77

7.2 Suggestion

Mitigating voltage sag requires a lot of intensive research especially in

developing custom power device to help distribution system to achieve desired power
quality as been insisted by many customer or end-user. There are still rooms of
improvement that can be achieved further, for the technique that have been included in
this thesis and other techniques that are available.

The DVR and DSTATCOM that has been used earlier, employs a two- level
voltage source converter or VSC in both technique. Additional research of other
multilevel and multipulse VSC can be implemented in the future to exploit the simplicity
of the pulse width modulation or PWM based control scheme to further enhance both
DVR and DSTATCOM. Another control scheme can also be proposed to take the
advantage of the two-level VSC that has been employed previously to support more
control over voltage sags that were caused by double line to ground, line to line faults
and three phase fault that cover 25 percent of the total faults.
 78

REFERENCES

[1] Roger C. Dugan, Mark F. McGranaghan and H. Wayne Beaty,

TK1001.D84 (1996) “Electrical Power Systems Quality”, Mc Graw-Hill. Pages
1-8 and 39-80.

[2] Prof. Khalid Mohd Nor (2006), Lecture Notes – MEP 1542 Special Topic
In Power Engineering, session 2005/2006-II.

[3] Tenaga National Berhad (1996), “A Guidebook on Power Quality-

Monitoring, Analysis & Mitigations”, pages 1-61

[4] IEEE Standards Board (1995), “IEEE Std. 1159-1995”, IEEE

Recommended Practice for Monitoring Electric Power Quality”. IEEE Inc. New
York.

[5] IEEE Industry Applications Magazine, “Before and During Voltage

sags”, available at http://www.ieee.org/ias

[6] “SEMI F47-0200 voltage sag immunity curve”, available at

http://www.semi.org

[7] “ITI (CBEMA) curve application note,” Available at

http://.www.itic.org/technical/iticurv.pdf.
 79

[8] M. H. Haque, (2001) "Compensation of Distribution System Voltage Sag

by DVR and D-STATCOM", IEEE Porto Power Tech Conference 2001

[9] M A Hannan and A Mohamed, (2002) “Modeling and Analysis of a 24-

Pulse Dynamic Voltage Restorer in a Distribution System”, Student Conference
on Research and Development PROCEEDINGS, Shah Alam, Malaysia.

[10] A. Hernandez, K. E. Chong, G. Gallegos, and E. Acha “The

implementatio of a solid state voltage source in PSCAD/EMTDC,” IEEE Power
Eng. Rev., pp. 61-62, Dec 1998.

[11] L. Xu, Anaya-Lara, V. G. Agelidis, and E. Acha “Development of

custom power devices for power quality enhancement,” in Proc. 9th ICHQP
2000, Orlando, FL, Oct. 2000, pp. 775-783.

[12] Y. Chen and B. T. Ooi, “STATCOM based on multimodules of

multilevel converters under multiple regulation feedback control,” IEEE Trans.
Power Electron., vol. 14, pp. 959-965, Sept. 1999.

[13] E. Acha, V. G. Agelidis, O. Anaya-Lara, and T. J. E. Miller, ‘Electronic

Control in Electrical Power Systems,” London, U.K., Butterworth-Heinemann,
2001.

[14] K. Chan, A. Kara, and G. Kieboom, “Power quality improvement with

solid state transfer switches,” in Proc. 8th ICHQP 1998, Athens, Greece, Oct.
1998, pp. 210-215

[15] PSCAD Electromagnetic Transients User’s Guide, The Professional’s

Tool for Power System Simulation
 80

[16] O. Anaya-Lara, E. Acha, “Modelling and analysis of custom power

systems by PSCAD/EMTDC,” IEEE Trans., Power Delivery, Vol. PWDR-17
(1), pp. 266-272, 2002.

[17] I. T. Fernando, W. T. Kwasnicki, and A. M. Gole. “Modeling of

conventional and advanced static var compensators in electromagnetic transients
simulation program.” Available at http://www.ee.umanitoba.ca/~hvdc

[18] N. Mohan, T. M. Underland, and W. P. Robbins, “Power electronics:

Converters, Application and Design,” New York, Wiley, 1995.
 81

APPENDIX A
Data generated by PSCAD/EMTDC for DSTATCOM

!=======================================================================
! Generated by : PSCAD v4.1.0
!
! Warning: The content of this file is automatically generated.
! Do not modify, as any changes made here will be lost!
!=======================================================================

!---------------------------------------
! Local Node Voltages
!---------------------------------------
VOLTAGES:
1 0.0 // NT_1
2 0.0 // NT_2
3 0.0 // NT_6
4 0.0 // NT_7
5 0.0 // NT_8
6 0.0 // NT_12
7 0.0 // NT_13
8 0.0 // NT_14
9 0.0 // NT_15
10 0.0 // NT_16
11 0.0 // NT_17
12 0.0 // NT_18
13 0.0 // NT_19
14 0.0 // NT_20
15 0.0 // NT_21
16 0.0 // NT_22
17 0.0 // NT_23
18 0.0 // NT_24

!---------------------------------------
! Local Branch Data
!---------------------------------------
BRANCHES:
1 2 RE 0.0 // 1 NT_1 NT_2
6 9 RS 1000000.0 // 1 NT_12 NT_15
6 1 RS 1000000.0 // 1 NT_12 NT_1
1 6 RS 1000000.0 // 1 NT_1 NT_12
2 6 RS 1000000.0 // 1 NT_2 NT_12
6 2 RS 1000000.0 // 1 NT_12 NT_2
7 1 RS 1000000.0 // 1 NT_13 NT_1
1 7 RS 1000000.0 // 1 NT_1 NT_13
2 7 RS 1000000.0 // 1 NT_2 NT_13
7 2 RS 1000000.0 // 1 NT_13 NT_2
8 1 RS 1000000.0 // 1 NT_14 NT_1
1 8 RS 1000000.0 // 1 NT_1 NT_14
2 8 RS 1000000.0 // 1 NT_2 NT_14
8 2 RS 1000000.0 // 1 NT_14 NT_2
7 10 RS 1000000.0 // 1 NT_13 NT_16
0 12 RE 0.0 // 1 GND NT_18
0 13 RE 0.0 // 1 GND NT_19
0 14 RE 0.0 // 1 GND NT_20
8 11 RS 1000000.0 // 1 NT_14 NT_17
16 18 RS 1000000.0 // 1 NT_22 NT_24
15 18 RS 1000000.0 // 1 NT_21 NT_24
17 18 RS 1000000.0 // 1 NT_23 NT_24
16 17 RS 1000000.0 // 1 NT_22 NT_23
17 15 RS 1000000.0 // 1 NT_23 NT_21
15 16 RS 1000000.0 // 1 NT_21 NT_22
17 0 RL 12.1 0.1926 // 1 NT_23 GND
15 0 RL 12.1 0.1926 // 1 NT_21 GND
16 0 RL 12.1 0.1926 // 1 NT_22 GND
 82

14 5 RL 0.1 0.758 // 1 NT_20 NT_8

13 4 RL 0.1 0.758 // 1 NT_19 NT_7
12 3 RL 0.1 0.758 // 1 NT_18 NT_6
1 2 C 750.0 // 1 NT_1 NT_2

!---------------------------------------
! Local Transformer Data
!---------------------------------------
TRANSFORMERS:
! 3 Phase, 3 Winding Transformer:
!* Name: T1 Tmva: 100.0 MVA, Freq: 50.0 Hz, V1: 230.0 kV, V2: 11.0 kV,
V3: 11.0 kV
!* Imag1: 0.02 p.u., Imag2: 0.02 p.u., Imag3: 0.02 p.u., Xl: 0.1, 0.1, 0.1
(p.u.)
!* Sat: 0 ,
-3 / Number of windings...
3 0 7.91831796746 /
11 0 -82.7824151144 3461.8100866 /
17 0 -82.7824151144 -1730.9050433 3461.8100866 /
888 /
4 0 /
10 0 /
15 0 /
888 /
5 0 /
9 0 /
16 0 /
!

DATADSD:

DATADSO:

ENDPAGE
 83

APPENDIX B
Data generated by PSCAD/EMTDC for DVR

!=======================================================================
! Generated by : PSCAD v4.1.0
!
! Warning: The content of this file is automatically generated.
! Do not modify, as any changes made here will be lost!
!=======================================================================

!---------------------------------------
! Local Node Voltages
!---------------------------------------
VOLTAGES:
1 0.0 // NT_1
2 0.0 // NT_2
3 0.0 // NT_3
4 0.0 // NT_4
5 0.0 // NT_5
6 0.0 // NT_6
7 0.0 // NT_7
8 0.0 // NT_10
9 0.0 // NT_11
10 0.0 // NT_13
11 0.0 // NT_17
12 0.0 // NT_18
13 0.0 // NT_19
14 0.0 // NT_20
15 0.0 // NT_21
16 0.0 // NT_22
17 0.0 // NT_23

!---------------------------------------
! Local Branch Data
!---------------------------------------
BRANCHES:
5 1 RS 1000000.0 // 1 NT_5 NT_1
5 3 RS 1000000.0 // 1 NT_5 NT_3
2 0 RS 1000000.0 // 1 NT_2 GND
3 0 RS 1000000.0 // 1 NT_3 GND
1 0 RS 1000000.0 // 1 NT_1 GND
5 2 RS 1000000.0 // 1 NT_5 NT_2
5 0 RS 1.0 // 1 NT_5 GND
0 17 RE 0.0 // 1 GND NT_23
0 16 RE 0.0 // 1 GND NT_22
3 5 RS 1000000.0 // 1 NT_3 NT_5
2 5 RS 1000000.0 // 1 NT_2 NT_5
1 5 RS 1000000.0 // 1 NT_1 NT_5
0 3 RS 1000000.0 // 1 GND NT_3
0 2 RS 1000000.0 // 1 GND NT_2
0 1 RS 1000000.0 // 1 GND NT_1
11 6 RS 1000000.0 // 1 NT_17 NT_6
6 7 RS 1000000.0 // 1 NT_6 NT_7
7 11 RS 1000000.0 // 1 NT_7 NT_17
11 0 RS 1000000.0 // 1 NT_17 GND
6 0 RS 1000000.0 // 1 NT_6 GND
7 0 RS 1000000.0 // 1 NT_7 GND
0 15 RE 0.0 // 1 GND NT_21
15 10 RL 0.1 0.758 // 1 NT_21 NT_13
13 0 RL 0.1 0.1926 // 1 NT_19 GND
12 0 RL 0.1 0.1926 // 1 NT_18 GND
16 8 RL 0.1 0.758 // 1 NT_22 NT_10
17 9 RL 0.1 0.758 // 1 NT_23 NT_11
14 0 RL 0.1 0.1926 // 1 NT_20 GND
 84

!---------------------------------------
! Local Transformer Data
!---------------------------------------
TRANSFORMERS:
! 3 Phase, 2 Winding Transformer
!* Name: T32 Tmva: 100.0 MVA, Freq: 50.0 Hz, V1: 230.0 kV, V2: 11.0 kV
!* Imag1: 0.02 p.u., Imag2: 0.02 p.u., Xl: 0.1 p.u.
!* Sat: 0 ,
-2 / Number of windings...
10 0 5.9387384756 /
11 0 -124.173622672 2596.35756495 /
888 /
8 0 /
6 0 /
888 /
9 0 /
7 0 /
!
! Single Phase Transformer: 100.0 MVA, 11.0 kV : 230.0 kV
-2 / Number of windings...
14 11 2596.35756495 /
4 1 -124.173622672 5.9387384756 /
!
! Single Phase Transformer: 100.0 MVA, 11.0 kV : 230.0 kV
-2 / Number of windings...
12 6 2596.35756495 /
4 2 -124.173622672 5.9387384756 /
!
! Single Phase Transformer: 100.0 MVA, 11.0 kV : 230.0 kV
-2 / Number of windings...
13 7 2596.35756495 /
4 3 -124.173622672 5.9387384756 /
!

DATADSD:

DATADSO:

ENDPAGE
 85

APPENDIX C
Data generated by PSCAD/EMTDC for SSTS

!=======================================================================
! Generated by : PSCAD v4.1.0
!
! Warning: The content of this file is automatically generated.
! Do not modify, as any changes made here will be lost!
!=======================================================================

!---------------------------------------
! Local Node Voltages
!---------------------------------------
VOLTAGES:
1 0.0 // NT_1
2 0.0 // NT_2
3 0.0 // NT_3
4 0.0 // NT_7
5 0.0 // NT_8
6 0.0 // NT_9
7 0.0 // NT_10
8 0.0 // NT_11
9 0.0 // NT_12

!---------------------------------------
! Local Branch Data
!---------------------------------------
BRANCHES:
0 9 RE 0.0 // 1 GND NT_12
0 8 RE 0.0 // 1 GND NT_11
0 7 RE 0.0 // 1 GND NT_10
3 2 RS 1000000.0 // 1 NT_3 NT_2
2 1 RS 1000000.0 // 1 NT_2 NT_1
1 3 RS 1000000.0 // 1 NT_1 NT_3
3 0 RS 1000000.0 // 1 NT_3 GND
2 0 RS 1000000.0 // 1 NT_2 GND
1 0 RS 1000000.0 // 1 NT_1 GND
7 3 RL 0.1 0.758 // 1 NT_10 NT_3
5 0 R 20.0 // 1 NT_8 GND
4 0 R 20.0 // 1 NT_7 GND
6 0 R 20.0 // 1 NT_9 GND
8 2 RL 0.1 0.758 // 1 NT_11 NT_2
9 1 RL 0.1 0.758 // 1 NT_12 NT_1

!---------------------------------------
! Local Transformer Data
!---------------------------------------
TRANSFORMERS:
! 3 Phase, 2 Winding Transformer
!* Name: T32 Tmva: 100.0 MVA, Freq: 50.0 Hz, V1: 230.0 kV, V2: 11.0 kV
!* Imag1: 0.02 p.u., Imag2: 0.02 p.u., Xl: 0.1 p.u.
!* Sat: 0 ,
2 / Number of windings...
3 0 0.0 84.1929648956 /
6 0 0.0 4.02259344016 0.0 0.192577481141 /
888 /
2 0 /
4 0 /
888 /
1 0 /
5 0 /
!
 86

DATADSD:

DATADSO:

ENDPAGE