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Manufacturer:
ABB Power Technologies AB
Substation Automation Products
SE-721 59 Västerås
Sweden
Telephone: +46 (0) 21 34 20 00
Facsimile: +46 (0) 21 14 69 18
www.abb.com/substationautomation
Contents
Chapter Page
Scheme communication
logic for distance protection (PSCH, 85) ............................. 450
Introduction ................................................................................. 450
Principle of operation .................................................................. 450
Blocking scheme ................................................................... 450
Permissive underreach scheme ............................................ 451
Permissive overreach scheme............................................... 451
Unblocking scheme ............................................................... 451
Intertrip scheme ..................................................................... 452
Simplified logic diagram......................................................... 453
Function block............................................................................. 455
Input and output signals.............................................................. 455
Setting parameters ..................................................................... 456
Technical data ............................................................................ 456
Current reversal and weak-end infeed logic
for distance protection (PSCH, 85) .................................................. 457
Introduction ................................................................................. 457
Principle of operation .................................................................. 457
Current reversal logic............................................................. 457
Weak end infeed logic ........................................................... 458
Function block............................................................................. 459
Input and output signals.............................................................. 460
Setting parameters ..................................................................... 460
Technical data ............................................................................ 461
Local acceleration logic (PLAL) ....................................................... 462
Introduction ................................................................................. 462
Principle of operation .................................................................. 462
Zone extension ...................................................................... 462
Contents
Overview.......................................................................................... 676
Variants of case- and HMI display size....................................... 676
Case from the rear side .............................................................. 679
Hardware modules........................................................................... 682
Overview..................................................................................... 682
Combined backplane module (CBM).......................................... 683
Introduction............................................................................ 683
Functionality .......................................................................... 683
Design ................................................................................... 683
Universal backplane module (UBM) ........................................... 685
Introduction............................................................................ 685
Functionality .......................................................................... 685
Design ................................................................................... 685
Power supply module (PSM) ...................................................... 688
Introduction............................................................................ 688
Design ................................................................................... 688
Technical data ....................................................................... 688
Numeric processing module (NUM)............................................ 689
Introduction............................................................................ 689
Functionality .......................................................................... 689
Block diagram........................................................................ 690
Local human-machine interface (LHMI)...................................... 690
Transformer input module (TRM) ............................................... 691
Introduction............................................................................ 691
Design ................................................................................... 691
Contents
Glossary........................................................................................... 782
Contents
About this chapter Chapter 1
Introduction
Chapter 1 Introduction
1
Introduction to the technical reference manual Chapter 1
Introduction
en06000097.vsd
The Application Manual (AM) contains application descriptions, setting guidelines and setting
parameters sorted per function. The application manual should be used to find out when and for
what purpose a typical protection function could be used. The manual should also be used when
calculating settings.
The Technical Reference Manual (TRM) contains application and functionality descriptions
and it lists function blocks, logic diagrams, input and output signals, setting parameters and tech-
nical data sorted per function. The technical reference manual should be used as a technical ref-
erence during the engineering phase, installation and commissioning phase, and during normal
service.
The Installation and Commissioning Manual (ICM) contains instructions on how to install
and commission the protection IED. The manual can also be used as a reference during periodic
testing. The manual covers procedures for mechanical and electrical installation, energizing and
checking of external circuitry, setting and configuration as well as verifying settings and per-
forming directional tests. The chapters are organized in the chronological order (indicated by
chapter/section numbers) in which the protection IED should be installed and commissioned.
The Operator’s Manual (OM) contains instructions on how to operate the protection IED dur-
ing normal service once it has been commissioned. The operator’s manual can be used to find
out how to handle disturbances or how to view calculated and measured network data in order
to determine the cause of a fault.
The IED 670 engineering guide (EG) contains instructions on how to engineer the IED 670
products. The manual guides to use the different tool components for IED 670 engineering. It
also guides how to handle the tool component available to read disturbance files from the IEDs
on the basis of the IEC 61850 definitions. The third part is an introduction about the diagnostic
tool components available for IED 670 products and the PCM 600 tool.
2
Introduction to the technical reference manual Chapter 1
Introduction
• The chapter “Local human-machine interface” describes the control panel on the
IED. Display characteristics, control keys and various local human-machine in-
terface features are explained.
• The chapter “Basic IED functions” presents functions that are included in all
IEDs regardless of the type of protection they are designed for. These are func-
tions like Time synchronization, Self supervision with event list, Test mode and
other functions of a general nature.
• The chapter “Distance protection” describes the functions for distance zones
with their quadrilateral characteristics, phase selection with load encroachment,
power swing detection and similar.
• The chapter “Current protection” describes functions such as overcurrent pro-
tection, breaker failure protection and pole discordance.
• The chapter “Voltage protection” describes functions like undervoltage and ov-
ervoltage protection as well as residual overvoltage protection.
• The chapter “Frequency protection” describes functions for overfrequency, un-
derfrequency and rate of change of frequency.
• The chapter “Multipurpose protection” describes the general protection function
for current and voltage.
• The chapter “Secondary system supervision” includes descriptions of functions
like current based Current circuit supervision and Fuse failure supervision.
• The chapter “Control” describes the control functions. These are functions like
the Synchronization and energizing check as well as several others which are
product specific.
• The chapter “Scheme communication” describes among others functions related
to current reversal and weak end infeed logic.
• The chapter “Logic” describes trip logic and related functions.
• The chapter “Monitoring” describes measurement related functions used to pro-
vide data regarding relevant quantities, events, faults and the like.
• The chapter “Metering” describes primarily Pulse counter logic.
• The chapter “Station communication” describes Ethernet based communication
in general including the use of IEC61850, and horizontal communication via
GOOSE.
• The chapter “Remote communication” describes binary and analog signal trans-
fer, and the associated hardware.
• The chapter “Hardware” provides descriptions of the IED and its components.
• The chapter “Connection diagrams” provides terminal wiring diagrams and in-
formation regarding connections to and from the IED.
• The chapter “Time inverse characteristics” describes and explains inverse time
delay, inverse time curves and their effects.
• The chapter “Glossary” is a list of terms, acronyms and abbreviations used in
ABB technical documentation.
3
Introduction to the technical reference manual Chapter 1
Introduction
1.3.1 Introduction
Outlines the implementation of a particular protection function.
Logic diagrams
Logic diagrams describe the signal logic inside the function block and are bordered by dashed
lines.
Signal names
Input and output logic signals consist of two groups of letters separated by two dashes. The first
group consists of up to four letters and presents the abbreviated name for the corresponding
function. The second group presents the functionality of the particular signal. According to this
explanation, the meaning of the signal BLKTR in figure 4 is as follows:
• BLKTR informs the user that the signal will BLOCK the TRIP command from
the under-voltage function, when its value is a logical one (1).
Input signals are always on the left hand side, and output signals on the right hand side. Settings
are not displayed.
Input and output signals can be configured using the CAP531 tool. They can be connected to the
inputs and outputs of other functions and to binary inputs and outputs. Examples of input signals
are BLKTR, BLOCK and VTSU. Examples output signals are TRIP, START, STL1, STL2,
STL3.
Setting parameters
Signals in frames with a shaded area on their right hand side represent setting parameter signals.
These parameters can only be set via the PST or LHMI. Their values are high (1) only when the
corresponding setting parameter is set to the symbolic value specified within the frame. Example
is the signal Block TUV=Yes. Their logical values correspond automatically to the selected set-
ting value.
Internal signals
Internal signals are illustrated graphically and end approximately. 2 mm from the frame edge. If
an internal signal path cannot be drawn with a continuous line, the suffix -int is added to the sig-
nal name to indicate where the signal starts and continues, see figure 3.
4
Introduction to the technical reference manual Chapter 1
Introduction
BLKTR
TEST
TEST
&
Block TUV=Yes BLOCK-int.
>1
BLOCK
VTSU
BLOCK-int.
&
STUL1N
BLOCK-int.
& >1 & TRIP
t
STUL2N
BLOCK-int.
START
&
STUL3N
STL1
STL2
STL3
xx04000375.vsd
Figure 1: Logic diagram example with -int signals
External signals
Signal paths that extend beyond the logic diagram and continue in another diagram have the suf-
fix “-cont.”, see figure 2 and figure 3.
5
Introduction to the technical reference manual Chapter 1
Introduction
STZMPP-cont.
>1
STCND
& STNDL1L2-cont.
1L1L2
STNDL2L3-cont.
&
1L2L3
& STNDL3L1-cont.
1L3L1
& STNDL1N-cont.
1L1N
& STNDL2N-cont.
1L2N
STNDL3N-cont.
&
1L3N
>1 STNDPE-cont.
>1
1--VTSZ 1--STND
>1 &
1--BLOCK
BLK-cont.
xx04000376.vsd
Figure 2: Logic diagram example with an outgoing -cont signal
6
Introduction to the technical reference manual Chapter 1
Introduction
STNDL1N-cont.
>1
STNDL2N-cont. 15 ms
& t STL1
STNDL3N-cont.
STNDL1L2-cont. >1 15 ms
& t STL2
STNDL2L3-cont.
15 ms
STNDL3L1-cont. & t STL3
>1
15 ms
& t START
>1
BLK-cont.
xx04000377.vsd
Figure 3: Logic diagram example with an incoming -cont signal
Input signals are always on the left hand side, and output signals on the right hand side. Settings
are not displayed. Special kinds of settings are sometimes available. These are supposed to be
connected to constants in the configuration scheme, and are therefore depicted as inputs. Such
signals will be found in the signal list but described in the settings table.
7
Introduction to the technical reference manual Chapter 1
Introduction
IEC 61850 - 8 -1
CAP531 Name Logical Node
Inputs TUV1-
PH2PUVM
U3P TRIP
BLOCK TR1
BLKTR1 TR1L1
BLKST1 TR1L2
BLKTR2 TR1L3
Outputs
BLKST2 TR2
TR2L1
TR2L2
TR2L3
START
ST1
ST1L1
ST1L2
ST1L3
ST2 Diagram
ST2L1 Number
ST2L2
ST2L3
en05000330.vsd
1.4.2 Requirements
The system engineer must have a thorough knowledge of protection systems, protection equip-
ment, protection functions and the configured functional logics in the protective devices. The
installation and commissioning personnel must have a basic knowledge in the handling electron-
ic equipment.
8
Introduction to the technical reference manual Chapter 1
Introduction
9
Introduction to the technical reference manual Chapter 1
Introduction
Revision Description
A First revision, addition of SPA protocol, LON protocol and IEC 60870-5-103 proto-
col.
10
About this chapter Chapter 2
Local human-machine interface
Chapter 2 Local
human-machine
interface
11
Human machine interface Chapter 2
Local human-machine interface
The local human machine interface is equipped with an LCD that can display the single line di-
agram with up to 15 objects.
The local human-machine interface is simple and easy to understand – the whole front plate is
divided into zones, each of them with a well-defined functionality:
12
Human machine interface Chapter 2
Local human-machine interface
13
Small size graphic HMI Chapter 2
Local human-machine interface
2.1 Introduction
The small sized HMI is available for 1/2, 3/4 and 1/1 x 19” case. The LCD on the small HMI
measures 32 x 90 mm and displays 7 lines with up to 40 characters per line. The first line dis-
plays the product name and the last line displays date and time. The remaining 5 lines are dy-
namic. This LCD has no graphic display potential.
2.2 Design
The LHMI is identical for both the 1/2, 3/4 and 1/1 cases. The different parts of the small LHMI
is shown in figure 7
14
Small size graphic HMI Chapter 2
Local human-machine interface
1 2 3
en05000055.eps
8 7
15
Medium size graphic HMI Chapter 2
Local human-machine interface
3.1 Introduction
The 1/2, 3/4 and 1/1 x 19” cases can be equipped with the medium size LCD. This is a fully
graphical monochrome LCD which measures 120 x 90 mm. It has 28 lines with up to 40 char-
acters per line. To display the single line diagram, this LCD is required.
3.2 Design
The different parts of the medium size LHMI is shown in figure 8
16
Medium size graphic HMI Chapter 2
Local human-machine interface
1 2 3
en05000056.eps
8 7
17
Keypad Chapter 2
Local human-machine interface
4 Keypad
The keypad is used to monitor and operate the IED. The keypad has the same look and feel in
all IEDs in the IED 670 series. LCD screens and other details may differ but the way the keys
function is identical. The keypad is illustrated in figure 9.
The keys used to operate the IED are described below in table 1.
The help key brings up two submenus. Key operation and IED information.
Opens the main menu, and used to move to the default screen.
18
Keypad Chapter 2
Local human-machine interface
Key Function
The Local/Remote key is used to set the IED in local or remote control mode.
The E key starts editing mode and confirms setting changes when in editing mode.
The right arrow key navigates forward between screens and moves right in editing mode.
The left arrow key navigates backwards between screens and moves left in editing mode.
The up arrow key is used to move up in the single line diagram and in menu tree.
The down arrow key is used to move down in the single line diagram and in menu tree.
19
LED Chapter 2
Local human-machine interface
5 LED
5.1 Introduction
The LED module is a unidirectional means of communicating. This means that events may occur
that activate a LED in order to draw the operators attention to something that has occurred and
needs some sort of action.
There are alarm indication LEDs and hardware associated LEDs on the right hand side of the
front panel. The alarm LEDs are found to the right of the LCD screen. They can show steady or
flashing light. Flashing would normally indicate an alarm. The alarm LEDs are configurable us-
ing the PCM 600 tool. This is because they are dependent on the binary input logic and can there-
fore not be configured locally on the HMI. Some typical alarm examples follow:
20
LED Chapter 2
Local human-machine interface
The RJ45 port has a yellow LED indicating that communication has been established between
the IED and a computer.
The Local/Remote key on the front panel has two LEDs indicating whether local or remote con-
trol of the IED is active.
21
LHMI related functions Chapter 2
Local human-machine interface
6.1 Introduction
The adaptation of the LHMI to the application and user preferences is made with:
See section 5.2 "Status indication LEDs" for information about the LEDs.
22
LHMI related functions Chapter 2
Local human-machine interface
LHMI-
LocalHMI
CLRLEDS HMI-ON
RED-S
YELLOW-S
YELLOW-F
CLRPULSE
LEDSCLRD
en05000773.vsd
Each indication LED on the LHMI can be set individually to operate in six different sequences;
two as follow type and four as latch type. Two of the latching types are intended to be used as a
protection indication system, either in collecting or restarting mode, with reset functionality. The
other two are intended to be used as signalling system in collecting (coll) mode with an acknowl-
edgment functionality. The light from the LEDs can be steady (-S) or flickering (-F).
6.4.2 Design
The information on the LEDs is stored at loss of the auxiliary power to the IED. The latest LED
picture appears immediately after the IED is successfully restarted.
23
LHMI related functions Chapter 2
Local human-machine interface
Operating modes
• Collecting mode
- LEDs which are used in collecting mode of operation are accumulated con-
tinuously until the unit is acknowledged manually. This mode is suitable
when the LEDs are used as a simplified alarm system.
• Re-starting mode
- In the re-starting mode of operation each new start resets all previous active
LEDs and activates only those which appear during one disturbance. Only
LEDs defined for re-starting mode with the latched sequence type 6 (Latche-
dReset-S) will initiate a reset and a restart at a new disturbance. A distur-
bance is defined to end a settable time after the reset of the activated input
signals or when the maximum time limit has been elapsed.
Acknowledgment/reset
• From local HMI
- The active indications can be acknowledged/reset manually. Manual ac-
knowledgment and manual reset have the same meaning and is a common
signal for all the operating sequences and LEDs. The function is positive
edge triggered, not level triggered. The acknowledgment/reset is performed
via the Reset-button and menus on the LHMI. For details, refer to the “Op-
erators manual”.
• Automatic reset
- The automatic reset can only be performed for indications defined for
re-starting mode with the latched sequence type 6 (LatchedReset-S). When
the automatic reset of the LEDs has been performed, still persisting indica-
tions will be indicated with a steady light.
Operating sequences
The sequences can be of type Follow or Latched. For the Follow type the LED follow the input
signal completely. For the Latched type each LED latches to the corresponding input signal until
it is reset.
The figures below show the function of available sequences selectable for each LED separately.
For sequence 1 and 2 (Follow type), the acknowledgment/reset function is not applicable. Se-
quence 3 and 4 (Latched type with acknowledgement) are only working in collecting mode. Se-
quence 5 is working according to Latched type and collecting mode while sequence 6 is working
according to Latched type and re-starting mode. The letters S and F in the sequence names have
the meaning S = Steady and F = Flash.
24
LHMI related functions Chapter 2
Local human-machine interface
At the activation of the input signal, the indication operates according to the selected sequence
diagrams below.
In the sequence diagrams the LEDs have the characteristics shown in figure 11.
en05000506.vsd
Sequence 1 (Follow-S)
This sequence follows all the time, with a steady light, the corresponding input signals. It does
not react on acknowledgment or reset. Every LED is independent of the other LEDs in its oper-
ation.
Activating
signal
LED
en01000228.vsd
Sequence 2 (Follow-F)
This sequence is the same as sequence 1, Follow-S, but the LEDs are flashing instead of showing
steady light.
Sequence 3 (LatchedAck-F-S)
This sequence has a latched function and works in collecting mode. Every LED is independent
of the other LEDs in its operation. At the activation of the input signal, the indication starts flash-
ing. After acknowledgment the indication disappears if the signal is not present any more. If the
signal is still present after acknowledgment it gets a steady light.
25
LHMI related functions Chapter 2
Local human-machine interface
Activating
signal
LED
Acknow.
en01000231.vsd
Sequence 4 (LatchedAck-S-F)
This sequence has the same functionality as sequence 3, but steady and flashing light have been
alternated.
Sequence 5 (LatchedColl-S)
This sequence has a latched function and works in collecting mode. At the activation of the input
signal, the indication will light up with a steady light. The difference to sequence 3 and 4 is that
indications that are still activated will not be affected by the reset i.e. immediately after the pos-
itive edge of the reset has been executed a new reading and storing of active signals is performed.
Every LED is independent of the other LEDs in its operation.
Activating
signal
LED
Reset
en01000235.vsd
Sequence 6 (LatchedReset-S)
In this mode all activated LEDs, which are set to sequence 6 (LatchedReset-S), are automatically
reset at a new disturbance when activating any input signal for other LEDs set to sequence 6
(LatchedReset-S). Also in this case indications that are still activated will not be affected by
manual reset, i.e. immediately after the positive edge of that the manual reset has been executed
a new reading and storing of active signals is performed. LEDs set for sequence 6 are completely
independent in its operation of LEDs set for other sequences.
26
LHMI related functions Chapter 2
Local human-machine interface
Definition of a disturbance
A disturbance is defined to last from the first LED set as LatchedReset-S is activated until a set-
table time, tRestart, has elapsed after that all activating signals for the LEDs set as Latche-
dReset-S have reset. However if all activating signals have reset and some signal again becomes
active before tRestart has elapsed, the tRestart timer does not restart the timing sequence. A new
disturbance start will be issued first when all signals have reset after tRestart has elapsed. A di-
agram of this functionality is shown in figure 15.
From
disturbance
length control ≥1 New
per LED ≥1 disturbance
set to
sequence 6
tRestart
& t
&
≥1
≥1
&
en01000237.vsd
In order not to have a lock-up of the indications in the case of a persisting signal each LED is
provided with a timer, tMax, after which time the influence on the definition of a disturbance of
that specific LED is inhibited. This functionality is shown i diagram in figure 16.
Activating signal
To LED
To disturbance
AND
tMax length control
t
en05000507.vsd
27
LHMI related functions Chapter 2
Local human-machine interface
Disturbance
t Restart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
en01000239.vsd
Figure 17: Operating sequence 6 (LatchedReset-S), two indications within same disturbance
Figure 18 shows the timing diagram for a new indication after tRestart time has elapsed.
28
LHMI related functions Chapter 2
Local human-machine interface
Disturbance Disturbance
t Restart t Restart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
en01000240.vsd
Figure 19 shows the timing diagram when a new indication appears after the first one has reset
but before tRestart has elapsed.
29
LHMI related functions Chapter 2
Local human-machine interface
Disturbance
t Restart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
en01000241.vsd
Figure 19: Operating sequence 6 (LatchedReset-S), two indications within same disturbance
but with reset of activating signal between
30
LHMI related functions Chapter 2
Local human-machine interface
Disturbance
t Restart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
en01000242.vsd
HLED-
LEDMonitor
BLOCK NEWIND
RESET ACK
LEDTEST
en05000508.vsd
31
LHMI related functions Chapter 2
Local human-machine interface
32
LHMI related functions Chapter 2
Local human-machine interface
33
LHMI related functions Chapter 2
Local human-machine interface
34
About this chapter Chapter 3
Basic IED functions
35
Analog inputs Chapter 3
Basic IED functions
1 Analog inputs
1.1 Introduction
In order to get correct measurement results as well as correct protection operations the analog
input channels must be configured and properly set. It is necessary to define a reference
PhaseAngleRef for correct calculation of phase angles. For power measuring and all directional
and differential functions the directions of the input currents must be properly defined. The mea-
suring and protection algorithms in IED 670 are using primary system quantities and the set val-
ues are done in primary quantities as well. Therefore it is extremely important to properly set the
data about the connected current and voltage transformers.
Note!
VT inputs are sometimes not available depending on ordered type of Transformer Input Module
(TRM).
en05000456.vsd
36
Analog inputs Chapter 3
Basic IED functions
With correct setting of the primary CT direction, CTStarPoint set to FromObject or ToObject, a
positive quantities always flowing towards the object and a direction defined as Forward always
is looking towards the object. To be able to use primary system quantities for settings and cal-
culation in the IED the ration of the main CTs and VTs must be known. This information is given
to the IED by setting of the rated secondary and primary currents and voltages of the CTs and
VTs.
TC40-
ANALOGIN9I3U
ERROR
NAMECH1
CH1
CH2
NAMECH2
NAMECH3
CH3
CH4
NAMECH4
NAMECH5
CH5
CH6
NAMECH6
NAMECH7
CH7
CH8
NAMECH8
NAMECH9
CH9
CH10
NAMECH10
NAMECH11
CH11
CH12
NAMECH12
en05000713.vsd
37
Analog inputs Chapter 3
Basic IED functions
TD40-
ANALOGIN6I6U
ERROR
NAMECH1
CH1
CH2
NAMECH2
NAMECH3
CH3
CH4
NAMECH4
NAMECH5
CH5
CH6
NAMECH6
NAMECH7
CH7
CH8
NAMECH8
NAMECH9
CH9
CH10
NAMECH10
NAMECH11
CH11
CH12
NAMECH12
en05000714.vsd
38
Analog inputs Chapter 3
Basic IED functions
Signal Description
NAMECH9 User define string for analogue input 9
CH9 Analogue input 9
CH10 Analogue input 10
NAMECH10 User define string for analogue input 10
NAMECH11 User define string for analogue input 11
CH11 Analogue input 11
CH12 Analogue input 12
NAMECH12 User define string for analogue input 12
Table 10: Output signals for the ANALOGIN9I3U (TC40-) function block
Signal Description
ERROR Analogue input module status
NAMECH1 User define string for analogue input 1
CH1 Analogue input 1
CH2 Analogue input 2
NAMECH2 User define string for analogue input 2
NAMECH3 User define string for analogue input 3
CH3 Analogue input 3
CH4 Analogue input 4
NAMECH4 User define string for analogue input 4
NAMECH5 User define string for analogue input 5
39
Analog inputs Chapter 3
Basic IED functions
Signal Description
CH5 Analogue input 5
CH6 Analogue input 6
NAMECH6 User define string for analogue input 6
NAMECH7 User define string for analogue input 7
CH7 Analogue input 7
CH8 Analogue input 8
NAMECH8 User define string for analogue input 8
NAMECH9 User define string for analogue input 9
CH9 Analogue input 9
CH10 Analogue input 10
NAMECH10 User define string for analogue input 10
NAMECH11 User define string for analogue input 11
CH11 Analogue input 11
CH12 Analogue input 12
NAMECH12 User define string for analogue input 12
Table 11: Output signals for the ANALOGIN6I6U (TD40-) function block
Signal Description
ERROR Analogue input module status
NAMECH1 User define string for analogue input 1
CH1 Analogue input 1
CH2 Analogue input 2
NAMECH2 User define string for analogue input 2
NAMECH3 User define string for analogue input 3
CH3 Analogue input 3
CH4 Analogue input 4
NAMECH4 User define string for analogue input 4
NAMECH5 User define string for analogue input 5
CH5 Analogue input 5
CH6 Analogue input 6
NAMECH6 User define string for analogue input 6
NAMECH7 User define string for analogue input 7
CH7 Analogue input 7
CH8 Analogue input 8
NAMECH8 User define string for analogue input 8
NAMECH9 User define string for analogue input 9
CH9 Analogue input 9
CH10 Analogue input 10
40
Analog inputs Chapter 3
Basic IED functions
Signal Description
NAMECH10 User define string for analogue input 10
NAMECH11 User define string for analogue input 11
CH11 Analogue input 11
CH12 Analogue input 12
NAMECH12 User define string for analogue input 12
41
Analog inputs Chapter 3
Basic IED functions
42
Analog inputs Chapter 3
Basic IED functions
43
Analog inputs Chapter 3
Basic IED functions
44
Analog inputs Chapter 3
Basic IED functions
45
Analog inputs Chapter 3
Basic IED functions
46
Analog inputs Chapter 3
Basic IED functions
47
Self supervision with internal event list Chapter 3
Basic IED functions
2.1 Introduction
The self-supervision function listens and reacts to internal system events, generated by the dif-
ferent built-in self-supervision elements. The internal events are saved in an internal event list.
The self-supervision status can be monitored from the local HMI or a SMS/SCS system.
Under the Diagnostics menu in the local HMI the present information from the self-supervision
function can be reviewed. The information can be found under Diagnostics\Internal Events or
Diagnostics\IED Status\General. Refer to the “Installation and Commissioning manual” for a
detailed list of supervision signals that can be generated and displayed in the local HMI.
A self-supervision summary can be obtained by means of the potential free alarm contact (IN-
TERNAL FAIL) located on the power supply module. The function of this output relay is an
OR-function between the INT—FAIL signal see figure 24 and a couple of more severe faults
that can occur in the IED, see figure 23
48
Self supervision with internal event list Chapter 3
Basic IED functions
Some signals are available from the IES (IntErrorSign) function block. The signals from this
function block are sent as events to the station level of the control system. The signals from the
IES function block can also be connected to binary outputs for signalization via output relays or
they can be used as conditions for other functions if required/desired.
Individual error signals from I/O modules can be obtained from respective module in the Signal
Matrix Tool. Error signals from time synchronization can be obtained from the time synchroni-
zation block TIME.
49
Self supervision with internal event list Chapter 3
Basic IED functions
50
Self supervision with internal event list Chapter 3
Basic IED functions
51
Self supervision with internal event list Chapter 3
Basic IED functions
Figure 25: Simplified drawing of A/D converter for the 600 platform.
The technique to split the analogue input signal into two converters with different amplification
makes it possible to supervise the incoming signals under normal conditions where the signals
from the two converters should be identical. An alarm is given if the signals are out of the bound-
aries. Another benefit is that it improves the dynamic performance of the A/D conversion.
The self-supervision of the A/D conversion is controlled by the ADx_Controller function. One
of the tasks for the controller is to perform a validation of the input signals. This is done in a
validation filter which has mainly two objects: First is the validation part, i.e. checks that the
A/D conversion seems to work as expected. Secondly, the filter chooses which of the two signals
that shall be sent to the CPU, i.e. the signal that has the most suitable level, the ADx_LO or the
16 times higherADx_HI.
When the signal is within measurable limits on both channels, a direct comparison of the two
channels can be performed. If the validation fails, the CPU will be informed and an alarm will
be given.
52
Self supervision with internal event list Chapter 3
Basic IED functions
IS---
InternalSignal
FAIL
WARNING
CPUFAIL
CPUWARN
TSYNCERR
RTCERR
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53
Time synchronization Chapter 3
Basic IED functions
3 Time synchronization
3.1 Introduction
Use the time synchronization source selector to select a common source of absolute time for the
IED when it is a part of a protection system. This makes comparison of events and disturbance
data between all IEDs in a SA system possible.
Time definitions
The error of a clock is the difference between the actual time of the clock, and the time the clock
is intended to have. The rate accuracy of a clock is normally called the clock accuracy and means
how much the error increases, i.e. how much the clock gains or loses time. A disciplined clock
is a clock that “knows” its own faults and tries to compensate for them, i.e. a trained clock.
Synchronization principle
From a general point of view synchronization can be seen as a hierarchical structure. A module
is synchronized from a higher level and provides synchronization to lower levels.
Syncronization from
a higher level
Module
Optional syncronization of
modules at a lower level
en05000206.vsd
54
Time synchronization Chapter 3
Basic IED functions
RTC at startup
At IED startup, the internal time is free running. If the RTC is still alive since the last up time,
the time in the IED will be quite accurate (may drift 35 ppm), but if the RTC power has been
lost during power off (will happen after 5 days), the IED time will start at 1970-01-01. For more
information, please refer to section "Time synchronization startup procedure" and section "Ex-
ample, binary synchronization".
• If the synchronization message, that is similar to the other messages from its or-
igin has an offset compared to the internal time in the IED, the message is used
directly for synchronization, that is for adjusting the internal clock to obtain zero
offset at the next coming time message.
• If the synchronization message has an offset that is large compared to the other
messages, a “spike-filter” in the IED will remove this time-message.
• If the synchronization message has an offset that is large, and the following mes-
sage also has a large offset, the spike filter will not act and the offset in the syn-
chronization message will be compared to a threshold that defaults to 100
milliseconds. If the offset is more than the threshold, the IED is brought into a
safe state and the clock is thereafter set to the correct time. If the offset is lower
than the threshold, the clock will be adjusted with 1000 ppm until the offset is
removed. With an adjustment of 1000 ppm, it will take 100 seconds or 1.7 min-
utes to remove an offset of 100 milliseconds.
Synchronization messages configured as coarse will only be used for initial setting of the time.
After this has been done, the messages are checked against the internal time and only an offset
of more than 10 seconds will reset the time.
Rate accuracy
In the REx670 IED, the rate accuracy at cold start is about 100 ppm, but if the IED is synchro-
nized for a while, the rate accuracy will be approximately 1 ppm if the surrounding temperature
is constant. Normally it will take 20 minutes to reach full accuracy.
55
Time synchronization Chapter 3
Basic IED functions
• Coarse message is sent every minute and comprises complete date and time, i.e.
year, month, day, hours, minutes, seconds and milliseconds.
• Fine message is sent every second and comprises only seconds and milliseconds.
IEC60870-5-103 is not used to synchronize the relay, but instead the offset between the local
time in the relay and the time received from 103 is added to all times (in events and so on) sent
via 103. In this way the relay acts as it is synchronized from various 103 sessions at the same
time. Actually, there is a “local” time for each 103 session.
The minute pulse is connected to any channel on any Binary Input Module in the IED. The elec-
trical characteristic is thereby the same as for any other binary input.
If the objective of synchronization is to achieve a relative time within the substation and if no
station master clock with minute pulse output is available, a simple minute pulse generator can
be designed and used for synchronization of the IEDs. The minute pulse generator can be created
using the logical elements and timers available in the IED.
56
Time synchronization Chapter 3
Basic IED functions
The definition of a minute pulse is that it occurs one minute after the last pulse. As only the
flanks are detected, the flank of the minute pulse shall occur one minute after the last flank.
Pulse data:
en05000251.vsd
The default time-out-time for a minute pulse is two minutes, and if no valid minute pulse is re-
ceived within two minutes a SYNCERR will be given.
If contact bounces occurs, only the first pulse will be detected as a minute pulse. The next minute
pulse will be registered first 60 s - 50 ms after the last contact bounce.
If the minute pulses are perfect, e.g. it is exactly 60 seconds between the pulses, contact bounces
might occur 49 ms after the actual minute pulse without effecting the system. If contact bounces
occurs more than 50 ms, e.g. it is less than 59950 ms between the two most adjacent positive (or
negative) flanks, the minute pulse will not be accepted.
57
Time synchronization Chapter 3
Basic IED functions
or the RTC backup still keeps the time since last up-time. If the minute pulse is removed for in-
stance for an hour, the internal time will drift by maximum the error rate in the internal clock. If
the minute pulse is returned, the first pulse automatically is rejected. The second pulse will pos-
sibly be rejected due to the spike filter. The third pulse will either synchronize the time, if the
time offset is more than 100 ms, or adjust the time, if the time offset is small enough. If the time
is set, the application will be brought to a safe state before the time is set. If the time is adjusted,
the time will reach its destination within 1.7 minutes.
TIME-
TIME
TSYNCERR
RTCERR
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58
Time synchronization Chapter 3
Basic IED functions
Table 23: Basic general settings for the TimeSynch (TSYN-) function
Parameter Range Step Default Unit Description
CoarseSyncSrc Off - Off - Coarse time synchroniza-
SPA tion source
LON
SNTP
FineSyncSource Off - Off - Fine time synchronization
SPA source
LON
BIN
GPS
GPS+SPA
GPS+LON
GPS+BIN
SNTP
GPS+SNTP
SyncMaster Off - Off - Activate IEDas synchro-
SNTP-Server nization master
59
Time synchronization Chapter 3
Basic IED functions
60
Time synchronization Chapter 3
Basic IED functions
61
Parameter setting groups Chapter 3
Basic IED functions
4.1 Introduction
Use the six sets of settings to optimize IED operation for different system conditions. By creat-
ing and switching between fine tuned setting sets, either from the human-machine interface or
configurable binary inputs, results in a highly adaptable IED that can cope with a variety of sys-
tem scenarios.
A setting group is selected by using the local HMI, from a front connected personal computer,
remotely from the station control or station monitoring system or by activating the correspond-
ing input to the ACGR function block.
Each input of the function block can be configured to connect to any of the binary inputs in the
IED. To do this the PCM 600 configuration tool must be used.
The external control signals are used for activating a suitable setting group when adaptive func-
tionality is necessary. Input signals that should activate setting groups must be either permanent
or a pulse exceeding 400 ms.
More than one input may be activated at the same time. In such cases the lower order setting
group has priority. This means that if for example both group four and group two are set to ac-
tivate, group two will be the one activated.
Every time the active group is changed, the output signal SETCHGD is sending a pulse with the
length according to parameter t, which is set from PCM 600 or in the local HMI.
The parameter MAXSETGR defines the maximum number of setting groups in use to switch be-
tween.
62
Parameter setting groups Chapter 3
Basic IED functions
The above example also includes seven output signals, for confirmation of which group that is
active.
The SGC function block has an input where the number of setting groups used is defined.
Switching can only be done within that number of groups. The number of setting groups selected
to be used will be filtered so only the setting groups used will be shown on the PST setting tool.
ACGR-
ActiveGroup
ACTGRP1 GRP1
ACTGRP2 GRP2
ACTGRP3 GRP3
ACTGRP4 GRP4
ACTGRP5 GRP5
ACTGRP6 GRP6
SETCHGD
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63
Parameter setting groups Chapter 3
Basic IED functions
SGC--
NoOfSetGrp
MAXSETGR
en05000716.vsd
Table 31: Output signals for the ActiveGroup (ACGR-) function block
Signal Description
GRP1 Setting group 1 is active
GRP2 Setting group 2 is active
GRP3 Setting group 3 is active
GRP4 Setting group 4 is active
GRP5 Setting group 5 is active
GRP6 Setting group 6 is active
SETCHGD Pulse when setting changed
64
Parameter setting groups Chapter 3
Basic IED functions
65
Test mode functionality Chapter 3
Basic IED functions
5.1 Introduction
Most of the functions in the IED can individually be blocked by means of settings from the local
HMI or PST. To enable these blockings the IED must be set in test mode. When leaving the test
mode, i.e. entering normal mode, these blockings are disabled and everything is set to normal
operation. All testing will be done with actually set and configured values within the IED. No
settings will be changed, thus mistakes are avoided.
While the IED is in test mode, the ACTIVE output of the function block TEST is activated. The
other two outputs of the function block TEST are showing which is the generator of the “Test
mode: On” state — input from configuration (OUTPUT output activated) or setting from LHMI
(SETTING output activated).
While the IED is in test mode, the yellow START LED will flash and all functions are blocked.
Any function can be de-blocked individually regarding functionality and event signalling.
Most of the functions in the IED can individually be blocked by means of settings from the local
HMI. To enable these blockings the IED must be set in test mode (the output ACTIVE in func-
tion block TEST is set to true), see example in figure 32. When leaving the test mode, i.e. enter-
ing normal mode, these blockings are disabled and everything is set to normal operation. All
testing will be done with actually set and configured values within the IED. No settings will be
changed, thus no mistakes are possible.
The blocked functions will still be blocked next time entering the test mode, if the blockings
were not reset.
The blocking of a function concerns all output signals from the actual function, so no outputs
will be activated.
The TEST function block might be used to automatically block functions when a test handle is
inserted in a test switch. A contact in the test switch (RTXP24 contact 29-30) can supply a binary
input which in turn is configured to the TEST function block.
Each of the protection functions includes the blocking from TEST function block. A typical ex-
ample from the undervoltage function is shown in figure 32.
66
Test mode functionality Chapter 3
Basic IED functions
U Disconnection
Normal voltage
U1<
U2<
tBlkUV1 <
t1,t1Min
IntBlkStVal1
tBlkUV2 <
t2,t2Min
IntBlkStVal2
Time
Block step 1
Block step 2
en05000466.vsd
Figure 32: Example of blocking the time delayed undervoltage protection function.
TEST-
Test
INPUT ACTIVE
OUTPUT
SETTING
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67
Test mode functionality Chapter 3
Basic IED functions
Table 35: Output signals for the Test (TEST-) function block
Signal Description
ACTIVE Terminal in test mode when active
OUTPUT Test input is active
SETTING Test mode setting is (On) or not (Off)
68
IED identifiers Chapter 3
Basic IED functions
6 IED identifiers
6.1 Introduction
There are two functions that allow you to identify each IED individually: ProductInformation
function has only three pre-set, unchangeable but nevertheless very important settings: Serial-
No., Ordering No., and ProductDate, that you can see on the local HMI, under Diagnostics/IED
Status/Identifiers. They are very helpful in case of support process (such as repair or mainte-
nance).
Identifiers function is actually allowing you to identify the individual IED in your system, not
only in the substation, but in a whole region or a country.
69
Signal matrix for binary inputs (SMBI) Chapter 3
Basic IED functions
7.1 Introduction
The SMBI function block is used within the CAP tool in direct relation with the Signal Matrix
Tool SMT (please see the overview of the engineering process in the “Application manual”,
chapter “Engineering of the IED”). It represents the way binary inputs are brought in for one
IED 670 configuration.
SI01-
SMBI
INSTNAME BI1
BI1NAME BI2
BI2NAME BI3
BI3NAME BI4
BI4NAME BI5
BI5NAME BI6
BI6NAME BI7
BI7NAME BI8
BI8NAME BI9
BI9NAME BI10
BI10NAME
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70
Signal matrix for binary inputs (SMBI) Chapter 3
Basic IED functions
Signal Description
BI6NAME Signal name for BI6 in Signal Matrix Tool
BI7NAME Signal name for BI7 in Signal Matrix Tool
BI8NAME Signal name for BI8 in Signal Matrix Tool
BI9NAME Signal name for BI9 in Signal Matrix Tool
BI10NAME Signal name for BI10 in Signal Matrix Tool
Table 39: Output signals for the SMBI (SI01-) function block
Signal Description
BI1 Binary input 1
BI2 Binary input 2
BI3 Binary input 3
BI4 Binary input 4
BI5 Binary input 5
BI6 Binary input 6
BI7 Binary input 7
BI8 Binary input 8
BI9 Binary input 9
BI10 Binary input 10
71
Signal matrix for binary outputs (SMBO) Chapter 3
Basic IED functions
8.1 Introduction
The SMBO function block is used within the CAP tool in direct relation with the Signal Matrix
Tool SMT (please see the overview of the engineering process in the “Application manual”,
chapter “Engineering of the IED”). It represents the way binary outputs are sent from one
IED 670 configuration.
SO01-
SMBO
BO1 INSTNAME
BO2 BO1NAME
BO3 BO2NAME
BO4 BO3NAME
BO5 BO4NAME
BO6 BO5NAME
BO7 BO6NAME
BO8 BO7NAME
BO9 BO8NAME
BO10 BO9NAME
BO10NAME
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72
Signal matrix for binary outputs (SMBO) Chapter 3
Basic IED functions
Signal Description
BO6 Signal name for BO6 in Single Matrix Tool
BO7 Signal name for BO7 in Single Matrix Tool
BO8 Signal name for BO8 in Single Matrix Tool
BO9 Signal name for BO9 in Single Matrix Tool
BO10 Signal name for BO10 in Single Matrix Tool
Table 41: Output signals for the SMBO (SO01-) function block
Signal Description
INSTNAME Instance name in Single Matrix Tool
BO1NAME Signal name for BO1 in Single Matrix Tool
BO2NAME Signal name for BO2 in Single Matrix Tool
BO3NAME Signal name for BO3 in Single Matrix Tool
BO4NAME Signal name for BO4 in Single Matrix Tool
BO5NAME Signal name for BO5 in Single Matrix Tool
BO6NAME Signal name for BO6 in Single Matrix Tool
BO7NAME Signal name for BO7 in Single Matrix Tool
BO8NAME Signal name for BO8 in Single Matrix Tool
BO9NAME Signal name for BO9 in Single Matrix Tool
BO10NAME Signal name for BO10 in Single Matrix Tool
73
Signal matrix for mA inputs (SMMI) Chapter 3
Basic IED functions
9.1 Introduction
The SMMI function block is used within the CAP tool in direct relation with the Signal Matrix
Tool SMT (please see the overview of the engineering process in the “Application manual”,
chapter “Engineering of the IED”). It represents the way milliamp (mA) inputs are brought in
for one IED670 configuration.
The outputs on the SMMI are normally connected to the SPGGIO MVGGIO function block for
further use of the mA signals.
SMI1-
SMMI
INSTNAME AI1
AI1NAME AI2
AI2NAME AI3
AI3NAME AI4
AI4NAME AI5
AI5NAME AI6
AI6NAME
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74
Signal matrix for mA inputs (SMMI) Chapter 3
Basic IED functions
Table 43: Output signals for the SMMI (SMI1-) function block
Signal Description
AI1 Analog milliampere input 1
AI2 Analog milliampere input 2
AI3 Analog milliampere input 3
AI4 Analog milliampere input 4
AI5 Analog milliampere input 5
AI6 Analog milliampere input 6
75
Signal matrix for analog inputs (SMAI) Chapter 3
Basic IED functions
10.1 Introduction
The SMAI function block (or the pre-processing function block, as it is also known) is used
within the PCM 600 in direct relation with the Signal Matrix Tool SMT (please see the overview
of the engineering process in the “Application manual”, chapter “Engineering of the IED”). It
represents the way analog inputs are brought in for one IED 670 configuration.
PR01-
SMAI
BLOCK SYNCOUT
DFTSPFC SPFCOUT
GRPNAME AI3P
AI1NAME AI1
AI2NAME AI2
AI3NAME AI3
AI4NAME AI4
TYPE AIN
NOSMPLCY
en05000705.vsd
PR02-
SMAI
BLOCK AI3P
GRPNAME AI1
AI1NAME AI2
AI2NAME AI3
AI3NAME AI4
AI4NAME AIN
TYPE NOSMPLCY
en05000706.vsd
76
Signal matrix for analog inputs (SMAI) Chapter 3
Basic IED functions
Table 45: Output signals for the SMAI (PR01-) function block
Signal Description
SYNCOUT Synchronisation signal from internal DFT reference function
SPFCOUT Number of samples per fundamental cycle from internal DFT ref-
erence function
AI3P Group 1 analog input 3-phase group
AI1 Group 1 analog input 1
AI2 Group 1 analog input 2
AI3 Group 1 analog input 3
AI4 Group 1 analog input 4
AIN Group 1 analog input residual for disturbance recorder
Table 46: Input signals for the SMAI (PR02-) function block
Signal Description
BLOCK Block group 2
GRPNAME Group name for GRP2 in Signal Matrix Tool
AI1NAME Signal name for AI1 in Signal Matrix Tool
AI2NAME Signal name for AI2 in Signal Matrix Tool
AI3NAME Signal name for AI3 in Signal Matrix Tool
AI4NAME Signal name for AI4 in Signal Matrix Tool
77
Signal matrix for analog inputs (SMAI) Chapter 3
Basic IED functions
Table 47: Output signals for the SMAI (PR02-) function block
Signal Description
AI3P Group 2 analog input 3-phase group
AI1 Group 2 analog input 1
AI2 Group 2 analog input 2
AI3 Group 2 analog input 3
AI4 Group 2 analog input 4
AIN Group 2 analog input residual for disturbance recorder
Note!
Settings DFTRefExtOut and DFTReference shall be set to default value InternalDFTRef if no
VT inputs are available.
78
Signal matrix for analog inputs (SMAI) Chapter 3
Basic IED functions
79
Signal matrix for analog inputs (SMAI) Chapter 3
Basic IED functions
80
Summation block 3 phase (SUM3Ph) Chapter 3
Basic IED functions
11.1 Introduction
The SUM3Ph function block is used in order to get the sum of two sets of 3 ph analog signals
(of the same type) for those IED functions that might need it.
SU01-
Sum3Ph
BLOCK AI3P
DFTSYNC AI1
DFTSPFC AI2
G1AI3P AI3
G2AI3P AI4
en05000441.vsd
Table 51: Output signals for the Sum3Ph (SU01-) function block
Signal Description
AI3P Group analog input 3-phase group
AI1 Group 1 analog input
AI2 Group 2 analog input
AI3 Group 3 analog input
AI4 Group 4 analog input
81
Summation block 3 phase (SUM3Ph) Chapter 3
Basic IED functions
Note!
Settings DFTRefExtOut and DFTReference shall be set to default value InternalDFTRef if no
VT inputs are available.
82
About this chapter Chapter 4
Differential protection
Chapter 4 Differential
protection
83
High impedance differential protection Chapter 4
(PDIF, 87) Differential protection
1.1 Introduction
The high impedance differential protection can be used when the involved CT cores have same
turn ratio and similar magnetizing characteristic. It utilizes an external summation of the phases
and neutral current and a series resistor and a voltage dependent resistor externally to the relay.
84
High impedance differential protection Chapter 4
(PDIF, 87) Differential protection
HZD1-
HZPDIF_87
ISI TRIP
BLOCK ALARM
BLKTR MEASVOLT
en05000363.vsd
85
High impedance differential protection Chapter 4
(PDIF, 87) Differential protection
Table 54: Output signals for the HZPDIF_87 (HZD1-) function block
Signal Description
TRIP Trip signal
ALARM Alarm signal
MEASVOLT Measured RMS voltage on CT secondary side
86
About this chapter Chapter 5
Distance protection
87
Distance protection zones (PDIS, 21) Chapter 5
Distance protection
1.1 Introduction
The line distance protection is a five zone full scheme protection with three fault loops for phase
to phase faults and three fault loops for phase to earth fault for each of the independent zones.
Individual settings for each zone resistive and reactive reach gives flexibility for use on overhead
lines and cables of different types and lengths.
The function has a functionality for load encroachment which increases the possibility to detect
high resistive faults on heavily loaded lines (see figure 42).
Forward
operation
Reverse
operation
en05000034.vsd
Figure 42: Typical distance protection zone with load encroachment function activated
The independent measurement of impedance for each fault loop together with a sensitive and
reliable built in phase selection makes the function suitable in applications with single phase au-
to-reclosing.
Built-in adaptive load compensation algorithm prevents overreaching of zone1 at load exporting
end at phase-to-earth faults on heavily loaded power lines.
88
Distance protection zones (PDIS, 21) Chapter 5
Distance protection
The distance protection zones can operate, independent of each other, in directional (forward or
reverse) or non-directional mode. This makes them suitable, together with different communi-
cation schemes, for the protection of power lines and cables in complex network configurations,
such as parallel lines, multi-terminal lines etc.
Figure 43 presents an outline of the different measuring loops for the basic five, imped-
ance-measuring zones l.
en05000458.vsd
Figure 43: The different measuring loops at line-earth fault and phase-phase fault.
The use of full scheme technique gives faster operation time compared to switched schemes
which mostly uses a start element to select correct voltages and current depending on fault type.
Each distance protection zone performs like one independent distance protection relay with six
measuring elements.
The distance measuring zone will essentially operate according to the non-directional imped-
ance characteristics presented in figure 44 and figure 45. The phase-to-earth characteristic is il-
lustrated with the full loop reach while the phase-to-phase characteristic presents the per-phase
reach.
89
Distance protection zones (PDIS, 21) Chapter 5
Distance protection
X0 − X1
XN =
3
X1+Xn R0 − R1
RN =
3
f N f N
R (Ohm/loop)
RFPE RFPE
X1+Xn
en05000661.vsd
Figure 44: Characteristic for the phase-to-earth measuring loops, ohm/loop domain.
90
Distance protection zones (PDIS, 21) Chapter 5
Distance protection
X (Ohm/phase)
2·X1
R (Ohm/phase)
RFPP RFPP
2·X1
The fault loop reach with respect to each fault type may also be presented as in figure 46. Note
in particular the difference in definition regarding the (fault) resistive reach for phase-to-phase
faults and three-phase faults.
91
Distance protection zones (PDIS, 21) Chapter 5
Distance protection
ILn R1 + j X1
Phase-to-earth
UL1
element
Phase-to-earth
fault in phase L1 RFPE
(Arc + tower
resistance)
0
IN (R0-R1)/3 +
j (X0-X1)/3 )
IL1 R1 + j X1 Phase-to-phase
UL1 element L1-L2
Phase-to-phase
fault in phase RFPP
L1-L2 IL2
UL2 (Arc resistance)
R1 + j X1
where:
n designates anyone of the three phases (1, 2 or 3) and
m represents the phase that is leading phase n with 120 degrees (i.e. 3, 1 or 2).
The R1 and jX1 in figure 46 represents the positive sequence impedance from the measuring
point to the fault location. The RFPE and RFPP is the eventual fault resistance in the fault place.
Regarding the illustration of three-phase fault in figure 46, there is of course fault current flow-
ing also in the third phase during a three-phase fault. The illustration merely reflects the loop
measurement, which is made phase-to-phase.
92
Distance protection zones (PDIS, 21) Chapter 5
Distance protection
The theoretical parameters p and q outline the area of operation in quadrant 1 when varied from
0 to 1.0. That is, for any combination of p and q, where both are between 0 and 1.0, the corre-
sponding impedance is within the reach of the characteristic.
The zone may be set to operate in Non-directional, Forward or Reverse direction through the
setting OperationDir. The result from respective set value is illustrated in figure 47. It may be
convenient to once again mention that the impedance reach is symmetric, in the sense that it is
conform for forward and reverse direction. Therefore, all reach settings apply to both directions.
X X X
R R R
en05000182.vsd
For zone 1 with load compensation feature the additional criterion applies, that all phase-to-earth
loops will be blocked when IN < IMinOpIN, regardless of the phase currents.
ILn is the RMS value of the current in phase Ln. IN is the RMS value of the vector sum of the
three phase currents, i.e. residual current 3I0.
93
Distance protection zones (PDIS, 21) Chapter 5
Distance protection
ILmLn is the RMS value of the vector difference between phase currents Lm and Ln.
Note!
All three current limits IminOpPE, IminOpIN and IMinOpPP are automatically reduced to 75%
of regular set values if the zone is set to operate in reverse direction, i.e. OperationDir=Reverse.
UL1 – UL2
Zapp = -------------------------
I L1 – IL2
(Equation 1)
Here U and I represent the corresponding voltage and current phasors in the respective phase Ln
(n = 1, 2, 3)
The earth return compensation applies in a conventional manner to ph-E faults (example for a
phase L1 to earth fault) according to equation 2.
U L1
Z app = ------------------------------
I L1 + I N ⋅ KN
(Equation 2)
Where:
UL1, IL1 and IN are the phase voltage, phase current and residual current present to the IED
KN is defined as:
X0 - X1
KN =
3X1
where X0 and X1 is zero and positive sequence reactance from the measuring point to
the fault on the protected line.
Here IN is a phasor of the residual current in relay point. This results in the same reach along the
line for all types of faults.
The apparent impedance is considered as an impedance loop with resistance R and reactance X.
The formula given in equation 2 is only valid for no loaded radial feeder applications. When load
is considered in the case of single line to earth fault, conventional distance protection might
overreach at exporting end and underreach at importing end. REx670 has an adaptive load com-
pensation which increases the security in such applications.
94
Distance protection zones (PDIS, 21) Chapter 5
Distance protection
Measuring elements receive current and voltage information from the A/D converter. The check
sums are calculated and compared, and the information is distributed into memory locations. For
each of the six supervised fault loops, sampled values of voltage (U), current (I), and changes in
current between samples (ΔI) are brought from the input memory and fed to a recursive Fourier
filter.
The filter provides two orthogonal values for each input. These values are related to the loop im-
pedance according to equation 3,
X Δi
U = R ⋅ i + ------ ⋅ -----
ω 0 Δt
(Equation 3)
X Δ Re ( I )
Re ( U ) = R ⋅ Re ( I ) + ------ ⋅ ------------------
ω0 Δt
(Equation 4)
X Δ Im ( I )
Im ( U ) = R ⋅ Im ( I ) + ------ ⋅ -----------------
ω0 Δt
(Equation 5)
with
ω0 = 2 ⋅ π ⋅ f 0
(Equation 6)
where:
Re designates the real component of current and voltage,
Im designates the imaginary component of current and voltage and
f0 designates the rated system frequency
The algorithm calculates Rm measured resistance from the equation for the real value of the volt-
age and substitute it in the equation for the imaginary part. The equation for the Xm measured
reactance can then be solved. The final result is equal to:
Im ( U ) ⋅ ΔRe ( I ) – Re ( U ) ⋅ Δ Im ( I )
R m = ------------------------------------------------------------------------------------
ΔRe ( I ) ⋅ Im ( I ) – Δ Im ( I ) ⋅ Re ( I )
(Equation 7)
95
Distance protection zones (PDIS, 21) Chapter 5
Distance protection
Re ( U ) ⋅ Im ( I ) – Im ( U ) ⋅ Re ( I )
Xm = ω 0 ⋅ Δt ⋅ -------------------------------------------------------------------------------
ΔRe ( I ) ⋅ Im ( I ) – ΔIm ( I ) ⋅ Re ( I )
(Equation 8)
The calculated Rm and Xm values are updated each sample and compared with the set zone reach.
The adaptive tripping counter counts the number of permissive tripping results. This effectively
removes any influence of errors introduced by the capacitive voltage transformers or by other
factors.
The directional evaluations are performed simultaneously in both forward and reverse direc-
tions, and in all six fault loops. Positive sequence voltage and a phase locked positive sequence
memory voltage are used as a reference. This ensures unlimited directional sensitivity for faults
close to the relay point.
(Equation 9)
For the L1-L2 element, the equation in forward direction is according to.
(Equation 10)
where:
ArgDir is the setting for the lower boundary of the forward directional characteristic, by default
set to 15 (= -15 degrees) and
ArgNegRes is the setting for the upper boundary of the forward directional characteristic, by default
set to 115 degrees, see figure 48.
U1L1 is positive sequence phase voltage in phase L1
U1L1M is positive sequence memorized phase voltage in phase L1
IL1 is phase current in phase L1
U1L1L2 is voltage difference between phase L1 and L2 (L2 lagging L1)
U1L1L2M is memorized voltage difference between phase L1 and L2 (L2 lagging L1)
IL1L2 is current difference between phase L1 and L2 (L2 lagging L1)
96
Distance protection zones (PDIS, 21) Chapter 5
Distance protection
The setting of ArgDir and ArgNegRes is by default set to 15 (= -15) and 115 degrees respective-
ly.(see figure 48) and it should not be changed unless system studies has shown the necessity.
The ZD gives a binary coded signal on the output STDIR depending on the evaluation where
STFWL1N=1 adds 1, STRVL1N=1 adds 2, STFWL2N=1 adds 4 etc.
ArgNegRes
ArgDir
R
en05000722.vsd
Figure 48: Setting angles for discrimination of forward and reverse fault
The polarizing voltage is available as long as the positive-sequence voltage exceeds 4% of the
set base voltage UBase. So the directional element can use it for all unsymmetrical faults includ-
ing close-in faults.
For close-in three-phase faults, the U1L1M memory voltage, based on the same positive se-
quence voltage, ensures correct directional discrimination.
The memory voltage is used for 100 ms or until the positive sequence voltage is restored.
97
Distance protection zones (PDIS, 21) Chapter 5
Distance protection
• If the current is still above the set value of the minimum operating current
(between 10 and 30% of the set terminal rated current IBase), the condition seals
in.
- If the fault has caused tripping, the trip endures.
- If the fault was detected in the reverse direction, the measuring element in
the reverse direction remains in operation.
• If the current decreases below the minimum operating value, the memory resets
until the positive sequence voltage exceeds 10% of its rated value.
Phase-to-earth related signals are designated by LnE, where n represents the corresponding
phase number (L1E, L2E, and L3E). The phase-to-phase signals are designated by LnLm, where
n and m represent the corresponding phase numbers (L1L2, L2L3, and L3L1).
Fulfillment of two different measuring conditions is necessary to obtain the one logical signal
for each separate measuring loop:
The STCND input signal represents a connection of six different integer values from the phase
selection function within the IED, which are converted within the zone measuring function into
corresponding boolean expressions for each condition separately. It is connected to the PHS
function block output STCDZ.
The internal input signal DIRCND is used to give condition for directionality for the distance
measuring zones. The signal contains binary coded information for both forward and reverse di-
rection. The zone measurement function filter out the relevant signals on the STDIR input de-
pending on the setting of the parameter OperationDir. It shall be configured to the STDIR output
on the ZD block.
98
Distance protection zones (PDIS, 21) Chapter 5
Distance protection
Composition of the phase starting signals for a case, when the zone operates in a non-directional
mode, is presented in figure 50.
99
Distance protection zones (PDIS, 21) Chapter 5
Distance protection
Results of the directional measurement enter the logic circuits, when the zone operates in direc-
tional (forward or reverse) mode, see figure 51.
100
Distance protection zones (PDIS, 21) Chapter 5
Distance protection
STNDL1N
AND
DIRL1N
OR STZMPE.
&
STNDL2N
DIRL2N AND
STNDL3N 15 ms
OR STL1
& t
DIRL3N AND
STNDL1L2
DIRL1L2 AND 15 ms
OR STL2
& t
STNDL2L3
DIRL2L3 AND
15 ms
OR STL3
STNDL3L1 & t
DIRL3L1 AND
OR STZMPP
&
BLK
15 ms
OR START
& t
en05000778.vsd
Tripping conditions for the distance protection zone one are symbolically presented in figure 52.
101
Distance protection zones (PDIS, 21) Chapter 5
Distance protection
Figure 52: Tripping logic for the distance protection zone one
ZM01-
ZMQPDIS
I3P TRIP
U3P TRL1
BLOCK TRL2
VTSZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND
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102
Distance protection zones (PDIS, 21) Chapter 5
Distance protection
ZD01-
ZDRDIR
I3P STDIR
U3P
en05000681.vsd
Table 58: Output signals for the ZMQPDIS_21 (ZM01-) function block
Signal Description
TRIP General Trip, issued from any phase or loop
TRL1 Trip signal from phase L1
TRL2 Trip signal from phase L2
TRL3 Trip signal from phase L3
START General Start, issued from any phase or loop
STL1 Start signal from phase L1
STL2 Start signal from phase L2
STL3 Start signal from phase L3
STND Non-directional start, issued from any phase or loop
Table 59: Input signals for the ZDRDIR (ZD01-) function block
Signal Description
I3P Group connection
U3P Group connection
103
Distance protection zones (PDIS, 21) Chapter 5
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Table 60: Output signals for the ZDRDIR (ZD01-) function block
Signal Description
STDIR All start signals binary coded
104
Distance protection zones (PDIS, 21) Chapter 5
Distance protection
Table 62: Parameter group settings for the ZDRDIR (ZD01-) function
Parameter Range Step Default Unit Description
ArgNegRes 90 - 175 1 115 Deg Angle to blinder in sec-
ond quadrant for forward
direction
ArgDir 5 - 45 1 15 Deg Angle to blinder in fourth
quadrant for forward
direction
IMinOp 1 - 99999 1 10 %IB Minimum operate cur-
rent in % of IBase
IBase 1 - 99999 1 3000 A Base Current
UBase 0.05 - 2000.00 0.05 400.00 kV Base Voltage
105
Distance protection zones (PDIS, 21) Chapter 5
Distance protection
106
Phase selection with load encroachment Chapter 5
(PDIS, 21) Distance protection
2.1 Introduction
The operation of transmission networks today is in many cases close to the stability limit. Due
to environmental considerations the rate of expansion and reinforcement of the power system is
reduced e.g. difficulties to get permission to build new power lines. The ability to accurate and
reliable classifying the different types of fault so that single pole tripping and auto-reclosing can
be used plays an important roll in this matter. The PHS function is designed to accurate select
the proper fault loop in the distance function dependent on the fault type.
The heavy load transfer that is common in many transmission networks may in some cases be
in opposite to the wanted fault resistance coverage. Therefore the function has an built in algo-
rithm for load encroachment, which gives the possibility to enlarge the resistive setting of both
the PHS and the measuring zones without interfering with the load.
The extensive output signals from the PHS gives also important information about faulty
phase(s) which can be used for fault analysis.
The difference, compared to the zone measuring elements, is in the combination of the measur-
ing quantities (currents and voltages) for different types of faults.
The characteristic is basically non-directional, but the PHS function uses information from the
directional function block to discriminate whether the fault is in forward or reverse. The direc-
tional lines are drawn as "line-dot-dot-line" in the figures below.
1. Residual current criteria, i.e. separation of faults with and without earth connec-
tion
2. Regular quadrilateral impedance characteristic
107
Phase selection with load encroachment Chapter 5
(PDIS, 21) Distance protection
3. Load encroachment characteristics is always active but can be switched off by se-
lecting a high setting.
X X X
60°
60° R
R R
60° 60°
en05000668.vsd
Figure 55: Characteristic for non-directional, forward and reverse operation of PHS
The setting of the load encroachment function may influence the total operating characteristic,
(for more information, refer to section 2.2.4 "Load encroachment").
The input DIRCND contains binary coded information about the directional coming from the
directionality block. It shall be connected to the STDIR output on the ZD block. This informa-
tion is also transferred to the input DIRCND on the distance measuring zones, i.e. the ZM block.
The code built up for the directionality is as follows:
108
Phase selection with load encroachment Chapter 5
(PDIS, 21) Distance protection
STDIR=STFWL1*1+STFWL2*4+STFWL3*16+STFWL1L2*64+STFWL2L3*256+STFWL
3L1*1024+STRVL1*2+STRVL2*8+STRVL3*32+STRVL1L2*128+STRVL2L3*512+STR
VL3L1*2048
If the binary information is 1 then it will be considered that we have start in forward direction in
phase L1. If the binary code is 5 then we have start in forward direction in phase L1 and L2 etc.
The STCND (Z or I) output contains, in a similar way as DIRCND, binary coded information,
in this case information about the condition for opening correct fault loop in the distance mea-
suring element. It shall be connected to the STCND input on the ZM blocks. The code built up
for release of the measuring fault loops is as follows:
ULn
ZPHSn =
ILn
(Equation 11)
where:
n corresponds to the particular phase (n=1, 2 or 3)
The characteristic for the PHS function at phase to earth fault is according to figure 56. The char-
acteristic has a fixed angle for the resistive boundary in the first quadrant of 60°.
The resistance RN and reactance XN is the impedance in the earth return path defined according
to equation 12 and equation 13.
R0 − R1
RN =
3
(Equation 12)
X 0 − X1
XN =
3
(Equation 13)
109
Phase selection with load encroachment Chapter 5
(PDIS, 21) Distance protection
X (ohm/loop)
Kr·(X1+XN)
RFRvPE RFFwPE
X1+XN
60 deg
RFFwPE
RFRvPE R (Ohm/loop)
60 deg
X1
1
Kr =
tan(60 deg)
RFRvPE RFFwPE
Kr·(X1+XN)
en06000396.vsd
Figure 56: Characteristic of PHS for phase to earth fault (setting parameters in italic),
ohm/loop domain
Besides this, the 3I0 residual current must fulfil the conditions according to equation 14 and
equation 15.
3 ⋅ I 0 ≥ 0.5 ⋅ IM in O p
(Equation 14)
3 ⋅ I0 ≥ INReleasePE
------------------------------------ ⋅ Iphmax
100
(Equation 15)
where:
IMinOp is the minimum operation current for forward zones,
INReleasePE is the setting for the minimum residual current needed to enable operation in the ph-E
fault loops (in %) and
Iphmax is the maximum phase current in any of three phases.
110
Phase selection with load encroachment Chapter 5
(PDIS, 21) Distance protection
ULm − ULn
ZPHS =
−2 ⋅ ILn
(Equation 16)
ULm is the leading phase voltage, ULn the lagging phase voltage and ILn the phase current in
the lagging phase n.
X (ohm/phase)
0.5·FRvPP 0.5·RFFwPP
Kr·X1
X1
0.5·RFFwPP
60 deg
R (ohm/phase)
60 deg
0.5·RFRvPP
X1
1
Kr =
tan(60 deg)
Kr·X1
0.5·RFRvPP 0.5·RFFwPP
en05000670.vsd
Figure 57: The operation characteristic for PHS at phase-to-phase fault (setting parameters
in Italic), ohm/phase domain
In the same way as the condition for phase-to-earth fault, there are current conditions that have
to be fulfilled in order to release the phase-to-phase loop. Those are according to equation 17 or
equation 18.
3I 0 < IN Re leasePE
(Equation 17)
111
Phase selection with load encroachment Chapter 5
(PDIS, 21) Distance protection
where:
INRelease is 3I0 limit for releasing phase-to-earth measuring loops,
INBlockPP is 3I0 limit for blocking phase-to-phase measuring loop and
Iphmax is maximal magnitude of the phase currents.
However, the reach is expanded by a factor 2/√3 (approximately 1.1547) in all directions. At the
same time the apparent impedance is rotated 30 degrees, counter-clockwise. The characteristic
is shown in figure 58.
X (ohm/phase)
4 ⋅ X1
3
90 deg
0.5·RFFwPP·K3
X1·K3 4 ⋅ RFFwPP
6
R (ohm/phase)
0.5·RFRvPP·K3
K3 = 2 / sqrt(3)
30 deg
en05000671.vsd
Figure 58: The characteristic of PHS for three phase fault (setting parameters in italic)
112
Phase selection with load encroachment Chapter 5
(PDIS, 21) Distance protection
The outline of the characteristic is presented in figure 59. As illustrated, the resistive blinders
are set individually in forward and reverse direction while the angle of the sector is the same in
all four quadrants.
RLdFw
ARGLd ARGLd
R
ARGLd ARGLd
RLdRv
en05000196.vsd
The influence of load encroachment function depending on the operation characteristic is depen-
dent on the chosen operation mode of the PHS function. When selection mode is STCNDZ, the
characteristic for the PHS (and also zone measurement depending on settings) will be reduced
by the load encroachment characteristic (see figure 60, left illustration).
When STCNDI is selected the operation characteristic will be as the right illustration in
figure 60. The reach will in this case be limit by the minimum operation current and the distance
measuring zones.
113
Phase selection with load encroachment Chapter 5
(PDIS, 21) Distance protection
X X
R R
STCNDZ STCNDI
en05000197.vsd
Figure 60: Difference in operating characteristic depending on operation mode when load
encroachment is activated
When the "phase selection" is set to operate together with a distance measuring zone the result-
ant operate characteristic could look something like in figure 61. The figure shows a distance
measuring zone operating in forward direction. Thus, the operate area is highlighted in black.
114
Phase selection with load encroachment Chapter 5
(PDIS, 21) Distance protection
"Phase selection"
"quadrilateral" zone
Load encroachment
characteristic
Directional line
en05000673.vsd
Figure 61: Operation characteristic in forward direction when load encroachment is enabled
Figure 61 is valid for phase-to-earth as well as phase-to-phase faults. During a three-phase fault,
or load, when the "quadrilateral" phase-to-phase characteristic is subject to enlargement and ro-
tation the operate area is transformed according to figure 62. Notice in particular what happens
with the resistive blinders of the "phase selection" "quadrilateral" characteristic. Due to the
30-degree rotation, the angle of the blinder in quadrant one is now 90 degrees instead of the orig-
inal 60 degrees. The blinder that is nominally located to quadrant four will at the same time tilt
outwards and increase the resistive reach around the R-axis. Consequently, it will be more or
less necessary to use the load encroachment characteristic in order to secure a margin to the load
impedance.
115
Phase selection with load encroachment Chapter 5
(PDIS, 21) Distance protection
X (ohm/phase)
Phase selection
”Quadrilateral” zone
R (ohm/phase)
en05000674.vsd
Figure 62: Operation characteristic for PHS in forward direction for three-phase fault,
ohm/phase domain
The phase-to-earth loop Ln is blocked if ILn<IMinOpPE, where ILn is the RMS value of the
current in phase Ln.
116
Phase selection with load encroachment Chapter 5
(PDIS, 21) Distance protection
Figure 63: Phase-to-phase and phase-to-earth operating conditions (residual current crite-
ria)
A special attention is paid to correct phase selection at evolving faults. A STCNDI output signal
is created as a combination of the load encroachment characteristic and current criteria, refer to
figure 63. This signal can be configured to STCND functional input signals of the distance pro-
tection zone and this way influence the operation of the ph-ph and ph-E zone measuring ele-
ments and their phase related starting and tripping signals.
117
Phase selection with load encroachment Chapter 5
(PDIS, 21) Distance protection
Composition of the directional (forward and reverse) phase selective signals is presented sche-
matically in figure 66 and figure 65. The directional criteria appears as a condition for the cor-
rect phase selection in order to secure a high phase selectivity for simultaneous and evolving
faults on lines within the complex network configurations. Signals DFWLn and DFWLnLm
present the corresponding directional signals for measuring loops with phases Ln and Lm. Des-
ignation FW (figure 66) represents the forward direction as well as the designation RV
(figure 65) represents the reverse direction. All directional signals are derived within the corre-
sponding digital signal processor.
118
Phase selection with load encroachment Chapter 5
(PDIS, 21) Distance protection
119
Phase selection with load encroachment Chapter 5
(PDIS, 21) Distance protection
120
Phase selection with load encroachment Chapter 5
(PDIS, 21) Distance protection
PHS1-
FDPSPDIS_21
I3P TRIP
U3P START
BLOCK STFWL1
DIRCND STFWL2
STFWL3
STFWPE
STRVL1
STRVL2
STRVL3
STRVPE
STNDL1
STNDL2
STNDL3
STNDPE
STFW1PH
STFW2PH
STFW3PH
STPE
STPP
STCNDZ
STCNDI
en06000258.vsd
Table 65: Output signals for the FDPSPDIS_21 (PHS--) function block
Signal Description
STFWL1 Fault detected in phase L1 - forward direction
STFWL2 Fault detected in phase L2 - forward direction
STFWL3 Fault detected in phase L3 - forward direction
STFWPE Earth fault detected in forward direction
STRVL1 Fault detected in phase L1 - reverse direction
STRVL2 Fault detected in phase L2 - reverse direction
STRVL3 Fault detected in phase L3 - reverse direction
STRVPE Earth fault detected in reverse direction
STNDL1 Non directional start in L1
STNDL2 Non directional start in L2
121
Phase selection with load encroachment Chapter 5
(PDIS, 21) Distance protection
Signal Description
STNDL3 Non directional start in L3
STNDPE Non directional start, phase-earth
STFW1PH Start in forward direction for single-phase fault
STFW2PH Start in forward direction for two- phase fault
STFW3PH Start in forward direction for thre-phase fault
STPE Current conditions release of phase-earth measuring elements
STPP Current conditions release of phase-phase measuring elements
STCNDZ Start condition (PHS,LE and I based)
STCNDI Start condition (LE and I based)
122
Phase selection with load encroachment Chapter 5
(PDIS, 21) Distance protection
123
Power swing detection (RPSB, 78) Chapter 5
Distance protection
3.1 Introduction
Power swings may occur after disconnection of heavy loads or trip of big generation plants.
Power swing detection function is used to detect power swings and initiate block of selected dis-
tance protection zones. Occurrence of earth fault currents during a power swing can block the
power swing detection function to allow fault clearance.
Its principle of operation is based on the measurement of the time it takes for a power swing tran-
sient impedance to pass through the impedance area between the outer and the inner character-
istics. Power swings are identified by transition times longer than a transition time set on
corresponding timers. The impedance measuring principle is the same as that used for the dis-
tance protection zones. The impedance and the characteristic passing times are measured in all
three phases separately. One-out-of-three or two-out-of-three operating modes can be selected
according to the specific system operating conditions.
124
Power swing detection (RPSB, 78) Chapter 5
Distance protection
The impedance measurement within the PSD function is performed by solving equation 19 and
equation 20 (n = 1, 2, 3 for each corresponding phase L1, L2 and L3).
⎛ U L1 ⎞
Re⎜⎜ ⎟⎟ ≤ Rset
⎝ IL1 ⎠
(Equation 19)
⎛ U L1 ⎞
Im⎜⎜ ⎟⎟ ≤ Xset
⎝ I L1 ⎠
(Equation 20)
The Rset and Xset are R and X boundaries which are more explained in the following sections.
125
Power swing detection (RPSB, 78) Chapter 5
Distance protection
where:
kLdRFw is a settable multiplication factor less than 1
The slope of the load encroachment inner and outer boundary is defined by setting the parameter
ARGLd.
The load encroachment in the fourth quadrant uses the same settings as in the first quadrant
(same ARGLd and RLdOutFw and calculated RLdInFw).
The quadrilateral characteristic in the first quadrant is tilted to get a better adaptation to the dis-
tance zones. The angle is the same as the line angle and derived from the setting of the reactive
reach inner boundary X1InFw and the line resistance for the inner boundary R1LIn. The fault
resistance coverage for the inner boundary is set by the parameter R1FInFw.
From the setting parameter RLdOutFw and the calculated value RLdInFw a distance between
the inner and outer boundary, ΔFw, is calculated. This value is valid for R direction in first and
fourth quadrant and for X direction in first and second quadrant.
From the setting parameter RLdOutRv and the calculated value RLdInRv a distance between the
inner and outer boundary, ΔRv, is calculated. This value is valid for R direction in second and
third quadrant and for X direction in third and fourth quadrant.
The inner resistive characteristic in the second quadrant outside the load encroachment part cor-
responds to the setting parameter R1FInRv for the inner boundary. The outer boundary is inter-
nally calculated as the sum of ΔRv+R1FInRv.
126
Power swing detection (RPSB, 78) Chapter 5
Distance protection
The inner resistive characteristic in the third quadrant outside the load encroachment zone con-
sist of the sum of the settings R1FInRv and the line resistance R1LIn. The argument of the tilted
lines outside the load encroachment is the same as the tilted lines in the first quadrant. The dis-
tance between the inner and outer boundary is the same as for the load encroachment in reverse
direction i.e. ΔRv.
The inner characteristic for the reactive reach in reverse direction correspond to the setting pa-
rameter X1InRv for the inner boundary and the outer boundary is defined as X1InRv + ΔRv.
• The "1-of-3" operating mode is based on detection of power swing in any of the
three phases. Figure 69 presents a composition of a detection signal
PSD-DET-L1 in this particular phase.
• The "2-of-3" operating mode is based on detection of power swing in at least two
out of three phases. Figure 70 presents a composition of the detection signals
DET1of3 and DET2of3.
Signals ZOUTL1 (external boundary) and ZINL1 (internal boundary) in figure 69 are related to
the operation of the impedance measuring elements in each phase separately (Ln represents the
corresponding phase L1, L2, and L3). They are internal signals, calculated by the PSD-function.
The tP1 timer in figure 69 serve as detection of initial power swings, which are usually not as
fast as the later swings are. The tP2 timer become activated for the detection of the consecutive
swings, if the measured impedance exit the operate area and returns within the time delay, set
on the tW waiting timer. The upper part of figure 69 (input signal ZOUTL1, ZINL1, AND-gates
and tP-timers etc.) are duplicated for phase L2 and L3. All tP1 and tP2 timers in the figure have
the same settings.
127
Power swing detection (RPSB, 78) Chapter 5
Distance protection
Figure 70: Detection of power-swing for 1-of-3 and 2-of-3 operating mode
128
Power swing detection (RPSB, 78) Chapter 5
Distance protection
ZOUTL1 ZOUT
OR
ZOUTL2 ZINL1
ZIN
ZOUTL3 AND ZINL2 OR
ZINL3
tEF
TRSP
t AND
I0CHECK
10 ms
AND t
BLKI02 OR
tR1
AND t INHIBIT
OR
-loop
tR2
BLKI01 AND t
BLOCK
-loop
DET1of3 - int.
REL1PH
AND
BLK1PH
tH
DET2of3 - int. OR t
REL2PH
AND
BLK2PH OR START
AND
EXTERNAL
en05000114.vsd
Selection of the operating mode is possible by the proper configuration of the functional input
signals REL1PH, BLK1PH, REL2PH, and BLK2PH.
The load encroachment characteristic can be switched off by setting the parameter Operation-
LdCh = Off, but notice that the ΔFw and ΔRv will still be calculated. The characteristic will in
this case be only quadrilateral.
There are four different ways to form the internal INHIBIT signal:
129
Power swing detection (RPSB, 78) Chapter 5
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• Logical 1 on functional input BLOCK inhibits the output START signal instan-
taneously.
• The INHIBIT internal signal is activated, if the power swing has been detected
and the measured impedance remains within its operate characteristic for the
time, which is longer than the time delay set on tR2 timer. It is possible to disable
this condition by connecting the logical 1 signal to the BLKI01 functional input.
• The INHIBIT internal signal is activated after the time delay, set on tR1 timer, if
an earth fault appears during the power swing (input IOCHECK is high) and the
power swing has been detected before the earth fault (activation of the signal
I0CHECK). It is possible to disable this condition by connecting the logical 1 sig-
nal to the BLKI02 functional input.
• The INHIBIT logical signals becomes logical 1, if the functional input I0CHECK
appears within the time delay, set on tEF timer and the impedance has been seen
within the outer characteristic of the PSD operate characteristic in all three phas-
es. This function prevents the operation of the PSD function in cases, when the
circuit breaker closes onto persistent single-phase fault after single-pole auto-re-
closing dead time, if the initial single-phase fault and single-pole opening of the
circuit breaker causes the power swing in the remaining two phases.
PSD1-
ZMRPSB
I3P ST ART
U3P ZOUT
BLOCK ZIN
BLKI01
BLKI02
BLK1PH
REL1PH
BLK2PH
REL2PH
I0CHECK
TRSP
EXT ERNAL
en05000383.vsd
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Power swing detection (RPSB, 78) Chapter 5
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Signal Description
REL1PH Release one-out-of-three-phase operating mode
BLK2PH Block two-out-of-three-phase operating mode
REL2PH Release two-out-of-three-phase operating mode
I0CHECK Residual current (3I0) detection used to inhibit start output
TRSP Single-pole tripping command issued by tripping function
EXTERNAL Input for external detection of power swing
Table 69: Output signals for the ZMRPSB_78 (PSD1-) function block
Signal Description
START Power swing detected
ZOUT Measured impedance within outer impedance boundary
ZIN Measured impedance within inner impedance boundary
131
Power swing detection (RPSB, 78) Chapter 5
Distance protection
132
Automatic switch onto fault logic (PSOF) Chapter 5
Distance protection
4.1 Introduction
Automatic switch onto fault logic is a function that gives an instantaneous trip at closing of
breaker onto a fault. A dead line detection check is provided to activate the function when the
line is dead.
SOTF-BC 1000 ms
SOTF-DLCND 200 ms >1 t
& t 15 ms
SOTF-NDACC SOTF-TRIP
& t
SOTF-BLOCK &
en00000492.vsd
Figure 73: Simplified diagram for automatic switch onto fault logic function.
After activation, a distance protection zone (the non-directional starting signal) is allowed to
give an instantaneous trip. The functional output signal from the distance protection zone to be
used, should be connected to the NDACC functional input of the SOTF function, see figure 73.
The distance protection zone used together with the switch-onto-fault function shall be set to
cover the entire protected line.
The external activation is achieved by an input (BC), which should be set high for activation,
and low when the breaker has closed. This is carried out by an NC auxiliary contact of the circuit
breaker or by the closing order to the breaker.
133
Automatic switch onto fault logic (PSOF) Chapter 5
Distance protection
The internal automatic activation is controlled by the internal dead line detection (DLD) func-
tion. The function gives an internal output signal DLD when the current and voltage for each
phase is below the setting parameter IPh< and UPh<, see figure 74. The SOTF function will be
activated if the signal is present for more than 200 ms at the same time as the non-directional
impedance starting signal NDACC is not activated.
The SOTF function can be blocked by the activation of a SOTF-BLOCK functional input.
Iph_L1 1
1<2
AND
IPh< 2
Uph_L1 1
1<2
UPh< 2
Iph_L2 1
1<2
AND AND SOTF-DLD
IPh< 2
Uph_L2 1
1<2
UPh< 2
Iph_L3 1
1<2
AND
IPh< 2
Uph_L3 1
1<2
UPh< 2
en05000737.vsd
Figure 74: Simplified logic diagram for dead line detection function in SOTF.
134
Automatic switch onto fault logic (PSOF) Chapter 5
Distance protection
SOTF-
ZPSOF
I3P TRIP
U3P
BLOCK
BC
NDACC
en05000377.vsd
Table 73: Output signals for the ZPSOF (SOTF-) function block
Signal Description
TRIP Trip output
135
Automatic switch onto fault logic (PSOF) Chapter 5
Distance protection
136
About this chapter Chapter 6
Current protection
137
Instantaneous phase overcurrent protection Chapter 6
(PIOC, 50) Current protection
1.1 Introduction
The instantaneous three phase overcurrent function has a low transient overreach and short trip-
ping time to allow use as a high set short-circuit protection function, with the reach limited to
less than typical eighty percent of the power line at minimum source impedance.
There is an operation mode (OpMode) setting: “1 out of 3” or “2 out of 3”. If the parameter is
set to “1 out of 3” any phase trip signal will be activated. If the parameter is set to “2 out of 3”
at least two phase signals must be activated for trip.
There is also a possibility to activate a preset change of the set operation current (StValMult) via
a binary input (ENMULT). In some applications the operation value needs to be changed, for
example due to transformer inrush currents.
IOC1-
PHPIOC_50
I3P TRIP
BLOCK TRL1
ENMULT TRL2
TRL3
en04000391.vsd
138
Instantaneous phase overcurrent protection Chapter 6
(PIOC, 50) Current protection
Table 77: Output signals for the PHPIOC_50 (IOC1-) function block
Signal Description
TRIP Trip signal from any phase
TRL1 Trip signal from phase L1
TRL2 Trip signal from phase L2
TRL3 Trip signal from phase L3
139
Instantaneous phase overcurrent protection Chapter 6
(PIOC, 50) Current protection
140
Four step phase overcurrent Chapter 6
protection (POCM, 51_67) Current protection
2.1 Introduction
The four step phase overcurrent function has an inverse or definite time delay independent for
each step separately.
All IEC and ANSI time delayed characteristics are available together with an optional user de-
fined time characteristic.
The function can be set to be directional or non-directional independently for each of the steps.
Note!
If VT inputs are not available or not connected, func parameter DirModeX shall be left to default
value, Non-directional.
141
Four step phase overcurrent Chapter 6
protection (POCM, 51_67) Current protection
U3P
TRIP
Harmonic harmRestrBlock
I3P Restraint
Element
enableDir
Mode Selection
enableStep1-4
DirectionalMode1-4
en05000740.vsd
A common setting for all steps, StPhaseSel, is used to specify the number of phase currents to
be high to enable operation. The settings can be chosen: 1 out of 3, 2 out of 3 or 3 out of 3.
The sampled analogue phase currents are pre-processed in a discrete Fourier filter (DFT) block.
From the fundamental frequency components of each phase current the RMS value of each
phase current is derived. These phase current values are fed to the TOC function. In a compara-
tor, for each phase current, the RMS values are compared to the set operation current value of
the function (I1>, I2>, I3> or I4>). If a phase current is larger than the set operation current a
signal from the comparator for this phase and step is set to true. This signal will, without delay,
activate the output signal Start for this phase/step, the Start signal common for all three phases
for this step and a common Start signal.
A harmonic restrain of the function can be chosen. A set 2nd harmonic current in relation to the
fundamental current is used. The 2nd harmonic current is taken from the pre-processing of the
phase currents and compared to a set restrain current level.
142
Four step phase overcurrent Chapter 6
protection (POCM, 51_67) Current protection
The function can use a directional option. The direction of the fault current is given as current
angle in relation to the voltage angle. The fault current and fault voltage for the directional func-
tion is dependent of the fault type. To enable directional measurement at close in faults, causing
low measured voltage, the polarization voltage is a combination of the apparent voltage (80%)
and a memory voltage (20%). The following combinations are used.
U refL1L 2 = U L1 − U L 2 I dirL1L 2 = I L1 − I L 2
U refL 2 L 3 = U L 2 − U L 3 I dirL 2 L 3 = I L 2 − I L 3
U refL 3 L1 = U L 3 − U L1 I dirL 3 L1 = I L 3 − I L1
U refL1 = U L1 I dirL1 = I L1
U refL 2 = U L 2 I dirL 2 = I L 2
U refL 3 = U L 3 I dirL 3 = I L 3
The directional setting is given as a characteristic angle AngleRCA for the function and an angle
window AngleRCA-maxFwdAng to AngleRCA+minFwdAng.
143
Four step phase overcurrent Chapter 6
protection (POCM, 51_67) Current protection
Reverse
Uref
RCA
ROA
ROA Forward
Idir
en05000745.vsd
The default value of AngleRCA is –65°. The parameters minFwdAng and maxFwdAng gives the
angle sector from AngleRCA for directional borders.
A minimum current for directional phase start current signal can be set: IminOpPhSel.
If no blockings are given the start signals will start the timers of the step. The time characteristic
for each step can be chosen as definite time delay or some type of inverse time characteristic. A
wide range of standardized inverse time characteristics is available. It is also possible to create
a tailor made time characteristic. The possibilities for inverse time characteristics are described
in chapter 21 "Time inverse characteristics".
Different types of reset time can be selected as described in chapter21 "Time inverse character-
istics".
There is also a possibility to activate a preset change (InMult, n= 1, 2, 3 or 4) of the set operation
current via a binary input (enable multiplier). In some applications the operation value needs to
be changed, for example due to changed network switching state. The function can be blocked
from the binary input BLOCK. The start signals from the function can be blocked from the bi-
nary input BLKST. The trip signals from the function can be blocked from the binary input
BLKTR.
144
Four step phase overcurrent Chapter 6
protection (POCM, 51_67) Current protection
TOC1-
PH4POCM
I3P TRIP
U3P TR1
BLOCK TR2
BLKTR TR3
BLKST1 TR4
BLKST2 TRL1
BLKST3 TRL2
BLKST4 TRL3
ENMULT1 TR1L1
ENMULT2 TR1L2
ENMULT3 TR1L3
ENMULT4 TR2L1
TR2L2
TR2L3
TR3L1
TR3L2
TR3L3
TR4L1
TR4L2
TR4L3
START
ST1
ST2
ST3
ST4
STL1
STL2
STL3
ST1L1
ST1L2
ST1L3
ST2L1
ST2L2
ST2L3
ST3L1
ST3L2
ST3L3
ST4L1
ST4L2
ST4L3
2NDHARM
DIRL1
DIRL2
DIRL3
en05000708.vsd
145
Four step phase overcurrent Chapter 6
protection (POCM, 51_67) Current protection
Table 81: Output signals for the PH4POCM_51_67 (TOC1-) function block
Signal Description
TRIP Trip
TR1 Common trip signal from step1
TR2 Common trip signal from step2
TR3 Common trip signal from step3
TR4 Common trip signal from step4
TRL1 Trip signal from phase L1
TRL2 Trip signal from phase L2
TRL3 Trip signal from phase L3
TR1L1 Trip signal from step1 phase L1
TR1L2 Trip signal from step1 phase L2
TR1L3 Trip signal from step1 phase L3
TR2L1 Trip signal from step2 phase L1
TR2L2 Trip signal from step2 phase L2
TR2L3 Trip signal from step2 phase L3
TR3L1 Trip signal from step3 phase L1
TR3L2 Trip signal from step3 phase L2
TR3L3 Trip signal from step3 phase L3
TR4L1 Trip signal from step4 phase L1
TR4L2 Trip signal from step4 phase L2
TR4L3 Trip signal from step4 phase L3
START General start signal
146
Four step phase overcurrent Chapter 6
protection (POCM, 51_67) Current protection
Signal Description
ST1 Common start signal from step1
ST2 Common start signal from step2
ST3 Common start signal from step3
ST4 Common start signal from step4
STL1 Start signal from phase L1
STL2 Start signal from phase L2
STL3 Start signal from phase L3
ST1L1 Start signal from step1 phase L1
ST1L2 Start signal from step1 phase L2
ST1L3 Start signal from step1 phase L3
ST2L1 Start signal from step2 phase L1
ST2L2 Start signal from step2 phase L2
ST2L3 Start signal from step2 phase L3
ST3L1 Start signal from step3 phase L1
ST3L2 Start signal from step3 phase L2
ST3L3 Start signal from step3 phase L3
ST4L1 Start signal from step4 phase L1
ST4L2 Start signal from step4 phase L2
ST4L3 Start signal from step4 phase L3
2NDHARM Block from second harmonic detection
DIRL1 Direction for phase1
DIRL2 Direction for phase2
DIRL3 Direction for phase3
147
Four step phase overcurrent Chapter 6
protection (POCM, 51_67) Current protection
148
Four step phase overcurrent Chapter 6
protection (POCM, 51_67) Current protection
149
Four step phase overcurrent Chapter 6
protection (POCM, 51_67) Current protection
150
Four step phase overcurrent Chapter 6
protection (POCM, 51_67) Current protection
151
Four step phase overcurrent Chapter 6
protection (POCM, 51_67) Current protection
152
Four step phase overcurrent Chapter 6
protection (POCM, 51_67) Current protection
153
Four step phase overcurrent Chapter 6
protection (POCM, 51_67) Current protection
154
Instantaneous residual overcurrent protection Chapter 6
(PIOC, 50N) Current protection
IN>>
3.1 Introduction
The single input overcurrent function has a low transient overreach and short tripping times to
allow use as a high set short circuit protection function, with the reach limited to less than typical
eighty percent of the power line at minimum source impedance. The function can be configured
to measure the residual current from the three phase current inputs or the current from a separate
current input.
There is also a possibility to activate a preset change of the set operation current via a binary
input (enable multiplier MULTEN). In some applications the operation value needs to be
changed, for example due to transformer inrush currents.
The function can be blocked from the binary input BLOCK. The trip signals from the function
can be blocked from the binary input BLKAR, that can be activated during single pole trip and
autoreclosing sequences.
155
Instantaneous residual overcurrent protection Chapter 6
(PIOC, 50N) Current protection
IEF1-
EFPIOC
I3P TRIP
BLOCK
BLKAR
MULTEN
en04000393.vsd
Table 85: Output signals for the EFPIOC_50N (IEF1-) function block
Signal Description
TRIP Trip signal
156
Instantaneous residual overcurrent protection Chapter 6
(PIOC, 50N) Current protection
157
Four step residual overcurrent Chapter 6
protection (PEFM, 51N/67N) Current protection
4
alt
4
4.1 Introduction
The four step single input overcurrent function has an inverse or definite time delay independent
for each step separately.
All IEC and ANSI time delayed characteristics are available together with an optional user de-
fined characteristic.
The function can be set to be directional, forward, reverse or non-directional independently for
each of the steps.
The function can be used as main protection for phase to earth faults.
The function can be used to provide a system back-up e.g. in the case of the primary protection
being out of service due to communication or voltage transformer circuit failure.
Directional operation can be combined together with corresponding communication blocks into
permissive or blocking teleprotection scheme. Current reversal and weak-end infeed functional-
ity are available as well.
The function can be configured to measure the residual current from the three phase current in-
puts or the current from a separate current input.
• The direction element, indicate earth current fault direction. The directional
check uses 3I0cos(ϕ-ϕRCA) for comparison
• The harmonic Restraint Blocking function
• 4 step over current function
158
Four step residual overcurrent Chapter 6
protection (PEFM, 51N/67N) Current protection
signal to
communication
scheme
Directional Check
Element
enableDir
harmRestrBlock
3I0 Harmonic
Restraint ≥1
Element
CB
pos
or cmd
enableDir
Mode
Selection enableStep1-4
DirectionalMode1-4
en05000741.vsd
The sampled analog residual current is pre-processed in a discrete Fourier filter (DFT) block.
From the fundamental frequency component the RMS value of the residual current is derived.
This residual current value is fed to the TEF function. In a comparator the RMS value is com-
pared to the set operation current value of the function (IN1>, IN2>, IN3> or IN4>). If the re-
sidual current is larger than the set operation current a signal from the comparator for this step
is set to true. This signal will, without delay, activate the output signal Start for this step and a
common Start signal.
A harmonic restrain of the function can be chosen. A set 2nd harmonic current in relation to the
fundamental current is used. The 2nd harmonic current is taken from the pre-processing of the
phase currents and compared to a set restrain current level.
159
Four step residual overcurrent Chapter 6
protection (PEFM, 51N/67N) Current protection
The function can use a directional option. A fault is in the forward direction if the residual cur-
rent component 3I0cos(ϕ-ϕRCA) is larger than a set level. The angle ϕ is the angle between the
residual current and the polarizing voltage (–3U0). The angle is defined positive when the resid-
ual current lags the reference voltage. The AngleRCA is the characteristic angle of the directional
function.
Operation
IN>Dir
en05000285.vsd
If no blockings are given the start signals will start the timers of the step. The time characteristic
for each step can be chosen as definite time delay or some type of inverse time characteristic. A
wide range of standardized inverse time characteristics is available. It is also possible to create
a tailor made time characteristic. The possibilities for inverse time characteristics are described
in Chapter 21 "Time inverse characteristics".
Different types of reset time can be selected as described in Chapter 21 "Time inverse charac-
teristics".
There is also a possibility to activate a preset change (INxMult, x = 1, 2, 3 or 4) of the set oper-
ation current via a binary input (enable multiplier MULTEN). In some applications the operation
value needs to be changed, for example due to changed network switching state.
In case of parallel transformers there is a risk of sympathetic inrush current. If one of the trans-
formers is in operation, and the parallel transformer is switched in, the asymmetric inrush cur-
rent of the switched in transformer will cause partial saturation of the transformer already in
service. This is called transferred saturation. The 2nd harmonic of the inrush currents of the two
transformers will be in phase opposition. The summation of the two currents will thus give a
small 2nd harmonic current. The residual fundamental current will however be significant. The
160
Four step residual overcurrent Chapter 6
protection (PEFM, 51N/67N) Current protection
inrush current of the transformer in service before the parallel transformer energizing, will be a
little delayed compared to the first transformer. Therefore we will have high 2nd harmonic cur-
rent initially. After a short period this current will however be small and the normal 2nd harmonic
blocking will reset. If the BlkParTransf function is activated the 2nd harmonic restrain signal will
latched as long as the residual current measured by the relay is larger than a selected step current
level.
The function can be blocked from the binary input BLOCK. The start signals from the function
can be blocked from the binary input BLKST. The trip signals from the function can be blocked
from the binary input BLKTR.
The SOFT function uses the start signal from step 2 or 3, which is set by parameter
Step3ForSOTF. The function is activated from change in circuit breaker position or from circuit
breaker close command pulse. The parameter ActivationSOTF can be set for activation of CB
position open change, CB position closed change or CB close command. In case of a residual
current start from step 2 or 3 (dependent on setting) the function will give a trip after a set delay
tSOTF. This delay is normally set to a short time (default 100 ms).
The undertime function uses the start signal from step 4. The function will normally be set to a
lower current level than the SOTF function. The undertime function can also be blocked by the
2nd harmonic restrain function. This enables high sensitivity even if power transformer inrush
currents can occur. The detection of unsymmetrical CB poles after switching is thus possible.
The function is activated from change in circuit breaker position or from circuit breaker close
and open command pulse. This is set by parameter ActUnderTime. The parameter ActUnder-
Time can be set for activation of CB position change or CB close/open command. In case of a
residual current start from step 4 the function will give a trip after a set delay tUnderTime. This
delay is normally set to a relatively short time (default 300 ms).
161
Four step residual overcurrent Chapter 6
protection (PEFM, 51N/67N) Current protection
T EF1-
EF4PEFM
BLOCK T RIP
I3P T RIN1
BLKT R T RIN2
U3P T RIN3
BLKST1 T RIN4
BLKST2 T RSOT F
BLKST3 START
BLKST4 ST IN1
ENMULT 1 ST IN2
ENMULT 2 ST IN3
ENMULT 3 ST IN4
ENMULT 4 ST SOT F
CBPOS STFW
CLOSECB STRV
OPENCB 2NDHARMD
en04000395.vsd
162
Four step residual overcurrent Chapter 6
protection (PEFM, 51N/67N) Current protection
Table 89: Output signals for the EF4PEFM_51N67N (TEF1-) function block
Signal Description
TRIP Trip
TRIN1 Trip signal from step 1
TRIN2 Trip signal from step 2
TRIN3 Trip signal from step 3
TRIN4 Trip signal from step 4
TRSOTF Trip signal from earth fault switch onto fault function
START General start signal
STIN1 Start signal step 1
STIN2 Start signal step 2
STIN3 Start signal step 3
STIN4 Start signal step 4
STSOTF Start signal from earth fault switch onto fault function
STFW Forward directional start signal
STRV Reverse directional start signal
2NDHARMD 2nd harmonic block signal
163
Four step residual overcurrent Chapter 6
protection (PEFM, 51N/67N) Current protection
164
Four step residual overcurrent Chapter 6
protection (PEFM, 51N/67N) Current protection
165
Four step residual overcurrent Chapter 6
protection (PEFM, 51N/67N) Current protection
166
Four step residual overcurrent Chapter 6
protection (PEFM, 51N/67N) Current protection
167
Four step residual overcurrent Chapter 6
protection (PEFM, 51N/67N) Current protection
168
Four step residual overcurrent Chapter 6
protection (PEFM, 51N/67N) Current protection
169
Four step residual overcurrent Chapter 6
protection (PEFM, 51N/67N) Current protection
170
Thermal overload protection, one time Chapter 6
constant (PTTR, 26) Current protection
5.1 Introduction
The increasing utilizing of the power system closer to the thermal limits have generated a need
of a thermal overload function also for power lines.
A thermal overload will often not be detected by other protection functions and the introduction
of the thermal overload function can allow the protected circuit to operate closer to the thermal
limits.
The three phase current measuring function has an I2t characteristic with settable time constant
and a thermal memory.
An alarm level gives early warning to allow operators to take action well before the line will be
tripped.
From the largest of the three phase currents a final temperature is calculated according to the
expression:
2
⎛ I ⎞
Θ final =⎜ ⎟⎟ ⋅ Tref
⎜ I ref
⎝ ⎠
(Equation 23)
where:
I is the largest phase current,
Iref is a given reference current and
Tref is steady state temperature corresponding to Iref
171
Thermal overload protection, one time Chapter 6
constant (PTTR, 26) Current protection
The ambient temperature is added to the calculated final temperature. If this temperature is larg-
er than the set operate temperature level a start output signal START is activated.
⎛ Δt
⎞
Θn = Θn −1 + ( Θ final − Θ n−1 ) ⋅ ⎜ 1 − e τ ⎟
−
⎝ ⎠
(Equation 24)
where:
Θn is the calculated present temperature,
Θn-1 is the calculated temperature at the previous time step,
Θfinal is the calculated final temperature with the actual current,
Δt is the time step between calculation of the actual temperature and
τ is the set thermal time constant for the protected device (line or cable)
The actual temperature of the protected component (line or cable) is calculated by adding the
ambient temperature to the calculated temperature, as shown above. The ambient temperature
can be given a constant value. The calculated component temperature can be monitored as it is
exported from the function as a real figure.
When the component temperature reaches the set alarm level AlarmTemp the output signal
ALARM is set. When the component temperature reaches the set trip level TripTemp the output
signal TRIP is set.
There is also a calculation of the present time to operation with the present current. This calcu-
lation is only performed if the final temperature is calculated to be above the operation temper-
ature:
⎛Θ − Θ operate ⎞
toperate = −τ ⋅ ln ⎜ final
⎜ Θ final − Θ n ⎟⎟
⎝ ⎠
(Equation 25)
The calculated time to trip can be monitored as it is exported from the function as a real figure
TTRIP.
After a trip, caused by the thermal overload protection function, there can be a lockout to recon-
nect the tripped circuit. The output lockout signal LOCKOUT is activated when the device tem-
perature is above the set lockout release temperature setting ReclTemp.
The time to lockout release is calculated, i.e. a calculation of the cooling time to a set value. The
thermal content of the function can be reset with input RESET.
172
Thermal overload protection, one time Chapter 6
constant (PTTR, 26) Current protection
⎛Θ − Θlockout _ release ⎞
tlockout _ release = −τ ⋅ ln ⎜ final ⎟⎟
⎜ Θ − Θ
⎝ final n ⎠
(Equation 26)
Here the final temperature is equal to the set or measured ambient temperature. The calculated
component temperature can be monitored as it is exported from the function as a real figure.
In some applications the measured current can involve a number of parallel lines. This is often
used for cable lines where one bay connects several parallel cables. By setting the parameter IM-
ult to the number of parallel lines (cables) the actual current on one line is used in the protection
algorithm. To activate this option the input ENMULT must be activated.
The function has a reset input: RESET. By activating this input the calculated temperature is re-
set to its default initial value. This is useful during testing when secondary injected current has
given a calculated “false” temperature level.
173
Thermal overload protection, one time Chapter 6
constant (PTTR, 26) Current protection
actual temperature
Calculation
of actual
temperature
trip signal
Actual Temp
> TripTemp initiate lockout
Calculation
of time to time to reset of lockout
reset of
lockout
en05000736.vsd
Figure 84: Functional overview of THL
174
Thermal overload protection, one time Chapter 6
constant (PTTR, 26) Current protection
THL1-
LPTTR_26
I3P TRIP
BLOCK START
ENMULT ALARM
RESET LOCKOUT
en04000396.vsd
Table 93: Output signals for the LPTTR_26 (THL1-) function block
Signal Description
TRIP Trip
START Start Signal
ALARM Alarm signal
LOCKOUT Lockout signal
175
Thermal overload protection, one time Chapter 6
constant (PTTR, 26) Current protection
176
Breaker failure protection (RBRF, 50BF) Chapter 6
Current protection
6.1 Introduction
The circuit breaker failure function ensures fast back-up tripping of surrounding breakers. The
breaker failure protection operation can be current based, contact based or adaptive combination
between these two principles.
A current check with extremely short reset time is used as a check criteria to achieve a high se-
curity against unnecessary operation.
The breaker failure protection can be single- or three-phase started to allow use with single phase
tripping applications. For the three-phase version of the breaker failure protection the current
criteria can be set to operate only if two out of four e.g. two phases or one phase plus the residual
current starts. This gives a higher security to the back-up trip command.
The function can be programmed to give a single- or three phase re-trip of the own breaker to
avoid unnecessary tripping of surrounding breakers at an incorrect starting due to mistakes dur-
ing testing.
The start signal can be phase selective or general (for all three phases). Phase selective start sig-
nals enable single pole re-trip function. This means that a second attempt to open the breaker is
done. The re-trip attempt can be made after a set time delay. For transmission lines single pole
trip and autoreclosing is often used. The re-trip function can be phase selective if it is initiated
from phase selective line protection. The re-trip function can be done with or without current
check. With the current check the re-trip is only performed if the current through the circuit
breaker is larger than the operate current level.
The start signal can be an internal or external protection trip signal. If this start signal gets high
at the same time as current is detected through the circuit breaker, the back-up trip timer is start-
ed. If the opening of the breaker is successful this is detected by the function, both by detection
of low RMS current and by a special adapted algorithm. The special algorithm enables a very
fast detection of successful breaker opening, i.e. fast resetting of the current measurement. If the
current detection has not detected breaker opening before the back-up timer has run its time a
back-up trip is initiated. There is also a possibility to have a second back-up trip output activated
after an added settable time after the first back-up trip.
177
Breaker failure protection (RBRF, 50BF) Chapter 6
Current protection
• The minimum length of the re-trip pulse, the back-up trip pulse and the back-up
trip pulse 2 are settable. The re-trip pulse, the back-up trip pulse and the back-up
trip pulse 2 will however sustain as long as there is an indication of closed break-
er.
• In the current detection it is possible to use three different options: 1 out of 3
where it is sufficient to detect failure to open (high current) in one pole, 1 out of
4 where it is sufficient to detect failure to open (high current) in one pole or high
residual current and 2 out of 4 where at least two current (phase current and/or
residual current) shall be high for breaker failure detection.
• The current detection for the residual current can be set different from the setting
of phase current detection.
• It is possible to have different re-trip time delays for single phase faults and for
multi-phase faults.
• The back-up trip can be made without current check. It is possible to have this
option activated for small load currents only.
• It is possible to have instantaneous back-up trip function if a signal is high if the
circuit breaker is insufficient to clear faults, for example at low gas pressure.
Current
AND
BLOCK
Current & t1 tp
STIL1
Contact t TRRETL1
AND AND
START
OR
STL1
OR
TRRET
OR
AND AND
CBCLDL1
Contact
L2 L3
en05000832.vsd
Figure 86: Simplified logic scheme of the retrip function
178
Breaker failure protection (RBRF, 50BF) Chapter 6
Current protection
179
Breaker failure protection (RBRF, 50BF) Chapter 6
Current protection
Internal logical signals STIL1, STIL2, STIL3 have logical value 1 when current in respective
phase has magnitude larger than setting parameter IP>.
Internal logical signal STN has logical value 1 when neutral current has magnitude larger than
setting parameter IN>.
t2
1 of 4 t
OR
t3 tp
t TRBU2
2 of 3
AND
CBALARM
CBFLT CBALARM
t
en06000223.vsd
Figure 88: Simplified logic scheme of the back-up trip function
BFP1-
CCRBRF
I3P T RBU
BLOCK T RBU2
START T RRET
STL1 T RRET L1
STL2 T RRET L2
STL3 T RRET L3
CBCLDL1 CBALARM
CBCLDL2
CBCLDL3
CBFLT
en04000397.vsd
180
Breaker failure protection (RBRF, 50BF) Chapter 6
Current protection
Table 97: Output signals for the CCRBRF_50BF (BFP1-) function block
Signal Description
TRBU Back-up trip by breaker failure protection function
TRBU2 Second back-up trip by breaker failure protection function
TRRET Retrip by breaker failure protection function
TRRETL1 Retrip by breaker failure protection function phase L1
TRRETL2 Retrip by breaker failure protection function phase L2
TRRETL3 Retrip by breaker failure protection function phase L3
CBALARM Alarm for faulty circuit breaker
181
Breaker failure protection (RBRF, 50BF) Chapter 6
Current protection
182
Stub protection (PTOC, 50STB) Chapter 6
Current protection
7.1 Introduction
When a power line is taken out of service for maintenance and the line disconnector is opened
in multi-breaker arrangements the voltage transformers will mostly be outside on the discon-
nected part. The primary line distance protection will thus not be able to operate and must be
blocked.
The stub protection covers the zone between the current transformers and the open disconnector.
The three phase instantaneous overcurrent function is released from a NO (b) auxiliary contact
on the line disconnector.
183
Stub protection (PTOC, 50STB) Chapter 6
Current protection
BLOCK
TRIP
STIL1 AND
STIL2 OR
STIL3
RELEASE
en05000731.vsd
STB1-
STBPTOC_50STB
I3P TRIP
BLOCK START
BLKTR
RELEASE
en05000678.vsd
184
Stub protection (PTOC, 50STB) Chapter 6
Current protection
Table 101: Output signals for the STBPTOC_50STB (STB1-) function block
Signal Description
TRIP Trip
START General start
185
Pole discordance protection (RPLD, 52PD) Chapter 6
Current protection
8.1 Introduction
Single pole operated circuit breakers can due to electrical or mechanical failures end up with the
different poles in different positions (close-open). This can cause negative and zero sequence
currents which gives thermal stress on rotating machines and can cause unwanted operation of
zero sequence current functions.
Normally the own breaker is tripped to correct the positions. If the situation consists the remote
end can be intertripped to clear the unsymmetrical load situation.
The pole discordance function operates based on information from auxiliary contacts of the cir-
cuit breaker for the three phases with additional criteria from unsymmetrical phase current when
required.
C.B.
en05000287.vsd
186
Pole discordance protection (RPLD, 52PD) Chapter 6
Current protection
This single binary signal is connected to a binary input of the IED. The appearance of this signal
will start a timer that will give a trip signal after the set delay.
There is also a possibility to connect all phase selective auxiliary contacts (phase contact open
and phase contact closed) to binary inputs of the IED. This is shown in figure 93
C.B.
+
poleOneOpened from C.B.
en05000288.vsd
In this case the logic is realized within the function. If the inputs are indicating pole discordance
the trip timer is started. This timer will give a trip signal after the set delay.
Pole discordance can also be detected by means of phase selective current measurement. The
sampled analogue phase currents are pre-processed in a discrete Fourier filter (DFT) block.
From the fundamental frequency components of each phase current the RMS value of each
phase current is derived. These phase current values are fed to the PD function. The difference
between the smallest and the largest phase current is derived. If this difference is larger than a
set ratio the trip timer is started. This timer will give a trip signal after the set delay. The current
based pole discordance function can be set to be active either continuously or only directly in
connection to breaker open or close command.
The function also has a binary input that can be configured from the autoreclosing function, so
that the pole discordance function can be blocked during sequences with a single pole open if
single pole autoreclosing is used.
The simplified block diagram of the current and contact based pole discordance function is
shown in figure 94.
187
Pole discordance protection (RPLD, 52PD) Chapter 6
Current protection
BLOCK
OR
BLKDBYAR
PolPosAuxCont
AND
POLE1OPN
POLE1CL
POLE2OPN
Discordance
POLE2CL
detection
POLE3OPN
POLE3CL t 150 ms
t TRIP
AND
OR
PolPosAuxCont
AND
EXTPDIND
CLOSECMD t+200 ms
OR
OPENCMD
AND
Unsymmetry current
detection
en05000747.vsd
Figure 94: Simplified block diagram of pole discordance function - contact and current based
• The terminal is in TEST mode (TEST-ACTIVE is high) and the function has
been blocked from the HMI (BlockPD=Yes)
• The input signal BLOCK is high
• The input signal BLKDBYAR is high
The BLOCK signal is a general purpose blocking signal of the pole discordance function. It can
be connected to a binary input of the terminal in order to receive a block command from external
devices or can be software connected to other internal functions of the terminal itself in order to
receive a block command from internal functions. Through OR gate it can be connected to both
binary inputs and internal function outputs.
The BLKDBYAR signal blocks the pole discordance operation when a single phase autoreclos-
ing cycle is in progress. It can be connected to the output signal AR01-1PT1 if the autoreclosing
function is integrated in the terminal; if the autoreclosing function is an external device, then
BLKDBYAR has to be connected to a binary input of the terminal and this binary input is con-
nected to a signalization “1phase autoreclosing in progress” from the external autoreclosing de-
vice.
If the pole discordance function is enabled, then two different criteria will generate a trip signal
TRIP:
188
Pole discordance protection (RPLD, 52PD) Chapter 6
Current protection
• any phase current is lower than 80% of the highest current in the remaining two
phases
• the highest phase current is greater than 10% of the rated current
If these conditions are true, an unsymmetrical condition is detected and the internal signal INPS
is turned high. This detection is enabled to generate a trip after a set time delay t (0-60 s) if the
detection occurs in the next 200 ms after the circuit breaker has received a command to open trip
or close and if the unbalance persists. The 200 ms limitation is for avoiding unwanted operation
during unsymmetrical load conditions.
The pole discordance function is informed that a trip or close command has been given to the
circuit breaker through the inputs CLOSECMD (for closing command information) and
OPENCMD (for opening command information). These inputs can be connected to terminal bi-
nary inputs if the information are generated from the field (i.e. from auxiliary contacts of the
close and open push buttons) or may be software connected to the outputs of other integrated
functions (i.e. close command from a control function or a general trip from integrated protec-
tions).
PD01-
CCRPLD
I3P T RIP
BLOCK ST ART
BLKDBYAR
CLOSECMD
OPENCMD
EXT PDIND
POLE1OPN
POLE1CL
POLE2OPN
POLE2CL
POLE3OPN
POLE3CL
en05000321.vsd
189
Pole discordance protection (RPLD, 52PD) Chapter 6
Current protection
Table 105: Output signals for the CCRPLD_52PD (PD01-) function block
Signal Description
TRIP Trip signal to CB
START Trip condition TRUE, waiting for time delay
190
Pole discordance protection (RPLD, 52PD) Chapter 6
Current protection
191
Pole discordance protection (RPLD, 52PD) Chapter 6
Current protection
192
About this chapter Chapter 7
Voltage protection
193
Two step undervoltage protection (PUVM, 27) Chapter 7
Voltage protection
1.1 Introduction
Undervoltages can occur in the power system during faults or abnormal conditions. The function
can be used to open circuit breakers to prepare for system restoration at power outages or as
long-time delayed back-up to primary protection.
The function has two voltage steps, each with inverse or definite time delay.
The voltage related settings are made in percent of the base voltage, which is set in kV,
phase-phase.
The undervoltage protection function measures the phase to earth voltages, if the voltage trans-
former is connected phase to earth to the analogue voltage inputs. The setting of the analogue
inputs are given as primary phase to phase voltage and secondary phase to phase voltage. The
function will operate if the phase to earth voltage gets lover than the set percentage of the phase
to earth voltage corresponding to the set base voltage UBase. This means operation for phase to
earth voltage under:
194
Two step undervoltage protection (PUVM, 27) Chapter 7
Voltage protection
If the voltage transformer is connected phase to phase to the analogue input, the setting of the
analogue inputs are given as primary phase to phase voltage and secondary phase to phase volt-
age divided by √ 3. The function will operate if the phase to phase voltage gets lover than the set
percentage of the phase to phase voltage corresponding to the set base voltage UBase.
To avoid oscillations of the output start signal, a hysteresis has been included.
k
t=
⎛ U < −U ⎞
⎜ ⎟
⎝ U< ⎠
(Equation 28)
k ⋅ 480
t= + 0.055
U < −U
2.0
⎛ ⎞
⎜ 32 ⋅ − 0.5 ⎟
⎝ U< ⎠
(Equation 29)
⎡ ⎤
⎢ ⎥
⎢ k⋅A ⎥+D
t=
⎢⎛ U < −U ⎞
p
⎥
⎢⎜ B ⋅ −C⎟ ⎥
⎣⎝ U< ⎠ ⎦
(Equation 30)
195
Two step undervoltage protection (PUVM, 27) Chapter 7
Voltage protection
When the denominator in the expression is equal to zero the time delay will be infinity. There
will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate
for this phenomenon. In the voltage interval U< down to U< *(1.0 – CrvSatn/100) the used volt-
age will be: U< *(1.0 – CrvSatn/100). If the programmable curve is used this parameter must be
calculated so that:
CrvSatn
B⋅ −C > 0
100
(Equation 31)
The lowest phase voltage is always used for the inverse time delay integration, see figure 96.
The details of the different inverse time characteristics are shown in section 3 "Inverse charac-
teristics".
Voltage
UL1
UL2
UL3
IDMT Voltage
Time
en05000009.vsd
Figure 96: Voltage used for the inverse time characteristic integration
Trip signal issuing requires that the undervoltage condition continues for at least the user set
time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by
some special voltage level dependent time curves for the inverse time mode (IDMT). If the start
condition, with respect to the measured voltage ceases during the delay time, and is not fulfilled
again within a user defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and
tIReset2 for the inverse time) the corresponding start output is reset. Here it should be noted that
after leaving the hysteresis area, the start condition must be fulfilled again and it is not sufficient
for the signal to only return back to the hysteresis area. Note that for the undervoltage function
196
Two step undervoltage protection (PUVM, 27) Chapter 7
Voltage protection
the IDMT reset time is constant and does not depend on the voltage fluctuations during the
drop-off period. However, there are three ways to reset the timer, either the timer is reset instan-
taneously, or the timer value is frozen during the reset time, or the timer value is linearly de-
creased during the reset time. See figure 97 and figure 98.
197
Two step undervoltage protection (PUVM, 27) Chapter 7
Voltage protection
tReset
tReset 1
Voltage 1 Measured
START Voltage
Hysteresis
TRIP
U1<
Time
START t1
TRIP
Time
Integrator Froozen Timer
t1
Time
Instantaneous
Linear Decrease
Reset en05000010.vsd
Figure 97: Voltage profile not causing a reset of the start signal for step 1, and definite time
delay
198
Two step undervoltage protection (PUVM, 27) Chapter 7
Voltage protection
tReset1
Voltage
tReset1
START
START
Hysteresis Measured Voltage
TRIP
U1<
Time
START t1
TRIP
Time Integrator
Froozen Timer
t1
Time
Instantaneous
Linear Decrease
Reset en05000011.vsd
Figure 98: Voltage profile causing a reset of the start signal for step 1, and definite time delay
1.2.3 Blocking
The undervoltage function can be partially or totally blocked, by binary input signals or by pa-
rameter settings, where:
199
Two step undervoltage protection (PUVM, 27) Chapter 7
Voltage protection
If the measured voltage level decreases below the setting of IntBlkStVal1, either the trip output
of step 1, or both the trip and the start outputs of step 1, are blocked. The characteristic of the
blocking is set by the IntBlkSel1 parameter. This internal blocking can also be set to "off" result-
ing in no voltage based blocking. Corresponding settings and functionality are valid also for step
2.
In case of disconnection of the high voltage component the measured voltage will get very low.
The event will start both the under voltage function and the blocking function, as seen in figure
99. The delay of the blocking function must be set less than the time delay of under voltage func-
tion.
200
Two step undervoltage protection (PUVM, 27) Chapter 7
Voltage protection
U Disconnection
Normal voltage
U1<
U2<
tBlkUV1 <
t1,t1Min
IntBlkStVal1
tBlkUV2 <
t2,t2Min
IntBlkStVal2
Time
Block step 1
Block step 2
en05000466.vsd
1.2.4 Design
The voltage measuring elements continuously measure the phase-to-neutral voltages in all three
phases. Recursive Fourier filters filter the input voltage signals. The phase voltages are individ-
ually compared to the set value, and the lowest phase voltage is used for the inverse time char-
acteristic integration. A special logic is included to achieve the "1 out of 3", "2 out of 3" and "3
out of 3" criteria to fulfill the start condition. The design of the TimeUnderVoltage function is
schematically described in figure 100.
201
Two step undervoltage protection (PUVM, 27) Chapter 7
Voltage protection
Step 1
Time integrator TR1L2
MinVoltSelect t1 TRIP
or tReset1
ResetTypeCrv1 TR1L3
TR1
OR
Comparator ST2L1
UL1 < U2< Phase 1
Voltage Phase
Selector ST2L2
Comparator OpMode2 Phase 2
UL2 < U2< 1 out of 3
2 outof 3 ST2L3
Phase 3 Start
Comparator 3 out of 3
&
UL3 < U2< Trip ST2
Output OR
Step 2
Time integrator TR2L2
MinVoltSelect t2 TRIP
or tReset2
ResetTypeCrv2 TR2L3
TR2
OR
OR START
TRIP
OR
en05000012.vsd
202
Two step undervoltage protection (PUVM, 27) Chapter 7
Voltage protection
T UV1-
PH2PUVM
U3P T RIP
BLOCK TR1
BLKT R1 T R1L1
BLKST1 T R1L2
BLKT R2 T R1L3
BLKST2 TR2
T R2L1
T R2L2
T R2L3
START
ST1
ST1L1
ST1L2
ST1L3
ST2
ST2L1
ST2L2
ST2L3
en05000330.vsd
Table 109: Output signals for the PH2PUVM_27 (TUV1-) function block
Signal Description
TRIP Operate signal
TR1 Operate signal for step 1
TR1L1 Operate signal for phase 1, step 1
TR1L2 Operate signal for phase 2, step 1
TR1L3 Operate signal for phase 3, step 1
TR2 Operate signal for step 2
TR2L1 Operate signal for phase 1, step 2
TR2L2 Operate signal for phase 2, step 2
TR2L3 Operate signal for phase 3, step 2
203
Two step undervoltage protection (PUVM, 27) Chapter 7
Voltage protection
Signal Description
START Start signal
ST1 Start signal for step1
ST1L1 Start signal for phase 1, step 1
ST1L2 Start signal for phase 2, step 1
ST1L3 Start signal for phase 3, step 1
ST2 Start signal for step 2
ST2L1 Start signal for phase 1, step 2
ST2L2 Start signal for phase 2, step 2
ST2L3 Start signal for phase 3, step 2
204
Two step undervoltage protection (PUVM, 27) Chapter 7
Voltage protection
205
Two step undervoltage protection (PUVM, 27) Chapter 7
Voltage protection
206
Two step undervoltage protection (PUVM, 27) Chapter 7
Voltage protection
207
Two step overvoltage protection (POVM, 59) Chapter 7
Voltage protection
2.1 Introduction
Overvoltages will occur in the power system during abnormal conditions such as sudden power
loss, tap changer regulating failures, open line ends on long lines.
The function can be used as open line end detector, normally then combined with directional re-
active over-power function or as system voltage supervision, normally then giving alarm only
or switching in reactors or switch out capacitor banks to control the voltage.
The function has two voltage steps, each of them with inverse or definite time delayed.
The overvoltage function has an extremely high reset ratio to allow setting close to system ser-
vice voltage.
The voltage related settings are made in percent of the base voltage, which is set in kV,
phase-phase.
The overvoltage protection function measures the phase to earth voltages, if the voltage trans-
former is connected phase to earth to the analogue voltage inputs. The setting of the analogue
inputs are given as primary phase to phase voltage and secondary phase to phase voltage. The
function will operate if the phase to earth voltage gets higher than the set percentage of the phase
to earth voltage corresponding to the set base voltage UBase. This means operation for phase to
earth voltage over
208
Two step overvoltage protection (POVM, 59) Chapter 7
Voltage protection
If the voltage transformer is connected phase to phase to the analogue input, the setting of the
analogue inputs are given as primary phase to phase voltage and secondary phase to phase volt-
age divided by √3. The function will operate if the phase to phase voltage gets higher than the
set percentage of the phase to phase voltage corresponding to the set base voltage UBase.
To avoid oscillations of the output start signal, a hysteresis has been included.
k
t=
⎛ U < −U ⎞
⎜ ⎟
⎝ U< ⎠
(Equation 33)
k ⋅ 480
t=
U −U >
2.0
⎛ ⎞
⎜ 32 ⋅ − 0.5 ⎟ − 0.035
⎝ U> ⎠
(Equation 34)
k ⋅ 480
t=
U −U >
3.0
⎛ ⎞
⎜ 32 ⋅ − 0.5 ⎟ − 0.035
⎝ U > ⎠
(Equation 35)
209
Two step overvoltage protection (POVM, 59) Chapter 7
Voltage protection
k⋅A
t= +D
⎛ U −U >
p
⎞
⎜B⋅ −C⎟
⎝ U> ⎠
(Equation 36)
When the denominator in the expression is equal to zero the time delay will be infinity. There
will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate
for this phenomenon. In the voltage interval U< down to U< *(1.0 – CrvSatn/100) the used volt-
age will be: U< *(1.0 – CrvSatn/100). If the programmable curve is used this parameter must be
calculated so that:
CrvSatn
B⋅ −C > 0
100
(Equation 37)
The highest phase voltage is always used for the inverse time delay integration, see figure 102.
The details of the different inverse time characteristics are shown in section 3 "Inverse charac-
teristics".
Voltage
IDMT Voltage
UL1
UL2
UL3
Time
en05000016.vsd
Figure 102: Voltage used for the inverse time characteristic integration
210
Two step overvoltage protection (POVM, 59) Chapter 7
Voltage protection
Trip signal issuing requires that the overvoltage condition continues for at least the user set time
delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by se-
lected voltage level dependent time curves for the inverse time mode (IDMT). If the start con-
dition, with respect to the measured voltage ceases during the delay time, and is not fulfilled
again within a user defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and
tIReset2 for the inverse time) the corresponding start output is reset, after that the defined reset
time has elapsed. Here it should be noted that after leaving the hysteresis area, the start condition
must be fulfilled again and it is not sufficient for the signal to only return back to the hysteresis
area. It is also remarkable that for the overvoltage function the IDMT reset time is constant and
does not depend on the voltage fluctuations during the drop-off period. However, there are three
ways to reset the timer, either the timer is reset instantaneously, or the timer value is frozen dur-
ing the reset time, or the timer value is linearly decreased during the reset time. See figure 103
and figure 104.
211
Two step overvoltage protection (POVM, 59) Chapter 7
Voltage protection
tReset1
tReset1
Voltage
START
TRIP
U1>
Hysteresis
Measured Voltage
Time
START t1
TRIP
Time Integrator
Linear Decrease
Froozen Timer
t1
Instantaneous Time
Reset
en05000017.vsd
Figure 103: Voltage profile note causing a reset of the start signal for step 1, and definite time
delay
212
Two step overvoltage protection (POVM, 59) Chapter 7
Voltage protection
tReset1
Voltage tReset1
START
START TRIP
Hysteresis
U1>
Measured Voltage
Time
START t1
TRIP
Time Integrator
Froozen Timer
t1
Time
Instantaneous
Linear Decrease
Reset en05000018.vsd
Figure 104: Voltage profile causing a reset of the start signal for step 1, and definite time delay
2.2.3 Blocking
The overvoltage function can be partially or totally blocked, by binary input signals where:
213
Two step overvoltage protection (POVM, 59) Chapter 7
Voltage protection
2.2.4 Design
The voltage measuring elements continuously measure the phase-to-neutral voltages in all three
phases. Recursive Fourier filters filter the input voltage signals. The phase voltages are individ-
ually compared to the set value, and the highest phase voltage is used for the inverse time char-
acteristic integration. A special logic is included to achieve the "1 out of 3", "2 out of 3" and "3
out of 3" criteria to fulfill the start condition. The design of the TimeOverVoltage function is
schematically described in figure 105.
214
Two step overvoltage protection (POVM, 59) Chapter 7
Voltage protection
OR TR1
Comparator ST2L1
UL1 > U2> Phase 1
Voltage Phase
Selector ST2L2
Comparator OpMode2 Phase 2
UL2 > U2> 1 out of 3
2 outof 3 ST2L3
Phase 3 Start
3 out of 3
Comparator &
UL3 > U2> Trip ST2
OR
Output
START Logic TR2L1
Step 2
Time integrator TR2L2
MaxVoltSelect t2 TRIP
or tReset2
ResetTypeCrv2 TR2L3
TR2
OR
START
OR
TRIP
OR
en05000013.vsd
215
Two step overvoltage protection (POVM, 59) Chapter 7
Voltage protection
T OV1-
PH2POVM
U3P T RIP
BLOCK TR1
BLKT R1 T R1L1
BLKST1 T R1L2
BLKT R2 T R1L3
BLKST2 TR2
T R2L1
T R2L2
T R2L3
ST ART
ST1
ST1L1
ST1L2
ST1L3
ST2
ST2L1
ST2L2
ST2L3
en05000328.vsd
Table 113: Output signals for the PH2POVM_59 (TOV1-) function block
Signal Description
TRIP Operate signal
TR1 Operate signal for step 1
TR1L1 Operate signal from phase 1, step 1
TR1L2 Operate signal from phase 2, step 1
TR1L3 Operate signal from phase 3, step 1
TR2 Operate signal for step 2
TR2L1 Operate signal from phase 1, step 2
TR2L2 Operate signal from phase 2, step 2
TR2L3 Operate signal from phase 3, step 2
216
Two step overvoltage protection (POVM, 59) Chapter 7
Voltage protection
Signal Description
START Start signal
ST1 Start signal for step1
ST1L1 Start signal from phase 1, step 1
ST1L2 Start signal from phase 2, step 1
ST1L3 Start signal from phase 3, step 1
ST2 Start signal for step 2
ST2L1 Start signal from phase 1, step 2
ST2L2 Start signal from phase 2, step 2
ST2L3 Start signal from phase 3, step 2
217
Two step overvoltage protection (POVM, 59) Chapter 7
Voltage protection
218
Two step overvoltage protection (POVM, 59) Chapter 7
Voltage protection
219
Two step residual overvoltage Chapter 7
protection (POVM, 59N) Voltage protection
3.1 Introduction
Residual voltages will occur in the power system during earth faults.
The function can be configured to calculate the residual voltage from the three phase voltage in-
put transformers or from a single phase voltage input transformer fed from an open delta or neu-
tral point voltage transformer.
The function has two voltage steps, each with inverse or definite time delayed.
The voltage related settings are made in percent of the base voltage, which is set in kV,
phase-phase.
To avoid oscillations of the output start signal, a hysteresis has been included.
220
Two step residual overvoltage Chapter 7
protection (POVM, 59N) Voltage protection
k
t=
⎛ U < −U ⎞
⎜ ⎟
⎝ U< ⎠
(Equation 38)
k ⋅ 480
t=
U −U >
2.0
⎛ ⎞
⎜ 32 ⋅ − 0.5 ⎟ − 0.035
⎝ U> ⎠
(Equation 39)
k ⋅ 480
t=
U −U >
3.0
⎛ ⎞
⎜ 32 ⋅ − 0.5 ⎟ − 0.035
⎝ U> ⎠
(Equation 40)
k⋅A
t= +D
⎛ U −U >
p
⎞
⎜B⋅ −C⎟
⎝ U> ⎠
(Equation 41)
When the denominator in the expression is equal to zero the time delay will be infinity. There
will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate
for this phenomenon. In the voltage interval U> up to U> *(1.0 + CrvSatn/100) the used voltage
will be: U> *(1.0 + CrvSatn/100). If the programmable curve is used this parameter must be cal-
culated so that:
CrvSatn
B⋅ −C > 0
100
(Equation 42)
221
Two step residual overvoltage Chapter 7
protection (POVM, 59N) Voltage protection
The details of the different inverse time characteristics are shown in chapter 3 "Inverse charac-
teristics".
Trip signal issuing requires that the residual overvoltage condition continues for at least the user
set time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and
by some special voltage level dependent time curves for the inverse time mode (IDMT). If the
start condition, with respect to the measured voltage ceases during the delay time, and is not ful-
filled again within a user defined reset time (tReset1 and tReset2 for the definite time and
tIReset1 and tIReset2 for the inverse time) the corresponding start output is reset, after that the
defined reset time has elapsed. Here it should be noted that after leaving the hysteresis area, the
start condition must be fulfilled again and it is not sufficient for the signal to only return back to
the hysteresis area. It is also remarkable that for the overvoltage function the IDMT reset time
is constant and does not depend on the voltage fluctuations during the drop-off period. However,
there are three ways to reset the timer, either the timer is reset instantaneously, or the timer value
is frozen during the reset time, or the timer value is linearly decreased during the reset time. See
figure 107 and figure 108.
222
Two step residual overvoltage Chapter 7
protection (POVM, 59N) Voltage protection
tReset
1
tReset1
Voltage
START
TRIP
U1>
Hysteresis
Measured
Voltage
Time
START t1
TRIP
Time
Integrator Linear Decrease
Froozen Timer
t1
Instantaneous Time
Reset en05000019.vsd
Figure 107: Voltage profile not causing a reset of the start signal for step 1, and definite time
delay
223
Two step residual overvoltage Chapter 7
protection (POVM, 59N) Voltage protection
tReset1
Voltage tReset1
START TRIP
START
Hysteresis
U1>
Measured Voltage
Time
START t1
TRIP
Time Integrator
Froozen Timer
t1
Time
Instantaneous
Linear Decrease en05000020.vsd
Reset
Figure 108: Voltage profile causing a reset of the start signal for step 1, and definite time delay
3.2.3 Blocking
The residual overvoltage function can be partially or totally blocked, by binary input signals
where:
224
Two step residual overvoltage Chapter 7
protection (POVM, 59N) Voltage protection
3.2.4 Design
The voltage measuring elements continuously measure the residual voltage. Recursive Fourier
filters filter the input voltage signal. The single input voltage is compared to the set value, and
is also used for the inverse time characteristic integration. The design of the TRV function is
schematically described in figure 109.
ST2
Comparator Phase 1
UN > U2> TR2
Start
START &
Trip START
Output OR
Time integrator
Logic
t2 TRIP
tReset2
Step 2
ResetTypeCrv2 TRIP
OR
en05000748.vsd
225
Two step residual overvoltage Chapter 7
protection (POVM, 59N) Voltage protection
TRV1-
R2POVM
U3P TRIP
BLOCK TR1
BLKTR1 TR2
BLKST1 START
BLKTR2 ST1
BLKST2 ST2
en05000327.vsd
Table 117: Output signals for the R2POVM_59N (TRV1-) function block
Signal Description
TRIP Operate signal
TR1 Operate signal for step 1
TR2 Operate signal for step 2
START Start signal
ST1 Start signal for step 1
ST2 Start signal for step 2
226
Two step residual overvoltage Chapter 7
protection (POVM, 59N) Voltage protection
227
Two step residual overvoltage Chapter 7
protection (POVM, 59N) Voltage protection
228
Two step residual overvoltage Chapter 7
protection (POVM, 59N) Voltage protection
229
Two step residual overvoltage Chapter 7
protection (POVM, 59N) Voltage protection
230
About this chapter Chapter 8
Frequency protection
Chapter 8 Frequency
protection
231
Underfrequency protection (PTUF, 81) Chapter 8
Frequency protection
1.1 Introduction
Underfrequency occurs as a result of lack of generation in the network.
The function can be used for load shedding systems, remedial action schemes, gas turbine
start-up etc.
The function is provided with an undervoltage blocking. The operation may be based on single
phase, phase-to-phase or positive sequence voltage measurement.
To avoid oscillations of the output start signal, a hysteresis has been included, see section 3 "In-
verse characteristics".
232
Underfrequency protection (PTUF, 81) Chapter 8
Frequency protection
For the voltage dependent time delay the measured voltage level and the settings UNom, UMin,
Exponent, tMax and tMin set the time delay according to figure 113 and equation 43. The setting
TimerOperation is used to decide what type of time delay to apply. The output STARTDUR,
gives the time elapsed from the issue of the start output, in percent of the total operation time
available in PST.
Trip signal issuing requires that the underfrequency condition continues for at least the user set
time delay. If the start condition, with respect to the measured frequency ceases during the delay
time, and is not fulfilled again within a user defined reset time, tReset, the start output is reset,
after that the defined reset time has elapsed. Here it should be noted that after leaving the hys-
teresis area, the start condition must be fulfilled again and it is not sufficient for the signal to
only return back to the hysteresis area.
On the output of the underfrequency function a 100 ms pulse is issued, after a time delay corre-
sponding to the setting of TimeDlyRestore, when the measured frequency returns to the level
corresponding to the setting RestoreFreq.
233
Underfrequency protection (PTUF, 81) Chapter 8
Frequency protection
tReset
tReset
Frequency
START
Hysteresis Measured
TRIP Frequency
StartFrequency
Time
START tTRip
TRIP
Time Integrator
tTrip
Time
en05000721.vsd
Figure 111: Frequency profile not causing a reset of the start signal
234
Underfrequency protection (PTUF, 81) Chapter 8
Frequency protection
tReset
Frequency tReset
START START Hysteresis Measured
TRIP Frequency
StartFrequency
Time
START tTrip
TRIP
Time Integrator
tTrip
Time
en05000723.vsd
Figure 112: Frequency profile causing a reset of the start signal
235
Underfrequency protection (PTUF, 81) Chapter 8
Frequency protection
right location. At constant voltage, U, the voltage dependent time delay is calculated according
to equation 43. At non-constant voltage, the actual time delay is integrated in a similar way as
for the inverse time characteristic for the undervoltage and overvoltage functions.
Exponent
⎡ U − UMin ⎤
t=⎢ ⋅ ( tMax − tMin ) + tMin
⎣ UNom − UMin ⎥⎦
(Equation 43)
where:
t is the voltage dependent time delay (at constant voltage),
U is the measured voltage
Exponent is a setting,
UMin, UNom are voltage settings corresponding to
tMax, tMin are time settings.
UMin = 90%
UNom = 100%
tMax = 1.0 s
tMin = 0.0 s
Exponent = 0, 1, 2, 3 and 4
236
Underfrequency protection (PTUF, 81) Chapter 8
Frequency protection
1
0
1
TimeDlyOperate [s]
Exponenent
2
3
0.5 4
0
90 95 100
U [% of UBase]
en05000075.vsd
Figure 113: Voltage dependent inverse time characteristics for the underfrequency function.
The time delay to operate is plotted as a function of the measured voltage, for the
Exponent = 0, 1, 2, 3, 4 respectively.
1.2.4 Blocking
The underfrequency function can be partially or totally blocked, by binary input signals or by
parameter settings, where:
If the measured voltage level decreases below the setting of IntBlkStVal, both the start and the
trip outputs, are blocked.
1.2.5 Design
The frequency measuring element continuously measures the frequency of the positive sequence
voltage and compares it to the setting StartFrequency. The frequency signal is filtered to avoid
transients due to switchings and faults. The time integrator can operate either due to a definite
delay time or to the special voltage dependent delay time. When the frequency has returned back
to the setting of RestoreFreq, the RESTORE output is issued after the time delay TimeDlyRe-
store. The design of the underfrequency function is schematically described in figure 114.
237
Underfrequency protection (PTUF, 81) Chapter 8
Frequency protection
Block
BLOCK BLKDMAGN
OR
Comparator
U < IntBlockLevel
TimeDlyReset TRIP
100 ms
Comparator RESTORE
TimeDlyRestore
f > RestoreFreq
en05000726.vsd
Figure 114: Schematic design of the underfrequency function
TUF1-
SAPTUF
U3P TRIP
BLOCK START
BLKTRIP RESTORE
BLKREST BLKDMAGN
en05000326.vsd
238
Underfrequency protection (PTUF, 81) Chapter 8
Frequency protection
Table 121: Output signals for the SAPTUF_81 (TUF1-) function block
Signal Description
TRIP Operate/trip signal for frequency.
START Start/pick-up signal for frequency.
RESTORE Restore signal for load restoring purposes.
BLKDMAGN Blocking indication due to low amplitude.
239
Underfrequency protection (PTUF, 81) Chapter 8
Frequency protection
240
Overfrequency protection (PTOF, 81) Chapter 8
Frequency protection
2.1 Introduction
Overfrequency will occur at sudden load drops or shunt faults in the power network. In some
cases close to generating part governor problems can also cause overfrequency.
The function can be used for generation shedding, remedial action schemes etc. It can also be
used as a sub-nominal frequency stage initiating load restoring.
The function is provided with an undervoltage blocking. The operation may be based on single
phase, phase-to-phase or positive sequence voltage measurement.
241
Overfrequency protection (PTOF, 81) Chapter 8
Frequency protection
Trip signal issuing requires that the overfrequency condition continues for at least the user set
time delay. If the start condition, with respect to the measured frequency ceases during the delay
time, and is not fulfilled again within a user defined reset time, tReset, the start output is reset,
after that the defined reset time has elapsed. Here it should be noted that after leaving the hys-
teresis area, the start condition must be fulfilled again and it is not sufficient for the signal to
only return back to the hysteresis area.
242
Overfrequency protection (PTOF, 81) Chapter 8
Frequency protection
tReset
tReset
Frequency
START
TRIP
StartFrequency
Hysteresis Measured
Frequency
Time
START tTrip
TRIP
Time Integrator
tTrip
Time
en05000732.vsd
Figure 116: Frequency profile not causing a reset of the start signal
243
Overfrequency protection (PTOF, 81) Chapter 8
Frequency protection
tReset
Frequency tReset
START START TRIP
Hysteresis
StartFrequency
Measured
Frequency
Time
START tTrip
TRIP
Time Integrator
tTrip
Time
en05000733.vsd
Figure 117: Frequency profile causing a reset of the start signal
2.2.3 Blocking
The overfrequency function can be partially or totally blocked, by binary input signals or by pa-
rameter settings, where:
244
Overfrequency protection (PTOF, 81) Chapter 8
Frequency protection
If the measured voltage level decreases below the setting of IntBlkStVal, both the start and the
trip outputs, are blocked.
2.2.4 Design
The frequency measuring element continuously measures the frequency of the positive sequence
voltage and compares it to the setting StartFrequency. The frequency signal is filtered to avoid
transients due to switchings and faults in the power system. The time integrator operates due to
a definite delay time. The design of the overfrequency function is schematically described in
figure 118.
BLOCK
BLKTRIP BLOCK
OR BLKDMAGN
Comparator
U < IntBlockLevel
Start
&
Trip
Voltage Time integrator Output
Logic
Definite Time Delay START START
Frequency Comparator
f > StartFrequency TimeDlyOperate
TRIP
TimeDlyReset
TRIP
en05000735.vsd
245
Overfrequency protection (PTOF, 81) Chapter 8
Frequency protection
T OF1-
SAPTOF
U3P T RIP
BLOCK ST ART
BLKT RIP BLKDMAGN
en05000325.vsd
Table 125: Output signals for the SAPTOF_81 (TOF1-) function block
Signal Description
TRIP Operate/trip signal for frequency.
START Start/pick-up signal for frequency.
BLKDMAGN Blocking indication due to low amplitude.
246
Overfrequency protection (PTOF, 81) Chapter 8
Frequency protection
247
Rate-of-change frequency Chapter 8
protection (PFRC, 81) Frequency protection
3.1 Introduction
Rate of change of frequency function gives an early indication of a main disturbance in the sys-
tem.
The function can be used for generation shedding, load shedding, remedial action schemes etc.
The function is provided with an undervoltage blocking. The operation may be based on single
phase, phase-to-phase or positive sequence voltage measurement.
248
Rate-of-change frequency Chapter 8
protection (PFRC, 81) Frequency protection
is issued on the RESTORE output, when the frequency recovers to a value higher than the setting
RestoreFreq. A positive setting of StartFreqGrad, sets the rate-of-change of frequency function
to start and trip for frequency increases.
To avoid oscillations of the output start signal, a hysteresis has been included, see section 3 "In-
verse characteristics".
Trip signal issuing requires that the rate-of-change of frequency condition continues for at least
the user set time delay, tTrip. If the start condition, with respect to the measured frequency ceas-
es during the delay time, and is not fulfilled again within a user defined reset time, tReset, the
start output is reset, after that the defined reset time has elapsed. Here it should be noted that
after leaving the hysteresis area, the start condition must be fulfilled again and it is not sufficient
for the signal to only return back into the hysteresis area, see figure 120-123.
The RESTORE output of the rate-of-change of frequency function is set, after a time delay equal
to the setting of tRestore, when the measured frequency has returned to the level corresponding
to RestoreFreq, after an issue of the TRIP output signal. If tRestore is set to 0.000 s the restore
functionality is disabled, and no output will be given. The restore functionality is only active for
lowering frequency conditions and the restore sequence is disabled if a new negative frequency
gradient is detected during the restore period, defined by the settings RestoreFreq and tRestore.
249
Rate-of-change frequency Chapter 8
protection (PFRC, 81) Frequency protection
Rate-of-Change
of Frequency
Time
tReset
tReset
Measured Rate-of-
START Change of Frequency
Hysteresis
TRIP
StartFreqGrad
START tTrip
TRIP
Time Integrator
tTrip
Time
en05000727.vsd
Figure 120: Rate-of-change of frequency profile, set for frequency decrease conditions, not
causing a reset of the start signal
250
Rate-of-change frequency Chapter 8
protection (PFRC, 81) Frequency protection
Rate-of-Change
of Frequency
Time
tReset
tReset
START START Measured
Hysteresis Rate-of-Change
TRIP of Frequency
StartFreqGrad
START tTrip
TRIP
Time Integrator
tTrip
Time
en05000728.vsd
Figure 121: Frequency profile, set for frequency decrease conditions, causing a reset of the
start signal
251
Rate-of-change frequency Chapter 8
protection (PFRC, 81) Frequency protection
tReset
Rate-of-Change
of Frequency tReset
START
TRIP
StartFreqGrad
Measured Rate-of-
Hysteresis
Change of Frequency
Time
START tTrip
TRIP
Time Integrator
tTrip
Time
en05000729.vsd
Figure 122: Rate-of-change of frequency profile, set for frequency increase conditions, not
causing a reset of the start signal
252
Rate-of-change frequency Chapter 8
protection (PFRC, 81) Frequency protection
Rate-of-Change
of Frequency tReset
tReset
START START TRIP
Hysteresis
StartFreqGrad
Measured
Rate-of-Change
of Frequency
Time
START tTrip
TRIP
Time Integrator
tTrip
Time
en05000730.vsd
Figure 123: Frequency profile, set for frequency increase conditions, causing a reset of the
start signal
3.2.3 Blocking
The rate-of-change of frequency function can be partially or totally blocked, by binary input sig-
nals or by parameter settings, where:
253
Rate-of-change frequency Chapter 8
protection (PFRC, 81) Frequency protection
If the measured voltage level decreases below the setting of IntBlockLevel, both the start and the
trip outputs, are blocked.
3.2.4 Design
The rate-of-change of frequency measuring element continuously measures the frequency of the
selected voltage and compares it to the setting StartFreqGrad. The frequency signal is filtered
to avoid transients due to power system switchings and faults. The time integrator operates with
a definite delay time. When the frequency has returned back to the setting of RestoreFreq, the
RESTORE output is issued after the time delay tRestore, if the TRIP signal has earlier been is-
sued. The sign of the setting StartFreqGrad is essential, and controls if the function is used for
raising or lowering frequency conditions. The design of the rate-of-change of frequency function
is schematically described in figure 124.
BLOCK
BLKTRIP
BLKRESET BLOCK
OR
Start
Rate-of-Change Time integrator &
Comparator
of Frequency Trip
If
Definite Time Delay Output
[StartFreqGrad<0 START START
Logic
AND
TimeDlyOperate
df/dt < StartFreqGrad]
OR
TimeDlyReset
[StartFreqGrad>0
AND
TRIP
df/dt > StartFreqGrad]
Then
START
100 ms
en05000835.vsd
Figure 124: Schematic design of the rate-of-change of frequency function
254
Rate-of-change frequency Chapter 8
protection (PFRC, 81) Frequency protection
RCF1-
SAPFRC
U3P T RIP
BLOCK ST ART
BLKT RIP REST ORE
BLKREST BLKDMAGN
en05000322.vsd
Table 129: Output signals for the SAPFRC_81 (RCF1-) function block
Signal Description
TRIP Operate/trip signal for frequencyGradient
START Start/pick-up signal for frequencyGradient
RESTORE Restore signal for load restoring purposes.
BLKDMAGN Blocking indication due to low amplitude
255
Rate-of-change frequency Chapter 8
protection (PFRC, 81) Frequency protection
256
About this chapter Chapter 9
Multipurpose protection
Chapter 9 Multipurpose
protection
257
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
I< I>
U< U>
1.1 Introduction
The function can be utilized as a negative sequence current protection detecting unsymmetrical
conditions such as open phase or unsymmetrical faults.
The function can also be used to improve phase selection for high resistive earth faults, outside
the distance protection reach, for the transmission line. Three functions are used which measures
the neutral current and each of the three phase voltages. This will give an independence from
load currents and this phase selection will be used in conjunction with the detection of the earth
fault from the directional earth fault protection function.
The user can select to measure one of the current quantities shown in table 132.
258
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
The user can select to measure one of the voltage quantities shown in table 133:
259
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
It is important to notice that the voltage selection from table 133 is always applicable regardless
the actual external VT connections. The three-phase VT inputs can be connected to IED as either
three phase-to-ground voltages UL1, UL2 & UL3 or three phase-to-phase voltages UL1L2, UL2L3
& UL3L1). This information about actual VT connection is entered as a setting parameter for the
pre-processing block, which will then take automatic care about it.
260
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
The user can select one of the current quantities shown in table 134 for built-in current restraint
feature:
1. rated phase current of the protected object in primary amperes, when the mea-
sured Current Quantity is selected from 1 to 9, as shown in table 132.
2. rated phase current of the protected object in primary amperes multiplied by √3
(i.e. 1,732 x Iphase), when the measured Current Quantity is selected from 10 to
15, as shown in table 132.
1. rated phase-to-ground voltage of the protected object in primary kV, when the
measured Voltage Quantity is selected from 1 to 9, as shown in table 133.
2. rated phase-to-phase voltage of the protected object in primary kV, when the
measured Voltage Quantity is selected from 10 to 15, as shown in table 133.
Overcurrent step simply compares the magnitude of the measured current quantity
(see table 132) with the set pickup level. Non-directional overcurrent step will pickup if the
magnitude of the measured current quantity is bigger than this set level. Reset ratio is settable,
with default value of 0.96. However depending on other enabled built-in features this overcur-
rent pickup might not cause the overcurrent step start signal. Start signal will only come if all of
the enabled built-in features in the overcurrent step are fulfilled at the same time.
261
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
This feature will simple prevent overcurrent step start if the second-to-first harmonic ratio in the
measured current exceeds the set level.
Directional feature
The overcurrent protection step operation can be can be made dependent on the relevant phase
angle between measured current phasor (see table 132) and measured voltage phasor
(see table 133). In protection terminology it means that the PGPF function can be made direc-
tional by enabling this built-in feature. In that case overcurrent protection step will only operate
if the current flow is in accordance with the set direction (i.e. Forward, which means towards
the protected object, or Reverse, which means from the protected object). For this feature it is of
the outmost importance to understand that the measured voltage phasor (see table 133) and mea-
sured current phasor (see table 132) will be used for directional decision. Therefore it is the sole
responsibility of the end user to select the appropriate current and voltage signals in order to get
a proper directional decision. The PGPF function will NOT do this automatically. It will just
simply use the current and voltage phasors selected by the end user to check for the directional
criteria.
Table 135 gives an overview of the typical choices (but not the only possible ones) for these two
quantities for traditional directional relays.
Table 135: Typical current and voltage choices for directional feature
Set value for Set value for
the parameter Cur- the parameter Volt- Comment
rentInput ageInput
PosSeq PosSeq Directional positive sequence overcurrent function is
obtained. Typical setting for RCADir is from -45° to -90°
depending on the power
262
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
Unbalance current or voltage measurement shall not be used when the directional feature is en-
abled.
Two types of directional measurement principles are available, I & U and IcosPhi&U. The first
principle, referred to as "I & U" in the parameter setting tool, checks that:
• the magnitude of the measured current is bigger than the set pick-up level
• the phasor of the measured current is within the operating region (defined by the
relay operate angle, ROADir parameter setting; see figure 126).
263
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
U=-3U0
RCADir
Operate region
mta line
en05000252.vsd
where:
RCADir is -75°
ROADir is 50°
The second principle, referred to as "IcosPhi&U" in the parameter setting tool, checks that:
• that the product I·cos(Φ) is bigger than the set pick-up level, where Φ is angle
between the current phasor and the mta line
• that the phasor of the measured current is within the operating region (defined by
the I·cos(Φ) straight line and the relay operate angle, ROADir parameter setting;
see figure 126).
264
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
U=-3U0
RCADir
Operate region
mta line
en05000253.vsd
where:
RCADir is -75°
ROADir is 50°
Note that it is possible to decide by a parameter setting how the directional feature shall behave
when the magnitude of the measured voltage phasor falls below the pre-set value. User can select
one of the following three options:
• Non-directional (i.e. operation allowed for low magnitude of the reference volt-
age)
• Block (i.e. operation prevented for low magnitude of the reference voltage)
• Memory (i.e. memory voltage shall be used to determine direction of the current)
It shall also be noted that the memory duration is limited in the algorithm to 100 ms. After that
time the current direction will be locked to the one determined during memory time and it will
re-set only if the current fails below set pickup level or voltage goes above set voltage memory
limit.
265
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
StartCurr_OC1
VDepFact_OC1 * StartCurr_OC1
ULowLimit_OC1 UHighLimit_OC1
Selected Voltage
Magnitude
en05000324.vsd
Figure 128: Example for OC1 step current pickup level variation as function of measured volt-
age magnitude in Slope mode of operation
StartCurr_OC1
VDepFact_OC1 * StartCurr_OC1
en05000323.vsd
Figure 129: Example for OC1 step current pickup level variation as function of measured volt-
age magnitude in Step mode of operation
266
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
This feature will simple change the set overcurrent pickup level in accordance with magnitude
variations of the measured voltage. It shall be noted that this feature will as well affect the pickup
current value for calculation of operate times for IDMT curves (i.e. overcurrent with IDMT
curve will operate faster during low voltage conditions).
IMeasured
ea ain
ar str
e Ire
at ff*
per e
O Co
es tr
I>R
IsetHigh
IsetLow
atan(RestrCoeff)
Restraint
en05000255.vsd
This feature will simple prevent overcurrent step to start if the magnitude of the measured cur-
rent quantity is smaller than the set percentage of the restrain current magnitude. However this
feature will not affect the pickup current value for calculation of operate times for IDMT curves.
This means that the IDMT curve operate time will not be influenced by the restrain current mag-
nitude.
When set, the start signal will start definite time delay or inverse (i.e. IDMT) time delay in ac-
cordance with the end user setting. If the start signal has value one for longer time than the set
time delay, the overcurrent step will set its trip signal to one. Reset of the start and trip signal
can be instantaneous or time delay in accordance with the end user setting.
267
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
value one for longer time than the set time delay the undercurrent step will set its trip signal to
one. Reset of the start and trip signal can be instantaneous or time delay in accordance with the
setting.
Overvoltage step simply compares the magnitude of the measured voltage quantity
(see table 133) with the set pickup level. The overvoltage step will pickup if the magnitude of
the measured voltage quantity is bigger than this set level. Reset ratio is settable, with default
value of 0.99.
The start signal will start definite time delay or inverse (i.e. IDMT) time delay in accordance
with the end user setting. If the start signal has value one for longer time than the set time delay,
the overvoltage step will set its trip signal to one. Reset of the start and trip signal can be instan-
taneous or time delay in accordance with the end user setting.
Undervoltage step simply compares the magnitude of the measured voltage quantity
(see table 133 with the set pickup level. The undervoltage step will pickup if the magnitude of
the measured voltage quantity is smaller than this set level. Reset ratio is settable, with default
value of 1.01.
The start signal will start definite time delay or inverse (i.e. IDMT) time delay in accordance
with the end user setting. If the start signal has value one for longer time than the set time delay,
the undervoltage step will set its trip signal to one. Reset of the start and trip signal can be in-
stantaneous or time delay in accordance with the end user setting.
268
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
REx670
ADM PGPF function
Phasor calculation of
scaling with CT ratio
individual currents
A/D conversion Selection of which current Selected current
Phasors &
and voltage shall be given to
samples
the built-in protection Selected voltage
elements
Phasors &
samples
en05000169.vsd
Figure 131: Treatment of measured currents within IED for PGPF function
Figure 131 shows how internal treatment of measured currents is done for multipurpose protec-
tion function
The following currents and voltages are inputs to the multipurpose protection function. They
must all be expressed in true power system (primary) Amperes and kilovolts.
1. Instantaneous values (samples) of currents & voltages from one three-phase cur-
rent and one three-phase voltage input.
2. Fundamental frequency phasors from one three-phase current and one
three-phase voltage input calculated by the pre-processing modules.
3. Sequence currents & voltages from one three-phase current and one three-phase
voltage input calculated by the pre-processing modules.
1. Selects one current from the three phase input system (see table 136) for internal-
ly measured current.
2. Selects one voltage from the three phase input system (see table 137) for inter-
nally measured voltage.
3. Selects one current from the three phase input system (see table 137) for internal-
ly measured restraint current.
269
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
CURRENT
UC1
TRUC1
2nd Harmonic
Selected current restraint
STUC2
UC2
nd
TRUC2
2 Harmonic
restraint
STOC1
OC1 TROC1
STOC2
OC2 TROC2
2nd Harmonic
restraint
Current restraint ≥1
UDIRLOW
Directionality DIROC2
Voltage control /
restraint
STOV1
OV1 TROV1
STOV2
OV2 TROV2
STUV1
Selected voltage
UV1 TRUV1
STUV2
UV2 TRUV2
VOLTAGE
en05000170.vsd
Figure 132: PGPF function main logic diagram for built in protection elements
270
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
1. The selected currents and voltage are given to built-in protection elements. Each
protection element and step makes independent decision about status of its
START and TRIP output signals.
2. More detailed internal logic for every protection element is given in the following
four figures
3. Common START and TRIP signals from all built-in protection elements & steps
(internal OR logic) are available from multipurpose function as well.
Enable
second
harmonic Second
harmonic check
1 DEF time BLKTROC
selected DEF 1 TROC1
AND
OR
Selected current a
a>b
b
OC1=On STOC1
AND
StartCurr_OC1 BLKOC1
X
Inverse
Selected voltage
Current
Restraint
Feature
Selected restrain current Imeasured > k Irestraint
en05000831.vsd
Figure 133: Simplified internal logic diagram for built-in first overcurrent step i.e. OC1 (step
OC2 has the same internal logic)
271
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
Operation_UC1=On
STUC1
en05000750.vsd
Figure 134: Simplified internal logic diagram for built-in first undercurrent step i.e. UC1 (step
UC2 has the same internal logic)
Inverse
Operation_OV1=On
Inverse time
BLKOV1 selected
en05000751.vsd
Figure 135: Simplified internal logic diagram for built-in first overvoltage step i.e.OV1 (step
OV2 has the same internal logic)
272
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
Inverse
Operation_UV1=On
Inverse time
BLKUV1 selected
en05000752.vsd
Figure 136: Simplified internal logic diagram for built-in first undervoltage step i.e.UV1 (step
UV2 has the same internal logic)
GF01-
CVGAPC
I3P TRIP
U3P TROC1
BLOCK TROC2
BLKOC1 TRUC1
BLKOC1TR TRUC2
ENMLTOC1 TROV1
BLKOC2 TROV2
BLKOC2TR TRUV1
ENMLTOC2 TRUV2
BLKUC1 START
BLKUC1TR STOC1
BLKUC2 STOC2
BLKUC2TR STUC1
BLKOV1 STUC2
BLKOV1TR STOV1
BLKOV2 STOV2
BLKOV2TR STUV1
BLKUV1 STUV2
BLKUV1TR BLK2ND
BLKUV2 DIROC1
BLKUV2TR DIROC2
UDIRLOW
CURRENT
ICOSFI
VOLTAGE
UIANGLE
en05000372.vsd
273
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
Table 137: Output signals for the CVGAPC (GF01-) function block
Signal Description
TRIP General trip signal
TROC1 Trip signal from overcurrent function OC1
TROC2 Trip signal from overcurrent function OC2
TRUC1 Trip signal from undercurrent function UC1
TRUC2 Trip signal from undercurrent function UC2
TROV1 Trip signal from overvoltage function OV1
TROV2 Trip signal from overvoltage function OV2
TRUV1 Trip signal from undervoltage function UV1
TRUV2 Trip signal from undervoltage function UV2
START General start signal
STOC1 Start signal from overcurrent function OC1
STOC2 Start signal from overcurrent function OC2
274
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
Signal Description
STUC1 Start signal from undercurrent function UC1
STUC2 Start signal from undercurrent function UC2
STOV1 Start signal from overvoltage function OV1
STOV2 Start signal from overvoltage function OV2
STUV1 Start signal from undervoltage function UV1
STUV2 Start signal from undervoltage function UV2
BLK2ND Block from second harmonic detection
DIROC1 Directional mode of OC1 (nondir, forward,reverse)
DIROC2 Directional mode of OC2 (nondir, forward,reverse)
UDIRLOW Low voltage for directional polarization
CURRENT Measured current value
ICOSFI Measured current multiplied with cos (Phi)
VOLTAGE Measured voltage value
UIANGLE Angle between voltage and current
275
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
276
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
277
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
278
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
279
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
280
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
281
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
282
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
283
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
284
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
285
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
286
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
287
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
288
About this chapter Chapter 10
Secondary system supervision
289
Current circuit supervision (RDIF) Chapter 10
Secondary system supervision
1.1 Introduction
Open or short circuited current transformer cores can cause unwanted operation of many protec-
tion functions such as differential, earth fault current and negative sequence current functions.
The current circuit supervision function compares the residual current from a three phase set of
current transformer cores with the neutral point current on a separate input taken from another
set of cores on the current transformer.
A detection of a difference indicates a fault in the circuit and is used as alarm or to block protec-
tion functions expected to give unwanted tripping.
The FAIL output will be set to a logical one when the following criteria are fulfilled:
• The numerical value of the difference |ΣIphase| – |Iref| is higher than 80% of the
numerical value of the sum |ΣIphase| + |Iref|.
• The numerical value of the current |ΣIphase| – |Iref| is equal to or higher than the
set operate value IMinOp.
• No phase current has exceeded Ip>Block during the last 10 ms.
• The current circuit supervision is enabled by setting Operation = On.
The FAIL output remains activated 100 ms after the AND-gate resets when being activated for
more than 20 ms. If the FAIL lasts for more than 150 ms a ALARM will be issued. In this case
the FAIL and ALARM will remain activated 1 s after the AND-gate resets. This prevents un-
wanted resetting of the blocking function when phase current supervision element(s) operate,
e.g. during a fault.
290
Current circuit supervision (RDIF) Chapter 10
Secondary system supervision
Figure 138: Simplified logic diagram for the current circuit supervision
291
Current circuit supervision (RDIF) Chapter 10
Secondary system supervision
| ∑I phase | - | I ref |
Slope = 1
Operation
Slope = 0.8
area
I MinOp
| ∑I phase | + | I ref |
99000068.vsd
Note!
Due to the formulas for the axis compared, |ΣIphase | - |I ref | and |Σ I phase | + | I ref | respec-
tively, the slope can not be above 2.
CCS1-
CCSRDIF
I3P FAIL
IREF ALARM
BLOCK
en05000389.vsd
292
Current circuit supervision (RDIF) Chapter 10
Secondary system supervision
Table 141: Output signals for the CCSRDIF (CCS1-) function block
Signal Description
FAIL Detection of current circuit failure
ALARM Alarm for current circuit failure
293
Fuse failure supervision (RFUF) Chapter 10
Secondary system supervision
2.1 Introduction
The aim of the fuse failure supervision function (FSD) is to block voltage measuring functions
at failures in the secondary circuits between the voltage transformer and the IED in order to
avoid unwanted operations that otherwise might occur.
The fuse failure supervision function basically has two different algorithms, negative sequence
and zero sequence based algorithm and an additional delta voltage and delta current algorithm.
The negative sequence detection algorithm is recommended for IEDs used in isolated or
high-impedance earthed networks. It is based on the negative-sequence measuring quantities, a
high value of voltage 3·U2 without the presence of the negative-sequence current 3·I2.
The zero sequence detection algorithm is recommended for IEDs used in directly or low imped-
ance earthed networks. It is based on the zero sequence measuring quantities, a high value of
voltage 3·U0 without the presence of the residual current 3·I0.
A criterion based on delta current and delta voltage measurements can be added to the fuse fail-
ure supervision function in order to detect a three phase fuse failure, which in practice is more
associated with voltage transformer switching during station operations.
For better adaptation to system requirements, an operation mode setting has been introduced
which makes it possible to select the operating conditions for negative sequence and zero se-
quence based function. The selection of different operation modes makes it possible to choose
different interaction possibilities between the negative sequence and zero sequence based algo-
rithm.
The measured signals are compared with their respective set values 3U0< and 3I0>.
The function enable the internal signal fuseFailDetected if the measured zero sequence voltage
is higher than the set value 3U0>, the measured zero sequence current is below the set value
3I0< and the operation mode selector (OpMode is set to 2 (zero sequence mode). This will ac-
294
Fuse failure supervision (RFUF) Chapter 10
Secondary system supervision
tivate the output signal BLKU, intended to block voltage related protection functions in the IED.
The output signal BLKZ will be activated as well if not the internal dead line detection is acti-
vaded at the same time.
If the fuseFailDetected signal is present for more than 5 seconds at the same time as all phase
voltages are below the set value UPh> and the setting parameter ISealIn is set to On, the function
will activate the output signals 3PH, BLKU and BLKZ. The same signals will aslo be activated
if all phase voltages are below the value UPh>, SealIn=On and any of the phase voltages below
the setting value for more than 5 seconds.
It is recommended to always set SealIn to On since this will secure that no unwanted operation
of fuse failure will occur at closing command of breaker when the line is already energized from
the other end. The system voltages shall be normal before fuse failure is allowed to be activated
and initiate block of different protection functions.
The output signal BLKU can also be activated if no phase voltages is below the setting UPh>
for more than 60 seconds at the same time as the zero sequence voltage is above the set value
3U0> for more than 5 seconds, all phase currents are below the setting IDLD< (operate level for
dead line detection) and the circuit breaker is closed (input CBCLOSED is activated). This con-
dition covers for fuse failure at open breaker position.
Fuse failure condition is unlatched when the normal voltage conditions are restored.
Fuse failure condition is stored in the non volatile memory in the IED. In the new start-up pro-
cedure the IED checks the stored value in its non volatile memory and establishes the corre-
sponding starting conditions.
295
Fuse failure supervision (RFUF) Chapter 10
Secondary system supervision
TEST
TEST ACTIVE
AND
BlocFuse = Yes
BLOCK
OR
BLKTRIP
fufailStarted AND
OR
All UL less
than Uph>
3PH
AND
SealIn = On AND
5s
Any UL less AND
OR t
than Uph>
setLatch U I
BLKZ
200 ms AND
AND OR
deadLineCondition t
150 ms
MCBOP
t
60 sec
All UL> UPh> t
AND
UN > 3U0> for
t>5 s AND
en06000394.vsd
Figure 141: Simplified logic diagram for fuse failure supervision function, zero sequence
based
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Fuse failure supervision (RFUF) Chapter 10
Secondary system supervision
The input BLOCK signal is a general purpose blocking signal of the fuse failure supervision
function. It can be connected to a binary input of the IED in order to receive a block command
from external devices or can be software connected to other internal functions of the IED itself
in order to receive a block command from internal functions. Through OR gate it can be con-
nected to both binary inputs and internal function outputs.
The input BLKSP is intended to be connected to the trip output at any of the protection functions
included in the IED. When activated for more than 20 ms, the operation of the fuse failure is
blocked during a fixed time of 100 ms. The aim is to increase the security against unwanted op-
erations during the opening of the breaker, which might cause unbalance conditions for which
the fuse failure might operate.
The output signal BLKZ will also be blocked if the internal dead line detection is activated. The
block signal has a 200 ms drop-off time delay.
The input signal MCBOP is supposed to be connected via a terminal binary input to the N.C.
auxiliary contact of the miniature circuit breaker protecting the VT secondary circuit. The
MCBOP signal sets the output signals BLKU and BLKZ in order to block all the voltage related
functions when the MCB is open independent of the setting of OpMode selector. The additional
drop-off timer of 150 ms prolongs the presence of MCBOP signal to prevent the unwanted op-
eration of voltage dependent function due to non simultaneous closing of the main contacts of
the miniature circuit breaker.
The input signal DISCPOS is supposed to be connected via a terminal binary input to the N.C.
auxiliary contact of the line disconnector. The DISCPOS signal sets the output signal BLKU in
order to block the voltage related functions when the line disconnector is open. The impedance
protection function is not affected by the position of the line disconnector since there will be no
line currents that can cause maloperation of the distance protection. If DISCPOS=0 it signifies
that the line is connected to the system and when the DISCPOS=1 it signifies that the line is dis-
connected from the system and the block signal BLKU is generated.
The output BLKU can be used for blocking the voltage related measuring functions (undervolt-
age protection, synchro-check etc.) except for the impedance protection.
The function output BLKZ can be used for blocking the impedance protection function.
The BLKZ will only be activated if not the internal dead line detection is activated at the same
time.
The fuse failure condition is unlatched when the normal voltage conditions are restored.
When the output 3PH is activated, all three voltage are low.
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Fuse failure supervision (RFUF) Chapter 10
Secondary system supervision
The function enable the internal signal fuseFailDetected if the measured negative sequence volt-
age is higher than the set value 3U2>, the measured negative sequence current is below the value
3I2< and the operation mode selector (OpMode) is set to 1 (negative sequence mode).
The current and voltage is continuously measured in all three phases and the following quantities
are calculated:
The calculated delta quantities are compared with their respective set values DI< and DU>.
The delta current and delta voltage algorithm, detects a fuse failure if a sufficient negative
change in voltage amplitude without a sufficient change in current amplitude is detected in each
phase separately. This check is performed if the circuit breaker is closed. Information about the
circuit breaker position is brought to the function input CBCLOSED through a binary input of
the IED.
There are two conditions for activating the internal STDU signal and set the latch:
• The magnitude of ΔU is higher than the corresponding setting DU> and ΔI is be-
low the setting DI> in any phase at the same time as the circuit breaker is closed
(CBCLOSED = 1)
• The magnitude ΔU is higher than the setting DU> and the magnitude of ΔI is be-
low the setting DI> in any phase at the same time as the magnitude of the phase
current in the same phase is higher than the setting IPh>.
The first criterion requires that the delta condition shall be fulfilled in any phase at the same time
as circuit breaker is closed. Opening circuit breaker at one end and energizing the line from other
end onto a fault could lead to wrong start of the fuse failure function at the end with the open
breaker. If this is considering to bee an important disadvantage, connect the CBCLOSED input
to FALSE. In this way only the second criterion can activate the delta function.
The second criterion means that detection of failure in one phase together with high current for
the same phase will set the latch. The measured phase current is used to reduce the risk of false
fuse failure detection. If the current on the protected line is low, a voltage drop in the system (not
caused by fuse failure) is not by certain followed by current change and a false fuse failure might
occur. To prevent that the phase current criterion is introduced.
298
Fuse failure supervision (RFUF) Chapter 10
Secondary system supervision
If the signal setLatchΔUΔI is set (see figure 141) and if all measured voltages are low (lower
than the setting UPh>) the output 3PH will be activated indicating fuse failure in all three phas-
es. The output BLKU and BLKZ will be activated as well.
If the signal setLatchΔUΔI is activated but not all three phases are below the setting UPh> only
BLKU will be activated.
The BLKZ will be activated as well if not the internal dead line detection is activated.
299
Fuse failure supervision (RFUF) Chapter 10
Secondary system supervision
FSD1-
SDDRFUF
BLOCK BLKZ
I3P BLKU
U3P 3PH
CBCLOSED
MCBOP
DISCPOS
BLKSP
en05000700.vsd
Table 145: Output signals for the SDDRFUF (FSD1-) function block
Signal Description
BLKZ Start of current and voltage controlled function
BLKU General start of function
3PH Three-phase start of function
300
Fuse failure supervision (RFUF) Chapter 10
Secondary system supervision
301
Fuse failure supervision (RFUF) Chapter 10
Secondary system supervision
302
About this chapter Chapter 11
Control
Chapter 11 Control
303
Synchrocheck and energizing check Chapter 11
(RSYN, 25) Control
1.1 Introduction
The synchrocheck function checks that the voltages on both sides of the circuit breaker are in
synchronism, or with at least one side dead to ensure that closing can be done safely.
The function includes a built-in voltage selection scheme for double bus and one- and a half or
ring busbar arrangements.
Manual closing as well as automatic reclosing can be checked by the function and can have dif-
ferent settings, e.g. the allowed frequency difference can be set to allow wider limits for the au-
to-reclose attempt than for the manual closing.
The energizing check function measures the bus and line voltages and compares them to both
high and low threshold detectors. The output is only given when the actual measured quantities
match the set conditions.
For single circuit breaker and 1 1/2 circuit breaker arrangements, the SYN function blocks have
the capability to make the necessary voltage selection. For single circuit breaker arrangements,
selection of the correct voltage is made using auxiliary contacts of the bus disconnectors. For 1
1/2 circuit breaker arrangements, correct voltage selection is made using auxiliary contacts of
the bus disconnectors as well as the circuit breakers
The internal logic for each function block as well as the Input and Outputs and the setting pa-
rameters with default setting and setting ranges is described in this document. For application
related information, please refer to the “Application manual”.
304
Synchrocheck and energizing check Chapter 11
(RSYN, 25) Control
Synchronism check
The voltage difference, frequency difference and phase angle difference values are measured in
the IED centrally and are available for the Synchrocheck function for evaluation. If the bus volt-
age is connected as phase-phase and the line voltage as phase-neutral (or the opposite), this need
to be compensated. This is done with a setting, which scales up the line voltage to a level equal
to the bus voltage.
When the function is set to Operation = On, the measuring will start.
The function will compare the bus and line voltage values with the set values for UHighBusSync
and UHighLineSync.
If both sides are higher than the set values the measured values are compared with the set values
for acceptable frequency, phase angle and voltage difference FreqDiff, PhaseDiff and UDiff. If
a compensation factor is set due to the use of different voltages on the Bus and Line, the factor
is deducted from the line voltage before the comparison of the phase angle values.
The frequency on both sides of the circuit breaker is also measured. The frequencies must not
deviate from the rated frequency more than +/-5Hz. The frequency difference between the bus
frequency and the line frequency is measured and may not exceed the set value.
Two sets of settings for frequency difference and phase angle difference are available and used
for the Manual closing and Auto-Reclose functions respectively as required.
The inputs BLOCK and BLKSYNCH are available for total block of the complete Synchro-
check function and block of the Synchronism check function respectively. TSTAUTSY will al-
low testing of the function where the fulfilled conditions are connected to a separate test output
Two outputs MANSYOK resp. AUTOSYOK are activated when the actual measured conditions
match the set conditions for the respective output. The output signal can be delayed independent-
ly for MANSYOK conditions and for ARSYNOK.
A number of outputs are available as information about fulfilled checking conditions. UOK
shows that the voltages are high, UDIFF, FRDIFFM/A, PHDIFFM/A shows when the voltage
difference, frequency difference and phase angle difference conditions are met.
Energizing check
Voltage values are measured in the IED centrally and are available for evaluation by the Synch-
rocheck function. If the bus voltage is connected as phase-phase and the line voltage as
phase-neutral, (or the opposite) this needs to be compensated. This is done with a setting, which
scales the line voltage to a level equal to the bus voltage.
The function measures voltages on the busbar and the line to verify whether they are live or dead.
This is done by comparing with the set values UHighLineEnerg and ULowLineEnerg for bus re-
spectively line energizing.
The frequency on both sides of the circuit breaker is also measured. The frequencies must not
deviate from the rated frequency more than +/-5Hz. The frequency difference between the bus
frequency and the line frequency is measured and shall not exceed a set value.
305
Synchrocheck and energizing check Chapter 11
(RSYN, 25) Control
The Energizing direction can be selected individually for the Manual and the Automatic func-
tions respectively. When the conditions are met the outputs AUTOENOK and MANENOK re-
spectively will be activated if the fuse supervision conditions are fulfilled. The output signal can
be delayed independently for MANENOK conditions and for AUTOENOK.
The inputs BLOCK and BLKENERG are available for total block of the complete Synchrocheck
function resp. block of the Energizing check function. TSTENOK will allow testing of the func-
tion where the fulfilled conditions are connected to a separate test output.
306
Synchrocheck and energizing check Chapter 11
(RSYN, 25) Control
OperationSync = On
AND TSTSYNOK
AND
TSTSYNC AND
BLKSYNC AND
BLOCK OR
SYNOK
AND
AND
SelectedFuseOK
0-60 s
AND t OR
tSync
0-60 s
AND t
AND
tSync2
UDiff 50 ms
AND t
UHighBusSync
UOK
AND
UHighLineSync
UDIFF
1
FRDIFFA
FreqDiffA 1
FRDIFFM
FreqDiffM 1
PHDIFFA
PhaseDiffA 1
PHDIFFM
PhaseDiffM 1
UDIFFME
voltageDifferenceValue
FRDIFFME
frequencyDifferenceValue
PHDIFFME
phaseAngleDifferenceValue
en05000790.vsd
Figure 143: Simplified logic diagram for the Synchronism check function
Voltage selection
The voltage selection module including supervision of included voltage transformer fuses for
the different arrangements is a basic part of the Synchrocheck function and determines the pa-
rameters fed to the Synchronism check and Energizing check functions. This includes the selec-
tion of the appropriate Line and Bus voltages and fuse supervision.
307
Synchrocheck and energizing check Chapter 11
(RSYN, 25) Control
The voltage selection type to be used is set with the parameter CBConfig. The different alterna-
tives are described below.
If NoVoltageSel is set the default voltages used will be ULine1 and UBus1. This is also the case
when external voltage selection is provided. Fuse failure supervision for the used inputs must
also be connected.
The voltage selection function selected voltages and fuse conditions are the Synchronism check
and Energizing check inputs.
For the disconnector positions it is advisable to use (NO) a and (NC) b type contacts to supply
Disconnector Open and Closed positions but it is of course also possible to use an inverter for
one of the positions.
The SYN1(2)-UB1/2OK and SYN1(2)-UB1/2FF inputs are related to the busbar voltage and the
SYN1(2)-ULN1/2OK and SYN1(2)-ULN1/2FF inputs are related to the line voltage. Configure
them to the binary inputs or function outputs that indicate the status of the external fuse failure
of the busbar and line voltages. In the event of a fuse failure, the energizing check functions are
blocked. The synchronism check requires full voltage on both sides and will be blocked auto-
matically in the event of fuse failures.
The function also checks the fuse-failure signals for bus 1, bus 2 and line voltage transformers.
Inputs UB1OK-UB1FF supervise the fuse for Bus 1. UB2OK-UB2FF supervises the fuse for
Bus 2 and ULNOK-ULNFF supervises the fuse for the Line voltage transformer. The inputs fail
(FF) or healthy (OK) can alternatively be used dependent on the available signal. If a fuse-failure
is detected in the selected voltage source an output signal USELFAIL is set. This output signal
is true if the selected bus or line voltages have a fuse failure. This output as well as the function
can be blocked with the input signal BLOCK. The function logic diagram is shown in figure 144.
308
Synchrocheck and energizing check Chapter 11
(RSYN, 25) Control
B1QOPEN
B1SEL
B1QCLD AND
B2QOPEN B2SEL
1
B2QCLD AND
AND invalidSelection
bus1Voltage
busVoltage
bus2Voltage
UB1OK AND
UB1FF OR
OR
AND selectedFuseOK
UB2OK AND
UB2FF OR USELFAIL
AND
ULN1OK
ULN1FF OR
BLOCK
en05000779.vsd
Figure 144: Logic diagram for the voltage selection function of a single circuit breaker with
double busbars
This voltage selection function uses the binary inputs from the disconnectors and circuit break-
ers auxiliary contacts to select the right voltage for the Synchrocheck (Synchronism and Ener-
gizing check) function. For the bus circuit breaker one side of the circuit breaker is connected to
the busbar and the other side is connected either to line 1, line 2 or the other busbar depending
on the arrangement.
The fuse supervision is connected to ULNOK-ULNFF etc. and with alternative Healthy or Fail-
ing fuse signals depending on what is available for each of fuse (MCB).
309
Synchrocheck and energizing check Chapter 11
(RSYN, 25) Control
The tie circuit breaker is connected either to bus 1 or line 1 on one side and the other side is con-
nected either to bus 2 or line 2. Four different output combinations are possible, bus to bus, bus
to line, line to bus and line to line.
The function also checks the fuse-failure signals for bus 1, bus 2, line 1 and line 2. If a fuse-fail-
ure is detected in the selected voltage an output signal USELFAIL is set. This output signal is
true if the selected bus or line voltages have a fuse failure. This output as well as the function
can be blocked with the input signal BLOCK.The function block diagram for the voltage selec-
tion of a bus circuit breaker is shown in Figure 145: and for the tie circuit breaker in Figure 146:
310
Synchrocheck and energizing check Chapter 11
(RSYN, 25) Control
LN1QOPEN
AND
LN1SEL
LN1QCLD
B1QOPEN
LN2SEL
B1QCLD AND AND
OR
B2SEL
LN2QOPEN
LN2QCLD AND
AND invalidSelection
AND
B2QOPEN
B2QCLD AND
line1Voltage
lineVoltage
line2Voltage
bus2Voltage
UB1OK
UB1FF OR
OR
UB2OK AND
AND selectedFuseOK
UB2FF OR
USELFAIL
ULN1OK AND
AND
ULN1FF OR
ULN2OK
AND
ULN2FF OR
BLOCK
en05000780.vsd
Figure 145: Simplified logic diagram for the voltage selection function for a bus circuit break-
er in a 1 1/2 breaker arrangement.
311
Synchrocheck and energizing check Chapter 11
(RSYN, 25) Control
LN1QOPEN
LN1SEL
LN1QCLD AND
B1SEL
1
B1QOPEN AND
AND
B1QCLD AND
line1Voltage
busVoltage
bus1Voltage
LN2QOPEN
LN2SEL
LN2QCLD AND
B2SEL
1
OR invalidSelection
B2QOPEN AND
AND
B2QCLD AND
line2Voltage
lineVoltage
bus2Voltage
UB1OK AND
UB1FF OR
OR
UB2OK AND selectedFuseOK
AND
UB2FF OR
USELFAIL
ULN1OK AND
AND
ULN1FF OR
ULN2OK
AND
ULN2FF OR
BLOCK
en05000781.vsd
Figure 146: Simplified logic diagram for the voltage selection function for the tie circuit break-
er in 1 1/2 breaker arrangement.
312
Synchrocheck and energizing check Chapter 11
(RSYN, 25) Control
SYN1-
SECRSYN
U3PBB1 B1SEL
U3PBB2 B2SEL
U3PLN1 LN1SEL
U3PLN2 LN2SEL
B1QOPEN USELFAIL
B1QCLD AUTOENOK
B2QOPEN MANENOK
B2QCLD TSTENOK
LN1QOPEN MANSYOK
LN1QCLD TSTMANSY
LN2QOPEN UDIFF
LN2QCLD FRDIFFM
UB1OK FRDIFFA
UB1FF PHDIFFM
UB2OK PHDIFFA
UB2FF UOK
ULN1OK AUTOSYOK
ULN1FF TSTAUTSY
ULN2OK
ULN2FF
TSTENERG
TSTSYNC
BLKENERG
BLKSYNC
BLOCK
en05000702.vsd
313
Synchrocheck and energizing check Chapter 11
(RSYN, 25) Control
Signal Description
UB1OK Bus1 voltage transformer OK
UB1FF Bus1 voltage transformer fuse failure
UB2OK Bus2 voltage transformer OK
UB2FF Bus2 voltage transformer fuse failure
ULN1OK Line1 voltage transformer OK
ULN1FF Line1 voltage transformer fuse failure
ULN2OK Line2 voltage transformer OK
ULN2FF Line2 voltage transformer fuse failure
TSTENERG Energizing check in test mode
TSTSYNC Synchrocheck in test mode
BLKENERG Energizing check blocked
BLKSYNC Synchrocheck blocked
BLOCK Block of function
Table 149: Output signals for the SECRSYN_25 (SYN1-) function block
Signal Description
B1SEL Bus1 selected
B2SEL Bus2 selected
LN1SEL Line1 selected
LN2SEL Line2 selected
USELFAIL Selected voltage transformer fuse failed
AUTOENOK Automatic energizing check OK
MANENOK Manual energizing check OK
TSTENOK Energizing check OK test output
MANSYOK Manual synchro check OK
TSTMANSY Manual synchro check OK test output
UDIFF Voltage difference out of limit
FRDIFFM Frequency difference out of limit for Manual operation
FRDIFFA Frequency difference out of limit for Auto operation
PHDIFFM Phase angle difference out of limit for Manual Operation
PHDIFFA Phase angle difference out of limit for Auto operation
UOK Voltage amplitudes above set limits
AUTOSYOK Auto synchro check OK
TSTAUTSY Auto synchro check OK test output
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(RSYN, 25) Control
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(RSYN, 25) Control
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Synchrocheck and energizing check Chapter 11
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2.1 Introduction
The autoreclosing function provides high-speed and/or delayed auto-reclosing for single or
multi-breaker applications.
Up to five reclosing attempts can be programmed. The first attempt can be single-, two and/or
three phase for single phase or multi-phase faults respectively.
Multiple autoreclosing functions are provided for multi-breaker arrangements. A priority circuit
allows one circuit breaker to close first and the second will only close if the fault proved to be
transient.
When the function is set On and is operative the output SETON is activated (high). Other input
conditions such as CBPOS and CBREADY must also be fulfilled. At this point the automatic
recloser is prepared to start the reclosing cycle and the output signal READY on the AR function
block is activated (high).
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For a new auto-reclosing cycle to be started, a number of conditions need to be met. They are
linked to dedicated inputs. The inputs are: a) CBREADY, CB ready for a reclosing cycle, e.g.
charged operating gear, b) CBPOS to ensure that the CB was closed when the line fault occurred
and start was applied, c) No blocking or inhibit signal shall be present. After the start has been
accepted, it is latched in and an internal signal “Started” is set. It can be interrupted by certain
events, like an inhibit signal.
To start auto-reclosing by CB position Open instead of from protection trip signals, one has to
configure the CB Open position signal to inputs CBPOS and START and set a parameter Start-
ByCBOpen = ON and CBAuxContType = NormClosed (normally closed, 52b). One also has to
configure and connect signals from manual trip commands to input INHIBIT.
The logic for switching the auto-recloser ON/OFF and the starting of the reclosing is shown in
figure 148. The following should be considered.
• Setting Operation can be set to Off, External ctrl or ON. External ctrl offers the
possibility of switching by external switches to inputs ON and OFF, communi-
cation commands to the same inputs etc.
• Autoreclose AR is normally started by tripping. It is either a Zone 1 and Commu-
nication aided trip or a general trip. If the general trip is used the function must
be blocked from all back-up tripping connected to INHIBIT. In both alternatives
the breaker failure function must be connected to inhibit the function. START
makes a first attempt with synchrocheck, STARTHS makes its first attempt with-
out synchrocheck. TRSOTF starts shots 2-5.
• Circuit breaker checks that the breaker was closed for a certain length of time be-
fore the starting occurred and that the CB has sufficient stored energy to perform
an auto-reclosing sequence and is connected to inputs CBPOS and CBREADY.
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Operation:On
Operation:Off
Operation:External Ctrl
OR
ON AND SETON
AND S
OR
OFF AND R
START
STARTHS OR
OR initiate
autoInitiate
Additional conditions
TRSOTF AND
start
120 ms
CBREADY AND
t AND
AND S
tCBClosedMin
CBPOS CB Closed
t R
AND
Blocking conditions READY
AND
OR
Inhibit condistions
count 0
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Figure 148: Auto-reclosing Off/On and start
An auto-reclosing open time extension delay, tExtended t1, can be added to the normal shot 1
delay. It is intended to come into use if the communication channel for permissive line protection
is lost. In a case like this there can be a significant time difference in fault clearance at the two
line ends. A longer auto-reclosing open time can then be useful. This extension time is controlled
by setting parameter Extended t1 = On and the input PLCLOST.
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Extended t1
PLCLOST Extend t1
initiate AND OR AND
AND
tTrip
t
AND
start
long duration
AND
(block AR)
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Figure 149: Control of extended auto-reclosing open time and long trip pulse detection
By choosing CBReadyType = CO (CB ready for a Close-Open sequence) the readiness of the
circuit breaker is also checked before issuing the CB closing command. If the CB has a readiness
contact of type CBReadyType = OCO (CB ready for an Open-Close-Open sequence) this con-
dition may not be complied with after the tripping and at the moment of reclosure. The
Open-Close-Open condition was however checked at the start of the reclosing cycle and it is
then likely that the CB is prepared for a Close-Open sequence.
The synchronism check or energizing check must be fulfilled within a set time interval, tSync.
If it is not, or if other conditions are not met, the reclosing is interrupted and blocked.
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Control
The reclaim timer defines a time from the issue of the reclosing command, after which the re-
closing function resets. Should a new trip occur during this time, it is treated as a continuation
of the first fault. The reclaim timer is started when the CB closing command is given.
A number of outputs for Autoreclosing state control keeps track of the actual state in the reclos-
ing sequence.
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Control
t1 1Ph
"AR Open time" timers
t
1P2PTO
From logic for t1 2Ph OR
reclosing t
programs
1P2PTO t1 3Ph HS
t
3PHSTO
3PHSTO
3PT1TO
t1 3Ph
3PT2TO t
3PT1TO
3PT3TO OR
AND
3PT4TO OR Pulse AR
3PT5TO AND
SYNC
initiate AND Blocking X
CBREADY AND OR
AR State
tSync Control
AND t
COUNTER
0 Shot 0
CL Shot 1
1
2 Shot 2
3 Shot 3
tReclaim
Pulse AR (above) AND t R 4 Shot 4
OR Shot 5
5
TR2P LOGIC Reclaim Timer On
TR3P reclosing
1PT1
programs
start 2PT1
initiate 3PHS
INPROGR
Shot 0 3PT1 OR
Shot 1 3PT2
Shot 2
Shot 3 3PT3
Shot 4
Shot 5 3PT4
PERMIT1P
3PT5
PREP3P
1
Y Blocking tInhibit
OR t
Inhibit Y
INHIBIT
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Figure 150: Reclosing Reclaim and Inhibit timers
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When a reclosing command is issued, the appropriate reclosing operation counter is increment-
ed. There is a counter for each type of reclosing and one for the total number of reclosing com-
mands issued.
tPulse
pulse
**) AND CLOSECB
OR
initiate
50 ms
counter COUNTAR
RSTCOUNT
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Figure 151: Pulsing of closing command and driving the operation counters
Transient fault
After the reclosing command the reclaim timer tReclaim starts running for the set time. If no trip-
ping occurs within this time, the auto-reclosing will reset.
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Control
Normally the signal UNSUCCL appears when a new trip and start is received after the last re-
closing shot has been made and the auto-reclosing function is blocked. The signal resets once
the reclaim time has elapsed. The “unsuccessful“ signal can also be made to depend on CB po-
sition input. The parameter UnsucClByCBChk should then be set to CBCheck, and a timer tUn-
sucCl should also be set. If the CB does not respond to the closing command and does not close,
but remains open, the output UNSUCCL is set high after time tUnsucCl.
initiate
block start AND
OR UNSUCCL
AND S
shot 0
R
UnsucClByCBchk = CBcheck
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Figure 152: Issue of signal UNSUCCL, unsuccessful reclosing
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tAutoContWait
t
AND
CLOSECB
AND S Q
AND
CBPOS CBClosed
OR
initiate
START OR
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Figure 153: Automatic proceeding of shot 2 to 5
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Control
StartByCBOpen = On
1
START AND
STARTHS AND
start
≥1
100 ms
AND
100 ms
AND
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Figure 154: Pulsing of the start inputs at "StartByCBOpen=On"
Fault
CB POS
Closed Open Closed
CB READY
START (Trip)
SYNC
tReclaim
READY
INPROG
1PT1
ACTIVE
PREP3P
SUCCL
Time
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Control
Fault
CB POS Open
Closed Open C C
CB READY
START (Trip)
TR3P
SYNC
READY
INPROGR
3PT1 t1 3Ph
3PT2 t2 3Ph
ACTIVE tReclaim
PREP3P
UNSUCCL
Time
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Control
Fault
AR01-CBCLOSED
AR01-CBREADY(CO)
AR01-START
AR01-TR3P
AR01-SYNC
AR01-READY
AR01-INPROGR
AR01-1PT1
AR01-T1
AR01-T2
AR01-CLOSECB t1s
AR01-P3P
AR01-UNSUC
tReclaim
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Figure 157: Permanent single-phase fault. Program 1/2/3ph, single-phase single-shot reclos-
ing
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Control
Fault
AR01-CBCLOSED
AR01-CBREADY(CO)
AR01-START
AR01-TR3P
AR01-SYNC
AR01-READY
AR01-INPROGR
AR01-1PT1
AR01-T1
AR01-T2
t2
AR01-CLOSECB t1s
AR01-P3P
AR01-UNSUC
tReclaim
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Figure 158: Permanent single-phase fault. Program 1ph + 3ph or 1/2ph + 3ph, two-shot re-
closing
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Autorecloser (RREC, 79) Chapter 11
Control
AR01-
SMBRREC
ON BLOCKED
OFF SETON
BLKON READY
BLKOFF ACTIVE
RESET SUCCL
INHIBIT UNSUCCL
START INPROGR
STARTHS 1PT1
TRSOTF 2PT1
SKIPHS 3PT1
TR2P 3PT2
TR3P 3PT3
THOLHOLD 3PT4
CBREADY 3PT5
CBPOS PERMIT1P
PLCLOST PREP3P
SYNC CLOSECB
WAIT WFMASTER
RSTCOUNT COUNT1P
COUNT2P
COUNT3P1
COUNT3P2
COUNT3P3
COUNT3P4
COUNT3P5
COUNTAR
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Control
Signal Description
CBPOS Status of the circuit breaker Closed/Open
PLCLOST Power line carrier or other form of permissive sigÂnal lost
SYNC Synchronizing check fulfilled (for 3Ph attempts)
WAIT Wait for master (in Multi-breaker arrangements)
RSTCOUNT Resets all counters
Table 153: Output signals for the SMBRREC_79 (AR01-) function block
Signal Description
BLOCKED The AR is in blocked state
SETON The AR operation is switched on, operative
READY Indicates that the AR function is ready for a new sequence
ACTIVE Reclosing sequence in progress
SUCCL Activated if CB closes during the time tUnsucCl
UNSUCCL Reclosing unsuccessful, signal resets after the reclaim time
INPROGR Reclosing shot in progress, activated during open time
1PT1 Single-phase reclosing is in progress, shot 1
2PT1 Two-phase reclosing is in progress, shot 1
3PT1 Three-phase reclosing in progress, shot 1
3PT2 Three-phase reclosing in progress, shot 2
3PT3 Three-phase reclosing in progress, shot 3
3PT4 Three-phase reclosing in progress, shot 4
3PT5 Three-phase reclosing in progress, shot 5
PERMIT1P Permit single-phase trip, inverse signal to PREP3P
PREP3P Prepare three-phase trip, control of the next trip operation
CLOSECB Closing command for CB
WFMASTER Signal to Slave issued by Master for sequential reclosing
COUNT1P Counting the number of single-phase reclosing shots
COUNT2P Counting the number of two-phase reclosing shots
COUNT3P1 Counting the number of three-phase reclosing shot 1
COUNT3P2 Counting the number of three-phase reclosing shot 2
COUNT3P3 Counting the number of three-phase reclosing shot 3
COUNT3P4 Counting the number of three-phase reclosing shot 4
COUNT3P5 Counting the number of three-phase reclosing shot 5
COUNTAR Counting total number of reclosing shots
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Autorecloser (RREC, 79) Chapter 11
Control
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Control
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Apparatus control (APC) Chapter 11
Control
3.1 Introduction
The apparatus control is a function for control and supervision of circuit breakers, disconnectors
and earthing switches within a bay. Permission to operate is given after evaluation of conditions
from other functions such as interlocking, synchrocheck, operator place selection and external
or internal blockings.
Because a primary apparatus can be allocated to many functions within a Substation Automation
system, the object-oriented approach with a function module that handles the interaction and sta-
tus of each process object ensures consistency in the process information used by higher-level
control functions.
Primary apparatuses such as breakers and disconnectors are controlled and supervised by one
software module (SCSWI) each. Because the number and type of signals connected to a breaker
and a disconnector are almost the same, the same software is used to handle these two types of
apparatuses.
The software module is connected to the physical process in the switchyard via an interface
module by means of a number of digital inputs and outputs. One type of interface module is in-
tended for a circuit breaker (SXCBR) and another type is intended for a disconnector or earthing
switch (SXSWI). Four types of function blocks are available to cover most of the control and
supervision within the bay. These function blocks are interconnected to form a control function
reflecting the switchyard configuration. The total number used depends on the switchyard con-
figuration. These four types are:
The three latter functions are logical nodes according to IEC 61850. The function blocks Local-
Remote and LocRemControl, to handle the local/remote switch, and the function blocks
QCRSV and RESIN, for the reservation function, also belong to the apparatus control function.
The principles of operation, function block, input and output signals and setting parameters for
all these functions are described below.
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Apparatus control (APC) Chapter 11
Control
The function sends information about the Permitted Source To Operate (PSTO) and blocking
conditions to other functions within the bay e.g. switch control functions, voltage control func-
tions and measurement functions.
When the local panel switch is in Off position all commands from remote and local level will be
ignored. If the position for the local/remote switch is not valid the PSTO output will always be
set to faulty state (3), which means no possibility to operate.
To adapt the signals from the local HMI or from an external local/remote switch, the function
blocks LocalRemote and LocRemControl are needed and connected to QCBAY. For more in-
formation, see section 3.4 "Local/Remote switch (LocalRemote, LocRemControl)".
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Apparatus control (APC) Chapter 11
Control
Table 156: PSTO values for different Local panel switch positions
Local panel switch PSTO value AllPSTOValid Possible locations that shall be able
positions (configuration to operate
parameter)
0 = Off 0 -- Not possible to operate
1 = Local 1 FALSE Local Panel
1 = Local 5 TRUE Local or Remote level without any priority
2 = Remote 2 FALSE Remote level
2 = Remote 5 TRUE Local or Remote level without any priority
3 = Faulty 3 -- Not possible to operate
Blockings
The blocking states for position indications and commands are intended to provide the possibil-
ity for the user to make common blockings for the functions configured within a complete bay.
The blocking facilities provided by the bay control function are the following:
• Blocking of position indications, BL_UPD. This input will block all inputs relat-
ed to apparatus positions for all configured functions within the bay.
• Blocking of commands, BL_CMD. This input will block all commands for all
configured functions within the bay.
• Blocking of function, BLOCK, signal from DO (Data Object) Behavior (IEC
61850–8–1). If DO Behavior is set to "blocked" it means that the function is ac-
tive, but no outputs are generated, no reporting, control commands are rejected
and functional and configuration data is visible.
The switching of the Local/Remote switch requires an Control level password. This will be re-
quested at attempt to operate if authority levels has been defined in the IED. Default password
is "abb".
CB01-
QCBAY
LR_OFF PSTO
LR_LOC UPD_BLKD
LR_REM CMD_BLKD
LR_VALID
BL_UPD
BL_CMD
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Apparatus control (APC) Chapter 11
Control
Table 158: Output signals for the QCBAY (CB01-) function block
Signal Description
PSTO The value for the operator place allocation
UPD_BLKD The update of position is blocked
CMD_BLKD The function is blocked for commands
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Apparatus control (APC) Chapter 11
Control
LR01- CB01-
LocalRemote QCBAY
CTRLOFF OFF LR_OFF PSTO
LOCCTRL LOCAL LR_LOC UPD_BLKD
REMCTRL REMOTE LR_REM CMD_BLKD
LHMICTRL VALID LR_VALID
BL_UPD
BL_CMD
LR02- CB02-
LocalRemote QCBAY
CTRLOFF OFF LR_OFF PSTO
LOCCTRL LOCAL LR_LOC UPD_BLKD
REMCTRL REMOTE LR_REM CMD_BLKD
LHMICTRL VALID LR_VALID
BL_UPD
BL_CMD
LRC1-
LocRemControl
PSTO1 HMICTR1
PSTO2 HMICTR2
PSTO3 HMICTR3
PSTO4 HMICTR4
PSTO5 HMICTR5
PSTO6 HMICTR6
PSTO7 HMICTR7
PSTO8 HMICTR8
PSTO9 HMICTR9
PSTO10 HMICTR10
PSTO11 HMICTR11
PSTO12 HMICTR12
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Figure 161: Configuration for the local/remote handling for a local LCD HMI with two bays
and two screen pages
If the IED contains control functions for several bays, the local/remote position can be different
for the included bays. When the local LCD HMI is used the position of the local/remote switch
can be different depending on which single line diagram screen page that is presented on the lo-
cal HMI. The function block LocRemControl controls the presentation of the LEDs for the lo-
cal/remote position to applicable bay and screen page.
The local-remote switching is under strict password control. This is activated by defining an ad-
ministrator and user with their passwords. Default password i “abb”. The selected position lo-
cal-remote or local and remote is indicated by LEDs.
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Apparatus control (APC) Chapter 11
Control
LR01-
LocalRemote
CT RLOFF OFF
LOCCT RL LOCAL
REMCT RL REMOT E
LHMICT RL VALID
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LRC1-
LocRemControl
PST O1 HMICT R1
PST O2 HMICT R2
PST O3 HMICT R3
PST O4 HMICT R4
PST O5 HMICT R5
PST O6 HMICT R6
PST O7 HMICT R7
PST O8 HMICT R8
PST O9 HMICT R9
PST O10 HMICT R10
PST O11 HMICT R11
PST O12 HMICT R12
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Table 161: Output signals for the LocalRemote (LR01-) function block
Signal Description
OFF Control is disabled
LOCAL Local control is activated
REMOTE Remote control is activated
VALID Outputs are valid
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Apparatus control (APC) Chapter 11
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Table 162: Input signals for the LocRemControl (LRC1-) function block
Signal Description
PSTO1 PSTO input channel 1
PSTO2 PSTO input channel 2
PSTO3 PSTO input channel 3
PSTO4 PSTO input channel 4
PSTO5 PSTO input channel 5
PSTO6 PSTO input channel 6
PSTO7 PSTO input channel 7
PSTO8 PSTO input channel 8
PSTO9 PSTO input channel 9
PSTO10 PSTO input channel 10
PSTO11 PSTO input channel 11
PSTO12 PSTO input channel 12
Table 163: Output signals for the LocRemControl (LRC1-) function block
Signal Description
HMICTR1 Bitmask output 1 to local remote LHMI input
HMICTR2 Bitmask output 2 to local remote LHMI input
HMICTR3 Bitmask output 3 to local remote LHMI input
HMICTR4 Bitmask output 4 to local remote LHMI input
HMICTR5 Bitmask output 5 to local remote LHMI input
HMICTR6 Bitmask output 6 to local remote LHMI input
HMICTR7 Bitmask output 7 to local remote LHMI input
HMICTR8 Bitmask output 8 to local remote LHMI input
HMICTR9 Bitmask output 9 to local remote LHMI input
HMICTR10 Bitmask output 10 to local remote LHMI input
HMICTR11 Bitmask output 11 to local remote LHMI input
HMICTR12 Bitmask output 12 to local remote LHMI input
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Command handling
Two types of command models can be used. The two command models are "direct with en-
hanced security" and "SBO (Select-Before-Operate) with enhanced security". Which one of
these two command models that are used is defined by the parameter CtlModel. The meaning
with "direct with enhanced security" model is that no select is required. The meaning with "SBO
with enhanced security" model is that a select is required before execute.
In this function only commands with enhanced security is supported regarding changing of the
position. With enhanced security means that the command sequence is supervised in three steps,
the selection, command evaluation and the supervision of position. Each step ends up with a
pulsed signal to indicate that the respective step in the command sequence is finished. If an error
occurs in one of the steps in the command sequence, the sequence is terminated and the error is
mapped into the enumerated variable "cause" attribute belonging to the pulsed response signal
for the IEC61850 communication. The last cause L_CAUSE can be read from the function block
and used for example at commissioning. The meaning of the cause signals can be found in table
2.
Note!
There is not any relation between the command direction and the actual position. For example,
if the switch is in close position it is possible to execute a close command.
Before an executing command, an evaluation of the position is done. If the parameter PosDe-
pendent is true and the position is in intermediate state or in bad state no executing command is
send. If the parameter is false the execution command is send independent of the position value.
Evaluation of position
In the case when there are three one-phase switches connected to the switch control function, the
switch control will "merge" the position of the three switches to the resulting three-phase posi-
tion. In the case when the position differ between the one-phase switches, following principles
will be applied:
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Apparatus control (APC) Chapter 11
Control
The time stamp of the output three-phase position from switch control will have the time stamp
of the last changed phase when it goes to end position. When it goes to intermediate position or
bad state, it will get the time stamp of the first changed phase.
In addition, there is also the possibility that one of the one-phase switches will change position
at any time due to a trip. Such situation is here called pole discordance and is supervised by this
function. In case of a pole discordance situation, i.e. the position of the one-phase switches are
not equal for a time longer than the setting tPoleDiscord, an error signal POLEDISC will be set.
In the supervision phase, the switch controller function evaluates the "cause" values from the
switch modules XCBR/XSWI. At error the "cause" value with highest priority is shown.
Blocking principles
The blocking signals are normally coming from the bay control function (QCBAY) and via the
IEC61850 communication from the operator place.
Note!
The different block conditions will only affect the operation of this function, i.e. no blocking sig-
nals will be "forwarded" to other functions. The above blocking outputs are stored in a non-vol-
atile memory.
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When there is no positive confirmation from the synchrocheck function, the SCSWI will send a
start signal START_SY to the synchronizing function, which will send the closing command to
the SXCBR when the synchronizing conditions are fulfilled, see figure 164. If no synchronizing
function is included, the timer for supervision of the "synchronizing in progress signal" is set to
0, which means no start of the synchronizing function. The SCSWI will then set the attribute
"blocked-by-synchrocheck" in the "cause" signal. See also the time diagram in figure 168.
SCSWI SXCBR
EXE_CL
OR CLOSE
SYNC_OK
START_SY
SY_INPRO
SECRSYN
CLOSE. CB
Synchro Synchronizing
Check function
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Figure 164: Example of interaction between SCSWI, SECRSYN (synchrocheck and synchroniz-
ing function) and SXCBR function
Time diagrams
The SCSWI function has timers for evaluating different time supervision conditions. These tim-
ers are explained here.
The timer tSelect is used for supervising the time between the select and the execute command
signal, i.e. the time the operator has to perform the command execution after the selection of the
object to operate.
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Apparatus control (APC) Chapter 11
Control
select
execute command
tSelect
timer t1 t1>tSelect, then long-
operation-time in 'cause'
is set
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The parameter tResResponse is used to set the maximum allowed time to make the reservation,
i.e. the time between reservation request and the feedback reservation granted from all bays in-
volved in the reservation function.
select
command termination
tResResponse t1>tResResponse, then
timer 1-of-n-control in 'cause'
t1 is set
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The timer tExecutionFB supervises the time between the execute command and the command
termination, see figure 167.
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Apparatus control (APC) Chapter 11
Control
execute command
position L1 open
close
position L2 open
close
position L3 open
close
cmd termination L1
cmd termination L2
cmd termination L3
cmd termination *
position open
close
The parameter tSynchrocheck is used to define the maximum allowed time between the execute
command and the input SYNC_OK to become true. If SYNC_OK=true at the time the execute
command signal is received, the timer "tSynchrocheck" will not start. The start signal for the
synchronizing is obtained if the synchrocheck conditions are not fulfilled.
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Apparatus control (APC) Chapter 11
Control
execute command
SYNC_OK
tSynchrocheck
t1
START_SY
SY_INPRO
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Error handling
Depending on what error that occurs during the command sequence the error signal will be set
with a value. Table 165 describes vendor specific cause values in addition to these specified in
IEC 61850-8-1 standard.The list of values of the “cause” are in order of priority. The values are
available over the IEC 61850. An output L_CAUSE on the function block indicates the latest
value of the error during the command.
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Apparatus control (APC) Chapter 11
Control
CS01-
SCSWI
BLOCK EXE_OP
PSTO EXE_CL
L_SEL SELECTED
L_OPEN RES_RQ
L_CLOSE START_SY
AU_OPEN POSITION
AU_CLOSE OPENPOS
BL_CMD CLOSEPOS
RES_GRT POLEDISC
RES_EXT CMD_BLK
SY_INPRO L_CAUSE
SYNC_OK XOUT
EN_OPEN
EN_CLOSE
XPOS1
XPOS2
XPOS3
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Table 167: Output signals for the SCSWI (CS01-) function block
Signal Description
EXE_OP Execute command for open direction
EXE_CL Execute command for close direction
SELECTED The select conditions are fulfilled
RES_RQ Request signal to the reservation function
START_SY Starts the synchronizing function
POSITION Position indication
OPENPOS Open position indication
CLOSEPOS Closed position indication
POLEDISC The positions for poles L1-L3 are not equal after a set time
CMD_BLK Commands are blocked
L_CAUSE Latest value of the error indication during command
XOUT Execution information to XCBR/XSWI
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The function has an operation counter for closing and opening commands. The counter value
can be read remotely from the operator place. The value is reset from a binary input or remotely
from the operator place.
Local/Remote switch
One binary input signal LR_SWI is included in this function to indicate the local/remote switch
position from switchyard provided via the I/O board. If this signal is set to TRUE it means that
change of position is allowed only from switchyard level. If the signal is set to FALSE it means
that command from IED or higher level is permitted. When the signal is set to TRUE all com-
mands (for change of position) from internal IED clients are rejected, even trip commands from
protection functions are rejected. The functionality of the local/remote switch is described in
figure 170.
Local= Operation at
UE switch yard level
TR
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Blocking principles
The function includes several blocking principles. The basic principle for all blocking signals is
that they will affect commands from all other clients e.g. operators place, protection functions,
autoreclosure etc.
• Block/deblock for open command. It is used to block operation for open com-
mand. Note that this block signal also affects the input OPEN for immediate com-
mand.
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Apparatus control (APC) Chapter 11
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• Block/deblock for close command. It is used to block operation for close com-
mand. Note that this block signal also affects the input CLOSE for immediate
command.
• Update block/deblock of positions. It is used to block the updating of position
values. Other signals related to the position will be reset.
• Blocking of function, BLOCK, signal from DO (Data Object) Behavior
(IEC61850). If DO Behavior is set to "blocked" it means that the function is ac-
tive, but no outputs are generated, no reporting, control commands are rejected
and functional and configuration data is visible.
Substitution
The substitution part in this function is used for manual set of the position for the switch. The
typical use of substitution is that an operator enters a manual value because that the real process
value is erroneous of some reason. The function will then use the manually entered value instead
of the value for positions determined by the process.
Note!
It is always possible to make a substitution, independently of the position indication and the sta-
tus information of the I/O board. When substitution is enabled, the position values are blocked
for updating and other signals related to the position are reset. The substituted values are stored
in a non-volatile memory.
Time diagrams
There are two timers for supervising of the execute phase, tStartMove and tIntermediate. tStart-
Move supervises that the primary device starts moving after the execute output pulse is sent. tIn-
termediate defines the maximum allowed time for intermediate position. Figure 171 explains
these two timers during the execute phase.
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OPENPOS
CLOSEPOS
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The timers tOpenPulse and tClosePulse are the length of the execute output pulses to be sent to
the primary equipment. Note that the output pulses for open and close command can have dif-
ferent pulse lengths. The pulses can also be set to be adaptive with the configuration parameter
AdaptivePulse. Figure 172 shows the principle of the execute output pulse. The adaptively pa-
rameter will have affect on both execute output pulses.
OPENPOS
CLOSEPOS
AdaptivePulse=FALSE
EXE_CL
tClosePulse
AdaptivePulse=TRUE
EXE_CL
tClosePulse
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If the pulse is set to be adaptive, it is not possible for the pulse to exceed tOpenPulse or
tClosePulse.
• the new expected final position is reached and the configuration parameter Adap-
tivePulse is set to true
• the timer tOpenPulse or tClosePulse has elapsed
• an error occurs due to the switch does not start moving, i.e. tStartMove has
elapsed.
Note!
If the start position indicates bad state (OPENPOS=1 and CLOSEPOS =1) when a command is
executed the execute output pulse resets only when timer "tOpenPulse" or "tClosePulse" has
elapsed.
There is one exception from the first item above. If the primary device is in open position and
an open command is executed or if the primary device is in close position and a close command
is executed. In these cases, with the additional condition that the configuration parameter Adap-
tivePulse is true, the execute output pulse is always activated and resets when tStartMove has
elapsed. If the configuration parameter AdaptivePulse is set to false the execution output re-
mains active until the pulse duration timer has elapsed.
An example of when a primary device is open and an open command is executed is shown in
figure 173 .
OPENPOS
CLOSEPOS
EXE_OP AdaptivePulse=FALSE
tOpenPulse
EXE_OP AdaptivePulse=TRUE
tOpenPulse
tStartMove timer
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Error handling
Depending on what error that occurs during the command sequence the error signal will be set
with a value. Table 169 describes vendor specific cause values in addition to these specified in
IEC 61850-8-1 standard. The list of values of the “cause” are in order of priority. The values are
available over the IEC 61850. An output L_CAUSE on the function block indicates the latest
value of the error during the command.
Table 169: Vendor specific cause values for Apparatus control in priority order
Apparatus control Description
function
–22 wrongCTLModel
–23 blockedForCommand
–24 blocked-for-open-command
–25 blocked-for-close-command
–30 longOperationTime
–31 switch-not-start-moving
–32 persistent-intermediate-state
–33 switch-returned-to-initial-position
–34 switch-in-bad-state
–35 not-expected-final-position
XC01-
SXCBR
BLOCK XPOS
LR_SWI EXE_OP
OPEN EXE_CL
CLOSE SUBSTED
BL_OPEN OP_BLKD
BL_CLOSE CL_BLKD
BL_UPD UPD_BLKD
POSOPEN OPENPOS
POSCLOSE CLOSEPOS
TR_OPEN TR_POS
TR_CLOSE CNT_VAL
RS_CNT L_CAUSE
XIN
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Table 171: Output signals for the SXCBR (XC01-) function block
Signal Description
XPOS Group signal for XCBR output
EXE_OP Executes the command for open direction
EXE_CL Executes the command for close direction
SUBSTED Indication that the position is substituted
OP_BLKD Indication that the function is blocked for open commands
CL_BLKD Indication that the function is blocked for close commands
UPD_BLKD The update of position indication is blocked
OPENPOS Apparatus open position
CLOSEPOS Apparatus closed position
TR_POS Truck position indication
CNT_VAL The value of the operation counter
L_CAUSE Latest value of the error indication during command
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Apparatus control (APC) Chapter 11
Control
The function has an operation counter for closing and opening commands. The counter value
can be read remotely from the operator place. The value is reset from a binary input or remotely
from the operator place.
Local/Remote switch
One binary input signal LR_SWI is included in this function to indicate the local/remote switch
position from switchyard provided via the I/O board. If this signal is set to TRUE it means that
change of position is allowed only from switchyard level. If the signal is set to FALSE it means
that command from IED or higher level is permitted. When the signal is set to TRUE all com-
mands (for change of position) from internal IED clients are rejected, even trip commands from
protection functions are rejected. The functionality of the local/remote switch is described in
figure 175.
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Apparatus control (APC) Chapter 11
Control
Local= Operation at
UE switch yard level
TR
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Blocking principles
The function includes several blocking principles. The basic principle for all blocking signals is
that they will affect commands from all other clients e.g. operators place, protection functions,
autoreclosure etc.
• Block/deblock for open command. It is used to block operation for open com-
mand. Note that this block signal also affects the input OPEN for immediate com-
mand.
• Block/deblock for close command. It is used to block operation for close com-
mand. Note that this block signal also affects the input CLOSE for immediate
command.
• Update block/deblock of positions. It is used to block the updating of position
values. Other signals related to the position will be reset.
• Blocking of function, BLOCK, signal from DO (Data Object) Behavior
(IEC61850). If DO Behavior is set to "blocked" it means that the function is ac-
tive, but no outputs are generated, no reporting, control commands are rejected
and functional and configuration data is visible.
Substitution
The substitution part in this function is used for manual set of the position for the switch. The
typical use of substitution is that an operator enters a manual value because that the real process
value is erroneous of some reason. The function will then use the manually entered value instead
of the value for positions determined by the process.
Note!
It is always possible to make a substitution, independently of the position indication and the sta-
tus information of the I/O board. When substitution is enabled, the position values are blocked
for updating and other signals related to the position are reset. The substituted values are stored
in a non-volatile memory.
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Apparatus control (APC) Chapter 11
Control
Time diagrams
There are two timers for supervising of the execute phase, tStartMove and tIntermediate. tStart-
Move supervises that the primary device starts moving after the execute output pulse is sent. tIn-
termediate defines the maximum allowed time for intermediate position. Figure 176 explains
these two timers during the execute phase.
OPENPOS
CLOSEPOS
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The timers tOpenPulse and tClosePulse are the length of the execute output pulses to be sent to
the primary equipment. Note that the output pulses for open and close command can have dif-
ferent pulse lengths. The pulses can also be set to be adaptive with the configuration parameter
AdaptivePulse. Figure 177 shows the principle of the execute output pulse. The adaptively pa-
rameter will have affect on both execute output pulses.
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Apparatus control (APC) Chapter 11
Control
OPENPOS
CLOSEPOS
AdaptivePulse=FALSE
EXE_CL
tClosePulse
AdaptivePulse=TRUE
EXE_CL
tClosePulse
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If the pulse is set to be adaptive, it is not possible for the pulse to exceed tOpenPulse or
tClosePulse.
• the new expected final position is reached and the configuration parameter Adap-
tivePulse is set to true
• the timer tOpenPulse or tClosePulse has elapsed
• an error occurs due to the switch does not start moving, i.e. tStartMove has
elapsed.
Note!
If the start position indicates bad state (OPENPOS=1 and CLOSEPOS =1) when a command is
executed the execute output pulse resets only when timer "tOpenPulse" or "tClosePulse" has
elapsed.
There is one exception from the first item above. If the primary device is in open position and
an open command is executed or if the primary device is in close position and a close command
is executed. In these cases, with the additional condition that the configuration parameter Adap-
tivePulse is true, the execute output pulse is always activated and resets when tStartMove has
elapsed. If the configuration parameter AdaptivePulse is set to false the execution output re-
mains active until the pulse duration timer has elapsed.
An example when a primary device is open and an open command is executed is shown in
figure 178.
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Apparatus control (APC) Chapter 11
Control
OPENPOS
CLOSEPOS
EXE_OP AdaptivePulse=FALSE
tOpenPulse
EXE_OP AdaptivePulse=TRUE
tOpenPulse
tStartMove timer
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Error handling
Depending on what error that occurs during the command sequence the error signal will be set
with a value. Table 173 describes possible values of the "cause" in priority order. The values are
available over the IEC 61850. An output L_CAUSE on the function block indicates the latest
value of the error during the command.
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Apparatus control (APC) Chapter 11
Control
XS01-
SXSWI
BLOCK XPOS
LR_SWI EXE_OP
OPEN EXE_CL
CLOSE SUBSTED
BL_OPEN OP_BLKD
BL_CLOSE CL_BLKD
BL_UPD UPD_BLKD
POSOPEN OPENPOS
POSCLOSE CLOSEPOS
RS_CNT CNT_VAL
XIN L_CAUSE
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Table 175: Output signals for the SXSWI (XS01-) function block
Signal Description
XPOS Group signal for XSWI output
EXE_OP Executes the command for open direction
EXE_CL Executes the command for close direction
SUBSTED Indication that the position is substituted
OP_BLKD Indication that the function is blocked for open commands
CL_BLKD Indication that the function is blocked for close commands
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Apparatus control (APC) Chapter 11
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Signal Description
UPD_BLKD The update of position indication is blocked
OPENPOS Apparatus open position
CLOSEPOS Apparatus closed position
CNT_VAL The value of the operation counter
L_CAUSE Latest value of the error indication during command
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Apparatus control (APC) Chapter 11
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The parameters ParamRequestx (x=1-8) are chosen at reservation of the own bay only (TRUE)
or other bays (FALSE). To reserve the own bay only means that no reservation request
RES_BAYS is created.
If the RESERVED output is not set, the selection is made with the output RES_GRTx (where
x=1-8 is the number of the requesting apparatus), which is connected to switch controller SC-
SWI. If the bay already is reserved the command sequence will be reset and the SCSWI will set
the attribute '1-of-n-control' in the 'cause' signal.
When it receives acknowledge from the bays via the input RES_DATA, it sets the output
RES_GRTx (where x=1-8 is the number of the requesting apparatus). If not acknowledgement
from all bays is received within a certain time defined in SCSWI (tResResponse), the SCSWI
will reset the reservation and set the attribute '1-of-n-control' in the 'cause' signal.
The reservation function can also be overridden in the own bay with the OVERRIDE input sig-
nal, i.e. reserving the own bay without waiting for the external acknowledge.
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Apparatus control (APC) Chapter 11
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If there are more than eight apparatuses in the bay there has to be one additional QCRSV. The
both functions QCRSV have to communicate and this is done through the input EXCH_IN and
EXCH_OUT according to figure 10. If more then one QCRSV are used, the execution order is
very important. The execution order must be in the way that the first QCRSV has a lower number
than the next one.
CR01-
QCRSV
EXCH_IN RES_GRT1
RES_RQ1 RES_GRT2
RES_RQ2 RES_GRT3
RES_RQ3 RES_GRT4
RES_RQ4 RES_GRT5
RES_RQ5 RES_GRT6
RES_RQ6 RES_GRT7
RES_RQ7 RES_GRT8
RES_RQ8 RES_BAYS
BLK_RES ACK_TO_B
OVERRIDE RESERVED
RES_DATA EXCH_OUT
CR02-
QCRSV
EXCH_IN RES_GRT1
RES_RQ1 RES_GRT2
RES_BAYS
RES_RQ2 RES_GRT3 ≥1
RES_RQ3 RES_GRT4
RES_RQ4 RES_GRT5
RES_RQ5 RES_GRT6 ACK_TO_B
RES_RQ6 RES_GRT7 ≥1
RES_RQ7 RES_GRT8
RES_RQ8 RES_BAYS
BLK_RES ACK_TO_B
≥1 RESERVED
OVERRIDE RESERVED
RES_DATA EXCH_OUT
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CR01-
QCRSV
EXCH_IN RES_GRT 1
RES_RQ1 RES_GRT 2
RES_RQ2 RES_GRT 3
RES_RQ3 RES_GRT 4
RES_RQ4 RES_GRT 5
RES_RQ5 RES_GRT 6
RES_RQ6 RES_GRT 7
RES_RQ7 RES_GRT 8
RES_RQ8 RES_BAYS
BLK_RES ACK_T O_B
OVERRIDE RESERVED
RES_DAT A EXCH_OUT
en05000340.vsd
Table 178: Output signals for the QCRSV (CR01-) function block
Signal Description
RES_GRT1 Reservation is made and the app. 1 is allowed to operate
RES_GRT2 Reservation is made and the app. 2 is allowed to operate
RES_GRT3 Reservation is made and the app. 3 is allowed to operate
RES_GRT4 Reservation is made and the app. 4 is allowed to operate
RES_GRT5 Reservation is made and the app. 5 is allowed to operate
RES_GRT6 Reservation is made and the app. 6 is allowed to operate
RES_GRT7 Reservation is made and the app. 7 is allowed to operate
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Control
Signal Description
RES_GRT8 Reservation is made and the app. 8 is allowed to operate
RES_BAYS Request for reservation of other bays
ACK_TO_B Acknowledge to other bays that this bay is reserved
RESERVED Indicates that the bay is reserved
EXCH_OUT Used for exchange signals between different BayRes blocks
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Apparatus control (APC) Chapter 11
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EXCH_IN INT
BIN
ACK_F_B
&
FutureUse
≥1
ANY_ACK
BAY_ACK ≥1
VALID_TX
&
BAY_VAL ≥1
RE_RQ_B
≥1
BAY_RES &
V _RE_RQ
≥1
BIN
EXCH_OUT
INT
en05000089.vsd
Figure 183 describes the principle of the data exchange between all RESIN modules in the cur-
rent bay. There is one RESIN function block per "other bay" used in the reservation mechanism.
The output signal EXCH_OUT in the last RESIN functions block are connected to the module
QCRSV that handles the reservation function in the own bay. The value to the input EXCH_IN
on the first RESIN module in the chain has the integer value 5. This is provided by the use of
instance number one of the function block RESIN (RE01-), where the input EXCH_IN is set to
#5, but is hidden for the user.
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Apparatus control (APC) Chapter 11
Control
RE01-
RESIN
BAY_ACK ACK_F_B
Bay 1 BAY_VAL ANY_ACK
BAY_RES VALID_TX
RE_RQ_B
V_RE_RQ
EXCH_OUT
RE02-
RESIN
EXCH_IN ACK_F_B
BAY_ACK ANY_ACK
Bay 2 BAY_VAL VALID_TX
BAY_RES RE_RQ_B
V_RE_RQ
EXCH_OUT
REnn-
RESIN
EXCH_IN ACK_F_B
BAY_ACK ANY_ACK
CR01-
Bay n BAY_VAL VALID_TX
BAY_RES RE_RQ_B QCRSV
V_RE_RQ
EXCH_OUT RES_DATA
en05000090.vsd
RE01-
RESIN
BAY_ACK ACK_F_B
BAY_VAL ANY_ACK
BAY_RES VALID_TX
RE_RQ_B
V_RE_RQ
EXCH_OUT
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Table 181: Output signals for the RESIN (RE01-) function block
Signal Description
ACK_F_B All other bays have acknow. the reserv. req. from this bay
ANY_ACK Any other bay has acknow. the reserv. req. from this bay
VALID_TX The reserv. and acknow. signals from other bays are valid
RE_RQ_B Request from other bay to reserve this bay
V_RE_RQ Check if the request of reserving this bay is valid
EXCH_OUT Used for exchange signals between different ResIn blocks
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4 Interlocking
4.1 Introduction
The interlocking function blocks the possibility to operate high-voltage switching devices, for
instance when a disconnector is under load, in order to prevent material damage and/or acciden-
tal human injury.
Each control IED has interlocking functions for different switchyard arrangements, each han-
dling the interlocking of one bay. The function is distributed to each control IED and not depen-
dent on any central function. For the station-wide interlocking, the IEDs communicate via the
station bus or by using hard wired binary inputs/outputs.
The interlocking conditions depend on the circuit configuration and status of the installation at
any given time.
The reservation function (see section 3 "Apparatus control (APC)") is used to ensure that HV
apparatuses that might affect the interlock are blocked during the time gap, which arises between
position updates. This can be done by means of the communication system, reserving all HV ap-
paratuses that might influence the interlocking condition of the intended operation. The reserva-
tion is maintained until the operation is performed.
After the selection and reservation of an apparatus, the function has complete data on the status
of all apparatuses in the switchyard that are affected by the selection. Other operators cannot in-
terfere with the reserved apparatus or the status of switching devices that may affect it.
The open or closed positions of the HV apparatuses are inputs to software modules distributed
in the control IEDs. Each module contains the interlocking logic for a bay. The interlocking log-
ic in a module is different, depending on the bay function and the switchyard arrangements, that
is, double-breaker or 1 1/2 breaker bays have different modules. Specific interlocking conditions
and connections between standard interlocking modules are performed with an engineering tool.
Bay-level interlocking signals can include the following kind of information:
The interlocking module is connected to the surrounding functions within a bay as shown in fig-
ure 185.
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Interlocking Chapter 11
Control
Apparatus control
Interlocking
modules
modules in
SCILO SCSWI SXSWI
other bays
Apparatus control
modules
Interlocking SCILO SCSWI SXCBR
module
Apparatus control
modules
en04000526.vsd SCILO SCSWI SXSWI
Bays communicate via the station bus and can convey information regarding the following:
• Unearthed busbars
• Busbars connected together
• Other bays connected to a busbar
• Received data from other bays is valid
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Interlocking Chapter 11
Control
Station bus
Disc QB1 and QB2 closed Disc QB1 and QB2 closed WA1 unearthed
WA1 unearthed
WA1 and WA2 interconn
WA1 not earthed WA1 not earthed
WA2 not earthed
WA1 and WA2 interconn
... WA2 not earthed
WA1 and WA2 interconn
WA1 and WA2 interconn
in other bay
..
WA1
WA2
QB1 QB2 QB1 QB2 QB1 QB2 QC1 QC2
QB9 QB9
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Figure 186: Data exchange between interlocking modules.
When invalid data such as intermediate position, loss of a control terminal, or input board error
are used as conditions for the interlocking condition in a bay, a release for execution of the func-
tion will not be given.
On the station HMI an override function exists, which can be used to bypass the interlocking
function in cases where not all the data required for the condition is valid.
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Interlocking Chapter 11
Control
To make the implementation of the interlocking function easier, a number of standardized and
tested software interlocking modules containing logic for the interlocking conditions are avail-
able:
The interlocking conditions can be altered, to meet the customers specific requirements, by add-
ing configurable logic by means of the graphical configuration tool PCM 600. The inputs
Qx_EXy on the interlocking modules are used to add these specific conditions.
The input signals EXDU_xx shall be set to true if there is no transmission error at the transfer
of information from other bays. Required signals with designations ending in TR are intended
for transfer to other bays.
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Interlocking Chapter 11
Control
POSOPEN SCILO
POSCLOSE =1 1
EN_OPEN
&
>1
&
OPEN_EN
CLOSE_EN & EN_CLOSE
>1
&
en04000525.vsd
CI01-
SCILO
POSOPEN EN_OPEN
POSCLOSE EN_CLOSE
OPEN_EN
CLOSE_EN
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Table 184: Output signals for the SCILO (CI01-) function block
Signal Description
EN_OPEN Open operation at closed or interm. or bad pos. is enabled
EN_CLOSE Close operation at open or interm. or bad pos. is enabled
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Interlocking Chapter 11
Control
W A1 (A)
W A2 (B)
W A7 (C)
QB1 QB2 QB7
QC1
QA1
QC2
QB9
QC9
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Interlocking Chapter 11
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IF01-
ABC_LINE
QA1_OP QA1CLREL
QA1_CL QA1CLIT L
QB9_OP QB9REL
QB9_CL QB9IT L
QB1_OP QB1REL
QB1_CL QB1IT L
QB2_OP QB2REL
QB2_CL QB2IT L
QB7_OP QB7REL
QB7_CL QB7IT L
QC1_OP QC1REL
QC1_CL QC1IT L
QC2_OP QC2REL
QC2_CL QC2IT L
QC9_OP QC9REL
QC9_CL QC9IT L
QC11_OP QB1OPT R
QC11_CL QB1CLT R
QC21_OP QB2OPT R
QC21_CL QB2CLT R
QC71_OP QB7OPT R
QC71_CL QB7CLT R
BB7_D_OP QB12OPT R
BC_12_CL QB12CLT R
BC_17_OP VPQB1T R
BC_17_CL VPQB2T R
BC_27_OP VPQB7T R
BC_27_CL VPQB12T R
VOLT _OFF
VOLT _ON
VP_BB7_D
VP_BC_12
VP_BC_17
VP_BC_27
EXDU_ES
EXDU_BPB
EXDU_BC
QB9_EX1
QB9_EX2
QB1_EX1
QB1_EX2
QB1_EX3
QB2_EX1
QB2_EX2
QB2_EX3
QB7_EX1
QB7_EX2
QB7_EX3
QB7_EX4
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Interlocking Chapter 11
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ABC_LINE
QA1_OP
QA1_CL =1 VPQA1
QB9_OP
QB9_CL =1 VPQB9
QA1CLREL
QB1_OP
QB1_CL =1 VPQB1 QA1CLITL
& 1
QB2_OP
QB2_CL =1 VPQB2
QB7_OP
QB7_CL =1 VPQB7
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC9_OP
QC9_CL =1 VPQC9
QC11_OP
QC11_CL =1 VPQC11
QC21_OP
QC21_CL =1 VPQC21
QC71_OP
QC71_CL =1 VPQC71
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQA1
VPQC1 QB9REL
VPQC2 & >1
QB9ITL
1
VPQC9
QA1_OP
QC1_OP
QC2_OP
QC9_OP
QB9_EX1
VPQC2
VPQC9
&
QC2_CL
QC9_CL
QB9_EX2
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Control
QB1REL
VPQA1 & ≥1
VPQB2
VPQC1 1 QB1ITL
VPQC2
VPQC11
QA1_OP
QB2_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQB2 &
VP_BC_12
QB2_CL
BC_12_CL
EXDU_BC
QB1_EX2
VPQC1 &
VPQC11
QC1_CL
QC11_CL
EXDU_ES
QB1EX3
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QB2REL
VPQA1 & ≥1
VPQB1
VPQC1 1 QB2ITL
VPQC2
VPQC21
QA1_OP
QB1_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQB1 &
VP_BC_12
QB1_CL
BC_12_CL
EXDU_BC
QB2_EX2
VPQC1 &
VPQC21
QC1_CL
QC21_CL
EXDU_ES
QB2_EX3
en04000529.vsd
380
Interlocking Chapter 11
Control
VPQC9 QB7REL
& >1
VPQC71
VP_BB7_D 1 QB7ITL
VP_BC_17
VP_BC_27
QC9_OP
QC71_OP
EXDU_ES
BB7_D_OP
EXDU_BPB
BC_17_OP
BC_27_OP
EXDU_BC
QB7_EX1
VPQA1
VPQB1
VPQC9
&
VPQB9
VPQC71
VP_BB7_D
VP_BC_17
QA1_CL
QB1_CL
QC9_OP
QB9_CL
QC71_OP
EXDU_ES
BB7_D_OP
EXDU_BPB
BC_17_CL
EXDU_BC
QB7_EX2
381
Interlocking Chapter 11
Control
VPQA1
VPQB2
& >1
VPQC9
VPQB9
VPQC71
VP_BB7_D
VP_BC_27
QA1_CL
QB2_CL
QC9_OP
QB9_CL
QC71_OP
EXDU_ES
BB7_D_OP
EXDU_BPB
BC_27_CL
EXDU_BC
QB7_EX3
VPQC9
VPQC71
&
QC9_CL
QC71_CL
EXDU_ES
QB7_EX4
VPQB1 QC1REL
VPQB2 QC1ITL
VPQB9 & 1
QC2REL
QB1_OP
QB2_OP QC2ITL
1
QB9_OP
VPQB7
VPQB9 QC9REL
VPVOLT &
QC9ITL
QB7_OP 1
QB9_OP
VOLT_OFF
en04000531.vsd
382
Interlocking Chapter 11
Control
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
QB7_OP QB7OPTR
QB7_CL QB7CLTR
VPQB7 VPQB7TR
QB1_OP QB12OPTR
QB2_OP >1 QB12CLTR
VPQB1 1
VPQB12TR
VPQB2 &
en04000532.vsd
383
Interlocking Chapter 11
Control
Signal Description
QC71_OP Earthing switch QC71 on busbar WA7 is in open position
QC71_CL Earthing switch QC71 on busbar WA7 is in closed position
BB7_D_OP Disconnectors on busbar WA7 except in the own bay are open
BC_12_CL A bus coupler connection exists between busbar WA1 and WA2
BC_17_OP No bus coupler connection exists between busbar WA1 and
WA7
BC_17_CL A bus coupler connection exists between busbar WA1 and WA7
BC_27_OP No bus coupler connection exists between busbar WA2 and
WA7
BC_27_CL A bus coupler connection exists between busbar WA2 and WA7
VOLT_OFF There is no voltage on the line and not VT (fuse) failure
VOLT_ON There is voltage on the line or there is a VT (fuse) failure
VP_BB7_D Switch status of the disconnectors on busbar WA7 are valid
VP_BC_12 Status of the bus coupler app. between WA1 and WA2 are valid
VP_BC_17 Status of the bus coupler app. between WA1 and WA7 are valid
VP_BC_27 Status of the bus coupler app. between WA2 and WA7 are valid
EXDU_ES No transm error from any bay containing earthing switches
EXDU_BPB No transm error from any bay with disconnectors on WA7
EXDU_BC No transmission error from any bus coupler bay
QB9_EX1 External condition for apparatus QB9
QB9_EX2 External condition for apparatus QB9
QB1_EX1 External condition for apparatus QB1
QB1_EX2 External condition for apparatus QB1
QB1_EX3 External condition for apparatus QB1
QB2_EX1 External condition for apparatus QB2
QB2_EX2 External condition for apparatus QB2
QB2_EX3 External condition for apparatus QB2
QB7_EX1 External condition for apparatus QB7
QB7_EX2 External condition for apparatus QB7
QB7_EX3 External condition for apparatus QB7
QB7_EX4 External condition for apparatus QB7
384
Interlocking Chapter 11
Control
Table 186: Output signals for the ABC_LINE (IF01-) function block
Signal Description
QA1CLREL Closing of QA1 is allowed
QA1CLITL Closing of QA1 is forbidden
QB9REL Switching of QB9 is allowed
QB9ITL Switching of QB9 is forbidden
QB1REL Switching of QB1 is allowed
QB1ITL Switching of QB1 is forbidden
QB2REL Switching of QB2 is allowed
QB2ITL Switching of QB2 is forbidden
QB7REL Switching of QB7 is allowed
QB7ITL Switching of QB7 is forbidden
QC1REL Switching of QC1 is allowed
QC1ITL Switching of QC1 is forbidden
QC2REL Switching of QC2 is allowed
QC2ITL Switching of QC2 is forbidden
QC9REL Switching of QC9 is allowed
QC9ITL Switching of QC9 is forbidden
QB1OPTR QB1 is in open position
QB1CLTR QB1 is in closed position
QB2OPTR QB2 is in open position
QB2CLTR QB2 is in closed position
QB7OPTR QB7 is in open position
QB7CLTR QB7 is in closed position
QB12OPTR QB1 or QB2 or both are in open position
QB12CLTR QB1 and QB2 are not in open position
VPQB1TR Switch status of QB1 is valid (open or closed)
VPQB2TR Switch status of QB2 is valid (open or closed)
VPQB7TR Switch status of QB7 is valid (open or closed)
VPQB12TR Switch status of QB1 and QB2 are valid (open or closed)
385
Interlocking Chapter 11
Control
WA1 (A)
WA2 (B)
WA7 (C)
QB1 QB2 QB20 QB7
QC1
QA1
QC2
en04000514.vsd
386
Interlocking Chapter 11
Control
IG01-
ABC_BC
QA1_OP QA1OPREL
QA1_CL QA1OPIT L
QB1_OP QA1CLREL
QB1_CL QA1CLIT L
QB2_OP QB1REL
QB2_CL QB1IT L
QB7_OP QB2REL
QB7_CL QB2IT L
QB20_OP QB7REL
QB20_CL QB7IT L
QC1_OP QB20REL
QC1_CL QB20IT L
QC2_OP QC1REL
QC2_CL QC1IT L
QC11_OP QC2REL
QC11_CL QC2IT L
QC21_OP QB1OPT R
QC21_CL QB1CLT R
QC71_OP QB220OT R
QC71_CL QB220CT R
BBT R_OP QB7OPT R
BC_12_CL QB7CLT R
VP_BBT R QB12OPT R
VP_BC_12 QB12CLT R
EXDU_ES BC12OPT R
EXDU_12 BC12CLT R
EXDU_BC BC17OPT R
QA1O_EX1 BC17CLT R
QA1O_EX2 BC27OPT R
QA1O_EX3 BC27CLT R
QB1_EX1 VPQB1T R
QB1_EX2 VQB220T R
QB1_EX3 VPQB7T R
QB2_EX1 VPQB12T R
QB2_EX2 VPBC12T R
QB2_EX3 VPBC17T R
QB20_EX1 VPBC27T R
QB20_EX2
QB7_EX1
QB7_EX2
en05000350.vsd
387
Interlocking Chapter 11
Control
ABC_BC
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB20_OP
QB20_CL =1 VPQB20
QB7_OP
QB7_CL =1 VPQB7
QB2_OP
QB2_CL =1 VPQB2
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC11_OP
QC11_CL =1 VPQC11
QC21_OP
QC21_CL =1 VPQC21
QC71_OP
QC71_CL =1 VPQC71
VPQB1
QB1_OP QA1OPREL
& >1 QA1OPITL
QA1O_EX1 1
VPQB20
QB20_OP &
QA1O_EX2
VP_BBTR
BBTR_OP &
EXDU_12
QA1O_EX3
VPQB1 QA1CLREL
VPQB2 QA1CLITL
VPQB7 & 1
VPQB20
en04000533.vsd
388
Interlocking Chapter 11
Control
VPQA1
VPQB2 QB1REL
& >1
VPQC1 QB1ITL
VPQC2 1
VPQC11
QA1_OP
QB2_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQB2
VP_BC_12
&
QB2_CL
BC_12_CL
EXDU_BC
QB1_EX2
VPQC1
VPQC11
&
QC1_CL
QC11_CL
EXDU_ES
QB1_EX3
en04000534.vsd
389
Interlocking Chapter 11
Control
VPQA1
VPQB1 QB2REL
& >1
VPQC1 QB2ITL
VPQC2 1
VPQC21
QA1_OP
QB1_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQB1
VP_BC_12
&
QB1_CL
BC_12_CL
EXDU_BC
QB2_EX2
VPQC1
VPQC21
&
QC1_CL
QC21_CL
EXDU_ES
QB2_EX3
en04000535.vsd
390
Interlocking Chapter 11
Control
VPQA1
VPQB20 QB7REL
& >1
VPQC1 QB7ITL
VPQC2 1
VPQC71
QA1_OP
QB20_OP
QC1_OP
QC2_OP
QC71_OP
EXDU_ES
QB7_EX1
VPQC2
VPQC71
&
QC2_CL
QC71_CL
EXDU_ES
QB7_EX2
VPQA1
VPQB7 QB20REL
& >1
VPQC1 QB20ITL
VPQC2 1
VPQC21
QA1_OP
QB7_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB20_EX1
VPQC2
VPQC21
&
QC2_CL
QC21_CL
EXDU_ES
QB20_EX2
en04000536.vsd
391
Interlocking Chapter 11
Control
VPQB1 QC1REL
VPQB20 QC1ITL
& 1
VPQB7
QC2REL
VPQB2
QB1_OP QC2ITL
1
QB20_OP
QB7_OP
QB2_OP
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB20_OP QB220OTR
QB2_OP & QB220CTR
VPQB20 1
VQB220TR
VPQB2 &
QB7_OP QB7OPTR
QB7_CL QB7CLTR
VPQB7 VPQB7TR
QB1_OP QB12OPTR
QB2_OP >1 QB12CLTR
VPQB1 1
VPQB12TR
VPQB2 &
QA1_OP BC12OPTR
QB1_OP >1 BC12CLTR
QB20_OP 1
VPQA1
VPBC12TR
VPQB1 &
VPQB20
QA1_OP BC17OPTR
QB1_OP >1 BC17CLTR
QB7_OP 1
VPQA1
VPBC17TR
VPQB1 &
VPQB7
QA1_OP BC27OPTR
QB2_OP >1 BC27CLTR
QB7_OP 1
VPQA1
VPBC27TR
VPQB2 &
VPQB7
en04000537.vsd
392
Interlocking Chapter 11
Control
393
Interlocking Chapter 11
Control
Signal Description
QB2_EX3 External condition for apparatus QB2
QB20_EX1 External condition for apparatus QB20
QB20_EX2 External condition for apparatus QB20
QB7_EX1 External condition for apparatus QB7
QB7_EX2 External condition for apparatus QB7
Table 188: Output signals for the ABC_BC (IG01-) function block
Signal Description
QA1OPREL Opening of QA1 is allowed
QA1OPITL Opening of QA1 is forbidden
QA1CLREL Closing of QA1 is allowed
QA1CLITL Closing of QA1 is forbidden
QB1REL Switching of QB1 is allowed
QB1ITL Switching of QB1 is forbidden
QB2REL Switching of QB2 is allowed
QB2ITL Switching of QB2 is forbidden
QB7REL Switching of QB7 is allowed
QB7ITL Switching of QB7 is forbidden
QB20REL Switching of QB20 is allowed
QB20ITL Switching of QB20 is forbidden
QC1REL Switching of QC1 is allowed
QC1ITL Switching of QC1 is forbidden
QC2REL Switching of QC2 is allowed
QC2ITL Switching of QC2 is forbidden
QB1OPTR QB1 is in open position
QB1CLTR QB1 is in closed position
QB220OTR QB2 and QB20 are in open position
QB220CTR QB2 or QB20 or both are not in open position
QB7OPTR QB7 is in open position
QB7CLTR QB7 is in closed position
QB12OPTR QB1 or QB2 or both are in open position
QB12CLTR QB1 and QB2 are not in open position
BC12OPTR No connection via the own bus coupler between WA1 and WA2
BC12CLTR Conn. exists via the own bus coupler between WA1 and WA2
BC17OPTR No connection via the own bus coupler between WA1 and WA7
BC17CLTR Conn. exists via the own bus coupler between WA1 and WA7
BC27OPTR No connection via the own bus coupler between WA2 and WA7
BC27CLTR Conn. exists via the own bus coupler between WA2 and WA7
394
Interlocking Chapter 11
Control
Signal Description
VPQB1TR Switch status of QB1 is valid (open or closed)
VQB220TR Switch status of QB2 and QB20 are valid (open or closed)
VPQB7TR Switch status of QB7 is valid (open or closed)
VPQB12TR Switch status of QB1 and QB2 are valid (open or closed)
VPBC12TR Status of the bus coupler app. between WA1 and WA2 are valid
VPBC17TR Status of the bus coupler app. between WA1 and WA7 are valid
VPBC27TR Status of the bus coupler app. between WA2 and WA7 are valid
WA1 (A)
WA2 (B)
QB1 QB2
QC1
QA1
AB_TRAFO
QC2
QC3
QA2
QA2 and QC4 are not
QC4 used in this interlocking
QB3 QB4
en04000515.vsd
395
Interlocking Chapter 11
Control
IE01-
AB_TRAFO
QA1_OP QA1CLREL
QA1_CL QA1CLIT L
QB1_OP QB1REL
QB1_CL QB1IT L
QB2_OP QB2REL
QB2_CL QB2IT L
QC1_OP QC1REL
QC1_CL QC1IT L
QC2_OP QC2REL
QC2_CL QC2IT L
QB3_OP QB1OPT R
QB3_CL QB1CLT R
QB4_OP QB2OPT R
QB4_CL QB2CLT R
QC3_OP QB12OPT R
QC3_CL QB12CLT R
QC11_OP VPQB1T R
QC11_CL VPQB2T R
QC21_OP VPQB12T R
QC21_CL
BC_12_CL
VP_BC_12
EXDU_ES
EXDU_BC
QA1_EX1
QA1_EX2
QA1_EX3
QB1_EX1
QB1_EX2
QB1_EX3
QB2_EX1
QB2_EX2
QB2_EX3
en05000358.vsd
396
Interlocking Chapter 11
Control
AB_TRAFO
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB2_OP
QB2_CL =1 VPQB2
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QB3_OP
QB3_CL =1 VPQB3
QB4_OP
QB4_CL =1 VPQB4
QC3_OP
QC3_CL =1 VPQC3
QC11_OP
QC11_CL =1 VPQC11
QC21_OP
QC21_CL =1 VPQC21
VPQB1 QA1CLREL
VPQB2 QA1CLITL
VPQC1 & 1
VPQC2
VPQB3
VPQB4
VPQC3
QA1_EX2
QC3_OP
QA1_EX3
QC1_CL >1
QC2_CL
QC3_CL &
QA1_EX1
en04000538.vsd
397
Interlocking Chapter 11
Control
VPQA1
VPQB2 QB1REL
& >1
VPQC1 QB1ITL
VPQC2 1
VPQC3
VPQC11
QA1_OP
QB2_OP
QC1_OP
QC2_OP
QC3_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQB2
VPQC3
&
VP_BC_12
QB2_CL
QC3_OP
BC_12_CL
EXDU_BC
QB1_EX2
VPQC1
VPQC2
&
VPQC3
VPQC11
QC1_CL
QC2_CL
QC3_CL
QC11_CL
EXDU_ES
QB1_EX3
en04000539.vsd
398
Interlocking Chapter 11
Control
VPQA1
VPQB1 QB2REL
& >1
VPQC1 QB2ITL
VPQC2 1
VPQC3
VPQC21
QA1_OP
QB1_OP
QC1_OP
QC2_OP
QC3_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQB1
VPQC3
&
VP_BC_12
QB1_CL
QC3_OP
BC_12_CL
EXDU_BC
QB2_EX2
VPQC1
VPQC2
&
VPQC3
VPQC21
QC1_CL
QC2_CL
QC3_CL
QC21_CL
EXDU_ES
QB2_EX3
en04000540.vsd
399
Interlocking Chapter 11
Control
VPQB1 QC1REL
VPQB2 QC1ITL
& 1
VPQB3
QC2REL
VPQB4
QB1_OP QC2ITL
1
QB2_OP
QB3_OP
QB4_OP
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
QB1_OP QB12OPTR
QB2_OP >1 QB12CLTR
VPQB1 1
VPQB12TR
VPQB2 &
en04000541.vsd
400
Interlocking Chapter 11
Control
Signal Description
QC11_CL QC11 on busbar WA1 is in closed position
QC21_OP QC21 on busbar WA2 is in open position
QC21_CL QC21 on busbar WA2 is in closed position
BC_12_CL A bus coupler connection exists between busbar WA1 and WA2
VP_BC_12 Status of the bus coupler app. between WA1 and WA2 are valid
EXDU_ES No transm error from any bay containing earthing switches
EXDU_BC No transmission error from any bus coupler bay
QA1_EX1 External condition for apparatus QA1
QA1_EX2 External condition for apparatus QA1
QA1_EX3 External condition for apparatus QA1
QB1_EX1 External condition for apparatus QB1
QB1_EX2 External condition for apparatus QB1
QB1_EX3 External condition for apparatus QB1
QB2_EX1 External condition for apparatus QB2
QB2_EX2 External condition for apparatus QB2
QB2_EX3 External condition for apparatus QB2
Table 190: Output signals for the AB_TRAFO (IE01-) function block
Signal Description
QA1CLREL Closing of QA1 is allowed
QA1CLITL Closing of QA1 is forbidden
QB1REL Switching of QB1 is allowed
QB1ITL Switching of QB1 is forbidden
QB2REL Switching of QB2 is allowed
QB2ITL Switching of QB2 is forbidden
QC1REL Switching of QC1 is allowed
QC1ITL Switching of QC1 is forbidden
QC2REL Switching of QC2 is allowed
QC2ITL Switching of QC2 is forbidden
QB1OPTR QB1 is in open position
QB1CLTR QB1 is in closed position
QB2OPTR QB2 is in open position
QB2CLTR QB2 is in closed position
QB12OPTR QB1 or QB2 or both are in open position
QB12CLTR QB1 and QB2 are not in open position
VPQB1TR Switch status of QB1 is valid (open or closed)
VPQB2TR Switch status of QB2 is valid (open or closed)
VPQB12TR Switch status of QB1 and QB2 are valid (open or closed)
401
Interlocking Chapter 11
Control
QA1
QC3 QC4
en04000516.vsd
A1A2_BS
402
Interlocking Chapter 11
Control
IH01-
A1A2_BS
QA1_OP QA1OPREL
QA1_CL QA1OPIT L
QB1_OP QA1CLREL
QB1_CL QA1CLIT L
QB2_OP QB1REL
QB2_CL QB1IT L
QC3_OP QB2REL
QC3_CL QB2IT L
QC4_OP QC3REL
QC4_CL QC3IT L
S1QC1_OP QC4REL
S1QC1_CL QC4IT L
S2QC2_OP S1S2OPT R
S2QC2_CL S1S2CLT R
BBT R_OP QB1OPT R
VP_BBT R QB1CLT R
EXDU_12 QB2OPT R
EXDU_ES QB2CLT R
QA1O_EX1 VPS1S2T R
QA1O_EX2 VPQB1T R
QA1O_EX3 VPQB2T R
QB1_EX1
QB1_EX2
QB2_EX1
QB2_EX2
en05000348.vsd
403
Interlocking Chapter 11
Control
A1A2_BS
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB2_OP
QB2_CL =1 VPQB2
QC3_OP
QC3_CL =1 VPQC3
QC4_OP
QC4_CL =1 VPQC4
S1QC1_OP
S1QC1_CL =1 VPS1QC1
S2QC2_OP
S2QC2_CL =1 VPS2QC2
VPQB1
QB1_OP QA1OPREL
& >1
QA1O_EX1 QA1OPITL
1
VPQB2
QB2_OP
&
QA1O_EX2
VP_BBTR
BBTR_OP
&
EXDU_12
QA1O_EX3
VPQB1 QA1CLREL
VPQB2 & QA1CLITL
1
VPQA1
VPQC3 QB1REL
& >1
VPQC4 QB1ITL
1
VPS1QC1
QA1_OP
QC3_OP
QC4_OP
S1QC1_OP
EXDU_ES
QB1_EX1
VPQC3
VPS1QC1
&
QC3_CL
S1QC1_CL
EXDU_ES
QB1_EX2
en04000542.vsd
404
Interlocking Chapter 11
Control
VPQA1
VPQC3 QB2REL
VPQC4 & >1
QB2ITL
VPS2QC2 1
QA1_OP
QC3_OP
QC4_OP
S2QC2_OP
EXDU_ES
QB2_EX1
VPQC4
VPS2QC2
&
QC4_CL
S2QC2_CL
EXDU_ES
QB2_EX2
VPQB1 QC3REL
VPQB2 QC3ITL
QB1_OP & 1
QC4REL
QB2_OP
QC4ITL
1
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
QB1_OP S1S2OPTR
QB2_OP >1 S1S2CLTR
QA1_OP 1
VPQB1
VPS1S2TR
VPQB2 &
VPQA1
en04000543.vsd
405
Interlocking Chapter 11
Control
Table 192: Output signals for the A1A2_BS (IH01-) function block
Signal Description
QA1OPREL Opening of QA1 is allowed
QA1OPITL Opening of QA1 is forbidden
QA1CLREL Closing of QA1 is allowed
QA1CLITL Closing of QA1 is forbidden
QB1REL Switching of QB1 is allowed
QB1ITL Switching of QB1 is forbidden
QB2REL Switching of QB2 is allowed
QB2ITL Switching of QB2 is forbidden
406
Interlocking Chapter 11
Control
Signal Description
QC3REL Switching of QC3 is allowed
QC3ITL Switching of QC3 is forbidden
QC4REL Switching of QC4 is allowed
QC4ITL Switching of QC4 is forbidden
S1S2OPTR No bus section connection between bus section 1 and 2
S1S2CLTR Bus coupler connection between bus section 1 and 2 exists
QB1OPTR QB1 is in open position
QB1CLTR QB1 is in closed position
QB2OPTR QB2 is in open position
QB2CLTR QB2 is in closed position
VPS1S2TR Status of the app. between bus section 1 and 2 are valid
VPQB1TR Switch status of QB1 is valid (open or closed)
VPQB2TR Switch status of QB2 is valid (open or closed)
QB
WA1 (A1) WA2 (A2)
QC1 QC2
A1A2_DC en04000492.vsd
407
Interlocking Chapter 11
Control
II01-
A1A2_DC
QB_OP QBOPREL
QB_CL QBOPIT L
S1QC1_OP QBCLREL
S1QC1_CL QBCLIT L
S2QC2_OP DCOPT R
S2QC2_CL DCCLT R
S1DC_OP VPDCT R
S2DC_OP
VPS1_DC
VPS2_DC
EXDU_ES
EXDU_BB
QBCL_EX1
QBCL_EX2
QBOP_EX1
QBOP_EX2
QBOP_EX3
en05000349.vsd
408
Interlocking Chapter 11
Control
A1A2_DC
QB_OP
VPQB VPDCTR
QB_CL =1
DCOPTR
DCCLTR
S1QC1_OP
VPS1QC1
S1QC1_CL =1
S2QC2_OP
VPS2QC2
S2QC2_CL =1
VPS1QC1
VPS2QC2
VPS1_DC & >1 QBOPREL
S1QC1_OP QBOPITL
1
S2QC2_OP
S1DC_OP
EXDU_ES
EXDU_BB
QBOP_EX1
VPS1QC1
VPS2QC2
VPS2_DC &
S1QC1_OP
S2QC2_OP
S2DC_OP
EXDU_ES
EXDU_BB
QBOP_EX2
VPS1QC1
VPS2QC2
S1QC1_CL &
S2QC2_CL
EXDU_ES
QBOP_EX3
en04000544.vsd
409
Interlocking Chapter 11
Control
410
Interlocking Chapter 11
Control
Table 194: Output signals for the A1A2_DC (II01-) function block
Signal Description
QBOPREL Opening of QB is allowed
QBOPITL Opening of QB is forbidden
QBCLREL Closing of QB is allowed
QBCLITL Closing of QB is forbidden
DCOPTR The bus section disconnector is in open position
DCCLTR The bus section disconnector is in closed position
VPDCTR Switch status of QB is valid (open or closed)
QC
en04000504.vsd
IJ01-
BB_ES
QC_OP QCREL
QC_CL QCITL
BB_DC_OP BBESOPTR
VP_BB_DC BBESCLTR
EXDU_BB
en05000347.vsd
411
Interlocking Chapter 11
Control
BB_ES
VP_BB_DC QCREL
BB_DC_OP QCITL
EXDU_BB & 1
QC_OP BBESOPTR
QC_CL BBESCLTR
en04000546.vsd
Table 196: Output signals for the BB_ES (IJ01-) function block
Signal Description
QCREL Switching of QC is allowed
QCITL Switching of QC is forbidden
BBESOPTR QC on this busbar part is in open position
BBESCLTR QC on this busbar part is in closed position
412
Interlocking Chapter 11
Control
WA1 (A)
WA2 (B)
QB1 QB2
QC1 QC4
QA1 QA2
DB_BUS_A DB_BUS_B
QC2 QC5
QB61 QB62
QC3
QB9
DB_LINE
QC9
en04000518.vsd
Three types of interlocking modules per double circuit breaker bay are defined. DB_LINE is the
connection from the line to the circuit breaker parts that are connected to the busbars.
DB_BUS_A and DB_BUS_B are the connections from the line to the busbars.
413
Interlocking Chapter 11
Control
IB01-
DB_BUS_A
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB1_OP QB61REL
QB1_CL QB61ITL
QB61_OP QB1REL
QB61_CL QB1ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
QC3_OP QB1OPTR
QC3_CL QB1CLTR
QC11_OP VPQB1TR
QC11_CL
EXDU_ES
QB61_EX1
QB61_EX2
QB1_EX1
QB1_EX2
en05000354.vsd
IA01-
DB_LINE
QA1_OP QB9REL
QA1_CL QB9ITL
QA2_OP QC3REL
QA2_CL QC3ITL
QB61_OP QC9REL
QB61_CL QC9ITL
QC1_OP
QC1_CL
QC2_OP
QC2_CL
QB62_OP
QB62_CL
QC4_OP
QC4_CL
QC5_OP
QC5_CL
QB9_OP
QB9_CL
QC3_OP
QC3_CL
QC9_OP
QC9_CL
VOLT_OFF
VOLT_ON
QB9_EX1
QB9_EX2
QB9_EX3
QB9_EX4
QB9_EX5
en05000356.vsd
414
Interlocking Chapter 11
Control
IC01-
DB_BUS_B
QA2_OP QA2CLREL
QA2_CL QA2CLITL
QB2_OP QB62REL
QB2_CL QB62ITL
QB62_OP QB2REL
QB62_CL QB2ITL
QC4_OP QC4REL
QC4_CL QC4ITL
QC5_OP QC5REL
QC5_CL QC5ITL
QC3_OP QB2OPTR
QC3_CL QB2CLTR
QC21_OP VPQB2TR
QC21_CL
EXDU_ES
QB62_EX1
QB62_EX2
QB2_EX1
QB2_EX2
en05000355.vsd
415
Interlocking Chapter 11
Control
DB_BUS_A
QA1_OP
QA1_CL =1 VPQA1
QB61_OP
QB61_CL =1 VPQB61
QB1_OP
QB1_CL =1 VPQB1
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC3_OP
QC3_CL =1 VPQC3
QC11_OP
QC11_CL =1 VPQC11
VPQB61 QA1CLREL
VPQB1 & QA1CLITL
1
VPQA1
VPQC1 QB61REL
& >1
VPQC2 QB61ITL
1
VPQC3
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QB61_EX1
VPQC2
VPQC3
&
QC2_CL
QC3_CL
QB61_EX2
VPQA1
VPQC1 QB1REL
& >1
VPQC2 QB1ITL
1
VPQC11
QA1_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQC1
VPQC11
&
QC1_CL
QC11_CL
EXDU_ES
QB1_EX2
en04000547.vsd
416
Interlocking Chapter 11
Control
VPQB61 QC1REL
VPQB1 QC1ITL
& 1
QB61_OP QC2REL
QB1_OP QC2ITL
1
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
en04000548.vsd
417
Interlocking Chapter 11
Control
DB_LINE
QA1_OP
QA1_CL =1 VPQA1
QA2_OP
QA2_CL =1 VPQA2
QB61_OP
QB61_CL =1 VPQB61
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QB62_OP
QB62_CL =1 VPQB62
QC4_OP
QC4_CL =1 VPQC4
QC5_OP
QC5_CL =1 VPQC5
QB9_OP
QB9_CL =1 VPQB9
QC3_OP
QC3_CL =1 VPQC3
QC9_OP
QC9_CL =1 VPQC9
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQA1
VPQA2 QB9REL
VPQC1 & >1
QB9ITL
1
VPQC2
VPQC3
VPQC4
VPQC5
VPQC9
QA1_OP
QA2_OP
QC1_OP
QC2_OP
QC3_OP
QC4_OP
QC5_OP
QC9_OP
QB9_EX1
& en04000549.vsd
418
Interlocking Chapter 11
Control
VPQA1
VPQC1
VPQC2 & >1
VPQC3
VPQC9
VPQB62
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QC9_OP
QB62_OP
QB9_EX2
VPQA2
VPQB61
&
VPQC3
VPQC4
VPQC5
VPQC9
QA2_OP
QB61_OP
QC3_OP
QC4_OP
QC5_OP
QC9_OP
QB9_EX3
VPQC3
VPQC9
&
VPQB61
VPQB62
QC3_OP
QC9_OP
QB61_OP
QB62_OP
QB9_EX4
VPQC3
VPQC9
&
QC3_CL
QC9_CL
QB9_EX5
en04000550.vsd
419
Interlocking Chapter 11
Control
VPQB61
VPQB62 QC3REL
VPQB9 &
QC3ITL
1
QB61_OP
QB62_OP
QB9_OP
VPQB9
VPVOLT QC9REL
QB9_OP &
QC9ITL
1
VOLT_OFF
en04000551.vsd
420
Interlocking Chapter 11
Control
DB_BUS_B
QA2_OP
QA2_CL =1 VPQA2
QB62_OP
QB62_CL =1 VPQB62
QB2_OP
QB2_CL =1 VPQB2
QC4_OP
QC4_CL =1 VPQC4
QC5_OP
QC5_CL =1 VPQC5
QC3_OP
QC3_CL =1 VPQC3
QC21_OP
QC21_CL =1 VPQC21
VPQB62 QA2CLREL
VPQB2 & QA2CLITL
1
VPQA2
VPQC4 QB62REL
& >1
VPQC5 QB62ITL
1
VPQC3
QA2_OP
QC4_OP
QC5_OP
QC3_OP
QB62_EX1
VPQC5
VPQC3
&
QC5_CL
QC3_CL
QB62_EX2
VPQA2
VPQC4 QB2REL
& >1
VPQC5 QB2ITL
1
VPQC21
QA2_OP
QC4_OP
QC5_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQC4
VPQC21
&
QC4_CL
QC21_CL
EXDU_ES
QB2_EX2
en04000552.vsd
421
Interlocking Chapter 11
Control
VPQB62 QC4REL
VPQB2 QC4ITL
& 1
QB62_OP QC5REL
QB2_OP QC5ITL
1
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
en04000553.vsd
422
Interlocking Chapter 11
Control
Table 198: Output signals for the DB_BUS_A (IB01-) function block
Signal Description
QA1CLREL Closing of QA1 is allowed
QA1CLITL Closing of QA1 is forbidden
QB61REL Switching of QB61 is allowed
QB61ITL Switching of QB61 is forbidden
QB1REL Switching of QB1 is allowed
QB1ITL Switching of QB1 is forbidden
QC1REL Switching of QC1 is allowed
QC1ITL Switching of QC1 is forbidden
QC2REL Switching of QC2 is allowed
QC2ITL Switching of QC2 is forbidden
QB1OPTR QB1 is in open position
QB1CLTR QB1 is in closed position
VPQB1TR Switch status of QB1 is valid (open or closed)
Table 199: Input signals for the DB_LINE (IA01-) function block
Signal Description
QA1_OP QA1 is in open position
QA1_CL QA1 is in closed position
QA2_OP QA2 is in open position
QA2_CL QA2 is in closed position
QB61_OP QB61 is in open position
QB61_CL QB61 is in closed position
QC1_OP QC1 is in open position
QC1_CL QC1 is in closed position
QC2_OP QC2 is in open position
QC2_CL QC2 is in closed position
QB62_OP QB62 is in open position
QB62_CL QB62 is in closed position
QC4_OP QC4 is in open position
QC4_CL QC4 is in closed position
QC5_OP QC5 is in open position
QC5_CL QC5 is in closed position
QB9_OP QB9 is in open position
QB9_CL QB9 is in closed position
QC3_OP QC3 is in open position
QC3_CL QC3 is in closed position
QC9_OP QC9 is in open position
423
Interlocking Chapter 11
Control
Signal Description
QC9_CL QC9 is in closed position
VOLT_OFF There is no voltage on the line and not VT (fuse) failure
VOLT_ON There is voltage on the line or there is a VT (fuse) failure
QB9_EX1 External condition for apparatus QB9
QB9_EX2 External condition for apparatus QB9
QB9_EX3 External condition for apparatus QB9
QB9_EX4 External condition for apparatus QB9
QB9_EX5 External condition for apparatus QB9
Table 200: Output signals for the DB_LINE (IA01-) function block
Signal Description
QB9REL Switching of QB9 is allowed
QB9ITL Switching of QB9 is forbidden
QC3REL Switching of QC3 is allowed
QC3ITL Switching of QC3 is forbidden
QC9REL Switching of QC9 is allowed
QC9ITL Switching of QC9 is forbidden
Table 201: Input signals for the DB_BUS_B (IC01-) function block
Signal Description
QA2_OP QA2 is in open position
QA2_CL QA2 is in closed position
QB2_OP QB2 is in open position
QB2_CL QB2 is in closed position
QB62_OP QB62 is in open position
QB62_CL QB62 is in closed position
QC4_OP QC4 is in open position
QC4_CL QC4 is in closed position
QC5_OP QC5 is in open position
QC5_CL QC5 is in closed position
QC3_OP QC3 is in open position
QC3_CL QC3 is in closed position
QC21_OP Earthing switch QC21 on busbar WA2 is in open position
QC21_CL Earthing switch QC21 on busbar WA2 is in closed position
424
Interlocking Chapter 11
Control
Signal Description
EXDU_ES No transm error from bay containing earthing switch QC21
QB62_EX1 External condition for apparatus QB62
QB62_EX2 External condition for apparatus QB62
QB2_EX1 External condition for apparatus QB2
QB2_EX2 External condition for apparatus QB2
Table 202: Output signals for the DB_BUS_B (IC01-) function block
Signal Description
QA2CLREL Closing of QA2 is allowed
QA2CLITL Closing of QA2 is forbidden
QB62REL Switching of QB62 is allowed
QB62ITL Switching of QB62 is forbidden
QB2REL Switching of QB2 is allowed
QB2ITL Switching of QB2 is forbidden
QC4REL Switching of QC4 is allowed
QC4ITL Switching of QC4 is forbidden
QC5REL Switching of QC5 is allowed
QC5ITL Switching of QC5 is forbidden
QB2OPTR QB2 is in open position
QB2CLTR QB2 is in closed position
VPQB2TR Switch status of QB2 is valid (open or closed)
425
Interlocking Chapter 11
Control
WA1 (A)
WA2 (B)
QB1 QB2
QC1 QC1
QA1 QA1
QC2 QC2
QB6 QB6
QC3 QC3
BH_LINE_A BH_LINE_B
QB9 QB9
QC1 QC2
QC9 QC9
BH_CONN
en04000513.vsd
Three types of interlocking modules per diameter are defined. BH_LINE_A and BH_LINE_B
are the connections from a line to a busbar. BH_CONN is the connection between the two lines
of the diameter in the breaker and a half switchyard layout.
426
Interlocking Chapter 11
Control
IL01-
BH_LINE_A
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB6_OP QB6REL
QB6_CL QB6ITL
QB1_OP QB1REL
QB1_CL QB1ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
QC3_OP QC3REL
QC3_CL QC3ITL
QB9_OP QB9REL
QB9_CL QB9ITL
QC9_OP QC9REL
QC9_CL QC9ITL
CQA1_OP QB1OPTR
CQA1_CL QB1CLTR
CQB61_OP VPQB1TR
CQB61_CL
CQC1_OP
CQC1_CL
CQC2_OP
CQC2_CL
QC11_OP
QC11_CL
VOLT_OFF
VOLT_ON
EXDU_ES
QB6_EX1
QB6_EX2
QB1_EX1
QB1_EX2
QB9_EX1
QB9_EX2
QB9_EX3
QB9_EX4
QB9_EX5
QB9_EX6
QB9_EX7
en05000352.vsd
427
Interlocking Chapter 11
Control
IM01-
BH_LINE_B
QA1_OP QA1CLREL
QA1_CL QA1CLIT L
QB6_OP QB6REL
QB6_CL QB6IT L
QB2_OP QB2REL
QB2_CL QB2IT L
QC1_OP QC1REL
QC1_CL QC1IT L
QC2_OP QC2REL
QC2_CL QC2IT L
QC3_OP QC3REL
QC3_CL QC3IT L
QB9_OP QB9REL
QB9_CL QB9IT L
QC9_OP QC9REL
QC9_CL QC9IT L
CQA1_OP QB2OPT R
CQA1_CL QB2CLT R
CQB62_OP VPQB2T R
CQB62_CL
CQC1_OP
CQC1_CL
CQC2_OP
CQC2_CL
QC21_OP
QC21_CL
VOLT _OFF
VOLT _ON
EXDU_ES
QB6_EX1
QB6_EX2
QB2_EX1
QB2_EX2
QB9_EX1
QB9_EX2
QB9_EX3
QB9_EX4
QB9_EX5
QB9_EX6
QB9_EX7
en05000353.vsd
428
Interlocking Chapter 11
Control
IK01-
BH_CONN
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB61_OP QB61REL
QB61_CL QB61ITL
QB62_OP QB62REL
QB62_CL QB62ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
1QC3_OP
1QC3_CL
2QC3_OP
2QC3_CL
QB61_EX1
QB61_EX2
QB62_EX1
QB62_EX2
en05000351.vsd
429
Interlocking Chapter 11
Control
BH_LINE_A
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB6_OP
QB6_CL =1 VPQB6
QC9_OP
QC9_CL =1 VPQC9
QB9_OP
QB9_CL =1 VPQB9
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC3_OP
QC3_CL =1 VPQC3
CQA1_OP
CQA1_CL =1 VPCQA1
CQC1_OP
CQC1_CL =1 VPCQC1
CQC2_OP
CQC2_CL =1 VPCQC2
CQB61_OP
CQB61_CL =1 VPCQB61
QC11_OP
QC11_CL =1 VPQC11
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQB1 QA1CLREL
VPQB6 QA1CLITL
& 1
VPQB9
VPQA1
VPQC1 QB6REL
VPQC2 & >1
QB6ITL
1
VPQC3
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QB6_EX1
VPQC2
VPQC3
&
QC2_CL
QC3_CL
QB6_EX2
en04000554.vsd
430
Interlocking Chapter 11
Control
VPQA1
VPQC1 QB1REL
VPQC2 & >1
QB1ITL
1
VPQC11
QA1_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQC1
VPQC11
&
QC1_CL
QC11_CL
EXDU_ES
QB1_EX2
VPQB1 QC1REL
VPQB6 QC1ITL
QB1_OP & 1
QC2REL
QB6_OP QC2ITL
VPQB6 1
VPQB9 QC3REL
VPCQB61 &
QC3ITL
1
QB6_OP
QB9_OP
CQB61_OP
VPQA1 QB9REL
VPQB6 QB9ITL
VPQC9 & >1 1
VPQC1
VPQC2
VPQC3
VPCQA1
VPCQB61
VPCQC1
VPCQC2
QB9_EX1
QB6_OP
QB9_EX2
>1
QA1_OP
QC1_OP
QC2_OP &
QB9_EX3
en04000555.vsd
431
Interlocking Chapter 11
Control
CQB61_OP
QB9_EX4
>1 & >1
CQA1_OP
CQC1_OP
CQC2_OP &
QB9_EX5
QC9_OP
QC3_OP
QB9_EX6
VPQC9
VPQC3
&
QC9_CL
QC3_CL
QB9_EX7
VPQB9 QC9REL
VPVOLT QC9ITL
QB9_OP & 1
VOLT_OFF
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
en04000556.vsd
432
Interlocking Chapter 11
Control
BH_LINE_B
QA1_OP
QA1_CL =1 VPQA1
QB2_OP
QB2_CL =1 VPQB2
QB6_OP
QB6_CL =1 VPQB6
QC9_OP
QC9_CL =1 VPQC9
QB9_OP
QB9_CL =1 VPQB9
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC3_OP
QC3_CL =1 VPQC3
CQA1_OP
CQA1_CL =1 VPCQA1
CQC1_OP
CQC1_CL =1 VPCQC1
CQC2_OP
CQC2_CL =1 VPCQC2
CQB62_OP
CQB62_CL =1 VPCQB62
QC21_OP
QC21_CL =1 VPQC21
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQB2 QA1CLREL
VPQB6 QA1CLITL
& 1
VPQB9
VPQA1
VPQC1 QB6REL
VPQC2 & >1
QB6ITL
1
VPQC3
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QB6_EX1
VPQC2
VPQC3
&
QC2_CL
QC3_CL
QB6_EX2
en04000557.vsd
433
Interlocking Chapter 11
Control
VPQA1
VPQC1 QB2REL
VPQC2 & >1
QB2ITL
1
VPQC21
QA1_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQC1
VPQC21
&
QC1_CL
QC21_CL
EXDU_ES
QB2_EX2
VPQB2 QC1REL
VPQB6 QC1ITL
QB2_OP & 1
QC2REL
QB6_OP QC2ITL
VPQB6 1
VPQB9 QC3REL
VPCQB62 &
QC3ITL
1
QB6_OP
QB9_OP
CQB62_OP
VPQA1 QB9REL
VPQB6 QB9ITL
VPQC9 & >1 1
VPQC1
VPQC2
VPQC3
VPCQA1
VPCQB62
VPCQC1
VPCQC2
QB9_EX1
QB6_OP
QB9_EX2
>1
QA1_OP
QC1_OP
QC2_OP &
QB9_EX3
en04000558.vsd
434
Interlocking Chapter 11
Control
CQB62_OP
QB9_EX4
>1 & >1
CQA1_OP
CQC1_OP
CQC2_OP &
QB9_EX5
QC9_OP
QC3_OP
QB9_EX6
VPQC9
VPQC3
&
QC9_CL
QC3_CL
QB9_EX7
VPQB9 QC9REL
VPVOLT QC9ITL
QB9_OP & 1
VOLT_OFF
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
en04000559.vsd
435
Interlocking Chapter 11
Control
BH_CONN
QA1_OP
QA1_CL =1 VPQA1
QB61_OP
QB61_CL =1 VPQB61
QB62_OP
QB62_CL =1 VPQB62
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
1QC3_OP
1QC3_CL =1 VP1QC3
2QC3_OP
2QC3_CL =1 VP2QC3
VPQB61 QA1CLREL
VPQB62 & QA1CLITL
1
VPQA1
VPQC1 QB61REL
& >1
VPQC2 QB61ITL
1
VP1QC3
QA1_OP
QC1_OP
QC2_OP
1QC3_OP
QB61_EX1
VPQC1
VP1QC3
&
QC1_CL
1QC3_CL
QB61_EX2
VPQA1
VPQC1 QB62REL
& >1
VPQC2 QB62ITL
1
VP2QC3
QA1_OP
QC1_OP
QC2_OP
2QC3_OP
QB62_EX1
VPQC2
VP2QC3
&
QC2_CL
2QC3_CL
QB62_EX2
VPQB61 QC1REL
VPQB62 QC1ITL
& 1
QB61_OP QC2REL
QB62_OP QC2ITL
1
en04000560.vsd
436
Interlocking Chapter 11
Control
437
Interlocking Chapter 11
Control
Signal Description
QB9_EX3 External condition for apparatus QB9
QB9_EX4 External condition for apparatus QB9
QB9_EX5 External condition for apparatus QB9
QB9_EX6 External condition for apparatus QB9
QB9_EX7 External condition for apparatus QB9
Table 204: Output signals for the BH_LINE_A (IL01-) function block
Signal Description
QA1CLREL Closing of QA1 is allowed
QA1CLITL Closing of QA1 is forbidden
QB6REL Switching of QB6 is allowed
QB6ITL Switching of QB6 is forbidden
QB1REL Switching of QB1 is allowed
QB1ITL Switching of QB1 is forbidden
QC1REL Switching of QC1 is allowed
QC1ITL Switching of QC1 is forbidden
QC2REL Switching of QC2 is allowed
QC2ITL Switching of QC2 is forbidden
QC3REL Switching of QC3 is allowed
QC3ITL Switching of QC3 is forbidden
QB9REL Switching of QB9 is allowed
QB9ITL Switching of QB9 is forbidden
QC9REL Switching of QC9 is allowed
QC9ITL Switching of QC9 is forbidden
QB1OPTR QB1 is in open position
QB1CLTR QB1 is in closed position
VPQB1TR Switch status of QB1 is valid (open or closed)
Table 205: Input signals for the BH_LINE_B (IM01-) function block
Signal Description
QA1_OP QA1 is in open position
QA1_CL QA1 is in closed position
QB6_OP QB6 is in open position
QB6_CL QB6 is in close position
QB2_OP QB2 is in open position
QB2_CL QB2 is in closed position
QC1_OP QC1 is in open position
438
Interlocking Chapter 11
Control
Signal Description
QC1_CL QC1 is in closed position
QC2_OP QC2 is in open position
QC2_CL QC2 is in closed position
QC3_OP QC3 is in open position
QC3_CL QC3 is in closed position
QB9_OP QB9 is in open position
QB9_CL QB9 is in closed position
QC9_OP QC9 is in open position
QC9_CL QC9 is in closed position
CQA1_OP QA1 in module BH_CONN is in open position
CQA1_CL QA1 in module BH_CONN is in closed position
CQB62_OP QB62 in module BH_CONN is in open position
CQB62_CL QB62 in module BH_CONN is in closed position
CQC1_OP QC1 in module BH_CONN is in open position
CQC1_CL QC1 in module BH_CONN is in closed position
CQC2_OP QC2 in module BH_CONN is in open position
CQC2_CL QC2 in module BH_CONN is in closed position
QC21_OP Earthing switch QC21 on busbar WA2 is in open position
QC21_CL Earthing switch QC21 on busbar WA2 is in closed position
VOLT_OFF There is no voltage on line and not VT (fuse) failure
VOLT_ON There is voltage on the line or there is a VT (fuse) failure
EXDU_ES No transm error from bay containing earthing switch QC21
QB6_EX1 External condition for apparatus QB6
QB6_EX2 External condition for apparatus QB6
QB2_EX1 External condition for apparatus QB2
QB2_EX2 External condition for apparatus QB2
QB9_EX1 External condition for apparatus QB9
QB9_EX2 External condition for apparatus QB9
QB9_EX3 External condition for apparatus QB9
QB9_EX4 External condition for apparatus QB9
QB9_EX5 External condition for apparatus QB9
QB9_EX6 External condition for apparatus QB9
QB9_EX7 External condition for apparatus QB9
439
Interlocking Chapter 11
Control
Table 206: Output signals for the BH_LINE_B (IM01-) function block
Signal Description
QA1CLREL Closing of QA1 is allowed
QA1CLITL Closing of QA1 is forbidden
QB6REL Switching of QB6 is allowed
QB6ITL Switching of QB6 is forbidden
QB2REL Switching of QB2 is allowed
QB2ITL Switching of QB2 is forbidden
QC1REL Switching of QC1 is allowed
QC1ITL Switching of QC1 is forbidden
QC2REL Switching of QC2 is allowed
QC2ITL Switching of QC2 is forbidden
QC3REL Switching of QC3 is allowed
QC3ITL Switching of QC3 is forbidden
QB9REL Switching of QB9 is allowed
QB9ITL Switching of QB9 is forbidden
QC9REL Switching of QC9 is allowed
QC9ITL Switching of QC9 is forbidden
QB2OPTR QB2 is in open position
QB2CLTR QB2 is in closed position
VPQB2TR Switch status of QB2 is valid (open or closed)
Table 207: Input signals for the BH_CONN (IK01-) function block
Signal Description
QA1_OP QA1 is in open position
QA1_CL QA1 is in closed position
QB61_OP QB61 is in open position
QB61_CL QB61 is in closed position
QB62_OP QB62 is in open position
QB62_CL QB62 is in closed position
QC1_OP QC1 is in open position
QC1_CL QC1 is in closed position
QC2_OP QC2 is in open position
QC2_CL QC2 is in closed position
1QC3_OP QC3 on line 1 is in open position
1QC3_CL QC3 on line 1 is in closed position
2QC3_OP QC3 on line 2 is in open position
440
Interlocking Chapter 11
Control
Signal Description
2QC3_CL QC3 on line 2 is in closed position
QB61_EX1 External condition for apparatus QB61
QB61_EX2 External condition for apparatus QB61
QB62_EX1 External condition for apparatus QB62
QB62_EX2 External condition for apparatus QB62
Table 208: Output signals for the BH_CONN (IK01-) function block
Signal Description
QA1CLREL Closing of QA1 is allowed
QA1CLITL Closing of QA1 is forbidden
QB61REL Switching of QB61 is allowed
QB61ITL Switching of QB61 is forbidden
QB62REL Switching of QB62 is allowed
QB62ITL Switching of QB62 is forbidden
QC1REL Switching of QC1 is allowed
QC1ITL Switching of QC1 is forbidden
QC2REL Switching of QC2 is allowed
QC2ITL Switching of QC2 is forbidden
441
Logic rotating switch for function selection Chapter 11
and LHMI presentation (GGIO) Control
5.1 Introduction
The Logic rotating switch for function selection and LHMI presentation (LSR, or the selector
switch function block, as it is also known) is used within the CAP tool in order to get a selector
switch functionality similar with the one provided by a hardware selector switch. Hardware se-
lector switches are used extensively by utilities, in order to have different functions operating on
pre-set values. Hardware switches are however sources for maintenance issues, lower system re-
liability and extended purchase portfolio. The virtual selector switches eliminate all these prob-
lems.
The LSR has two operating inputs – UP and DOWN. When a signal is received on the UP input,
the block will activate the output next to the present activated output, in ascending order (if the
present activated output is 3 – for example and one operates the UP input, then the output 4 will
be activated). When a signal is received on the DOWN input, the block will activate the output
next to the present activated output, in descending order (if the present activated output is 3 –
for example and one operates the DOWN input, then the output 2 will be activated). Depending
on the output settings the output signals can be steady or pulsed. In case of steady signals, in case
of UP or DOWN operation, the previously active output will be deactivated. Also, depending on
the settings one can have a time delay between the UP or DOWN activation signal positive front
and the output activation.
Repeated down or up when end position has been reached will give repeated pulses on the se-
lected step. This can e.g. be used to have multiple activations on two position switches.
One can block the function operation, by activating the BLOCK input. In this case, the present
position will be kept and further operation will be blocked. The operator place (local or remote)
is specified through the PSTO input.
The LSR function block has also an integer value output, that generates the actual position num-
ber. The positions names are fully settable by the user.
442
Logic rotating switch for function selection Chapter 11
and LHMI presentation (GGIO) Control
443
Logic rotating switch for function selection Chapter 11
and LHMI presentation (GGIO) Control
SL01-
SLGGIO
BLOCK SWPOS01
PSTO SWPOS02
UP SWPOS03
DOWN SWPOS04
SWPOS05
SWPOS06
SWPOS07
SWPOS08
SWPOS09
SWPOS10
SWPOS11
SWPOS12
SWPOS13
SWPOS14
SWPOS15
SWPOS16
SWPOS17
SWPOS18
SWPOS19
SWPOS20
SWPOS21
SWPOS22
SWPOS23
SWPOS24
SWPOS25
SWPOS26
SWPOS27
SWPOS28
SWPOS29
SWPOS30
SWPOS31
SWPOS32
SWPOSN
INSTNAME
NAME1
NAME2
NAME3
NAME4
NAME5
NAME6
NAME7
NAME8
NAME9
NAME10
NAME11
NAME12
NAME13
NAME14
NAME15
NAME16
NAME17
NAME18
NAME19
NAME20
NAME21
NAME22
NAME23
NAME24
NAME25
NAME26
NAME27
NAME28
NAME29
NAME30
NAME31
NAME32
en05000658.vsd
444
Logic rotating switch for function selection Chapter 11
and LHMI presentation (GGIO) Control
Table 210: Output signals for the SSGGIO (LRS1-) function block
Signal Description
SWPOS01 Selector switch position 1
SWPOS02 Selector switch position 2
SWPOS03 Selector switch position 3
SWPOS04 Selector switch position 4
SWPOS05 Selector switch position 5
SWPOS06 Selector switch position 6
SWPOS07 Selector switch position 7
SWPOS08 Selector switch position 8
SWPOS09 Selector switch position 9
SWPOS10 Selector switch position 10
SWPOS11 Selector switch position 11
SWPOS12 Selector switch position 12
SWPOS13 Selector switch position 13
SWPOS14 Selector switch position 14
SWPOS15 Selector switch position 15
SWPOS16 Selector switch position 16
SWPOS17 Selector switch position 17
SWPOS18 Selector switch position 18
SWPOS19 Selector switch position 19
SWPOS20 Selector switch position 20
SWPOS21 Selector switch position 21
SWPOS22 Selector switch position 22
SWPOS23 Selector switch position 23
SWPOS24 Selector switch position 24
SWPOS25 Selector switch position 25
SWPOS26 Selector switch position 26
445
Logic rotating switch for function selection Chapter 11
and LHMI presentation (GGIO) Control
Signal Description
SWPOS27 Selector switch position 27
SWPOS28 Selector switch position 28
SWPOS29 Selector switch position 29
SWPOS30 Selector switch position 30
SWPOS31 Selector switch position 31
SWPOS32 Selector switch position 32
SWPOSN Switch position (integer).
NAME01 User define string for position 1
NAME02 User define string for position 2
NAME03 User define string for position 3
NAME04 User define string for position 4
NAME05 User define string for position 5
NAME06 User define string for position 6
NAME07 User define string for position 7
NAME08 User define string for position 8
NAME09 User define string for position 9
NAME10 User define string for position 10
NAME11 User define string for position 11
NAME12 User define string for position 12
NAME13 User define string for position 13
NAME14 User define string for position 14
NAME15 User define string for position 15
NAME16 User define string for position 16
NAME17 User define string for position 17
NAME18 User define string for position 18
NAME19 User define string for position 19
NAME20 User define string for position 20
NAME21 User define string for position 21
NAME22 User define string for position 22
NAME23 User define string for position 23
NAME24 User define string for position 24
NAME25 User define string for position 25
NAME26 User define string for position 26
NAME27 User define string for position 27
NAME28 User define string for position 28
NAME29 User define string for position 29
NAME30 User define string for position 30
NAME31 User define string for position 31
NAME32 User define string for position 32
446
Logic rotating switch for function selection Chapter 11
and LHMI presentation (GGIO) Control
Table 212: Parameter group settings for the SSGGIO (LRS1-) function
Parameter Range Step Default Unit Description
Operation Off - Off - Operation Off/On
On
NrPos 2 - 32 1 32 - Number of positions in
the switch
OutType Pulsed - Steady - Output type, steady (=1)
Steady or pulse (=0)
tPulse 0.000 - 60.000 0.001 0.200 s Operate pulse duration,
in [s]
tDelay 0.000 - 60000.000 0.010 0.000 s Time delay on the output,
in [s]
447
Logic rotating switch for function selection Chapter 11
and LHMI presentation (GGIO) Control
448
About this chapter Chapter 12
Scheme communication
Chapter 12 Scheme
communication
Also Local acceleration logic (ZCLC) is discussed which is a function that can generate instan-
taneous tripping as a result of remote end faults without any telecommunication.
The chapter contains a short description of the design, simplified logical block diagrams, figure
of the function block, input and output signals and setting parameters.
449
Scheme communication Chapter 12
logic for distance protection (PSCH, 85) Scheme communication
1 Scheme communication
logic for distance protection (PSCH, 85)
1.1 Introduction
To achieve instantaneous fault clearance for all line faults, a scheme communication logic is pro-
vided. All types of communication schemes e.g. permissive underreach, permissive overreach,
blocking, intertrip etc. are available. The built-in communication module (LDCM) can be used
for scheme communication signalling when included.
Logic for loss of load and/or local acceleration in co-operation with autoreclose function is also
provided for application where no communication channel is available.
A permissive scheme is inherently faster and has better security against false tripping than a
blocking scheme. On the other hand, a permissive scheme depends on a received signal for a fast
trip, so its dependability is lower than that of a blocking scheme.
The received signal, which shall be connected to CR, is used to not release the zone to be accel-
erated to clear the fault instantaneously (after time tCoord). The overreaching zone to be accel-
erated is connected to the input CACC, see figure 210.
In case of external faults, the blocking signal (CR) must be received before the settable timer
tCoord elapses, to prevent a false trip, see figure 210.
The function can be totally blocked by activating the input BLOCK, block of trip by activating
the input BLKTR, Block of carrier send by activating the input BLKCS.
450
Scheme communication Chapter 12
logic for distance protection (PSCH, 85) Scheme communication
tCoord
CACC
t TRIP
CR AND
en05000512.vsd
The logic for trip carrier in permissive scheme is shown in figure 211.
tCoord
CACC
t TRIP
CR AND
en05000513.vsd
The permissive underreach scheme has the same blocking possibilities as mentioned for block-
ing scheme above.
The logic for trip carrier is the same as for permissive underreach, i.e. figure 211.
The permissive overreach scheme has the same blocking possibilities as mentioned for blocking
scheme above.
451
Scheme communication Chapter 12
logic for distance protection (PSCH, 85) Scheme communication
The unblocking function uses a carrier guard signal CRG, which must always be present, even
when no CR signal is received. The absence of the CRG signal for a time longer than the setting
tSecurity time is used as a CR signal, see figure 212. This also enables a permissive scheme to
operate when the line fault blocks the signal transmission.
The carrier received signal created by the unblocking function is reset 150 ms after the security
timer has elapsed. When that occurs an output signal LCG is activated for signalling purpose.
The unblocking function is reset 200 ms after that the guard signal is present again.
CR
tSecurity CRL
t >1
1
CRG
200 ms 150 ms
t OR t AND
AND
LCG
en05000746.vsd
The unblocking function can be set in three operation modes (setting Unblock):
The received signal CR is directly transferred to a TRIP for tripping without local criteria. The
signal is further processed in the tripping logic. In case of single-pole tripping in multi-phase
systems, a phase selection is performed.
452
Scheme communication Chapter 12
logic for distance protection (PSCH, 85) Scheme communication
453
Scheme communication Chapter 12
logic for distance protection (PSCH, 85) Scheme communication
Unblock = Off
CR
Unblock =
OR CRL
NoRestart AND
CRL
Unblock =
Restart
tSecurity
CRG 1 t AND
SchemeType =
Intertrip
CSUR
tSendMin AND
OR
BLOCK AND
CSBLK OR
CRL
Schemetype =
Permissive UR AND CS
OR
tCoord
AND 25 ms
OR t TRIP
CACC t
Schemetype =
Permissive OR
OR AND
CSOR
AND
tSendMin
OR
AND
SchemeType =
Blocking
CSNBLK
AND
en05000515.vsd
Figure 213: Scheme communication logic for distance protection, simplified logic diagram
454
Scheme communication Chapter 12
logic for distance protection (PSCH, 85) Scheme communication
ZCOM-
ZCPSCH
BLOCK TRIP
BLKTR CS
BLKCS CRL
CSBLK LCG
CACC
CSOR
CSUR
CR
CRG
en05000332.vsd
Table 214: Output signals for the ZCPSCH_85 (ZCOM-) function block
Signal Description
TRIP Trip output
CS Carrier Send signal
CRL Carrier signal received or missing carrier guard signal
LCG Loss of carrier guard signal
455
Scheme communication Chapter 12
logic for distance protection (PSCH, 85) Scheme communication
456
Current reversal and weak-end infeed logic Chapter 12
for distance protection (PSCH, 85) Scheme communication
2.1 Introduction
The current reversal function is used to prevent unwanted operations due to current reversal
when using permissive overreach protection schemes in application with parallel lines when the
overreach from the two ends overlaps on the parallel line.
The weak-end infeed logic is used in cases where the apparent power behind the protection can
be too low to activate the distance protection function. When activated, received carrier signal
together with local under voltage criteria and no reverse zone operation gives an instantaneous
trip. The received signal is also echoed back to accelerate the sending end.
The preventing of sending carrier send signal CS and activating of the TRIP in the scheme com-
munication block ZCOM is carried out by connecting the IRLV signal to input BLOCK in the
ZCOM function.
457
Current reversal and weak-end infeed logic Chapter 12
for distance protection (PSCH, 85) Scheme communication
The function has an internal 10 ms drop-off timer which secure that the current reversal logic
will be activated for short input signals even if the pick-up timer is set to zero.
The WEI function returns the received carrier signal, see figure 216, when:
• The functional input CRL is active. This input is usually connected to the CRL
output on the scheme communication logic ZCOM.
• The WEI function is not blocked by the active signal connected to the WEIBLK1
functional input or to the VTSZ functional input. The latest is usually configured
to the STGEN functional output of the fuse-failure function.
• No active signal has been present for at least 200 ms on the WEIBLK2 functional
input. An OR combination of all fault detection functions (not undervoltage) as
present within the terminal is usually used for this purpose.
When an echo function is used in both terminals, a spurious signal can be looped round by the
echo logics. To avoid a continuous lock-up of the system, the duration of the echoed signal is
limited to 200 ms.
An undervoltage criteria is used as an additional tripping criteria, when the tripping of the local
breaker is selected, setting WEI = Echo&Trip, together with the WEI function and ECHO signal
has been issued by the echo logic, see figure 217.
458
Current reversal and weak-end infeed logic Chapter 12
for distance protection (PSCH, 85) Scheme communication
ZCAL-
ZCRWPSCH
U3P IRVL
BLOCK TRWEI
IRVBLK TRWEIL1
IRV TRWEIL2
WEIBLK1 TRWEIL3
WEIBLK2 ECHO
VTSZ
CBOPEN
CRL
en05000334.vsd
459
Current reversal and weak-end infeed logic Chapter 12
for distance protection (PSCH, 85) Scheme communication
Table 218: Output signals for the ZCRWPSCH_85 (ZCAL-) function block
Signal Description
IRVL Operation of current reversal logic
TRWEI Trip of WEI logic
TRWEIL1 Trip of WEI logic in phase L1
TRWEIL2 Trip of WEI logic in phase L2
TRWEIL3 Trip of WEI logic in phase L3
ECHO Carrier send by WEI logic
460
Current reversal and weak-end infeed logic Chapter 12
for distance protection (PSCH, 85) Scheme communication
461
Local acceleration logic (PLAL) Chapter 12
Scheme communication
3.1 Introduction
To achieve fast clearing of faults on the whole line, when no communication channel is avail-
able, local acceleration logic (ZCLC) can be used. This logic enables fast fault clearing during
certain conditions, but naturally, it can not fully replace a communication channel.
The logic can be controlled either by the auto re-closer (zone extension) or by the loss of load
current (loss-of-load acceleration).
462
Local acceleration logic (PLAL) Chapter 12
Scheme communication
After the auto-recloser initiates the close command and remains in the reclaim state, there will
be no ARREADY signal, and the protection will trip normally with step distance time functions.
In case of a fault on the adjacent line within the overreaching zone range, an unwanted auto-re-
closing cycle will occur. The step distance function at the reclosing attempt will prevent an un-
wanted retrip when the breaker is reclosed.
On the other hand, at a persistent line fault on line section not covered by instantaneous zone
(normally zone 1) only the first trip will be "instantaneous".
The function will be blocked if the input BLOCK is activated (common with loss of load accel-
eration).
Breaker closing signals can if decided be connected to block the function during normal closing.
463
Local acceleration logic (PLAL) Chapter 12
Scheme communication
ZCLC-
ZCLCPLAL
I3P TRZE
BLOCK TRLL
ARREADY
NDST
EXACC
BC
LLACC
en05000333.vsd
Table 222: Output signals for the ZCLC (ZCLC-) function block
Signal Description
TRZE Trip by zone extension
TRLL Trip by loss of load
464
Local acceleration logic (PLAL) Chapter 12
Scheme communication
465
Scheme communication logic Chapter 12
for residual overcurrent protection (PSCH, 85) Scheme communication
4.1 Introduction
To achieve fast fault clearance of earth faults on the part of the line not covered by the instanta-
neous step of the residual overcurrent protection, the directional residual overcurrent protection
can be supported with a logic that uses communication channels.
In the directional scheme, information of the fault current direction must be transmitted to the
other line end. With directional comparison, an operate time of the protection of 50 – 60 ms in-
cluding a channel transmission time of 20 ms, can be achieved. This short operate time enables
rapid autoreclosing function after the fault clearance.
The communication logic module for directional residual current protection for the REx670
IEDs enables blocking as well as permissive under/overreach schemes. The logic can also be
supported by additional logic for weak-end-infeed and current reversal, included in the EFCA
function.
In addition to this a signal from the autoreclosing function should be configured to the BLKCS
input for blocking of the function at a single phase reclosing cycle.
466
Scheme communication logic Chapter 12
for residual overcurrent protection (PSCH, 85) Scheme communication
One advantage of the blocking scheme is that only one channel (carrier frequency) is needed if
the ratio of source impedances at both end is approximately equal for zero and positive sequence
source impedances, the channel can be shared with the impedance-measuring system, if that sys-
tem also works in the blocking mode. The power line carrier communication signal is transmit-
ted on a healthy line and no signal attenuation will occur due to the fault.
Blocking schemes are particular favorable for three-terminal applications if there is no zero-se-
quence outfeed from the tapping. The blocking scheme is immune to current reversals because
the received carrier signal is maintained long enough to avoid unwanted operation due to current
reversal. There is never any need for weak-end-infeed logic, because the strong end trips for an
internal fault when no blocking signal is received from the weak end. The fault clearing time is
however generally longer for a blocking scheme than for a permissive scheme.
If the fault is on the line, the forward direction measuring element operates. If no blocking signal
comes from the other line end via the CR binary input (carrier receive) the TRIP output is acti-
vated after the tCoord set time delay.
467
Scheme communication logic Chapter 12
for residual overcurrent protection (PSCH, 85) Scheme communication
An impedance measuring relay which works in the same type of permissive mode, with one
channel in each direction, can share the channels with the communication scheme for residual
overcurrent protection. If the impedance measuring relay works in the permissive overreach
mode, common channels can be used in single-line applications. In case of double lines connect-
ed to a common bus at both ends, use common channels only if the ratio Z1S/Z0S (positive
through zero-sequence source impedance) is about equal at both ends. If the ratio is different,
the impedance measuring and the directional earth-fault current system of the healthy line may
detect a fault in different directions, which could result in unwanted tripping.
Common channels cannot be used when the weak-end-infeed function is used in the distance or
earth fault protection.
In case of an internal earth fault, the forward directed measuring element operates and sends a
permissive signal to the remote end via the CS output (carrier send). Local tripping is permitted
when the forward direction measuring element operates and a permissive signal is received via
the CR binary input (carrier receive).
The permissive scheme can of either underreach or overreach type. In the underreach alternative
an underreach directional residual overcurrent measurement element will be used as sending cri-
terion of the permissive send signal CSUR.
468
Scheme communication logic Chapter 12
for residual overcurrent protection (PSCH, 85) Scheme communication
The unblocking function uses a carrier guard signal CRG, which must always be present, even
when no CR signal is received. The absence of the CRG signal for a time longer than the setting
tSecurity time is used as a CR signal, see figure 223. This also enables a permissive scheme to
operate when the line fault blocks the signal transmission.
The carrier received signal created by the unblocking function is reset 150 ms after the security
timer has elapsed. When that occurs an output signal LCG is activated for signalling purpose.
The unblocking function is reset 200 ms after that the guard signal is present again.
CR
tSecurity CRL
t >1
1
CRG
200 ms 150 ms
t OR t AND
AND
LCG
en05000746.vsd
The unblocking function can be set in three operation modes (setting Unblock):
469
Scheme communication logic Chapter 12
for residual overcurrent protection (PSCH, 85) Scheme communication
EFC1-
ECPSCH
BLOCK TRIP
BLKTR CS
BLKCS CRL
CSBLK LCG
CACC
CSOR
CSUR
CR
CRG
en05000659.vsd
Table 225: Output signals for the ECPSCH_85 (EFC1-) function block
Signal Description
TRIP Trip by Communication Scheme Logic
CS Carrier Send by Communication Scheme Logic
CRL Carrier Receive from Communication Scheme Logic
LCG loss of carrier guard signal
470
Scheme communication logic Chapter 12
for residual overcurrent protection (PSCH, 85) Scheme communication
471
Current reversal and weak-end infeed logic Chapter 12
for residual overcurrent protection (PSCH, 85) Scheme communication
5.1 Introduction
The EFCA additional communication logic is a supplement to the EFC scheme communication
logic for the residual overcurrent protection.
To achieve fast fault clearing for all earth faults on the line, the directional earth-fault protection
function can be supported with logic, that uses communication channels. REx670 terminals have
for this reason available additions to scheme communication logic.
If parallel lines are connected to common busbars at both terminals, overreaching permissive
communication schemes can trip unselectively due to fault current reversal. This unwanted trip-
ping affects the healthy line when a fault is cleared on the other line. This lack of security can
result in a total loss of interconnection between the two buses. To avoid this type of disturbance,
a fault current-reversal logic (transient blocking logic) can be used.
Permissive communication schemes for residual overcurrent protection, can basically operate
only when the protection in the remote terminal can detect the fault. The detection requires a suf-
ficient minimum residual fault current, out from this terminal. The fault current can be too low
due to an opened breaker or high positive and/or zero sequence source impedance behind this
terminal. To overcome these conditions, weak end infeed (WEI) echo logic is used.
The circuits for the permissive overreach scheme contain logic for current reversal and weak end
infeed functions. These functions are not required for the blocking overreach scheme.
Use the independent or inverse time functions in the directional earth-fault protection module to
get back-up tripping in case the communication equipment malfunctions and prevents operation
of the directional comparison logic.
Connect the necessary signal from the auto-recloser for blocking of the directional comparison
scheme, during a single-phase auto-reclosing cycle, to the BLOCK input of the directional com-
parison module.
472
Current reversal and weak-end infeed logic Chapter 12
for residual overcurrent protection (PSCH, 85) Scheme communication
When the fault current is reversed on the non faulty line, IRV is deactivated and IRVBLK is ac-
tivated. The reset of IRVL is delayed by the tDelay time, see figure 225. This ensures the reset
of the carrier receive CR signal.
The weak end infeed logic uses normally a reverse and a forward direction element, connected
to WEIBLK via an OR-gate. See figure 226. If neither the forward nor the reverse directional
measuring element is activated during the last 200 ms. The weak-end-infeed logic echoes back
the received permissive signal. See figure 226.
If the forward or the reverse directional measuring element is activated during the last 200 ms,
the fault current is sufficient for the IED to detect the fault with the earth-fault function that is
in operation.
With the Trip setting, the logic sends an echo according to above. Further, it activates the TR-
WEI signal to trip the breaker if the echo conditions are fulfilled and the neutral point voltage is
above the set operate value for 3U0>
473
Current reversal and weak-end infeed logic Chapter 12
for residual overcurrent protection (PSCH, 85) Scheme communication
The voltage signal that is used to calculate the zero sequence voltage is set in the earth-fault
function that is in operation.
The weak end infeed echo sent to the strong line end has a maximum duration of 200 ms. When
this time period has elapsed, the conditions that enable the echo signal to be sent are set to zero
for a time period of 50 ms. This avoids ringing action if the weak end echo is selected for both
line ends.
EFCA-
ECRWPSCH
U3P IRVL
BLOCK TRWEI
IRVBLK ECHO
IRV CR
WEIBLK1
WEIBLK2
VTSZ
CBOPEN
CRL
en05000335.vsd
474
Current reversal and weak-end infeed logic Chapter 12
for residual overcurrent protection (PSCH, 85) Scheme communication
Table 229: Output signals for the ECRWPSCH_85 (EFCA-) function block
Signal Description
IRVL Operation of current reversal logic
TRWEI Trip of WEI logic
ECHO Carrier send by WEI logic
CR POR Carrier signal received from remote end
475
Current reversal and weak-end infeed logic Chapter 12
for residual overcurrent protection (PSCH, 85) Scheme communication
476
About this chapter Chapter 13
Logic
Chapter 13 Logic
477
Tripping logic (PTRC, 94) Chapter 13
Logic
1.1 Introduction
A function block for protection tripping is provided for each circuit breaker involved in the trip-
ping of the fault. It provides the pulse prolongation to ensure a trip pulse of sufficient length, as
well as all functionality necessary for correct co-operation with autoreclosing functions.
The trip function block includes functionality for evolving faults and breaker lock-out.
For three-pole tripping, TRPx function has a single input (TRIN) through which all trip output
signals from the protection functions within the IED, or from external protection functions via
one or more of the IEDs binary inputs, are routed. It has a single trip output (TRIP) for connec-
tion to one or more of the IEDs binary outputs, as well as to other functions within the IED re-
quiring this signal.
BLOCK
tTripMin TRIP
TRIN OR
AND t
Operation Mode = On
Program = 3Ph
en05000789.vsd
The TRPx function for single- and two-pole tripping has additional phase segregated inputs for
this, as well as inputs for faulted phase selection. The latter inputs enable single- and two-pole
tripping for those functions which do not have their own phase selection capability, and there-
478
Tripping logic (PTRC, 94) Chapter 13
Logic
fore which have just a single trip output and not phase segregated trip outputs for routing through
the phase segregated trip inputs of the expanded TRPx function. Examples of such protection
functions are the residual overcurrent protections. The expanded TRPx function has two inputs
for these functions, one for impedance tripping (e.g. carrier-aided tripping commands from the
scheme communication logic), and one for earth fault tripping (e.g. tripping output from a resid-
ual overcurrent protection). Additional logic secures a three-pole final trip command for these
protection functions in the absence of the required phase selection signals.
The expanded TRPx function has three trip outputs TRL1, TRL2, TRL3 (besides the trip output
TRIP), one per phase, for connection to one or more of the IEDs binary outputs, as well as to
other functions within the IED requiring these signals. There are also separate output signals in-
dicating single pole, two pole or three pole trip. These signals are important for cooperation with
the auto-reclosing function.
The expanded TRPx function is equipped with logic which secures correct operation for evolv-
ing faults as well as for reclosing on to persistent faults. A special input is also provided which
disables single- and two-pole tripping, forcing all tripping to be three-pole.
In multi-breaker arrangements, one TRPx function block is used for each breaker. This can be
the case if single pole tripping and auto-reclosing is used.
The breaker close lockout function can be activated from an external trip signal from another
protection function via input (SETLKOUT) or internally at a three pole trip, if desired.
It is possible to lockout seal in the tripping output signals or use blocking of closing only the
choice is by setting TripLockout.
TRINL1
TRINL2
OR
TRINL3
1PTRZ OR
1PTREF
OR
TRIN RSTTRIP - cont.
AND
Program = 3ph
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Tripping logic (PTRC, 94) Chapter 13
Logic
480
Tripping logic (PTRC, 94) Chapter 13
Logic
481
Tripping logic (PTRC, 94) Chapter 13
Logic
482
Tripping logic (PTRC, 94) Chapter 13
Logic
483
Tripping logic (PTRC, 94) Chapter 13
Logic
TRP1-
SMPPTRC_94
BLOCK TRIP
BLKLKOUT TRL1
TRIN TRL2
TRINL1 TRL3
TRINL2 TR1P
TRINL3 TR2P
PSL1 TR3P
PSL2 CLLKOUT
PSL3
1PTRZ
1PTREF
P3PTR
SETLKOUT
RSTLKOUT
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Tripping logic (PTRC, 94) Chapter 13
Logic
Table 233: Output signals for the SMPPTRC_94 (TRP1-) function block
Signal Description
TRIP General trip output signal
TRL1 Trip signal from phase L1
TRL2 Trip signal from phase L2
TRL3 Trip signal from phase L3
TR1P Tripping single-pole
TR2P Tripping two-pole
TR3P Tripping three-pole
CLLKOUT Circuit breaker lockout output (set until reset)
485
Trip matrix logic (GGIO, 94X) Chapter 13
Logic
2.1 Introduction
Twelve trip matrix logic blocks are included in the IED. The function blocks are used in the con-
figuration of the IED to route trip signals and/or other logical output signals to the different out-
put relays.
The matrix and the physical outputs will be seen in the PCM 600 engineering tool and this allows
the user to adapt the signals to the physical tripping outputs according to the specific application
needs.
Internal built-in OR logic is made in accordance with the following three rules:
1. when any one of first 16 inputs signals (i.e. INPUT1 to INPUT16) has logical val-
ue 1 (i.e. TRUE) the first output signal (i.e. OUTPUT1) will get logical value 1
(i.e. TRUE). Additional time delays can be introduced for OUTPUT1 via setting
parameters "PulseTime1", "OnDelayTime1" & "OffDelayTime1".
2. when any one of second 16 inputs signals (i.e. INPUT17 to INPUT32) has logical
value 1 (i.e. TRUE) the second output signal (i.e. OUTPUT2) will get logical val-
ue 1 (i.e. TRUE). Additional time delays can be introduced for OUTPUT2 via
setting parameters "PulseTime2", "OnDelayTime2" & "OffDelayTime2"
3. when any one of all 32 input signals (i.e. INPUT1 to INPUT32) has logical value
1 (i.e. TRUE) the third output signal (i.e. OUTPUT3) will get logical value 1 (i.e.
TRUE). Additional time delays can be introduced for OUTPUT3 via setting pa-
rameters "PulseTime3", "OnDelayTime3" & "OffDelayTime3".
486
Trip matrix logic (GGIO, 94X) Chapter 13
Logic
Output signals from this function block are typically connected to other logic blocks or directly
to output contacts from the IED. When used for direct tripping of the circuit breaker(s) the pulse
time delay on that output signal shall be set to approximately 0,150s in order to obtain satisfac-
tory minimum duration of the trip pulse to the circuit breaker trip coils.
487
Trip matrix logic (GGIO, 94X) Chapter 13
Logic
T R01-
TRMGGIO
INPUT 1 OUT PUT 1
INPUT 2 OUT PUT 2
INPUT 3 OUT PUT 3
INPUT 4
INPUT 5
INPUT 6
INPUT 7
INPUT 8
INPUT 9
INPUT 10
INPUT 11
INPUT 12
INPUT 13
INPUT 14
INPUT 15
INPUT 16
INPUT 17
INPUT 18
INPUT 19
INPUT 20
INPUT 21
INPUT 22
INPUT 23
INPUT 24
INPUT 25
INPUT 26
INPUT 27
INPUT 28
INPUT 29
INPUT 30
INPUT 31
INPUT 32
en05000370.vsd
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Trip matrix logic (GGIO, 94X) Chapter 13
Logic
Signal Description
INPUT12 Binary input 12
INPUT13 Binary input 13
INPUT14 Binary input 14
INPUT15 Binary input 15
INPUT16 Binary input 16
INPUT17 Binary input 17
INPUT18 Binary input 18
INPUT19 Binary input 19
INPUT20 Binary input 20
INPUT21 Binary input 21
INPUT22 Binary input 22
INPUT23 Binary input 23
INPUT24 Binary input 24
INPUT25 Binary input 25
INPUT26 Binary input 26
INPUT27 Binary input 27
INPUT28 Binary input 28
INPUT29 Binary input 29
INPUT30 Binary input 30
INPUT31 Binary input 31
INPUT32 Binary input 32
Table 237: Output signals for the TRMGGIO (TR01-) function block
Signal Description
OUTPUT1 Binary output 1
OUTPUT2 Binary output 2
OUTPUT3 Binary output 3
489
Trip matrix logic (GGIO, 94X) Chapter 13
Logic
490
Configurable logic blocks (LLD) Chapter 13
Logic
3.1 Introduction
A high number of logic blocks and timers are available for user to adapt the configuration to the
specific application needs.
I001-
INV
INPUT OUT
en04000404.vsd
Table 239: Input signals for the INV (I001-) function block
Signal Description
INPUT Input
Table 240: Output signals for the INV (I001-) function block
Signal Description
OUT Output
O001-
OR
INPUT1 OUT
INPUT2 NOUT
INPUT3
INPUT4
INPUT5
INPUT6
en04000405.vsd
491
Configurable logic blocks (LLD) Chapter 13
Logic
A001-
AND
INPUT 1 OUT
INPUT 2 NOUT
INPUT 3
INPUT 4N
en04000406.vsd
Table 243: Input signals for the AND (A001-) function block
Signal Description
INPUT1 Input 1
INPUT2 Input 2
INPUT3 Input 3
INPUT4N Input 4 inverted
Table 244: Output signals for the AND (A001-) function block
Signal Description
OUT Output
NOUT Output inverted
492
Configurable logic blocks (LLD) Chapter 13
Logic
T M01-
Timer
INPUT ON
T OFF
en04000378.vsd
Table 245: Input signals for the Timer (TM01-) function block
Signal Description
INPUT Input to timer
Table 246: Output signals for the Timer (TM01-) function block
Signal Description
ON Output from timer , pick-up delayed
OFF Output from timer, drop-out delayed
TP01-
Pulse
INPUT OUT
en04000407.vsd
Table 248: Input signals for the Pulse (TP01-) function block
Signal Description
INPUT Input to pulse timer
493
Configurable logic blocks (LLD) Chapter 13
Logic
Table 249: Output signals for the Pulse (TP01-) function block
Signal Description
OUT Output from pulse timer
XO01-
XOR
INPUT 1 OUT
INPUT 2 NOUT
en04000409.vsd
Table 251: Input signals for the XOR (XO01-) function block
Signal Description
INPUT1 Input 1 to XOR gate
INPUT2 Input 2 to XOR gate
Table 252: Output signals for the XOR (XO01-) function block
Signal Description
OUT Output from XOR gate
NOUT Inverted output from XOR gate
494
Configurable logic blocks (LLD) Chapter 13
Logic
SM01-
SRM
SET OUT
RESET NOUT
en04000408.vsd
Table 253: Input signals for the SRM (SM01-) function block
Signal Description
SET Set input
RESET Reset input
Table 254: Output signals for the SRM (SM01-) function block
Signal Description
OUT Output
NOUT Output inverted
Table 255: Parameter group settings for the SRM (SM01-) function
Parameter Range Step Default Unit Description
Memory Off - Off - Operating mode of the
On memory function
GT 01-
GT
INPUT OUT
en04000410.vsd
495
Configurable logic blocks (LLD) Chapter 13
Logic
TS01-
TimerSet
INPUT ON
OFF
en04000411.vsd
Table 259: Input signals for the TimerSet (TS01-) function block
Signal Description
INPUT Input to timer
Table 260: Output signals for the TimerSet (TS01-) function block
Signal Description
ON Output from timer, pick-up delayed
OFF Output from timer, drop-out delayed
Table 261: Parameter group settings for the TimerSet (TS01-) function
Parameter Range Step Default Unit Description
Operation Off - Off - Operation Off/On
On
t 0.000 - 90000.000 0.001 0.000 s Delay for settable timer n
496
Configurable logic blocks (LLD) Chapter 13
Logic
497
Fixed signal function block (FIXD) Chapter 13
Logic
4.1 Introduction
The fixed signals function block generates a number of pre-set (fixed) signals that can be used
in the configuration of an IED, either for forcing the unused inputs in the other function blocks
to a certain level/value, or for creating a certain logic.
FIXD-
FixedSignals
OFF
ON
INTZERO
INTONE
REALZERO
STRNULL
ZEROSMPL
GRP_OFF
en05000445.vsd
498
Fixed signal function block (FIXD) Chapter 13
Logic
499
Fixed signal function block (FIXD) Chapter 13
Logic
500
About this chapter Chapter 14
Monitoring
Chapter 14 Monitoring
501
Measurements (MMXU) Chapter 14
Monitoring
1 Measurements (MMXU)
1.1 Introduction
Measurement functions is used for power system measurement, supervision and reporting to the
local HMI, monitoring tool within PCM 600 or to station level (i.e. IEC61850). The possibility
to continuously monitor measured values of active power, reactive power, currents, voltages,
frequency, power factor etc. is vital for efficient production, transmission and distribution of
electrical energy. It provides to the system operator fast and easy overview of the present status
502
Measurements (MMXU) Chapter 14
Monitoring
of the power system. Additionally it can be used during testing and commissioning of protection
and control IEDs in order to verify proper operation and connection of instrument transformers
(i.e. CTs & VTs). During normal service by periodic comparison of the measured value from the
IED with other independent meters the proper operation of the IED analog measurement chain
can be verified. Finally it can be used to verify proper direction orientation for distance or direc-
tional overcurrent protection function.
Note!
The available measured values of an IED are depending on the actual hardware (TRM) and the
logic configuration made in PCM 600.
All measured values can be supervised with four settable limits, i.e. low-low limit, low limit,
high limit and high-high limit. A zero clamping reduction is also supported, i.e the measured val-
ue below a settable limit is forced to zero which reduces the impact of noise in the inputs.
Dead-band supervision can be used to report measured signal value to station level when change
in measured value is above set threshold limit or time integral of all changes since the last time
value updating exceeds the threshold limit. Measure value can also be based on periodic report-
ing.
The measuring function, SVR, provides the following power system quantities:
It is possible to calibrate the measuring function above to get class 0.5 presentation. This is ac-
complished by angle and amplitude compensation at 5, 30 and 100% of rated current and volt-
age.
Note!
The power system quantities provided, depends on the actual hardware, (TRM) and the logic
configuration made in PCM 600.
503
Measurements (MMXU) Chapter 14
Monitoring
The SVR function calculates three-phase power quantities by using fundamental frequency pha-
sors (i.e. DFT values) of the measured current and voltage signals. The measured power quan-
tities are available either as instantaneously calculated quantities or averaged values over a
period of time (i.e. low pass filtered) depending on the selected settings.
The IED can be provided with up to 3 SVR-, 10 CP-, 5 VP-, 3 CSQ- and 3 VSQ-measurement
functions.
The information on measured quantities is available for the user at different locations:
• Overfunction, when the measured current exceeds the High limit (XHiLim) or
High-high limit (XHiHiLim) pre-set values
• Underfunction, when the measured current decreases under the Low limit
(XLowLim) or Low-low limit (XLowLowLim) pre-set values.
504
Measurements (MMXU) Chapter 14
Monitoring
X_RANGE = 3
High-high limit
X_RANGE= 1 Hysteresis
High limit
X_RANGE=0
X_RANGE=0 t
Low limit
X_RANGE=2
Low-low limit
X_RANGE=4
en05000657.vsd
Figure 248: Presentation of operating limits
Each analog output has one corresponding supervision level output (X_RANGE). The output
signal is an integer in the interval 0-4 (0: Normal, 1: High limit exceeded, 3: High-high limit ex-
ceeded, 2: below Low limit and 4: below Low-low limit). The output may be connected to a
measurement expander block (XP) to get measurement supervision as binary signals.
The logical value of the functional output signals changes according to figure 248.
The user can set the hysteresis (XLimHyst), which determines the difference between the oper-
ating and reset value at each operating point, in wide range for each measuring channel separate-
ly. The hysteresis is common for all operating values within one channel.
Cyclic reporting
The cyclic reporting of measured value is performed according to chosen setting (XRepTyp).
The measuring channel reports the value independent of amplitude or integral dead-band report-
ing.
505
Measurements (MMXU) Chapter 14
Monitoring
Y
Value Reported Value Reported
Value Reported Value Reported
(1st)
Y3 Value Reported
Y2 Y4
Y1 Y5
t
Value 1
Value 2
Value 3
Value 4
Value 5
en05000500.vsd
(*)Set value for t: XDbRepInt
Figure 249: Periodic reporting
506
Measurements (MMXU) Chapter 14
Monitoring
Value Reported
Y
99000529.vsd
After the new value is reported, the ±ΔY limits for dead-band are automatically set around it.
The new value is reported only if the measured quantity changes more than defined by the ±ΔY
set limits.
The last value reported, Y1 in figure 251 serves as a basic value for further measurement. A dif-
ference is calculated between the last reported and the newly measured value and is multiplied
by the time increment (discrete integral). The absolute values of these integral values are added
until the pre-set value is exceeded. This occurs with the value Y2 that is reported and set as a
new base for the following measurements (as well as for the values Y3, Y4 and Y5).
The integral dead-band supervision is particularly suitable for monitoring signals with small
variations that can last for relatively long periods.
507
Measurements (MMXU) Chapter 14
Monitoring
Y A1 >=
A >= pre-set value
A2 >=
pre-set value pre-set value
Y3 A3 + A4 + A5 + A6 + A7 >=
pre-set value
Y2 A1 A2
A4 A6
Value Reported Y4 A3 A5 A7
(1st) Value
Value Reported Y5
A Reported Value
Reported Value
Y1 Reported
t
99000530.vsd
Figure 251: Reporting with integral dead-band supervision
Mode of operation
The measurement function must be connected to three-phase current and three-phase voltage in-
put in the configuration tool (group signals), but it is capable to measure and calculate above
mentioned quantities in nine different ways depending on the available VT inputs connected to
the IED. The end user can freely select by a parameter setting, which one of the nine available
measuring modes shall be used within the function. Available options are summarized in the fol-
lowing table:
508
Measurements (MMXU) Chapter 14
Monitoring
Set value Formula used for complex, Formula used for voltage Comment
for parame- three-phase power calculation and current magnitude cal-
ter “Mode” culation
1 L1, L2, L3 Used when three
phase-to-earth
S = U L1 ⋅ I
*
L1 + U L2 ⋅ I
*
L2 + U L3 ⋅ I
*
L3
U = ( U L1 + U L 2 + U L 3 ) / 3 voltages are
available
I = ( I L1 + I L 2 + I L 3 ) / 3
509
Measurements (MMXU) Chapter 14
Monitoring
Set value Formula used for complex, Formula used for voltage Comment
for parame- three-phase power calculation and current magnitude cal-
ter “Mode” culation
6 L3L1 Used when only
UL3L1
S = U L 3 L1 ⋅ ( I L 3 − I L1 )
* *
U = U L 3 L1 phase-to-phase
voltage is avail-
I = ( I L 3 + I L1 ) / 2 able
It shall be noted that only in the first two operating modes (i.e. 1 & 2) the measurement function
calculates exact three-phase power. In other operating modes (i.e. from 3 to 9) it calculates the
three-phase power under assumption that the power system is fully symmetrical. Once the com-
plex apparent power is calculated then the P, Q, S, & PF are calculated in accordance with the
following formulas:
P = Re( S )
(Equation 44)
Q = Im( S )
(Equation 45)
S = S = P +Q
2 2
(Equation 46)
510
Measurements (MMXU) Chapter 14
Monitoring
PF = cosϕ = P
S
(Equation 47)
Additionally to the power factor value the two binary output signals from the function are pro-
vided which indicates the angular relationship between current and voltage phasors. Binary out-
put signal ILAG is set to one when current phasor is lagging behind voltage phasor. Binary
output signal ILEAD is set to one when current phasor is leading the voltage phasor.
Each analog output has a corresponding supervision level output (X_RANGE). The output sig-
nal is an integer in the interval 0-4, see section 1.2.1 "Measurement supervision".
Amplitude
% of Ir compensation
-10
IAmpComp5 Measured
IAmpComp30 current
IAmpComp100
5 30 100 % of Ir
0-5%: Constant
-10 5-30-100%: Linear
>100%: Constant
Degrees Angle
compensation
-10
IAngComp30 Measured
current
IAngComp5
IAngComp100
5 30 100 % of Ir
-10
en05000652.vsd
511
Measurements (MMXU) Chapter 14
Monitoring
The first current and voltage phase in the group signals will be used as reference and the ampli-
tude and angle compensation will be used for related input signals.
X = k ⋅ X Old + (1 − k ) ⋅ X Calculated
(Equation 48)
where:
X is a new measured value (i.e. P, Q, S, U, I or PF) to be given out from the function
XOld is the measured value given from the measurement function in previous execution cycle
XCalculated is the new calculated value in the present execution cycle
k is settable parameter by the end user which influence the filter properties
Default value for parameter k is 0.00. With this value the new calculated value is immediately
given out without any filtering (i.e. without any additional delay). When k is set to value bigger
than 0, the filtering is enabled. Appropriate value of k shall be determined separately for every
application. Some typical value for k =0.14.
Compensation facility
In order to compensate for small magnitude and angular errors in the complete measurement
chain (i.e. CT error, VT error, IED input transformer errors etc.) it is possible to perform on site
calibration of the power measurement. This is achieved by setting the complex constant which
is then internally used within the function to multiply the calculated complex apparent power S.
This constant is set as magnitude (i.e. setting parameter PowAmpFact, default value 1.000) and
angle (i.e. setting parameter PowAngComp, default value 0.0 degrees). Default values for these
two parameters are done in such way that they do not influence internally calculated value (i.e.
complex constant has default value 1). In this way calibration, for specific operating range (e.g.
around rated power) can be done at site. However to perform this calibration it is necessary to
have external power meter of the high accuracy class available.
512
Measurements (MMXU) Chapter 14
Monitoring
Directionality
In CT earthing parameter is set as described in section 1 "Analog inputs", active and reactive
power will be measured always towards the protected object. This is shown in the following
figure 253.
Busbar
P Q
Protected
Object
en05000373.vsd
That practically means that active and reactive power will have positive values when they flow
from the busbar towards the protected object and they will have negative values when they flow
from the protected object towards the busbar.
In some application, like for example when power is measured on the secondary side of the pow-
er transformer it might be desirable, from the end client point of view, to have actually opposite
directional convention for active and reactive power measurements. This can be easily achieved
by setting parameter PowAngComp to value of 180.0 degrees. With such setting the active and
reactive power will have positive values when they flow from the protected object towards the
busbar.
Frequency
Frequency is actually not calculated within measurement block. It is simply obtained from the
pre-processing block and then just given out from the measurement block as an output.
513
Measurements (MMXU) Chapter 14
Monitoring
Phase currents (amplitude and angle) are available on the outputs and each amplitude output has
a corresponding supervision level output (ILx_RANG). The supervision output signal is an in-
teger in the interval 0-4, see section 1.2.1 "Measurement supervision".
Phase to phase voltages (amplitude and angle) are available on the outputs and each amplitude
output has a corresponding supervision level output (ULxy_RANG). The supervision output
signal is an integer in the interval 0-4, see section 1.2.1 "Measurement supervision".
Positive, negative and three times zero sequence quantities are available on the outputs (voltage
and current, amplitude and angle). Each amplitude output has a corresponding supervision level
output (XRANGE). The output signal is an integer in the interval 0-4, see section 1.2.1 "Mea-
surement supervision".
SVR1-
CVMMXU
I3P S
U3P S_RANGE
P_INST
P
P_RANGE
Q_INST
Q
Q_RANGE
PF
PF_RANGE
ILAG
ILEAD
U
U_RANGE
I
I_RANGE
F
F_RANGE
en05000772.vsd
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Measurements (MMXU) Chapter 14
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CP01-
CMMXU
I3P IL1
IL1RANG
IL1ANGL
IL2
IL2RANG
IL2ANGL
IL3
IL3RANG
IL3ANGL
en05000699.vsd
VP01-
VMMXU
U3P UL12
UL12RANG
UL23
UL23RANG
UL31
UL31RANG
en05000701.vsd
CSQ1-
CMSQI
I3P 3I0
3I0RANG
I1
I1RANG
I2
I2RANG
en05000703.vsd
VSQ1-
VMSQI
U3P 3U0
3U0RANG
U1
U1RANG
U2
U2RANG
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Measurements (MMXU) Chapter 14
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Table 265: Output signals for the CVMMXU (SVR1-) function block
Signal Description
S Apparent Power magnitude of deadband value
S_RANGE Apparent Power range
P Active Power magnitude of deadband value
P_RANGE Active Power range
Q Active Power magnitude of deadband value
Q_RANGE Reactive Power range
PF Power Factor magnitude of deadband value
PF_RANGE Power Factor range
ILAG Current is lagging voltage
ILEAD Current is leading voltage
U Calculate voltage magnitude of deadband value
U_RANGE Calcuate voltage range
I Calculated current magnitude of deadband value
I_RANGE Calculated current range
F System frequency magnitude of deadband value
F_RANGE System frequency range
Table 266: Input signals for the CMMXU (CP01-) function block
Signal Description
I3P Group connection abstract block 1
Table 267: Output signals for the CMMXU (CP01-) function block
Signal Description
IL1 IL1 Amplitude, magnitude of reported value
IL1RANG IL1 Amplitude range
IL2 IL2 Amplitude, magnitude of reported value
IL2RANG IL2 Amplitude range
IL3 IL3 Amplitude, magnitude of reported value
IL3RANG IL3 Amplitude range
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Measurements (MMXU) Chapter 14
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Table 268: Input signals for the VMMXU (VP01-) function block
Signal Description
U3P Group connection abstract block 2
Table 269: Output signals for the VMMXU (VP01-) function block
Signal Description
UL12 UL12 Amplitude, magnitude of reported value
UL12RANG UL12 Amplitude range
UL23 UL23 Amplitude, magnitude of reported value
UL23RANG UL23 Amplitude range
UL31 UL31 Amplitude, magnitude of reported value
UL31RANG UL31 Amplitude range
Table 270: Input signals for the CMSQI (CSQ1-) function block
Signal Description
I3P Group connection abstract block 3
Table 271: Output signals for the CMSQI (CSQ1-) function block
Signal Description
3I0 3I0 Amplitude, magnitude of reported value
3I0RANG 3I0 Amplitude range
I1 I1 Amplitude, magnitude of reported value
I1RANG I1 Amplitude range
I2 I2 Amplitude, magnitude of reported value
I2RANG I2 Amplitude range
Table 272: Input signals for the VMSQI (VSQ1-) function block
Signal Description
U3P Group connection abstract block 4
517
Measurements (MMXU) Chapter 14
Monitoring
Table 273: Output signals for the VMSQI (VSQ1-) function block
Signal Description
3U0 3U0 Amplitude, magnitude of reported value
3U0RANG 3U0 Amplitude range
U1 U1 Amplitude, magnitude of reported value
U1RANG U1 Amplitude range
U2 U2 Amplitude, magnitude of reported value
U2RANG U2 Amplitude range
518
Measurements (MMXU) Chapter 14
Monitoring
519
Measurements (MMXU) Chapter 14
Monitoring
520
Measurements (MMXU) Chapter 14
Monitoring
521
Measurements (MMXU) Chapter 14
Monitoring
522
Measurements (MMXU) Chapter 14
Monitoring
523
Measurements (MMXU) Chapter 14
Monitoring
524
Measurements (MMXU) Chapter 14
Monitoring
525
Measurements (MMXU) Chapter 14
Monitoring
526
Measurements (MMXU) Chapter 14
Monitoring
527
Measurements (MMXU) Chapter 14
Monitoring
528
Measurements (MMXU) Chapter 14
Monitoring
529
Measurements (MMXU) Chapter 14
Monitoring
530
Measurements (MMXU) Chapter 14
Monitoring
531
Measurements (MMXU) Chapter 14
Monitoring
532
Measurements (MMXU) Chapter 14
Monitoring
533
Measurements (MMXU) Chapter 14
Monitoring
534
Event counter (GGIO) Chapter 14
Monitoring
2.1 Introduction
The function consists of six counters which are used for storing the number of times each counter
has been activated. It is also provided with a common blocking function for all six counters, to
be used for example at testing. Every counter can separately be set on or off by a parameter set-
ting.
The function block also has an input BLOCK. At activation of this input all six counters are
blocked. The input can for example be used for blocking the counters at testing.
2.2.1 Reporting
The content of the counters can be read in the local HMI. Refer to “Operators manual” for pro-
cedure.
Reset of counters can be performed in the local HMI and a binary input. Refer to “Operators
manual” for procedure.
Reading of content and resetting of the counters can also be performed remotely, for example
PCM 600 or MicroSkada.
2.2.2 Design
The function block has six inputs for increasing the counter values for each of the six counters
respectively. The content of the counters are stepped one step for each positive edge of the input
respectively.
The function block also has an input BLOCK. At activation of this input all six counters are
blocked.
The function block has an input RESET. At activation of this input all six counters are set to 0.
535
Event counter (GGIO) Chapter 14
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CNT1-
CNTGGIO
BLOCK
COUNTER1
COUNTER2
COUNTER3
COUNTER4
COUNTER5
COUNTER6
RESET
en05000345.vsd
536
Event function (EV) Chapter 14
Monitoring
3.1 Introduction
When using a Substation Automation system with LON or SPA communication, time-tagged
events can be sent at change or cyclically from the IED to the station level. These events are cre-
ated from any available signal in the IED that is connected to the Event function block. The event
function block is used for LON and SPA communication.
Analog and double indication values are also transferred through the event block.
Each event function block has 16 inputs INPUT1 - INPUT16. Each input can be given a name
from the CAP configuration tool. The inputs are normally used to create single events, but are
also intended for double indication events.
The function also has an input BLOCK to block the generation of events.
The events that are sent from the IED can originate from both internal logical signals and binary
input channels. The internal signals are time-tagged in the main processing module, while the
binary input channels are time-tagged directly on the input module. The time-tagging of the
events that are originated from internal logical signals have a resolution corresponding to the ex-
ecution cyclicity of the event function block. The time-tagging of the events that are originated
from binary input signals have a resolution of 1 ms.
The outputs from the event function block are formed by the reading of status, events and alarms
by the station level on every single input. The user-defined name for each input is intended to
be used by the station level.
All events according to the event mask are stored in a buffer, which contains up to 1000 events.
If new events appear before the oldest event in the buffer is read, the oldest event is overwritten
and an overflow alarm appears.
The events are produced according to the set-event masks. The event masks are treated common-
ly for both the LON and SPA communication. The event mask can be set individually for each
input channel. These settings are available:
• NoEvents
• OnSet
• OnReset
• OnChange
• AutoDetect
537
Event function (EV) Chapter 14
Monitoring
It is possible to define which part of the event function block that shall generate events. This can
be performed individually for the LON and SPA communication respectively. For each commu-
nication type these settings are available:
• Off
• Channel 1-8
• Channel 9-16
• Channel 1-16
For LON communication the events normally are sent to station level at change. It is possibly
also to set a time for cyclic sending of the events individually for each input channel.
To protect the SA system from signals with a high change rate that can easily saturate the event
system or the communication subsystems behind it, a quota limiter is implemented. If an input
creates events at a rate that completely consume the granted quota then further events from the
channel will be blocked. This block will be removed when the input calms down and the accu-
mulated quota reach 66% of the maximum burst quota. The maximum burst quota per input
channel equals 3 times the configurable setting MaxEvPerSec.
EV01-
Event
BLOCK
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
NAME1
NAME2
NAME3
NAME4
NAME5
NAME6
NAME7
NAME8
NAME9
NAME10
NAME11
NAME12
NAME13
NAME14
NAME15
NAME16
en05000697.vsd
538
Event function (EV) Chapter 14
Monitoring
539
Event function (EV) Chapter 14
Monitoring
540
Event function (EV) Chapter 14
Monitoring
541
Event function (EV) Chapter 14
Monitoring
542
Fault locator (RFLO) Chapter 14
Monitoring
4.1 Introduction
The accurate fault locator is an essential component to minimize the outages after a persistent
fault and/or to pin-point a weak spot on the line.
The built-in fault locator is an impedance measuring function giving the distance to the fault in
percent, km or miles. The main advantage is the high accuracy achieved by compensating for
load current and for the mutual zero sequence effect on double circuit lines.
The compensation includes setting of the remote and local sources and calculation of the distri-
bution of fault currents from each side. This distribution of fault current, together with recorded
load (pre-fault) currents, is used to exactly calculate the fault position. The fault can be recalcu-
lated with new source data at the actual fault to further increase the accuracy.
Specially on heavily loaded long lines (where the fault locator is most important) where the
source voltage angles can be up to 35-40 degrees apart the accuracy can be still maintained with
the advanced compensation included in fault locator.
When calculating distance to fault, pre-fault and fault phasors of currents and voltages are se-
lected from the Trip Value Recorder data, thus the analog signals used by the fault locator must
be among those connected to the disturbance report function. The analog configuration (channel
selection) is performed using the parameter setting tool within PCM 600.
The calculation algorithm considers the effect of load currents, double-end infeed and additional
fault resistance.
543
Fault locator (RFLO) Chapter 14
Monitoring
R0L+jX0L
R1L+jX1L
R1A+jX1A R1B+jX1B
Z0m=Z0m+jX0m
R0L+jX0L
R1L+jX1L en05000045.vsd
DRP
FL
Figure 260: Simplified network configuration with network data, required for settings of the
fault location-measuring function.
If source impedance in the near and far end of the protected line have changed in a significant
manner relative to the set values at fault location calculation time (due to exceptional switching
state in the immediate network, power generation out of order etc.), new values can be entered
via the local HMI and a recalculation of the distance to the fault can be ordered using the algo-
rithm described below. It’s also possible to change fault loop. In this way, a more accurate lo-
cation of the fault can be achieved.
The function indicates the distance to the fault as a percentage of the line length, in kilometers
or miles as selected on the local HMI. The fault location is stored as a part of the disturbance
report information (ER, DR, IND, TVR and FL) and managed via the LHMI or PCM 600.
The calculation algorithm used in the fault locator in compensates for the effect of double-end
infeed, additional fault resistance and load current.
544
Fault locator (RFLO) Chapter 14
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A B
ZA IA pZL IB (1-p).ZL ZB
IF
UA RF
xx01000171.vsd
U A = I A ⋅ p ⋅ Z L + IF ⋅ R F
(Equation 49)
Where:
IA is the line current after the fault, that is, pre-fault current plus current change due to
the fault,
IF is the fault current and
545
Fault locator (RFLO) Chapter 14
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IF A
IF = --------
DA
(Equation 50)
Where:
IFA is the change in current at the point of measurement, terminal A and
DA is a fault current-distribution factor, that is, the ratio between the fault current at line
end A and the total fault current.
( 1 – p ) ⋅ Z L + ZB
DA = -----------------------------------------
Z A + Z L + ZB
(Equation 51)
Thus, the general fault location equation for a single line is:
I FA
U A = I A ⋅ p ⋅ Z L + -------
- ⋅ RF
DA
(Equation 52)
Table 284: Expressions for UA, IA and IFA for different types of faults
Fault type: UA IA IFA
L1-N UL1A IL1A + KN x INA 3
--- × Δ ( I L1A – I 0A )
2
L2-N UL2A IL2A + KN x INA
3
--- × Δ ( I L2A – I 0A )
2
The KN complex quantity for zero-sequence compensation for the single line is equal to:
546
Fault locator (RFLO) Chapter 14
Monitoring
Z0L – Z 1L
K N = ------------------------
3 ⋅ Z1L
(Equation 53)
ΔI is the change in current, that is the current after the fault minus the current before the fault.
In the following, the positive sequence impedance for ZA, ZB and ZL is inserted into the equa-
tions, because this is the value used in the algorithm.
I FA
U A = I A ⋅ p ⋅ Z 1L + -------- ⋅ RF + I 0P ⋅ Z 0M
DA
(Equation 54)
Where:
I0P is a zero sequence current of the parallel line,
Z0M is a mutual zero sequence impedance and
DA is the distribution factor of the parallel line, which is:
( 1 – p ) ⋅ ( ZA + ZA L + ZB ) + Z B
DA = ----------------------------------------------------------------------------
- (Equation 55)
2 ⋅ ZA + Z L + 2 ⋅ Z B
Z0L – Z 1L Z 0M I 0P
K N = ----------------------- - ⋅ -------
- + ----------------
3 ⋅ Z1L 3 ⋅ Z1L I 0A
(Equation 56)
From these equations it can be seen, that, if Z0m = 0, then the general fault location equation for
a single line is obtained. Only the distribution factor differs in these two cases.
2
p – p ⋅ K1 + K2 – K3 ⋅ RF = 0
(Equation 57)
Where:
547
Fault locator (RFLO) Chapter 14
Monitoring
UA ZB
K 1 = ---------------- + --------------------------- + 1
I A ⋅ ZL Z L + ZA DD
(Equation 58)
UA ZB
K2 = --------------- ⋅ ⎛⎝ --------------------------- + 1⎞⎠
IA ⋅ Z L Z L + Z A DD
(Equation 59)
IF A ⎛ ZA + ZB
- ⋅ --------------------------- + 1⎞
K 3 = ---------------
I A ⋅ Z L ⎝ Z 1 + ZA DD ⎠
(Equation 60)
and:
For a single line, Z0M = 0 and ZADD = 0. Thus, equation 57 applies to both single and parallel
lines.
2
p – p ⋅ Re ( K 1 ) + Re ( K 2 ) – R F ⋅ Re ( K 3 ) = 0
(Equation 61)
– p ⋅ Im ⋅ ( K1 ) + Im ⋅ ( K 2 ) – R F ⋅ Im ⋅ ( K3 ) = 0
(Equation 62)
If the imaginary part of K3 is not zero, RF can be solved according to equation 62, and then in-
serted to equation 61. According to equation 61, the relative distance to the fault is solved as the
root of a quadratic equation.
Equation 61 gives two different values for the relative distance to the fault as a solution. A sim-
plified load compensated algorithm, that gives an unequivocal figure for the relative distance to
the fault, is used to establish the value that should be selected.
If the load compensated algorithms according to the above do not give a reliable solution, a less
accurate, non-compensated impedance model is used to calculate the relative distance to the
fault.
548
Fault locator (RFLO) Chapter 14
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U A = p ⋅ Z 1 L ⋅ IA + R F ⋅ I A
(Equation 63)
Where:
IA is according to table 284.
The accuracy of the distance-to-fault calculation, using the non-compensated impedance model,
is influenced by the pre-fault load current. So, this method is only used if the load compensated
models do not function and the display indicates whether the non-compensated model was used
when calculating the distance to the fault.
FLO1-
LMBRFLO
PHSELL1 FLTDISTX
PHSELL2 CALCMADE
PHSELL3
CALCDIST
en05000679.vsd
549
Fault locator (RFLO) Chapter 14
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Table 286: Output signals for the LMBRFLO (FLO1-) function block
Signal Description
FLTDISTX Reactive distance to fault
CALCMADE Fault calculation made
550
Fault locator (RFLO) Chapter 14
Monitoring
Table 288: Parameter group settings for the LMBRFLO (FLO1-) function
Parameter Range Step Default Unit Description
R1A 0.001 - 1500.000 0.001 2.000 ohm/p Source resistance A
(near end)
X1A 0.001 - 1500.000 0.001 12.000 ohm/p Source reactance A (near
end)
R1B 0.001 - 1500.000 0.001 2.000 ohm/p Source resistance B (far
end)
X1B 0.001 - 1500.000 0.001 12.000 ohm/p Source reactance B (far
end)
R1L 0.001 - 1500.000 0.001 2.000 ohm/p Positive sequence line
resistance
X1L 0.001 - 1500.000 0.001 12.500 ohm/p Positive sequence line
reactance
R0L 0.001 - 1500.000 0.001 8.750 ohm/p Zero sequence line resis-
tance
X0L 0.001 - 1500.000 0.001 50.000 ohm/p Zero sequence line reac-
tance
R0M 0.000 - 1500.000 0.001 0.000 ohm/p Zero sequence mutual
resistance
X0M 0.000 - 1500.000 0.001 0.000 ohm/p Zero sequence mutual
reactance
LineLength 0.0 - 10000.0 0.1 40.0 km Length of line
551
Measured value expander block Chapter 14
Monitoring
5.1 Introduction
The functions MMXU (SVR, CP and VP), MSQI (CSQ and VSQ) and MVGGIO (MV) are pro-
vided with measurement supervision functionality. All measured values can be supervised with
four settable limits, i.e. low-low limit, low limit, high limit and high-high limit. The measure val-
ue expander block (XP) has been introduced to be able to translate the integer output signal from
the measuring functions to 5 binary signals i.e. below low-low limit, below low limit, normal,
above high-high limit or above high limit. The output signals can be used as conditions in the
configurable logic.
552
Measured value expander block Chapter 14
Monitoring
XP01-
RANGE_XP
RANGE HIGHHIGH
HIGH
NORMAL
LOW
LOWLOW
en05000346.vsd
Table 292: Output signals for the RANGE_XP (XP01-) function block
Signal Description
HIGHHIGH Measured value is above high-high limit
HIGH Measured value is between high and high-high limit
NORMAL Measured value is between high and low limit
LOW Measured value is between low and low-low limit
LOWLOW Measured value is below low-low limit
553
Disturbance report (RDRE) Chapter 14
Monitoring
Function block name: DRP--, DRA1- – DRA4-, IEC 60617 graphical symbol:
DRB1- – DRB6-
ANSI number:
IEC 61850 logical node name:
ABRDRE
6.1 Introduction
Complete and reliable information about disturbances in the primary and/or in the secondary
system together with continuous event-logging is accomplished by the disturbance report func-
tionality.
The disturbance report, always included in the IED, acquires sampled data of all selected ana-
logue input and binary signals connected to the function block i.e. maximum 40 analogue and
96 binary signals.
The function is characterized by great flexibility regarding configuration, starting conditions, re-
cording times and large storage capacity.
Every disturbance report recording is saved in the IED in the standard Comtrade format. The
same applies to all events, which are continuously saved in a ring-buffer. The Local Human Ma-
chine Interface (LHMI) is used to get information about the recordings, but the disturbance re-
port files may be uploaded to the PCM 600 (Protection and Control IED Manager) and further
analysis using the disturbance handling tool.
554
Disturbance report (RDRE) Chapter 14
Monitoring
Figure 264 shows the relations among Disturbance Report, included functions and function
blocks. EL, ER and IND uses information from the binary input function blocks (DRB1- 6).
TVR uses analog information from the analog input function blocks (DRA1-3) which is used by
FL after estimation by TVR. The DR function acquires information from both DRAx and DRBx.
DRP- - FL01
A4RADR RDRE FL
Analog signals
Trip Value Rec Fault Locator
DRB1-- 6- Disturbance
Recorder
Event Recorder
Indications
en05000124.vsd
The whole disturbance report can contain information for a number of recordings, each with the
data coming from all the parts mentioned above. The event list function is working continuously,
independent of disturbance triggering, recording time etc. All information in the disturbance re-
port is stored in non-volatile flash memories. This implies that no information is lost in case of
loss of auxiliary power. Each report will get an identification number in the interval from
1-65536.
555
Disturbance report (RDRE) Chapter 14
Monitoring
Disturbance report
en05000125.vsd
Figure 265: Disturbance report structure
Up to 100 disturbance reports can be stored. If a new disturbance is to be recorded when the
memory is full, the oldest disturbance report is over-written by the new one. The total recording
capacity for the disturbance recorder is depending of sampling frequency, number of analog and
binary channels and recording time. The figure 266 shows number of recordings vs total record-
ing time tested for a typical configuration, i.e. in a 50 Hz system it’s possible to record 100 where
the average recording time is 3.4 seconds. The memory limit does not affect the rest of the dis-
turbance report (IND, ER, EL and TVR).
556
Disturbance report (RDRE) Chapter 14
Monitoring
Number of recordings
100
3,4 s
80 3,4 s 20 analog
96 binary
40 analog
96 binary
60 6,3 s
6,3 s
6,3 s 50 Hz
40
60 Hz
Total recording time
en05000488.vsd
Disturbance information
Date and time of the disturbance, the indications, events, fault location and the trip values are
available on the local human-machine interface (LHMI). To acquire a complete disturbance re-
port the use of a PC and PCM600 is required. The PC may be connected to the IED-front, rear
or remotely via the station bus (Ethernet ports).
Indications (IND)
Indications is a list of signals that were activated during the total recording time of the distur-
bance (not time-tagged). (See section 8 "Indications (RDRE)" for more detailed information.)
557
Disturbance report (RDRE) Chapter 14
Monitoring
Time tagging
The IED has a built-in real-time calendar and clock. This function is used for all time tagging
within the disturbance report
Recording times
The disturbance report (DRP) records information about a disturbance during a settable time
frame. The recording times are valid for the whole disturbance report. The disturbance recorder
(DR), the event recorder (ER) and indication function register disturbance data and events dur-
ing tRecording, the total recording time.
558
Disturbance report (RDRE) Chapter 14
Monitoring
Trig point
TimeLimit
PreFaultRecT PostFaultRecT
1 2 3
en05000487.vsd
Analog signals
Up to 40 analog signals can be selected for recording by the Disturbance recorder and triggering
of the Disturbance report function. Out of these 40, 30 are reserved for external analog signals,
i.e. signals from the analog input modules (TRM) and line differential communication module
(LDCM) via preprocessing function blocks (SMAI) and summation block (Sum3Ph). The last
10 channels may be connected to internally calculated analog signals available as function block
output signals (mA input signals, phase differential currents, bias currents etc.).
559
Disturbance report (RDRE) Chapter 14
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PRxx- DRA1-
SMAI A1RADR DRA2-
GRPNAME AI3P A2RADR DRA3-
External analog AI1NAME AI1 INPUT1 A3RADR
signals
AI2NAME AI2 INPUT2
TRM, LDCM AI3NAME AI3 INPUT3
SUxx
AI4NAME AI4 INPUT4
AIN INPUT5
INPUT6
...
A4RADR
INPUT31
Internal analog signals
T2Dx, T3Dx, INPUT32
REFx, HZDx, INPUT33
L3D, L6D,
LT3D, LT6D INPUT34
INPUT35
SVRx, CPxx, VP0x,
CSQx, VSQx, MVxx INPUT36
...
INPUT40
en05000653.vsd
The external input signals will be acquired, filtered and skewed and (after configuration) avail-
able as an input signal on the DRAx- function block via the PRxx function block. The informa-
tion is saved at the Disturbance report base sampling rate (1000 or 1200 Hz). Internally
calculated signals are updated according to the cycle time of the specific function. If a function
is running at lower speed than the base sampling rate, the Disturbance recorder will use the latest
updated sample until a new updated sample is available.
If the IED is preconfigured the only tool needed for analogue configuration of the Disturbance
report is the Signal Matrix Tool (SMT, external signal configuration). In case of modification of
a preconfigured IED or general internal configuration the Application Configuration tool within
PCM600 is used.
The preprocessor function block (PRxx) calculates the residual quantities in cases where only
the three phases are connected (AI4-input not used). PRxx makes the information available as a
group signal output, phase outputs and calculated residual output (AIN-output). In situations
where AI4-input is used as a input signal the corresponding information is available on the
non-calculated output (AI4) on the PRxx-block. Connect the signals to the DRAx accordingly.
For each of the analog signals, Operation = On means that it is recorded by the disturbance re-
corder. The trigger is independent of the setting of Operation, and triggers even if operation is
set to Off. Both undervoltage and overvoltage can be used as trigger conditions. The same ap-
plies for the current signals.
560
Disturbance report (RDRE) Chapter 14
Monitoring
The analog signals are presented only in the disturbance recording, but they affect the entire dis-
turbance report when being used as triggers.
Binary signals
Up to 96 binary signals can be selected to be handled by the disturbance report.The signals can
be selected from internal logical and binary input signals. A binary signal is selected to be re-
corded when:
Each of the 96 signals can be selected as a trigger of the disturbance report (opera-
tion=ON/OFF). A binary signal can be selected to activate the red LED on the local HMI (set-
LED=On/Off).
The selected signals are presented in the event recorder, event list and the disturbance recording.
But they affect the whole disturbance report when they are used as triggers. The indications are
also selected from these 96 signals with the LHMI IndicationMask=Show/Hide.
Trigger signals
The trigger conditions affect the entire disturbance report, except the event list, which runs con-
tinuously. As soon as at least one trigger condition is fulfilled, a complete disturbance report is
recorded. On the other hand, if no trigger condition is fulfilled, there is no disturbance report, no
indications, and so on. This implies the importance of choosing the right signals as trigger con-
ditions.
• Manual trigger
• Binary-signal trigger
• Analog-signal trigger (over/under function)
Manual trigger
A disturbance report can be manually triggered from the local HMI, from PCM600 or via station
bus (IEC61850). When the trigger is activated, the manual trigger signal is generated. This fea-
ture is especially useful for testing. Refer to “Operators manual” for procedure.
Binary-signal trigger
Any binary signal state (logic one or a logic zero) can be selected to generate a trigger (Triglevel
= Trig on 0/Trig on 1).The binary signal must remain in a steady state for at least 15 ms to be
valid. When a binary signal is selected to generate a trigger from a logic zero, the selected signal
will not be listed in the indications list of the disturbance report.
Analog-signal trigger
All analog signals are available for trigger purposes, no matter if they are recorded in the distur-
bance recorder or not. The settings are OverTrigOp, UnderTrigOp, OverTrigLe and UnderTri-
gLe.
561
Disturbance report (RDRE) Chapter 14
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The check of the trigger condition is based on peak-to-peak values. When this is found, the ab-
solute average value of these two peak values is calculated. If the average value is above the
threshold level for an overvoltage or overcurrent trigger, this trigger is indicated with a greater
than (>) sign with the user-defined name.
If the average value is below the set threshold level for an undervoltage or undercurrent trigger,
this trigger is indicated with a less than (<) sign with its name. The procedure is separately per-
formed for each channel.
This method of checking the analog start conditions gives a function which is insensitive to DC
offset in the signal. The operate time for this start is typically in the range of one cycle, 20 ms
for a 50 Hz network.
All under/over trig signal information is available on the LHMI and PCM600, see table 294
"Output signals for the RDRE (DRP--) function block".
Post Retrigger
The disturbance report function does not respond to any new trig condition, during a recording.
Under certain circumstances the fault condition may reoccur during the post-fault recording, for
instance by automatic reclosing to a still faulty power line.
In order to capture the new disturbance it is possible to allow retriggering (PostRetrig = On)dur-
ing the post-fault time. In this case a new, complete recording will start and, during a period, run
in parallel with the initial recording.
When the retrig parameter is disabled (PostRetrig = Off), a new recording will not start until the
post-fault (PostFaultrecT or TimeLimit) period is terminated. If a new trig occurs during the
post-fault period and lasts longer than the proceeding recording a new complete recording will
be fetched.
The disturbance report function can handle maximum 3 simultaneous disturbance recordings.
DRP--
RDRE
DRPOFF
RECSTART
RECMADE
CLEARED
MEMUSED
en05000406.vsd
562
Disturbance report (RDRE) Chapter 14
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DRA1-
A1RADR
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
NAME1
NAME2
NAME3
NAME4
NAME5
NAME6
NAME7
NAME8
NAME9
NAME10
en05000430.vsd
Figure 270: DRA1 function block, analog inputs, example for DRA1–DRA3
DRA4-
A4RADR
INPUT31
INPUT32
INPUT33
INPUT34
INPUT35
INPUT36
INPUT37
INPUT38
INPUT39
INPUT40
NAME31
NAME32
NAME33
NAME34
NAME35
NAME36
NAME37
NAME38
NAME39
NAME40
en05000431.vsd
563
Disturbance report (RDRE) Chapter 14
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DRB1-
B1RBDR
INPUT 1
INPUT 2
INPUT 3
INPUT 4
INPUT 5
INPUT 6
INPUT 7
INPUT 8
INPUT 9
INPUT 10
INPUT 11
INPUT 12
INPUT 13
INPUT 14
INPUT 15
INPUT 16
NAME1
NAME2
NAME3
NAME4
NAME5
NAME6
NAME7
NAME8
NAME9
NAME10
NAME11
NAME12
NAME13
NAME14
NAME15
NAME16
en05000432.vsd
Figure 272: DRB1 function block, binary inputs, example for DRB1–DRB6
564
Disturbance report (RDRE) Chapter 14
Monitoring
Table 295: Input signals for the A1RADR (DRA1-) function block, example for
DRA1–DRA3
Signal Description
INPUT1 Group signal for input 1
INPUT2 Group signal for input 2
INPUT3 Group signal for input 3
INPUT4 Group signal for input 4
INPUT5 Group signal for input 5
INPUT6 Group signal for input 6
INPUT7 Group signal for input 7
INPUT8 Group signal for input 8
INPUT9 Group signal for input 9
INPUT10 Group signal for input 10
NAME1 User define string for analogue input 1
NAME2 User define string for analogue input 2
NAME3 User define string for analogue input 3
NAME4 User define string for analogue input 4
NAME5 User define string for analogue input 5
NAME6 User define string for analogue input 6
NAME7 User define string for analogue input 7
NAME8 User define string for analogue input 8
NAME9 User define string for analogue input 9
NAME10 User define string for analogue input 10
Table 296: Input signals for the A4RADR (DRA4-) function block
Signal Description
INPUT31 Analogue channel 31
INPUT32 Analogue channel 32
INPUT33 Analogue channel 33
INPUT34 Analogue channel 34
INPUT35 Analogue channel 35
INPUT36 Analogue channel 36
INPUT37 Analogue channel 37
INPUT38 Analogue channel 38
INPUT39 Analogue channel 39
INPUT40 Analogue channel 40
NAME31 User define string for analogue input 31
NAME32 User define string for analogue input 32
NAME33 User define string for analogue input 33
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Disturbance report (RDRE) Chapter 14
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Signal Description
NAME34 User define string for analogue input 34
NAME35 User define string for analogue input 35
NAME36 User define string for analogue input 36
NAME37 User define string for analogue input 37
NAME38 User define string for analogue input 38
NAME39 User define string for analogue input 39
NAME40 User define string for analogue input 40
Table 297: Input signals for the B1RBDR (DRB1-) function block, example for
DRB1–DRB6
Signal Description
INPUT1 Binary channel 1
INPUT2 Binary channel 2
INPUT3 Binary channel 3
INPUT4 Binary channel 4
INPUT5 Binary channel 5
INPUT6 Binary channel 6
INPUT7 Binary channel 7
INPUT8 Binary channel 8
INPUT9 Binary channel 9
INPUT10 Binary channel 10
INPUT11 Binary channel 11
INPUT12 Binary channel 12
INPUT13 Binary channel 13
INPUT14 Binary channel 14
INPUT15 Binary channel 15
INPUT16 Binary channel 16
NAME1 User define string for binary input 1
NAME2 User define string for binary input 2
NAME3 User define string for binary input 3
NAME4 User define string for binary input 4
NAME5 User define string for binary input 5
NAME6 User define string for binary input 6
NAME7 User define string for binary input 7
NAME8 User define string for binary input 8
NAME9 User define string for binary input 9
NAME10 User define string for binary input 10
NAME11 User define string for binary input 11
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Signal Description
NAME12 User define string for binary input 12
NAME13 User define string for binary input 13
NAME14 User define string for binary input 14
NAME15 User define string for binary input 15
NAME16 User define string for binary input 16
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Note!
Setting parameters FUNCn and INFONOn (n=1-16) for the B1RBDR (DRB1-) function are
only available in the LHMI.
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7.1 Introduction
Continuous event-logging is useful for monitoring of the system from an overview perspective
and is a complement to specific disturbance recorder functions.
The event list logs all binary input signals connected to the Disturbance report function. The list
may contain of up to 1000 time-tagged events stored in a ring-buffer.
The event list information is available in the IED and is reported to higher control systems via
the station bus together with other logged events in the IED. In absence of any software tool the
information seeker may use the local HMI to view the event list.
The list can be configured to show oldest or newest events first with a setting on the LHMI.
The event list function runs continuously, in contrast to the event recorder function, which is
only active during a disturbance.
The name of the binary input signal that appears in the event recording is the user-defined name
assigned when the IED is configured. The same name is used in the disturbance recorder func-
tion (DR), indications (IND) and the event recorder function (ER).
The event list is stored and managed separate from the disturbance report information (ER, DR,
IND, TVR and FL).
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8 Indications (RDRE)
8.1 Introduction
To get fast, condensed and reliable information about disturbances in the primary and/or in the
secondary system it is important to know e.g. binary signals that have changed status during a
disturbance. This information is used in the short perspective to get information via the LHMI
in a straightforward way.
There are three LEDs on the LHMI (green, yellow and red), which will display status informa-
tion about the IED and the Disturbance Report function (trigged).
The Indication list function shows all selected binary input signals connected to the Disturbance
Report function that have changed status during a disturbance.
The indication information is available for each of the recorded disturbances in the IED and the
user may use the Local Human Machine Interface (LHMI) to get the information.
Green LED:
Yellow LED:
Red LED:
Indication list:
The possible indicated signals are the same as the ones chosen for the disturbance report function
and disturbance recorder
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The indication function tracks 0 to 1 changes of binary signals during the recording period of the
collection window. This means that constant logic zero, constant logic one or state changes from
logic one to logic zero will not be visible in the list of indications. Signals are not time tagged.
In order to be recorded in the list of indications the:
Indications are selected with the indication mask (IndicationMask) when configuring the binary
inputs.
The name of the binary input signal that appears in the Indication function is the user-defined
name assigned at configuration of the IED. The same name is used in disturbance recorder func-
tion (DR), indications (IND) and event recorder function (ER).
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9.1 Introduction
Quick, complete and reliable information about disturbances in the primary and/or in the sec-
ondary system is vital e.g. time tagged events logged during disturbances. This information is
used for different purposes in the short term (e.g. corrective actions) and in the long term (e.g.
Functional Analysis).
The event recorder logs all selected binary input signals connected to the Disturbance Report
function. Each recording can contain up to 150 time-tagged events.
The event recorder information is available for the disturbances locally in the IED.
The information may be uploaded to the PCM 600 (Protection and Control IED Manager) and
further analysed using the Disturbance Handling tool.
The event recording information is an integrated part of the disturbance record (Comtrade file).
In case of overlapping recordings, due to PostRetrig = On and a new trig signal appears during
post-fault time, events will be saved in both recording files.
The name of the binary input signal that appears in the event recording is the user-defined name
assigned when configuring the IED. The same name is used in the disturbance recorder function
(DR), indications (IND) and event recorder function (ER).
The event record is stored as a part of the disturbance report information (ER, DR, IND, TVR
and FL) and managed via the LHMI or PCM 600.
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10.1 Introduction
Information about the pre-fault and fault values for currents and voltages are vital for the distur-
bance evaluation.
The Trip value recorder calculates the values of all selected analogue input signals connected to
the Disturbance report function. The result is magnitude and phase angle before and during the
fault for each analogue input signal.
The trip value recorder information is available for the disturbances locally in the IED.
The information may be uploaded to the PCM 600 (Protection and Control IED Manager) and
further analysed using the Disturbance Handling tool.
The trip value recorder information is an integrated part of the disturbance record (Comtrade
file).
When the disturbance report function is triggered the sample for the fault interception is
searched for, by checking the non-periodic changes in the analog input signals. The channel
search order is consecutive, starting with the analog input with the lowest number.
When a starting point is found, the Fourier estimation of the pre-fault values of the complex val-
ues of the analog signals starts 1.5 cycle before the fault sample. The estimation uses samples
during one period. The post-fault values are calculated using the Recursive Least Squares (RLS)
method. The calculation starts a few samples after the fault sample and uses samples during 1/2
- 2 cycles depending on the shape of the signals.
If no starting point is found in the recording, the disturbance report trig sample is used as the
start sample for the Fourier estimation. The estimation uses samples during one cycle before the
trig sample. In this case the calculated values are used both as pre-fault and fault values.
The name of the analog input signal that appears in the Trip value recorder function is the us-
er-defined name assigned when the IED is configured. The same name is used in the Disturbance
recorder function (DR).
The trip value record is stored as a part of the disturbance report information (ER, DR, IND,
TVR and FLOC) and managed in via the LHMI or PCM 600.
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11.1 Introduction
The Disturbance Recorder function supplies fast, complete and reliable information about dis-
turbances in the power system. It facilitates understanding system behavior and related primary
and secondary equipment during and after a disturbance. Recorded information is used for dif-
ferent purposes in the short perspective (e.g. corrective actions) and long perspective (e.g. Func-
tional Analysis).
The Disturbance Recorder acquires sampled data from all selected analogue input and binary
signals connected to the Disturbance Report function (maximum 40 analog and 96 binary sig-
nals). The binary signals are the same signals as available under the event recorder function.
The function is characterized by great flexibility and is not dependent on the operation of pro-
tection functions. It can record disturbances not detected by protection functions.
The disturbance recorder information for the last 100 disturbances are saved in the IED and the
Local Human Machine Interface (LHMI) is used to view the list of recordings.
The disturbance recording information can be uploaded to the PCM 600 (Protection and Control
IED Manager) and further analysed using the Disturbance Handling tool.
DR collects analog values and binary signals continuously, in a cyclic buffer. The pre-fault buff-
er operates according to the FIFO principle; old data will continuously be overwritten as new
data arrives when the buffer is full. The size of this buffer is determined by the set pre-fault re-
cording time.
Upon detection of a fault condition (triggering), the disturbance is time tagged and the data stor-
age continues in a post-fault buffer. The storage process continues as long as the fault condition
prevails - plus a certain additional time. This is called the post-fault time and it can be set in the
disturbance report.
The above mentioned two parts form a disturbance recording. The whole memory, intended for
disturbance recordings, acts as a cyclic buffer and when it is full, the oldest recording is over-
written. The last 100 recordings are stored in the IED.
The time tagging refers to the activation of the trigger that starts the disturbance recording. A
recording can be trigged by, manual start, binary input and/or from analog inputs (over-/under-
level trig).
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A user-defined name for each of the signals can be set. These names are common for all func-
tions within the disturbance report functionality.
• Saving the data for analog channels with corresponding data for binary signals
• Add relevant data to be used by the Disturbance Handling tool (part of PCM 600)
• Compression of the data, which is performed without losing any data accuracy
• Storing the compressed data in a non-volatile memory (flash memory)
The recording files comply with the Comtrade standard IEC 60255-24 and are divided into three
files; a header file (HDR), a configuration file (CFG) and a data file (DAT).
The header file (optional in the standard) contains basic information about the disturbance i.e.
information from the Disturbance Report functions (ER, TVR and FL). The Disturbance Han-
dling tool use this information and present the recording in a user-friendly way.
General:
Analog:
Binary:
• Signal names
• Status of binary input signals
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The configuration file is a mandatory file containing information needed to interpret the data
file. For example sampling rate, number of channels, system frequency, channel info etc.
The data file, which also is mandatory, containing values for each input channel for each sample
in the record (scaled value). The data file also contains a sequence number and time stamp for
each set of samples.
The last 8 recordings, out of maximum 100, are available for transfer to the master. When the
last one is transferred and acknowledged new recordings in the IED will appear, in the master
points of view (even if they already where stored in the IED).
To be able to report 40 analog channels from the IED using IEC 60870-5-103 the first
8 channels are placed in the public range and the next 32 are placed in the private range. To com-
ply the standard the first 8 must be configured according to table 307.
The binary signals connected to DRB1-DRB6 are reported by polling. The function blocks in-
clude function type and information number.
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Chapter 15 Metering
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1.1 Introduction
The pulse counter logic function counts externally generated binary pulses, for instance pulses
coming from an external energy meter, for calculation of energy consumption values. The pulses
are captured by the binary input module and then read by the pulse counter function. A scaled
service value is available over the station bus. The special Binary input module with enhanced
pulse counting capabilities must be ordered to achieve this functionality.
The integration time period can be set in the range from 30 seconds to 60 minutes and is syn-
chronized with absolute system time. Interrogation of additional pulse counter values can be
done with a command (intermediate reading) for a single counter. All active counters can also
be read by the LON General Interrogation command (GI).
The pulse counter in REx670 supports unidirectional incremental counters. That means only
positive values are possible. The counter uses a 32 bit format, that is, the reported value is a
32-bit, signed integer with a range 0...+2147483647. The counter is reset at initialization of the
IED.
The reported value to station HMI over the LON bus contains Identity, Value, Time, and Pulse
Counter Quality. The Pulse Counter Quality consists of:
The transmission of the counter value by SPA can be done as a service value, that is, the value
frozen in the last integration cycle is read by the station HMI from the database. The pulse
counter function updates the value in the database when an integration cycle is finished and ac-
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tivates the NEW_VAL signal in the function block. This signal can be connected to an Event
function block, be time tagged, and transmitted to the station HMI. This time corresponds to the
time when the value was frozen by the function.
Note!
The pulse counter function requires an binary input card, BIMp, that is specially adapted to the
pulse counter function.
Figure 273 shows the pulse counter function block with connections of the inputs and outputs.
The BLOCK and READ_VAL inputs can be connected to Single Command blocks, which are
intended to be controlled either from the station HMI or/and the local HMI. As long as the
BLOCK signal is set, the pulse counter is blocked. The signal connected to READ_VAL per-
forms one additional reading per positive flank. The signal must be a pulse with a length >1 sec-
ond.
The BI_PULSE input is connected to the used input of the function block for the Binary Input
Module (BIM).
Each pulse counter function block has four binary output signals that can be connected to an
Event function block for event recording: INVALID, RESTART, BLOCKED and NEW_VAL.
The SCAL_VAL signal can be connected to the IEC Event function block.
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The INVALID signal is a steady signal and is set if the Binary Input Module, where the pulse
counter input is located, fails or has wrong configuration.
The RESTART signal is a steady signal and is set when the reported value does not comprise a
complete integration cycle. That is, in the first message after IED start-up, in the first message
after deblocking, and after the counter has wrapped around during last integration cycle.
The BLOCKED signal is a steady signal and is set when the counter is blocked. There are two
reasons why the counter is blocked:
The NEW_VAL signal is a pulse signal. The signal is set if the counter value was updated since
last report.
PC01-
PCGGIO
BLOCK INVALID
READ_VAL RESTART
BI_PULSE BLOCKED
RS_CNT NEW_VAL
NAME
SCAL_VAL
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Table 310: Output signals for the PCGGIO (PC01-) function block
Signal Description
INVALID The pulse counter value is invalid
RESTART The reported value not comprise a complete integration cycle
BLOCKED The pulse counter function is blocked
NEW_VAL A new pulse counter value is generated
NAME User defined string for pulse counter
SCAL_VAL Scaled value with time and status information
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About this chapter Chapter 16
Station communication
Chapter 16 Station
communication
599
Overview Chapter 16
Station communication
1 Overview
Each IED is provided with a communication interface, enabling it to connect to one or many sub-
station level systems or equipment, either on the Substation Automation (SA) bus or Substation
Monitoring (SM) bus.
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2.1 Introduction
Single or double optical Ethernet ports for the new substation communication standard
IEC61850-8-1 for the station bus are provided. IEC61850-8-1 allows intelligent devices (IEDs)
from different vendors to exchange information and simplifies SA engineering. Peer- to peer
communication according to GOOSE is part of the standard. Disturbance files uploading is pro-
vided.
SP01-
SPGGIO
IN
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MP01-
SP16GGIO
BLOCK
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
IN11
IN12
IN13
IN14
IN15
IN16
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Table 314: Input signals for the SP16GGIO (MP01-) function block
Signal Description
BLOCK Block of function
IN1 Input 1 status
IN2 Input 2 status
IN3 Input 3 status
IN4 Input 4 status
IN5 Input 5 status
IN6 Input 6 status
IN7 Input 7 status
IN8 Input 8 status
IN9 Input 9 status
IN10 Input 10 status
IN11 Input 11 status
IN12 Input 12 status
IN13 Input 13 status
IN14 Input 14 status
IN15 Input 15 status
IN16 Input 16 status
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DP01-
DPGGIO
OPEN
CLOSE
VALID
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Table 316: Output signals for the DPGGIO (DP01-) function block
Signal Description
POSITION Double point indication
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MV01-
MVGGIO
IN VALUE
RANGE
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Table 318: Output signals for the MVGGIO (MV01-) function block
Signal Description
VALUE Magnitude of deadband value
RANGE Range
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3.1 Introduction
An optical network can be used within the Substation Automation system. This enables commu-
nication with the IED through the LON bus from the operator’s workplace, from the control cen-
ter and also from other terminals.
The LON protocol is specified in LonTalkProtocol Specification Version 3 from Echelon Cor-
poration and is designed for communication in control networks. These networks are character-
ized by high speed for data transfer, short messages (few bytes), peer-to-peer communication,
multiple communication media, low maintenance, multivendor equipment, and low support
costs. LonTalk supports the needs of applications that cover a range of requirements. The pro-
tocol follows the reference model for open system interconnection (OSI) designed by the Inter-
national Standardization Organization (ISO).
In this document the most common addresses for commands and events are available. Other ad-
dresses can be found in a separate document, refer to section 1.5 "Related documents".
It is assumed that the reader is familiar with the LON communication protocol in general.
The LON bus links the different parts of the protection and control system. The measured values,
status information, and event information are spontaneously sent to the higher-level devices.
The higher-level devices can read and write memorized values, setting values, and other param-
eter data when required. The LON bus also enables the bay level devices to communicate with
each other to deliver, for example, interlocking information among the terminals without the
need of a bus master.
The LonTalk protocol supports two types of application layer objects: network variables and ex-
plicit messages. Network variables are used to deliver short messages, such as measuring values,
status information, and interlocking/blocking signals. Explicit messages are used to transfer
longer pieces of information, such as events and explicit read and write messages to access de-
vice data.
The benefits achieved from using the LON bus in protection and control systems include direct
communication among all terminals in the system and support for multi-master implementa-
tions. The LON bus also has an open concept, so that the terminals can communicate with ex-
ternal devices using the same standard of network variables.
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LON protocol
Configuration of LON
Lon Network Tool (LNT 505) is a multi-purpose tool for LonWorks network configuration. All
the functions required for setting up and configuring a LonWorks network is easily accessible
on a single tool program. For details see the “Operators manual”.
Activate LONCommunication
Activate LON communication in the PST Parameter Setting Tool under Settings -> General set-
tings – > Communication – > SLM configuration – > Rear optical LON, where ADE should be
set to ON.
Vertical communication
Vertical communication describes communication between the monitoring devices and protec-
tion and control IEDs. This communication includes sending of changed process data to moni-
toring devices as events and transfer of commands, parameter data and disturbance recorder
files. This communication is implemented using explicit messages.
Binary events
Binary events are generated in event function blocks EV01 to EV20 in the 670IEDs. The event
function blocks have predefined LON addresses. table 321 shows the LON addresses to the first
input on the event function blocks. The addresses to the other inputs on the event function block
are consecutive after the first input. For example, input 15 on event block EV17 has the address
1280 + 14 (15-1) = 1294.
For double indications only the first eight inputs 1–8 must be used. Inputs 9–16 can be used for
other type of events at the same event block.
As basic, 3 event function blocks EV01-EV03 running with a fast loop time (3 ms) is available
in the 670IEDS. The remaining event function blocks EV04-EV09 runs with a loop time on 8
ms and EV10-EV20 runs with a loop time on 100 ms. The event blocks are used to send binary
signals, integers, real time values like analogue data from measuring functions and mA input
modules as well as pulse counter signals.
16 pulse counter value function blocks PC01 to PC16 and 24 mA input service values function
blocks SMMI1_In1 to 6 – SMMI4_In1 to 6 are available in the 670IEDs.
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The first LON address in every event function block is found in table 321
Event masks
The event mask for each input can be set individually from the Parameter Setting Tool (PST)
Under: Settings – > General Settings –> Monitoring –> Event function as.
• No events
• OnSet, at pick-up of the signal
• OnReset, at drop-out of the signal
• OnChange, at both pick-up and drop-out of the signal
• AutoDetect, event system itself make the reporting decision, (reporting criteria
for integers has no semantic, prefer to be set by the user)
The following type of signals from application functions can be connected to the event function
block.
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Single indication
Directly connected binary IO signal via binary input function block (SMBI) is always reported
on change, no changed detection is done in the event function block. Other Boolean signals, for
example a start or a trip signal from a protection function is event masked in the event function
block.
Double indications
Double indications can only be reported via switch-control (SCSWI) functions, the event re-
porting is based on information from switch-control, no change detection is done in the event
function block.
Directly connected binary IO signal via binary input function block (SMBI) is not possible to
handle as double indication. Double indications can only be reported for the first 8 inputs on an
event function block.
Analog value
All analog values are reported cyclic, the reporting interval is taken from the connected function
if there is a limit supervised signal, otherwise it is taken from the event function block.
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Command handling
Commands are transferred using transparent SPA-bus messages. The transparent SPA-bus mes-
sage is an explicit LON message, which contains an ASCII character message following the cod-
ing rules of the SPA-bus protocol. The message is sent using explicit messages with message
code 41H and using acknowledged transport service.
Both the SPA-bus command messages (R or W) and the reply messages (D, A or N) are sent
using the same message code. It is mandatory that one device sends out only one SPA-bus mes-
sage at a time to one node and waits for the reply before sending the next message.
For commands from the operator workplace to the IED for apparatus control, i.e. the function
blocks type SCSWI 1 to 32, SXCBR 1 to 18and SXSWI 1 to 28; the SPA addresses are accord-
ing to table 322
Horizontal communication
Network variables are used for communication between REx 5xx and 670IEDs. The supported
network variable type is SNVT_state (NV type 83). SNVT_state is used to communicate the
state of a set of 1 to 16 Boolean values.
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The multiple command send function block (MTxx) is used to pack the information to one value.
This value is transmitted to the receiving node and presented for the application by a multiple
command function block (CMxx). At horizontal communication the input BOUND on the event
function block (MTxx) must be set to 1. There are 10 MT and 60 CM function blocks available.
The MT and CM function blocks are connected using Lon Network Tool (LNT 505). This tool
also defines the service and addressing on LON.
This is an overview description how to configure the network variables for 670IEDs.
LON
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Figure 280: Examples connections between MT and CM function blocks in three terminals.
The network variable connections are done from the NV Connection window. From LNT win-
dow select Connections -> NVConnections -> New
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There are two ways of downloading NV connections. Either you use the drag-and-drop method
where you select all nodes in the device window, drag them to the Download area in the bottom
of the program window and drop them there. Or the traditional menu selection, Configuration
-> Download...
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Communication ports
The serial communication module (SLM) is used for SPA or IEC 60870-5-103 and LON com-
munication. This module is a mezzanine module, and can be placed on the Main Processing
Module (NUM). The serial communication module can have connectors for two plastic fiber ca-
bles (snap-in) or two glass fiber cables (ST, bayonet) or a combination of plastic and glass fiber.
Three different types are available depending on type of fiber. The incoming optical fiber is con-
nected to the RX receiver input, and the outgoing optical fiber to the TX transmitter output.
When the fiber optic cables are laid out, pay special attention to the instructions concerning the
handling, connection, etc. of the optical fibers. The module is identified with a number on the
label on the module.
Table 322: SPA addresses for commands from the operator workplace to the IED for ap-
paratus control
Name Function SPA Description
block address
BL_CMD SCSWI01 1 I 5115 SPA parameters for block command
BL_CMD SCSWI02 1 I 5139 SPA parameters for block command
BL_CMD SCSWI02 1 I 5161 SPA parameters for block command
BL_CMD SCSWI04 1 I 5186 SPA parameters for block command
BL_CMD SCSWI05 1 I 5210 SPA parameters for block command
BL_CMD SCSWI06 1 I 5234 SPA parameters for block command
BL_CMD SCSWI07 1 I 5258 SPA parameters for block command
BL_CMD SCSWI08 1 I 5283 SPA parameters for block command
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LON communication protocol Chapter 16
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615
LON communication protocol Chapter 16
Station communication
616
LON communication protocol Chapter 16
Station communication
617
LON communication protocol Chapter 16
Station communication
618
LON communication protocol Chapter 16
Station communication
619
LON communication protocol Chapter 16
Station communication
620
LON communication protocol Chapter 16
Station communication
621
LON communication protocol Chapter 16
Station communication
622
LON communication protocol Chapter 16
Station communication
623
SPA communication protocol Chapter 16
Station communication
4.1 Introduction
In this section the most common addresses for commands and events are available. Other ad-
dresses can be found in a separate document, refer to section 1.5 "Related documents".
It is assumed that the reader is familiar with the SPA communication protocol in general.
The master requests slave information using request messages and sends information to the slave
in write messages. Furthermore, the master can send all slaves in common a broadcast message
containing time or other data. The inactive state of bus transmit and receive lines is a logical "1".
SPA protocol
The tables below specify the SPA addresses for reading data from and writing data to an
IED 670 with the SPA communication protocol implemented.
The SPA addresses for the mA input service values (MI03-MI16) are found in table326
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The SPA addresses for the pulse counter values PC01 – PC16 are found in table 327
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I/O modules
To read binary inputs, the SPA-addresses for the outputs of the I/O-module function block are
used, i.e. the addresses for BI1 – BI16. The SPA addresses are found in a separate document,
refer to section 1.5 "Related documents".
One example is for the limits of the mA-input modules (MIxx), where 0 value must be written
to the 10V43 address. Addresses for other settings that must be stored on command, can be
found in a separate document, refer to section 1.5 "Related documents".
The single command function consists of three function blocks; CD01 – CD03 for 16 binary out-
put signals each.
The signals can be individually controlled from the operator station, remote-control gateway, or
from the local HMI on the IED. The SPA addresses for the single command function (CD) are
shown in Table 3. For the single command function block, CD01 to CD03, the address is for the
first output. The other outputs follow consecutively after the first one. For example, output 7 on
the CD02 function block has the 70O718 address.
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SPA communication protocol Chapter 16
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The SPA addresses for the single command functions CD01 – CD03 are found in table 328
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SPA communication protocol Chapter 16
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Table 328 SPA addresses for the controllable signals on the single command functions
Figure 283 shows an application example of how the user can, in a simplified way, connect the
command function via the configuration logic circuit in a protection terminal for control of a cir-
cuit breaker.
A pulse via the binary outputs of the terminal normally performs this type of command control.
The SPA addresses to control the outputs OUT1 – OUT16 in CD01 are shown in table 328
Figure 283: Application example showing a simplified logic diagram for control of a circuit
breaker.
The MODE input defines if the output signals from CD01 shall be steady or pulsed signals (1 =
steady, 2 = pulsed).
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Event function
This event function is intended to send time-tagged events to the station level (e.g. operator
workplace) over the station bus. The events are there presented in an event list. The events can
be created from both internal logical signals and binary input channels, and all of them must be
tied to the 6 DR function blocks. All must The internal signals are time tagged in the main pro-
cessing module, while the binary input channels are time tagged directly on each I/O module.
The events are produced according to the set event masks. The event masks are treated common-
ly for both the LON and SPA channels. All events according to the event mask are stored in a
buffer, which contains up to 1000 events. If new events appear before the oldest event in the
buffer is read, the oldest event is overwritten and an overflow alarm appears.
Two special signals for event registration purposes are available in the terminal, Terminal Re-
started (0E50) and Event buffer overflow (0E51).
The input parameters can be set individually from the Parameter Setting Tool (PST) under
EVENT MASKS/Binary Events as:
Double indications are used to handle a combination of two inputs at a time, for example, one
input for the open and one for the close position of a circuit breaker or disconnector. The double
indication consists of an odd and an even input number. When the odd input is defined as a dou-
ble indication, the next even input is considered to be the other input. The odd inputs has a sup-
pression timer to suppress events at 00 states. To be used as double indications the odd inputs
are individually set from the PST under EVENT MASKS/Binary Events as:
Here, the settings of the corresponding even inputs have no meaning. These states of the inputs
generate events.
The status is read by the station HMI on the status indication for the odd input:
The Status and event codes for the Event functions are found in table 329
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3) This status value contains a value with all the 16 inputs combined to a hex-value (0-FFF).
Example
The master requests the slave (no. 2) for latest events by addressing data category L:>2RL:CCcr
The slave sends the recent events from the buffer starting from the oldest event. If all recent
events do not fit into one message, rest of recent events will not be sent until during the next
request.
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When events are requested from the slave and the buffer of the slave is empty, the slave responds
with an empty data message: If<2D::CCcrlf.
Note that corresponding Event mask must be set to an applicable value via the Parameter Setting
Tool (PST).
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The incoming optical fiber is connected to the RX receiver input, and the outgoing optical fiber
to the TX transmitter output. When the fiber optic cables are laid out, pay special attention to the
instructions concerning the handling, connection, etc. of the optical fibers. The module is iden-
tified with a number on the label on the module.
The procedure to set the transfer rate and slave number can be found in the Installation and com-
missioning manual for respective IED.
4.3 Design
When communicating locally with a Personal Computer (PC) in the station, using the rear SPA
port, the only hardware needed for a station monitoring system is:
• Optical fibres
• Opto/electrical converter for the PC
• PC
When communicating remotely with a PC using the rear SPA port, the same hardware is needed
plus telephone modems.
The software needed in the PC, either local or remote, is PCM 600.
When communicating between the LHMI and a PC, the only hardware required is a front-con-
nection cable.
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5.1 Introduction
The IEC 60870-5-103 communication protocol is mainly used when a protection terminal com-
municates with a third party control or monitoring system. This system must have software that
can interpret the IEC 60870-5-103 communication messages.
• Event handling
• Report of analog service values (measurements)
• Fault location
• Command handling
- Autorecloser ON/OFF
- Teleprotection ON/OFF
- Protection ON/OFF
- LED reset
- Characteristics 1 - 4 (Setting groups)
• File transfer (disturbance files)
• Time synchronization
For detailed information about IEC 60870-5-103, refer to the IEC60870 standard part 5: Trans-
mission protocols, and to the section 103: Companion standard for the informative interface of
protection equipment.
IEC 60870-5-103
The tables in the following sections specify the information types supported by the IED 670
products with the communication protocol IEC 60870-5-103 implemented.
To support the information, corresponding functions must be included in the protection and con-
trol IED.
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Number of instances: 1
Number of instances: 1
Number of instances: 4
FUNCTION TYPE parameter for each block in private range. Default values are defined in
private range 1 - 4. One for each instance.
INFORMATION NUMBER is required for each output signal. Default values are 1 - 8.
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Status
Number of instances: 1
Number of instances: 20
FUNCTION TYPE parameter for each block in private range. Default values are defined in pri-
vate range 5 - 24. One for each instance.
INFORMATION NUMBER is required for each input signal. Default values are defined in
range 1 - 8
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Number of instances: 1
Number of instances: 1
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IEC 60870-5-103 communication protocol Chapter 16
Station communication
Number of instances: 1
The instance type is suitable for linediff, transformerdiff, overcurrent and earthfault protection
functions.
Number of instances: 1
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Number of instances: 1
Measurands
Function blocks in monitor direction for input measurands. Typically connected to monitoring
function, for example to power measurement CVMMXU.
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The IED will report all valid measuring types depending on connected signals.
Upper limit for measured currents, active/reactive-power is 2.4 times rated value.
Upper limit for measured voltages and frequency is 1.2 times rated value.
FUNCTION TYPE parameter for each block in private range. Default values are defined in pri-
vate range 25 – 27. One for each instance.
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Disturbance recordings
The following elements are used in the ASDUs (Application Service Data Units) defined in the
standard.
Analog signals, 40-channels: the channel number for each channel has to be specified. Channels
used in the public range are 1 to 8 and with:
Channel number used for the remaining 32 analog signals are numbers in the private range
64 to 95.
Binary signals, 96-channels: for each channel the user can specify a FUNCTION TYPE and an
INFORMATION NUMBER.
Disturbance Upload
All analog and binary signals that are recorded with disturbance recorder will be reported to the
master. The last eight disturbances that are recorded are available for transfer to the master. A
successfully transferred disturbance (acknowledged by the master) will not be reported to the
master again.
When a new disturbance is recorded by the IED a list of available recorded disturbances will be
sent to the master, an updated list of available disturbances will be sent whenever something has
happened to disturbances in this list. I.e. when a disturbance is deleted (by other client e.g. SPA)
or when a new disturbance has been recorded or when the master has uploaded a disturbance.
Information sent in the disturbance upload is specified by the standard; however, some of the
information are adapted to information available in disturbance recorder in Rex67x.
This section describes all data that is not exactly as specified in the standard.
ASDU23
In ‘list of recorded disturbances’ (ASDU23) an information element named SOF (status of fault)
exists. This information element consists of 4 bits and indicates whether:
• Bit TP: the protection equipment has tripped during the fault
• Bit TM: the disturbance data are currently being transmitted
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• Bit TEST: the disturbance data have been recorded during normal operation or
test mode.
• Bit OTEV: the disturbance data recording has been initiated by another event
than start/pick-up
The only information that is easily available is test-mode status. The other information is always
set (hard coded) to:
Another information element in ASDU23 is the FAN (fault number). According to the standard
this is a number that is incremented when a protection function takes action. In Rex67x FAN is
equal to disturbance number, which is incremented for each disturbance.
ASDU26
When a disturbance has been selected by the master; (by sending ASDU24), the protection
equipment answers by sending ASDU26, which contains an information element named NOF
(number of grid faults). This number should indicate fault number in the power system, i.e. a
fault in the power system with several trip and auto-reclosing has the same NOF (while the FAN
should be incremented). NOF is in Rex67x, just as FAN, equal to disturbance number.
To get INF and FUN for the recorded binary signals there are parameters on the disturbance re-
corder for each input. The user must set these parameters to whatever he connects to the corre-
sponding input.
Supported
Electrical Interface
EIA RS-485 No
number of loads No
Optical interface
glass fibre Yes
plastic fibre Yes
Transmission speed
96000 bit/s Yes
19200 bit/s Yes
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Supported
Link Layer
DFC-bit used Yes
Connectors
connector F-SMA No
connector BFOC/2.5 Yes
Supported
Selection of standard ASDUs in monitoring direction
ASDU Yes
1 Time-tagged message Yes
2 Time-tagged message with rel. time Yes
3 Measurands I Yes
4 Time-tagged message with rel. time Yes
5 Identification Yes
6 Time synchronization Yes
8 End of general interrogation Yes
9 Measurands II Yes
10 Generic data No
11 Generic identification No
23 List of recorded disturbances Yes
26 Ready for transm. of disturbance data Yes
27 Ready for transm. of a channel Yes
28 Ready for transm of tags Yes
29 Transmission of tags Yes
30 Transmission fo disturbance data Yes
31 End of transmission Yes
Selection of standard ASDUs in control direction
ASDU Yes
6 Time synchronization Yes
7 General interrogation Yes
10 Generic data No
20 General command Yes
21 Generic command No
24 Order for disturbance data transmission Yes
25 Acknowledgement for distance data transmission Yes
Selection of basic application functions
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Supported
Test mode No
Blocking of monitoring direction Yes
Disturbance data Yes
Private data Yes
Generic services No
The incoming optical fiber is connected to the RX receiver input, and the outgoing optical fiber
to the TX transmitter output. When the fiber optic cables are laid out, pay special attention to the
instructions concerning the handling, connection, etc. of the optical fibers. The module is iden-
tified with a number on the label on the module.
ICMA-
I103IEDCMD
BLOCK 19-LEDRS
23-GRP1
24-GRP2
25-GRP3
26-GRP4
en05000689.vsd
ICMD-
I103CMD
BLOCK 16-AR
17-DIFF
18-PROT
en05000684.vsd
ICM1-
I103UserCMD
BLOCK OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
OUTPUT5
OUTPUT6
OUTPUT7
OUTPUT8
en05000693.vsd
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IEV1-
I103IED
BLOCK
19_LEDRS
23_GRP1
24_GRP2
25_GRP3
26_GRP4
21_TESTM
en05000688.vsd
IS01-
I103UsrDef
BLOCK
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
en05000694.vsd
ISU1-
I103Superv
BLOCK
32_MEASI
33_MEASU
37_IBKUP
38_VTFF
46_GRWA
47_GRAL
en05000692.vsd
ISEF-
I103EF
BLOCK
51_EFFW
52_EFREV
en05000685.vsd
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IZ01-
I103FltDis
BLOCK
64_STL1
65_STL2
66_STL3
67_STIN
84_STGEN
69_TRL1
70_TRL2
71_TRL3
68_TRGEN
74_FW
75_REV
78_ZONE1
79_ZONE2
80_ZONE3
81_ZONE4
82_ZONE5
76_TRANS
77_RECEV
73_SCL
FLTLOC
ARINPROG
en05000686.vsd
IFL1-
I103FltStd
BLOCK
64_STL1
65_STL2
66_STL3
67_STIN
84_STGEN
69_TRL1
70_TRL2
71_TRL3
68_TRGEN
74_FW
75_REV
85_BFP
86_MTRL1
87_MTRL2
88_MTRL3
89_MTRN
90_IOC
91_IOC
92_IEF
93_IEF
ARINPROG
en05000687.vsd
IAR1-
I103AR
BLOCK
16_ARACT
128_CBON
130_UNSU
en05000683.vsd
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IMM1-
I103Meas
BLOCK
IL1
IL2
IL3
IN
UL1
UL2
UL3
UL1L2
UN
P
Q
F
en05000690.vsd
IMU1-
I103MeasUsr
BLOCK
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
en05000691.vsd
Table 335: Input signals for the I103IEDCMD (ICMA-) function block
Signal Description
BLOCK Block of commands
Table 336: Input signals for the I103FuncCMD (ICMD-) function block
Signal Description
BLOCK Block of commands
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Table 337: Input signals for the I103IED (IEV1-) function block
Signal Description
BLOCK Block of status reporting
19_LEDRS Information number 19, reset LEDs
23_GRP1 Information number 23, setting group 1 is active
24_GRP2 Information number 24, setting group 2 is active
25_GRP3 Information number 25, setting group 3 is active
26_GRP4 Information number 26, setting group 4 is active
21_TESTM Information number 21, test mode is active
Table 338: Input signals for the I103FuncUserCM (ICM1-) function block
Signal Description
BLOCK Block of commands
Table 339: Input signals for the I103UsrDef (IS01-) function block
Signal Description
BLOCK Block of status reporting
INPUT1 Binary signal Input 1
INPUT2 Binary signal input 2
INPUT3 Binary signal input 3
INPUT4 Binary signal input 4
INPUT5 Binary signal input 5
INPUT6 Binary signal input 6
INPUT7 Binary signal input 7
INPUT8 Binary signal input 8
Table 340: Input signals for the I103Superv (ISU1-) function block
Signal Description
BLOCK Block of status reporting
32_MEASI Information number 32, measurand supervision of I
33_MEASU Information number 33, measurand supervision of U
37_IBKUP Information number 37, I high-high back-up protection
38_VTFF Information number 38, fuse failure VT
46_GRWA Information number 46, group warning
47_GRAL Information number 47, group alarm
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Table 341: Input signals for the I103StatEF (ISEF-) function block
Signal Description
BLOCK Block of status reporting
51_EFFW Information number 51, earth-fault forward
52_EFREV Information number 52, earth-fault reverse
Table 342: Input signals for the I103StatFltDis (IZ01-) function block
Signal Description
BLOCK Block of status reporting
64_STL1 Information number 64, start phase L1
65_STL2 Information number 65, start phase L2
66_STL3 Information number 66, start phase L3
67_STIN Information number 67, start residual current IN
84_STGEN Information number 84, start general
69_TRL1 Information number 69, trip phase L1
70_TRL2 Information number 70, trip phase L2
71_TRL3 Information number 71, trip phase L3
68_TRGEN Information number 68, trip general
74_FW Information number 74, forward/line
75_REV Information number 75, reverse/bus
78_ZONE1 Information number 78, zone 1
79_ZONE2 Information number 79, zone 2
80_ZONE3 Information number 79, zone 3
81_ZONE4 Information number 79, zone 4
82_ZONE5 Information number 79, zone 5
76_TRANS Information number 76, signal transmitted
77_RECEV Information number 77, signal recevied
73_SCL Information number 73, fault location in ohm
FLTLOC Faultlocator faultlocation valid (LMBRFLO-CALCMADE)
ARINPROG Autorecloser in progress (SMBRREC- INPROGR)
Table 343: Input signals for the I103StatFltStd (IFL1-) function block
Signal Description
BLOCK Block of status reporting
64_STL1 Information number 64, start phase L1
65_STL2 Information number 65, start phase L2
66_STL3 Information number 66, start phase L3
67_STIN Information number 67, start residual curent IN
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IEC 60870-5-103 communication protocol Chapter 16
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Signal Description
84_STGEN Information number 84, start general
69_TRL1 Information number 69, trip phase L1
70_TRL2 Information number 70, trip phase L2
71_TRL3 Information number 71, trip phase L3
68_TRGEN Information number 68, trip general
74_FW Information number 74, forward/line
75_REV Information number 75, reverse/bus
85_BFP Information number 85, breaker failure
86_MTRL1 Information number 86, trip measuring system phase L1
87_MTRL2 Information number 87, trip measuring system phase L2
88_MTRL3 Information number 88, trip measuring system phase L3
89_MTRN Information number 89, trip measuring system neutral N
90_IOC Information number 90, over current trip, stage low
91_IOC Information number 91, over current trip, stage high
92_IEF Information number 92, earth-fault trip, stage low
93_IEF Information number 93, earth-fault trip, stage high
ARINPROG Autorecloser in progress (SMBRREC- INPROGR)
Table 344: Input signals for the I103MeasUsr (IMU1-) function block
Signal Description
BLOCK Block of service value reporting
INPUT1 Service value for measurement on input 1
INPUT2 Service value for measurement on input 2
INPUT3 Service value for measurement on input 3
INPUT4 Service value for measurement on input 4
INPUT5 Service value for measurement on input 5
INPUT6 Service value for measurement on input 6
INPUT7 Service value for measurement on input 7
INPUT8 Service value for measurement on input 8
INPUT9 Service value for measurement on input 9
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IEC 60870-5-103 communication protocol Chapter 16
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Table 345: Input signals for the I103Meas (IMM1-) function block
Signal Description
BLOCK Block of service value reporting
IL1 Service value for current phase L1
IL2 Service value for current phase L2
IL3 Service value for current phase L3
IN Service value for residual current IN
UL1 Service value for voltage phase L1
UL2 Service value for voltage phase L2
UL3 Service value for voltage phase L3
UL1L2 Service value for voltage phase-phase L1-L2
UN Service value for residual voltage UN
P Service value for active power
Q Service value for reactive power
F Service value for system frequency
Table 346: Output signals for the I103FuncCMD (ICMD-) function block
Signal Description
16-AR Information number 16, block of autorecloser
17-DIFF Information number 17, block of differential protection
18-PROT Information number 18, block of protection
Table 347: Output signals for the I103IEDCMD (ICMA-) function block
Signal Description
19-LEDRS Information number 19, reset LEDs
23-GRP1 Information number 23, activate setting group 1
24-GRP2 Information number 24, activate setting group 2
25-GRP3 Information number 25, activate setting group 3
26-GRP4 Information number 26, activate setting group 4
Table 348: Output signals for the I103FuncUserCM (ICM1-) function block
Signal Description
OUTPUT1 Command output 1
OUTPUT2 Command output 2
OUTPUT3 Command output 3
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Signal Description
OUTPUT4 Command output 4
OUTPUT5 Command output 5
OUTPUT6 Command output 6
OUTPUT7 Command output 7
OUTPUT8 Command output 8
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IEC 60870-5-103 communication protocol Chapter 16
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IEC 60870-5-103 communication protocol Chapter 16
Station communication
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Single command, 16 signals (CD) Chapter 16
Station communication
6.1 Introduction
The IEDs can receive commands either from a substation automation system or from the local
human-machine interface, LHMI. The command function block has outputs that can be used, for
example, to control high voltage apparatuses or for other user defined functionality.
The output signals can be of the types Off, Steady, or Pulse. This configuration setting is done
via the LHMI or PCM 600 and is common for the whole function block. The length of the output
pulses are 100 ms. In steady mode the function block has a memory to remember the output val-
ues at power interruption of the IED. Also a BLOCK input is available used to block the updat-
ing of the outputs.
The output signals, here OUT1 to OUT16, are then available for configuration to built-in func-
tions or via the configuration logic circuits to the binary outputs of the IED.
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Single command, 16 signals (CD) Chapter 16
Station communication
CD01-
SingleCmd
BLOCK OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
OUT16
NAME1
NAME2
NAME3
NAME4
NAME5
NAME6
NAME7
NAME8
NAME9
NAME10
NAME11
NAME12
NAME13
NAME14
NAME15
NAME16
en05000698.vsd
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Single command, 16 signals (CD) Chapter 16
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Signal Description
OUT14 Single command output 14
OUT15 Single command output 15
OUT16 Single command output 16
NAME1 User defined string for single command output 1
NAME2 User defined string for single command output 2
NAME3 User defined string for single command output 3
NAME4 User defined string for single command output 4
NAME5 User defined string for single command output 5
NAME6 User defined string for single command output 6
NAME7 User defined string for single command output 7
NAME8 User defined string for single command output 8
NAME9 User defined string for single command output 9
NAME10 User defined string for single command output 10
NAME11 User defined string for single command output 11
NAME12 User defined string for single command output 12
NAME13 User defined string for single command output 13
NAME14 User defined string for single command output 14
NAME15 User defined string for single command output 15
NAME16 User defined string for single command output 16
Table 363: Input signals for the SingleCmd (CD01-) function block
Signal Description
BLOCK Block single command function
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Multiple command (CM) and Multiple transmit Chapter 16
(MT) Station communication
7.1 Introduction
The IED may be provided with a function to send and receive signals to and from other IEDs via
the interbay bus. The send and receive function blocks has 16 outputs/inputs that can be used,
together with the configuration logic circuits, for control purposes within the IED or via binary
outputs. When it is used to communicate with other IEDs, these IEDs have a corresponding Mul-
tiple transmit function block with 16 outputs to send the information received by the command
block.
Sixteen signals can be connected and they will then be sent to the multiple command block in
the other IED. The connections are set with the LON Network Tool (LNT).
Twelve multiple command function block CM12 with fast execution time and 48 multiple com-
mand function blocks CM13-CM60 with slower execution time are available in the IED 670s.
The multiple command function block has 16 outputs combined in one block, which can be con-
trolled from other IEDs.
The output signals, here OUT1 to OUT16, are then available for configuration to built-in func-
tions or via the configuration logic circuits to the binary outputs of the terminal.
The command function also has a supervision function, which sets the output VALID to 0 if the
block did not receive data within set maximum time.
7.3 Design
7.3.1 General
The output signals can be of the types Off, Steady, or Pulse. The setting is done on the MODE
settings, common for the whole block, from the PCM 600 setting tool.
• 0 = Off sets all outputs to 0, independent of the values sent from the station level,
that is, the operator station or remote-control gateway.
• 1 = Steady sets the outputs to a steady signal 0 or 1, depending on the values sent
from the station level.
• 2 = Pulse gives a pulse with one execution cycle duration, if a value sent from the
station level is changed from 0 to 1. That means that the configured logic con-
nected to the command function blocks may not have a cycle time longer than the
execution cycle time for the command function block.
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Multiple command (CM) and Multiple transmit Chapter 16
(MT) Station communication
CM01-
MultiCmd
BLOCK ERROR
NEWDATA
OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
OUTPUT5
OUTPUT6
OUTPUT7
OUTPUT8
OUTPUT9
OUTPUT10
OUTPUT11
OUTPUT12
OUTPUT13
OUTPUT14
OUTPUT15
OUTPUT16
VALID
en06000007.vsd
MT01-
MultiTransm
BLOCK ERROR
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
en06000008.vsd
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Table 366: Input signals for the MultiTransm (MT01-) function block
Signal Description
BLOCK Block of function
INPUT1 Input 1
INPUT2 Input 2
INPUT3 Input 3
INPUT4 Input 4
INPUT5 Input 5
INPUT6 Input 6
INPUT7 Input 7
INPUT8 Input 8
INPUT9 Input 9
INPUT10 Input 10
INPUT11 Input 11
INPUT12 Input 12
INPUT13 Input 13
INPUT14 Input 14
INPUT15 Input 15
INPUT16 Input 16
Table 367: Output signals for the MultiCmd (CM01-) function block
Signal Description
ERROR MultiReceive error
NEWDATA New data is received
OUTPUT1 Output 1
OUTPUT2 Output 2
OUTPUT3 Output 3
OUTPUT4 Output 4
OUTPUT5 Output 5
OUTPUT6 Output 6
OUTPUT7 Output 7
OUTPUT8 Output 8
OUTPUT9 Output 9
OUTPUT10 Output 10
OUTPUT11 Output 11
OUTPUT12 Output 12
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Signal Description
OUTPUT13 Output 13
OUTPUT14 Output 14
OUTPUT15 Output 15
OUTPUT16 Output 16
VALID Output data is valid
Table 368: Output signals for the MultiTransm (MT01-) function block
Signal Description
ERROR MultiSend error
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About this chapter Chapter 17
Remote communication
Chapter 17 Remote
communication
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Binary signal transfer to remote end Chapter 17
Remote communication
1.1 Introduction
The remote end data communication is used either for the transmission of current values togeth-
er with maximum 8 binary signals in the line differential protection in RED670, or for transmis-
sion of only binary signals, up to 192 signals, in the other 600 series IEDs. The binary signals
are freely configurable and can thus be used for any purpose e.g. communication scheme related
signals, transfer trip and/or other binary signals between IEDs.
Communication between two IEDs requires that each IED is equipped with an LDCMs (Line
Data Communication Module). The LDCMs are then interfaces to a 64 kbit/s communication
channel for duplex communication between the IEDs.
Each IED can be equipped with up to four LDCMs, thus enabling communication with four re-
mote IEDs.
Start Stop
Information CRC
flag flag
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Binary signal transfer to remote end Chapter 17
Remote communication
The start and stop flags are the 0111 1110 sequence (7E hexadecimal), defined in the HDLC
standard. The CRC is designed according to the standard CRC16 definition. The optional ad-
dress field in the HDLC frame is not used instead a separate addressing is included in the data
field.
The address field is used for checking that the received message originates from the correct
equipment. There is always a risk that multiplexers occasionally mixe the messages up. Each ter-
minal in the system is given a number. The terminal is then programmed to accept messages
from a specific terminal number. If the CRC function detects a faulty message, the message is
thrown away and not used in the evaluation.
When the communication is used for line differential purpose, the transmitted data consists of
three currents, clock information, trip-, block- and alarm-signals and eight binary signals which
can be used for any purpose. The three currents are represented as sampled values.
When the communication is used exclusively for binary signals, the full data capacity of the
communication channel is used for the binary signal purpose which gives the capacity of
192 signals.
Note!
The function blocks are not represented in CAP 531 configuration tool. The signals appear only
in the SMT tool when a LDCM is included in the configuration with the function selector tool.
In the SMT tool they can be mapped to the desired virtual input (SMBI) of the IED670 and used
internally in the configuration.
667
Binary signal transfer to remote end Chapter 17
Remote communication
CRM1-
LDCMRecBinStat
COMFAIL
YBIT
NOCARR
NOMESS
ADDRERR
LNGTHERR
CRCERROR
TRDELERR
SYNCERR
REMCOMF
REMGPSER
SUBSTITU
LOWLEVEL
en07000043.vsd
CRM2-
LDCMRecBinStat
COMFAIL
YBIT
NOCARR
NOMESS
ADDRERR
LNGTHERR
CRCERROR
TRDELERR
SYNCERR
REMCOMF
REMGPSER
SUBSTITU
LOWLEVEL
en07000044.vsd
CRB1-
LDCMRecBinStat
COMFAIL
YBIT
NOCARR
NOMESS
ADDRERR
LNGT HERR
CRCERROR
REMCOMF
LOWLEVEL
en05000451.vsd
668
Binary signal transfer to remote end Chapter 17
Remote communication
Table 372: Output signals for the LDCMRecBinStat (CRM2-) function block
Signal Description
COMFAIL Detected error in the differential communication
YBIT Detected error in remote end with incoming message
NOCARR No carrier is detected in the incoming message
NOMESS No start and stop flags identified for the incoming message
ADDRERR Incoming message from a wrong terminal
LNGTHERR Wrong length of the incoming message
CRCERROR Identified error by CRC check in incoming message
TRDELERR Transmission time is longer than permitted
SYNCERR Indicates when echo synchronication is used
REMCOMF Remote terminal indicates problem with received message
REMGPSER Remote terminal indicates problem with GPS synchronization
SUBSTITU Link error, values are substituted
LOWLEVEL Low signal level on the receive link
669
Binary signal transfer to remote end Chapter 17
Remote communication
Table 373: Output signals for the LDCMRecBinStat (CRB1-) function block
Signal Description
COMFAIL Detected error in the differential communication
YBIT Detected error in remote end with incoming message
NOCARR No carrier is detected in the incoming message
NOMESS No start and stop flags identified for the incoming message
ADDRERR Incoming message from a wrong terminal
LNGTHERR Wrong length of the incoming message
CRCERROR Identified error by CRC check in incoming message
REMCOMF Remote terminal indicates problem with received message
LOWLEVEL Low signal level on the receive link
670
Binary signal transfer to remote end Chapter 17
Remote communication
Table 375: Basic general settings for the LDCMRecBinStat (CRM2-) function
Parameter Range Step Default Unit Description
ChannelMode Off - ON - Channel mode of LDCM,
ON 0=OFF, 1=ON, 2=OutOf-
OutOfService Service
671
Binary signal transfer to remote end Chapter 17
Remote communication
672
Binary signal transfer to remote end Chapter 17
Remote communication
Table 376: Basic general settings for the LDCMRecBinStat (CRB1-) function
Parameter Range Step Default Unit Description
ChannelMode Off - On - Channel mode of LDCM,
On 0=OFF, 1=ON, 2=OutOf-
OutOfService Service
673
Binary signal transfer to remote end Chapter 17
Remote communication
674
About this chapter Chapter 18
Hardware
Chapter 18 Hardware
675
Overview Chapter 18
Hardware
1 Overview
xx04000458.eps
xx04000459.eps
676
Overview Chapter 18
Hardware
xx05000763.eps
677
Overview Chapter 18
Hardware
xx04000460.eps
xx04000461.eps
678
Overview Chapter 18
Hardware
Table 378: Designations for 3/4 x 19” casing with 1 TRM slot
679
Overview Chapter 18
Hardware
Table 379: Designations for 3/4 x 19” casing with 2TRM slot
Table 380: Designations for 1/1 x 19” casing with 1 TRM slot
Table 381: Designations for 1/1 x 19” casing with 2 TRM slots
680
Overview Chapter 18
Hardware
681
Hardware modules Chapter 18
Hardware
2 Hardware modules
2.1 Overview
Table 382: Basic modules, always included
Module Description
Combined backplane module (CBM) A backplane PCB that carries all internal signals
between modules in an IED. Only the TRM is not con-
nected directly to this board.
Universal backplane module (UBM) A backplane PCB that forms part of the IED backplane
with connectors for TRM, ADM etc.
Power supply module (PSM) Including a regulated DC/DC converter that supplies
auxiliary voltage to all static circuits.
• An internal fail alarm output is available.
Numerical module (NUM) Module for overall application control. All information is
processed or passed through this module, such as
configuration, settings and communication.
Local Human machine interface (LHMI) The module consists of LED:s, an LCD, a push button
keyboard and an ethernet connector used to connect a
PC to the IED.
Transformer input module (TRM) Transformer module that galvanically separates the
internal circuits from the VT and CT circuits. It has 12
analog inputs.
Analog digital conversion module (ADM) Slot mounted PCB with A/D conversion.
682
Hardware modules Chapter 18
Hardware
2.2.2 Functionality
The Compact PCI makes 3.3V or 5V signaling in the backplane possible. The CBM backplane
and connected modules are 5V PCI-compatible.
Some pins on the Compact PCI connector are connected to the CAN bus, to be able to commu-
nicate with CAN based modules.
If a modules self test discovers an error it informs other modules using the Internal Fail signal
IRF.
2.2.3 Design
There are two basic versions of the CBM:
Each PCI connector consists of 2 compact PCI receptacles. The euro connectors are connected
to the CAN bus and used for I/O modules and power supply.
683
Hardware modules Chapter 18
Hardware
1 2
en05000516.vsd
Pos Description
1 CAN slots
2 CPCI slots
1 2
en05000755.vsd
Pos Description
1 CAN slots
2 CPCI slots
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Hardware modules Chapter 18
Hardware
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Pos Description
1 CBM
2.3.2 Functionality
The Universal Backplane Module connects the CT and VT analogue signals from the transform-
er input module to the analogue digital converter module. The Numerical processing module
(NUM) is also connected to the UBM. The ethernet contact on the front panel as well as the in-
ternal ethernet and D-sub contacts are connected to the UBM which provides the signal path to
the NUM board.
2.3.3 Design
It connects the Transformer input module (TRM) to the Analog digital conversion module
(ADM) and the Numerical module (NUM).
• for IEDs with two TRM and two ADM. It has four 48 pin euro connectors and
one 96 pin euro connector, see figure 300
• for IEDs with one TRM and one ADM. It has two 48 pin euro connectors and one
96 pin euro connector, see figure 301.
685
Hardware modules Chapter 18
Hardware
The 96 pin euro connector is used to connect the NUM board to the backplane. The 48 pin con-
nectors are used to connect the TRM and ADM.
TRM AD
M
NUM
AD Data
X
X2
1 X3 X4
RS485
X10 X10
Front Ethernet
LHMI connecti
on port
Ethernet X5
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Hardware modules Chapter 18
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Pos Description
1 UBM
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Hardware modules Chapter 18
Hardware
2.4.2 Design
There are two types of the power supply module. They are designed for different DC input volt-
age ranges see table 384. The power supply module contains a built-in, self-regulated DC/DC
converter that provides full isolation between the terminal and the external battery system.
Block diagram
Input connector
Power
Filter supply
Backplane connector
Supervision
99000516.vsd
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Hardware
For communication with high speed modules, e.g. analog input modules and high speed serial
interfaces, the NUM is equipped with a Compact PCI bus. The NUM is the compact PCI system
card i.e. it controls bus mastering, clock distribution and receives interrupts.
2.5.2 Functionality
The NUM, Numeric processing module is a high performance, standard off-the-shelf com-
pact-PCI CPU module. It is 6U high and occupies one slot. Contact with the backplane is via
two compact PCI connectors and an euro connector.
The NUM has one PMC slot (32-bit IEEE P1386.1 compliant) and two PCMIP slots onto which
mezzanine cards such as OEM or LDCM can be mounted.
To reduce bus loading of the compact PCI bus in the backplane the NUM has one internal PCI
bus for internal resources and the PMC slot and external PCI accesses through the backplane are
buffered in a PCI/PCI bridge.
The application code and configuration data are stored in flash memory using a flash file system.
During power up the application code is moved to and then executed from the DRAM. The code
is stored in the flash memory because it is nonvolatile and executed in DRAM because of the
higher performance of DRAM.
The NUM is equipped with a real time clock. It uses a capacitor for power backup of the real
time clock.
No forced cooling is used on this standard module because of the low power dissipation.
689
Hardware modules Chapter 18
Hardware
Compact
Flash Logic
PMC
connector
PC-Mip
connector
UBM
Memory Ethernet
North
bridge
Backplane
connector
PCI-PCI-
bridge
CPU
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Hardware modules Chapter 18
Hardware
2.7.2 Design
The transformer module has 12 input transformers. There are several versions of the module,
each with a different combination of voltage and current input transformers.
Basic versions:
The TRM is connected to the ADM and NUM via the UBM.
Configuration of the input and output signals, please refer to section 10.
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Hardware modules Chapter 18
Hardware
2.8.2 Design
The Analog digital conversion module input signals are voltage and current from the transformer
module. Shunts are used to adapt the current signals to the electronic voltage level. To gain dy-
namic range for the current inputs, two shunts with separate A\D channels are used for each in-
put current. In this way a 20 bit dynamic range is obtained with a 16 bit A\D converter.
Input signals are sampled with a sampling freqency of 5 kHz at 50 Hz system frequency and 6
kHz at 60 Hz system frequency.
The A\D converted signals go through a filter with a cut off frequency of 500 Hz and are reported
to the numerical module (NUM) with 1 kHz at 50 Hz system frequency and 1,2 kHz at 60 Hz
system frequency.
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Hardware modules Chapter 18
Hardware
Channel 1
AD1 Channel 2
Channel 3
Channel 4
AD2
Channel 5
1.2v Channel 6
AD3 Channel 7
Channel 8
Channel 9
AD4 Channel 10
Channel 11
Channel 12
PMC
level shift
PCMIP
2.5v
PCI to PCI
PCMIP
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Hardware modules Chapter 18
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2.9.2 Design
The Binary input module contains 16 optical isolated binary inputs. The voltage level of the bi-
nary input is selected at order.
A signal discriminator detects and blocks oscillating signals. When blocked, a hysteresis func-
tion may be set to release the input at a chosen frequency, making it possible to use the input for
pulse counting. The blocking frequency may also be set.
Figure 306 shows the operating characteristics of the binary inputs of the four voltage levels.
The standard version of binary inputs gives an improved capability to withstand disturbances
and should generally be used when pulse counting is not required.
694
Hardware modules Chapter 18
Hardware
[V]
300
176
144
88
72
38
32
19
18
Guaranteed operation
Operation uncertain
No operation
This binary input module communicates with the Numerical module (NUM) via the CAN-bus
on the backplane.
The design of all binary inputs enables the burn off of the oxide of the relay contact connected
to the input, despite the low, steady-state power consumption, which is shown in figure 307 and
308.
695
Hardware modules Chapter 18
Hardware
[mA]
30
1
35 70 [ms]
en03000108.vsd
Figure 307: Approximate binary input inrush current for the standard version of BIM.
[mA]
30
1
3.5 7.0 [ms]
en05000455.vsd
Figure 308: Approximate binary input inrush current for the BIM version with enhanced pulse
counting capabilities.
696
Hardware modules Chapter 18
Hardware
Process connector
Opto isolated input
Backplane connector
Opto isolated input
Process connector
99000503.vsd
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Hardware modules Chapter 18
Hardware
Table 387: BIM - Binary input module with enhanced pulse counting capabilities
Quantity Rated value Nominal range
Binary inputs 16 -
DC voltage, RL RL24 (24/40) V RL ± 20%
RL48 (48/60) V RL ± 20%
RL110 (110/125) V RL ± 20%
RL220 (220/250) V RL ± 20%
Power consumption
RL24 = (24/40) V max. 0.05 W/input -
RL48 = (48/60) V max. 0.1 W/input
RL110 = (110/125) V max. 0.2 W/input
RL220 = (220/250) V max. 0.4 W/input
Counter input frequency 10 pulses/s max -
Balanced counter input frequency 40 pulses/s max -
Oscillating signal discriminator Blocking settable 1–40 Hz
Release settable 1–30 Hz
698
Hardware modules Chapter 18
Hardware
2.10.2 Design
The binary output module (BOM) has 24 software supervised output relays. Each pair of relays
have a common power source input to the contacts, see figure 310. This should be considered
when connecting the wiring to the connection terminal on the back of the IED.
The high closing and carrying current capability allows connection directly to breaker trip and
closing coils. If breaking capability is required to manage fail of the breaker auxiliary contacts
normally breaking the trip coil current, a parallel reinforcement is required.
Output module
xx00000299.vsd
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Hardware modules Chapter 18
Hardware
Relay
Relay
Relay
Relay
Relay
Process connector Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Backplane connector
Process connector
Relay Micro-
controller
Relay
Relay
CAN
Relay
Relay Memory
Relay
Relay
99000505.vsd
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Hardware modules Chapter 18
Hardware
2.11.2 Design
Inputs are designed to allow oxide burn-off from connected contacts, and increase the distur-
bance immunity during normal protection operate times. This is achieved with a high peak in-
rush current while having a low steady-state current, see figure 307. Inputs are debounced by
software.
Well defined input high and input low voltages ensures normal operation at battery supply earth
faults, see figure 306.
I/O events are time stamped locally on each module for minimum time deviance and stored by
the event recorder if present.
The binary I/O module, IOM, has eight optically isolated inputs and ten output relays. One of
the outputs has a change-over contact. The nine remaining output contacts are connected in two
groups. One group has five contacts with a common and the other group has four contacts with
a common, to be used as single-output channels, see figure 312.
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Hardware modules Chapter 18
Hardware
The binary I/O module also has two high speed output channels where a reed relay is connected
in parallel to the standard output relay.
For configuration of the input and output signals, please refer to sections 7 and 8.
Note!
The making capacity of the reed relays are limited.
Figure 312: Binary in/out module (IOM), input contacts named XA corresponds to rear posi-
tion X31, X41, etc. and output contacts named XB to rear position X32, X42, etc.
702
Hardware modules Chapter 18
Hardware
703
Hardware modules Chapter 18
Hardware
The line data communication module is used for binary signal transfer. Each module has one
optical port, one for each remote end to which the IED communicates.
Alternative cards for Medium range (1310 nm single mode) and Short range (900 nm multi
mode) are available.
Note!
Class 1 laser product. Take adequate measures to protect the eyes. Never look into the laser
beam.
2.12.2 Design
The LDCM is a PCMIP type II single width format module. The LDCM can be mounted on:
• the ADM
• the NUM
ID
ST
16.000
IO-connector
MHz
32,768
MHz
ST
en05000473.vsd
Figure 313: The SR-LDCM layout. PCMIP type II single width format with two PCI connectors
and one I/O ST type connector
704
Hardware modules Chapter 18
Hardware
X1
C
ADN 2.5V
ID
2841
PCI9054
FPGA TQ176
DS DS
256 FBGA
3904 3904
MAX
3645
3
2
en06000393.vsd
Figure 314: The MR-LDCM and LR-LDCM layout. PCMIP type II single width format with
two PCI connectors and one I/O FC type connector
705
Hardware modules Chapter 18
Hardware
2.13.2 Design
The SLM is a PMC card and it is factory mounted as a mezzanine card on the NUM module.
Three variants of the SLM is available with different combinations of optical fibre connectors,
see figure 315. The plastic fibre connectors are of snap-in type and the glass fibre connectors are
of ST type.
706
Hardware modules Chapter 18
Hardware
707
Hardware modules Chapter 18
Hardware
1 Receiver, LON
2 Transmitter, LON
3 Receiver, SPA/IEC 60870-5-103
4 Transmitter, SPA/IEC 60870-5-103
708
Hardware modules Chapter 18
Hardware
2.14.2 Functionality
The Optical Ethernet module (OEM) is used when communication systems according to
IEC61850–8–1 have been implemented. Refer to section 2.12 "Line data communication
module (LDCM)" for further information.
2.14.3 Design
The Optical Ethernet module (OEM) is a PCM card and mounted as a mezzanine card on the
NUM. If a second OEM is needed it is mounted on the NUM. The OEM is a 100base Fx module
and available as a single channel or double channel unit.
100Base-FX
Transmitter
ID chip ST fiber optic
Ethernet Controller
connectors
100Base-FX
EEPROM
IO - bus Connector Receiver
en04000472.vsd
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Hardware modules Chapter 18
Hardware
ID chip
Receiver
IO bus
LED
Ethernet cont.
25MHz oscillator
Transmitter
Receiver
PCI bus
LED
Ethernet cont. PCI to PCI
bridge
25MHz oscillator
Transmitter
en05000472.vsd
2.15.2 Design
The Milliampere Input Module has six independent analog channels with separated protection,
filtering, reference, A/D-conversion and optical isolation for each input making them galvani-
cally isolated from each other and from the rest of the module.
710
Hardware modules Chapter 18
Hardware
The analog inputs measure DC and low frequency currents in the range of +/- 20mA. The A/D
converter has a digital filter with selectable filter frequency. All inputs are calibrated separately
The filter parameters and the calibration factors are stored in a non-volatile memory on the mod-
ule.
The calibration circuitry monitors the module temperature and starts an automatical calibration
procedure if the temperature drift is outside the allowed range. The module communicates, like
the other I/O-modules on the serial CAN-bus.
Memory Micro-
controller
99000504.vsd
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Hardware modules Chapter 18
Hardware
2.16.2 Design
The GPS time synchronization module is 6U high and occupies one slot. The slot closest to the
NUM shall always be used.
The CCM is a carrier board for the GCM mezzanine PCM card and GPS unit, see figure 321.
There is a cable between the external antenna input on the back of the GCM and the GPS-receiv-
er. This is a galvanic connection vulnerable to electro-magnetic interference. The connector is
shielded and directly attached to a grounded plate to reduce the risk. The second cable is a flat
cable that connects the GPS and the GCM. It is used for communication between the GCM and
the GPS-receiver. All communication between the GCM and the NUM is via the CAN-bus.
The CMPPS signal is sent from the GCM to the rest of the time system to provide 1μs accuracy
at sampling level.
712
Hardware modules Chapter 18
Hardware
PMC
GPS GPS clock
GPS antenna receiver module
CMPPS
Backplane CAN
CAN
connector
controller CAN
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Hardware modules Chapter 18
Hardware
xx05000471.vsd
1 GPS receiver
2 GPS Clock module (GCM)
3 CAN carrier module (CCM)
4 Antenna connector
Figure 321: A CCM with the GCM and GPS mounted with cables
714
Hardware modules Chapter 18
Hardware
2.17.2 Design
The antenna with a console for mounting on a horizontal or vertical flat surface or on an antenna
mast. See figure 322
1 6
4 7
xx04000155.vsd
where:
1 GPS antenna
2 TNC connector
3 Console, 78x150 mm
4 Mounting holes 5.5 mm
5 Tab for securing of antenna cable
6 Vertical mounting position
7 Horizontal mounting position
715
Hardware modules Chapter 18
Hardware
Always position the antenna and its console so that a continuous clear line-of-sight visibility to
all directions is obtained, preferably more than 75%. A minimum of 50% clear line-of-sight vis-
ibility is required for un-interrupted operation.
99001046.vsd
Antenna cable
Use a 50 ohm coaxial cable with a male TNC connector in the antenna end and a male SMA
connector in the receiver end to connect the antenna to GSM. Choose cable type and length so
that the total attenuation is max. 26 dB at 1.6 GHz.
Note!
Make sure that the antenna cable is not charged when connected to the antenna or to the receiver.
Short-circuit the end of the antenna cable with some metal device, when first connected to the
antenna. When the antenna is connected to the cable, connect the cable to the receiver. REx670
must be switched off when the antenna cable is connected.
716
Case dimensions Chapter 18
Hardware
3 Case dimensions
K
E
D F
A
C G J
B
H
xx04000448.vsd
xx04000464.vsd
Figure 324: Case without rear cover Figure 325: Case without rear cover with 19” rack
mounting kit
Case size A B C D E F G H J K
6U, 1/2 x 19” 265.9 223.7 201.1 252.9 205.7 190.5 203.7 - 187.6 -
6U, 3/4 x 19” 265.9 336.0 201.1 252.9 318.0 190.5 316.0 - 187.6 -
6U, 1/1 x 19” 265.9 448.3 201.1 252.9 430.3 190.5 428.3 465.1 187.6 482.6
(mm)
The H and K dimensions are defined by the 19” rack mounting kit
717
Case dimensions Chapter 18
Hardware
D F
J
G
B H xx05000502.vsd
C
xx05000501.vsd
xx05000503.vsd
Case size A B C D E F G H J K
6U, 1/2 x 19” 265.9 223.7 242.1 255.8 205.7 190.5 203.7 - 228.6 -
6U, 3/4 x 19” 265.9 336.0 242.1 255.8 318.0 190.5 316.0 - 228.6 -
6U, 1/1 x 19” 265.9 448.3 242.1 255.8 430.3 190.5 428.3 465.1 228.6 482.6
The H and K dimensions are defined by the 19” rack mounting kit. All dimensions are in millimeters.
718
Case dimensions Chapter 18
Hardware
A C
E
D
xx04000465.vsd
719
Case dimensions Chapter 18
Hardware
xx06000182.vsd
Figure 330: A 1/2 x 19” size IED 670 side-by-side with RHGS6.
720
Case dimensions Chapter 18
Hardware
D
B
E
F
C
xx05000505.vsd
721
Case dimensions Chapter 18
Hardware
B
E
C
D
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722
Case dimensions Chapter 18
Hardware
[1.48]
[6.97]
[4.02]
Dimension
mm [inches] xx06000232.eps
[7.50]
en06000234.eps
[inches]
Figure 334: Dimension drawing of a three phase high impedance resistor unit
723
Mounting alternatives Chapter 18
Hardware
4 Mounting alternatives
The flush mounting kit are utilized for IEDs of sizes: 1/2 x 19”, 3/4 x 19” and 1/1 x 19” and are
also suitable for mounting of RHGS6, 6U 1/4 x 19” cases.
Note!
Flush mounting cannot be used for side-by-side mounted IEDs when IP54 class must be ful-
filled. Only IP20 class can be obtained when mounting two cases side-by-side in one (1) cut-out.
Note!
To obtain IP54 class protection, an additional factory mounted sealing must be ordered when
ordering the IED.
724
Mounting alternatives Chapter 18
Hardware
1
7
2
6
5
3
xx06000246.vsd
725
Mounting alternatives Chapter 18
Hardware
Note!
Please note that the separately ordered rack mounting kit for side-by-side mounted IEDs, or
IEDs together with RHGS cases, is to be selected so that the total size equals 19”.
Note!
When mounting the mounting angles, be sure to use screws that follows the recommended di-
mensions. Using screws with other dimensions than the original may damage the PCBs inside
the IED.
726
Mounting alternatives Chapter 18
Hardware
1a
1b
xx04000452.vsd
Note!
When mounting the side plates, be sure to use screws that follows the recommended dimensions.
Using screws with other dimensions than the original may damage the PCBs inside the IED.
727
Mounting alternatives Chapter 18
Hardware
3
4
2
6
xx04000453.vsd
To reach the rear side of the IED, a free space of 80 mm is required on the unhinged side.
728
Mounting alternatives Chapter 18
Hardware
3
1
80 mm 2
en06000135.vsd
Figure 338: How to reach the connectors on the rear side of the IED.
Note!
When mounting the plates and the angles on the IED, be sure to use screws that follows the rec-
ommended dimensions. Using screws with other dimensions than the original may damage the
PCBs inside the IED.
729
Mounting alternatives Chapter 18
Hardware
2
1
xx04000456.vsd
730
Mounting alternatives Chapter 18
Hardware
1 2
1 2 1 2
1 1 1 1
2 2 2 2
3 3 3 3
4 4 4 4
5 5 5 5
6 6 6 6
7 7 7 7
8 8 8 8
xx06000180.vsd
Figure 340: IED 670 (1/2 x 19”) mounted with a RHGS6 case containing a test switch module
equipped with only a test switch and a RX2 terminal base.
Note!
With side-by-side flush mounting installation, only IP class 20 is obtained. To reach IP class 54,
it is recommended to mount the IEDs separately. For cut out dimensions of separately mounted
IEDs, see section 4.1 "Flush mounting" on page 724.
Note!
When mounting the plates and the angles on the IED, be sure to use screws that follows the rec-
ommended dimensions. Using screws with other dimensions than the original may damage the
PCBs inside the IED.
731
Mounting alternatives Chapter 18
Hardware
1 2
xx06000181.vsd
Figure 341: Side-by-side flush mounting details (RHGS6 side-by-side with 1/2 x 19” IED).
732
Technical data Chapter 18
Hardware
5 Technical data
5.1 Enclosure
Table 397: Case
Material Steel sheet
Front plate Steel sheet profile with cut-out for HMI
Surface treatment Aluzink preplated steel
Finish Light grey (RAL 7035)
Table 398: Water and dust protection level according to IEC 60529
Front IP40 (IP54 with sealing strip)
Rear, sides, top and bot- IP20
tom
733
Technical data Chapter 18
Hardware
734
Technical data Chapter 18
Hardware
735
Technical data Chapter 18
Hardware
736
About this chapter Chapter 19
Labels
Chapter 19 Labels
737
Different labels Chapter 19
Labels
1 Different labels
2
3
6
6 5
7
xx06000574.eps
738
Different labels Chapter 19
Labels
739
Different labels Chapter 19
Labels
4
en06000573.eps
1 Warning label
2 Caution label
3 Class 1 laser product label
4 Warning label
740
Chapter 20
Connection diagrams
Chapter 20 Connection
diagrams
This chapter includes diagrams of the IED with all slot, terminal block and optical connector
designations. It is a necessary guide when making electrical and optical connections to the IED.
741
Chapter 20
Connection diagrams
742
Chapter 20
Connection diagrams
743
Chapter 20
Connection diagrams
744
Chapter 20
Connection diagrams
745
Chapter 20
Connection diagrams
746
Chapter 20
Connection diagrams
747
Chapter 20
Connection diagrams
748
Chapter 20
Connection diagrams
749
Chapter 20
Connection diagrams
750
Chapter 20
Connection diagrams
751
Chapter 20
Connection diagrams
752
Chapter 20
Connection diagrams
753
Chapter 20
Connection diagrams
754
Chapter 20
Connection diagrams
755
Chapter 20
Connection diagrams
756
About this chapter Chapter 21
Time inverse characteristics
757
Application Chapter 21
Time inverse characteristics
1 Application
In order to assure time selectivity between different overcurrent protections in different points
in the network different time delays for the different relays are normally used. The simplest way
to do this is to use definite time delay. In more sophisticated applications current dependent time
characteristics are used. Both alternatives are shown in a simple application with three overcur-
rent protections connected in series.
Stage 3
Time
Stage 2 Stage 2
Fault point
position
en05000130.vsd
758
Application Chapter 21
Time inverse characteristics
Time
Fault point
position
en05000131.vsd
The inverse time characteristic makes it possible to minimize the fault clearance time and still
assure the selectivity between protections.
To assure selectivity between protections there must be a time margin between the operation
time of the protections. This required time margin is dependent of following factors, in a simple
case with two protections in series:
759
Application Chapter 21
Time inverse characteristics
A1 B1
Feeder
I> I>
Time axis
en05000132.vsd
where:
t=0 is The fault occurs
t=t1 is Protection B1 trips
t=t2 is Breaker at B1 opens
t=t3 is Protection A1 resets
In the case protection B1 shall operate without any intentional delay (instantaneous). When the
fault occurs the protections start to detect the fault current. After the time t1 the protection B1
send a trip signal to the circuit breaker. The protection A1 starts its delay timer at the same time,
with some deviation in time due to differences between the two protections. There is a possibility
that A1 will start before the trip is sent to the B1 circuit breaker.
At the time t2 the circuit breaker B1 has opened its primary contacts and thus the fault current is
interrupted. The breaker time (t2 - t1) can differ between different faults. The maximum opening
time can be given from manuals and test protocols. Still at t2 the timer of protection A1 is active.
In most applications it is required that the delay times shall reset as fast as possible when the
current fed to the protection drops below the set current level, the reset time shall be minimized.
In some applications it is however beneficial to have some type of delayed reset time of the over-
current function. This can be the case in the following applications:
• If there is a risk of intermittent faults. If the current relay, close to the faults, starts
and resets there is a risk of unselective trip from other protections in the system.
• Delayed resetting could give accelerated fault clearance in case of automatic re-
closing to a permanent fault.
760
Application Chapter 21
Time inverse characteristics
• Overcurrent protection functions are sometimes used as release criterion for other
protection functions. It can often be valuable to have a reset delay to assure the
release function.
761
Principle of operation Chapter 21
Time inverse characteristics
2 Principle of operation
If current in any phase exceeds the set start current value (here internal signal startValue), a tim-
er, according to the selected operate mode, is started. The component always uses the maximum
of the three phase current values as the current level used in timing calculations.
In case of definite time the timer will run constantly until the trip time is reached or until the
current drops below the reset value (start value minus the hysteresis) and the reset time has
elapsed.
For definite time delay curve index no 5 (ANSI/IEEE Definite time) or 15 (IEC Definite time)
are chosen.
The general expression for inverse time curves is according to equation 64.
⎛ ⎞
⎜ A
⎟
t[ s ] = ⎜ + B ⎟⋅k
⎜ ⎛ i ⎞p ⎟
⎜⎜ ⎟ −C ⎟
⎝ ⎝ in > ⎠ ⎠
(Equation 64)
where:
p, A, B, C are constants defined for each curve type,
in> is the set start current for step n,
k is set time multiplier for step n and
i is the measured current.
For inverse time characteristics a time will be initiated when the current reaches the set start lev-
el. From the general expression of the characteristic the following can be seen:
762
Principle of operation Chapter 21
Time inverse characteristics
⎛⎛ i ⎞p ⎞
(top − B ⋅ k ) ⋅ ⎜ ⎜ ⎟ − C ⎟ = A⋅k
⎝ ⎝ in > ⎠ ⎠
(Equation 65)
where:
top is the operation time of the protection
The time elapsed to the moment of trip is reached when the integral fulfils according to
equation 66, in addition to the constant time delay:
t
⎛⎛ i ⎞p ⎞
∫ ⎜ ⎜⎝ in > ⎟⎠ − C ⎟ ⋅ dt ≥ A ⋅ k
0 ⎝ ⎠
(Equation 66)
For the numerical protection the sum below must fulfil the equation for trip.
n ⎛ ⎛ i( j ) ⎞ p ⎞
Δt ⋅ ∑ ⎜ ⎜ ⎟ − C ⎟ ≥ A⋅ k
j =1 ⎝ ⎝ in > ⎠ ⎠
(Equation 67)
where:
j=1 is the first protection execution cycle when a fault has been detected, i.e. when
i
>1
in >
Δt is the time interval between two consecutive executions of the protection algorithm,
n is the number of the execution of the algorithm when the trip time equation is fulfilled, i.e.
when a trip is given and
i (j) is the fault current at time j
For inverse time operation, the inverse-time characteristic is selectable. Both the IEC and AN-
SI/IEEE standardized inverse-time characteristics are supported. The list of characteristics in
table 410 matches the list in the IEC 61850-7-4 spec.
763
Principle of operation Chapter 21
Time inverse characteristics
For the ANSI/IEEE characteristics the inverse time curves are defined according to table 411:
For the IEC characteristics the inverse time curves are defined according to table 412:
764
Principle of operation Chapter 21
Time inverse characteristics
For the IEC curves there is also a setting of the minimum time delay of operation, see figure 346.
Operate
time
tnMin
Current
en05000133.vsd
Figure 346: Minimum time delay operation for the IEC curves
In addition to the ANSI and IEC standardized characteristics, there are also two additional
curves available; the 18 = RI time inverse and the 19 = RD time inverse.
The 18 = RI time inverse curve emulates the characteristic of the electromechanical ASEA relay
RI. The curve is described by equation 68:
⎛ ⎞
⎜ k ⎟
t[ s ] = ⎜
in > ⎟
⎜ 0.339 − 0.235 ⋅ ⎟
⎝ i ⎠
(Equation 68)
where:
in> is the set start current for step n,
k is set time multiplier for step n and
i is the measured current.
765
Principle of operation Chapter 21
Time inverse characteristics
The 19 = RD time inverse curve gives a logarithmic delay, as used in the Combiflex protection
RXIDG. The curve enables a high degree of selectivity required for sensitive residual earth fault
current protection, with ability to detect high resistive earth faults. The curve is described by
equation 69:
⎛ i ⎞
t[ s ] = 5.8 − 1.35 ⋅ ln ⎜ ⎟
⎝ k ⋅ in > ⎠
(Equation 69)
where:
in> is the set start current for step n,
k is set time multiplier for step n and
i is the measured current
If the curve type is chosen as 17 the user can make a tailor made inverse time curve according
to the general equation 70.
⎛ ⎞
⎜ A
⎟
t[ s ] = ⎜ + B ⎟⋅k
⎜ ⎛ i ⎞p ⎟
⎜⎜ ⎟ −C ⎟
⎝ ⎝ in > ⎠ ⎠
(Equation 70)
Also the reset time of the delayed function can be controlled. We have the possibility to choose
between three different reset type delays. Available alternatives are listed in table 413.
If instantaneous reset is chosen the timer will be reset directly when the current drops below the
set start current level minus the hysteresis.
If IEC reset is chosen the timer is reset the timer will be reset after a set constant time when the
current drops below the set start current level minus the hysteresis.
If ANSI reset time is chosen the reset time will be dependent of the current after fault clearance
(when the current drops below the start current level minus the hysteresis). The timer will reset
according to equation 71.
766
Principle of operation Chapter 21
Time inverse characteristics
⎛ ⎞
⎜ tr
⎟
t[ s ] = ⎜ ⎟
⎜ ⎛ i ⎞2 ⎟
⎜⎜ ⎟ −1 ⎟
⎝ ⎝ in > ⎠ ⎠
(Equation 71)
where:
The set value tr is the reset time in case of zero current after fault clearance.
The possibility of choice of reset characteristics is to some extent dependent of the choice of time
delay characteristic.
For the independent time delay characteristics (type 5 and 15) the possible delay time settings
are instantaneous (1) and IEC (2 = set constant time reset).
For ANSI inverse time delay characteristics (type 1 - 4 and 6 - 8) all three types of reset time
characteristics are available; instantaneous (1), IEC (2 = set constant time reset) and ANSI (3 =
current dependent reset time).
For IEC inverse time delay characteristics (type 9 - 14) the possible delay time settings are in-
stantaneous (1) and IEC (2 = set constant time reset).
For the customer tailor made inverse time delay characteristics (type 17) all three types of reset
time characteristics are available; instantaneous (1), IEC (2 = set constant time reset) and ANSI
(3 = current dependent reset time). If the current dependent type is used settings pr, tr and cr must
be given, see equation 72:
⎛ ⎞
⎜ tr
⎟
t[ s ] = ⎜ ⎟
⎜ ⎛ i ⎞ pr ⎟
⎜⎜ ⎟ − cr ⎟
⎝ ⎝ in > ⎠ ⎠
(Equation 72)
For RI and RD inverse time delay characteristics (type 18 and 19) the possible delay time set-
tings are instantaneous (1) and IEC (2 = set constant time reset).
767
Inverse characteristics Chapter 21
Time inverse characteristics
3 Inverse characteristics
Table 414: Inverse time characteristics ANSI
Function Range or value Accuracy
Operate characteristic: k = 0.05-999 in steps of -
0.01 unless otherwise
stated
⎛ A ⎞
t = ⎜ P + B⎟ ⋅ k
⎜ ( I − 1) ⎟
⎝ ⎠
Reset characteristic:
tr
t = ⋅k
(I 2
)
−1
I = Imeasured/Iset
ANSI Extremely Inverse no 1 A=28.2, B=0.1217, P=2.0, ANSI/IEEE C37.112, class 5 +
tr=29.1 30 ms
ANSI Very inverse no 2 A=19.61, B=0.491, P=2.0,
tr=21.6
ANSI Normal Inverse no 3 A=0.0086, B=0.0185,
P=0.02, tr=0.46
ANSI Moderately Inverse no 4 A=0.0515, B=0.1140,
P=0.02, tr=4.85
ANSI Long Time Extremely Inverse no 6 A=64.07, B=0.250, P=2.0,
tr=30
ANSI Long Time Very Inverse no 7 A=28.55, B=0.712, P=2.0,
tr=13.46
ANSI Long Time Inverse no 8 k=(0.01-1.20) in steps of
0.01
A=0.086, B=0.185,
P=0.02, tr=4.6
768
Inverse characteristics Chapter 21
Time inverse characteristics
⎛ A ⎞
t = ⎜ P ⎟⋅k
⎜ ( I − 1) ⎟
⎝ ⎠
I = Imeasured/Iset
Time delay to reset, IEC inverse time (0.000-60.000) s ± 0.5% of set time ± 10 ms
IEC Normal Inverse no 9 A=0.14, P=0.02 IEC 60255-3, class 5 + 40 ms
IEC Very inverse no 10 A=13.5, P=1.0
IEC Inverse no 11 A=0.14, P=0.02
IEC Extremely inverse no 12 A=80.0, P=2.0
IEC Short-time inverse no 13 A=0.05, P=0.04
IEC Long-time inverse no 14 A=120, P=1.0
Customer defined characteristic no 17 k=0.5-999 in steps of 0.1 IEC 60255, class 5 + 40 ms
Operate characteristic: A=(0.005-200.000) in
steps of 0.001
B=(0.00-20.00) in steps of
⎛ A ⎞ 0.01
=⎜ + B⎟ ⋅ k
⎜ (I P − C )
t
⎟ C=(0.1-10.0) in steps of
⎝ ⎠
0.1
Reset characteristic:
P=(0.005-3.000) in steps of
0.001
TR TR=(0.005-100.000) in
t = ⋅k
(I )
PR steps of 0.001
− CR
CR=(0.1-10.0) in steps of
I = Imeasured/Iset 0.1
PR=(0.005-3.000) in steps
of 0.001
RI inverse characteristic no 18 k=(0.05-999) in steps of IEC 60255-3, class 5 + 40 ms
0.01
1
t = ⋅k
0.236
0.339 −
I
I = Imeasured/Iset
Logarithmic inverse characteristic no 19 k=(0.05-1.10) in steps of IEC 60255-3, class 5 + 40 ms
0.01
⎛
t = 5.8 − ⎜ 1.35 ⋅ In
I ⎞
⎟
⎝ k ⎠
I = Imeasured/Iset
769
Inverse characteristics Chapter 21
Time inverse characteristics
Table 416: Inverse time characteristics for Two step undervoltage protection (PUVM, 27)
Function Range or value Accuracy
Type A curve: k = (0.05-1.10) in steps of Class 5 +40 ms
0.01
k
t =
⎛ U < −U ⎞
⎜ ⎟
⎝ U< ⎠
U< = Uset
U = Umeasured
Type B curve: k = (0.05-1.10) in steps of
0.01
k ⋅ 480
t = + 0.055
⎛ 32 ⋅ U < −U − 0.5 ⎞
2.0
⎜ ⎟
⎝ U < ⎠
U< = Uset
U = Umeasured
Programmable curve: k = (0.05-1.10) in steps of
0.01
A = (0.005-200.000) in
⎡ ⎤ steps of 0.001
⎢ k⋅A
⎥
t =⎢ ⎥+D B = (0.50-100.00) in steps
⎢ ⎛ U < −U ⎞
P
⎥ of 0.01
⎢⎜B ⋅ −C⎟ ⎥ C = (0.0-1.0) in steps of 0.1
⎣⎝ U < ⎠ ⎦
U< = Uset D = (0.000-60.000) in
steps of 0.001
U = Umeasured
P = (0.000-3.000) in steps
of 0.001
770
Inverse characteristics Chapter 21
Time inverse characteristics
Table 417: Inverse time characteristics for Two step overvoltage protection (POVM, 59)
Function Range or value Accuracy
Type A curve: k = (0.05-1.10) in steps of Class 5 +40 ms
0.01
k
t =
⎛U −U >⎞
⎜ ⎟
⎝ U> ⎠
U> = Uset
U = Umeasured
Type B curve: k = (0.05-1.10) in steps of
0.01
k ⋅ 480
t =
⎛ 32 ⋅ U − U > − 0.5 ⎞
2.0
⎜ ⎟ − 0.035
⎝ U > ⎠
Type C curve: k = (0.05-1.10) in steps of
0.01
k ⋅ 480
t =
3.0
⎛ 32 ⋅ U − U > − 0.5 ⎞
⎜ ⎟ − 0.035
⎝ U > ⎠
Programmable curve: k = (0.05-1.10) in steps of
0.01
A = (0.005-200.000) in
k⋅A steps of 0.001
t = +D
⎛B ⋅ U − U > ⎞
P
B = (0.50-100.00) in steps
⎜ −C⎟
⎝ U > ⎠ of 0.01
C = (0.0-1.0) in steps of 0.1
D = (0.000-60.000) in
steps of 0.001
P = (0.000-3.000) in steps
of 0.001
771
Inverse characteristics Chapter 21
Time inverse characteristics
k
t =
⎛U −U >⎞
⎜ ⎟
⎝ U> ⎠
U> = Uset
U = Umeasured
Type B curve: k = (0.05-1.10) in steps of
0.01
k ⋅ 480
t =
2.0
⎛ 32 ⋅ U − U > − 0.5 ⎞
⎜ ⎟ − 0.035
⎝ U > ⎠
Type C curve: k = (0.05-1.10) in steps of
0.01
k ⋅ 480
t =
⎛ 32 ⋅ U − U > − 0.5 ⎞
3.0
⎜ ⎟ − 0.035
⎝ U > ⎠
Programmable curve: k = (0.05-1.10) in steps of
0.01
A = (0.005-200.000) in
k⋅A steps of 0.001
t = +D
⎛B ⋅ U − U > ⎞
P
B = (0.50-100.00) in steps
⎜ −C⎟
⎝ U > ⎠ of 0.01
C = (0.0-1.0) in steps of 0.1
D = (0.000-60.000) in
steps of 0.001
P = (0.000-3.000) in steps
of 0.001
772
Inverse characteristics Chapter 21
Time inverse characteristics
100
10
k=
15
10
7
1
5
3
2
1
0.1
0.5
0.01
1 10 100 I/I>
xx05000764.vsd
773
Inverse characteristics Chapter 21
Time inverse characteristics
100
10
k=
15
10
1 7
5
3
2
1
0.1
0.5
0.01
1 10 100 I/I>
xx05000765.vsd
774
Inverse characteristics Chapter 21
Time inverse characteristics
100
10
k=
15
10
1 7
5
3
2
1
0.1
0.5
0.01
1 10 100 I/I>
xx05000766.vsd
775
Inverse characteristics Chapter 21
Time inverse characteristics
100
k=
15
10
10
7
5
1
1
0.5
0.1
0.01
1 10 100 I/I>
xx05000767.vsd
776
Inverse characteristics Chapter 21
Time inverse characteristics
100
10
k=
1.1
0.9
0.7
1 0.5
0.3
0.2
0.1
0.1 0.05
0.01
1 10 100 I/I>
xx05000768.vsd
777
Inverse characteristics Chapter 21
Time inverse characteristics
100
10
1
k=
1.1
0.9
0.7
0.5
0.3
0.1 0.2
0.1
0.05
0.01
1 10 100 I/I>
xx05000769.vsd
778
Inverse characteristics Chapter 21
Time inverse characteristics
100
10
k=
0.1 1.1
0.9
0.7
0.5
0.3
0.2
0.01 0.1
1 10 100 I/I>
0.05 xx05000770.vsd
779
Inverse characteristics Chapter 21
Time inverse characteristics
780
About this chapter Chapter 22
Glossary
Chapter 22 Glossary
781
Glossary Chapter 22
Glossary
1 Glossary
AC Alternating Current
CAN Controller Area Network. ISO standard (ISO 11898) for serial communi-
cation
CAP 531 Configuration and programming tool
CB Circuit breaker
Co-directional Way of transmitting G.703 over a balanced line. Involves two twisted
pairs making it possible to transmit information in both directions
782
Glossary Chapter 22
Glossary
Contra-directional Way of transmitting G.703 over a balanced line. Involves four twisted
pairs of with two are used for transmitting data in both directions, and
two pairs for transmitting clock signals
CPU Central Processor Unit
CR Carrier Receive
CT Current transformer
DC Direct Current
DR Disturbance Recorder
DRH Disturbance Report Handler
G.703 Electrical and functional description for digital lines used by local tele-
phone companies. Can be transported over balanced and unbalanced
lines
G.711 Standard for pulse code modulation of analog signals on digital lines
GCM Communication interface module with carrier of GPS receiver module
783
Glossary Chapter 22
Glossary
HDLC protocol High level data link control, protocol based on the HDLC standard
HFBR connector type Plastic fibre connector
IEC 60044-6 IEC Standard, Instrument transformers – Part 6: Requirements for pro-
tective current transformers for transient performance
IEEE P1386.1 PCI Mezzanine Card (PMC) standard for local bus modules. References
the CMC (IEEE P1386, also known as Common Mezzanine Card) stan-
dard for the mechanics and the PCI specifications from the PCI SIG
(Special Interest Group) for the electrical EMF Electro Motive Force.
EMF Electro Motive Force
Instance When several occurrences of the same function are available in the IED
they are referred to as instances of that function. One instance of a func-
tion is identical to another of the same kind but will have a different num-
ber in the IED user interfaces. The word instance is sometimes defined
as an item of information that is representative of a type. In the same
way an instance of a function in the IED is representative of a type of
function.
IP 1. Internet protocol. The network layer for the TCP/IP protocol suite
widely used on Ethernet networks. IP is a connectionless, best-effort
packet switching protocol. It provides packet routing, fragmentation and
re-assembly through the data link layer.
2. Ingression protection according to IEC standard
784
Glossary Chapter 22
Glossary
OV Over voltage
Overreach A term used to describe how the relay behaves during a fault condition.
For example a distance relay is over-reaching when the impedance pre-
sented to it is smaller than the apparent impedance to the fault applied
to the balance point, i.e. the set reach. The relay “sees” the fault but per-
haps it should not have seen it.
Process bus Bus or LAN used at the process level, that is, in near proximity to the
measured and/or controlled components
PSM Power supply module
785
Glossary Chapter 22
Glossary
SA Substation Automation
TCP Transmission Control Protocol. The most common transport layer proto-
col used on Ethernet and the Internet.
786
Glossary Chapter 22
Glossary
TCP/IP Transmission Control Protocol over Internet Protocol. The de facto stan-
dard Ethernet protocols incorporated into 4.2BSD Unix. TCP/IP was
developed by DARPA for internet working and encompasses both net-
work layer and transport layer protocols. While TCP and IP specify two
protocols at specific protocol layers, TCP/IP is often used to refer to the
entire US Department of Defense protocol suite based upon these,
including Telnet, FTP, UDP and RDP.
Underreach A term used to describe how the relay behaves during a fault condition.
For example a distance relay is under-reaching when the impedance
presented to it is greater than the apparent impedance to the fault
applied to the balance point, i.e. the set reach. The relay does not “see”
the fault but perhaps it should have seen it. See also Overreach.
U/I-PISA Process interface components that deliver measured voltage and cur-
rent values
UV Under-voltage
V.36 CCITT interface for 4 wire data communication with a speed exceeding
48Kkbps.
3UO Three times the zero sequence voltage. Often referred to as the residual
voltage or the neutral point voltage
787
Glossary Chapter 22
Glossary
788