1mrk506275-Uen - TRM Rel670 1.1

Technical reference manual
Line distance protection IED REL 670
Innovation from ABB

Technical reference manual
Line distance protection IED
REL 670
About this manual

Document No: 1MRK 506 275-UEN
Issued: March 2007
Product version: 1.1
Revision: –
© Copyright 2007 ABB. All rights reserved.

COPYRIGHT
WE RESERVE ALL RIGHTS TO THIS DOCUMENT, EVEN IN THE EVENT THAT A PATENT IS
ISSUED AND A DIFFERENT COMMERCIAL PROPRIETARY RIGHT IS REGISTERED. IMPROPER
USE, IN PARTICULAR REPRODUCTION AND DISSEMINATION TO THIRD PARTIES, IS NOT
PERMITTED.
THIS DOCUMENT HAS BEEN CAREFULLY CHECKED. HOWEVER, IN CASE ANY ERRORS ARE
DETECTED, THE READER IS KINDLY REQUESTED TO NOTIFY THE MANUFACTURER AT THE
ADDRESS BELOW.
THE DATA CONTAINED IN THIS MANUAL IS INTENDED SOLELY FOR THE CONCEPT OR
PRODUCT DESCRIPTION AND IS NOT TO BE DEEMED TO BE A STATEMENT OF GUARAN-
TEED PROPERTIES. IN THE INTERESTS OF OUR CUSTOMERS, WE CONSTANTLY SEEK TO
ENSURE THAT OUR PRODUCTS ARE DEVELOPED TO THE LATEST TECHNOLOGICAL STAN-
DARDS. AS A RESULT, IT IS POSSIBLE THAT THERE MAY BE SOME DIFFERENCES BETWEEN
THE HW/SW PRODUCT AND THIS INFORMATION PRODUCT.
Manufacturer:
ABB AB
Substation Automation Products
SE-721 59 Västerås
Sweden
Telephone: +46 (0) 21 34 20 00
Facsimile: +46 (0) 21 14 69 18
www.abb.com/substationautomation
Contents
Chapter Page
Chapter 1 Introduction ..................................................................... 1
Introduction to the technical reference manual.................................... 2

About the complete set of manuals for an IED ............................... 2
About the technical reference manual ............................................ 3
Design of the Technical reference manual (TRM) .......................... 4
Introduction................................................................................ 4
Principle of operation................................................................. 4
Input and output signals ............................................................ 7
Function block ........................................................................... 7
Setting parameters .................................................................... 8
Technical data ........................................................................... 8
Intended audience .......................................................................... 8
General...................................................................................... 8
Requirements ............................................................................ 8
Related documents......................................................................... 9
Revision notes .............................................................................. 10
Chapter 2 Local human-machine interface .................................. 11
Human machine interface.................................................................. 12

Small size graphic HMI ...................................................................... 14
Introduction ................................................................................... 14
Design .......................................................................................... 14
Medium size graphic HMI .................................................................. 16
Introduction ................................................................................... 16
Design .......................................................................................... 16
Keypad............................................................................................... 20
LED.................................................................................................... 22
Introduction ................................................................................... 22
Status indication LEDs ................................................................. 22
Indication LEDs ............................................................................ 22
LHMI related functions....................................................................... 24
Introduction ................................................................................... 24
General setting parameters .......................................................... 24
Status indication LEDs ................................................................. 24
Design ..................................................................................... 24
Function block ......................................................................... 25
Input and output signals .......................................................... 25
Indication LEDs ............................................................................ 25
Introduction.............................................................................. 25
Design ..................................................................................... 26
Function block ......................................................................... 33
Input and output signals .......................................................... 33
Setting parameters .................................................................. 34
Contents
Chapter 3 Basic IED functions....................................................... 37
Analog inputs ..................................................................................... 38

Introduction ................................................................................... 38
Principle of operation .................................................................... 38
Function block............................................................................... 39
Output signals............................................................................... 40
Setting parameters ....................................................................... 42
Authorization ...................................................................................... 48
Authorization handling in the tool.................................................. 48
Authorization handling in the IED ................................................. 54
Self supervision with internal event list .............................................. 55
Introduction ................................................................................... 55
Internal signals ........................................................................ 56
Run-time model ....................................................................... 58
Function block............................................................................... 60
Output signals............................................................................... 60
Technical data .............................................................................. 60
Time synchronization ......................................................................... 61
Introduction ................................................................................... 61
General concepts .................................................................... 61
Real Time Clock (RTC) operation............................................ 62
Synchronization alternatives.................................................... 63
Function block............................................................................... 66
Output signals............................................................................... 66
Technical data .............................................................................. 69
Parameter setting groups .................................................................. 70
Introduction ................................................................................... 70
Function block............................................................................... 71
Input and output signals................................................................ 72
Test mode functionality ...................................................................... 74
Introduction ................................................................................... 74
Function block............................................................................... 75
IED identifiers .................................................................................... 77
Introduction ................................................................................... 77
Signal matrix for binary inputs (SMBI) ............................................... 78
Introduction ................................................................................... 78
Function block............................................................................... 78
Signal matrix for binary outputs (SMBO) ........................................... 80
Introduction ................................................................................... 80
Contents

Function block .............................................................................. 80
Input and output signals ............................................................... 80
Signal matrix for mA inputs (SMMI) ................................................... 82
Introduction ................................................................................... 82
Function block .............................................................................. 82
Signal matrix for analog inputs (SMAI) .............................................. 83
Introduction ................................................................................... 83
Function block .............................................................................. 83
Summation block 3 phase (SUM3Ph)................................................ 87
Introduction ................................................................................... 87
Function block .............................................................................. 87
Authority status (AUTS) ..................................................................... 89
Introduction ................................................................................... 89
Function block .............................................................................. 89
Output signals............................................................................... 89
Goose binary receive......................................................................... 90
Function block .............................................................................. 90
Chapter 4 Differential protection ................................................... 93
High impedance differential protection (PDIF, 87)............................. 94

Introduction ................................................................................... 94
Logic diagram .......................................................................... 94
Function block .............................................................................. 95
Technical data .............................................................................. 96
Chapter 5 Impedance protection................................................... 97
Distance measuring zones, quadrilateral characteristic (PDIS, 21)... 98

Introduction ................................................................................... 98
Full scheme measurement ...................................................... 99
Impedance characteristic......................................................... 99
Minimum operating current.................................................... 103
Contents
Measuring principles.............................................................. 104

Directional lines ..................................................................... 106
Simplified logic diagrams ....................................................... 108
Function block............................................................................. 112
Input and output signals.............................................................. 113
Setting parameters ..................................................................... 114
Technical data ............................................................................ 115
Distance protection zones, quadrilateral characteristic for
series compensated lines (PDIS) .................................................. 116
Introduction ................................................................................. 116
Principle of operation .................................................................. 117
Full scheme measurement .................................................... 117
Impedance characteristic....................................................... 117
Minimum operating current .................................................... 121
Directionality for series compensation ................................... 124
Function block............................................................................. 130
Technical data ............................................................................ 133
Full-scheme distance measuring, Mho characteristic, PDIS 21....... 134
Introduction ................................................................................. 134
Basic operation characteristics .............................................. 136
Theory for operation .............................................................. 138
Function block............................................................................. 151
Technical data ............................................................................ 155
Mho impedance supervision logic.................................................... 156
Introduction ................................................................................. 156
Fault inception detection........................................................ 156
Function block............................................................................. 157
Phase selection with load encroachment (PDIS, 21)....................... 160
Introduction ................................................................................. 160
Phase-to-earth fault ............................................................... 162
Phase-to-phase fault ............................................................. 164
Three phase faults ................................................................. 165
Load encroachment ............................................................... 166
Minimum operate currents ..................................................... 169
Function block............................................................................. 174
Technical data ............................................................................ 176
Full scheme distance protection, quadrilateral for Mho ................... 177
Contents
Introduction ................................................................................. 177

Minimum operating current.................................................... 180
Directional lines ..................................................................... 183
Simplified logic diagrams....................................................... 185
Function block ............................................................................ 188
Input and output signals ............................................................. 188
Technical data ............................................................................ 189
Faulty phase identification with load enchroachment (PDIS, 21) .... 191
Introduction ................................................................................. 191
The phase selection function................................................. 191
Function block ............................................................................ 203
Technical data ............................................................................ 205
Directional impedance Mho (RDIR) ................................................. 206
Introduction ................................................................................. 206
Directional impedance element for mho characteristic, ZDM 206
Additional distance protection directional function for
earth faults, ZDA .............................................................. 209
Function block ............................................................................ 211
Phase preference logic .................................................................... 215
Introduction ................................................................................. 215
Function block ............................................................................ 218
Power swing detection (RPSB, 78).................................................. 220
Introduction ................................................................................. 220
Resistive reach in forward direction....................................... 222
Resistive reach in reverse direction....................................... 222
Reactive reach in forward and reverse direction ................... 223
Basic detection logic.............................................................. 223
Operating and inhibit conditions ............................................ 225
Function block ............................................................................ 226
Technical data ............................................................................ 228
Power swing logic (RPSL, 78) ......................................................... 229
Introduction ................................................................................. 229
Communication and tripping logic ......................................... 229
Blocking logic......................................................................... 230
Function block ............................................................................ 232
Contents

Technical data ............................................................................ 233
Pole Slip protection (PPAM, 78) ...................................................... 234
Introduction ................................................................................. 234
Function block............................................................................. 238
Technical data ............................................................................ 240
Automatic switch onto fault logic, voltage and
current based (SFCV) .............................................................. 241
Introduction ................................................................................. 241
Function block............................................................................. 243
Technical data ............................................................................ 244
Chapter 6 Current protection ....................................................... 245
Instantaneous phase overcurrent protection (PIOC, 50) ................. 246

Introduction ................................................................................. 246
Function block............................................................................. 246
Technical data ............................................................................ 248
Four step phase overcurrent protection (PTOC, 51_67).................. 249
Introduction ................................................................................. 249
Function block............................................................................. 253
Technical data ............................................................................ 262
Instantaneous residual overcurrent protection (PIOC, 50N) ............ 264
Introduction ................................................................................. 264
Function block............................................................................. 265
Technical data ............................................................................ 266
Four step residual overcurrent protection (PTOC, 51N/67N)........... 267
Introduction ................................................................................. 267
Operating quantity within the function ................................... 268
Internal polarizing facility of the function................................ 268
External polarizing facility for EF function.............................. 270
Base quantities within the function ........................................ 270
Internal EF function structure ................................................ 271
Four residual overcurrent stages ........................................... 271
Contents
Directional supervision element with

integrated directional comparision stage ............................. 272
Second harmonic blocking element....................................... 274
Switch on to fault feature ....................................................... 276
Function block ............................................................................ 281
Technical data ............................................................................ 290
Sensitive directional residual overcurrent and
power protection (PSDE, 67N) ...................................................... 291
Introduction ................................................................................. 291
Introduction............................................................................ 292
Function block ............................................................................ 299
Technical data ............................................................................ 306
Thermal overload protection, one time constant (PTTR, 26)........... 308
Introduction ................................................................................. 308
Function block ............................................................................ 312
Technical data ............................................................................ 314
Breaker failure protection (RBRF, 50BF)......................................... 315
Introduction ................................................................................. 315
Function block ............................................................................ 318
Technical data ............................................................................ 320
Stub protection (PTOC, 50STB) ...................................................... 321
Introduction ................................................................................. 321
Function block ............................................................................ 322
Technical data ............................................................................ 323
Pole discordance protection (RPLD, 52PD) .................................... 324
Introduction ................................................................................. 324
Pole discordance signalling from circuit breaker ................... 327
Unsymmetrical current detection ........................................... 327
Function block ............................................................................ 327
Technical data ............................................................................ 329
Directional underpower protection (PDUP, 32)................................ 330
Introduction ................................................................................. 330
Low pass filtering................................................................... 333
Calibration of analog inputs ................................................... 333
Function block ............................................................................ 335
Contents

Technical data ............................................................................ 337
Directional overpower protection (PDOP, 32).................................. 338
Introduction ................................................................................. 338
Low pass filtering ................................................................... 341
Calibration of analog inputs ................................................... 341
Function block............................................................................. 343
Technical data ............................................................................ 345
Broken conductor check (PTOC, 46) ............................................... 346
Introduction ................................................................................. 346
Function block............................................................................. 347
Technical data ............................................................................ 348
Chapter 7 Voltage protection ....................................................... 349
Two step undervoltage protection (PTUV, 27)................................. 350

Introduction ................................................................................. 350
Measurement principle .......................................................... 351
Time delay ............................................................................. 351
Blocking ................................................................................. 354
Design ................................................................................... 356
Function block............................................................................. 358
Technical data ............................................................................ 362
Two step overvoltage protection (PTOV, 59)................................... 363
Introduction ................................................................................. 363
Time delay ............................................................................. 364
Blocking ................................................................................. 366
Design ................................................................................... 367
Function block............................................................................. 369
Technical data ............................................................................ 373
Two step residual overvoltage protection (PTOV, 59N)................... 374
Introduction ................................................................................. 374
Time delay ............................................................................. 374
Blocking ................................................................................. 378
Design ................................................................................... 379
Contents
Function block ............................................................................ 380

Technical data ............................................................................ 383
Overexcitation protection (PVPH, 24).............................................. 384
Introduction ................................................................................. 384
Measured voltage .................................................................. 387
Operate time of the overexcitation protection........................ 387
Cooling .................................................................................. 391
OEX protection function measurands.................................... 391
Overexcitation alarm.............................................................. 392
Logic diagram ........................................................................ 393
Function block ............................................................................ 394
Technical data ............................................................................ 396
Voltage differential protection (PTOV, 60) ....................................... 397
Introduction ................................................................................. 397
Function block ............................................................................ 399
Technical data ............................................................................ 401
Loss of voltage check (PTUV, 27) ................................................... 402
Introduction ................................................................................. 402
Function block ............................................................................ 404
Chapter 8 Frequency protection ................................................. 407
Underfrequency protection (PTUF, 81)............................................ 408

Introduction ................................................................................. 408
Time delay ............................................................................. 408
Voltage dependent time delay ............................................... 409
Blocking ................................................................................. 410
Design ................................................................................... 410
Function block ............................................................................ 411
Technical data ............................................................................ 413
Overfrequency protection (PTOF, 81) ............................................. 414
Introduction ................................................................................. 414
Time delay ............................................................................. 414
Blocking ................................................................................. 415
Contents
Design ................................................................................... 415

Function block............................................................................. 416
Technical data ............................................................................ 417
Rate-of-change frequency protection (PFRC, 81) ........................... 418
Introduction ................................................................................. 418
Time delay ............................................................................. 419
Blocking ................................................................................. 419
Design ................................................................................... 419
Function block............................................................................. 420
Technical data ............................................................................ 422
Chapter 9 Multipurpose protection ............................................. 423
General current and voltage protection (GAPC) .............................. 424

Introduction ................................................................................. 424
Inadvertent generator energization........................................ 424
Measured quantities within the function................................. 425
Base quantities for GF function ............................................. 427
Built-in overcurrent protection steps ...................................... 427
Built-in undercurrent protection steps .................................... 433
Built-in overvoltage protection steps...................................... 434
Built-in undervoltage protection steps.................................... 434
Inadvertent generator energization........................................ 434
Logic diagram ........................................................................ 436
Function block............................................................................. 441
Technical data ............................................................................ 453
Chapter 10 Secondary system supervision.................................. 457
Current circuit supervision (RDIF).................................................... 458

Introduction ................................................................................. 458
Function block............................................................................. 460
Technical data ............................................................................ 461
Fuse failure supervision (RFUF) ...................................................... 462
Introduction ................................................................................. 462
Zero sequence ...................................................................... 462
Negative sequence ................................................................ 466
Contents
du/dt and di/dt........................................................................ 466

Operation modes ................................................................... 467
Dead line detection................................................................ 467
Function block ............................................................................ 468
Technical data ............................................................................ 470
Chapter 11 Control ......................................................................... 471
Synchronizing, synchrocheck and energizing check (RSYN, 25).... 472

Introduction ................................................................................. 472
Basic functionality.................................................................. 472
Logic diagrams ...................................................................... 473
Function block ............................................................................ 482
Technical data ............................................................................ 488
Autorecloser (RREC, 79) ................................................................. 490
Introduction ................................................................................. 490
Logic Diagrams...................................................................... 490
Auto-reclosing operation Off and On ..................................... 490
Auto-reclosing mode selection .............................................. 490
Start auto-reclosing and conditions for
start of a reclosing cycle .................................................... 491
Control of the auto-reclosing open time for shot 1................. 492
Long trip signal ...................................................................... 493
Time sequence diagrams ...................................................... 499
Function block ............................................................................ 503
Technical data ............................................................................ 507
Apparatus control (APC).................................................................. 509
Introduction ................................................................................. 509
Bay control (QCBAY).................................................................. 510
Introduction............................................................................ 510
Principle of operation............................................................. 510
Function block ....................................................................... 511
Input and output signals ........................................................ 512
Setting parameters ................................................................ 512
Local/Remote switch (LocalRemote, LocRemControl) ............... 512
Introduction............................................................................ 512
Principle of operation............................................................. 512
Function block ....................................................................... 514
Switch controller (SCSWI) .......................................................... 516
Introduction............................................................................ 516
Contents
Principle of operation ............................................................. 516

Function block ....................................................................... 522
Circuit breaker (SXCBR)............................................................. 524
Introduction ............................................................................ 524
Function block ....................................................................... 528
Circuit switch (SXSWI)................................................................ 530
Introduction ............................................................................ 530
Function block ....................................................................... 535
Bay reserve (QCRSV) ................................................................ 536
Introduction ............................................................................ 536
Function block ....................................................................... 539
Reservation input (RESIN) ......................................................... 540
Introduction ............................................................................ 540
Function block ....................................................................... 542
Interlocking ...................................................................................... 544
Introduction ................................................................................. 544
Logical node for interlocking (SCILO)......................................... 547
Introduction ............................................................................ 547
Function block ....................................................................... 548
Interlocking for line bay (ABC_LINE) .......................................... 549
Introduction ............................................................................ 549
Function block ....................................................................... 550
Logic diagram ........................................................................ 551
Interlocking for bus-coupler bay (ABC_BC)................................ 558
Introduction ............................................................................ 558
Function block ....................................................................... 560
Logic diagram ........................................................................ 561
Interlocking for transformer bay (AB_TRAFO)............................ 568
Introduction ............................................................................ 568
Function block ....................................................................... 569
Logic diagram ........................................................................ 570
Interlocking for bus-section breaker (A1A2_BS)......................... 575
Introduction ............................................................................ 575
Contents
Function block ....................................................................... 576

Logic diagram ........................................................................ 577
Interlocking for bus-section disconnector (A1A2_DC) ................ 580
Introduction............................................................................ 580
Function block ....................................................................... 581
Logic diagram ........................................................................ 582
Interlocking for busbar earthing switch (BB_ES) ........................ 584
Introduction............................................................................ 584
Function block ....................................................................... 584
Logic diagram ........................................................................ 585
Interlocking for double CB bay (DB) ........................................... 585
Introduction............................................................................ 585
Function block ....................................................................... 587
Logic diagrams ...................................................................... 589
Input and output signals ....................................................... 595
Interlocking for 1 1/2 CB diameter (BH)...................................... 598
Introduction............................................................................ 598
Function blocks...................................................................... 600
Logic diagrams ...................................................................... 603
Horizontal communication via GOOSE for interlocking .............. 615
Function block ....................................................................... 615
Logic rotating switch for function selection
and LHMI presentation (SLGGIO) ................................................... 618
Introduction ................................................................................. 618
Functionality and behaviour .................................................. 619
Graphical display ................................................................... 620
Function block ............................................................................ 622
Selector mini switch (VSGGIO) ....................................................... 626
Introduction ................................................................................. 626
Function block ............................................................................ 627
Single point generic control 8 signals (SPC8GGIO) ........................ 629
Introduction ................................................................................. 629
Function block ............................................................................ 629
Chapter 12 Scheme communication............................................. 631
Scheme communication
Contents
logic for distance protection (PSCH, 85) ............................. 632

Introduction ................................................................................. 632
Blocking scheme ................................................................... 632
Permissive underreach scheme ............................................ 633
Permissive overreach scheme............................................... 633
Unblocking scheme ............................................................... 633
Intertrip scheme ..................................................................... 634
Simplified logic diagram......................................................... 635
Function block............................................................................. 637
Technical data ............................................................................ 638
Phase segregated scheme communication logic
for distance protection (PSCH, 85) ................................................ 639
Introduction ................................................................................. 639
Blocking scheme ................................................................... 640
Permissive underreach scheme ............................................ 640
Permissive overreach scheme............................................... 641
Intertrip scheme ..................................................................... 641
Simplified logic diagram......................................................... 641
Function block............................................................................. 643
Technical data ............................................................................ 645
Current reversal and weak-end infeed logic
for distance protection (PSCH, 85) .................................................. 646
Introduction ................................................................................. 646
Current reversal logic............................................................. 646
Weak end infeed logic ........................................................... 647
Function block............................................................................. 648
Technical data ............................................................................ 650
Local acceleration logic (PLAL) ....................................................... 651
Introduction ................................................................................. 651
Zone extension ...................................................................... 651
Loss-of-load acceleration ...................................................... 652
Function block............................................................................. 653
Scheme communication logic
for residual overcurrent protection (PSCH, 85)................................ 655
Introduction ................................................................................. 655
Blocking scheme ................................................................... 656
Permissive under/overreach scheme .................................... 656
Function block............................................................................. 659
Contents

Technical data ............................................................................ 660
Current reversal and weak-end infeed logic
for residual overcurrent protection (PSCH, 85)................................ 661
Introduction ................................................................................. 661
Directional comparison logic function .................................... 661
Fault current reversal logic .................................................... 662
Weak and infeed logic ........................................................... 662
Function block ............................................................................ 663
Technical data ............................................................................ 665
Current reversal and weak-end infeed logic for
phase segregated communication (PSCH) .................................. 666
Introduction ................................................................................. 666
Current reversal logic ........................................................... 666
Function block ............................................................................ 668
Technical data ............................................................................ 670
Chapter 13 Logic............................................................................. 673
Tripping logic (PTRC, 94) ................................................................ 674

Introduction ................................................................................. 674
Logic diagram ........................................................................ 675
Function block ............................................................................ 680
Technical data ............................................................................ 681
Trip matrix logic (GGIO)................................................................... 682
Introduction ................................................................................. 682
Function block ............................................................................ 684
Configurable logic blocks (LLD)....................................................... 687
Introduction ................................................................................. 687
Inverter function block (INV) ....................................................... 687
OR function block (OR)............................................................... 687
AND function block (AND) .......................................................... 688
Timer function block (Timer) ....................................................... 689
Pulse timer function block (PULSE)............................................ 689
Exclusive OR function block (XOR) ............................................ 690
Set-reset with memory function block (SRM) ............................. 690
Controllable gate function block (GT) ......................................... 691
Settable timer function block (TS)............................................... 692
Contents
Technical data ............................................................................ 693

Fixed signal function block (FIXD) ................................................... 694
Introduction ................................................................................. 694
Function block............................................................................. 694
Boolean 16 to Integer conversion B16I............................................ 696
Introduction ................................................................................. 696
Function block ....................................................................... 696
Boolean 16 to Integer conversion with logic node representation
(B16IGGIO)...................................................................................... 698
Introduction ................................................................................. 698
Function block............................................................................. 698
Integer to Boolean 16 conversion (IB16) ......................................... 700
Introduction ................................................................................. 700
Function block............................................................................. 700
Integer to Boolean 16 conversion with logic node representation
(IB16GGIO)...................................................................................... 702
Introduction ................................................................................. 702
Function block............................................................................. 702
Chapter 14 Monitoring .................................................................... 705
Measurements (MMXU)................................................................... 706

Introduction ................................................................................. 707
Measurement supervision...................................................... 708
Service values (MMXU, SVR)................................................ 712
Current Phasors (MMXU, CP) ............................................... 717
Voltage phasors (MMXU, VN and VP)................................... 718
Sequence quantities (MSQI, CSQ and VSQ) ........................ 718
Function block............................................................................. 718
Technical data ............................................................................ 738
Event counter (GGIO) ...................................................................... 739
Function block............................................................................. 739
Event function (EV) .......................................................................... 740
Contents
Introduction ................................................................................. 740

Function block ............................................................................ 742
Fault locator (RFLO) ........................................................................ 746
Introduction ................................................................................. 746
Measuring principle ............................................................... 747
Accurate algorithm for measurement of distance to fault ...... 747
The non-compensated impedance model ............................. 751
IEC 60870-5-103 ................................................................... 752
Function block ............................................................................ 752
Technical data ............................................................................ 754
Measured value expander block...................................................... 755
Introduction ................................................................................. 755
Function block ............................................................................ 756
Disturbance report (RDRE).............................................................. 757
Introduction ................................................................................. 757
Function block ............................................................................ 765
Technical data ............................................................................ 781
Event list (RDRE)............................................................................. 783
Introduction ................................................................................. 783
Function block ............................................................................ 783
Input signals ............................................................................... 783
Technical data ............................................................................ 784
Indications (RDRE) .......................................................................... 785
Introduction ................................................................................. 785
Function block ............................................................................ 786
Input signals ............................................................................... 786
Technical data ............................................................................ 786
Event recorder (RDRE).................................................................... 787
Introduction ................................................................................. 787
Function block ............................................................................ 787
Input signals ............................................................................... 787
Technical data ............................................................................ 788
Trip value recorder (RDRE) ............................................................. 789
Introduction ................................................................................. 789
Function block ............................................................................ 789
Input signals ............................................................................... 790
Technical data ............................................................................ 790
Disturbance recorder (RDRE).......................................................... 791
Contents
Introduction ................................................................................. 791

Memory and storage.............................................................. 792
IEC 60870-5-103 ................................................................... 793
Function block............................................................................. 793
Technical data ............................................................................ 794
Chapter 15 Metering ....................................................................... 795
Pulse counter logic (GGIO).............................................................. 796

Introduction ................................................................................. 796
Function block............................................................................. 798
Technical data ............................................................................ 799
Energy metering and demand handling (MMTR)............................. 800
Introduction ................................................................................. 800
Function block............................................................................. 801
Chapter 16 Station communication............................................... 805
Overview .......................................................................................... 806

IEC 61850-8-1 communication protocol........................................... 807
Introduction ................................................................................. 807
Generic single point function block (SPGGIO) ........................... 807
Introduction ............................................................................ 807
Function block ....................................................................... 807
Generic double point function block (DPGGIO).......................... 808
Introduction ............................................................................ 808
Function block ....................................................................... 809
Generic measured values function block (MVGGIO).................. 809
Introduction ............................................................................ 809
Function block ....................................................................... 810
Technical data ............................................................................ 811
Contents
LON communication protocol .......................................................... 812

Introduction ................................................................................. 812
Technical data ............................................................................ 829
SPA communication protocol........................................................... 830
Introduction ................................................................................. 830
Communication ports............................................................. 838
Design ........................................................................................ 839
Technical data ............................................................................ 840
IEC 60870-5-103 communication protocol ...................................... 841
Introduction ................................................................................. 841
General.................................................................................. 841
Communication ports............................................................. 851
Function block ............................................................................ 851
Technical data ............................................................................ 862
Automation bits (AUBI) .................................................................... 863
Introduction ................................................................................. 863
Function block ............................................................................ 864
Single command, 16 signals (CD) ................................................... 878
Introduction ................................................................................. 878
Function block ............................................................................ 878
Multiple command (CM) and Multiple transmit (MT)........................ 880
Introduction ................................................................................. 880
Design ........................................................................................ 880
General.................................................................................. 880
Function block ............................................................................ 881
Chapter 17 Remote communication ............................................. 885
Binary signal transfer to remote end................................................ 886

Introduction ................................................................................. 886
Function block ............................................................................ 887
Contents
Chapter 18 Hardware ...................................................................... 895
Overview .......................................................................................... 896

Variants of case- and HMI display size....................................... 896
Case from the rear side .............................................................. 899
Hardware modules........................................................................... 904
Overview..................................................................................... 904
Combined backplane module (CBM).......................................... 905
Introduction ............................................................................ 905
Functionality .......................................................................... 905
Design ................................................................................... 905
Universal backplane module (UBM) ........................................... 907
Introduction ............................................................................ 907
Functionality .......................................................................... 907
Design ................................................................................... 907
Power supply module (PSM) ...................................................... 910
Introduction ............................................................................ 910
Design ................................................................................... 910
Technical data ....................................................................... 910
Numeric processing module (NUM)............................................ 911
Introduction ............................................................................ 911
Functionality .......................................................................... 911
Block diagram ........................................................................ 912
Local human-machine interface (LHMI)...................................... 912
Transformer input module (TRM) ............................................... 913
Introduction ............................................................................ 913
Design ................................................................................... 913
Technical data ....................................................................... 913
Analog digital conversion module,
with time synchronization (ADM) ............................................. 914
Introduction ............................................................................ 914
Design ................................................................................... 914
Binary input module (BIM) .......................................................... 916
Introduction ............................................................................ 916
Design ................................................................................... 916
Technical data ....................................................................... 920
Binary output modules (BOM) .................................................... 920
Introduction ............................................................................ 920
Design ................................................................................... 921
Technical data ....................................................................... 923
Static binary output module (SOM)............................................. 923
Introduction ............................................................................ 923
Design ................................................................................... 923
Technical data ....................................................................... 925
Binary input/output module (IOM)............................................... 926
Introduction ............................................................................ 926
Design ................................................................................... 926
Technical data ....................................................................... 929
Line data communication module (LDCM) ................................. 931
Introduction ............................................................................ 931
Design ................................................................................... 931
Technical data ....................................................................... 932
Contents
Serial SPA/IEC 60870-5-103 and LON

communication module (SLM) ................................................ 933
Introduction............................................................................ 933
Design ................................................................................... 933
Technical data ....................................................................... 935
Galvanic RS485 communication module.................................... 936
Introduction............................................................................ 936
Design ................................................................................... 936
Technical data ....................................................................... 938
Optical ethernet module (OEM) .................................................. 938
Introduction............................................................................ 938
Functionality .......................................................................... 938
Design ................................................................................... 938
Technical data ....................................................................... 939
mA input module (MIM) .............................................................. 939
Introduction............................................................................ 939
Design ................................................................................... 939
Technical data ....................................................................... 941
GPS time synchronization module (GSM) .................................. 941
Introduction............................................................................ 941
Design ................................................................................... 941
Technical data ....................................................................... 944
GPS antenna .............................................................................. 944
Introduction............................................................................ 944
Design ................................................................................... 944
Technical data ....................................................................... 946
IRIG-B time synchronization module IRIG-B .............................. 947
Introduction............................................................................ 947
Design ................................................................................... 947
Technical data ....................................................................... 948
Dimensions ...................................................................................... 949
Case without rear cover.............................................................. 949
Case with rear cover................................................................... 950
Flush mounting dimensions ........................................................ 951
Side-by-side flush mounting dimensions .................................... 952
Wall mounting dimensions.......................................................... 954
External resistor unit for high impedance differential protection . 955
Mounting alternatives....................................................................... 956
Flush mounting ........................................................................... 956
Overview................................................................................ 956
Mounting procedure for flush mounting ................................. 957
19” panel rack mounting ............................................................. 958
Overview................................................................................ 958
Mounting procedure for 19” panel rack mounting.................. 959
Wall mounting ............................................................................. 959
Overview................................................................................ 959
Mounting procedure for wall mounting .................................. 960
How to reach the rear side of the IED ................................... 960
Side-by-side 19” rack mounting .................................................. 961
Overview................................................................................ 961
Mounting procedure for side-by-side rack mounting ............. 962
IED 670 mounted with a RHGS6 case .................................. 962
Side-by-side flush mounting ....................................................... 963
Contents
Overview................................................................................ 963
Mounting procedure for side-by-side flush mounting............. 964
Technical data ................................................................................. 965
Enclosure.................................................................................... 965
Connection system ..................................................................... 965
Influencing factors....................................................................... 966
Type tests according to standard................................................ 967
Chapter 19 Labels ........................................................................... 969
Different labels ................................................................................. 970
Chapter 20 Connection diagrams.................................................. 973
Chapter 21 Time inverse characteristics ...................................... 989
Application ....................................................................................... 990

Principle of operation ....................................................................... 994
Mode of operation....................................................................... 994
Inverse characteristics ................................................................... 1001
Chapter 22 Glossary ..................................................................... 1013
Glossary......................................................................................... 1014
About this chapter Chapter 1
Introduction
Chapter 1 Introduction
About this chapter

This chapter explains concepts and conventions used in this manual and provides information
necessary to understand the contents of the manual.
1
Introduction to the technical reference manual Chapter 1
Introduction
1 Introduction to the technical reference manual
1.1 About the complete set of manuals for an IED

The user’s manual (UM) is a complete set of five different manuals:
Application Technical Installation and Operator´s Engineering

manual reference commissioning manual guide
manual manual
en06000097.vsd
The Application Manual (AM) contains application descriptions, setting guidelines and setting
parameters sorted per function. The application manual should be used to find out when and for
what purpose a typical protection function could be used. The manual should also be used when
calculating settings.
The Technical Reference Manual (TRM) contains application and functionality descriptions
and it lists function blocks, logic diagrams, input and output signals, setting parameters and tech-
nical data sorted per function. The technical reference manual should be used as a technical ref-
erence during the engineering phase, installation and commissioning phase, and during normal
service.
The Installation and Commissioning Manual (ICM) contains instructions on how to install
and commission the protection IED. The manual can also be used as a reference during periodic
testing. The manual covers procedures for mechanical and electrical installation, energizing and
checking of external circuitry, setting and configuration as well as verifying settings and per-
forming directional tests. The chapters are organized in the chronological order (indicated by
chapter/section numbers) in which the protection IED should be installed and commissioned.
The Operator’s Manual (OM) contains instructions on how to operate the protection IED dur-
ing normal service once it has been commissioned. The operator’s manual can be used to find
out how to handle disturbances or how to view calculated and measured network data in order
to determine the cause of a fault.
The IED 670 Engineering guide (EG) contains instructions on how to engineer the IED 670
products. The manual guides to use the different tool components for IED 670 engineering. It
also guides how to handle the tool component available to read disturbance files from the IEDs
on the basis of the IEC 61850 definitions. The third part is an introduction about the diagnostic
tool components available for IED 670 products and the PCM 600 tool.
The IEC 61850 Station Engineering guide contains descriptions of IEC 61850 station engi-
neering and process signal routing. The manual presents the PCM 600 and CCT tool used for
station engineering. It describes the IEC 61850 attribute editor and how to set up projects and
communication.
2
Introduction
1.2 About the technical reference manual

The technical reference manual contains the following chapters:
• The chapter “Local human-machine interface” describes the control panel on the
IED. Display characteristics, control keys and various local human-machine in-
terface features are explained.
• The chapter “Basic IED functions” presents functions that are included in all
IEDs regardless of the type of protection they are designed for. These are func-
tions like Time synchronization, Self supervision with event list, Test mode and
other functions of a general nature.
• The chapter “Distance protection” describes the functions for distance zones
with their quadrilateral characteristics, phase selection with load encroachment,
power swing detection and similar.
• The chapter “Current protection” describes functions such as overcurrent pro-
tection, breaker failure protection and pole discordance.
• The chapter “Voltage protection” describes functions like undervoltage and ov-
ervoltage protection as well as residual overvoltage protection.
• The chapter “Frequency protection” describes functions for overfrequency, un-
derfrequency and rate of change of frequency.
• The chapter “Multipurpose protection” describes the general protection function
for current and voltage.
• The chapter “Secondary system supervision” includes descriptions of functions
like current based Current circuit supervision and Fuse failure supervision.
• The chapter “Control” describes the control functions. These are functions like
the Synchronization and energizing check as well as several others which are
product specific.
• The chapter “Scheme communication” describes among others functions related
to current reversal and weak end infeed logic.
• The chapter “Logic” describes trip logic and related functions.
• The chapter “Monitoring” describes measurement related functions used to pro-
vide data regarding relevant quantities, events, faults and the like.
• The chapter “Metering” describes primarily Pulse counter logic.
• The chapter “Station communication” describes Ethernet based communication
in general including the use of IEC61850, and horizontal communication via
GOOSE.
• The chapter “Remote communication” describes binary and analog signal trans-
fer, and the associated hardware.
• The chapter “Hardware” provides descriptions of the IED and its components.
• The chapter “Connection diagrams” provides terminal wiring diagrams and in-
formation regarding connections to and from the IED.
• The chapter “Time inverse characteristics” describes and explains inverse time
delay, inverse time curves and their effects.
• The chapter “Glossary” is a list of terms, acronyms and abbreviations used in
ABB technical documentation.
3
Introduction
1.3 Design of the Technical reference manual (TRM)

The description of each IED related function follows the same structure (where applicable). The
different sections are outlined below.
1.3.1 Introduction
Outlines the implementation of a particular protection function.
1.3.2 Principle of operation

Describes how the function works, presents a general background to algorithms and measure-
ment techniques. Logic diagrams are used to illustrate functionality.
Logic diagrams
Logic diagrams describe the signal logic inside the function block and are bordered by dashed
lines.
Signal names
Input and output logic signals consist of two groups of letters separated by two dashes. The first
group consists of up to four letters and presents the abbreviated name for the corresponding
function. The second group presents the functionality of the particular signal. According to this
explanation, the meaning of the signal BLKTR in figure 4 is as follows:
• BLKTR informs the user that the signal will BLOCK the TRIP command from
the under-voltage function, when its value is a logical one (1).
Input signals are always on the left hand side, and output signals on the right hand side. Settings
are not displayed.
Input and output signals

In a logic diagram, input and output signal paths are shown as a lines that touch the outer border
of the diagram.
Input and output signals can be configured using the CAP531 tool. They can be connected to the
inputs and outputs of other functions and to binary inputs and outputs. Examples of input signals
are BLKTR, BLOCK and VTSU. Examples output signals are TRIP, START, STL1, STL2,
STL3.
Setting parameters
Signals in frames with a shaded area on their right hand side represent setting parameter signals.
These parameters can only be set via the PST or LHMI. Their values are high (1) only when the
corresponding setting parameter is set to the symbolic value specified within the frame. Example
is the signal Block TUV=Yes. Their logical values correspond automatically to the selected set-
ting value.
Internal signals
Internal signals are illustrated graphically and end approximately. 2 mm from the frame edge. If
an internal signal path cannot be drawn with a continuous line, the suffix -int is added to the sig-
nal name to indicate where the signal starts and continues, see figure 3.
4
Introduction
BLKTR
TEST
TEST
&
Block TUV=Yes BLOCK-int.
>1
BLOCK
VTSU
BLOCK-int.
&
STUL1N
BLOCK-int.
& >1 & TRIP
t
STUL2N
BLOCK-int.
START
&
STUL3N
STL1
STL2
STL3
xx04000375.vsd
Figure 1: Logic diagram example with -int signals
External signals
Signal paths that extend beyond the logic diagram and continue in another diagram have the suf-
fix “-cont.”, see figure 2 and figure 3.
5
Introduction
STZMPP-cont.
>1
STCND
& STNDL1L2-cont.
1L1L2
STNDL2L3-cont.
&
1L2L3
& STNDL3L1-cont.
1L3L1
& STNDL1N-cont.
1L1N
& STNDL2N-cont.
1L2N
STNDL3N-cont.
&
1L3N
>1 STNDPE-cont.
>1
1--VTSZ 1--STND
>1 &
1--BLOCK
BLK-cont.
xx04000376.vsd
Figure 2: Logic diagram example with an outgoing -cont signal
6
Introduction
STNDL1N-cont.
>1
STNDL2N-cont. 15 ms
& t STL1
STNDL3N-cont.
STNDL1L2-cont. >1 15 ms
& t STL2
STNDL2L3-cont.
15 ms
STNDL3L1-cont. & t STL3
>1
15 ms
& t START
>1
BLK-cont.
xx04000377.vsd
Figure 3: Logic diagram example with an incoming -cont signal
1.3.3 Input and output signals

Input and output signals are presented in two separate tables. Each table consists of two columns.
The first column contains the name of the signal and the second column contains the description
of the signal.
1.3.4 Function block

Each function block is illustrated graphically.
Input signals are always on the left hand side, and output signals on the right hand side. Settings
are not displayed. Special kinds of settings are sometimes available. These are supposed to be
connected to constants in the configuration scheme, and are therefore depicted as inputs. Such
signals will be found in the signal list but described in the settings table.
7
Introduction
IEC 61850 - 8 -1
CAP531 Name Logical Node
Inputs TUV1-
PH2PUVM
U3P TRIP
BLOCK TR1
BLKTR1 TR1L1
BLKST1 TR1L2
BLKTR2 TR1L3
Outputs
BLKST2 TR2
TR2L1
TR2L2
TR2L3
START
ST1
ST1L1
ST1L2
ST1L3
ST2 Diagram
ST2L1 Number
ST2L2
ST2L3
en05000330.vsd
Figure 4: Example of a function block
1.3.5 Setting parameters

These are presented in tables and include all parameters associated with the function in question.
1.3.6 Technical data

The technical data section provides specific technical information about the function or hard-
ware described.
1.4 Intended audience

1.4.1 General
This manual addresses system engineers, installation and commissioning personnel, who use
technical data during engineering, installation and commissioning, and in normal service.
1.4.2 Requirements
The system engineer must have a thorough knowledge of protection systems, protection equip-
ment, protection functions and the configured functional logics in the protective devices. The
installation and commissioning personnel must have a basic knowledge in the handling electron-
ic equipment.
8
Introduction
1.5 Related documents
Documents related to REL 670 Identity number

Operator’s manual 1MRK 506 276-UEN
Installation and commissioning manual 1MRK 506 277-UEN
Technical reference manual 1MRK 506 275-UEN
Application manual 1MRK 506 278-UEN
Buyer’s guide 1MRK 506 280-BEN
Connection diagram, Single breaker arr. Three phase tripping arr. 1MRK 002 801-BA
Connection diagram, Single breaker arr. Single phase tripping arr. 1MRK 002 801-CA
Connection diagram, Multi breaker arr. Three phase tripping arr. 1MRK 002 801-DA
Connection diagram, Multi breaker arr. Single phase tripping arr. 1MRK 002 801-EA
Configuration diagram A, Single breaker with single or double busbar, 3 pole 1MRK 004 500-86
tripping (A31)
Configuration diagram B, Single breaker with single or double busbar, 1/3 pole 1MRK 004 500-87
tripping (A32)
Configuration diagram C, Multi breaker such as 1 1/2 or ring busbar arr. 3 pole 1MRK 004 500-88
tripping (B31)
Configuration diagram D, Multi breaker such as 1 1/2 or ring busbar arr. 1/3 1MRK 004 500-89
pole tripping (B32)
Setting example 1, 400 kV Long overhead power line with 1 1/2 CB arr. Quad- 1MRK 506 267-WEN
rilaterial characteristic.
Setting example 2, Setting example 1, 400 kV Long overhead power line with 1 1MRK 506 291-WEN
1/2 CB arr. Mho characteristic.
Setting example 3, 230 kV Extremely long overhead power line, double bus, 1MRK 506 268-WEN
single CB arr. Quadrilaterial characteristic.
Setting example 4, 230 kV Extremely long overhead power line, double bus, 1MRK 506 292-WEN
single CB arr. Mho characteristic.
Setting example 5, 132 kV Short overhead power line, double bus, single CB 1MRK 506 269-WEN
arr. Quadrilaterial characteristic.
Setting example 6, 132 kV Short overhead power line, double bus, single CB 1MRK 506 290-WEN
arr. Mho characteristic.
Setting example 7, 70 kV power line on a resonance earth system. Double bus, 1MRK 506 293-WEN
single breaker arrangement.
Setting example 8, 400 kV long series compensated line. 1 1/2 breaker 1MRK 506 294-WEN
arrangement.
Connection and Installation components 1MRK 013 003-BEN

Test system, COMBITEST 1MRK 512 001-BEN
Accessories for IED 670 1MRK 514 012-BEN
Getting started guide IED 670 1MRK 500 080-UEN
9
Introduction
SPA and LON signal list for IED 670, ver. 1.1 1MRK 500 083-WEN
IEC 61850 Data objects list for IED 670, ver. 1.1 1MRK 500 084-WEN
Generic IEC 61850 IED Connectivity package 1KHA001027-UEN
Protection and Control IED Manager PCM 600 Installation sheet 1MRS755552
Engineering guide IED 670 products 1MRK 511 179-UEN
Latest versions of the described documentation can be found on www.abb.com/substationautomation
1.6 Revision notes
Revision Description
- First release
10
Local human-machine interface
Chapter 2 Local
human-machine
interface
About this chapter

This chapter describes the structure and use of the Local human machine interface (LHMI) or in
other words, the control panel on the IED.
11
Human machine interface Chapter 2
1 Human machine interface

The local human machine interface is available in a small, and a medium sized model. The prin-
ciple difference between the two is the size of the LCD. The small size LCD can display seven
line of text and the medium size LCD can display the single line diagram with up to 15 objects
on each page.
Up to 12 SLD pages can be defined, depending on the product capability.
The local human machine interface is equipped with an LCD that can display the single line di-
agram with up to 15 objects.
The local human-machine interface is simple and easy to understand – the whole front plate is
divided into zones, each of them with a well-defined functionality:
• Status indication LEDs

• Alarm indication LEDs which consists of 15 LEDs (6 red and 9 yellow) with user
printable label. All LEDs are configurable from the PCM 600 tool
• Liquid crystal display (LCD)
• Keypad with push buttons for control and navigation purposes, switch for selec-
tion between local and remote control and reset
• An isolated RJ45 communication port
Figure 5: Small graphic HMI
12
Human machine interface Chapter 2
Figure 6: Medium graphic HMI, 15 controllable objects
13
Small size graphic HMI Chapter 2
2 Small size graphic HMI
2.1 Introduction
The small sized HMI is available for 1/2, 3/4 and 1/1 x 19” case. The LCD on the small HMI
measures 32 x 90 mm and displays 7 lines with up to 40 characters per line. The first line dis-
plays the product name and the last line displays date and time. The remaining 5 lines are dy-
namic. This LCD has no graphic display potential.
2.2 Design
The LHMI is identical for both the 1/2, 3/4 and 1/1 cases. The different parts of the small LHMI
is shown in figure 8
14
Small size graphic HMI Chapter 2
1 2 3
en05000055.eps
8 7
1 Status indication LEDs

2 LCD
3 Indication LEDs
4 Label
5 Local/Remote LEDs
6 RJ 45 port
7 Communication indication LED
8 Keypad
Figure 7: Small graphic HMI
15
Medium size graphic HMI Chapter 2
3 Medium size graphic HMI
3.1 Introduction
The 1/2, 3/4 and 1/1 x 19” cases can be equipped with the medium size LCD. This is a fully
graphical monochrome LCD which measures 120 x 90 mm. It has 28 lines with up to 40 char-
acters per line. To display the single line diagram, this LCD is required.
3.2 Design
The different parts of the medium size LHMI is shown in figure 9The LHMI, exists in an IEC
version and in an ANSI version. The difference is on the keypad operation buttons and the yel-
low LED designation.
16
Medium size graphic HMI Chapter 2
1 2 3
en05000056.eps
8 7
1 Status indication LEDs

2 LCD
3 Indication LEDs
4 Label
5 Local/Remote LEDs
6 RJ45 port
7 Communication indication LED
8 Keypad
Figure 8: Medium size graphic HMI
17
Keypad Chapter 2
4 Keypad
The keypad is used to monitor and operate the IED. The keypad has the same look and feel in
all IEDs in the IED 670 series. LCD screens and other details may differ but the way the keys
function is identical. The keypad is illustrated in figure 10.
Figure 9: The HMI keypad.
The keys used to operate the IED are described below in table 1.
Table 1: HMI keys on the front of the IED

Key Function
This key closes (energizes) a breaker or disconnector.
This key opens a breaker or disconnector.
The help key brings up two submenus. Key operation and IED information.
This key is used to clear entries, It cancels commands and edits.
Opens the main menu, and used to move to the default screen.
18
Keypad Chapter 2
Key Function
The Local/Remote key is used to set the IED in local or remote control mode.
This key opens the reset screen.
The E key starts editing mode and confirms setting changes when in editing mode.
The right arrow key navigates forward between screens and moves right in editing mode.
The left arrow key navigates backwards between screens and moves left in editing mode.
The up arrow key is used to move up in the single line diagram and in menu tree.
The down arrow key is used to move down in the single line diagram and in menu tree.
19
LED Chapter 2
5 LED
5.1 Introduction
The LED module is a unidirectional means of communicating. This means that events may occur
that activate a LED in order to draw the operators attention to something that has occurred and
needs some sort of action.
5.2 Status indication LEDs

There are three LEDs above the LCD. The information they communicate is described in the
table below.
LED Indication Information

Green:
Steady In service
Flashing Internal failure
Dark No power supply
Yellow:
Steady Dist. rep. triggered
Flashing Terminal in test mode
Red:
Steady Trip command issued
5.3 Indication LEDs

The LED indication module comprising 15 LEDs is standard in IED 670s. Its main purpose is
to present an immediate visual information for protection indications or alarm signals.
There are alarm indication LEDs and hardware associated LEDs on the right hand side of the
front panel. The alarm LEDs are found to the right of the LCD screen. They can show steady or
flashing light. Flashing would normally indicate an alarm. The alarm LEDs are configurable us-
ing the PCM 600 tool. This is because they are dependent on the binary input logic and can there-
fore not be configured locally on the HMI. Some typical alarm examples follow:
• Bay controller failure

• CB close blocked
• Interlocking bypassed
• SF6 Gas refill
• Position error
• CB spring charge alarm
• Oil temperature alarm
• Thermal overload trip
20
LED Chapter 2
The RJ45 port has a yellow LED indicating that communication has been established between
the IED and a computer.
The Local/Remote key on the front panel has two LEDs indicating whether local or remote con-
trol of the IED is active.
21
LHMI related functions Chapter 2
6 LHMI related functions
6.1 Introduction
The adaptation of the LHMI to the application and user preferences is made with:
• function block LHMI (LocalHMI)

• function block HLED (LEDMonitor)
• setting parameters
6.2 General setting parameters

Table 2: Basic general settings for the localHMI (LHM1-) function
Parameter Range Step Default Unit Description
Language English - English - Local HMI language
OptionalLanguage
DisplayTimeout 10 - 120 10 60 Min Local HMI display time-
out
AutoRepeat Off - On - Activation of auto-repeat
On (On) or not (Off)
ContrastLevel -10 - 20 1 0 % Contrast level for display
DefaultScreen 0-0 1 0 - Default screen
EvListSrtOrder Latest on top - Latest on top - Sort order of event list
Oldest on top
SymbolFont IEC - IEC - Symbol font for Single
ANSI Line Diagram
6.3 Status indication LEDs

6.3.1 Design
The function block LHMI (LocalHMI) controls and supplies information about the status of the
status indication LEDs. The input and output signals of LHMI are configured with the PCM 600
tool.
The function block can be used if any of the signals are required in a configuration logic.
See section 5.2 for information about the LEDs.
22
LHMI-
LocalHMI
CLRLEDS HMI-ON
RED-S
YELLOW-S
YELLOW-F
CLRPULSE
LEDSCLRD
en05000773.vsd
Figure 10: LHMI function block

Table 3: Input signals for the LocalHMI (LHMI-) function block
Signal Description
CLRLEDS Input to clear the LCD-HMI LEDs
Table 4: Output signals for the LocalHMI (LHMI-) function block

Signal Description
HMI-ON Backlight of the LCD display is active
RED-S Red LED on the LCD-HMI is steady
YELLOW-S Yellow LED on the LCD-HMI is steady
YELLOW-F Yellow LED on the LCD-HMI is flashing
CLRPULSE A pulse is provided when the LEDs on the LCD-HMI are cleared
LEDSCLRD Active when the LEDs on the LCD-HMI are not active
6.4 Indication LEDs

6.4.1 Introduction
The function block HLED (LEDMonitor) controls and supplies information about the status of
the indication LEDs. The input and output signals of HLED are configured with the PCM 600
tool. The input signal for each LED is selected individually with the PCM 600 Signal Matrix
Tool (SMT). LEDs (number 1–6) for trip indications are red and LEDs (number 7–15) for start
indications are yellow.
Each indication LED on the LHMI can be set individually to operate in six different sequences;
two as follow type and four as latch type. Two of the latching sequence types are intended to be
used as a protection indication system, either in collecting or restarting mode, with reset func-
tionality. The other two are intended to be used as signalling system in collecting (coll) mode
with an acknowledgment functionality. The light from the LEDs can be steady (-S) or flickering
(-F). For details, refer to Technical reference manual.
23
6.4.2 Design
The information on the LEDs is stored at loss of the auxiliary power to the IED in some of the
modes of the HLED. The latest LED picture appears immediately after the IED is successfully
restarted.
Operating modes
• Collecting mode
- LEDs which are used in collecting mode of operation are accumulated con-
tinuously until the unit is acknowledged manually. This mode is suitable
when the LEDs are used as a simplified alarm system.
• Re-starting mode
- In the re-starting mode of operation each new start resets all previous active
LEDs and activates only those which appear during one disturbance. Only
LEDs defined for re-starting mode with the latched sequence type 6 (Latche-
dReset-S) will initiate a reset and a restart at a new disturbance. A distur-
bance is defined to end a settable time after the reset of the activated input
signals or when the maximum time limit has elapsed.
Acknowledgment/reset
• From local HMI
- The active indications can be acknowledged/reset manually. Manual ac-
knowledgment and manual reset have the same meaning and is a common
signal for all the operating sequences and LEDs. The function is positive
edge triggered, not level triggered. The acknowledgment/reset is performed
via the Reset-button and menus on the LHMI. For details, refer to the “Op-
erators manual”.
• From function input

- The active indications can also be acknowledged/reset from an input, RE-
SET, to the function. This input can for example be configured to a binary
input operated from an external push button. The function is positive edge
triggered, not level triggered. This means that even if the button is continu-
ously pressed, the acknowledgment/reset only affects indications active at
the moment when the button is first pressed.
• Automatic reset
- The automatic reset can only be performed for indications defined for
re-starting mode with the latched sequence type 6 (LatchedReset-S). When
the automatic reset of the LEDs has been performed, still persisting indica-
tions will be indicated with a steady light.
Operating sequences
The sequences can be of type Follow or Latched. For the Follow type the LED follow the input
signal completely. For the Latched type each LED latches to the corresponding input signal until
it is reset.
24
The figures below show the function of available sequences selectable for each LED separately.
For sequence 1 and 2 (Follow type), the acknowledgment/reset function is not applicable. Se-
quence 3 and 4 (Latched type with acknowledgement) are only working in collecting mode. Se-
quence 5 is working according to Latched type and collecting mode while sequence 6 is working
according to Latched type and re-starting mode. The letters S and F in the sequence names have
the meaning S = Steady and F = Flash.
At the activation of the input signal, the indication operates according to the selected sequence
diagrams below.
In the sequence diagrams the LEDs have the characteristics shown in figure 12.
= No indication = Steady light = Flash
en05000506.vsd
Figure 11: Symbols used in the sequence diagrams
Sequence 1 (Follow-S)
This sequence follows all the time, with a steady light, the corresponding input signals. It does
not react on acknowledgment or reset. Every LED is independent of the other LEDs in its oper-
ation.
Activating
signal
LED
en01000228.vsd
Figure 12: Operating sequence 1 (Follow-S)
Sequence 2 (Follow-F)
This sequence is the same as sequence 1, Follow-S, but the LEDs are flashing instead of showing
steady light.
Sequence 3 (LatchedAck-F-S)
This sequence has a latched function and works in collecting mode. Every LED is independent
of the other LEDs in its operation. At the activation of the input signal, the indication starts flash-
ing. After acknowledgment the indication disappears if the signal is not present any more. If the
signal is still present after acknowledgment it gets a steady light.
25
Activating
signal
LED
Acknow.
en01000231.vsd
Figure 13: Operating sequence 3 (LatchedAck-F-S)
Sequence 4 (LatchedAck-S-F)
This sequence has the same functionality as sequence 3, but steady and flashing light have been
alternated.
Sequence 5 (LatchedColl-S)
This sequence has a latched function and works in collecting mode. At the activation of the input
signal, the indication will light up with a steady light. The difference to sequence 3 and 4 is that
indications that are still activated will not be affected by the reset i.e. immediately after the pos-
itive edge of the reset has been executed a new reading and storing of active signals is performed.
Every LED is independent of the other LEDs in its operation.
Activating
signal
LED
Reset
en01000235.vsd
Figure 14: Operating sequence 5 (LatchedColl-S)
Sequence 6 (LatchedReset-S)
In this mode all activated LEDs, which are set to sequence 6 (LatchedReset-S), are automatically
reset at a new disturbance when activating any input signal for other LEDs set to sequence 6
(LatchedReset-S). Also in this case indications that are still activated will not be affected by
manual reset, i.e. immediately after the positive edge of that the manual reset has been executed
a new reading and storing of active signals is performed. LEDs set for sequence 6 are completely
independent in its operation of LEDs set for other sequences.
26
Definition of a disturbance
A disturbance is defined to last from the first LED set as LatchedReset-S is activated until a set-
table time, tRestart, has elapsed after that all activating signals for the LEDs set as Latche-
dReset-S have reset. However if all activating signals have reset and some signal again becomes
active before tRestart has elapsed, the tRestart timer does not restart the timing sequence. A new
disturbance start will be issued first when all signals have reset after tRestart has elapsed. A di-
agram of this functionality is shown in figure 16.
From
disturbance
length control ≥1 New
per LED ≥1 disturbance
set to
sequence 6
tRestart
& t
&
≥1
≥1
&
en01000237.vsd
Figure 15: Activation of new disturbance
In order not to have a lock-up of the indications in the case of a persisting signal each LED is
provided with a timer, tMax, after which time the influence on the definition of a disturbance of
that specific LED is inhibited. This functionality is shown i diagram in figure 17.
Activating signal
To LED
To disturbance
AND
tMax length control
t
en05000507.vsd
Figure 16: Length control of activating signals
Timing diagram for sequence 6

Figure 18 shows the timing diagram for two indications within one disturbance.
27
Disturbance
t Restart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
en01000239.vsd
Figure 17: Operating sequence 6 (LatchedReset-S), two indications within same disturbance
Figure 19 shows the timing diagram for a new indication after tRestart time has elapsed.
28
Disturbance Disturbance
t Restart t Restart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
en01000240.vsd
Figure 18: Operating sequence 6 (LatchedReset-S), two different disturbances
Figure 20 shows the timing diagram when a new indication appears after the first one has reset
but before tRestart has elapsed.
29
Disturbance
t Restart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
en01000241.vsd
Figure 19: Operating sequence 6 (LatchedReset-S), two indications within same disturbance
but with reset of activating signal between
Figure 21 shows the timing diagram for manual reset.
30
Disturbance
t Restart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
en01000242.vsd
Figure 20: Operating sequence 6 (LatchedReset-S), manual reset
HLED-
LEDMonitor
BLOCK NEWIND
RESET ACK
LEDTEST
en05000508.vsd
Figure 21: HLED function block

Table 5: Input signals for the LEDMonitor (HLED-) function block
Signal Description
BLOCK Input to block the operation of the LED-unit
RESET Input to acknowledge/reset the indications of the LED-unit
LEDTEST Input for external LED test
31
Table 6: Output signals for the LEDMonitor (HLED-) function block

Signal Description
NEWIND A new signal on any of the indication inputs occurs
ACK A pulse is provided when the LEDs are acknowledged

Table 7: Basic general settings for the LEDMonitor (HLED-) function
Operation Off - Off - Operation mode for the
On LED function
tRestart 0.0 - 100.0 0.1 0.0 s Defines the disturbance
length
tMax 0.0 - 100.0 0.1 0.0 s Maximum time for the
definition of a distur-
bance
SeqTypeLED1 Follow-S - Follow-S - Sequence type for LED 1
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
32

Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
SeqTypeLED8 Follow-S - Follow-S - sequence type for LED 8
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
SeqTypeLED10 Follow-S - Follow-S - Sequence type for LED
Follow-F 10
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
33

Follow-F 11
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F 12
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F 13
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F 14
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F 15
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
34
Basic IED functions
Chapter 3 Basic IED functions
About this chapter

This chapter presents functions that are basic to all REx670 IEDs. Typical functions in this cat-
egory are time synchronization, self supervision and test mode.
35
Analog inputs Chapter 3
Basic IED functions
1 Analog inputs
1.1 Introduction
In order to get correct measurement results as well as correct protection operations the analog
input channels must be configured and properly set. For power measuring and all directional and
differential functions the directions of the input currents must be properly defined. The measur-
ing and protection algorithms in IED 670 are using primary system quantities and the set values
are done in primary quantities as well. Therefore it is extremely important to properly set the
data about the connected current and voltage transformers.
In order to make Service Values reading easier it is possible to define a reference PhaseAn-
gleRef. Then this analog channels phase angle will be always fixed to zero degree and all other
angle information will be shown in relation to this analog input. During testing and commission-
ing of the IED the reference channel can be freely change in order to facilitate testing and service
values reading.
Note!
VT inputs are sometimes not available depending on ordered type of Transformer Input Module
(TRM).
1.2 Principle of operation

The direction of a current to the IED is depending on the connection of the CT. The main CTs
are typically star connected and can be connected with the star point to the object or from the
object. This information must be set to the IED. The convention of the directionality is defined
as follows: A positive value of current, power etc. means that the quantity has the direction into
the object and a negative value means direction out from the object. For directional functions the
direction into the object is defined as Forward and the direction out from the object is defined as
Reverse, see figure 23
36
Basic IED functions
Definition of direction Definition of direction

for directional functions for directional functions
Reverse Forward Forward Reverse
Protected Object
Line, transformer, etc
e.g. P, Q, I e.g. P, Q, I
Measured quantity is Measured quantity is
positive when flowing positive when flowing
towards the object towards the object
Set parameter Set parameter

CTStarPoint CTStarPoint
Correct Setting is Correct Setting is
"ToObject" "FromObject"
en05000456.vsd
Figure 22: Internal convention of the directionality in IED 670
With correct setting of the primary CT direction, CTStarPoint set to FromObject or ToObject, a
positive quantities always flowing towards the object and a direction defined as Forward always
is looking towards the object. To be able to use primary system quantities for settings and cal-
culation in the IED the ratios of the main CTs and VTs must be known. This information is given
to the IED by setting of the rated secondary and primary currents and voltages of the CTs and
VTs.
The CT and VT ratio and the name on respective channel is done under General settings/Analog
module in the parameter settings tool PST.
1.3 Function block

Dependent on ordered IED 670 type.
TB40-
ANALOGIN6I
ERROR
CH1
NAMECH1
CH2
NAMECH2
CH3
NAMECH3
CH4
NAMECH4
CH5
NAMECH5
CH6
NAMECH6
en05000712.vsd
37
Basic IED functions
TC40-
ANALOGIN9I3U
ERROR
NAMECH1
CH1
CH2
NAMECH2
NAMECH3
CH3
CH4
NAMECH4
NAMECH5
CH5
CH6
NAMECH6
NAMECH7
CH7
CH8
NAMECH8
NAMECH9
CH9
CH10
NAMECH10
NAMECH11
CH11
CH12
NAMECH12
en05000713.vsd
TD40-
ANALOGIN6I6U
ERROR
NAMECH1
CH1
CH2
NAMECH2
NAMECH3
CH3
CH4
NAMECH4
NAMECH5
CH5
CH6
NAMECH6
NAMECH7
CH7
CH8
NAMECH8
NAMECH9
CH9
CH10
NAMECH10
NAMECH11
CH11
CH12
NAMECH12
en05000714.vsd
1.4 Output signals

38
Basic IED functions
Table 8: Output signals for the ANALOGIN12I (TA40-) function block

Signal Description
ERROR Analogue input module status
CH1 Analogue input 1
Table 9: Output signals for the ANALOGIN9I3U (TC40-) function block

Signal Description
39
Basic IED functions
Table 10: Output signals for the ANALOGIN6I6U (TD40-) function block
Signal Description
1.5 Setting parameters

Table 11: General settings for the AISERVAL (AISV-) function

PhaseAngleRef 1 - 24 1 1 Ch Reference channel for
phase angle presentation
Table 12: Basic general settings for the ANALOGIN12I (TA40-) function
CTStarPoint1 FromObject - ToObject - ToObject= towards pro-
ToObject tected object, FromOb-
ject= the opposite
CTsec1 1 - 10 1 1 A Rated CT secondary cur-
rent
CTprim1 1 - 99999 1 3000 A Rated CT primary current
ject= the opposite
rent
ject= the opposite
40
Basic IED functions

rent
ject= the opposite
rent
ject= the opposite
rent
ject= the opposite
rent
ject= the opposite
rent
ject= the opposite
rent
ject= the opposite
rent
ject= the opposite
rent
41
Basic IED functions

ject= the opposite
rent
ject= the opposite
rent
Table 13: Basic general settings for the ANALOGIN9I3U (TC40-) function
ject= the opposite
rent
ject= the opposite
rent
ject= the opposite
rent
ject= the opposite
rent
ject= the opposite
rent
42
Basic IED functions

ject= the opposite
rent
ject= the opposite
rent
ject= the opposite
rent
ject= the opposite
rent
VTsec10 0.001 - 999.999 0.001 110.000 V Rated VT secondary volt-
age
VTprim10 0.05 - 2000.00 0.05 400.00 kV Rated VT primary voltage
age
age
43
Basic IED functions
Table 14: Basic general settings for the ANALOGIN6I6U (TD40-) function
ject= the opposite
rent
ject= the opposite
rent
ject= the opposite
rent
ject= the opposite
rent
ject= the opposite
rent
ject= the opposite
rent
age
age
age
44
Basic IED functions

age
age
age
45
Authorization Chapter 3
Basic IED functions
2 Authorization
To safeguard the interests of our customers, both the IED 670 and the tools that are accessing
the IED 670 are protected, subject of authorization handling. The concept of authorization, as it
is implemented in the IED 670 and the associated tools is based on the following facts:
• There are two types of points of access to the IED 670:

- local, through the local HMI
- remote, through the communication ports
• There are different levels (or types) of users that can access or operate different
areas of the IED and tools functionality; the pre-defined user types are defined as
follows:
User type Access rights

Guest Read only
SuperUser Full access
SPAGuest Read only + control
SystemOperator Control from LHMI, no bypass
ProtectionEngineer All settings
DesignEngineer Application configuration (including SMT, GDE and CMT)
UserAdministrator User and password administration for the IED
The IED users can be created, deleted and edited only with the User Management Tool (UMT)
within PCM 600. The user can only LogOn or LogOff on the LHMI of the IED, there are no
users, groups or functions that can be defined on the IED LHMI.
2.1 Authorization handling in the tool

Upon the creation of an IED in the Plant Structure, the User Management Tool is immediately
accessible, by right – clicking with the mouse on that specific IED name:
46
Basic IED functions
Figure 23: Right-clicking to get the User Management Tool – “IED Users”.
By left-clicking on the “IED Users” submenu, the tool will open in the right-side panel:
47
Basic IED functions
Figure 24: User Manager Tool opened in the right-side panel.
By default, the IEDs are delivered so that users are not required to log on to operate the IED.
The default user is the SuperUser. Before doing any changes to the User Management in the IED
it is recommendable that the administrator uploads the Users and Groups existent in the IED.
If situation requires so, one can restore the factory settings, overwriting all existing settings in
the User Management Tool database.
Note!
Even if the administrator empties the tool database, the users previously defined are still in the
IED. They cannot be erased by downloading the empty list into the IED (the tool won’t down-
load an empty list), so it is strongly recommended that before you create any user you create
one that belongs to the SuperUser group.
If the administrator marks the check box “User must logon to this IED”, then the fields under
the “User Management” tab are becoming accessible and one can add, delete and edit users.
To add a new user, the administrator will press the button that is marked with a black arrow, see
figure 26 on the “User” subtab:
48
Basic IED functions
Figure 25: User subtab and creation of a new user.
Upon pressing this button, a window will appear, enabling the administrator to enter details
about the user, assign an access password and (after pressing “Next” and advancing to the next
window) assign the user to a group:
Figure 26: Enter details about the user.
49
Basic IED functions
Figure 27: Assign the user to a group.
Once the new user is created, it will appear in the list of users. Once in the list, there are several
operations that can be performed on the users, shown in figure 29
No. Description
1 Delete selected user
2 Change password
3 Add another group to the user permissions
Figure 28: Operations on users in the users list.
50
Basic IED functions
The “Group” subtab is displaying all the pre-defined groups and gives short details of the per-
missions allowed to the members of a particular group:
Figure 29: The “Groups” subtab.
It also allows the administrator to add another (already created) user to a group, in the same way
it could assign one more group to an user, on the “Users” subtab.
The “Functions” subtab is a descriptional area, showing in detail what Read/Write permissions
has each user group, in respect to various tools and components.
Finally, after the desired users are created and permissions assigned to them by means of user
groups, the whole list must be downloaded in the IED, in the same way as from the other tools:
51
Basic IED functions
No. Description
1 Upload from IED
2 Download to IED
2.2 Authorization handling in the IED

At delivery the default user is the superuser. No LogOn is required to operate the IED until a
user has been created with the UMT(User Management Tool). See Application manual for more
details.
Once a user is created and downloaded into the IED, that user can perform a LogOn, introducing
the password assigned in the tool.
If there is no user created, an attempt to log on will cause the display to show a message box
saying: “No user defined!”
If one user leaves the IED without logging off, then after the timeout (set in Settings\General
Settings\HMI\Screen\ Display Timeout ) elapses, the IED will return to a Guest state, when only
reading is possible. The display time out is set to 60 minutes at delivery.
If there are one or more users created with the UMT and downloaded into the IED, then, when
a user intentionally attempts a LogOn or when the user attempts to perform an operation that is
password protected, the LogOn window will appear
The cursor is focused on the “User identity” field, so upon pressing the “E” key, one can change
the user name, by browsing the list of users, with the “up” and “down” arrows. After choosing
the right user name, the user must press the “E” key again. When it comes to password, upon
pressing the “E” key, the following character will show up: “$”. The user must scroll for every
letter in the pasword. After all the letters are introduced (passwords are case sensitive!) choose
OK and press “E” key again.
If everything is O.K. at a voluntary LogOn the LHMI returns to the Authorization screen. If the
LogOn is OK, when required to change for example a password protected setting, the LHMI re-
turns to the actual setting folder. If the LogOn has failed, then the LogOn window will pop-up
again, until either the user makes it right or presses “Cancel”.
52
Self supervision with internal event list Chapter 3
Basic IED functions
3 Self supervision with internal event list
3.1 Introduction
The self-supervision function listens and reacts to internal system events, generated by the dif-
ferent built-in self-supervision elements. The internal events are saved in an internal event list.

The self-supervision operates continuously and includes:
• Normal micro-processor watchdog function.

• Checking of digitized measuring signals.
• Other alarms, for example hardware and time synchronization.
The self-supervision status can be monitored from the local HMI or a SMS/SCS system.
Under the Diagnostics menu in the local HMI the present information from the self-supervision
function can be reviewed. The information can be found under Diagnostics\Internal Events or
Diagnostics\IED Status\General. Refer to the “Installation and Commissioning manual” for a
detailed list of supervision signals that can be generated and displayed in the local HMI.
A self-supervision summary can be obtained by means of the potential free alarm contact (IN-
TERNAL FAIL) located on the power supply module. The function of this output relay is an
OR-function between the INT-FAIL signal see figure 32 and a couple of more severe faults that
can occur in the IED, see figure 31
Figure 30: Hardware self-supervision, potential-free alarm contact.
53
Basic IED functions
Figure 31: Software self-supervision, IES (IntErrorSign) function block.
Some signals are available from the IES (IntErrorSign) function block. The signals from this
function block are sent as events to the station level of the control system. The signals from the
IES function block can also be connected to binary outputs for signalization via output relays or
they can be used as conditions for other functions if required/desired.
Individual error signals from I/O modules can be obtained from respective module in the Signal
Matrix Tool. Error signals from time synchronization can be obtained from the time synchroni-
zation block TIME.
3.2.1 Internal signals

Self supervision provides several status signals, that tells about the condition of the IED. As they
provide information about the internal life of the IED, they are also called internal signals. The
internal signals can be divided into two groups. One group handles signals that are always
present in the IED; standard signals. Another group handles signals that are collected depending
on the hardware configuration. The standard signals are listed in table 15. The hardware depen-
dent internal signals are listed in table 16. Explanations of internal signals are listed in table 17.
54
Basic IED functions
Table 15: Self-supervision's standard internal signals

Name of signal Description
FAIL Internal Fail status
WARNING Internal Warning status
NUMFAIL CPU module Fail status
NUMWARNING CPU module Warning status
RTCERROR Real Time Clock status
TIMESYNCHERROR Time Synchronization status
RTEERROR Runtime Execution Error status
IEC61850ERROR IEC 61850 Error status
WATCHDOG SW Watchdog Error status
LMDERROR LON/Mip Device Error status
APPERROR Runtime Application Error status
SETCHGD Settings changed
SETGRPCHGD Setting groups changed
FTFERROR Fault Tolerant Filesystem status
Table 16: Self-supervision's HW dependent internal signals

Card Name of signal Description
ADxx ADxx Analog In Module Error status
BIM BIM-Error Binary In Module Error status
BOM BOM-Error Binary Out Module Error status
IOM IOM-Error In/Out Module Error status
MIM MIM-Error Millampere Input Module Error status
LDCM LDCM-Error Line Differential Communication Error status
55
Basic IED functions
Table 17: Explanations of internal signals

Name of signal Reasons for activation
FAIL This signal will be active if one or more of the following internal sig-
nals are active; INT--NUMFAIL, INT--LMDERROR, INT--WATCH-
DOG, INT--APPERROR, INT--RTEERROR, INT--FTFERROR, or any
of the HW dependent signals
WARNING This signal will be active if one or more of the following internal sig-
nals are active; INT--RTCERROR, INT--IEC61850ERROR,
INT--TIMESYNCHERROR
NUMFAIL This signal will be active if one or more of the following internal sig-
nals are active; INT--WATCHDOG, INT--APPERROR, INT--RTEER-
ROR, INT--FTFERROR
NUMWARNING This signal will be active if one or more of the following internal sig-
nals are active; INT--RTCERROR, INT--IEC61850ERROR
RTCERROR This signal will be active when there is a hardware error with the real
time clock.
TIMESYNCHERROR This signal will be active when the source of the time synchronization
is lost, or when the time system has to make a time reset.
RTEERROR This signal will be active if the Runtime Engine failed to do some
actions with the application threads. The actions can be loading of
settings or parameters for components, changing of setting groups,
loading or unloading of application threads.
IEC61850ERROR This signal will be active if the IEC61850 stack did not succeed in
some actions like reading IEC61850 configuration, startup etc.
WATCHDOG This signal will be activated when the terminal has been under too
heavy load for at least 5 minutes. The operating systems background
task is used for the measurements.
LMDERROR LON network interface, MIP/DPS, is in an unrecoverable error state.
APPERROR This signal will be active if one or more of the application threads are
not in the state that Runtime Engine expects. The states can be
CREATED, INITIALIZED, RUNNING, etc.
SETCHGD This signal will generate an Internal Event to the Internal Event list if
any settings are changed.
SETGRPCHGD This signal will generate an Internal Event to the Internal Event list if
any setting groups are changed.
FTFERROR This signal will be active if both the working file and the backup file
are corrupted and can not be recovered.
3.2.2 Run-time model

The analog signals to the A/D converter is internally distributed into two different converters,
one with low amplification and one with high amplification, see figure 33.
56
Basic IED functions
Figure 32: Simplified drawing of A/D converter for the 600 platform.
The technique to split the analog input signal into two A/D converters with different amplifica-
tion makes it possible to supervise the incoming signals under normal conditions where the sig-
nals from the two converters should be identical. An alarm is given if the signals are out of the
boundaries. Another benefit is that it improves the dynamic performance of the A/D conversion.
The self-supervision of the A/D conversion is controlled by the ADx_Controller function. One
of the tasks for the controller is to perform a validation of the input signals. This is done in a
validation filter which has mainly two objects: First is the validation part, i.e. checks that the
A/D conversion seems to work as expected. Secondly, the filter chooses which of the two signals
that shall be sent to the CPU, i.e. the signal that has the most suitable level, the ADx_LO or the
16 times higherADx_HI.
When the signal is within measurable limits on both channels, a direct comparison of the two
channels can be performed. If the validation fails, the CPU will be informed and an alarm will
be given.
The ADx_Controller also supervise other parts of the A/D converter.
57
Basic IED functions
3.3 Function block
IS---
InternalSignal
FAIL
WARNING
CPUFAIL
CPUWARN
TSYNCERR
RTCERR
en04000392.vsd
Figure 33: IS function block
3.4 Output signals

Table 18: Output signals for the InternalSignal (IS---) function block
Signal Description
FAIL Internal fail
WARNING Internal warning
CPUFAIL CPU fail
CPUWARN CPU warning
TSYNCERR Time synchronization status
RTCERR Real time clock status

The function does not have any parameters available in Local HMI or Protection and Control
IED Manager (PCM 600)
3.6 Technical data

Table 19: Self supervision with internal event list
Data Value
Recording manner Continuous, event controlled
List size 1000 events, first in-first out
58
Time synchronization Chapter 3
Basic IED functions
4 Time synchronization
4.1 Introduction
Use the time synchronization source selector to select a common source of absolute time for the
IED when it is a part of a protection system. This makes comparison of events and disturbance
data between all IEDs in a SA system possible.

4.2.1 General concepts
Time definitions
The error of a clock is the difference between the actual time of the clock, and the time the clock
is intended to have. The rate accuracy of a clock is normally called the clock accuracy and means
how much the error increases, i.e. how much the clock gains or loses time. A disciplined clock
is a clock that “knows” its own faults and tries to compensate for them, i.e. a trained clock.
Synchronization principle
From a general point of view synchronization can be seen as a hierarchical structure. A module
is synchronized from a higher level and provides synchronization to lower levels.
Syncronization from
a higher level
Module
Optional syncronization of
modules at a lower level
en05000206.vsd
Figure 34: Synchronization principle
A module is said to be synchronized when it periodically receives synchronization messages

from a higher level. As the level decreases, the accuracy of the synchronization decreases as
well. A module can have several potential sources of synchronization, with different maximum
errors, which gives the module the possibility to choose the source with the best quality, and to
adjust its internal clock after this source. The maximum error of a clock can be defined as a func-
tion of:
• The maximum error of the last used synchronization message
59
Basic IED functions
• The time since the last used synchronization message

• The rate accuracy of the internal clock in the module.
4.2.2 Real Time Clock (RTC) operation

The IED has a built-in Real Time Clock (RTC) with a resolution of one nanosecond. The clock
has a built-in calendar that handles leap years through 2098.
RTC at power off

During power off, the time in the IED time is kept by a capacitor backed RTC that will provide
35 ppm accuracy for 5 days. This means that if the power is off, the time in the IED may drift
with 3 seconds per day, during 5 days, and after this time the time will be lost completely.
RTC at startup
At IED startup, the internal time is free running. If the RTC is still alive since the last up time,
the time in the IED will be quite accurate (may drift 35 ppm), but if the RTC power has been
lost during power off (will happen after 5 days), the IED time will start at 1970-01-01. For more
information, please refer to section "Time synchronization startup procedure" and section "Ex-
ample, binary synchronization".
Time synchronization startup procedure

The first message that contains full time (as for instance LON, SNTP, GPS etc.) will give an ac-
curate time to the IED. The IED is brought into a safe state and the time is thereafter set to the
correct value. After the initial setting of the clock, one of three things will happen with each of
the coming synchronization messages, configured as “fine”:
• If the synchronization message, that is similar to the other messages from its or-
igin has an offset compared to the internal time in the IED, the message is used
directly for synchronization, that is for adjusting the internal clock to obtain zero
offset at the next coming time message.
• If the synchronization message has an offset that is large compared to the other
messages, a “spike-filter” in the IED will remove this time-message.
• If the synchronization message has an offset that is large, and the following mes-
sage also has a large offset, the spike filter will not act and the offset in the syn-
chronization message will be compared to a threshold that defaults to 100
milliseconds. If the offset is more than the threshold, the IED is brought into a
safe state and the clock is thereafter set to the correct time. If the offset is lower
than the threshold, the clock will be adjusted with 1000 ppm until the offset is
removed. With an adjustment of 1000 ppm, it will take 100 seconds or 1.7 min-
utes to remove an offset of 100 milliseconds.
Synchronization messages configured as coarse will only be used for initial setting of the time.
After this has been done, the messages are checked against the internal time and only an offset
of more than 10 seconds will reset the time.
Rate accuracy
In the REx670 IED, the rate accuracy at cold start is about 100 ppm, but if the IED is synchro-
nized for a while, the rate accuracy will be approximately 1 ppm if the surrounding temperature
is constant. Normally it will take 20 minutes to reach full accuracy.
60
Basic IED functions
Time-out on synchronization sources

All synchronization interfaces has a time-out, and a configured interface must receive time-mes-
sages regularly, in order not to give a TSYNCERR. Normally, the time-out is set so that one
message can be lost without getting a TSYNCERR, but if more than one message is lost, a
TSYNCERR will be given.
4.2.3 Synchronization alternatives

Three main alternatives of external time synchronization are available. Either the synchroniza-
tion message is applied via any of the communication ports of the IED as a telegram message
including date and time or as a minute pulse, connected to a binary input, or via GPS. The minute
pulse is used to fine tune already existing time in the IEDs.
Synchronization via SNTP

SNTP provides a “Ping-Pong” method of synchronization. A message is sent from an IED to an
SNTP-server, and the SNTP-server returns the message after filling in a reception time and a
transmission time. SNTP operates via the normal Ethernet network that connects IEDs together
in an IEC61850 network. For SNTP to operate properly, there must be a SNTP-server present,
preferably in the same station. The SNTP synchronization provides an accuracy that will give 1
ms accuracy for binary inputs. The IED itself can be set as a SNTP-time server.
Synchronization via Serial Communication Module (SLM)

On the serial buses (both LON and SPA) two types of synchronization messages are sent.
• Coarse message is sent every minute and comprises complete date and time, i.e.
year, month, day, hours, minutes, seconds and milliseconds.
• Fine message is sent every second and comprises only seconds and milliseconds.
IEC60870-5-103 is not used to synchronize the relay, but instead the offset between the local
time in the relay and the time received from 103 is added to all times (in events and so on) sent
via 103. In this way the relay acts as it is synchronized from various 103 sessions at the same
time. Actually, there is a “local” time for each 103 session.
The SLM module is located on the AD conversion Module (ADM).
Synchronization via Built-in-GPS

The built in GPS clock modules receives and decodes time information from the global position-
ing system. The modules are located on the GPS time synchronization Module (GSM).
Synchronization via binary input

The IED accepts minute pulses to a binary input. These minute pulses can be generated from e.g.
station master clock. If the station master clock is not synchronized from a world wide source,
time will be a relative time valid for the substation. Both positive and negative edge on the signal
can be accepted. This signal is also considered as a fine signal.
The minute pulse is connected to any channel on any Binary Input Module in the IED. The elec-
trical characteristic is thereby the same as for any other binary input.
If the objective of synchronization is to achieve a relative time within the substation and if no
station master clock with minute pulse output is available, a simple minute pulse generator can
be designed and used for synchronization of the IEDs. The minute pulse generator can be created
using the logical elements and timers available in the IED.
61
Basic IED functions
The definition of a minute pulse is that it occurs one minute after the last pulse. As only the
flanks are detected, the flank of the minute pulse shall occur one minute after the last flank.
Binary minute pulses are checked with reference to frequency.
Pulse data:
• Period time (a) should be 60 seconds.

• Pulse length (b):
- Minimum pulse length should be >50 ms.
- Maximum pulse length is optional.
• Amplitude (c) - please refer to section 2.9 "Binary input module (BIM)".
Deviations in the period time larger than 50 ms will cause TSYNCERR.
en05000251.vsd
Figure 35: Binary minute pulses
The default time-out-time for a minute pulse is two minutes, and if no valid minute pulse is re-
ceived within two minutes a SYNCERR will be given.
If contact bounces occurs, only the first pulse will be detected as a minute pulse. The next minute
pulse will be registered first 60 s - 50 ms after the last contact bounce.
If the minute pulses are perfect, e.g. it is exactly 60 seconds between the pulses, contact bounces
might occur 49 ms after the actual minute pulse without effecting the system. If contact bounces
occurs more than 50 ms, e.g. it is less than 59950 ms between the two most adjacent positive (or
negative) flanks, the minute pulse will not be accepted.
Example, binary synchronization

A IED is configured to use only binary input, and a valid binary input is applied to a binary input
card. The HMI is used to tell the IED the approximate time and the minute pulse is used to syn-
chronize the IED thereafter. The definition of a minute pulse is that it occurs one minute after
the previous minute pulse, so the first minute pulse is not used at all. The second minute pulse
will probably be rejected due to the spike filter. The third pulse will give the IED a good time
and will reset the time so that the fourth minute pulse will occur on a minute border. After the
first three minutes, the time in the IED will be good if the coarse time is set properly via the HMI
62
Basic IED functions
or the RTC backup still keeps the time since last up-time. If the minute pulse is removed for in-
stance for an hour, the internal time will drift by maximum the error rate in the internal clock. If
the minute pulse is returned, the first pulse automatically is rejected. The second pulse will pos-
sibly be rejected due to the spike filter. The third pulse will either synchronize the time, if the
time offset is more than 100 ms, or adjust the time, if the time offset is small enough. If the time
is set, the application will be brought to a safe state before the time is set. If the time is adjusted,
the time will reach its destination within 1.7 minutes.
Synchronization via IRIG

Synchronization with DNP3.0
The DNP3.0 communication can be ? to be the source of the Course time synchronisation. The
fine synch source must be another when high accuracy time working is required.
The IRIG interface to the IED supplies two possible synchronization methods, IRIG-B and PPS.
IRIG-B
IRIG-B is a protocol used only for time synchronization. A clock can provide local time of the
year in this format. The “B” in IRIG-B states that 100 bits per second are transmitted, and the
message is sent every second. After IRIG-B there is a number of figures stating if and how the
signal is modulated and the information transmitted.
To receive IRIG-B there are two connectors in the IRIG module, one galvanic BNC connector
and one optical ST connector. IRIG-B 12x messages can be supplied via the galvanic interface,
and IRIG-B 00x messages can be supplied via either the galvanic interface or the optical inter-
face, where x (in 00x or 12x) means a figure in the range 1-7.
“00” means that a base band is used, and the information can be fed into the IRIG-B module via
the BNC contact or an optical fiber. “12” means that a 1 kHz modulation is used. In this case the
information must go into the module via the BNC connector.
If the x in 00x or 12x is 4, 5, 6 or 7, the time message from IRIG-B contains information of the
year. If x is 0, 1, 2 or 3, the information only contains the time within the year, and year infor-
mation has to come from the tool or HMI.
The IRIG Module also takes care of IEEE1344 messages that are sent by many IRIG-B clocks,
as IRIG-B previously did not have any year information. IEE1344 is compatible with IRIG-B
and contains year information and information of time-zone.
It is recommended to use IEEE 1344 for supplying time information to the IRIG module. In this
case, also send the local time in the messages, as this local time plus the TZ Offset supplied in
the message equals UTC at all times.
PPS
An optical PPS signal can be supplied to the optical interface of the IRIG module.
The PPS signal is a transition from dark to light, that occurs 1 second +- 2 us after another PPS
signal. The allowed jitter of 2 us is settable.
63
Basic IED functions
4.3 Function block
TIME-
TIME
TSYNCERR
RTCERR
en05000425.vsd
Figure 36: TIME function block
4.4 Output signals

Table 20: Output signals for the TIME (TIME-) function block
Signal Description
TSYNCERR Time synchronization error
RTCERR Real time clock error

Path in local HMI: Setting/Time
Path in PCM 600: Settings/Time/Synchronization
Table 21: Basic general settings for the TimeSynch (TSYN-) function
CoarseSyncSrc Off - Off - Coarse time synchroniza-
SPA tion source
LON
SNTP
DNP
FineSyncSource Off - Off - Fine time synchronization
SPA source
LON
BIN
GPS
GPS+SPA
GPS+LON
GPS+BIN
SNTP
GPS+SNTP
IRIG-B
GPS+IRIG-B
PPS
SyncMaster Off - Off - Activate IEDas synchro-
SNTP-Server nization master
64
Basic IED functions
Table 22: General settings for the TimeSynchBIN (TBIN-) function

ModulePosition 3 - 16 1 3 - Hardware position of IO
module for time synchro-
nization
BinaryInput 1 - 16 1 1 - Binary input number for
time synchronization
BinDetection PositiveEdge - PositiveEdge - Positive or negative edge
NegativeEdge detection
Table 23: General settings for the TimeSynchSNTP (TSNT-) function

ServerIP-Add 0 - 18 1 0.0.0.0 - Server IP-address
RedServIP-Add 0 - 18 1 0.0.0.0 - Redundant server
IP-address
Table 24: General settings for the DaySumDSTBegin (TSTB-) function

MonthInYear January - March - Month in year when day-
February light time starts
March
April
May
June
July
August
September
October
November
December
DayInWeek Sunday - Sunday - Day in week when day-
Monday light time starts
Tuesday
Wednesday
Thursday
Friday
Saturday
WeekInMonth Last - Last - Week in month when
First daylight time starts
Second
Third
Fourth
UTCTimeOfDay 0 - 86400 1 3600 s UTC Time of day in sec-
onds when daylight time
starts
65
Basic IED functions
Table 25: General settings for the DaySumTimeEnd (TSTE-) function

MonthInYear January - October - Month in year when day-
February light time ends
March
April
May
June
July
August
September
October
November
December
DayInWeek Sunday - Sunday - Day in week when day-
Monday light time ends
Tuesday
Wednesday
Thursday
Friday
Saturday
WeekInMonth Last - Last - Week in month when
First daylight time ends
Second
Third
Fourth
UTCTimeOfDay 0 - 86400 1 3600 s UTC Time of day in sec-
onds when daylight time
ends
Table 26: General settings for the TimeZone (TZON-) function

NoHalfHourUTC -24 - 24 1 0 - Number of half-hours
from UTC
66
Basic IED functions
Table 27: Basic general settings for the TimeSynchIRIGB (TIRI-) function
SynchType BNC - Opto - Type of synchronization
Opto
TimeDomain LocalTime - LocalTime - Time domain
UTC
Encoding IRIG-B - IRIG-B - Type of encoding
1344
1344TZ
TimeZoneAs1344 MinusTZ - PlusTZ - Time zone as in 1344
PlusTZ standard
4.6 Technical data

Table 28: Time synchronization, time tagging
Function Value
Time tagging resolution, Events and Sampled Mea- 1 ms
surement Values
Time tagging error with synchronization once/min ± 1.0 ms typically
(minute pulse synchronization), Events and Sam-
pled Measurement Values
Time tagging error with SNTP synchronization, ± 1.0 ms typically
Sampled Measurement Values
67
Parameter setting groups Chapter 3
Basic IED functions
5 Parameter setting groups
5.1 Introduction
Use the six sets of settings to optimize IED operation for different system conditions. By creat-
ing and switching between fine tuned setting sets, either from the human-machine interface or
configurable binary inputs, results in a highly adaptable IED that can cope with a variety of sys-
tem scenarios.

The ACGR function block has six functional inputs, each corresponding to one of the setting
groups stored in the IED. Activation of any of these inputs changes the active setting group. Sev-
en functional output signals are available for configuration purposes, so that up to date informa-
tion on the active setting group is always available.
A setting group is selected by using the local HMI, from a front connected personal computer,
remotely from the station control or station monitoring system or by activating the correspond-
ing input to the ACGR function block.
Each input of the function block can be configured to connect to any of the binary inputs in the
IED. To do this the PCM 600 configuration tool must be used.
The external control signals are used for activating a suitable setting group when adaptive func-
tionality is necessary. Input signals that should activate setting groups must be either permanent
or a pulse exceeding 400 ms.
More than one input may be activated at the same time. In such cases the lower order setting
group has priority. This means that if for example both group four and group two are set to ac-
tivate, group two will be the one activated.
Every time the active group is changed, the output signal SETCHGD is sending a pulse.
The parameter MAXSETGR defines the maximum number of setting groups in use to switch be-
tween.
68
Basic IED functions
Figure 37: Connection of the function to external circuits
The above example also includes seven output signals, for confirmation of which group that is
active.
The SGC function block has an input where the number of setting groups used is defined.
Switching can only be done within that number of groups. The number of setting groups selected
to be used will be filtered so only the setting groups used will be shown on the PST setting tool.
5.3 Function block
ACGR-
ActiveGroup
ACTGRP1 GRP1
ACTGRP2 GRP2
ACTGRP3 GRP3
ACTGRP4 GRP4
ACTGRP5 GRP5
ACTGRP6 GRP6
SETCHGD
en05000433.vsd
Figure 38: ACGR function block
69
Basic IED functions
SGC--
NoOfSetGrp
MAXSETGR
en05000716.vsd
5.4 Input and output signals

Table 29: Input signals for the ActiveGroup (ACGR-) function block
Signal Description
ACTGRP1 Selects setting group 1 as active
Table 30: Output signals for the ActiveGroup (ACGR-) function block
Signal Description
GRP1 Setting group 1 is active
SETCHGD Pulse when setting changed

Table 31: General settings for the ActiveGroup (ACGR-) function
t 0.0 - 10.0 0.1 1.0 s Pulse length of pulse
when setting changed
70
Basic IED functions
Table 32: General settings for the NoOfSetGrp (SGC--) function

ActiveSetGrp SettingGroup1 - SettingGroup1 - ActiveSettingGroup
SettingGroup2
SettingGroup3
SettingGroup4
SettingGroup5
SettingGroup6
NoOfSetGrp 1-6 1 1 No Number of possible set-
ting groups to switch
between
71
Test mode functionality Chapter 3
Basic IED functions
6 Test mode functionality
6.1 Introduction
Most of the functions in the IED can individually be blocked by means of settings from the local
HMI or PST. To enable these blockings the IED must be set in test mode. When leaving the test
mode, i.e. entering normal mode, these blockings are disabled and everything is set to normal
operation. All testing will be done with actually set and configured values within the IED. No
settings will be changed, thus mistakes are avoided.

To be able to test the functions in the IED, you must set the terminal in the TEST mode. There
are two ways of setting the terminal in the TEST mode:
• By configuration, activating the input of the function block TEST.

• By setting TestMode to On in the local HMI, under the menu: TEST/IED test
mode.
While the IED is in test mode, the ACTIVE output of the function block TEST is activated. The
other two outputs of the function block TEST are showing which is the generator of the “Test
mode: On” state — input from configuration (OUTPUT output activated) or setting from LHMI
(SETTING output activated).
While the IED is in test mode, the yellow START LED will flash and all functions are blocked.
Any function can be de-blocked individually regarding functionality and event signalling.
Most of the functions in the IED can individually be blocked by means of settings from the local
HMI. To enable these blockings the IED must be set in test mode (the output ACTIVE in func-
tion block TEST is set to true), see example in figure 40. When leaving the test mode, i.e. enter-
ing normal mode, these blockings are disabled and everything is set to normal operation. All
testing will be done with actually set and configured values within the IED. No settings will be
changed, thus no mistakes are possible.
The blocked functions will still be blocked next time entering the test mode, if the blockings
were not reset.
The blocking of a function concerns all output signals from the actual function, so no outputs
will be activated.
The TEST function block might be used to automatically block functions when a test handle is
inserted in a test switch. A contact in the test switch (RTXP24 contact 29-30) can supply a bi-
nary input which in turn is configured to the TEST function block.
Each of the protection functions includes the blocking from TEST function block. A typical ex-
ample from the undervoltage function is shown in figure 40.
The functions can also be blocked from sending events over IEC 61850 station bus to prevent
filling station and SCADA databases with test events e.g. during a maintenance test.
72
Basic IED functions
U Disconnection
Normal voltage
U1<
U2<
tBlkUV1 <
t1,t1Min
IntBlkStVal1
tBlkUV2 <
t2,t2Min
IntBlkStVal2
Time
Block step 1
Block step 2
en05000466.vsd
Figure 39: Example of blocking the time delayed undervoltage protection function.
6.3 Function block
TEST-
Test
INPUT ACTIVE
OUTPUT
SETTING
en05000443.vsd
Figure 40: TEST function block
73
Basic IED functions

Table 33: Input signals for the Test (TEST-) function block
Signal Description
INPUT Sets terminal in test mode when active
Table 34: Output signals for the Test (TEST-) function block
Signal Description
ACTIVE Terminal in test mode when active
OUTPUT Test input is active
SETTING Test mode setting is (On) or not (Off)
NOEVENT Event disabled during testmode

Table 35: Basic general settings for the Test (TEST-) function
TestMode Off - Off - Test mode in operation
EventDisable Off - Off - Event disable during test-
On mode
CmdTestBit Off - Off - Command bit for test
On required or not during
testmode
74
IED identifiers Chapter 3
Basic IED functions
7 IED identifiers
7.1 Introduction
There are two functions that allow you to identify each IED individually: ProductInformation
function has seven pre-set, settings that are unchangeable but nevertheless very important:
• IED Type
• ProductDef
• FirmwareVer
• IEDMainFunType
• SerialNo.
• Ordering No.
• ProductionDate.
The settings are visable on the local HMI, under:
Diagnostics/IED Status/ProductIdentifiers
They are very helpful in case of support process (such as repair or maintenance). TerminalID
function is allowing you to identify the individual IED in your system, not only in the substation,
but in a whole region or a country.

Table 36: General settings for the TerminalID (TEID-) function
StationName 0 - 18 1 Station name - Station name
StationNumber 0 - 99999 1 0 - Station number
ObjectName 0 - 18 1 Object name - Object name
ObjectNumber 0 - 99999 1 0 - Object number
UnitName 0 - 18 1 Unit name - Unit name
UnitNumber 0 - 99999 1 0 - Unit number
75
Signal matrix for binary inputs (SMBI) Chapter 3
Basic IED functions
8 Signal matrix for binary inputs (SMBI)
8.1 Introduction
The SMBI function block is used within the CAP tool in direct relation with the Signal Matrix
Tool SMT (please see the overview of the engineering process in the “Application manual”,
chapter “Engineering of the IED”). It represents the way binary inputs are brought in for one
IED 670 configuration.

The SMBI function block, see figure 42, receives its inputs from the real (hardware) binary in-
puts via the SMT, and makes them available to the rest of the configuration via its outputs,
named BI1 to BI10. The inputs, as well as the whole block, can be tag-named. These tags will
be represented in SMT as information which signals shall be connected between physical IO and
the SMBI function block.
8.3 Function block
SI01-
SMBI
INSTNAME BI1
BI1NAME BI2
BI2NAME BI3
BI3NAME BI4
BI4NAME BI5
BI5NAME BI6
BI6NAME BI7
BI7NAME BI8
BI8NAME BI9
BI9NAME BI10
BI10NAME
en05000434.vsd
Figure 41: SI function block

Table 37: Output signals for the SMBI (SI01-) function block
Signal Description
BI1 Binary input 1
BI2 Binary input 2
BI3 Binary input 3
BI4 Binary input 4
BI5 Binary input 5
76
Signal matrix for binary inputs (SMBI) Chapter 3
Basic IED functions
Signal Description
BI6 Binary input 6
BI7 Binary input 7
BI8 Binary input 8
BI9 Binary input 9
BI10 Binary input 10
77
Signal matrix for binary outputs (SMBO) Chapter 3
Basic IED functions
9 Signal matrix for binary outputs (SMBO)
9.1 Introduction
The SMBO function block is used within the CAP tool in direct relation with the Signal Matrix
chapter “Engineering of the IED”). It represents the way binary outputs are sent from one
IED 670 configuration.

The SMBO function block, see figure 43, receives logical signal from the IED configuration,
which is transferring to the real (hardware) outputs, via the SMT. The inputs in the SMBO are
named BO1 to BO10 and they, as well as the whole function block, can be tag-named. The name
tags will appear in SMT as information which signals shall be connected between physical IO
and the SMBO.
9.3 Function block
SO01-
SMBO
BO1 INSTNAME
BO2 BO1NAME
BO3 BO2NAME
BO4 BO3NAME
BO5 BO4NAME
BO6 BO5NAME
BO7 BO6NAME
BO8 BO7NAME
BO9 BO8NAME
BO10 BO9NAME
BO10NAME
en05000439.vsd
Figure 42: SO function block

Table 38: Input signals for the SMBO (SO01-) function block
Signal Description
BO1 Signal name for BO1 in Signal Matrix Tool
78
Signal matrix for binary outputs (SMBO) Chapter 3
Basic IED functions
Signal Description
79
Signal matrix for mA inputs (SMMI) Chapter 3
Basic IED functions
10 Signal matrix for mA inputs (SMMI)
10.1 Introduction
The SMMI function block is used within the CAP tool in direct relation with the Signal Matrix
chapter “Engineering of the IED”). It represents the way milliamp (mA) inputs are brought in
for one IED670 configuration.

The SMMI function block, see figure 44, receives its inputs from the real (hardware) mA inputs
via the SMT, and makes them available to the rest of the configuration via its analog outputs,
named AI1 to AI6. The inputs, as well as the whole block, can be tag-named. These tags will be
represented in SMT.
The outputs on the SMMI are normally connected to the MVGGIO function block for further
use of the mA signals.
10.3 Function block
SMI1-
SMMI
INSTNAME AI1
AI1NAME AI2
AI2NAME AI3
AI3NAME AI4
AI4NAME AI5
AI5NAME AI6
AI6NAME
en05000440.vsd
Figure 43: SMI function block

Table 39: Output signals for the SMMI (SMI1-) function block
Signal Description
AI1 Analog milliampere input 1
80
Signal matrix for analog inputs (SMAI) Chapter 3
Basic IED functions
11 Signal matrix for analog inputs (SMAI)
11.1 Introduction
The SMAI function block (or the pre-processing function block, as it is also known) is used
within the PCM 600 in direct relation with the Signal Matrix Tool SMT (please see the overview
of the engineering process in the “Application manual”, chapter “Engineering of the IED”). It
represents the way analog inputs are brought in for one IED 670 configuration.

Every SMAI function block can receive four analog signals (three phases and one neutral value),
either voltage or current, see figure 45 and figure 46. The outputs of the SMAI are giving infor-
mation about every aspect of the 3ph analog signals acquired (phase angle, RMS value, frequen-
cy and frequency derivates etc. – 244 values in total). The BLOCK input will reset to 0 all the
outputs of the function block.
The output singal AI1 to AI4 are direct output of the in SMT connected input to AI1 to AI4. AIN
is always the neutral current, calculated residual sum or the signal connected to AI4. Note that
function block will always calculate the residual sum of current/voltage if the input is not con-
nected in SMT. Applications with a few exceptions (HEDIF, BBDIF) shall always be connected
to AI3P.
11.3 Function block
PR01-
SMAI
BLOCK SYNCOUT
DFTSPFC SPFCOUT
GRPNAME AI3P
AI1NAME AI1
AI2NAME AI2
AI3NAME AI3
AI4NAME AI4
TYPE AIN
NOSMPLCY
en05000705.vsd
Figure 44: PR01 function block
PR02-
SMAI
BLOCK AI3P
GRPNAME AI1
AI1NAME AI2
AI2NAME AI3
AI3NAME AI4
AI4NAME AIN
TYPE
en07000130.vsd
Figure 45: PR02–12 function block
81
Basic IED functions

Table 40: Input signals for the SMAI (PR01-) function block
Signal Description
BLOCK Block group 1
DFTSYNC Synchronisation of DFT calculation
DFTSPFC Number of samples per fundamental cycle used for DFT calcula-
tion
Table 41: Output signals for the SMAI (PR01-) function block
Signal Description
SYNCOUT Synchronisation signal from internal DFT reference function
SPFCOUT Number of samples per fundamental cycle from internal DFT ref-
erence function
AI3P Group 1 analog input 3-phase group
AI1 Group 1 analog input 1
AIN Group 1 analog input residual for disturbance recorder
Table 42: Input signals for the SMAI (PR02-) function block
Signal Description
BLOCK Block group 2
Table 43: Output signals for the SMAI (PR02-) function block
Signal Description
AI3P Group 2 analog input 3-phase group
AIN Group 2 analog input residual for disturbance recorder
82
Basic IED functions
Note!
Settings DFTRefExtOut and DFTReference shall be set to default value InternalDFTRef if no
VT inputs are available. Internal nominal frequency DFT reference is then the reference.
Table 44: Basic general settings for the SMAI (PR01-) function
DFTRefExtOut InternalDFTRef - InternalDFTRef - DFT reference for exter-
AdDFTRefCh1 nal output
AdDFTRefCh2
AdDFTRefCh3
AdDFTRefCh4
AdDFTRefCh5
AdDFTRefCh6
AdDFTRefCh7
AdDFTRefCh8
AdDFTRefCh9
AdDFTRefCh10
AdDFTRefCh11
AdDFTRefCh12
External DFT ref
DFTReference InternalDFTRef - InternalDFTRef - DFT reference
AdDFTRefCh1
AdDFTRefCh2
AdDFTRefCh3
AdDFTRefCh4
AdDFTRefCh5
AdDFTRefCh6
AdDFTRefCh7
AdDFTRefCh8
AdDFTRefCh9
AdDFTRefCh10
AdDFTRefCh11
AdDFTRefCh12
External DFT ref
ConnectionType Ph-N - Ph-N - Input connection type
Ph-Ph
TYPE 1-2 1 1 Ch 1=Voltage,2=Current
83
Basic IED functions
Table 45: Advanced general settings for the SMAI (PR01-) function
Negation Off - Off - Negation
NegateN
Negate3Ph
Negate3Ph+N
MinValFreqMeas 5 - 200 1 10 % Limit for frequency calcu-
lation in % of UBase
UBase 0.05 - 2000.00 0.05 400.00 kV Base Voltage
Table 46: Basic general settings for the SMAI (PR02-) function
AdDFTRefCh1
AdDFTRefCh2
AdDFTRefCh3
AdDFTRefCh4
AdDFTRefCh5
AdDFTRefCh6
AdDFTRefCh7
AdDFTRefCh8
AdDFTRefCh9
AdDFTRefCh10
AdDFTRefCh11
AdDFTRefCh12
External DFT ref
ConnectionType Ph-N - Ph-N - Input connection type
Ph-Ph
TYPE 1-2 1 1 Ch 1=Voltage,2=Current
Table 47: Advanced general settings for the SMAI (PR02-) function
Negation Off - Off - Negation
NegateN
Negate3Ph
Negate3Ph+N
MinValFreqMeas 5 - 200 1 10 % Limit for frequency calcu-
lation in % of UBase
84
Summation block 3 phase (SUM3Ph) Chapter 3
Basic IED functions
12 Summation block 3 phase (SUM3Ph)
12.1 Introduction
The SUM3Ph function block is used in order to get the sum of two sets of 3 ph analog signals
(of the same type) for those IED functions that might need it.

The summation block receives the 3ph signals from the SMAI blocks, see figure 47. In the same
way, the BLOCK input will reset to 0 all the outputs of the function block.
12.3 Function block
SU01-
Sum3Ph
BLOCK AI3P
DFTSYNC AI1
DFTSPFC AI2
G1AI3P AI3
G2AI3P AI4
en05000441.vsd
Figure 46: SU function block

Table 48: Input signals for the Sum3Ph (SU01-) function block
Signal Description
BLOCK Block
DFTSYNC Synchronisation of DFT calculation
DFTSPFC Number of samples per fundamental cycle used for DFT calcula-
tion
G1AI3P Group 1 analog input 3-phase group
G2AI3P Group 2 analog input 3-phase group
Table 49: Output signals for the Sum3Ph (SU01-) function block
Signal Description
AI3P Group analog input 3-phase group
AI1 Group 1 analog input
85
Summation block 3 phase (SUM3Ph) Chapter 3
Basic IED functions
Note!
Settings DFTRefExtOut and DFTReference shall be set to default value InternalDFTRef if no
VT inputs are available.
Table 50: Basic general settings for the Sum3Ph (SU01-) function
SummationType Group1+Group2 - Group1+Group2 - Summation type
Group1-Group2
Group2-Group1
-(Group1+Group2)
AdDFTRefCh1
External DFT ref
Table 51: Advanced general settings for the Sum3Ph (SU01-) function
FreqMeasMinVal 5 - 200 1 10 % Amplitude limit for fre-
quency calculation in %
of Ubase
UBase 0.05 - 2000.00 0.05 400.00 kV Base voltage
86
Authority status (AUTS) Chapter 3
Basic IED functions
13 Authority status (AUTS)
13.1 Introduction
The AUTS function block (or the authority status function block) is an indication function block,
which informs about two events related to the IED and the user authorization:
• the fact that at least one user has tried to log on wrongly into the IED and it was
blocked (the output USRBLKED)
• the fact that at least one user is logged on (the output LOGGEDON)

Whenever on of the two events described above happens, the specific output (USRBLKED or
LOGGEDON) will be activated. The output can e.g. be connected on Event function block for
LON/SPA. The signals are also available on IEC 61850 station bus.
13.3 Function block
AUTS-
AuthStatus
USRBLKED
LOGGEDON
en06000503.vsd
Figure 47: AUTS function block
13.4 Output signals

Table 52: Output signals for the AuthStatus (AUTS-) function block
Signal Description
USRBLKED At least one user is blocked by invalid password
LOGGEDON At least one user is logged on

87
Goose binary receive Chapter 3
Basic IED functions
14 Goose binary receive
14.1 Function block
GB01-
GooseBinRcv
BLOCK OUT1
INSTNAME OUT1VAL
OUT2
OUT2VAL
OUT3
OUT3VAL
OUT4
OUT4VAL
OUT5
OUT5VAL
OUT6
OUT6VAL
OUT7
OUT7VAL
OUT8
OUT8VAL
OUT9
OUT9VAL
OUT10
OUT10VAL
OUT11
OUT11VAL
OUT12
OUT12VAL
OUT13
OUT13VAL
OUT14
OUT14VAL
OUT15
OUT15VAL
OUT16
OUT16VAL
OUT1NAM
OUT2NAM
OUT3NAM
OUT4NAM
OUT5NAM
OUT6NAM
OUT7NAM
OUT8NAM
OUT9NAM
OUT10NAM
OUT11NAM
OUT12NAM
OUT13NAM
OUT14NAM
OUT15NAM
OUT16NAM
en07000047.vsd
Figure 48: GB function block
88
Basic IED functions

Table 53: Input signals for the GooseBinRcv (GB01-) function block
Signal Description
BLOCK Block of output signals
INSTNAME Instance name in Signal Matrix Tool
Table 54: Output signals for the GooseBinRcv (GB01-) function block
Signal Description
OUT1 Binary output 1
OUT1VAL Valid data on binary output 1
89
Basic IED functions
Signal Description
OUT1NAM Signal name for reservation request in Signal Matrix Tool

Table 55: Basic general settings for the GooseBinRcv (GB01-) function
Operation Off - Off - Operation Off/On
On
90
Differential protection
Chapter 4 Differential
protection
About this chapter

This chapter describes the measuring principles, functions and parameters used in differential
protection.
91
High impedance differential protection Chapter 4
(PDIF, 87) Differential protection
1 High impedance differential protection (PDIF, 87)
Function block name: HZDx- IEC 60617 graphical symbol:

ANSI number: 87
IEC 61850 logical node name:
HZPDIF
IdN
1.1 Introduction
The high impedance differential protection can be used when the involved CT cores have the
same turn ratio and similar magnetizing characteristic. It utilizes an external summation of the
phases and neutral current and a series resistor and a voltage dependent resistor externally to the
relay.

The high impedance differential function is based on one current input with external stabilizing
resistors and voltage dependent resistors. Three functions can be used to provide a three phase
differential protection function. The stabilizing resistor value is calculated from the relay oper-
ating value UR calculated to achieve through fault stability. The supplied stabilizing resistor has
a link to allow setting of the correct resistance value.
Refer to “Application manual” for operating voltage and sensitivity calculation.
1.2.1 Logic diagram

The logic diagram see figure 50 shows the operation principles for the high impedance differen-
tial protection function. It is a basically a simple one step relay with an additional lower alarm
level. The function can be totally blocked totally or only tripping, can be blocked, by activating
inputs from external signals.
92
Figure 49: Logic diagram for High impedance differential protection.
1.3 Function block
HZD1-
HZPDIF_87
ISI TRIP
BLOCK ALARM
BLKTR MEASVOLT
en05000363.vsd
Figure 50: HZD function block

Table 56: Input signals for the HZPDIF_87 (HZD1-) function block
Signal Description
ISI Group signal for current input
BLOCK Block of function
BLKTR Block of trip
Table 57: Output signals for the HZPDIF_87 (HZD1-) function block
Signal Description
TRIP Trip signal
ALARM Alarm signal
MEASVOLT Measured RMS voltage on CT secondary side
93

Table 58: Basic parameter group settings for the HZPDIF_87 (HZD1-) function
Operation Off - Off - Operation Off / On
On
U>Alarm 2 - 500 1 10 V Alarm voltage level in
volts on CT secondary
side
tAlarm 0.000 - 60.000 0.001 5.000 s Time delay to activate
alarm
U>Trip 5 - 900 1 100 V Operate voltage level in
volts on CT secondary
side
SeriesResistor 10 - 20000 1 250 ohm Value of series resistor in
Ohms
1.6 Technical data

Table 59: High impedance differential protection (PDIF, 87)
Function Range or value Accuracy
Operate voltage (20-400) V ± 1.0% of Ur for U < Ur
± 1.0% of U for U > Ur
Reset ratio >95% -
2
Maximum continuous voltage U>TripPickup /series resistor -
≤200 W
Operate time 10 ms typically at 0 to 10 x Ud -
Reset time 90 ms typically at 10 to 0 x Ud -
Critical impulse time 2 ms typically at 0 to 10 x Ud -
94
Impedance protection
Chapter 5 Impedance
protection
About this chapter

This chapter describes distance protection and associated functions. It includes function blocks,
logic diagrams and data tables with information about distance protection, automatic switch onto
fault, weak end in-feed and other associated functions. Quadrilateral characteristics are also cov-
ered.
95
Distance measuring zones, quadrilateral Chapter 5
characteristic (PDIS, 21) Impedance protection
1 Distance measuring zones, quadrilateral

characteristic (PDIS, 21)
Function block name: ZMQ- IEC 60617 graphical symbol:

ANSI number: 21
ZMQPDIS
1.1 Introduction
The line distance protection is a five zone full scheme protection with three fault loops for phase
to phase faults and three fault loops for phase to earth fault for each of the independent zones.
Individual settings for each zone in resistive and reactive reach gives flexibility for use on over-
head lines and cables of different types and lengths.
Mho alternative Quad characteristic is available.
The function has a functionality for load encroachment which increases the possibility to detect
high resistive faults on heavily loaded lines (see figure 52).
Forward
operation
Reverse
operation
en05000034.vsd
Figure 51: Typical quadrilateral distance protection zone with load encroachment function
activated
The independent measurement of impedance for each fault loop together with a sensitive and
reliable built in phase selection makes the function suitable in applications with single phase au-
to-reclosing.
Built-in adaptive load compensation algorithm prevents overreaching of zone1 at load exporting
end at phase to earth faults on heavily loaded power lines.
96
The distance protection zones can operate, independent of each other, in directional (forward or
reverse) or non-directional mode. This makes them suitable, together with different communi-
cation schemes, for the protection of power lines and cables in complex network configurations,
such as parallel lines, multi-terminal lines etc.

1.2.1 Full scheme measurement
The execution of the different fault loops within the IED670 are of full scheme type, which
means that each fault loop for phase to earth faults and phase to phase faults for forward and
reverse faults are executed in parallel.
Figure 53 presents an outline of the different measuring loops for the basic five, imped-
ance-measuring zones l.
L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 1
en05000458.vsd
Figure 52: The different measuring loops at line-earth fault and phase-phase fault.
The use of full scheme technique gives faster operation time compared to switched schemes
which mostly uses a start element to select correct voltages and current depending on fault type.
Each distance protection zone performs like one independent distance protection relay with six
measuring elements.
1.2.2 Impedance characteristic

The distance measuring zone include six impedance measuring loops; three intended for
phase-to-earth faults, and three intended for phase-to-phase as well as three-phase faults.
The distance measuring zone will essentially operate according to the non-directional imped-
ance characteristics presented in figure 54 and figure 55. The phase-to-earth characteristic is il-
lustrated with the full loop reach while the phase-to-phase characteristic presents the per-phase
reach.
97
RFPE R1+Rn RFPE
X0 − X1
Xn =
3
X1+Xn R0 − R1
Rn =
3
f N f N
R (Ohm/loop)
RFPE RFPE
X1+Xn
RFPE R1+Rn RFPE

en05000661.vsd
Figure 53: Characteristic for the phase-to-earth measuring loops, ohm/loop domain.
98
X (Ohm/phase)
RFPP 2·R1 RFPP
2·X1
R (Ohm/phase)
RFPP RFPP
2·X1
RFPP 2·R1 RFPP

en05000662.vsd
Figure 54: Characteristic for the phase-to-phase measuring loops
The fault loop reach with respect to each fault type may also be presented as in figure 56. Note
in particular the difference in definition regarding the (fault) resistive reach for phase-to-phase
faults and three-phase faults.
99
ILn R1 + j X1
Phase-to-earth
UL1
element
Phase-to-earth
fault in phase L1 RFPE
(Arc + tower
resistance)
0
IN (R0-R1)/3 +
j (X0-X1)/3 )
IL1 R1 + j X1 Phase-to-phase
UL1 element L1-L2
Phase-to-phase
fault in phase RFPP
L1-L2 IL2
UL2 (Arc resistance)
R1 + j X1
IL1 R1 + j X1 0.5×RFPP Phase-to-phase

UL1 element L1-L3
Three-phase
fault
IL3
UL3
R1 + j X1 0.5×RFPP
en05000181.vsd
where:
n designates anyone of the three phases (1, 2 or 3) and
m represents the phase that is leading phase n with 120 degrees (i.e. 3, 1 or 2).
Figure 55: Fault loop model
The R1 and jX1 in figure 56 represents the positive sequence impedance from the measuring
point to the fault location. The RFPE and RFPP is the eventual fault resistance in the fault place.
Regarding the illustration of three-phase fault in figure 56, there is of course fault current flow-
ing also in the third phase during a three-phase fault. The illustration merely reflects the loop
measurement, which is made phase-to-phase.
100
The theoretical parameters p and q outline the area of operation in quadrant 1 when varied from
0 to 1.0. That is, for any combination of p and q, where both are between 0 and 1.0, the corre-
sponding impedance is within the reach of the characteristic.
The zone may be set to operate in Non-directional, Forward or Reverse direction through the
setting OperationDir. The result from respective set value is illustrated in figure 57. It may be
convenient to once again mention that the impedance reach is symmetric, in the sense that it is
conform for forward and reverse direction. Therefore, all reach settings apply to both directions.
X X X
R R R
Non-directional Forward Reverse
en05000182.vsd
Figure 56: Directional operating modes of the distance measuring zone
1.2.3 Minimum operating current

The operation of the distance measuring zone is blocked if the magnitude of input currents fall
below certain threshold values.
The phase-to-earth loop Ln is blocked if ILn < IMinOpPE.
For zone 1 with load compensation feature the additional criterion applies, that all phase-to-earth
loops will be blocked when IN < IMinOpIN, regardless of the phase currents.
ILn is the RMS value of the current in phase Ln. IN is the RMS value of the vector sum of the
three phase currents, i.e. residual current 3I0.
The phase-to-phase loop LmLn is blocked if ILmLnAB (BC or CA)< IMinOpPP.
101
ILmLn is the RMS value of the vector difference between phase currents Lm and Ln.
Note!
All three current limits IminOpPE, IminOpIN and IMinOpPP are automatically reduced to 75%
of regular set values if the zone is set to operate in reverse direction, i.e. OperationDir=Reverse.
1.2.4 Measuring principles

Fault loop equations use the complex values of voltage, current, and changes in the current. Ap-
parent impedances are calculated and compared with the set limits. The calculation of the appar-
ent impedances at ph-ph faults follows equation 1 (example for a phase L1 to phase L2 fault).
UL1 – UL2
Zapp = -------------------------
I L1 – IL2
(Equation 1)
Here U and I represent the corresponding voltage and current phasors in the respective phase Ln
(n = 1, 2, 3)
The earth return compensation applies in a conventional manner to ph-E faults (example for a
phase L1 to earth fault) according to equation 2.
U L1
Z app = ------------------------------
I L1 + I N ⋅ KN
(Equation 2)
Where:
UL1, IL1 and IN are the phase voltage, phase current and residual current present to the IED
KN is defined as:
X0 - X1
KN =
3X1
where X0 and X1 is zero and positive sequence reactance from the measuring point to
the fault on the protected line.
Here IN is a phasor of the residual current in relay point. This results in the same reach along the
line for all types of faults.
The apparent impedance is considered as an impedance loop with resistance R and reactance X.
The formula given in equation 2 is only valid for no loaded radial feeder applications. When load
is considered in the case of single line to earth fault, conventional distance protection might
overreach at exporting end and underreach at importing end. REx670 has an adaptive load com-
pensation which increases the security in such applications.
102
Measuring elements receive current and voltage information from the A/D converter. The check
sums are calculated and compared, and the information is distributed into memory locations. For
each of the six supervised fault loops, sampled values of voltage (U), current (I), and changes in
current between samples (ΔI) are brought from the input memory and fed to a recursive Fourier
filter.
The filter provides two orthogonal values for each input. These values are related to the loop im-
pedance according to equation 3,
X Δi
U = R ⋅ i + ------ ⋅ -----
ω 0 Δt
(Equation 3)
in complex notation, or:
X Δ Re ( I )
Re ( U ) = R ⋅ Re ( I ) + ------ ⋅ ------------------
ω0 Δt
(Equation 4)
X Δ Im ( I )
Im ( U ) = R ⋅ Im ( I ) + ------ ⋅ -----------------
ω0 Δt
(Equation 5)
with
ω0 = 2 ⋅ π ⋅ f 0
(Equation 6)
where:
Re designates the real component of current and voltage,
Im designates the imaginary component of current and voltage and
f0 designates the rated system frequency
The algorithm calculates Rm measured resistance from the equation for the real value of the volt-
age and substitute it in the equation for the imaginary part. The equation for the Xm measured
reactance can then be solved. The final result is equal to:
Im ( U ) ⋅ ΔRe ( I ) – Re ( U ) ⋅ Δ Im ( I )
R m = ------------------------------------------------------------------------------------
ΔRe ( I ) ⋅ Im ( I ) – Δ Im ( I ) ⋅ Re ( I )
(Equation 7)
103
Re ( U ) ⋅ Im ( I ) – Im ( U ) ⋅ Re ( I )
Xm = ω 0 ⋅ Δt ⋅ -------------------------------------------------------------------------------
ΔRe ( I ) ⋅ Im ( I ) – ΔIm ( I ) ⋅ Re ( I )
(Equation 8)
The calculated Rm and Xm values are updated each sample and compared with the set zone reach.
The adaptive tripping counter counts the number of permissive tripping results. This effectively
removes any influence of errors introduced by the capacitive voltage transformers or by other
factors.
The directional evaluations are performed simultaneously in both forward and reverse direc-
tions, and in all six fault loops. Positive sequence voltage and a phase locked positive sequence
memory voltage are used as a reference. This ensures unlimited directional sensitivity for faults
close to the relay point.
1.2.5 Directional lines

The evaluation of the directionality takes place in the function block ZD. Equation 9 and
equation 10 are used to classify that the fault is in forward direction for line-to-earth fault and
phase-phase fault.
0.8 ⋅ U1L1 + 0.2 ⋅ U1L1M

-ArgDir < arg ------------------------------------------------------------ < ArgNegRes
IL1
(Equation 9)
For the L1-L2 element, the equation in forward direction is according to.
0.8 ⋅ U1L1L2 + 0.2 ⋅ U1L1L2M

-ArgDir < arg ----------------------------------------------------------------------- < ArgNegRes
I L1L2
(Equation 10)
where:
ArgDir is the setting for the lower boundary of the forward directional characteristic, by default
set to 15 (= -15 degrees) and
ArgNegRes is the setting for the upper boundary of the forward directional characteristic, by default
set to 115 degrees, see figure 58.
U1L1 is positive sequence phase voltage in phase L1
U1L1M is positive sequence memorized phase voltage in phase L1
IL1 is phase current in phase L1
U1L1L2 is voltage difference between phase L1 and L2 (L2 lagging L1)
U1L1L2M is memorized voltage difference between phase L1 and L2 (L2 lagging L1)
IL1L2 is current difference between phase L1 and L2 (L2 lagging L1)
104
The setting of ArgDir and ArgNegRes is by default set to 15 (= -15) and 115 degrees respective-
ly.(see figure 58) and it should not be changed unless system studies have shown the necessity.
The ZD gives a binary coded signal on the output STDIR depending on the evaluation where
STFWL1N=1 adds 1, STRVL1N=1 adds 2, STFWL2N=1 adds 4 etc.
ArgNegRes
ArgDir
R
en05000722.vsd
Figure 57: Setting angles for discrimination of forward and reverse fault
The reverse directional characteristic is equal to the forward characteristic rotated by

180 degrees.
The polarizing voltage is available as long as the positive-sequence voltage exceeds 4% of the
set base voltage UBase. So the directional element can use it for all unsymmetrical faults includ-
ing close-in faults.
For close-in three-phase faults, the U1L1M memory voltage, based on the same positive se-
quence voltage, ensures correct directional discrimination.
The memory voltage is used for 100 ms or until the positive sequence voltage is restored.
After 100 ms, the following occurs:
• If the current is still above the set value of the minimum operating current
(between 10 and 30% of the set terminal rated current IBase), the condition seals
in.
- If the fault has caused tripping, the trip endures.
- If the fault was detected in the reverse direction, the measuring element in
the reverse direction remains in operation.
105
• If the current decreases below the minimum operating value, the memory resets
until the positive sequence voltage exceeds 10% of its rated value.
1.2.6 Simplified logic diagrams
Distance protection zones

The design of distance protection zone 1 is presented for all measuring loops: phase-to-earth as
well as phase-to-phase.
Phase-to-earth related signals are designated by LnE, where n represents the corresponding
phase number (L1E, L2E, and L3E). The phase-to-phase signals are designated by LnLm, where
n and m represent the corresponding phase numbers (L1L2, L2L3, and L3L1).
Fulfillment of two different measuring conditions is necessary to obtain the one logical signal
for each separate measuring loop:
• Zone measuring condition, which follows the operating equations described

above.
• Group functional input signal (STCND), as presented in figure 59.
The STCND input signal represents a connection of six different integer values from the phase
selection function within the IED, which are converted within the zone measuring function into
corresponding boolean expressions for each condition separately. It is connected to the PHS
function block output STCDZ.
The internal input signal DIRCND is used to give condition for directionality for the distance
measuring zones. The signal contains binary coded information for both forward and reverse di-
rection. The zone measurement function filter out the relevant signals on the STDIR input de-
pending on the setting of the parameter OperationDir. It shall be configured to the STDIR output
on the ZD block.
106
Figure 58: Conditioning by a group functional input signal STCND
Composition of the phase starting signals for a case, when the zone operates in a non-directional
mode, is presented in figure 60.
107
Figure 59: Composition of starting signals in non-directional operating mode
Results of the directional measurement enter the logic circuits, when the zone operates in direc-
tional (forward or reverse) mode, see figure 61.
108
STNDL1N
AND
DIRL1N
OR STZMPE.
&
STNDL2N
DIRL2N AND
STNDL3N 15 ms
OR STL1
& t
DIRL3N AND
STNDL1L2
DIRL1L2 AND 15 ms
OR STL2
& t
STNDL2L3
DIRL2L3 AND
15 ms
OR STL3
STNDL3L1 & t
DIRL3L1 AND
OR STZMPP
&
BLK
15 ms
OR START
& t
en05000778.vsd
Figure 60: Composition of starting signals in directional operating mode
Tripping conditions for the distance protection zone one are symbolically presented in figure 62.
109
Figure 61: Tripping logic for the distance protection zone one
1.3 Function block
ZM01-
ZMQPDIS_21
I3P TRIP
U3P TRL1
BLOCK TRL2
VTSZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND
en06000256.vsd
Figure 62: ZM function block
ZD01-
ZDRDIR
I3P STDIR
U3P
en05000681.vsd
Figure 63: ZD function block
110

Table 60: Input signals for the ZMQPDIS_21 (ZM01-) function block
Signal Description
I3P Group signal for current input
U3P Group signal for voltage input
VTSZ Blocks all output by fuse failure signal
BLKTR Blocks all trip outputs
STCND External start condition (loop enabler)
DIRCND External directional condition
Table 61: Output signals for the ZMQPDIS_21 (ZM01-) function block
Signal Description
TRIP General Trip, issued from any phase or loop
TRL1 Trip signal from phase L1
START General Start, issued from any phase or loop
STL1 Start signal from phase L1
STND Non-directional start, issued from any phase or loop
Table 62: Input signals for the ZDRDIR (ZD01-) function block
Signal Description
I3P Group connection
U3P Group connection
Table 63: Output signals for the ZDRDIR (ZD01-) function block
Signal Description
STDIR All start signals binary coded
111

Table 64: Basic parameter group settings for the ZMQPDIS_21 (ZM01-) function
Operation Off - On - Operation Off / On
On
IBase 1 - 99999 1 3000 A Base current, i.e. rated
current
UBase 0.05 - 2000.00 0.05 400.00 kV Base voltage, i.e. rated
voltage
OperationDir Off - Forward - Operation mode of direc-
Non-directional tionality NonDir / Forw /
Forward Rev
Reverse
X1 0.10 - 3000.00 0.01 30.00 ohm/p Positive sequence reac-
tance reach
R1 0.10 - 1000.00 0.01 5.00 ohm/p Positive seq. resistance
for zone characteristic
angle
X0 0.10 - 9000.00 0.01 100.00 ohm/p Zero sequence reactance
reach
R0 0.50 - 3000.00 0.01 15.00 ohm/p Zero seq. resistance for
zone characteristic angle
RFPP 1.00 - 3000.00 0.01 30.00 ohm/l Fault resistance reach in
ohm/loop, Ph-Ph
RFPE 1.00 - 9000.00 0.01 100.00 ohm/l Fault resistance reach in
ohm/loop, Ph-E
OperationPP Off - On - Operation mode Off / On
On of Phase-Phase loops
Timer tPP Off - On - Operation mode Off / On
On of Zone timer, Ph-Ph
tPP 0.000 - 60.000 0.001 0.000 s Time delay of trip, Ph-Ph
OperationPE Off - On - Operation mode Off / On
On of Phase-Earth loops
Timer tPE Off - On - Operation mode Off / On
On of Zone timer, Ph-E
tPE 0.000 - 60.000 0.001 0.000 s Time delay of trip, Ph-E
IMinOpPP 10 - 30 1 20 %IB Minimum operate delta
current for Phase-Phase
loops
IMinOpPE 10 - 30 1 20 %IB Minimum operate phase
current for Phase-Earth
loops
IMinOpIN 5 - 30 1 5 %IB Minimum operate resid-
ual current for
Phase-Earth loops
112
Table 65: Parameter group settings for the ZDRDIR (ZD01-) function
ArgNegRes 90 - 175 1 115 Deg Angle to blinder in sec-
ond quadrant for forward
direction
ArgDir 5 - 45 1 15 Deg Angle to blinder in fourth
quadrant for forward
direction
IMinOp 1 - 99999 1 10 %IB Minimum operate cur-
rent in % of IBase
IBase 1 - 99999 1 3000 A Base Current
1.6 Technical data

Table 66: Distance measuring zone, Quad (PDIS, 21)
Number of zones 5 with selectable direction -
Minimum operate current (10-30)% of Ibase -
Positive sequence reactance (0.50-3000.00) Ω/phase ± 2.0% static accuracy
Positive sequence resistance (0.10-1000.00) Ω/phase ± 2.0 degrees static angular accu-
racy
Zero sequence reactance (0.50-9000.00) Ω/phase
Conditions:
Zero sequence resistance (0.50-3000.00) Ω/phase
Voltage range: (0.1-1.1) x Ur
Fault resistance, Ph-E (1.00-9000.00) Ω/loop
Current range: (0.5-30) x Ir
Fault resistance, Ph-Ph (1.00-3000.00) Ω/loop
Angle: at 0 degrees and
85 degrees
Dynamic overreach <5% at 85 degrees measured with -
CCVT’s and 0.5<SIR<30
Impedance zone timers (0.000-60.000) s ± 0.5% ± 10 ms
Operate time 24 ms typically -
Reset ratio 105% typically -
Reset time 30 ms typically -
113
Distance protection zones, quadrilateral Chapter 5
characteristic for Impedance protection
series compensated lines (PDIS)
2 Distance protection zones, quadrilateral

characteristic for
Function block name: ZMC IEC 60617 graphical symbol:

ANSI number: 21
ZMCPDIS
2.1 Introduction
The line distance protection is a five zone full scheme protection with three fault loops for phase
to phase faults and three fault loops for phase to earth fault for each of the independent zones.
Individual settings for each zone resistive and reactive reach gives flexibility for use on overhead
lines and cables of different types and lengths.
Quad characteristic is available.
high resistive faults on heavily loaded lines see figure 52.
Forward
operation
Reverse
operation
en05000034.vsd
Figure 64: Typical quadrilateral distance protection zone with load encroachment function
activated
to-reclosing.
114
Built-in adaptive load compensation algorithm for the quadrilateral function prevents overreach-
ing of zone1 at load exporting end at phase to earth faults on heavily loaded power lines.

The execution of the different fault loops within the IED670 are of full scheme type, which
means that each fault loop for phase to earth faults and phase to phase faults for forward and
reverse faults are executed in parallel.
ance-measuring zones.
en05000458.vsd
The use of full scheme technique gives faster operation time compared to switched schemes
Each distance protection zone performs like one independent distance protection relay with six
measuring elements.

The distance measuring zone include six impedance measuring loops; three intended for
phase-to-earth faults, and three intended for phase-to-phase as well as three-phase faults.
ance characteristics presented in figure 67 and figure 68. The phase-to-earth characteristic is il-
lustrated with the full loop reach while the phase-to-phase characteristic presents the per-phase
reach.
115
X (Ohm/loop)
RFRVE R1+Rn RFFWPE
X 0PE − X 1RVPE
XNRV =XX00PE −−
PG 1XRVPE
1RVPG
XNRV ==
XNRV X3
3 3
XNFW = XX
X00
PE
0 −−
PE
PG X−1X 11FWPE
XFWPE
FWPG
XNFW==
XNFW
X1FWPE+XNFW 3 33
ϕN ϕN
R (Ohm/loop)
RFRVE RFFWPE
X1RVPE+XNRV
RFRVE R1+Rn RFFWPE

en07000060.vsd
116
X (Ohm/phase)
RFVPP R1PP RFFWPP

2 2
X 0PE − X 1RVPE
XNRV =XX00PE −−
PG 1XRVPE
1RVPG
XNRV ==
XNRV X3
3 3
XNFW = XX
X00
PE
0 −−
PE
PG −1X
X 11FWPE
XFWPE
FWPG
XNFW==
XNFW
X1FWPP 333
ϕ ϕ
R (Ohm/phase)
RFRVPP RFFWPP
2 2
X1RVPP
RFVPP R1PP RFFWPP

2 2
en07000062.vsd
Figure 67: Characteristic for the phase-to-phase measuring loops
The fault loop reach with respect to each fault type may also be presented as in figure 69. Note
in particular the difference in definition regarding the (fault) resistive reach for phase-to-phase
faults and three-phase faults.
117
ILn R1 + j X1
Phase-to-earth
UL1
element
Phase-to-earth
(Arc + tower
resistance)
0
IN (R0-R1)/3 +
j (X0-X1)/3 )
IL1 R1 + j X1 Phase-to-phase
UL1 element L1-L2
Phase-to-phase
fault in phase RFPP
L1-L2 IL2
UL2 (Arc resistance)
R1 + j X1
IL1 R1 + j X1 0.5×RFPP Phase-to-phase

UL1 element L1-L3
Three-phase
fault
IL3
UL3
R1 + j X1 0.5×RFPP
en05000181.vsd
where:
n designates anyone of the three phases (1, 2 or 3) and
m represents the phase that is leading phase n with 120 degrees (i.e. 3, 1 or 2).
point to the fault location. The RFPE and RFPP is the eventual fault resistance in the fault place.
Regarding the illustration of three-phase fault in figure 69, there is of course fault current flow-
ing also in the third phase during a three-phase fault. The illustration merely reflects the loop
measurement, which is made phase-to-phase.
118
convenient to once again mention that the impedance reach is symmetric, forward and reverse
direction. Therefore, all reach settings apply to both directions.
X X X
R R R
en05000182.vsd

The phase-to-phase loop LmLn is blocked if ILmLnAB (BC or CA)< IMinOpPP.
ILmLn is the RMS value of the vector difference between phase currents Lm and Ln.
Note!
All three current limits IminOpPE, IminOpIN and IMinOpPP are automatically reduced to 75%
of regular set values if the zone is set to operate in reverse direction, i.e. OperationDir=Reverse.
119

parent impedances are calculated and compared with the set limits. The calculation of the appar-
ent impedances at ph-ph faults follows equation 11 (example for a phase L1 to phase L2 fault).
UL1 – UL2
Zapp = -------------------------
I L1 – IL2
(Equation 11)
Here U and I represent the corresponding voltage and current phasors in the respective phase.
The earth return compensation applies in a conventional manner to ph-E faults (example for a
phase L1 to earth fault) according to equation 12.
U L1
Z app = ------------------------------
I L1 + I N ⋅ KN
(Equation 12)
Where:
KN is defined as:
X0 - X1
KN =
3X1
Here IN is a phasor of the residual current at the relay point. This results in the same reach along
the line for all types of faults.
The formula given in equation 12 is only valid for no loaded radial feeder applications. When
load is considered in the case of single line to earth fault, conventional distance protection might
filter.
120
X Δi
U = R ⋅ i + ------ ⋅ -----
ω 0 Δt
(Equation 13)
X Δ Re ( I )
Re ( U ) = R ⋅ Re ( I ) + ------ ⋅ ------------------
ω0 Δt
(Equation 14)
X ΔIm ( I )
Im ( U ) = R ⋅ Im ( I ) + ------ ⋅ -----------------
ω0 Δt
(Equation 15)
with
ω0 = 2 ⋅ π ⋅ f 0
(Equation 16)
where:
Im ( U ) ⋅ ΔRe ( I ) – Re ( U ) ⋅ Δ Im ( I )
R m = ------------------------------------------------------------------------------------
ΔRe ( I ) ⋅ Im ( I ) – Δ Im ( I ) ⋅ Re ( I )
(Equation 17)
Re ( U ) ⋅ Im ( I ) – Im ( U ) ⋅ Re ( I )
Xm = ω 0 ⋅ Δt ⋅ -------------------------------------------------------------------------------
ΔRe ( I ) ⋅ Im ( I ) – ΔIm ( I ) ⋅ Re ( I )
(Equation 18)
121
factors.
2.2.5 Directionality for series compensation

In the basic distance protection function, the control of the memory for polarizing voltage is per-
formed by an under voltage control. In case of series compensated line, a voltage reversal can
occur with a relatively high voltage also when the memory must be locked. Thus, a simple un-
dervoltage type of voltage memory control can not be used in case of voltage reversal. In the
option for series compensated network the polarizing quantity and memory are controlled by an
impedance measurement criterion.
The polarizing voltage is a memorized positive sequence voltage. The memory is continuously
synchronized via a positive sequence filter. The memory is starting to run freely instantaneously
when a voltage change is detected in any phase. A non-directional impedance measurement is
used to detect a fault and identify the faulty phase or phases.
At a three phase fault when no positive sequence voltage remains (all three phases are discon-
nected) the memory is used for direction polarization during 100 ms.
The memory predicts the phase of the positive sequence voltage with the pre-fault frequency.
This extrapolation is made with a high accuracy and it is not the accuracy of the memory that
limits the time the memory can be used. The network is at a three phase fault under way to a new
equilibrium and the post-fault condition can only be predicted accurately for a limited time from
the pre-fault condition.
In case of a three phase fault after 100 ms the phase of the memorized voltage can not be relied
upon and the directional measurement has to be blocked. The achieved direction criteria are
sealed-in when the directional measurement is blocked and kept until the impedance fault crite-
ria is reset (the direction is stored until the fault is cleared).
This memory control allows in the time domain unlimited correct directional measurement for
all unsymmetrical faults also at voltage reversal. Only at three phase fault within the range of
the set impedance reach of the criteria for control of the polarization voltage the memory has to
be used and the measurement is limited to 100 ms and thereafter the direction is sealed-in. The
special impedance measurement to control the polarization voltage is set separately and has only
to cover (with some margin) the impedance to fault that can cause the voltage reversal.
The evaluation of the directionality takes place in the function block ZDS. Equation 19 and
equation 20 are used to classify that the fault is in forward direction for line-to-earth fault and
phase-phase fault.
U 1L1M
− ArgDir < arg < ArgNeg Re s
I L1
(Equation 19)
122
For the L1-L2 element, the equation in forward direction is according to.
U 1L1L 2 M
I L1L 2
(Equation 20)
where:
U1L1L2M is memorized voltage difference between phase L1 and L2 (L2 lagging L1)
IL1L2 is current difference between phase L1 and L2 (L2 lagging L1)
The setting of ArgDir and ArgNegRes is by default set to 15 (= -15) and 115 degrees respective-
ly.(see figure 71) and it should not be changed unless system studies have shown the necessity.
The ZDS gives a binary coded signal on the output STDIR depending on the evaluation where
STFWL1N=1 adds 1, STRVL1N=1 adds 2, STFWL2N=1 adds 4 etc.
ArgNegRes
ArgDir
R
en05000722.vsd
123

180 degrees.

The design of distance protection zone 1 is presented for all measuring loops: phase-to-earth as
well as phase-to-phase.
phase number (L1E, L2E, and L3E). The phase-to-phase signals are designated by LnLm, where
n and m represent the corresponding phase numbers (L1L2, L2L3, and L3L1).

above.
function block output STCDZ.
The internal input signal DIRCND is used to give condition for directionality for the distance
measuring zones. The signal contains binary coded information for both forward and reverse di-
rection. The zone measurement function filter out the relevant signals on the STDIR input de-
pending on the setting of the parameter OperationDir. It shall be configured to the STDIR output
on the ZDS block.
124
125
126
STNDL1N
AND
DIRL1N
OR STZMPE.
&
STNDL2N
DIRL2N AND
STNDL3N 15 ms
OR STL1
& t
DIRL3N AND
STNDL1L2
DIRL1L2 AND 15 ms
OR STL2
& t
STNDL2L3
DIRL2L3 AND
15 ms
OR STL3
STNDL3L1 & t
DIRL3L1 AND
OR STZMPP
&
BLK
15 ms
OR START
& t
en05000778.vsd
Tripping conditions for the distance protection zone one are symbolically presented in figure 75.
127
2.3 Function block
ZMC1-
ZMCPDIS_21
I3P TRIP
U3P TRL1
BLOCK TRL2
VTSZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND
en07000036.vsd
Figure 75: ZMC function block
ZDS1-
ZDSRDIR
I3P STFW
U3P STRV
STDIRCND
en07000035.vsd
Figure 76: ZDS function block
128

Table 67: Input signals for the ZMCPDIS_21 (ZMC1-) function block
Signal Description
VTSZ Blocks all output by fuse failure signal
Table 68: Output signals for the ZMCPDIS_21 (ZMC1-) function block
Signal Description
Table 69: Input signals for the ZDSRDIR (ZDS1-) function block
Signal Description
I3P Group connection for current
U3P Group connection for voltage
Table 70: Output signals for the ZDSRDIR (ZDS1-) function block
Signal Description
STFW Start in forward direction
STRV Start in reverse direction
STDIRCND Binary coded directional information per measuring loop
129

Table 71: Basic parameter group settings for the ZMCPDIS_21 (ZMC1-) function
On
current
voltage
Forward Rev
Reverse
OperationPP Off - On - Operation mode Off / On
On of Phase-Phase loops
X1FwPP 0.50 - 3000.00 0.01 30.00 ohm/p Positive sequence reac-
tance reach, Ph-Ph, for-
ward
R1PP 0.10 - 1000.00 0.01 5.00 ohm/p Positive seq. resistance
for characteristic angle,
Ph-Ph
RFFwPP 1.00 - 3000.00 0.01 30.00 ohm/l Fault resistance reach,
Ph-Ph, forward
X1RvPP 0.50 - 3000.00 0.01 30.00 ohm/p Positive sequence reac-
tance reach, Ph-Ph,
reverse
RFRvPP 1.00 - 3000.00 0.01 30.00 ohm/l Fault resistance reach,
Ph-Ph, reverse
Timer tPP Off - On - Operation mode Off / On
On of Zone timer, Ph-Ph
tPP 0.000 - 60.000 0.001 0.000 s Time delay of trip, Ph-Ph
OperationPE Off - On - Operation mode Off / On
On of Phase-Earth loops
X1FwPE 0.50 - 3000.00 0.01 30.00 ohm/p Positive sequence reac-
tance reach, Ph-E, for-
ward
R1PE 0.10 - 1000.00 0.01 5.00 ohm/p Positive seq. resistance
for characteristic angle,
Ph-E
X0PE 0.50 - 9000.00 0.01 100.00 ohm/p Zero sequence reactance
reach, Ph-E
R0PE 0.50 - 3000.00 0.01 47.00 ohm/p Zero seq. resistance for
zone characteristic angle,
Ph-E
RFFwPE 1.00 - 9000.00 0.01 100.00 ohm/l Fault resistance reach,
Ph-E, forward
130

X1RvPE 0.50 - 3000.00 0.01 30.00 ohm/p Positive sequence reac-
tance reach, Ph-E,
reverse
RFRvPE 1.00 - 9000.00 0.01 100.00 ohm/l Fault resistance reach,
Ph-E, reverse
loops
loops
ual current for
Phase-Earth loops
2.6 Technical data

Table 72: Distance measuring zone, quadrilateral characteristic for series compensated
lines (PDIS, 21)
racy
Conditions:
Fault resistance, Ph-Ph (1.00-3000.00) Ω/loop
85 degrees
131
Full-scheme distance measuring, Mho Chapter 5
characteristic, PDIS 21 Impedance protection
3 Full-scheme distance measuring, Mho

characteristic, PDIS 21
Function block name: ZMHx-- IEC 60617 graphical symbol:

ANSI number: 21
ZMHPDIS
3.1 Introduction
The numerical mho line distance protection is a five zone full scheme protection for detection
of short circuit and earth faults. The full scheme technique provides protection of power lines
with high sensitivity and low requirement on remote end communication. The five zones have
fully independent measuring and settings which gives high flexibility for all types of lines.
The modern technical solution offers fast operating time down to 3/4 cycles.
The IED can be used up to the highest voltage levels. It is suitable for the protection of heavily
loaded lines and multi-terminal lines where the requirement for tripping is one, two-, and/or
three pole.
to-reclosing.
Built-in adaptive load compensation algorithm prevents overreaching at phase-to-earth faults on

heavily loaded power lines, see figure 78.
132
jX
Operation area Operation area
Operation area
No operation area No operation area
en07000117.vsd
Figure 77: Load encroachment influence on the offset mho characteristic
The possibility to use the phase-to-earth quadrilateral impedance characteristic together with the
mho characteristic increases the possibility to overcome eventual lack of sensitivity of the mho
element due to the shaping of the curve at remote end faults.
The integrated control and monitoring functions offers effective solutions for operating and
monitoring all types of transmission and sub transmission lines.

The execution of the different fault loops within the REx 6xx are of full scheme type, which
means that each fault loop for phase to earth faults and phase to phase faults are executed in par-
allel.
The use of full scheme technique gives faster operation time compare to switched schemes
So each distance protection zone performs like one independent distance protection relay with
six measuring elements.

The distance function consists of five instances. Each instance can be selected to be either for-
ward or reverse with cross polarized mho characteristic alternatively self polarized offset Mho
characteristics with reverse offset. The operating characteristic is in accordance to figure 79 be-
low where zone5 is selected offset Mho.
133
jX X
Mho, zone4
Mho, zone3
Zs=0
Mho, zone2
R
Mho, zone1
Zs=Z1
Zs=2Z1
Offset mho, zone5
en06000400.vsd
Figure 78: Mho, offset Mho characteristic and the source impedance influence on the Mho
characteristic
The mho characteristic has a dynamic expansion due to the source impedance. Instead of cross-
ing the origin as for the offset mho in the left figure 79, which is only valid where the source
impedance is zero, the crossing point is moved to the coordinates of the negative source imped-
ance given an expansion of the circle shown in the right figure 79.
The polarisation quantities used for the mho circle is 100% memorized positive sequence volt-
ages. This will give a somewhat less dynamic expansion of the mho circle during faults. How-
ever, if the source impedance is high, the dynamic expansion of the mho circle might lower the
security of the function too much with high loading and mild power swing conditions.
The mho distance element has a load encroachment function which cut off a section of the char-
acteristic when enabled. The function is enabled by setting the setting parameter LoadEnchMode
to On. Enabling of the load encroachment function increases the possibility to detect high resis-
tive faults without interfering with the load impedance. The algorithm for the load encroachment
is located in the PHSM function, where also the relevant settings can be found. Information
about the load encroachment from the PHS to the zone measurement is given in binary format
to the input signal LDCND.
3.2.3 Basic operation characteristics

Each impedance zone can be switched On and Off by the setting parameter Operation.
Each zone can also be set to Non-directional, Forward or Reverse by setting the parameter
DirMode .
The operation for phase to earth and phase to phase fault can be individually switched On and
Off by the setting parameter OpModePE and OpModePP.
134
For critical applications such as for lines with high SIRs as well as CVTs, it is possible to im-
prove the security by setting the parameter ReachMode to Underreach. In this mode the reach
for faults close to the zone reach is reduced by 20% and the filtering is also introduced to in-
crease the accuracy in the measuring. If the ReachMode is set to Overreach no reduction of the
reach is introduced and no extra filtering introduced. The latter setting is recommended for over-
reaching pilot zone, zone 2 or zone 3 elements and reverse zone where overreaching on tran-
sients is not a major issue either because of less likelihood of overreach with higher settings or
the fact that these elements do not initiate tripping unconditionally.
The offset mho characteristic can be set in Non-directional, Forward or Reverse by the setting
parameter OffsetMhoDir. When Forward or Reverse is selected a directional line is introduced.
Information about the directional line is given from the directional element and given to the mea-
suring element as binary coded signal to the input DIRCND.
The zone reach for phase to earth fault and phase to phase fault is set individually in polar coor-
dinates. The impedance is set by the parameters ZPE and ZPP and the corresponding arguments
by the parameters ZAngPE and ZAngPP.
Compensation for earth return path for faults involving earth is done by setting the parameter
KNMag and KNAng where KNMag is the magnitude of the earth return path and KNAng is the
difference of angles between KNMag and ZPE. KNMag and KNAng are defined according to
equation 21 and equation 22.
Z0-Z1
KNMag =
3 ⋅ Z1
(Equation 21)
⎛ Z0-Z1 ⎞
KNAng = ( ZAngPE ) − arg ⎜ ⎟
⎝ 3 ⋅ Z1 ⎠
(Equation 22)
Where:
Z0 is the complex zero sequence impedance of the line in ohm/phase
Z1 is the complex positive sequence impedance of the line in ohm/phase
ZAngPE line angle of the positive line impedance
The phase-to-earth and phase-to-phase measuring loops can be time delayed individually by set-
ting the parameter tPE and tPP respectively. To release the time delay, the operation mode for
the timers, OpModetPE and OpModetPP, has to be set to On. This is also the case for instanta-
neous operation.
The function can be blocked in the following ways:
• activating of input BLOCK blocks the whole function
135
• activating of the input BLKZ (fuse failure) blocks all output signals
• activating of the input BLKZMTD blocks the delta based algorithm
• activating of the input BLKHSIR blocks the instantaneous part of the algorithm
for high SIR values
• activating of the input BLKTRIP blocks all output signals
• activating the input BLKPE blocks the phase-to-earth fault loop outputs
• activating the input BLKPP blocks the phase-to-phase fault loop outputs
The activation of signal BLKZ can either be by external fuse failure function or from the loss of
voltage check in the Mho supervision logic (ZSMGAPC). In both cases the output BLKZ in the
Mho supervision logic shall be connected to the input BLKZ in the Mho distance function block
(ZMHODIS 21).
The input signal BLKZMTD is activated during some ms after fault has been detected by the
Mho supervision logic to avoid unwanted operations due to transients. It shall be connected to
the BLKZMTD output signal at the Mho supervision function.
At SIR values >10, the use of electronic CVT might cause overreach due to the built in resonance
circuit in the CVT which reduce the secondary voltage for a while. The input BLKHSIR shall
be connected to the output signal HSIR on the Mho supervision logic for increasing of the fil-
tering and high SIR values. This is valid only when permissive underreach scheme is selected
by setting ReachMode=Underreach.
3.2.4 Theory for operation

The Mho algorithm is based on phase comparison of a operating phasor and a polarizing phasor.
When the operating phasor leads the reference phasor by more than 90 degrees, the function will
operate and give a trip output.
Phase-to-phase fault
Mho
The plain Mho circle has the characteristic as figure 80The condition for deriving the angle β is
according to equation 23.
β = arg(U L1 L 2 − I L1 L 2 ⋅ ZPP ) − arg(U pol )

(Equation 23)
136
where:
the voltage vector difference between phases L1 and L2
U L1 L 2
the current vector difference between phases L1 and L2
I L1 L 2
ZPP the positive sequence impedance setting for phase to phase fault
Upol is the polarizing voltage
The polarized voltage consists of 100% memorized positive sequence voltage (UL1L2 for phase
L1 to L2 fault). The memorized voltage will prevent collapse of the Mho circle for close in
faults.
Operation occurs if 90≤β≤270
IL1L2·X
Ucomp = UL1L2 - IL1L2 • ZPP
IL1L2 • ZPP
ß
Upol
UL1L2
IL1L2·R
en07000109.vsd
Figure 79: Simplified mho characteristic and vectordiagram for phase L1 to L2 fault.
137
Offset Mho
The characteristic for offset mho is a circle where two points on the circle are the setting param-
eters ZPP and ZRevPP. The vector ZPP in the impedance plane has the settable angle AngZPP
and the angle for ZRevPP is AngZPP+180°.
The condition for operation at phase to phase fault is that the angle β between the two compen-
sated voltages Ucomp1 and Ucomp2 is greater or equal to 90° figure 81. The angle will be 90°
for fault location on the boundary of the circle.
The angle β for L1 to L2 fault can be defined according to equation 24.
⎛ U -IL1L2 ⋅ ZPP⎞
β = arg ⎜ ⎟
⎝ U-(-IL1L2 ⋅ ZRevPP) ⎠
(Equation 24)
where:
= is the UL1L2 voltage
ZRevPP = is the positive sequence impedance setting for phase to phase fault in reverse direction
IL1L2jX
Ucomp1 = UL1L2 - IL1L2 • ZPP

IL1L2 • ZPP
U
Ucomp2 = U = IF•ZF=UL1L2
IL1L2R
- IL1L2 • Z RevPP
en07000110.vsd
Figure 80: Simplified offset mho characteristic and voltage vectors for phase L1 to L2 fault.
138
For operation the angle β should be 90<β<270.
Offset Mho, forward direction

When forward direction has been selected for the offset mho, an extra criteria beside the one for
offset mho equation 25 is introdced, that is the angle ϕ between the voltage and the current must
lie between the blinders in second quadrant and fourth quadrant. See figure 82 below. So the
condition for operation will be
90 < β < 270

(Equation 25)
and
ArgDir < ϕ < ArgNegR e s

(Equation 26)
where
ArgDir is the setting parameter for directional line in fourth quadrant
ArgNegRes is the setting parameter for directional line in second quadrant
β is calculated according to equation 24
The directional information is brought to the mho distance measurement from the mho direc-
tional element as binary coded information to the input DIRCND. See chapter Mho directional
element for information about the mho directionalety element.
139
IL1L2jX
ZPP
UL1L2
ArgNegRes f
IL1L2
ArgDir
en07000111.vsd
Figure 81: Simplified offset mho characteristic in forward direction for phase L1 to L2 fault.
Offset Mho, reverse direction

The operation area for offset Mho in reverse direction is according to figure 83. The operation
area in second quadrant is ArgNegRes+180°.
The conditions for operation are
90 < β < 270

(Equation 27)
and
180° − ArgDir < ϕ < ArgNeg Re s + 180°

(Equation 28)
The β is derived according to equation 24 for the mho circle and ϕ is the angle between the volt-
age and current.
140
ZPP
ArgNegRes
ϕ
IL1L2
ArgDir R
UL1L2
ZRevPP
en06000469.eps
Figure 82: Operation characteristice for reverse phase L1–phase L2 fault.
Phase-to-earth fault
Mho
The measuring of earth faults uses earth return compensation applied in a conventional way. The
compensation voltage is derived by considering the influence from the earth return path.
For a earth fault in phase L1A, we can derive the compensation voltage Ucomp see figure 84 as
Ucomp = U pol − I L1 ⋅ Z loop

(Equation 29)
141
where
Upol is the polarizing voltage (memorized UL1 for Phase L1 to earth fault)
Zloop is the loop impedance, which in general terms can be expressed as
(
Z1+ZN = Z 1 ⋅ 1 + KN )
where
Z1 positive sequence impedance of the line (Ohm/phase)
KN zero sequence compensator factor
The angle β between the Ucomp and the polarize voltage Upol for a L1 to earth fault is
( )
β = arg ⎡ U L1 − I L1 + IN ⋅ KN ⋅ ZPE ⎤ − arg(Upol)
⎣ ⎦
(Equation 30)
where:
UL1 = phase voltage in faulty phase L1
IL1 = phase current in faulty phase L1
IN = zero sequence current in faulty phase L1
Z0-Z1
= the setting parameter for the zero swquence compensation consisting of the magni-
KN 3 ⋅ Z1 tude KN and the angle KNAng.
Upol = 100% of positive sequence memorized voltage UL1
It is to be noted that the angle KNAng is the difference angle between the positive sequence im-
pedance ZPE and the impedance ZN for the earth return path see figure 84
142
IL1·X KNAng
IL1·ZN
Ucomp
IL1• Zloop
IL1·ZPE
Upol
f
IL1 (Ref) IL1·R
en06000472.vsd
Figure 83: Simplified offset mho characteristic and vectordiagram for phase L1 to earth fault.
Operation occurs if
90 ≤ β ≤ 270
(Equation 31)
Offset Mho
The characteristic for offset mho at earth fault is a circle containing the two vectors from the or-
igin ZPE and ZRevPE where ZPE and ZrevPE are the settting reach for the positive sequence
impedance in forward respective reverse direction. The vector ZPE in the impedance plane has
the settable angle AngZPE and the angle for ZRevPP is AngZPE+180°
The condition for operation at phase to earth fault is that the angle β between the two compen-
sated voltages Ucomp1 and Ucomp2 is greater or equal to 90° see 85. The angle will be 90° for
fault location on the boundary of the circle.
The angle β for L1 to earth fault can be defined as
⎛ UL1- IL1L ⋅ ZPE ⎞

β = arg ⎜ ⎟
⎝ UL1-(- IL1 ⋅ Z Re vPE ) ⎠
⎛ VL1- IL1L ⋅ ZPE ⎞
β = arg ⎜ ⎟
⎝ VL1-(- IL1 ⋅ Z Re vPE ) ⎠
(Equation 32)
143
where
is the phase L1 phase voltage
U L1
144
IL1L 2 • jX
U comp1 = UL1 - I L1• ZPE

IL1 • ZPE
UL1
U comp2 = UL1 - (-IL1 • ZRevPE)
IL1L2 • R
- I L1 • Z Re vPe
en 06000465. vsd
IAB•jX
V comp1 = VA - IA • ZPE
IA • ZPE
VA
V comp2 = VA - (-IA • ZRevPE)
I AB • R
- IA • Z RevPe
en 06000465_ansi. vsd
Figure 84: Simplified offset mho characteristic and voltage vector for phase L1 to L2 fault.
Operation occurs if
145
90 ≤ β ≤ 270
(Equation 33)
Offset Mho, forward direction

In the same way as for phase-to-phase fault, selection of forward direction of offset mho will
introduce an extra criteria for operation. Beside the basic criteria for offset mho according to
equations 32 and 33, also the criteria that the angle ϕ between the voltage and the current must
lie between the blinders in second and fourth quadrant. See figure 86. The condition for opera-
tion will hereby be 90<β<270 and ArgDir<ϕ<ArgNegRes.
where
ArgDir is the setting parameter for directional line in fourth quadrant
ArgNegRes is the setting parameter for directional line in second quadrant.
β is calculated according to equation 32
IL1 jX
UL1
ArgNegRes f
IL1 IL1·R
ArgDir
en 06000466.vsd
Figure 85: Simplified characteristic for offset mho in forward direction for L1 to earth fault.
146
Offset mho, reverse direction

In the same way as for offset in forward direction, the selection of offset mho in reverse direction
will introduce an extra criteria for operation compare to the normal offset Mho. The extra is that
the angle between the fault voltage and the fault current shall lie between the blinders in second
and fourth quadrant. The operation area in second quadrant is limited by the blinder defined as
180° -ArgDir and in fourth quadrant ArgNegRes+180°, see figure 87
The conditions for operation of offset Mho in reverse direction for L1 to earth fault will be
90<β<270 and 180°-Argdir<ϕ<ArgNegRes+180°.
The β is derived according to equation 32 for the offset Mho circle and ϕ is the angle between
the voltage and current.
147
ZPE
ArgNegRes
ϕ
IL1
ArgDir R
UL1
ZRevPE
en06000470.eps
148
ZPE
ArgNegRes
ϕ
IA
ArgDir R
VA
ZRevPE
en06000470_ansi.eps
Figure 86: Simplified characteristic for offset Mho in reverse direction for L1 to earth fault.
3.3 Function block
ZMH1-
ZMHPDIS_21
I3P TRIP
U3P TRL1
CURR_INP TRL2
VOLT_INP TRL3
POL_VOLT TRPE
BLOCK TRPP
BLKZ START
BLKZMTD STL1
BLKHSIR STL2
BLKTRIP STL3
BLKPE STPE
BLKPP STPP
DIRCND
STCND
LDCND
en06000423.vsd
Figure 87: ZMH function block
149

Table 73: Input signals for the ZMHPDIS_21 (ZMH1-) function block
Signal Description
I3P Connection for current sample signals
U3P Connection for voltage sample signals
CURR_INP Connection for current signals
VOLT_INP Connection for voltage signals
POL_VOLT Connection for polarizing voltage
BLKZ Block due to fuse failure
BLKZMTD Block signal for blocking of time domaine function
BLKHSIR Blocks time domain function at high SIR
BLKTRIP Blocks all operate output signals
BLKPE Blocks phase-to-earth operation
BLKPP Blocks phase-to-phase operation
LDCND External load condition (loop enabler)
Table 74: Output signals for the ZMHPDIS_21 (ZMH1-) function block
Signal Description
TRIP Trip General
TRL1 Trip phase L1
TRL2 Trip phase L2
TRL3 Trip phase L3
TRPE Trip phase-to-earth
TRPP Trip phase-to-phase
START Start General
STL1 Start phase L1
STL2 Start phase L2
STL3 Start phase L3
STPE Start phase-to-earth
STPP Start phase-to-phase
150

Table 75: Basic parameter group settings for the ZMHPDIS_21 (ZMH1-) function
Operation Off - ON - Operation Off/On
ON
IBase 1 - 99999 1 3000 A Base current
DirMode Off - Forward - Direction mode
Offset
Forward
Reverse
LoadEnchMode Off - Off - Load enchroachment
ON mode Off/On
ReachMode OverReach - OverReach - Reach mode
Underreach Over/Underreach
OpModePE Off - ON - Operation mode Off / On
ON of Phase-Earth loops
ZPE 0.005 - 3000.000 0.001 30.000 ohm/p Positive sequence
impedance setting for
Phase-Earth loop
ZAngPE 10 - 90 1 80 Deg Angle for positive
sequence line impedance
for Phase-Earth loop
KN 0.00 - 3.00 0.01 0.80 - Magnitud of earth return
compensation factor KN
KNAng -180 - 180 1 -15 Deg Angle for earth return
compensation factor KN
ZRevPE 0.005 - 3000.000 0.001 30.000 ohm/p Reverse reach of the
phase to earth loop(mag-
nitude)
tPE 0.000 - 60.000 0.001 0.000 s Delay time for operation
of phase to earth ele-
ments
IMinOpPE 10 - 30 1 20 %IB Minimum operation
phase to earth current
OpModePP Off - ON - Operation mode Off / On
ON of Phase-Phase loops
151

ZPP 0.005 - 3000.000 0.001 30.000 ohm/p Impedance setting reach
for phase to phase ele-
ments
ZAngPP 10 - 90 1 85 Deg Angle for positive
sequence line impedance
for Phase-Phase ele-
ments
ZRevPP 0.005 - 3000.000 0.001 30.000 ohm/p Reverse reach of the
phase to phase
loop(magnitude)
tPP 0.000 - 60.000 0.001 0.000 s Delay time for operation
of phase to phase
IMinOpPP 10 - 30 1 20 %UB Minimum operation
phase to phase current
Table 76: Advanced parameter group settings for the ZMHPDIS_21 (ZMH1-) function
OffsetMhoDir Non-directional - Non-directional - Direction mode for offset
Forward mho
Reverse
OpModetPE Off - ON - Operation mode Off / On
ON of Zone timer, Ph-E
OpModetPP Off - ON - Operation mode Off / On
ON of Zone timer, Ph-ph
Table 77: Basic parameter group settings for the ZSMGAPC (ZSM1-) function
IBase 1 - 99999 1 3000 A Base value for current
measurement
UBase 0.05 - 2000.00 0.05 400.00 kV Base value for voltage
measurement
PilotMode Off - Off - Pilot mode Off/On
On
Zreach 0.1 - 3000.0 0.1 38.0 ohm Line impedance
IMinOp 10 - 30 1 20 %IB Minimum operating cur-
rent for SIR measure-
ment
152
Table 78: Advanced parameter group settings for the ZSMGAPC (ZSM1-) function
DeltaI 0 - 200 1 10 %IB Current change level in
%IB for fault inception
detection
Delta3I0 0 - 200 1 10 %IB Zero seq current change
level in % of IB
DeltaU 0 - 100 1 5 %UB Voltage change level in
%UB for fault inception
detection
Delta3U0 0 - 100 1 5 %UB Zero seq voltage change
level in % of UB
SIRLevel 5 - 15 1 10 - Settable level for source
impedance ratio
3.6 Technical data

Table 79: Full-scheme distance protection, Mho characteristic (PDIS, 21)
Number of zones with selectable 5 with selectable direction -
directions
Minimum operate current (10–30)% of IBase -
Positive sequence impedance, (0.005–3000.000) Ω/phase ± 2.0% static accuracy
phase–earth loop
Conditions:
Positive sequence impedance (10–90) degrees Voltage range: (0.1-1.1) x Ur
angle, phase–earth loop
Reverse reach, phase–earth loop (0.005–3000.000) Ω/phase
(Magnitude) Angle: at 0 degrees and
85 degrees
Impedance reach for (0.005–3000.000) Ω/phase
phase–phase elements
Angle for positive sequence (10–90) degrees
impedance, phase–phase ele-
ments
Reverse reach of phase–phase (0.005–3000.000) Ω/phase
loop
Magnitude of earth return com- (0.00–3.00)
pensation factor KN
Angle for earth compensation fac- (-180–180) degrees
tor KN
CVT’s and 0.5<SIR<30
Timers (0.000-60.000) s ± 0.5% ± 10 ms
Operate time 15 ms typically (with static out- -
puts)
153
Mho impedance supervision logic Chapter 5
4 Mho impedance supervision logic
4.1 Introduction
The Mho impedance supervision logic includes features for fault inception detection and high
SIR detection. It also includes the functionality for loss of potential logic as well as for the pilot
channel blocking scheme.
The Mho Impedance Supervision logic can mainly be decomposed in two different parts:
1. A fault inception detection logic

2. High SIR detection logic

4.2.1 Fault inception detection
The aim for the fault inception detector is to very fast detect that a fault has occurred on the sys-
tem.
The fault inception detection detects instantaneous changes in any phase currents or zero se-
quence current in combination with a change in the corresponding phase voltage or zero se-
quence voltage. If the change of any phase current and corresponding phase voltage or 3U0 and
3I0 exceeds the setting parameters DeltaI and DeltaU respectively Delta3U0 and Delta3I0 and
the input signal BLOCK is not activated, the ouput signal FLTDET is activated indicating that
a system fault has occoured.
If the setting pilotMode is set to On in Blocking scheme and the fault inception function has de-
tected a system fault, a block signal BLKCHST will be issued and send to remote end in order
to block the overreaching zones. Different criteria has to be fulfilled for sending the BLKCHST
signal:
1. The setting parameter pilotMode has to be set to On

2. The breaker has to be closed, i.e. the input signal CBOPEN has to be deactivated
3. A reverse fault should have been detected while the carrier send signal is not
blocked, i.e. input signal REVSTART is activated and input signal BLOCKCS is
not activated
OR
A fault inception is detected
If it is later detected that it was an internal fault that made the function issue the BLKCHST sig-
nal, the function will issue a CHSTOP signal to unblock the remote end. The criteria that have
to be fulfilled for this are:
1. The function has to be in pilot mode, i.e. the setting parameter pilotMode has to
be set to On
2. The carrier send signal should be blocked, i.e. input signal BLOCKCS is On and,
154
3. A reverse fault should not have been detected while the carrier send signal was
not blocked, i.e.input signals REVSTART and BLOCKCS is not activated.
The function has a built in loss of voltage detection based on the evaluation of the change in
phase voltage or the change in zero sequence voltage (3U0). It operates if the change in phase
voltages exceeds the setting dULevel or 3U0 exceeds the setting dU0Level.
If loss of voltage is detected, but not a fault inception, the distance protection function will be
blocked. This is also the case if a fuse failure is detected by the external fuse failure function and
activate the input FUSEFAIL. Those blocks are generated by activating the output BLKZ, which
shall be connected to the input BLKZ on the distance Mho function block.
During fault inception a lot of transients will be developed which in turn might cause the dis-
tance function to overreach. The Mho supervision logic will increase the filtering during the
most transient period of the fault. This is done by activating the output BLKZMD, which shall
be connected to the input BLKZMTD on mho distance function block.
High SIR detection

High SIR values increases the likelihood that CVT will introduce a prolonged and distorted tran-
sient, increasing the risk for overreach of the distance function.
The SIR function calculates the SIR value as the source impedance divided by the setting Zreach
and activates the output signal HSIR if the calculated value for any of the six basic shunt faults
exceed the setting parameter SIRLevel.The HSIR signal is intended to block the delta based mho
impedance function.
4.3 Function block
ZSM1-
ZSMGAPC
I3P BLKZMTD
U3P BLKCHST
BLOCK CHSTOP
REVSTART HSIR
BLOCKCS
CBOPEN
en06000426.vsd
ZSM1-
ZSMGAPC
I3P BLKZMTD
V3P BLKCHST
BLOCK CHSTOP
REVSTART HSIR
BLOCKCS
CBOPEN
en06000426_ansi.vsd
Figure 88: ZSM1 function block
155

Table 80: Input signals for the ZSMGAPC (ZSM1-) function block
Signal Description
I3P Three phase current samples and DFT magnitude
U3P Three phase phase-neutral voltage samples and DFT magni-
tude
BLOCK Block of the function
REVSTART Indication of reverse start
BLOCKCS Blocks the blocking carrier signal to remote end
CBOPEN Indicates that the breaker is open
Table 81: Output signals for the ZSMGAPC (ZSM1-) function block
Signal Description
BLKZMTD Block signal for blocking of time domained mho
BLKCHST Blocking signal to remote end to block overreaching zone
CHSTOP Stops the blocking signal to remote end
HSIR Indication of source impedance ratio above set limit

Table 82: Basic parameter group settings for the ZSMGAPC (ZSM1-) function
measurement
measurement
PilotMode Off - Off - Pilot mode Off/On
On
Zreach 0.1 - 3000.0 0.1 38.0 ohm Line impedance
IMinOp 10 - 30 1 20 %IB Minimum operating cur-
rent for SIR measure-
ment
156
Table 83: Advanced parameter group settings for the ZSMGAPC (ZSM1-) function
DeltaI 0 - 200 1 10 %IB Current change level in
%IB for fault inception
detection
Delta3I0 0 - 200 1 10 %IB Zero seq current change
level in % of IB
DeltaU 0 - 100 1 5 %UB Voltage change level in
%UB for fault inception
detection
Delta3U0 0 - 100 1 5 %UB Zero seq voltage change
level in % of UB
SIRLevel 5 - 15 1 10 - Settable level for source
impedance ratio
157
Phase selection with load encroachment Chapter 5
(PDIS, 21) Impedance protection
5 Phase selection with load encroachment

(PDIS, 21)
Function block name: PHS- IEC 60617 graphical symbol:

ANSI number: 21
FDPSPDIS
Z<phs
5.1 Introduction
The operation of transmission networks today is in many cases close to the stability limit. Due
to environmental considerations the rate of expansion and reinforcement of the power system is
reduced e.g. difficulties to get permission to build new power lines. The ability to accurately and
reliable classify the different types of fault so that single pole tripping and auto-reclosing can be
used plays an important roll in this matter. The phase selection function is designed to accurately
select the proper fault loop in the distance function dependent on the fault type.
The heavy load transfer that is common in many transmission networks may make fault resis-
tance coverage difficult to achieve. Therefore the function has a built in algorithm for load en-
croachment, which gives the possibility to enlarge the resistive setting of both the phase
selection and the measuring zones without interfering with the load.
The extensive output signals from the phase selection gives also important information about
faulty phase(s) which can be used for fault analysis.

The basic impedance algorithm for the operation of the phase-selection measuring elements is
the same as for the distance-measuring function (see section 1 "Distance measuring zones, quad-
rilateral characteristic (PDIS, 21)"). The "phase selection" includes six impedance measuring
loops; three intended for phase-to-earth faults, and three intended for phase-to-phase as well as
for three-phase faults.
The difference, compared to the zone measuring elements, is in the combination of the measur-
ing quantities (currents and voltages) for different types of faults.
The characteristic is basically non-directional, but the PHS function uses information from the
directional function block to discriminate whether the fault is in forward or reverse. The direc-
tional lines are drawn as "line-dot-dot-line" in the figures below.
The start condition STCNDZ is essentially based on the following criteria:
1. Residual current criteria, i.e. separation of faults with and without earth connec-
tion
2. Regular quadrilateral impedance characteristic
158
3. Load encroachment characteristics is always active but can be switched off by se-
lecting a high setting.
The current start condition STCNDI is based on the following criteria:
1. Residual current criteria

2. No quadrilateral impedance characteristic. The impedance reach outside the load
area is theoretically infinite. The practical reach, however, will be determined by
the minimum operating current limits.
3. Load encroachment characteristic is always active, but can be switched off by se-
lecting a high setting.
The STCNDI-output described above is non-directional. The directionality is determined by the

distance zones direction function block. There are still output from the function that indicate
whether a start is in forward or reverse direction, or in between those (e.g. STFWL1 and
STRVL1, and NDIR_A). These directional indications are based on the sector boundaries of the
directional function and the impedance setting of the phase selection function. Their operate
characteristics are illustrated in figure 90.
X X X
60°
60° R
R R
60° 60°
Non-directional (ND) Forward (FW) Reverse (RV)
en05000668.vsd
Figure 89: Characteristic for non-directional, forward and reverse operation of PHS
The setting of the load encroachment function may influence the total operating characteristic,
(for more information, refer to section 5.2.4 "Load encroachment").
The input DIRCND contains binary coded information about the directional coming from the
directionality block. It shall be connected to the STDIR output on the ZD block. This informa-
tion is also transferred to the input DIRCND on the distance measuring zones, i.e. the ZM block.
The code built up for the directionality is as follows:
159
STDIR=STFWL1*1+STFWL2*4+STFWL3*16+STFWL1L2*64+STFWL2L3*256+STFWL
3L1*1024+STRVL1*2+STRVL2*8+STRVL3*32+STRVL1L2*128+STRVL2L3*512+STR
VL3L1*2048
If the binary information is 1 then it will be considered that we have start in forward direction in
phase L1. If the binary code is 5 then we have start in forward direction in phase L1 and L2 etc.
The STCND (Z or I) output contains, in a similar way as DIRCND, binary coded information,
in this case information about the condition for opening correct fault loop in the distance mea-
suring element. It shall be connected to the STCND input on the ZM blocks. The code built up
for release of the measuring fault loops is as follows:
STCND = L1N*1 + L2N*2 + L3N*4 + L1L2*8 + L2L3*16 + L3L1*32
5.2.1 Phase-to-earth fault

For a phase-to-earth fault, the measured impedance by PHS function will be according to
equation 34.
ULn
ZPHSn =
ILn
(Equation 34)
where:
n corresponds to the particular phase (n=1, 2 or 3)
The characteristic for the PHS function at phase to earth fault is according to figure 91. The char-
acteristic has a fixed angle for the resistive boundary in the first quadrant of 60°.
The resistance RN and reactance XN is the impedance in the earth return path defined according
to equation 35 and equation 36.
R0 − R1
RN =
3
(Equation 35)
X 0 − X1
XN =
3
(Equation 36)
160
X (ohm/loop)
Kr·(X1+XN)
RFRvPE RFFwPE
X1+XN
60 deg
RFFwPE
RFRvPE R (Ohm/loop)
60 deg
X1
1
Kr =
tan(60 deg)
RFRvPE RFFwPE
Kr·(X1+XN)
en06000396.vsd
Figure 90: Characteristic of PHS for phase to earth fault (setting parameters in italic),
ohm/loop domain
Besides this, the 3I0 residual current must fulfil the conditions according to equation 37 and
equation 38.
3 ⋅ I 0 ≥ 0.5 ⋅ IM in O p
(Equation 37)
3 ⋅ I0 ≥ INReleasePE
------------------------------------ ⋅ Iphmax
100
(Equation 38)
where:
IMinOp is the minimum operation current for forward zones,
INReleasePE is the setting for the minimum residual current needed to enable operation in the ph-E
fault loops (in %) and
Iphmax is the maximum phase current in any of three phases.
161
5.2.2 Phase-to-phase fault

For a phase-to-phase fault, the measured by the PHS function will be according to equation 39.
ULm − ULn
ZPHS =
−2 ⋅ ILn
(Equation 39)
ULm is the leading phase voltage, ULn the lagging phase voltage and ILn the phase current in
the lagging phase n.
The operation characteristic is shown in figure 92.
X (ohm/phase)
0.5·FRvPP 0.5·RFFwPP
Kr·X1
X1
0.5·RFFwPP
60 deg
R (ohm/phase)
60 deg
0.5·RFRvPP
X1
1
Kr =
tan(60 deg)
Kr·X1
0.5·RFRvPP 0.5·RFFwPP
en05000670.vsd
Figure 91: The operation characteristic for PHS at phase-to-phase fault (setting parameters
in Italic), ohm/phase domain
In the same way as the condition for phase-to-earth fault, there are current conditions that have
to be fulfilled in order to release the phase-to-phase loop. Those are according to equation 40 or
equation 41.
3I 0 < IN Re leasePE
(Equation 40)
162
3I 0 < INBlockPP ⋅ Iph max

(Equation 41)
where:
INRelease is 3I0 limit for releasing phase-to-earth measuring loops,
INBlockPP is 3I0 limit for blocking phase-to-phase measuring loop and
Iphmax is maximal magnitude of the phase currents.
5.2.3 Three phase faults

The operation condition for three phase faults are the same as for phase-to-phase fault i.e.
equation 39, equation 40 and equation 41 are used to release the operation of the function.
However, the reach is expanded by a factor 2/√3 (approximately 1.1547) in all directions. At the
same time the apparent impedance is rotated 30 degrees, counter-clockwise. The characteristic
is shown in figure 93.
X (ohm/phase)
4 ⋅ X1
3
90 deg
0.5·RFFwPP·K3
X1·K3 4 ⋅ RFFwPP
6
R (ohm/phase)
0.5·RFRvPP·K3
K3 = 2 / sqrt(3)
30 deg
en05000671.vsd
Figure 92: The characteristic of PHS for three phase fault (setting parameters in italic)
163
5.2.4 Load encroachment

Each of the six measuring loops has its own load (encroachment) characteristic based on the cor-
responding loop impedance. The load encroachment functionality is always active, but can be
switched off by selecting a high setting.
The outline of the characteristic is presented in figure 94. As illustrated, the resistive blinders
are set individually in forward and reverse direction while the angle of the sector is the same in
all four quadrants.
RLdFw
ARGLd ARGLd
R
ARGLd ARGLd
RLdRv
en05000196.vsd
Figure 93: Characteristic of load encroachment function
The influence of load encroachment function depending on the operation characteristic is depen-
dent on the chosen operation mode of the PHS function. When selection mode is STCNDZ, the
characteristic for the PHS (and also zone measurement depending on settings) will be reduced
by the load encroachment characteristic (see figure 95, left illustration).
When STCNDI is selected the operation characteristic will be as the right illustration in
figure 95. The reach will in this case be limit by the minimum operation current and the distance
measuring zones.
164
X X
R R
STCNDZ STCNDI
en05000197.vsd
Figure 94: Difference in operating characteristic depending on operation mode when load
encroachment is activated
When the "phase selection" is set to operate together with a distance measuring zone the result-
ant operate characteristic could look something like in figure 96. The figure shows a distance
measuring zone operating in forward direction. Thus, the operate area is highlighted in black.
165
"Phase selection"
"quadrilateral" zone
Distance measuring zone
Load encroachment
characteristic
Directional line
en05000673.vsd
Figure 95: Operation characteristic in forward direction when load encroachment is enabled
Figure 96 is valid for phase-to-earth as well as phase-to-phase faults. During a three-phase fault,
or load, when the "quadrilateral" phase-to-phase characteristic is subject to enlargement and ro-
tation the operate area is transformed according to figure 97. Notice in particular what happens
with the resistive blinders of the "phase selection" "quadrilateral" characteristic. Due to the
30-degree rotation, the angle of the blinder in quadrant one is now 90 degrees instead of the orig-
inal 60 degrees. The blinder that is nominally located to quadrant four will at the same time tilt
outwards and increase the resistive reach around the R-axis. Consequently, it will be more or
less necessary to use the load encroachment characteristic in order to secure a margin to the load
impedance.
166
X (ohm/phase)
Phase selection
”Quadrilateral” zone
Distance measuring zone
R (ohm/phase)
en05000674.vsd
Figure 96: Operation characteristic for PHS in forward direction for three-phase fault,
ohm/phase domain
5.2.5 Minimum operate currents

The operation of the PHS function is blocked if the magnitude of input currents falls below cer-
tain threshold values.
The phase-to-earth loop Ln is blocked if ILn<IMinOpPE, where ILn is the RMS value of the
current in phase Ln.
The phase-to-phase loop LmLn is blocked if (2·ILn<IMinOpPP).

Figure 98 presents schematically the creation of the phase-to-phase and phase-to-earth operating
conditions. Consider only the corresponding part of measuring and logic circuits, when only a
phase-to-earth or phase-to-phase measurement is available within the terminal.
167
Figure 97: Phase-to-phase and phase-to-earth operating conditions (residual current crite-
ria)
A special attention is paid to correct phase selection at evolving faults. A STCNDI output signal
is created as a combination of the load encroachment characteristic and current criteria, refer to
figure 98. This signal can be configured to STCND functional input signals of the distance pro-
tection zone and this way influence the operation of the ph-ph and ph-E zone measuring ele-
ments and their phase related starting and tripping signals.
Figure 99 presents schematically the composition of non-directional phase selective signals

PHS--STNDLn. Signals ZMLnN and ZMLmLn (m and n change between one and three accord-
ing to the phase number) represent the fulfilled operating criteria for each separate loop measur-
ing element (i.e. within the "quadrilateral" characteristic.
168
Figure 98: Composition on non-directional phase selection signals
Composition of the directional (forward and reverse) phase selective signals is presented sche-
matically in figure 101 and figure 100. The directional criteria appears as a condition for the cor-
rect phase selection in order to secure a high phase selectivity for simultaneous and evolving
faults on lines within the complex network configurations. Signals DFWLn and DFWLnLm
present the corresponding directional signals for measuring loops with phases Ln and Lm. Des-
ignation FW (figure 101) represents the forward direction as well as the designation RV
(figure 100) represents the reverse direction. All directional signals are derived within the cor-
responding digital signal processor.
Figure 100 presents additionally a composition of a STCNDZ output signal, which is created on
the basis of impedance measuring conditions. This signal can be configured to STCND function-
al input signals of the distance protection zone and this way influence the operation of the ph-ph
and ph-E zone measuring elements and their phase related starting and tripping signals.
169
Figure 99: Composition of phase selection signals for reverse direction
170
Figure 100: Composition of phase selection signals for forward direction
171
5.3 Function block
PHS1-
FDPSPDIS_21
I3P TRIP
U3P START
BLOCK STFWL1
DIRCND STFWL2
STFWL3
STFWPE
STRVL1
STRVL2
STRVL3
STRVPE
STNDL1
STNDL2
STNDL3
STNDPE
STFW1PH
STFW2PH
STFW3PH
STPE
STPP
STCNDZ
STCNDI
en06000258.vsd
Figure 101: PHS function block

Table 84: Input signals for the FDPSPDIS_21 (PHS--) function block
Signal Description
Table 85: Output signals for the FDPSPDIS_21 (PHS--) function block
Signal Description
STFWL1 Fault detected in phase L1 - forward direction
STFWPE Earth fault detected in forward direction
STRVL1 Fault detected in phase L1 - reverse direction
STRVPE Earth fault detected in reverse direction
STNDL1 Non directional start in L1
172
Signal Description
STNDPE Non directional start, phase-earth
STFW1PH Start in forward direction for single-phase fault
STFW2PH Start in forward direction for two- phase fault
STFW3PH Start in forward direction for thre-phase fault
STPE Current conditions release of phase-earth measuring elements
STPP Current conditions release of phase-phase measuring elements
STCNDZ Start condition (PHS,LE and I based)
STCNDI Start condition (LE and I based)

Table 86: Basic parameter group settings for the FDPSPDIS_21 (PHS--) function
IBase 1 - 99999 1 3000 A Base current for current
settings
INBlockPP 10 - 100 1 40 %IPh 3I0 limit for blocking
phase-to-phase measur-
ing loops
INReleasePE 10 - 100 1 20 %IPh 3I0 limit for releasing
phase-to-earth measur-
ing loops
RLdFw 1.00 - 3000.00 0.01 80.00 ohm/p Forward resistive reach
within the load imped-
ance area
RLdRv 1.00 - 3000.00 0.01 80.00 ohm/p Reverse resistive reach
within the load imped-
ance area
ArgLd 5 - 70 1 30 Deg Load angle determining
the load impedance area
tance reach
reach
RFFwPP 0.50 - 3000.00 0.01 30.00 ohm/l Fault resistance reach,
Ph-Ph, forward
173

RFRvPP 0.50 - 3000.00 0.01 30.00 ohm/l Fault resistance reach,
Ph-Ph, reverse
RFFwPE 1.00 - 9000.00 0.01 100.00 ohm/l Fault resistance reach,
Ph-E, forward
RFRvPE 1.00 - 9000.00 0.01 100.00 ohm/l Fault resistance reach,
Ph-E, reverse
loops
loops
5.6 Technical data

Table 87: Phase selection with load encroachment, quadrilateral characteristic
(PDIS, 21)
Minimum operate current (5-30)% of Ibase ± 1.0% of Ir
Reactive reach, positive (0.50–3000.00) Ω/phase ± 2.0% static accuracy
sequence, forward and reverse
± 2.0 degrees static angular accu-
Resistive reach, positive (0.10–1000.00) Ω/phase racy
sequence Conditions:
Reactive reach, zero sequence, (0.50–9000.00) Ω/phase Voltage range: (0.1-1.1) x Ur
forward and reverse
Resistive reach, zero sequence (0.50–3000.00) Ω/phase
Angle: at 0 degrees and 85
Fault resistance, phase-earth (1.00–9000.00) Ω/loop degrees
faults, forward and reverse
Fault resistance, phase-phase (0.50–3000.00) Ω/loop
faults, forward and reverse
Load encroachment criteria:
Load resistance, forward and (1.00–3000.00) Ω/phase
reverse
(5-70) degrees
Safety load impedance angle
174
Full scheme distance protection, quadrilateral Chapter 5
for Mho Impedance protection
6 Full scheme distance protection, quadrilateral for

Mho
Function block name: ZMMx-- IEC 60617 graphical symbol:

ANSI number: 21
ZMMPDIS
6.1 Introduction
The line distance protection is a five zone protection with three fault loops for phase to earth
fault for each of the independent zones. Individual settings for each zone resistive and reactive
reach gives flexibility for use on overhead lines and cables of different types and lengths.
high resistive faults on heavily loaded lines (see figure 52).
to-reclosing.
Built-in adaptive load compensation algorithm prevents overreaching of zone1 at load exporting
end at phase to earth faults on heavily loaded power lines.

The different fault loops within the IED 670 are operating in parallel in the same principle as a
full scheme measurement..
ance-measuring zones l.
175
L1-N L2-N L3-N Zone 1
en07000080.vsd

The distance measuring zone include three impedance measuring loops; one fault loop for each
phase.
ance characteristics presented in figure 104. The characteristic is illustrated with the full loop
reach.
176
RFPE R1+Rn RFPE
X0 − X1
Xn =
3
X1+Xn R0 − R1
Rn =
3
f N f N
R (Ohm/loop)
RFPE RFPE
X1+Xn
RFPE R1+Rn RFPE

en05000661.vsd
The fault loop reach may also be presented as in figure 105.
ILn R1 + j X1
Phase-to-earth
UL1
element
Phase-to-earth
(Arc + tower
resistance)
0
IN (R0-R1)/3 +
j (X0-X1)/3 ) en06000412.vsd
point to the fault location. The RFPE is presented in order to “convey” the fault resistance reach.
177
convenient to once again mention that the impedance reach is symmetric, in the sense that it is
conform for forward and reverse direction. Therefore, all reach settings apply to both directions.
X X X
R R R
en05000182.vsd

Note!
Both current limits IminOpPE and IminOpIN are automatically reduced to 75% of regular set
values if the zone is set to operate in reverse direction, i.e. OperationDir=Reverse.

parent impedances are calculated and compared with the set limits.
Here U and I represent the corresponding voltage and current phasors in the respective phase Ln
(n = 1, 2, 3).
178
The calculation of the apparant impedances at phase-to-earth fault follow equation 42
The earth return compensation applies in a conventional manner.
U L1
Z app = ------------------------------
I L1 + I N ⋅ KN
(Equation 42)
Where:
KN is defined as:
X0 - X1
KN =
3X1
Here IN is a phasor of the residual current in relay point. This results in the same reach along the
line for all types of faults.
The formula given in equation 42 is only valid for no loaded radial feeder applications. When
load is considered in the case of single line to earth fault, conventional distance protection might
filter.
X Δi
U = R ⋅ i + ------ ⋅ -----
ω0 Δ t
(Equation 43)
179
X Δ Re ( I )
Re ( U ) = R ⋅ Re ( I ) + ------ ⋅ ------------------
ω0 Δt
(Equation 44)
X Δ Im ( I )
Im ( U ) = R ⋅ Im ( I ) + ------ ⋅ -----------------
ω0 Δt
(Equation 45)
with
ω0 = 2 ⋅ π ⋅ f 0
(Equation 46)
where:
Im ( U ) ⋅ Δ Re ( I ) – Re ( U ) ⋅ Δ Im ( I )
R m = ------------------------------------------------------------------------------------
Δ Re ( I ) ⋅ Im ( I ) – Δ Im ( I ) ⋅ Re ( I )
(Equation 47)
Re ( U ) ⋅ Im ( I ) – Im ( U ) ⋅ Re ( I )
Xm = ω 0 ⋅ Δ t ⋅ -------------------------------------------------------------------------------
Δ Re ( I ) ⋅ Im ( I ) – Δ Im ( I ) ⋅ Re ( I )
(Equation 48)
factors.
180
6.2.5 Directional lines

The evaluation of the directionality takes place in the function block ZDM. Equation 49 are used
to classify that the fault is in forward direction for line-to-earth fault.
0.85 ⋅ U1L1 + 0.15 ⋅ U1L1M

I L1
(Equation 49)
where:
U1L1 is positive sequence phase voltage in phase L1
The setting of ArgDir and ArgNegRes is by default set to 15 (= -15) and 115 degrees respectively
(see figure 107) and it should not be changed unless system studies have shown the necessity.
The ZDM gives a binary coded signal on the output STDIRCND depending on the evaluation
where STFWL1N=1 adds 1, STRVL1N=1 adds 2, STFWL2N=1 adds 4 etc.
181
ArgNegRes
ArgDir
R
en05000722.vsd

180 degrees.
The memory voltage is used for 100 ms or until the positive sequence voltage is restored.
After 100 ms, the following occurs:
• If the current is still above the set value of the minimum operating current
(between 10 and 30% of the set terminal rated current IBase), the condition seals
in.
182
• If the current decreases below the minimum operating value, the memory resets
until the positive sequence voltage exceeds 10% of its rated value.

The design of distance protection zone 1 is presented for all measuring: phase-to-earth loops.
phase number (L1E, L2E, and L3E).

above.
function block output STCNDZ.
The input signal DIRCND is used to give condition for directionality for the distance measuring
zones. The signal contains binary coded information for both forward and reverse direction. The
zone measurement function filter out the relevant signals on the DIRCND input depending on
the setting of the parameter OperationDir. It shall be configured to the DIRCND output on the
ZDM block.
183
STCND
AND STNDL1N
L1N
AND STNDL2N
L2N
STNDL3N
L3N AND
OR STNDPE
OR
VTSZ STND
OR AND
BLOCK
BLK
en06000408.vsd
STNDL1N 15 ms
AND t STL1
STNDL2N 15 ms
AND t STL2
STNDL3N 15 ms
AND t STL3
15 ms
AND t START
OR
BLK
en06000409.vsd
184
STNDL1N
DIRL1N AND
OR STZMPE.
&
STNDL2N
DIRL2N AND
STNDL3N 15 ms
STL1
& t
DIRL3N AND
15 ms
STL2
& t
15 ms
STL3
& t
BLK
15 ms
OR START
& t
en07000081.vsd
Tripping conditions for the distance protection zone one are symbolically presented in figure
111.
Timer tPE=On tPE

AND t
STZMPE
15ms
BLKTR AND t
TRIP
STL1 AND TRL1
STL2 AND TRL2
STL3 AND TRL3
en07000082.vsd
185
6.3 Function block
ZMM1-
ZMMPDIS_21
I3P TRIP
U3P TR_A
BLOCK TR_B
BLKZ TR_C
BLKTR PICKUP
STCND PU_A
DIRCND PU_B
PU_C
PHPUND
en06000454.vsd
Figure 111: ZMM function block

Table 88: Input signals for the ZMMPDIS_21 (ZMM1-) function block
Signal Description
BLKZ Blocks all output by fuse failure signal
Table 89: Output signals for the ZMMPDIS_21 (ZMM1-) function block
Signal Description
186

Table 90: Basic parameter group settings for the ZMMPDIS_21 (ZMM1-) function
On
current
voltage
Forward Rev
Reverse
tance reach
R1 0.10 - 1000.00 0.01 5.00 ohm/p Positive seq. resistance
for zone characteristic
angle
reach
R0 0.50 - 3000.00 0.01 15.00 ohm/p Zero seq. resistance for
zone characteristic angle
RFPE 1.00 - 9000.00 0.01 100.00 ohm/l Fault resistance reach in
ohm/loop, Ph-E
loops
ual current for
Phase-Earth loops
6.6 Technical data

Table 91: Full-scheme distance protection, quadrilateral for mho
187

racy
Conditions:
85 degrees
188
Faulty phase identification with load Chapter 5
enchroachment (PDIS, 21) Impedance protection
7 Faulty phase identification with load

enchroachment (PDIS, 21)
Function block name: PHMx IEC 60617 graphical symbol:

ANSI number: 21
FMPSPDIS
7.1 Introduction
The operation of transmission networks today is in many cases close to the stability limit. Due
to environmental considerations the rate of expansion and reinforcement of the power system is
reduced e.g. difficulties to get permission to build new power lines. The ability to accurate and
reliable classifying the different types of fault so that single pole tripping and auto-reclosing can
be used plays an important roll in this matter. The phase selection function is design to accurate
select the proper fault loop in the distance function dependent on the fault type.
The heavy load transfer that is common in many transmission networks may in some cases in-
terfere with the distance protection zone reach and cause unwanted operation. Therefore the
function has a built in algorithm for load encroachment, which gives the possibility to enlarge
the resistive setting of the measuring zones without interfering with the load.
The output signals from the phase selection function produce important information about faulty
phase(s) which can be used for fault analysis as well.

7.2.1 The phase selection function
The phase selection function can be decomposed into four different parts:
1. A high speed delta based current phase selector

2. A high speed delta based voltage phase selector
3. A symmetrical components based phase selector
4. Fault evaluation and selection logic
5. A load enchroachment logic
6. A blinder logic
The function can be de-activated and activated by setting the parameter Operation Off/On The
total function can be blocked by activating the input BLOCK.
Figure 1 (kommer senare)
189
Delta based current and voltages

The delta based fault detection function uses adaptive technique and is based on patent
US4409636. It is a well proven technique that goes back to the beginning of 1980, used with
very good experience in highly proven ABB distance relay RALZA.
The aim of the delta based phase selector is to provide very fast and reliable phase selection for
releasing of tripping from the high speed Mho element and as well as is essential to Directional
Comparison Blocking scheme (DCB), which uses Power Line Carrier (PLC) communication
system across the protected line.
The current and voltage samples for each phase passes through a notch filter that filters out the
fundamental components. Under steady state load conditions or when no fault is present, the out-
put of the filter is zero or close to zero. When a fault occurs, currents and voltages change result-
ing in sudden changes in the current and voltages resulting in non-fundamental waveforms being
introduced on the line. At this point the notch filter produces significant non-zero output. The
filter output is processed by the delta function. The algorithm uses an adaptive relationship be-
tween phases to determine if a fault has occurred, and determines the faulty phases.
The current and voltage delta phase selector gives a real output signal if the following criteria is
fulfilled (only phase L1 shown):
Max(ΔUL1,ΔUL2,ΔUL3)>DeltaUMinOp
Max(ΔIL1,ΔIL2,ΔIL3)>DeltaIMinOp
where:
ΔUL1, ΔUL2 and ΔUL3 are the voltage change between sample t and sample t-1
DeltaUMinOp and DeltaIMinOp are the minimum harmonic level settings for the voltage and current fil-
ters to decide that a fault has occured indeed. A slow evolving fault may
not produce sufficient harmonics to detect the fault; however, in such a
case speed is no longer the issue and the sequence components phase
selector will operate.
The delta voltages ΔULn and delta current ΔILn (n prefix for phase order) are the voltage and
current between sample t and sample t-1.
The delta phase selector employs adaptive techniques to determine the fault type. The logic de-
termines the fault type by summing up all phase values and dividing by the largest value. Both
voltages and currents are filtered out and evaluated. The condition for fault type classification
for the voltage and currents can be expressed as
Σ( ΔUL1, ΔUL2, ΔUL3)

FaulType =
Max( ΔIL1, ΔIL2, ΔUL3)
(Equation 50)
190
Σ( ΔIL1, ΔIL2, ΔIL3)

FaultType =
Max( ΔIL1, ΔIL2, ΔIL3)
(Equation 51)
The value of FaultType for different shunt faults are as follows:
Under ideal conditions: (Patent pending)

Single line ground fault; FaultType=1
Phase to phase fault FaultType=2
3-phase fault; FaultType=3
The output signal is 1 for single line to earth fault, 2 for phase to phase fault and 3 for three phase
fault. At this point the filer does not know if ground was involved or not.
Typically there are induced harmonics in the non-faulted lines that will affect the result. This
method allows for a significant tolerance in the evaluation of FaultType over its entire range.
When a single fault has been detected, the logic determines the largest quantity, and asserts that
phase. If phase to phase fault is detected, the two largest phase quantities will be detected and
asserted as outputs.
The faults detected by the delta based phase selector are coordinated in a separate block. Differ-
ent phases of faults may be detected at slightly different times due to differences in the angles
of incidence of fault on the waveshape. The output is forcet to wait a certain time. If the timer
expires, if no other fault detection on the other phases is not detected, the fault is deemed as
phase-to-ground. This way a premature single phase to earth fault detection is not released for a
phase-phase fault. If, however, ground current is detected before the timer expires, the phase to
ground fault is released sooner.
If another phase picks up during the delay, the wait time is reduced by a certain amount. Each
detection of either ground or additional phases further reduce the initial wait time and allow the
delta phase selector output to be asserted sooner. There is not wait time, if for example, all three
phases are faulty.
The delta function is released if the input DELTAREL is activated at the same time as input
DELTABLK is not activated. Activating the DELTABLK input will block the delta function.
The release signal has an internal pulse timer of 100 ms. When the DELTAREL signal has dis-
appeared the delta logic is reset. In order not to get too abrupt change, the reset is decayed in
pre-defined steps.
Symmetrical component based phase selector

The sequence component phase selector uses preprocessed calculated sequence voltages and
currents as inputs. It also uses sampled values of the phase currents. All the sequence quantities
mentioned further in this section are with reference to phase L1.
The function is made up of four main parts:
191
A Detection of the presence of earth fault

B A phase to phase logic block based on V2/V1 angle relationship
C A phase to earth component based on patent US5390067 where the angle relationships between
V2/I0 and V2/V1 is evaluated to determine earth fault or phase to phase to earth fault
D Logic for detection of three phase fault
A. Presence of earth detection

The detection of earth fault is done in two ways, one by evaluation of the magnitude of zero se-
quence current and secondly by the evaluation of the zero and negative sequence voltage. The
evaluation of the zero sequence current is done both with a separate complementary function
outside the main sequence based evaluation function.
The complementary based zero sequence current function evaluates the presence of earth fault
by calculating the 3I0 and comparing the result with the setting parameter INtoMaxI. The output
signal is used to release the earth fault loop. It is a complement to the earth fault signal built-in
in the sequence based phase selector. The condition for releasing the phase to earth loop are as
follows:
|3I0|>maxIph · INto Im ax ·
where:
|3I0| is the magnitude of the zero sequence current 3I0
maxIph is the maximum magnitude of the phase currents
INtoImax is a setting parameter for the relation between the magnitude of 3I0 and the maxi-
mum phase current
The earth fault loop is also released if the evaluation of the zero sequence current by the main
sequence function meets the following conditions:
|3I0|>IMinOp · k1
|3I0|>maxIph · IN RelPE
where:
IMinOp is the settings of the minimum operate phase current
INRelPE is the setting of 3I0 limit for release of phase-to-earth measuring loop in % of IBase
k1 is a design parameter
IBase is the setting of the base current (A)
192
In systems where the source impedance for zero sequence is high the change of zero sequence
current may not be secure. In those cases the sequence based phase selector will automatically
change from evaluation of zero sequence current to evaluation of zero and negative sequence
voltage. So the release of earth fault loop can also be done if the following conditions are ful-
filled:
|3U0|>U2*k2
|3U0|>U1*k3
|U1|>k
and
3I0<IMinOp*k5
OR
3I0<ILmax · INRelPE
where:
3U0 is the magnitude of the zero sequence voltage
2 is the magnitude of the negative sequence voltage at the relay measuring point of
phase L1
k2, k3, k4 and k5 are design parameters
ILmax is the maximal phase current
IMinOp is the setting of minimum operate phase current in % of IBase
B Phase to phase fault detection

The detection of phase to phase fault is performed by evaluation of the angle difference between
the sequence voltages U2 and U1.
193
VC 60°
C-A sector
VB 0°
180° B-C sector
A-B sector
VA
300°
en06000383_ansi.vsd
Figure 112: Definition of fault sectors for phase to phase fault
The phase to phase loop for the faulty phases will be determined if the angle between the se-
quence voltages U2 and U1 lies within the sector defined according to figure 113 and the fol-
lowing conditions are fulfilled:
|U2|>U2MinOp
|U1|>U1MinOP
where:
U1MinOP and U2MinOp are the setting parameters for positive sequence and negative sequence mini-
mum operate voltage
The positive sequence voltage U1L1 in figure 113 above is reference.
If there is a three phase fault, there will not be any release of the individual phase signals, even
if the general conditions for U2 and U1 are fulfilled.
C. Phase to earth and phase to phase to earth detection

The detection of phase to earth and phase to phase to earth fault (US patent 5390067) is based
on two conditions:
1. Angle relationship between V2 and I0
2. Angle relationship between V2 and V1
The first condition determines faulty phase at single line to earth fault by determine the argument
between V2 and I0.
194
80°
L2-N sector L3-N sector

U2L1
(Ref)
200°
L1-N sector
320°
en06000384.vsd
Figure 113: Definition of faulty phase sector as angle between V2 and I0
The angle is calculated in a directional function block and gives the angle in radians as input to
the V2I0 function block. The input angle is released only if the fault is in forward direction. This
is done by the directional element. The fault is classified as forward direction if the angle be-
tween U0 and I0 lies between 20 to 200 degrees see figure 115.
Forward 20°
200° Reverse
en06000385.vsd
Figure 114: Directional element used to release the measured angle between U2 and I0
The input radians are summarized with an offset angle and the result evaluated. If the angle is
within the boundaries for a specific sector, the phase indication for that sector will be active see
figure 114. Only one sector signal is allowed to be activated at the same time.
195
The sector function for condition1 has an internal release signal which is active if the main se-
quence function has classified the angle between U0 and I0 as valid. The following conditions
must be fulfilled for activating the release signals:
|U2|>U2MinOp
|3I0|>IMinOp · 0.5
|3I0|>ILmax · INRelPE
where:
U2 and IN are the magnitude of the negative sequence voltage and zero sequence current (3I0)
U2MinOp is the setting parameter for minimum operate negative sequence voltage
IMinOp is the setting parameter for minimum operate phase current
INRelPE is the setting parameter for 3I0 limit for releasing phase to earth loop
The angle difference is phase shifted by 180 degrees if the fault is in reverse direction.
The condition2 looks at the angle relationship between the negative sequence voltage U2 and
the positive sequence voltage U1. Since this is a phase to phase voltage relationship, there is no
need for shifting phases if the fault is in reverse direction. A phase shift is introduced so that the
fault sectors will have the same angle boarders as for condition1. If the calculated angle between
U2 and U1 lies within one sector, the corresponding phase for that sector will be activated. The
condition2 is released if both the following conditions are fulfilled:
· |U2|>U2MinOp
· |U1|>U1MinOP
where:
|U1| and |U2| are the magnitude of the positive and negative sequence voltage
U1MinOP and are the setting parameter for positive sequence and negative sequence mini-
mum operate voltage.
196
140°
L3-N sector
20°
U1L1
(Ref)
L1-N sector
L2-N sector
260° en06000413.vsd
Figure 115: Condition 2: U2 and U1 angle relationship
If both conditions are true and there is sector match, the fault is deemed as single phase to
ground. If the sectors, however, do not match the fault is determined to be the complement of
the second condition, i.e. a phase to phase to ground fault.
E.g.
Condition 1 Condition 2 Fault type
L3-G L3-G L3-G
L2-G L1-G L2-L3-G
The sequence phase selector is blocked when earth is not involved or if a three phase fault is
detected.
D. Three phase fault detection

The function classify the fault as three phase fault if the following conditions are fulfilled:
|U1|>U1Level
|I1|>I1Level
or
|I1|>IMaxLoad
where:
U1 and I1 are the positive sequence voltage and current magnitude
U1Level and I1Level are the setting of limits for positive sequence voltage and current
197
The output signal for detection of three phase fault is only released if not earth fault and phase
to phase fault in the main sequence function is detected.
The conditions for not detecting earth fault are the inverse of equation 5 to10.
The condition for not detecting phase to phase faults is determined by three conditions. Each of
them gives condition for not detecting phase to phase fault. Those are:
Condition1:
earth fault is detected
or
|IN|>IMinOP*k2
and
|IN|>ILmax*INRelPE
Condition2:
Condition2 for phase to earth and phase to phase faults are not fulfilled
and
ILmax<IMinOp
and
|I2|<ILmax*I2ILmax
Condition3:
|IN|>maxIL*INBlockPP
or
|I2|<maxIL*I2maxIL
where:
ILmax is the maximum of the phase currents IL1, IL2 and IL3
INRelPE is the setting parameter for 3I0 limit for release of phase to earth fault loops
|I2| is the magnitude of the negative sequence current
I2ILmax is the setting parameter for the relation between negative sequence current to the maximum
phase current in percent of IBase
INBlockPP is the setting parameter for 3I0 limit for blocking phase to phase measuring loops
Fault evaluation and selection logic

The phase selection logic has an evaluation procedure that can be simplified according to figure
117. Only phase L1 is shown in the figure. If the internal signal 3Phase fault is activated, all three
outputs STL1, STL2 and STL3 will be activated.
198
a a>b FaultPriority
DeltaIL1 then c=a c Adaptive release
b else c=a dependent on result
from Delta logic
DeltaUL1
Sequence based
function a<b
a
L1L2 fault
then c=b c
OR b else c=a OR
L1N fault
3 Phase fault
STL1
IL1Valid &
BLOCK
en06000386.vsd
Figure 116: Simplified diagram for fault evaluation, phase L1
Load encroachment logic

Each of the six measuring loops has its own load (encroachment) characteristic based on the cor-
responding loop impedance. The load encroachment functionality is always activated in the
PHSM function but the influence on the zone measurement can be switched on/off in the respec-
tive Zm function.
The outline of the characteristic is presented in figure 118. As illustrated, the resistive reach are
set individually in forward and reverse direction while the angle of the sector is the same in all
four quadrants. The reach for the phase selector will be reduced by the load encroachment func-
tion, see right figure 118.
199
X jX
Operation area Operation area
RLd
ArgLd ArgLd
R
ArgLd R
ArgLd
RLd
Operation area
No operation area No operation area
en06000414.vsd
Figure 117: Influence on the characteristic by load encroachment logic.
Outputs
The output of the sequence components based phase selector and the delta logic phase selector
activates the output signal(s) STL1, STL2 and STL3PU_A, PU_B and PU_C. If the phase to
earth loop have been released, then the signal STE will be activated as well.
The phase selector also gives binary coded signals that are connected to the zone measuring el-
ement for opening the correct measuring loop(s). This is done by the signal STCNDPHS. If only
one phase is enable (L1, L2 or L3), the corresponding phase to ground element is enabled as
well. Earth is expected to be made available for two and three phase faults for the correct output
to be asserted. The fault loop is indicated by one of the decimal numbers below:
0= no faulted phases
1= L1N
2= L2N
3= L3N
4= -L1L2N
5= -L2L3N
6= -L3L1N-CAG
7= -L1L2L3N
8= -L1L2
9= -L2L3
10= -L3L1
11= L1L2L3
200
An additional logic is applied to handle the cases when phase to earth outputs are to be asserted
when the ground input G is not asserted.
The output signal STCNDPLE is activated when the load encroachment is operating. STCND-
PLE shall be connected to the input STCND for selected quadrilateral impedance measuring
zones (ZM0x) to be blocked. The signal STCNDLE shall be connected to the input LDCND for
selected Mho impedans measuring zones (ZMMx)
Note!
The load encroachment at the measuring zone must be activated to release the blocking from the
load encroachment function.
7.3 Function block
PHM-
FMPSPDIS
I3P STL1
U3P STL2
BLOCK STL3
ZSTART STPE
TR3PH STCNDPHS
1POLEAR STCNDPLE
STCNDLE
START
en06000429.vsd
Figure 118: PHM function block

Table 92: Input signals for the FMPSPDIS (PHM-) function block
Signal Description
I3P Group signal for current
U3P Group signal for voltage
ZSTART Start from underimpdeance function
TR3PH Three phase tripping initiated
1POLEAR Single pole autoreclosing in progress
201
Table 93: Output signals for the FMPSPDIS (PHM-) function block
Signal Description
STL1 Fault detected in phase L1
STPE Earth fault detected
STCNDPHS Binary coded starts from phase selection
STCNDPLE Binary coded starts from ph sel with load encroachment
STCNDLE Binary coded starts from load encroachment only
START Indicates that something has started

Table 94: Basic parameter group settings for the FMPSPDIS (PHM-) function
IMaxLoad 10 - 5000 1 200 %IB Maximum load for identi-
fication of three phase
fault in % of IBase
RLd 1.00 - 3000.00 0.01 80.00 ohm/p Load encroachment
resistive reach in
ohm/phase
ArgLd 5 - 70 1 20 Deg Load encroachment incli-
nation of load angular
sector
Table 95: Advanced parameter group settings for the FMPSPDIS (PHM-) function
DeltaIMinOp 5 - 100 1 10 %IB Delta current level in % of
IBase
DeltaUMinOp 5 - 100 1 20 %UB Delta voltage level in %
of UBase
U1Level 5 - 100 1 80 %UB Pos seq voltage limit for
identification of 3-ph fault
202

I1LowLevel 5 - 200 1 10 %IB Pos seq current level for
identification of 3-ph fault
in % of IBase
U1MinOp 5 - 100 1 20 %UB Minimum operate posi-
tive sequence voltage for
ph sel
U2MinOp 1 - 100 1 5 %UB Minimum operate nega-
tive sequence voltage for
ph sel
INRelPE 10 - 100 1 20 %IB 3I0 limit for release ph-e
measuring loops in % of
max phase current
INBlockPP 10 - 100 1 40 %IB 3I0 limit for blocking
phase-to-phase measur-
ing loops in % of max
phase current
7.6 Technical data

Table 96: Faulty phase identification with load encroachment (PDIS, 21)
Minimum operate current (5-30)% of Ibase ± 1.0% of Ir
Load encroachment criteria: Load (0.5–3000) Ω/phase ± 2.0% static accuracy
resistance, forward and reverse
(5–70) degrees Conditions:
Voltage range: (0.1–1.1) x Vn
Current range: (0.5–30) x In
Angle: at 0 degrees and 85
degrees
203
Directional impedance Mho (RDIR) Chapter 5
8 Directional impedance Mho (RDIR)
Function block name: ZDM- IEC 60617 graphical symbol:

ANSI number:
ZDMRDIR
Function block name: ZDA- IEC 60617 graphical symbol:

ANSI number:
ZDARDIR
8.1 Introduction
The phase-to-earth impedance elements can be optionally supervised by a phase unselective di-
rectional function (phase unselective, because it is based on symmetrical components).

8.2.1 Directional impedance element for mho characteristic, ZDM
The evaluation of the directionality takes place in the function block ZDM. Equation 52 and
equation 53 are used to classify that the fault is in the forward direction for phase-to-earth fault
and phase-phase fault respectively.
0.85 ⋅ U1L1 + 0.15 ⋅ U1L1M

I L1
(Equation 52)
0.85 ⋅ U1L1L 2 + 0.15 ⋅ U1L1L 2 M

I L1L 2
(Equation 53)
204
Where:
ArgDir Setting for the lower boundary of the forward directional characteristic, by default set to
15 (= -15 degrees)
ArgNegRes Setting for the upper boundary of the forward directional characteristic, by default set to
115 degrees, see figure 120
U1L1 Positive sequence phase voltage in phase L1
U1L1M Positive sequence memorized phase voltage in phase L1
IL1 Phase current in phase L1
U1L1L2 Voltage difference between phase L1 and L2 (L2 lagging L1)
U1L1L2M Memorized voltage difference between phase L1 and L2 (L2 lagging L1)
IL1L2 Current difference between phase L1 and L2 (L2 lagging L1)
The default settings for ArgDir and ArgNegRes are 15 (= -15) and 115 degrees respectively (see
figure 120) and they should not be changed unless system studies show the necessity.
The directional lines are computed by means of a comparator-type calculation, meaning that the
directional lines are based on mho-circles (of infinite radius).
X
Zset reach point
ArgNegRes
-ArgDir R
-Zs
en06000416.vsd
Figure 119: Setting angles for discrimination of forward fault
The reverse directional characteristic is equal to the forward characteristic rotated by 180 de-
grees.
205
The memory voltage is used for 100ms or until the positive sequence voltage is restored. After
100ms, the following occurs:
• If the current is still above the set value of the minimum operating current the
condition seals in.
• If the current decreases below the minimum operating value, no directional indi-
cations will be given until the positive sequence voltage exceeds 10% of its rated
value.
The directional function block ZDM has the following output signals:
The STDIRCND output provides an integer signal that depends on the evaluation and is derived
from a binary coded signal as follows:
bit 11 bit 10 bit 9 bit 8 bit 7 bit 6

(2048) (1024) (512) (256) (128) (64)
STRVL3L1=1 STRVL2L3=1 STRVL1L2=1 STRVL3N=1 STRVL2N=1 STRVL1N=1
bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
(32) (16) (8) (4) (2) (1)
STFWL3L1=1 STFWL2L3=1 STFWL1L2=1 STFWL3N=1 STFWL2N=1 STFWL1N=1
The STFW output is a logical signal with value 1 or 0. It is made up as an OR-function of all the
forward starting conditions, i.e. STFWL1N, STFWL2N, STFWL3N, STFWL1L2, STFWL2L3
and STFWL3L1. The STRV output is similar to the STFW output, the only difference being that
it is made up as an OR-function of all the reverse starting conditions, i.e. STRVL1N, STRVL2N,
STRVL3N, STRVL1L2, STRVL2L3 and STRVL3L1.
Values for the following parameters are calculated, and may be viewed as service values:
• resistance phase L1
• reactance phase L1
• direction phase L1
206
8.2.2 Additional distance protection directional function for earth faults, ZDA
A Mho element needs a polarizing voltage for its operation. The positive-sequence memory-po-
larized elements are generally preferred. The benefits include:
• The greatest amount of expansion for improved resistive coverage. These ele-
ments always expand back to the source.
• Memory action for all fault types. This is very important for close-in 3-phase
faults.
• A common polarizing reference for all six distance-measuring loops. This is im-
portant for single-pole tripping, during a pole-open period.
There are however some situations that can cause security problems like reverse phase to phase
faults and double phase to earth faults during high load periods. To solve these, additional direc-
tional element is used.
For phase to earth faults, directional elements using sequence components are very reliable for
directional discrimination. The directional element can be based on one of following types of
polarization:
• Zero-sequence voltage
• Negative-sequence voltage
• Zero-sequence current
These additional directional criteria are evaluated in the function block ZDA.
Zero-sequence voltage polarization is utilizing the phase relation between the zero-sequence
voltage and the zero-sequence current at the location of the protection. The measurement prin-
ciple is illustrated in figure 121.
207
- 3U 0
AngleOp
AngleRCA
3I 0
en06000417.vsd
Figure 120: Principle for zero-sequence voltage polarized additional directional element
Negative-sequence voltage polarization is utilizing the phase relation between the negative-se-
quence voltage and the negative-sequence current at the location of the protection.
Zero-sequence current polarization is utilizing the phase relation between the zero-sequence cur-
rent at the location of the protection and some reference zero-sequence current, for example the
current in the neutral of a power transformer.
The principle of zero-sequence voltage polarization with zero-sequence current compensation is

described in figure 122. The same also applies for the negative-sequence function.
Z0 SA I0 I0
Z0Line Z0SB
Characteristic
angle
U0 U0
K*I0
U0 + K*I0
IF
en06000418.vsd
Figure 121: Principle for zero sequence compensation
208
Note that the sequence based additional directional element cannot give per phase information
about direction to fault. This is why it is an AND-function with the normal directional element
that works on a per phase base. The release signals are per phase and to have a release of a mea-
suring element in a specific phase both the additional directional element, and the normal direc-
tional element, for that phase must indicate correct direction.
Normal
directional Release of distance
element measuring element
L1N, L2N, L3N L1N, L2N, L3N
AND
Additional
directional AND per
element phase
en06000419.vsd
Figure 122: Earth distance element directional supervision
8.3 Function block
ZDM1-
ZDMRDIR
I3P DIR_CURR
U3P DIR_VOLT
DIR_POL
STFW
STRV
STDIRCND
en06000422.vsd
Figure 123: ZDM function block
ZDA1-
ZDARDIR
I3P STFWPE
U3P STRVPE
I3PPOL DIREFCND
DIRCND
en06000425.vsd
Figure 124: ZDA function block
209

Table 97: Input signals for the ZDMRDIR (ZDM1-) function block
Signal Description
I3P group connection for current abs 1
U3P group connection for voltage abs 1
Table 98: Output signals for the ZDMRDIR (ZDM1-) function block
Signal Description
DIR_CURR Group connection
DIR_VOLT Group connection
DIR_POL Group connection
STFW Start in forward direction
STRV Start in reverse direction
STDIRCND Binary coded directional information per measuring loop
Table 99: Input signals for the ZDARDIR (ZDA1-) function block
Signal Description
I3P Current signals
U3P Voltage signals
I3PPOL Polarisation current signals
DIRCND Binary coded directional signal
Table 100: Output signals for the ZDARDIR (ZDA1-) function block
Signal Description
STFWPE Forward start signal from phase-to-ground directional element
STRVPE Reverse start signal from phase-to-ground directional element
DIREFCND Start direction Binary coded
210

Table 101: Basic parameter group settings for the ZDMRDIR (ZDM1-) function
IBase 1 - 99999 1 3000 - Base setting for current
level
UBase 0.05 - 2000.00 0.05 400.00 - Base setting for voltage
level
DirEvalType Impedance - Comparator - Directional evaluation
Comparator mode Impedance / Com-
Imp/Comp parator
ArgNegRes 90 - 175 1 115 Deg Angle of blinder in sec-

ond quadrant for forward
direction
ArgDir 5 - 45 1 15 Deg Angle of blinder in fourth
quadrant for forward
direction
loops
loops
Table 102: Basic parameter group settings for the ZDARDIR (ZDA1-) function
IBase 1 - 99999 1 3000 A Base setting for current
values
UBase 0.05 - 2000.00 0.05 400.00 kV Base setting for voltage
level in kV
PolMode -3U0 - -3U0 - Polarization quantity for
-U2 opt dir function for P-E
IPol faults
Dual
-3U0Comp
-U2comp
AngleRCA -90 - 90 1 75 Deg Characteristic relay angle
(= MTA or base angle)
I> 1 - 200 1 5 %IB Minimum operation cur-
rent in % of IBase
UPol> 1 - 100 1 1 %UB Minimum polarizing volt-
age in % of UBase
IPol> 5 - 100 1 10 %IB Minimum polarizing cur-
rent in % of IBase
211
Table 103: Advanced parameter group settings for the ZDARDIR (ZDA1-) function
AngleOp 90 - 180 1 160 Deg Operation sector angle
Kmag 0.50 - 3000.00 0.01 40.00 ohm Boost-factor in -U0comp
and -U2comp polariza-
tion
212
Phase preference logic Chapter 5
9 Phase preference logic
Function block name: PPL IEC 60617 graphical symbol:

ANSI number:
PPLPHIZ
9.1 Introduction
Phase Preference Logic (PPL) is intended to be used in isolated or high impedance earthed net-
works where there is a requirement to trip only one of the faulty lines at cross-country fault.
The phase preference logic inhibits tripping for single-phase-to-earth faults in isolated and high
impedance-earthed networks, where such faults are not to be cleared by distance protection. For
cross-country faults, the logic selects either the leading or the lagging phase-earth loop for mea-
surement and initiates tripping of the preferred fault based on the selected phase preference. A
number of different phase preference combinations are available for selection.

The phase preference logic can be activated or deactivated by setting the parameter Operation
to On or Off.
The function has 10 operation modes which can be set by the parameter Mode. The different
modes and their explanation are shown in table 104 below.
Table 104: Operation modes for phase preference logic

Operation Mode Description
0 No filter, phase-to-phase measuring loops are not blocked during single
phase-to-ground faults. Tripping is allowed without any particular phase
preference at cross-country faults
1 No preference, trip is blocked during single phase-to-ground faults, trip is allowed
without any particular phase preference at cross-country fault
2 Cyclic 1231c; L1 before L2 before L3 before L1
3 Cyclic 1321c; L1 before L3 before L2 before L1
4 Acyclic 123a; L1 before L2before L3
5 Acyclic 132a; L1 before L3 before L2
213
The function can be divided into two parts; one labeled Voltage and Current Discrimination and
the second one labeled Phase Preference Evaluation, see figure 126.
The aim with the voltage and current discrimination part is to discriminate faulty phases and to
determine if there is a cross country fault. If cross country fault is detected, an internal signal
“Detected cross country fault” is created and sent to the phase preference part to be used in the
evaluation process for determining the condition for trip.
The voltage discrimination part gives phase segregated start signals STUL1, STUL2 or STUL3
if the respective measured phase voltage is below the setting parameter UPN< at the same time
as the zero sequence voltage is above the setting parameter 3U0>, see figure 126.
The internal signal for detection of cross country fault, DetectCrossContry, that come from the
voltage and current discrimination part of the function can be achieved in three different ways:
1. The magnitude of 3I0 has been above the setting parameter IN for a time longer
than the setting of pick-up timer tIN
2. The magnitude of 3I0 has been above the setting parameter IN at the same time
as the magnitude of 3U0 has been above the setting parameter 3U0> during a
time longer than the setting of pick-up timer tUN
3. The magnitude of 3I0 has been above the setting parameter IN at the same time
as one of the following conditions are fulfilled:
• the measured phase-to phase voltage in at least one of the phase combina-
tions has been below the setting parameter UPP< for more than 20 ms.
• At least one of the phase voltages are below the setting parameter UPN< for
more than 20 ms
The second part, Phase preference evaluation, uses the internal signal DetectCrossCountry from
the voltage and current evaluation together with the input signal STCND and the information
from the setting parameter OperMode to determine the condition for trip. To release the phase
preference logic at least two out of three phases must be faulty. The fault classification whether
it is a single line to earth or cross country fault and which phase to be tripped at cross country
fault is converted into a binary coded signal and sent to the distance protection measuring zone
to release the correct measuring zone according to the setting of OperMode. This is done by ac-
tivating the output ZREL and it shall be connected to the input STCND on the distance zone
measuring element.
The input signal STCNDC consist of binary information of fault type and is connected to the
Phase selector output STCND. The fault must be activated in at least two phases to be classified
as a cross country fault in the phase preference part of the logic.
The input signals RELLx are additional fault release signals that can be connected to external
protection functions through binary input.
The trip output can be blocked by setting the parameter Blk1PhTr to On.
The output start and trip signals can be blocked by activating the input BLOCK
214
UL1
STUL1
UL2 AND
UL3
UL1UL2 STUL2
AND
UL2UL3
UL3UL1
IN Voltage and STUL3
AND
UN Current
Discrimination
UPN< OR START
AND
UPP<
IN>
Detect Cross-
UN> Country fault
AND
TRL1
AND
OperatingMode
RELL1N TRL2
Phase Preference AND
RELL2N Evaluation
TRL3
RELL3N AND
STCND
AND
AND OR
AND
AND
Blk1PhTr
BLOCK
en06000323.vsd
Figure 125: Simplified block diagram for phase preference logic
215
9.3 Function block
PPL1-
PPLPHIZ
I3P START
U3P ZREL
BLOCK
RELL1N
RELL2N
RELL3N
STCND
en07000029.vsd
Figure 126: PPL function block

Table 105: Input signals for the PPLPHIZ (PPL1-) function block
Signal Description
RELL1N Release condition for the L1 to earth loop
STCND Integer coded external release signals
Table 106: Output signals for the PPLPHIZ (PPL1-) function block
Signal Description
START Indicates start for earth fault(s), regardless of direction
ZREL Integer coded output release signal
216

Table 107: Basic parameter group settings for the PPLPHIZ (PPL1-) function
OperMode No Filter - No Filter - Operating mode
NoPref (c=cyclic,a=acyclic)
1231c
1321c
123a
132a
213a
231a
312a
321a
UPN< 10.0 - 100.0 1.0 70.0 %UB Operate value of phase
undervoltage (% of
UBase)
UPP< 10.0 - 100.0 1.0 50.0 %UB Operate value of line to
line undervoltage (% of
UBase)
3U0> 5.0 - 70.0 1.0 20.0 %UB Operate value of resid-
ual voltage (% of UBase)
IN> 10 - 200 1 20 %IB Operate value of resid-
ual current (% of IBase)
tUN 0.000 - 60.000 0.001 0.100 s Pickup-delay for residual
voltage
tOffUN 0.000 - 60.000 0.001 0.100 s Dropoff-delay for resid-
ual voltage
tIN 0.000 - 60.000 0.001 0.150 s Pickup-delay for residual
current
217
Power swing detection (RPSB, 78) Chapter 5
10 Power swing detection (RPSB, 78)
Function block name: PSD-- IEC 60617 graphical symbol:

ANSI number: 78
ZMRPSB Zpsb
10.1 Introduction
Power swings may occur after disconnection of heavy loads or trip of big generation plants.
Power swing detection function is used to detect power swings and initiate block of selected dis-
tance protection zones. Occurrence of earth fault currents during a power swing can block the
power swing detection function to allow fault clearance.

The PSD function comprises an inner and an outer quadrilateral measurement characteristic with
load encroachment, see figure 128.
Its principle of operation is based on the measurement of the time it takes for a power swing tran-
sient impedance to pass through the impedance area between the outer and the inner character-
istics. Power swings are identified by transition times longer than a transition time set on
corresponding timers. The impedance measuring principle is the same as that used for the dis-
tance protection zones. The impedance and the characteristic passing times are measured in all
three phases separately. One-out-of-three or two-out-of-three operating modes can be selected
according to the specific system operating conditions.
218
X1OutFw jX ZL R1LIn
X1InFw ΔFw
ϕ
ΔRv
R1FInRv R1FInFw
ΔFw
ARGLd ϕ
ΔRv ARGLd
ΔFw
ΔFw
R
ΔFw
ΔRv
RLdInRv RLdInFw
ΔFw
ΔRv
RLdOutRv RLdOutFw
ϕ ΔRv X1InRv
X1OutRv
en05000175.vsd
Figure 127: Operating characteristic for the PSD function
The impedance measurement within the PSD function is performed by solving equation 54 and
equation 55 (n = 1, 2, 3 for each corresponding phase L1, L2 and L3).
⎛ U L1 ⎞
Re⎜⎜ ⎟⎟ ≤ Rset
⎝ I L1 ⎠
(Equation 54)
⎛ U L1 ⎞
Im⎜⎜ ⎟⎟ ≤ Xset
⎝ IL1 ⎠
(Equation 55)
The Rset and Xset are R and X boundaries which are more explained in the following sections.
219
10.2.1 Resistive reach in forward direction

To avoid load encroachment the resistive reach is limited in forward direction by setting the pa-
rameter RLdOutFw which is the outer resistive load boundary value while the inner resistive
boundary is calculated according to equation 56.
RLdInFw = kLdRFw ⋅ RLdOutFw

(Equation 56)
where:
kLdRFw is a settable multiplication factor less than 1
The slope of the load encroachment inner and outer boundary is defined by setting the parameter
ARGLd.
The load encroachment in the fourth quadrant uses the same settings as in the first quadrant
(same ARGLd and RLdOutFw and calculated RLdInFw).
The quadrilateral characteristic in the first quadrant is tilted to get a better adaptation to the dis-
tance zones. The angle is the same as the line angle and derived from the setting of the reactive
reach inner boundary X1InFw and the line resistance for the inner boundary R1LIn. The fault
resistance coverage for the inner boundary is set by the parameter R1FInFw.
From the setting parameter RLdOutFw and the calculated value RLdInFw a distance between the
inner and outer boundary, ΔFw, is calculated. This value is valid for R direction in first and
fourth quadrant and for X direction in first and second quadrant.
10.2.2 Resistive reach in reverse direction

To avoid load encroachment in reverse direction the resistive reach is limited by setting the pa-
rameter RLdOutRv for the outer boundary of the load encroachment cone. The distance to the
inner resistive load boundary RLdInRv is determined by using the setting parameter kLdRRv in
equation 57.
RLdInRv = kLdRRv ⋅ RLdOutRv

(Equation 57)
From the setting parameter RLdOutRv and the calculated value RLdInRv a distance between the
inner and outer boundary, ΔRv, is calculated. This value is valid for R direction in second and
third quadrant and for X direction in third and fourth quadrant.
The inner resistive characteristic in the second quadrant outside the load encroachment part cor-
responds to the setting parameter R1FInRv for the inner boundary. The outer boundary is inter-
nally calculated as the sum of ΔRv+R1FInRv.
220
The inner resistive characteristic in the third quadrant outside the load encroachment zone con-
sist of the sum of the settings R1FInRv and the line resistance R1LIn. The argument of the tilted
lines outside the load encroachment is the same as the tilted lines in the first quadrant. The dis-
tance between the inner and outer boundary is the same as for the load encroachment in reverse
direction i.e. ΔRv.
10.2.3 Reactive reach in forward and reverse direction

The inner characteristic for the reactive reach in forward direction correspond to the setting pa-
rameter X1InFw and the outer boundary is defined as X1InFw + ΔFw,
where:
ΔFw = RLdOutFw - KLdRFw · RLdOutFw
The inner characteristic for the reactive reach in reverse direction correspond to the setting pa-
rameter X1InRv for the inner boundary and the outer boundary is defined as X1InRv + ΔRv.
where:
ΔRv = RLdOutRv - KLdRRv · RLdOutRv
10.2.4 Basic detection logic

The operation of the function is only released if the magnitude of the current is above the setting
of the min operating current, IMinOpPE.
The PSD function can operate in two operating modes:
• The "1-of-3" operating mode is based on detection of power swing in any of the
three phases. Figure 129 presents a composition of a detection signal
PSD-DET-L1 in this particular phase.
• The "2-of-3" operating mode is based on detection of power swing in at least two
out of three phases. Figure 130 presents a composition of the detection signals
DET1of3 and DET2of3.
Signals ZOUTL1ZOUT_A (external boundary) and ZINL1 (internal boundary) in figure 129 are
related to the operation of the impedance measuring elements in each phase separately (Ln rep-
resents the corresponding phase L1, L2, and L3). They are internal signals, calculated by the
PSD-function.
The tP1 timer in figure 129 serve as detection of initial power swings, which are usually not as
fast as the later swings are. The tP2 timer become activated for the detection of the consecutive
swings, if the measured impedance exit the operate area and returns within the time delay, set
on the tW waiting timer. The upper part of figure 129 (input signal ZOUTL1, ZINL1,
AND-gates and tP-timers etc.) are duplicated for phase L2 and L3. All tP1 and tP2 timers in the
figure have the same settings.
221
Figure 128: Detection of power-swing in phase L1
Figure 129: Detection of power-swing for 1-of-3 and 2-of-3 operating mode
222
ZOUTL1 ZOUT
OR
ZOUTL2 ZINL1
ZIN
ZOUTL3 AND ZINL2 OR
ZINL3
tEF
TRSP
t AND
I0CHECK
10 ms
AND t
BLKI02 OR
tR1
AND t INHIBIT
OR
-loop
tR2
BLKI01 AND t
BLOCK
-loop
DET1of3 - int.
REL1PH
AND
BLK1PH
tH
DET2of3 - int. OR t
REL2PH
AND
BLK2PH OR START
AND
EXTERNAL
en05000114.vsd
Figure 130: PSD function-simplified block diagram
10.2.5 Operating and inhibit conditions

Figure 131 presents a simplified logic diagram for the PSD function. The internal signals
DET1of3 and DET2of3 relate to the detailed logic diagrams in figure 129 and figure 130 respec-
tively.
Selection of the operating mode is possible by the proper configuration of the functional input
signals REL1PH, BLK1PH, REL2PH, and BLK2PH.
The load encroachment characteristic can be switched off by setting the parameter Operation-
LdCh = Off, but notice that the ΔFw and ΔRv will still be calculated. The characteristic will in
this case be only quadrilateral.
There are four different ways to form the internal INHIBIT signal:
223
• Logical 1 on functional input BLOCK inhibits the output START signal instan-
taneously.
• The INHIBIT internal signal is activated, if the power swing has been detected
and the measured impedance remains within its operate characteristic for the
time, which is longer than the time delay set on tR2 timer. It is possible to disable
this condition by connecting the logical 1 signal to the BLKI01 functional input.
• The INHIBIT internal signal is activated after the time delay, set on tR1 timer, if
an earth fault appears during the power swing (input IOCHECK is high) and the
power swing has been detected before the earth fault (activation of the signal
I0CHECK). It is possible to disable this condition by connecting the logical 1 sig-
nal to the BLKI02 functional input.
• The INHIBIT logical signals becomes logical 1, if the functional input I0CHECK
appears within the time delay, set on tEF timer and the impedance has been seen
within the outer characteristic of the PSD operate characteristic in all three phas-
es. This function prevents the operation of the PSD function in cases, when the
circuit breaker closes onto persistent single-phase fault after single-pole auto-re-
closing dead time, if the initial single-phase fault and single-pole opening of the
circuit breaker causes the power swing in the remaining two phases.
10.3 Function block
PSD1-
ZMRPSB_78
I3P START
U3P ZOUT
BLOCK ZIN
BLKI01
BLKI02
BLK1PH
REL1PH
BLK2PH
REL2PH
I0CHECK
TRSP
EXTERNAL
en06000264.vsd
Figure 131: PSD function block

Table 108: Input signals for the ZMRPSB_78 (PSD1-) function block
Signal Description
BLKI01 Block inhibit of start output for slow swing condition
BLKI02 Block inhibit of start output for subsequent residual current
detection
224
Signal Description
BLK1PH Block one-out-of-three-phase operating mode
REL1PH Release one-out-of-three-phase operating mode
BLK2PH Block two-out-of-three-phase operating mode
REL2PH Release two-out-of-three-phase operating mode
I0CHECK Residual current (3I0) detection used to inhibit start output
TRSP Single-pole tripping command issued by tripping function
EXTERNAL Input for external detection of power swing
Table 109: Output signals for the ZMRPSB_78 (PSD1-) function block
Signal Description
START Power swing detected
ZOUT Measured impedance within outer impedance boundary
ZIN Measured impedance within inner impedance boundary

Table 110: Basic parameter group settings for the ZMRPSB_78 (PSD1-) function
Operation Off - Off - Operation Mode On / Off
On
X1InFw 0.10 - 3000.00 0.01 30.00 ohm Inner reactive boundary,
forward
R1LIn 0.10 - 1000.00 0.01 30.00 ohm Line resistance for inner
characteristic angle
R1FInFw 0.10 - 1000.00 0.01 30.00 ohm Fault resistance cover-
age to inner resistive line,
forward
X1InRv 0.10 - 3000.00 0.01 30.00 ohm Inner reactive boundary,
reverse
R1FInRv 0.10 - 1000.00 0.01 30.00 ohm Fault resistance line to
inner resistive boundary,
reverse
OperationLdCh Off - On - Operation of load dis-
On crimination characteristic
RLdOutFw 0.10 - 3000.00 0.01 30.00 ohm Outer resistive load
boundary, forward
ArgLd 5 - 70 1 25 Deg Load angle determining
load impedance area
RLdOutRv 0.10 - 3000.00 0.01 30.00 ohm Outer resistive load
boundary, reverse
225

kLdRFw 0.50 - 0.90 0.01 0.75 Mult Multiplication factor for
inner resistive load
boundary, forward
kLdRRv 0.50 - 0.90 0.01 0.75 Mult Multiplication factor for
inner resistive load
boundary, reverse
tEF 0.000 - 60.000 0.001 3.000 s Timer for overcoming sin-
gle-pole reclosing dead
time
IMinOpPE 5 - 30 1 10 %IB Minimum operate cur-
rent in % of IBase
level settings
Table 111: Advanced parameter group settings for the ZMRPSB_78 (PSD1-) function
tP1 0.000 - 60.000 0.001 0.045 s Timer for detection of ini-
tial power swing
tP2 0.000 - 60.000 0.001 0.015 s Timer for detection of
subsequent power
swings
tW 0.000 - 60.000 0.001 0.250 s Waiting timer for activa-
tion of tP2 timer
tH 0.000 - 60.000 0.001 0.500 s Timer for holding power
swing START output
tR1 0.000 - 60.000 0.001 0.300 s Timer giving delay to
inhibit by the residual cur-
rent
tR2 0.000 - 60.000 0.001 2.000 s Timer giving delay to
inhibit at very slow swing
10.6 Technical data

Table 112: Power swing detection (RPSB, 78)
Reactive reach (0.10-3000.00) Ω/phase ± 2.0% static accuracy
Conditions:
Resistive reach (0.10–1000.00)Ω /loop Angle: at 0 degrees and 85
degrees
Timers (0.000-60.000) s ± 0.5% ± 10 ms
226
Power swing logic (RPSL, 78) Chapter 5
11 Power swing logic (RPSL, 78)
Function block name: PSL-- IEC 60617 graphical symbol:

ANSI number:
ZMRPSL
11.1 Introduction
Power Swing Logic (RPSL) is a complementary function to Power Swing Detection (PSD) func-
tion. It provides possibility for selective tripping of faults on power lines during system oscilla-
tions (power swings or pole slips), when the distance protection function should normally be
blocked. The complete logic consists of two different parts:
• Communication and tripping part. It provides selective tripping on the basis of

special distance protection zones and a scheme communication logic, which are
not blocked during the system oscillations.
• Blocking part. It blocks unwanted operation of instantaneous distance protection
zone 1 for oscillations, which are initiated by faults and their clearing on the ad-
jacent power lines and other primary elements.

11.2.1 Communication and tripping logic
Communication and tripping logic as used by the power swing distance protection zones is sche-
matically presented in figure 133.
227
STDEF
AR1P1 &
STPSD tCS
CS
BLOCK & t &
CSUR
BLKZMPS
tBlkTr &
tTrip t
t
CACC TRIP
>1
CR &
en06000236.vsd
Figure 132: Simplified logic diagram – power swing communication and tripping logic
The complete logic remains blocked as long as there is a logical one on the BLOCK functional
input signal. Presence of the logical one on the STDEF functional input signal also blocks the
logic as long as this block is not released by the logical one on the AR1P1 functional input sig-
nal. The functional output signal BLKZMPS remains logical one as long as the function is not
blocked externally (BLOCK is logical zero) and the earth-fault is detected on protected line
(STDEF is logical one), which is connected in three-phase mode (AR1P1 is logical zero). Timer
tBlkTr prolongs the duration of this blocking condition, if the measured impedance remains
within the operate area of the PSD function (STPSD input active). The BLKZMPS can be used
to block the operation of the power-swing zones.
Logical one on functional input CSUR, which is normally connected to the TRIP functional out-
put of a power swing carrier sending zone, activates functional output CS, if the function is not
blocked by one of the above conditions. It also activates the TRIP functional output.
Initiation of the CS functional output is possible only, if the STPSD input has been active longer
than the time delay set on the security timer tCS.
Simultaneous presence of the functional input signals PLTR_CRD and CR (local trip condition)
also activates the TRIP functional output, if the function is not blocked by one of the above con-
ditions and the STPSD signal has been present longer then the time delay set on the trip timer
tTrip.
11.2.2 Blocking logic

Figure 134 presents the logical circuits, which control the operation of the underreaching zone
(zone 1) at power swings, caused by the faults and their clearance on the remote power lines.
228
&
BLKZMH
&
STZML tZL
STZMLL
BLOCK & t >1
&
STMZH tDZ
STZMPSD & t
>1
STPSD
&
-loop
en06000237.vsd
Figure 133: Control of underreaching distance protection (Zone 1) at power swings caused by
the faults and their clearance on adjacent lines and other system elements
The logic is disabled by a logical one on functional inputBLOCK. It can start only if the follow-
ing conditions are simultaneously fulfilled:
• STPSD functional input signal must be a logical zero. This means, that the PSD
function must not detect power swinging over the protected power line.
• STZMPSD functional input must be a logical one. This means that the impedance
must be detected within the external boundary of the PSD function.
• STZMOR functional input must be a logical one. This means that the fault must
be detected by the overreaching distance protection zone, for example zone 2.
The STZMURPS functional output, which can be used in complete terminal logic instead of a
normal distance protection zone 1, becomes active under the following conditions:
• If the STZMUR signal appears at the same time as the STZMOR or if it appears
with a time delay, which is shorter than the time delay set on timer tDZ.
• If the STZMUR signal appears after the STZMOR signal with a time delay longer
than the delay set on the tDZ timer, and remains active longer than the time delay
set on the tZL timer.
The BLKZMOR functional output signal can be used to block the operation of the higher dis-
tance protection zone, if the fault has moved into the zone 1 operate area after tDZ time delay.
229
11.3 Function block
PSL1-
ZMRPSL
BLOCK TRIP
STZMUR STZMURPS
STZMOR BLKZMUR
STPSD BLKZMOR
STDEF CS
STZMPSD
CACC
AR1P1
CSUR
CR
en07000026.vsd
Figure 134: PSL function block

Table 113: Input signals for the ZMRPSL (PSL1-) function block
Signal Description
STZMUR Start of the underreaching zone
STZMOR Start of the overreaching zone
STPSD Power swing detected
STDEF Start from Earth Fault Protection in forward or reverse direction
STZMPSD Operation of Power Swing Detection external characteristic
CACC Overreaching ZM zone to be accelerated
AR1P1 Single pole auto-reclosing in progress
CSUR Carrier send by the underreaching power-swing zone
CR Carrier receive signal during power swing detection operation
Table 114: Output signals for the ZMRPSL (PSL1-) function block
Signal Description
TRIP Trip through Power Swing Logic
STZMURPS Start of Underreaching zone controlled by PSL to be used in
configuration
BLKZMUR Block trip of underreaching impedance zone
BLKZMOR Block trip of overreaching distance protection zones
CS Carrier send signal controlled by the power swing
230

Table 115: Basic parameter group settings for the ZMRPSL (PSL1-) function
On
tDZ 0.000 - 60.000 0.001 0.050 s Permitted max oper time
diff between higher and
lower zone
tDZMUR 0.000 - 60.000 0.001 0.200 s Delay for oper of under-
reach zone with detected
diff in oper time
tCS 0.000 - 60.000 0.001 0.100 s Conditional timer for
sending the CS at power
swings
tTrip 0.000 - 60.000 0.001 0.100 s Conditional timer for trip-
ping at power swings
tBlkTr 0.000 - 60.000 0.001 0.300 s Timer for blocking the
overreaching zones trip
11.6 Technical data
231
Pole Slip protection (PPAM, 78) Chapter 5
12 Pole Slip protection (PPAM, 78)
Function block name: IEC 60617 graphical symbol:

ANSI number: 78
<
12.1 Introduction
Sudden events in an electrical power system such as large changes in load, fault occurrence or
fault clearance, can cause power oscillations referred to as power swings. In a non-recoverable
situation, the power swings become so severe that the synchronism is lost, a condition referred
to as pole slipping. The main purpose of the pole slip protection is to detect, evaluate, and take
the required action for pole slipping occurrences in the power system. The electrical system parts
swinging to each other can be separated with the line/s closest to the centre of the power swing
allowing the two systems to be stable as separated islands.

If the generator is faster than the power system, the rotor movement in the impedance and volt-
age diagram is from right to left and generating is signalled. If the generator is slower than the
power system, the rotor movement is from left to right and motoring is signalled (the power sys-
tem drives the generator as if it were a motor).
The movements in the impedance plain can be seen in figure 136. The transient behaviour is de-
scribed by the transient e.m.f's EA and EB, and by X'd, XT and the transient system impedance
Z S.
232
Zone 1 Zone 2
EB X’d XT XS EA
REG 670
B A
jX
XS
Pole slip
impedance XT
δ Apparent generator
movement impedance R
X’d
en06000437.vsd
where:
X'd = transient reactance of the generator
XT = short-circuit reactance of the step-up transformer
ZS = impedance of the power system A
Figure 135: Movements in the impedance plain
The detection of rotor angle is enabled when:
• the minimum current exceeds 0.10 IN (IN is IBase parameter set under general set-
ting).
• the maximum voltage falls below 0.92 UBase
233
• the voltage Ucos (the voltage in phase with the generator current) has an angular
velocity of 0.2...8 Hz and
• the corresponding direction is not blocked.
en07000004.vsd
Figure 136: Different generator quantities as function of the angle between the equivalent gen-
erators
An alarm is given when movement of the rotor is detected and the rotor angle exceeds the angle
set for 'WarnAngle'.
Slipping is detected when:
• a change of rotor angle of min. 50 ms is recognized

• the slip line is crossed between ZA and ZB.
When the impedance crosses the slip line between ZB and ZC it counts as being in zone 1 and
between ZC and ZA in zone 2. The entire distance ZA-ZB becomes zone 1 when 'EnableZone1'
is enabled (external device detects the direction of the centre of slipping).
After the first slip, the signals 'Zone1' or 'Zone2' and – depending on the direction of slip - either
'Generator' or 'Motor' are issued.
Every time pole slipping is detected, the impedance of the point where the slip line is crossed
and the instantaneous slip frequency are displayed as measurements.
234
Further slips are only detected, if they are in the same direction and if the rate of rotor movement
has reduced in relation to the preceding slip or the slip line is crossed in the opposite direction
outside ZA-ZB. A further slip in the opposite direction within ZA-ZB resets all the signals and
is then signalled itself as a first slip.
The 'Trip1' tripping command and signal are generated after n1 slips in zone 1, providing the
rotor angle is less than 'TripAngle'. The 'Trip2' signal is generated after n2 slips in zone 2, pro-
viding the rotor angle is less than 'TripAngle'.
All signals are reset if:
• the direction of movement reverses

• the rotor angle detector resets without a slip being counted or
• no rotor relative movement was detected during the time 't-Reset'.
Imin > 0.10 IBase
Ucosϕ < 0.92 UBase AND
START
AND
0.2 ≤ Slip.Freq. ≤ 8 Hz
δ ≥ startAngle
ZONE1
AND
Z cross line ZA - ZC
ZONE2
AND
Z cross line ZC - ZB
Counter
a
a≥b
N1Limit b TRIP1
AND
δ ≤ tripAngle OR
TRIP
Counter
a
N2Limit b a≥b TRIP2
AND
en07000005.vsd
Figure 137: Simplified logic diagram for pole slip protection
235
12.3 Function block
PSP1-
PSPPPAM_78
I3P TRIP
U3P TRIP1
BLOCK TRIP2
BLKGEN START
BLKMOTOR ZONE1
EXTZONE1 ZONE2
GEN
MOTOR
SFREQ
SLIPZOHM
SLIPZPER
UCOSKV
UCOSPER
en07000030.vsd
Figure 138: PSP function block

Table 116: Input signals for the PSPPPAM_78 (PSP1-) function block
Signal Description
I3P Current group connection
U3P Voltage group connection
BLKGEN Block operation in generating direction
BLKMOTOR Block operation in motor direction
EXTZONE1 Extension of zone1 with zone2 region
Table 117: Output signals for the PSPPPAM_78 (PSP1-) function block
Signal Description
TRIP Common trip signal
TRIP1 Trip1 after the N1Limit slip in zone1
TRIP2 Trip2 after the N2Limit slip in zone2
START Common start signal
ZONE1 First slip in zone1 region
ZONE2 First slip in zone2 region
GEN Generator is faster then the system
MOTOR Generator is slower then the system
236
Signal Description
SFREQ Slip frequency
SLIPZOHM Slip impedance in ohms
SLIPZPER Slip impedance in percent of ZBase
UCOSKV UCosPhi voltage in kV
UCOSPER UCosPhi voltage in percent of UBase

Table 118: Basic general settings for the PSPPPAM_78 (PSP1-) function
IBase 0.1 - 99999.9 0.1 3000.0 A Base Current (primary
phase current in
Amperes)
UBase 0.1 - 9999.9 0.1 20.0 kV Base Voltage (primary
phase-to-phase voltage
in kV)
MeasureMode PosSeq - PosSeq - Measuring mode (Pos-
L1L2 Seq, L1L2, L2L3, L3L1)
L2L3
L3L1
InvertCTcurr No - No - Invert current direction
Yes
Table 119: Basic parameter group settings for the PSPPPAM_78 (PSP1-) function
Operation Off - Off - Operation On / Off
On
OperationZ1 Off - On - Operation Zone1 On / Off
On
OperationZ2 Off - On - Operation Zone2 On / Off
On
ImpedanceZA 0.00 - 1000.00 0.01 10.00 % Forward impedance in %
of Zbase
ImpedanceZB 0.00 - 1000.00 0.01 10.00 % Reverse impedance in %
of Zbase
ImpedanceZC 0.00 - 1000.00 0.01 10.00 % Impedance of zone1 limit
in % of Zbase
237

AnglePhi 72.00 - 90.00 0.01 85.00 Deg Angle of the slip imped-
ance line
StartAngle 0.0 - 180.0 0.1 110.0 Deg Rotor angle for the start
signal
TripAngle 0.0 - 180.0 0.1 90.0 Deg Rotor angle for the trip1
and trip2 signals
N1Limit 1 - 20 1 1 - Count limit for the trip1
signal
N2Limit 1 - 20 1 3 - Count limit for the trip2
signal
Table 120: Advanced parameter group settings for the PSPPPAM_78 (PSP1-) function
ResetTime 0.000 - 60.000 0.001 5.000 s Time without slip to reset
all signals
12.6 Technical data

Table 121: Pole slip protection (PPAM, 78)
Impedance reach (0.00–1000.00)% of Zbase ± 2.0% of Ur/Ir
Characteristic angle (72.00–90.00) degrees ± 5.0 degrees
Start and trip angles (0.0–180.0) degrees ± 5.0 degrees
Zone 1 and Zone 2 trip counters (1-20) -
238
Automatic switch onto fault logic, voltage and Chapter 5
current based (SFCV) Impedance protection
13 Automatic switch onto fault logic, voltage and

current based (SFCV)
Function block name: SFV-- IEC 60617 graphical symbol:

ANSI number:
ZCVPSOF
13.1 Introduction
Automatic switch onto fault logic is a function that gives an instantaneous trip at closing of
breaker onto a fault. A dead line detection check is provided to activate the function when the
line is dead.
Mho distance protections can not operate for switch on to fault condition when the phase volt-
ages are close to zero. An additional logic based on UI Level is used for this purpose.

The switch-onto-fault function (SFV) can be activated externally by Breaker Closed Input or in-
ternally (automatically) by using UI Level Based Logic see figure 140.
The activation from the DLD function is released if the internal signal DeadLine from the UI-
Level function is activated at the same time as the input ZACC is not activated during at least
for a duration tDLD and the setting parameter AutoInit is set to On.
When the setting AutoInit is Off the function is activated by an external binary input BC. To
get a trip also one of the following operation modes must be selected by the parameter Mode:
Mode = Impedance; trip is released if the input ZACC is activated (normal connected to non di-
rectional distance protection zone)
Mode = UILevel; trip is released if UILevel detector is activated
Mode = Both; trip is initiated based on impedance measured criteria or UILevel detection
The internal signal DeadLine from the UILevel detector is activated if all three phase currents
and voltages are below the setting IPh< and UPh<.
UI Level based measurement detects the switch onto fault condition even though the voltage is
very low. The logic is based on current change for activation, current level and voltage level.
The internal signal SOTFLevel is activated if the phase voltage and corresponding phase current
is below the setting IPh< and UPh< in any phase.
First of all AutoInit= On is not needed (or in some cases not even wanted) for external activation
and secondly the information is already present in the first sentence of "Principle of operation"
The function is released during a settable time tSOTF.
239
The function can be blocked by activating the input BLOCK.
BLOCK 15
t TRIP
AND
BC
AutiInit=On
200 1000
OR t
ZACC AND t
IL1
deadLine
IL2
IL3
UL1 UILevel detector
UL2
UL3
Iph<
SOTFU ILevel
Uph<
AND
Mode = Impedance
AND OR
Mode = UILevel
OR
AND
Mode = UILvl&Imp
en07000084.vsd
240
Figure 139: Simplified logic diagram for current and voltage based switch onto fault logic.
13.3 Function block
SFV1-
ZCVPSOF
I3P TRIP
U3P
BLOCK
BC
ZACC
en06000459.vsd
Figure 140: SFV1 function block

Table 122: Input signals for the ZCVPSOF (SFV1-) function block
Signal Description
I3P Current DFT
U3P Voltage DFT
BC External enabling of SOTF
ZACC Distance zone to be accelerated by SOTF
Table 123: Output signals for the ZCVPSOF (SFV1-) function block
Signal Description
TRIP Trip output

Table 124: Basic parameter group settings for the ZCVPSOF (SFV1-) function
On
IBase 1 - 99999 1 3000 A Base current (A)
UBase 0.05 - 2000.00 0.05 400.00 kV Base voltage L-L (kV)
Mode Impedance - UILevel - Mode of operation of
UILevel SOTF Function
UILvl&Imp
AutoInit Off - Off - Automatic switchonto
On fault initialization
241

IPh< 1 - 100 1 20 %IB Current level for detec-
tion of dead line in % of
IBase
UPh< 1 - 100 1 70 %UB Voltage level for detec-
tion of dead line in % of
UBase
tDuration 0.000 - 60.000 0.001 0.020 s Time delay for UI detec-
tion (s)
tSOTF 0.000 - 60.000 0.001 1.000 s Drop off delay time of
switch onto fault function
tDLD 0.000 - 60.000 0.001 0.200 s Delay time for activation
of dead line detection
13.6 Technical data

Table 125: Automatic switch onto fault logic, voltage and current based (PSOF)
Parameter Range or value Accuracy
Operate voltage, detection of dead line (1–100)% of Ubase ± 1.0% of Ur
Operate current, detection of dead line (1–100)% of Ibase ± 1.0% of Ir
Delay following dead line detection input before SOTF (0.000–60.000) s ± 0.5% ± 10 ms
function is automatically enabled
Time period after circuit breaker closure in which (0.000–60.000) s ± 0.5% ± 10 ms
SOTF function is active
242
Current protection
Chapter 6 Current protection
About this chapter

This chapter describes current protection functions. These include functions like Instantaneous
phase overcurrent protection, Four step phase overcurrent protection, Pole discordance protec-
tion and Residual overcurrent protection.
243
Instantaneous phase overcurrent protection Chapter 6
(PIOC, 50) Current protection
1 Instantaneous phase overcurrent protection

(PIOC, 50)
Function block name: IOCx- IEC 60617 graphical symbol:

ANSI number: 50
PHPIOC
3I>>
1.1 Introduction
The instantaneous three phase overcurrent function has a low transient overreach and short trip-
ping time to allow use as a high set short-circuit protection function, with the reach limited to
less than typical eighty percent of the fault current line at minimum source impedance.

The sampled analogue phase currents are pre-processed in a discrete Fourier filter (DFT) block.
From the fundamental frequency components of each phase current the RMS value of each
phase current is derived. These phase current values are fed to the IOC function. In a comparator
the RMS values are compared to the set operation current value of the function (IP>>). If a
phase current is larger than the set operation current a signal from the comparator for this phase
is set to true. This signal will, without delay, activate the output signal TRLn (n=1,2,3) for this
phase and the TRIP signal that is common for all three phases.
There is an operation mode (OpMode) setting: “1 out of 3” or “2 out of 3”. If the parameter is
set to “1 out of 3” any phase trip signal will be activated. If the parameter is set to “2 out of 3”
at least two phase signals must be activated for trip.
There is also a possibility to activate a preset change of the set operation current (StValMult) via
a binary input (ENMULT). In some applications the operation value needs to be changed, for
example due to transformer inrush currents.
The function can be blocked from the binary input BLOCK.
1.3 Function block
IOC1-
PHPIOC_50
I3P TRIP
BLOCK TRL1
ENMULT TRL2
TRL3
en04000391.vsd
Figure 141: IOC function block
244

Table 126: Input signals for the PHPIOC_50 (IOC1-) function block
Signal Description
I3P Three phase current
ENMULT Enable current start value multiplier
Table 127: Output signals for the PHPIOC_50 (IOC1-) function block
Signal Description
TRIP Trip signal from any phase

Table 128: Basic parameter group settings for the PHPIOC_50 (IOC1-) function
On
OpMode 2 out of 3 - 1 out of 3 - Select operation mode
1 out of 3 2-out of 3 / 1-out of 3
IP>> 1 - 2500 1 200 %IB Operate phase current
level in % of IBase
Table 129: Advanced parameter group settings for the PHPIOC_50 (IOC1-) function
StValMult 0.5 - 5.0 0.1 1.0 - Multiplier for operate cur-
rent level
245
1.6 Technical data

Table 130: Instantaneous phase overcurrent protection (PIOC, 50)
Operate current (1-2500)% of lbase ± 1.0% of Ir at I ≤ Ir
± 1.0% of I at I > Ir
Reset ratio > 95% -
Operate time 25 ms typically at 0 to 2 x Iset -
Reset time 25 ms typically at 2 to 0 x Iset -
Critical impulse time 10 ms typically at 0 to 2 x Iset -
Dynamic overreach < 5% at τ = 100 ms -
246
Four step phase overcurrent Chapter 6
protection (PTOC, 51_67) Current protection
2 Four step phase overcurrent

protection (PTOC, 51_67)
Function block name: TOCx- IEC 60617 graphical symbol:

ANSI number: 51/67
OC4PTOC
3I>
4
alt
4
2.1 Introduction
The four step phase overcurrent function has an inverse or definite time delay independent for
each step separately.
All IEC and ANSI time delayed characteristics are available together with an optional user de-
fined time characteristic.
The function can be set to be directional or non-directional independently for each of the steps.

The function is divided into four different sub-functions, one for each step. For each step x an
operation mode is set (DirModex): Off/Non-directional/Forward/Reverse.
The protection design can be decomposed in four parts:
• The direction element, indicates the over current fault direction

• The harmonic Restraint Blocking function
• The 4 step over current function
• The Mode Selection
Note!
If VT inputs are not available or not connected, func parameter DirModex shall be left to default
value, Non-directional.
247
4 step over current

Direction dirPh1Flt element faultState
faultState
Element One element for each
dirPh2Flt step
I3P dirPh3Flt START
U3P
TRIP
Harmonic harmRestrBlock
I3P Restraint
Element
enableDir
Mode Selection
enableStep1-4
DirectionalMode1-4
en05000740.vsd
Figure 142: Functional overview of TOC.
A common setting for all steps, StPhaseSel, is used to specify the number of phase currents to
be high to enable operation. The settings can be chosen: 1 out of 3, 2 out of 3 or 3 out of 3.
The sampled analogue phase currents are pre-processed in a pre-processing function blocks. By
a parameter setting within the general settings for the TOC function it is then possible to select
type of measurement which shall be used by TOC function for all overcurrent stages. It is pos-
sible to select either discrete Fourier filter (DFT) or true RMS filer (RMS). If DFT option is se-
lected then only the RMS value of the fundamental frequency components of each phase current
is derived. Influence of DC current component and higher harmonic current components are al-
most completely suppressed. If RMS option is selected then the true RMS values is used. The
true RMS value in addition to the fundamental frequency component includes the contribution
from the current DC component as well as from higher current harmonic. The selected current
values are fed to the TOC function. In a comparator, for each phase current, the DFT or RMS
values are compared to the set operation current value of the function (I1>, I2>, I3> or I4>). If
a phase current is larger than the set operation current a signal from the comparator for this phase
and step is set to true. This signal will, without delay, activate the output signal Start for this
phase/step, the Start signal common for all three phases for this step and a common Start signal.
248
It shall be noted that the selection of measured value (i.e. DFT or RMS) do not influence the
operation of directional part of TOC function. Service value for individually measured phase
currents are available from the TOC function. This feature simplifies testing, commissioning
and in service operational checking of the function.
A harmonic restrain of the function can be chosen. A set 2nd harmonic current in relation to the
fundamental current is used. The 2nd harmonic current is taken from the pre-processing of the
phase currents and the relation is compared to a set restrain current level.
The function can use a directional option. The direction of the fault current is given as current
angle in relation to the voltage angle. The fault current and fault voltage for the directional func-
tion is dependent of the fault type. To enable directional measurement at close in faults, causing
low measured voltage, the polarization voltage is a combination of the apparent voltage (85%)
and a memory voltage (15%). The following combinations are used.
Phase-phase short circuit:
U refL1L 2 = U L1 − U L 2 I dirL1L 2 = I L1 − I L 2
U refL 2 L 3 = U L 2 − U L 3 I dirL 2 L 3 = I L 2 − I L 3
U refL 3 L1 = U L 3 − U L1 I dirL 3 L1 = I L 3 − I L1
Phase-earth short circuit:
U refL1 = U L1 I dirL1 = I L1
U refL 2 = U L 2 I dirL 2 = I L 2
U refL 3 = U L 3 I dirL 3 = I L 3
The directional setting is given as a characteristic angle AngleRCA for the function and an angle
window AngleROA.
249
Reverse
Uref
RCA
ROA
ROA Forward
Idir
en05000745.vsd
Figure 143: Directional characteristic of the phase overcurrent protection
The default value of AngleRCA is –65°. The parameters AngleROA gives the angle sector from
AngleRCA for directional borders.
A minimum current for directional phase start current signal can be set: IminOpPhSel.
If no blockings are given the start signals will start the timers of the step. The time characteristic
for each step can be chosen as definite time delay or some type of inverse time characteristic. A
wide range of standardized inverse time characteristics is available. It is also possible to create
a tailor made time characteristic. The possibilities for inverse time characteristics are described
in chapter 21 "Time inverse characteristics".
Different types of reset time can be selected as described in chapter21 "Time inverse character-
istics".
There is also a possibility to activate a preset change (IxMult, x= 1, 2, 3 or 4) of the set operation
current via a binary input (enable multiplier). In some applications the operation value needs to
be changed, for example due to changed network switching state. The function can be blocked
from the binary input BLOCK. The start signals from the function can be blocked from the bi-
nary input BLKST. The trip signals from the function can be blocked from the binary input
BLKTR.
250
2.3 Function block
TOC1-
OC4PTOC_51_67
I3P TRIP
U3P TR1
BLOCK TR2
BLKTR TR3
BLKST1 TR4
BLKST2 TRL1
BLKST3 TRL2
BLKST4 TRL3
ENMULT1 TR1L1
ENMULT2 TR1L2
ENMULT3 TR1L3
ENMULT4 TR2L1
TR2L2
TR2L3
TR3L1
TR3L2
TR3L3
TR4L1
TR4L2
TR4L3
START
ST1
ST2
ST3
ST4
STL1
STL2
STL3
ST1L1
ST1L2
ST1L3
ST2L1
ST2L2
ST2L3
ST3L1
ST3L2
ST3L3
ST4L1
ST4L2
ST4L3
2NDHARM
DIRL1
DIRL2
DIRL3
en06000187.vsd
Figure 144: TOC function block
251

Table 131: Input signals for the OC4PTOC_51_67 (TOC1-) function block
Signal Description
BLKTR Block of trip
BLKST1 Block of Step1
ENMULT1 When activated, the current multiplier is in use for step1
Table 132: Output signals for the OC4PTOC_51_67 (TOC1-) function block
Signal Description
TRIP Trip
TR1 Common trip signal from step1
TR1L1 Trip signal from step1 phase L1
START General start signal
252
Signal Description
ST1 Common start signal from step1
ST1L1 Start signal from step1 phase L1
2NDHARM Block from second harmonic detection
DIRL1 Direction for phase1

Table 133: Basic general settings for the OC4PTOC_51_67 (TOC1-) function
MeasType DFT - DFT - Selection between DFT
RMS and RMS measurement
253
Table 134: Basic parameter group settings for the OC4PTOC_51_67 (TOC1-) function
On
AngleRCA 40 - 65 1 55 Deg Relay characteristic
angle (RCA)
AngleROA 40 - 89 1 80 Deg Relay operation angle
(ROA)
StartPhSel Not Used - 1 out of 3 - Number of phases
1 out of 3 required for op (1 of 3, 2
2 out of 3 of 3, 3 of 3)
3 out of 3
DirMode1 Off - Non-directional - Directional mode of step
Non-directional 1 (off, nodir, forward,
Forward reverse)
Reverse
Characterist1 ANSI Ext. inv. - ANSI Def. Time - Selection of time delay
ANSI Very inv. curve type for step 1
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
I1> 1 - 2500 1 1000 %IB Phase current operate
level for step1 in % of
IBase
t1 0.000 - 60.000 0.001 0.000 s Definitive time delay of
step 1
k1 0.05 - 999.00 0.01 0.05 - Time multiplier for the
inverse time delay for
step 1
t1Min 0.000 - 60.000 0.001 0.000 s Minimum operate time for
inverse curves for step 1
254

I1Mult 1.0 - 10.0 0.1 2.0 - Multiplier for current
operate level for step 1
Forward reverse)
Reverse
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
IBase
step 2
step 2
Forward reverse)
Reverse
255

ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
IBase
step 3
step 3
Forward reverse)
Reverse
256

ANSI Norm. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
IBase
step 4
step 4
257
Table 135: Advanced parameter group settings for the OC4PTOC_51_67 (TOC1-) function
IMinOpPhSel 1 - 100 1 7 %IB Minimum current for
phase selection in % of
IBase
2ndHarmStab 5 - 100 1 20 %IB Operate level of 2nd
harm restrain op in % of
Fundamental
ResetTypeCrv1 Instantaneous - Instantaneous - Selection of reset curve
IEC Reset type for step 1
ANSI reset
tReset1 0.000 - 60.000 0.001 0.020 s Reset time delay used in
IEC Definite Time curve
step 1
tPCrv1 0.005 - 3.000 0.001 1.000 - Parameter P for cus-
tomer programmable
curve for step 1
tACrv1 0.005 - 200.000 0.001 13.500 - Parameter A for cus-
tomer programmable
curve for step 1
tBCrv1 0.00 - 20.00 0.01 0.00 - Parameter B for cus-
tomer programmable
curve for step 1
tCCrv1 0.1 - 10.0 0.1 1.0 - Parameter C for cus-
tomer programmable
curve for step 1
tPRCrv1 0.005 - 3.000 0.001 0.500 - Parameter PR for cus-
tomer programmable
curve for step 1
tTRCrv1 0.005 - 100.000 0.001 13.500 - Parameter TR for cus-
tomer programmable
curve for step 1
tCRCrv1 0.1 - 10.0 0.1 1.0 - Parameter CR for cus-
tomer programmable
curve for step 1
HarmRestrain1 Off - Off - Enable block of step 1
On from harmonic restrain
ANSI reset
step 2
tomer programmable
curve for step 2
tomer programmable
curve for step 2
258

tomer programmable
curve for step 2
tomer programmable
curve for step 2
tomer programmable
curve for step 2
tomer programmable
curve for step 2
tomer programmable
curve for step 2
ANSI reset
step 3
tomer programmable
curve for step 3
tomer programmable
curve for step 3
tomer programmable
curve for step 3
tomer programmable
curve for step 3
tomer programmable
curve for step 3
tomer programmable
curve for step 3
tomer programmable
curve for step 3
HarmRestrain3 Off - Off - Enable block of step3
259

ANSI reset
step 4
tomer programmable
curve for step 4
tomer programmable
curve for step 4
tomer programmable
curve for step 4
tomer programmable
curve for step 4
tomer programmable
curve for step 4
tomer programmable
curve for step 4
tomer programmable
curve for step 4
2.6 Technical data

Table 136: Four step phase overcurrent protection (POCM, 51/67)
Function Setting range Accuracy
± 1.0% of I at I > Ir
Reset ratio > 95% -
Min. operating current (1-100)% of lbase ± 1.0% of Ir
Relay characteristic angle (RCA) (-70.0– -50.0) degrees ± 2.0 degrees
Maximum forward angle (40.0–70.0) degrees ± 2.0 degrees
Minimum forward angle (75.0–90.0) degrees ± 2.0 degrees
Second harmonic blocking (5–100)% of fundamental ± 2.0% of Ir
Independent time delay (0.000-60.000) s ± 0.5% ± 10 ms
Minimum operate time (0.000-60.000) s ± 0.5% ± 10 ms
260

Inverse characteristics, see 19 curve types See table 577 and table 578
table 577 and table 578
Operate time, start function 25 ms typically at 0 to 2 x Iset -
Reset time, start function 25 ms typically at 2 to 0 x Iset -
Impulse margin time 15 ms typically -
261
Instantaneous residual overcurrent protection Chapter 6
(PIOC, 50N) Current protection
3 Instantaneous residual overcurrent protection

(PIOC, 50N)
Function block name: IEFx- IEC 60617 graphical symbol:

ANSI number: 50N
EFPIOC
IN>>
3.1 Introduction
The single input overcurrent function has a low transient overreach and short tripping times to
allow use for instantaneous earth fault protection, with the reach limited to less than typical
eighty percent of the line at minimum source impedance. The function can be configured to mea-
sure the residual current from the three phase current inputs or the current from a separate current
input.

The sampled analogue residual currents are pre-processed in a discrete Fourier filter (DFT)
block. From the fundamental frequency components of the residual current the RMS value is de-
rived. This current value is fed to the IEF function. In a comparator the RMS value is compared
to the set operation current value of the function (IN>>). If the residual current is larger than the
set operation current a signal from the comparator is set to true. This signal will, without delay,
activate the output signal TRIP.
There is also a possibility to activate a preset change of the set operation current via a binary
input (enable multiplier MULTEN). In some applications the operation value needs to be
changed, for example due to transformer inrush currents.
The function can be blocked from the binary input BLOCK. The trip signals from the function
can be blocked from the binary input BLKAR, that can be activated during single pole trip and
autoreclosing sequences.
262
3.3 Function block
IEF1-
EFPIOC_50N
I3P TRIP
BLOCK
BLKAR
MULTEN
en06000269.vsd
Figure 145: IEF function block

Table 137: Input signals for the EFPIOC_50N (IEF1-) function block
Signal Description
I3P Three phase currents
BLKAR Block input for auto reclose
MULTEN Enable current multiplier
Table 138: Output signals for the EFPIOC_50N (IEF1-) function block
Signal Description
TRIP Trip signal

Table 139: Basic parameter group settings for the EFPIOC_50N (IEF1-) function
On
IN>> 1 - 2500 1 200 %IB Operate residual current
level in % of IBase
Table 140: Advanced parameter group settings for the EFPIOC_50N (IEF1-) function
StValMult 0.5 - 5.0 0.1 1.0 - Multiplier for operate cur-
rent level
263
3.6 Technical data

Table 141: Instantaneous residual overcurrent protection (PIOC, 50N)
± 1.0% of I at I > Ir
Reset ratio > 95% -
Dynamic overreach < 5% at τ = 100 ms -
264
Four step residual overcurrent Chapter 6
protection (PTOC, 51N/67N) Current protection
4 Four step residual overcurrent

protection (PTOC, 51N/67N)
Function block name: TEFx- IEC 60617 graphical symbol:

ANSI number:51N/ 67N
IN
EF4PTOC
4
alt
4
4.1 Introduction
The four step residual single input overcurrent function has an inverse or definite time delay in-
dependent for each step separately.
All IEC and ANSI time delayed characteristics are available together with an optional user de-
fined characteristic.
A second harmonic blocking can be set individually for each step.
The function can be used as main protection for phase to earth faults.
The function can be used to provide a system back-up e.g. in the case of the primary protection
being out of service due to communication or voltage transformer circuit failure.
Directional operation can be combined together with corresponding communication blocks into
permissive or blocking teleprotection scheme. Current reversal and weak-end infeed functional-
ity are available as well.
The function can be configured to measure the residual current from the three phase current in-
puts or the current from a separate current input.

This function has the following three “Analog Inputs” on its function block in the configuration
tool:
1. I3P, input for the function “Operating Quantity”.

2. U3P, input for the function “Voltage Polarizing Quantity”.
3. IP3P, input for the function “Current Polarizing Quantity”.
These inputs are connected from the corresponding pre-processing function blocks in the Con-
figuration Tool within PCM.
265
4.2.1 Operating quantity within the function

The function always uses Residual Current (i.e. 3Io) for its operating quantity. The residual cur-
rent can be:
1. directly measured (when a dedicated CT input of IED 670 is connected in SMT

tool to the fourth analog input of the pre-processing block connected to TEF func-
tion input I3P). This dedicated IED 670 CT input can be for example connected
to:
• parallel connection of current instrument transformers in all three phases
(well known Holm-Green connection).
• one single core balance, current instrument transformer (i.e. cable CT).
• one single current instrument transformer located between power system star
point and ground (i.e. current transformer located in the star point of a star
connected transformer winding).
• one single current instrument transformer located between two parts of a pro-
tected object (i.e. current transformer located between two star points of
double star shunt capacitor bank).
2. calculated from three phase current input within IED 670 (when the fourth analog
input into the pre-processing block connected to TEF function Analog Input I3P
is not connected to a dedicated CT input of IED 670 in SMT tool). In such case
the pre-processing block will calculate 3Io from the first three inputs into the
pre-processing block by using the following formula:
I op = 3 ⋅ Io = IL1 + IL2 + IL3

(Equation 58)
where:
IL1, IL2 and IL3 are fundamental frequency phasors of three individual phase currents.
The residual current is pre-processed by a discrete Fourier filter. Thus the phasor of the funda-
mental frequency component of the residual current is derived. The phasor magnitude is used
within the TEF function to compare it with the set operation current value of the four stages
(Pickup1, Pickup2, Pickup3 or Pickup4). If the residual current is larger than the set operation
current and the step is used in non-directional mode a signal from the comparator for this step is
set to true. This signal will, without delay, activate the output signal START for this step and a
common START signal.
4.2.2 Internal polarizing facility of the function

A polarizing quantity is used within the function in order to determine the direction of the earth
fault (i.e. Forward/Reverse).
The function can be set to use voltage polarizing, current polarizing or dual polarizing.
When Voltage Polarizing is selected the function will use the Residual Voltage (i.e. 3Uo) as po-
larizing quantity U3P. This voltage can be:
266
1. directly measured (when a dedicated VT input of IED 670 is connected in SMT

tion input U3P). This dedicated IED 670 VT input shall be then connected to
open delta winding of a three phase main VT.
2. calculated from three phase voltage input within IED 670 (when the fourth ana-
log input into the pre-processing block connected to TEF function Analogue In-
put U3P is NOT connected to a dedicated VT input of IED 670 in SMT tool). In
such case the pre-processing block will calculate 3Uo from the first three inputs
into the pre-processing block by using the following formula:
U VPol = 3 ⋅ Uo = UL1 + UL 2 + UL3

(Equation 59)
where:
UL1, UL2 and UL3 are fundamental frequency phasors of three individual phase voltages.
Note! In order to use this all three phase-to-ground voltages must be connected to three IED 670 VT
inputs.
The residual voltage is pre-processed by a discrete Fourier filter. Thus the phasor of the funda-
mental frequency component of the residual voltage is derived. This phasor is used, together
with the phasor of the operating current, in order to determine the direction of the earth fault (i.e.
Forward/Reverse). In order to enable voltage polarizing the magnitude of polarizing voltage
shall be bigger than a minimum level defined by setting parameter UpolMin.
It shall be noted that –3Uo is used to determine the location of the earth fault.Thus the setting
parameter ROT3U0, located under General Settings for Earth Fault function, has default value
of “ROT3U0=180 deg”. This insures the required inversion of the polarizing voltage within the
earth fault function.
When Current Polarizing is selected the function will use the Residual Current (i.e. 3Io) as po-
larizing quantity IPol. This current can be:
1. directly measured (when a dedicated CT input of IED 670 is connected in SMT

tion input IP3P). This dedicated IED 670 CT input is then typically connected to
one single current instrument transformer located between power system star
point and ground (i.e. current transformer located in the star point of a star con-
nected transformer winding).
• For some special line protection applications this dedicated IED 670 CT in-
put can be connected to parallel connection of current instrument transform-
ers in all three phases (well known Holm-Green connection)
2. calculated from three phase current input within IED 670 (when the fourth ana-
log input into the pre-processing block connected to TEF function Analog Input
IP3P is NOT connected to a dedicated CT input of IED 670 in SMT tool). In such
case the pre-processing block will calculate 3Io from the first three inputs into the
pre-processing block by using the following formula:
267
I Pol = 3 ⋅ Io = IL1 + IL 2 + IL 3
where:
IL1, IL2 are fundamental frequency phasors of three individual phase currents. However this option can
and IL3 be as well only used for some special line protection applications as explained in the Applica-
tion Manual.
The residual polarizing current is pre-processed by a discrete Fourier filter. Thus the phasor of
the fundamental frequency component of the residual current is derived. This phasor is then mul-
tiplied with pre-set equivalent Zero Sequence Source Impedance in order to calculate equivalent
Polarizing Voltage UIPol in accordance with the following formula:
U IPol = ZoS ⋅ I Pol = (RNPol+j ⋅ XNPol) ⋅ I Pol

(Equation 60)
which will be then used, together with the phasor of the operating current, in order to determine
the direction of the earth fault (i.e. Forward/Reverse). In order to enable current polarizing the
magnitude of polarizing current shall be bigger than a minimum level defined by setting param-
eter IPollMin.
When Dual Polarizing is selected the function will use the vectorial sum of the voltage based
and current based polarizing in accordance with the following formula:
U TotPol = U UPol + U IPol = 3Uo + ZoS ⋅ I Pol = 3Uo + (RNPol+j ⋅ XNPol) ⋅ I Pol
(Equation 61)
Then the phasor of the total polarizing voltage UTotPol will be used, together with the phasor of
the operating current, to determine the direction of the earth fault (i.e. Forward/Reverse).
4.2.3 External polarizing facility for EF function

The individual stages within the function can be set as non-directional. When this setting is se-
lected it is then possible via function binary input BLKSTx (where x indicates the relevant step
within the function) to provide external directional control (i.e. torque control) by for example
using one of the following functions available in IED 670:
1. Distance protection directional unit.

2. Negative sequence polarized General current and voltage multi purpose protec-
tion function.
4.2.4 Base quantities within the function

The base quantities shall be entered as setting parameters for every EF function. Base current
shall be entered as rated phase current of the protected object in primary amperes. Base voltage
shall be entered as rated phase-to-phase voltage of the protected object in primary kV.
268
4.2.5 Internal EF function structure

The function is internally divided into the following parts:
1. Four residual overcurrent stages.

2. Directional supervision element for residual overcurrent stages with integrated
Directional Comparison stage for communication based earth fault protection
schemes (i.e. permissive or blocking).
3. Second harmonic blocking element with additional feature for sealed-in blocking
during switching of parallel transformers.
4. Switch on to fault feature with integrated Under-Time logic for detection of
breaker problems during breaker opening or closing sequence.
Each part is described separately in the following paragraphs.
4.2.6 Four residual overcurrent stages

Each overcurrent stage uses Operating Quantity IOp (i.e. Residual Current) as measuring quan-
tity. Every of the four residual overcurrent stage has the following built-in facilities:
• Operating mode (i.e. Off / Non-directional / Forward / Reverse). By this param-

eter setting the operating mode of the stage is selected. It shall be noted that the
directional decision (i.e. Forward/Reverse) is not made within residual overcur-
rent stage itself. The direction of the fault is determined in common “Directional
Supervision Element” described in the next paragraph.
• Residual current pickup value.
• Type of operating characteristic (Inverse or Definite Time). By this parameter
setting it is possible to select Inverse or definite time delay for earth fault func-
tion. Most of the standard IEC and ANSI inverse characteristics are available. For
the complete list of available inverse curves please refer to Chapter 21 "Time in-
verse characteristics"
• Type of reset characteristic (Instantaneous / IEC Reset /ANSI Rest). By this pa-
rameter setting it is possible to select the reset characteristic of the stage. For the
complete list of available reset curves please refer to Chapter 21 "Time inverse
characteristics"
• Time delay related settings. By these parameter settings the properties like defi-
nite time delay, minimum operating time for inverse curves, reset time delay and
parameters to define user programmable inverse curve are defined.
• Supervision by second harmonic blocking feature (i.e. On/Off). By this parame-
ter setting it is possible to prevent operation of the stage if the second harmonic
content in the residual current exceeds the pre-set level.
• Multiplier for scaling of the set residual current pickup value by external binary
signal. By this parameter setting it is possible to increase residual current pickup
value when function binary input ENMULTx has logical value 1.
Simplified logic diagram for one residual overcurrent stage is shown in the following figure:
269
BLKTR
Characteristx=DefTime tx TRINx
|IOP| AND
a OR
a>b
b
ENMULTx
STINx
INxMult AND
X T
INx> F
Inverse
BLKSTx
BLOCK Characteristx=Inverse
2ndH_BLOCK_Int
OR
HarmRestrain1=Disabled
DirModex=Off OR STAGEx_DIR_Int
DirModex=Non-directional
DirModex=Forward
AND OR
FORWARD_Int
DirModex=Reverse
AND
REVERSE_Int
en07000064.vsd
Figure 146: Simplified logic diagram for residual overcurrent stage x , where x=1, 2 ,3 or 4
The function can be completely blocked from the binary input BLOCK. The start signals from
the function for each stage can be blocked from the binary input BLKSTx. The trip signals from
the function can be blocked from the binary input BLKTR.
4.2.7 Directional supervision element with integrated directional comparision stage

Note!
It shall be noted that at least one of the four residual overcurrent stages shall be set as directional
in order to enable execution of the directional supervision element and the integrated directional
comparison stage.
The function has integrated directional feature. As the operating quantity current IOp is always
used. The polarizing method is determined by the parameter setting polMethod. The polarizing
quantity will be selected by the function in one of the following three ways:
1. When polMethod=Voltage, UVPol will be used as polarizing quantity.

2. When polMethod=Current, UIPol will be used as polarizing quantity.
3. When polMethod=Dual, UTotPol will be used as polarizing quantity.
The operating and polarizing quantity are then used inside the directional element, as shown in
the following figure, in order to determine the direction of the earth fault.
270
Reverse
Area
0.4*IN>Dir
Upol=-3Uo
AngleRCA
0.4*IN>Dir
Forward
Area
Iop=3Io
en07000066.vsd
Figure 147: Operating characteristic for earth fault directional element
Two relevant setting parameters for directional supervision element are:
• Operating Current Pickup IN>Dir. However it shall be noted that the directional
element will be internally enabled to operate as soon as IOp cos(ϕ - AngleRCA)
is bigger then 40% of IN>Dir.
• Relay characteristic angle AngleRCA which defines the position of Forward &
Reverse areas in the operating characteristic.
Directional Comparison stage, built-in within directional supervision element, will set EF func-
tion output binary signal:
1. STFW=1 when Operating Quantity magnitude is bigger than setting parameter

IN>Dir and directional supervision element detects fault in forward direction.
2. STRV=1 when Operating Quantity magnitude is bigger than 60% of setting pa-
rameter IN>Dir and directional supervision element detects fault in reverse di-
rection.
These signals shall be used for communication based earth fault teleprotection schemes (i.e. per-
missive or blocking).
271
Simplified logic diagram for directional supervision element with integrated directional compar-
ison stage is shown in the following figure:
|IOP|
a
a>b STRV
b AND
REVERSE_Int
0.6
X
a
a>b STFW
IN>Dir b AND
FORWARD_Int
X
0.4
FWD
AND FORWARD_Int
AngleRCA
Characteristic
PolMethod=Voltage
OR
Directional
PolMethod=Current UPolMin
PolMethod=Dual UPol IPolMin

OR
T
IOP
0.0 F
UTotPol
IPol AND REVERSE_Int
RVS
UIPol
RNPol COMPLEX X T
NUMBER
XNPol 0.0 F STAGE1_DIR_Int
STAGE2_DIR_Int
OR
STAGE3_DIR_Int
STAGE4_DIR_Int
BLOCK AND
en07000067.vsd
Figure 148: Simplified logic diagram for directional supervision element with integrated di-
rectional comparison stage
4.2.8 Second harmonic blocking element

A harmonic restrain of the function can be chosen. If the ratio of the 2nd harmonic component
in relation to the fundamental frequency component in the residual current exceeds the pre-set
level (defined by parameter setting 2ndHarmStab) any of the four residual overcurrent stages
can be selectively blocked by a parameter setting HarmRestrainx. When 2nd harmonic restraint
feature is active the EF function output signal 2NDHARMD will be set to logical value one.
272
In addition to the basic functionality explained above the 2nd harmonic blocking can be set in
such way to seal-in until residual current disappears. This feature might be required to stabilize
the EF function during switching of parallel transformers in the station. In case of parallel trans-
formers there is a risk of sympathetic inrush current. If one of the transformers is in operation,
and the parallel transformer is switched in, the asymmetric inrush current of the switched in
transformer will cause partial saturation of the transformer already in service. This is called
transferred saturation. The 2nd harmonic of the inrush currents of the two transformers will be
in phase opposition. The summation of the two currents will thus give a small 2nd harmonic cur-
rent. The residual fundamental current will however be significant. The inrush current of the
transformer in service before the parallel transformer energizing, will be a little delayed com-
pared to the first transformer. Therefore we will have high 2nd harmonic current component ini-
tially. After a short period this current will however be small and the normal 2nd harmonic
blocking will reset. If the BlkParTransf function is activated the 2nd harmonic restrain signal will
be latched as long as the residual current measured by the relay is larger than a selected step cur-
rent level.
This feature has been called Block for Parallel Transformers. This 2nd harmonic seal-in feature
will be activated when all of the following three conditions are simultaneously fulfilled:
1. Feature is enabled by entering setting parameter BlkParTransf=On.

2. Basic 2nd harmonic restraint feature has been active for at least 70 ms.
3. Residual current magnitude is higher than the set start value for one of the four
residual overcurrent stages. By a parameter setting UseStartValue it is possible
to select which one of the four start values that will be used (i.e. IN1> or IN2> or
IN3> or IN4>).
Once Block for Parallel Transformers is activated the basic 2nd harmonic blocking signal will
be sealed-in until the residual current magnitude falls below a value defined by parameter setting
UseStartValue (see condition 3 above).
Simplified logic diagram for 2nd harmonic blocking feature is shown in the following figure:
273
BLOCK
2ndHarmStab
X
Extract second
IOP 2NDHARMD
harmonic current a OR
a>b
component
b
Extract
fundamental
q-1
current component
t=70ms OR
t AN OR 2ndH_BLOCK_Int
D
BlkParTransf=On
|IOP|
a
a>b
b
UseStartValue
IN1>
IN2>
IN3>
IN4>
en07000068.vsd
Figure 149: Simplified logic diagram for 2nd harmonic blocking feature and Block for Parallel
Transformers feature
4.2.9 Switch on to fault feature

Integrated in the four step residual overcurrent protection are Switch on to fault logic (SOTF)
and Under-Time logic. The setting parameter SOTF is set to activate either SOTF or Un-
der-Time logic or both. When the circuit breaker is closing there is a risk to close it onto a per-
manent fault, for example during an autoreclosing sequence. The SOTF logic will enable fast
fault clearance during such situations. The time during which SOTF and Under-Time logics will
be active after activation is defined by the setting parameter t4U.
The SOTF logic uses the start signal from step 2 or step 3 for its operation, selected by setting
parameter StepForSOTF. The SOTF logic can be activated either from change in circuit breaker
position or from circuit breaker close command pulse. The setting parameter ActivationSOTF
can be set for activation of CB position open change, CB position closed change or CB close
command. In case of a residual current start from step 2 or 3 (dependent on setting) the function
will give a trip after a set delay tSOTF. This delay is normally set to a short time (default 100
ms).
The Under-Time logic always uses the start signal from the step 4. The Under-Time logic will
normally be set to operate for a lower current level than the SOTF function. The Under-Time
logic can also be blocked by the 2nd harmonic restraint feature. This enables high sensitivity
even if power transformer inrush currents can occur at breaker closing. This logic is typically
used to detect asymmetry of CB poles immediately after switching of the circuit breaker. The
Under-Time logic is activated either from change in circuit breaker position or from circuit
274
breaker close and open command pulses. This selection is done by setting parameter ActUnder-
Time. In case of a start from step 4 this logic will give a trip after a set delay tUnderTime. This
delay is normally set to a relatively short time (default 300 ms). Practically the Under-Time logic
acts as circuit breaker pole-discordance protection, but it is only active immediately after break-
er switching. The Under-Time logic can only be used in solidly or low impedance grounded sys-
tems.
275
276
activationSOTF
Setting
tpulse
SOTF
cbPosition posClsPls
Exec AND
PwrMode
tpulse
cbClosed
NOT SOTFActive
protection (PTOC, 51N/67N)
tpulse operationMode
Four step residual overcurrent
posOpnPls Setting PwrMode

AND
False start Exec
AND
closeCB closeCBPls
Exec
OR
TON
Exec step2Or3in AND AND IN Q AND
Exec block PT ET
NOT
switchOntoFaultDelayTime
Setting
PwrMode
activationUnderTime
Setting
operate
Exec
PwrMode
Under Time
onOrOffPos
OR tpulse
UTimeActive
opnOrClsCBPls
OR
Exec
OR
AND
step4in AND
Setting TON
harmonic2ndRestraint AND IN Q AND
Exec NOT PT ET
cbSwitchingFaultDelayTime
Exec
en06000643.vsd
277
Chapter 6
Current protection
Figure 150: Simplified logic diagram for SOTF and Under-Time features
EF Logic Diagram Simplified logic diagram for the complete EF function is shown in the fol-
lowing Figure 1:
signal to
communication
scheme
Directional Check
Element
4 step over current

INPol Direction
operatingCurrent element TRIP
Element
3U0 One element for each
earthFaultDirection step
3I0 angleValid
DirMode
enableDir
harmRestrBlock
3I0 Harmonic
Restraint ≥1
Element
start step 2, 3 and

4
Blocking at parallel
transformers
SwitchOnToFault
TRIP
CB
DirMode pos
or cmd
enableDir
Mode
Selection enableStep1-4
DirectionalMode1-4
en06000376.vsd
Figure 151: Functional overview of TEF
278
4.3 Function block
TEF1-
EF4PTOC_51N67N
I3P TRIP
U3P TRIN1
I3PPOL TRIN2
BLOCK TRIN3
BLKTR TRIN4
BLKST1 TRSOTF
BLKST2 START
BLKST3 STIN1
BLKST4 STIN2
ENMULT1 STIN3
ENMULT2 STIN4
ENMULT3 STSOTF
ENMULT4 STFW
CBPOS STRV
CLOSECB 2NDHARMD
OPENCB
en06000424.vsd
Figure 152: TEF1 function block

Table 142: Input signals for the EF4PTOC_51N67N (TEF1-) function block
Signal Description
I3P Current connection
U3P Polarizing voltage connection
I3PPOL Polarizing current connection
BLKTR Block of trip
BLKST1 Block of step 1 (Start and trip)
CBPOS Breaker position
CLOSECB Breaker close command
OPENCB Breaker open command
279
Table 143: Output signals for the EF4PTOC_51N67N (TEF1-) function block
Signal Description
TRIP Trip
TRIN1 Trip signal from step 1
TRSOTF Trip signal from earth fault switch onto fault function
STIN1 Start signal step 1
STSOTF Start signal from earth fault switch onto fault function
STFW Forward directional start signal
STRV Reverse directional start signal
2NDHARMD 2nd harmonic block signal

Table 144: Basic parameter group settings for the EF4PTOC_51N67N (TEF1-) function
On
settings
settings
AngleRCA -180 - 180 1 65 Deg Relay characteristic
angle (RCA)
polMethod Voltage - Voltage - Type of polarization
Current
Dual
UPolMin 1 - 100 1 1 %UB Minimum voltage level for
polarization in % of
UBase
IPolMin 2 - 100 1 5 %IB Minimum current level for
polarization in % of IBase
RNPol 0.50 - 1000.00 0.01 5.00 ohm Real part of source Z to
be used for current polar-
isation
280

XNPol 0.50 - 3000.00 0.01 40.00 ohm Imaginary part of source
Z to be used for current
polarisation
IN>Dir 1 - 100 1 10 %IB Residual current level for
Direction release in % of
IBase
2ndHarmStab 5 - 100 1 20 % Second harmonic
restrain operation in % of
IN amplitude
BlkParTransf Off - Off - Enable blocking at paral-
On lel transformers
UseStartValue IN1> - IN4> - Current level blk at paral-
IN2> lel transf (step1, 2, 3 or 4)
IN3>
IN4>
SOTF Off - Off - SOTF operation mode
SOTF (Off/SOTF/Under-
UnderTime time/SOTF+undertime)
SOTF+UnderTime
ActivationSOTF Open - Open - Select signal that shall
Closed activate SOTF
CloseCommand
StepForSOTF Step 2 - Step 2 - Selection of step used for
Step 3 SOTF
HarmResSOTF Off - Off - Enable harmonic restrain
On function in SOTF
tSOTF 0.000 - 60.000 0.001 0.200 s Time delay for SOTF
t4U 0.000 - 60.000 0.001 1.000 s Switch-onto-fault active
time
Forward reverse)
Reverse
281

Characterist1 ANSI Ext. inv. - ANSI Def. Time - Time delay curve type for
ANSI Very inv. step 1
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
IN1> 1 - 2500 1 100 %IB Operate residual current
level for step 1 in % of
IBase
t1 0.000 - 60.000 0.001 0.000 s Independent (defenite)
time delay of step 1
dependent time delay for
step 1
IN1Mult 1.0 - 10.0 0.1 2.0 - Multiplier for scaling the
current setting value for
step 1
HarmRestrain1 Off - On - Enable block of step 1
Forward reverse)
Reverse
282

ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
IBase
t2 0.000 - 60.000 0.001 0.400 s Independent (definitive)
step 2
step 2
inverse curves step 2
Forward reverse)
Reverse
283

ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
IBase
t3 0.000 - 60.000 0.001 0.800 s Independent time delay
of step 3
step 3
step 3
Forward reverse)
Reverse
284

ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
IBase
t4 0.000 - 60.000 0.001 1.200 s Independent (definitive)
step 4
step 4
t4Min 0.000 - 60.000 0.001 0.000 s Minimum operate time in
inverse curves step 4
285
Table 145: Advanced parameter group settings for the EF4PTOC_51N67N (TEF1-) func-
tion
ActUnderTime CB position - CB position - Select signal to activate
CB command under time (CB
Pos/CBCommand)
tUnderTime 0.000 - 60.000 0.001 0.300 s Time delay for under time
ResetTypeCrv1 Instantaneous - Instantaneous - Reset curve type for step
IEC Reset 1
ANSI reset
tReset1 0.000 - 60.000 0.001 0.020 s Reset curve type for step
1
tomer programmable
curve for step 1
tomer programmable
curve for step 1
tomer programmable
curve for step 1
tomer programmable
curve for step 1
tomer programmable
curve for step 1
tomer programmable
curve for step 1
tomer programmable
curve for step 1
IEC Reset 2
ANSI reset
2
tomer programmable
curve for step 2
tomer programmable
curve for step 2
tomer programmable
curve for step 2
286

tomer programmable
curve for step 2
tomer programmable
curve for step 2
tomer programmable
curve for step 2
tomer programmable
curve for step 2
IEC Reset 3
ANSI reset
3
tomer programmable
curve for step 3
tomer programmable
curve for step 3
tomer programmable
curve for step 3
tomer programmable
curve step 3
tomer programmable
curve step 3
tomer programmable
curve step 3
tomer programmable
curve for step 3
IEC Reset 4
ANSI reset
4
tomer programmable
curve for step 4
287

tomer programmable
curve step 4
tomer programmable
curve for step 4
tomer programmable
curve step 4
tomer programmable
curve step 4
tomer programmable
curve step 4
tomer programmable
curve step 4
4.6 Technical data

Table 146: Four step residual overcurrent protection (PEFM, 51N/67N)
± 1.0% of I at I > Ir
Reset ratio > 95% -
Operate current for directional (1–100)% of lbase ± 1.0% of Ir
comparison
Timers (0.000-60.000) s ± 0.5% ± 10 ms
Inverse characteristics, see table 19 curve types See table 577 and table 578
577 and table 578
Second harmonic restrain opera- (5–100)% of fundamental ± 2.0% of Ir
tion
Relay characteristic angle (-180 to 180) degrees ± 2.0 degrees
Minimum polarizing voltage (1–100)% of Ubase ± 0.5% of Ur
Minimum polarizing current (1–30)% of Ibase ± 0.25% of Ir
RNS, XNS (0.50–3000.00) Ω/phase -
288
Sensitive directional residual overcurrent and Chapter 6
power protection (PSDE, 67N) Current protection
5 Sensitive directional residual overcurrent and

power protection (PSDE, 67N)
Function block name: SDEx- IEC 60617 graphical symbol:

ANSI number: 67N
SDEPSDE
5.1 Introduction
In networks with high impedance earthing, the phase to earth fault current is significantly small-
er than the short circuit currents. Another difficulty for earth fault protection is that the magni-
tude of the phase to earth fault current is almost independent of the fault location in the network.
Directional residual current can be used to detect and give selective trip of phase to earth faults
in high impedance earthed networks. The protection uses the residual current component
3I0 cos φ, where φ is the angle between the residual current and the residual voltage, compensat-
ed with a characteristic angle. Alternatively the function can be set to strict 3I0 level with an
check of angle 3I0 and cos ϕ.
Directional residual power can be used to detect and give selective trip of phase to earth faults
in high impedance earthed networks. The protection uses the residual power component
3I0 3U0 cos φ, where φ is the angle between the residual current and the reference residual volt-
age, compensated with a characteristic angle.
A normal undirectional residual current function can also be used and be with definite or inverse
time delay.
A back-up neutral point voltage function is also available for undirectional sensitive back-up
protection.
In an isolated network, i.e. the network is only coupled to earth via the capacitances between the
phase conductors and earth, the residual current always has -90º phase shift compared to the ref-
erence residual voltage. The characteristic angle is chosen to -90º in such a network.
In resistance earthed networks or in Petersen coil, with a parallel resistor, the active residual cur-
rent component (in phase with the residual voltage) should be used for the earth fault detection.
In such networks the characteristic angle is chosen to 0º.
As the amplitude of the residual current is independent of the fault location the selectivity of the
earth fault protection is achieved by time selectivity.
When should the sensitive directional residual overcurrent protection be used and when should
the sensitive directional residual power protection be used? We have the following facts to con-
sider:
• Sensitive directional residual overcurrent protection gives possibility for better

sensitivity
289
• Sensitive directional residual power protection gives possibility to use inverse

time characteristics. This is applicable in large high impedance earthed networks,
with large capacitive earth fault current
• In some power systems a medium size neutral point resistor is used. Such a resis-
tor will give a resistive earth fault current component of about 200 - 400 A at a
zero resistive phase to earth fault. In such a system the directional residual power
protection gives better possibilities for selectivity enabled by inverse time power
characteristics.

5.2.1 Introduction
The function is using phasors of the residual current and voltage. Group signals I3P and U3P
containing phasors of residual current and voltage is taken from pre-processor blocks.
The sensitive directional earth fault protection has the following sub-functions included:
Directional residual current protection measuring 3I0 cos φ

φ is defined as the angle between the residual current 3I0 and the reference voltage compensated
with the set characteristic angle RCADir (φ=ang(3I0)-ang(Uref) ). Uref = -3U0 ejRCADir. RCAdir
is normally set equal to 0 in a high impedance earthed network with a neutral point resistor as
the active current component is appearing out on the faulted feeder only. RCAdir is set equal to
-90° in an isolated network as all currents are mainly capacitive. The function operates when
3I0 cos φ gets larger than the set value.
Uref RCA = 0°, ROA = 90°
3I0
= ang(3I0) - ang(3Uref)
-3U0=Uref
3I0 cos
en06000648.vsd
Figure 153: RCADir set to 0°
290
Uref
RCA = -90°, ROA = 90°
3I0
3I0 cos
= ang(3I0) – ang(Uref)
-3U0
en06000649.vsd
Figure 154: RCADir set to -90°
For trip, both the residual current 3I0 cos φand the release voltage 3U0, shall be larger than the
set levels: INCosPhi> and UNRel>.
Trip from this function can be blocked from the binary input BLKTRDIR.
When the function is activated binary output signals START and STDIRIN are activated. If the
activation is active after the set delay tDef the binary output signals TRIP and TRDIRIN are ac-
tivated. The trip from this sub-function has definite time delay.
There is a possibility to increase the operate level for currents where the angle φ is larger than a
set value as shown in the figure below. This is equivalent to blocking of the function if
φ > ROADir. This option is used to handle angle error for the instrument transformers.
291
3I0 Operate area
-3U0=Uref RCA = 0°
3I0 cos
ROA
en06000650.vsd
Figure 155: Characteristic with ROADir restriction
The function will indicate forward/reverse direction to the fault. Reverse direction is defined as
3I0 cos (φ + 180°) ≥ the set value.
It shall also be possible to tilt the characteristic to compensate for current transformer angle error
with a setting RCAComp as shown in the figure below:
292
Operate area
-3U0=Uref RCA = 0°
Instrument
transformer α
RCAcomp
angle error
Characteristic after
angle compensation
3I0 (to prot)

3I0 (prim)
en06000651.vsd
Figure 156: Explanation of RCAcomp.
Directional residual power protection measuring 3I0 3U0 cos φ

φ is defined as the angle between the residual current 3I0 and the reference voltage compensated
with the set characteristic angle RCADir (φ=ang(3I0)—ang(Uref) ). Uref = -3U0 ejRCA. The func-
tion operates when 3I0 3U0 cos φ gets larger than the set value.
For trip, both the residual power 3I0 3U0 cos φ, the residual current 3I0 and the release voltage
3U0, shall be larger than the set levels (SN>, INRel> and UNRel>).
activation is active after the set delay tDef or after the inverse time delay (setting kSN) the binary
output signals TRIP and TRDIRIN are activated.
The function shall indicate forward/reverse direction to the fault. Reverse direction is defined as
3I0 3U0 cos (φ + 180°) 3 the set value.
This variant has the possibility of choice between definite time delay and inverse time delay.
The inverse time delay is defined as:
293
kSN ⋅ (3I 0 ⋅ 3U 0 ⋅ cos φ (reference)

t inv =
3I 0 ⋅ 3U 0 cos φ (measured)
(Equation 62)
Directional residual current protection measuring 3I0 and φ

The function will operate if the residual current is larger that the set value and the angle
φ = ang(3I0)-ang(Uref) is within the sector RCADir ± ROADir
RCA = 0°
ROA = 80°
Operate area
3I0
80 -3U0
en06000652.vsd
Figure 157: Example of characteristic
For trip, both the residual current 3I0 and the release voltage 3U0, shall be larger than the set
levels (INDir> and UNREL>) and the angle φ shall be in the set sector (ROADir and RCADir).
activation is active after the set delay tDef the binary output signals TRIP and TRDIRIN are ac-
tivated.
The function indicate forward/reverse direction to the fault. Reverse direction is defined as φ is
within the angle sector: RCADir + 180° ± ROADir
This variant shall have definite time delay.
294
Directional functions
For all the directional functions there are directional start signals STFW: fault in the forward di-
rection, and STRV: start in the reverse direction. Even if the directional function is set to operate
for faults in the forward direction a fault in the reverse direction will give the start signal STRV.
Also if the directional function is set to operate for faults in the reverse direction a fault in the
forward direction will give the start signal STFW.
Non-directional earth fault current protection

This function will measure the residual current without checking the phase angle. The function
will be used to detect cross-country faults. This function can serve as alternative or back-up to
distance protection with phase preference logic. To assure selectivity the distance protection can
block the non-directional earth fault current function via the input BLKNDN.
If available the non-directional function is using the calculated residual current, derived as sum
of the phase currents. This will give a better ability to detect cross-country faults with high re-
sidual current, also when dedicated core balance CT for the sensitive earth fault protection will
saturate.
This variant shall have the possibility of choice between definite time delay and inverse time de-
lay. The inverse time delay shall be according to IEC 60255-3.
For trip, the residual current 3I0 shall be larger than the set levels (INNonDir>).
Trip from this function can be blocked from the binary input BLKNDN.
When the function is activated binary output signal STNDIN is activated. If the activation is ac-
tive after the set delay tINNonDir or after the inverse time delay the binary output signals TRIP
and TRNDIN are activated.
Residual overvoltage release and protection

The directional function shall be released when the residual voltage gets higher than a set level.
There shall also be a separate trip, with its own definite time delay, from this set voltage level.
For trip, the residual voltage 3U0 shall be larger than the set levels (UN>).
Trip from this function can be blocked from the binary input BLKUN.
When the function is activated binary output signal STUN is activated. If the activation is active
after the set delay tUNNonDir TRIP and TRUN are activated. A simplified logical diagram of
the total function is shown in figure 159.
295
INNonDir> STNDIN
t TRNDIN
UN> STUN
t TRUN
OpMODE=INcosPhi
IN>
&
INcosPhi>
OpMODE=INUNcosPhi
& ≥1 & STARTDIRIN
INUNcosPhi> t
SN
& TRDIRIN
Phi in RCA +- ROA
TimeChar = InvTime
&
OpMODE=IN and Phi
&
TimeChar = DefTime
DirMode = Forw
& ≥1
Forw STFW
DirMode = Rev
&
Rev STRV
en06000653.vsd
Figure 158: Simplified logical diagram of the sensitive earth fault current protection
296
5.3 Function block
SDE1-
SDEPSDE_67N
I3P TRIP
U3P TRDIRIN
BLOCK TRNDIN
BLKTR TRUN
BLKTRDIR START
BLKNDN STDIRIN
BLKUN STNDIN
STUN
STFW
STRV
STDIR
UNREL
en07000032.vsd
Figure 159: SDE function block

Table 147: Input signals for the SDEPSDE_67N (SDE1-) function block
Signal Description
I3P Group signal for current
U3P Group signal for voltage
BLOCK Blocks all the outputs of the function
BLKTR Blocks the operate outputs of the function
BLKTRDIR Blocks the directional operate outputs of the function
BLKNDN Blocks the Non directional current residual outputs
BLKUN Blocks the Non directional voltage residual outputs
Table 148: Basic general settings for the SDEPSDE_67N (SDE1-) function
IBase 1 - 99999 1 100 A Base Current, in A
UBase 0.05 - 2000.00 0.05 63.50 kV Base Voltage, in kV
Phase to Neutral
SBase 0.05 - 0.05 6350.00 kVA Base Power, in kVA.
200000000.00 IBase*UBase
297
Table 149: Basic parameter group settings for the SDEPSDE_67N (SDE1-) function
On
OpMode 3I0Cosfi - 3I0Cosfi - Selection of operation
3I03U0Cosfi mode for protection
3I0 and fi
DirMode Forward - Forward - Direction of operation for-
Reverse ward or reverse
RCADir -179 - 180 1 -90 Deg Relay characteristic
angle RCA, in deg
RCAComp -10.0 - 10.0 0.1 0.0 Deg Relay characteristic
angle compensation
ROADir 0 - 90 1 90 Deg Relay open angle ROA
used as release in phase
mode, in deg
INCosPhi> 0.25 - 200.00 0.01 1.00 %IB Set level for 3I0cosFi,
directional res over cur-
rent, in %Ib
SN> 0.25 - 200.00 0.01 10.00 %SB Set level for
3I03U0cosFi, starting inv
time count, in %Sb
INDir> 0.25 - 200.00 0.01 5.00 %IB Set level for directional
residual over current
prot, in %Ib
tDef 0.000 - 60.000 0.001 0.100 s Definite time delay direc-
tional residual overcur-
rent, in sec
SRef 0.03 - 200.00 0.01 10.00 %SB Reference value of res
power for inverse time
count, in %Sb
kSN 0.00 - 2.00 0.01 0.10 - Time multiplier setting for
directional residual power
mode
OpINNonDir> Off - Off - Operation of non-direc-
On tional residual overcur-
rent protection
INNonDir> 1.00 - 400.00 0.01 10.00 %IB Set level for non direc-
tional residual over cur-
rent, in %Ib
tINNonDir 0.000 - 60.000 0.001 1.000 s Time delay for non-direc-
rent, in sec
298

TimeChar ANSI Ext. inv. - IEC Norm. inv. - Operation curve selection
ANSI Very inv. for IDMT operation
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
tMin 0.000 - 60.000 0.001 0.040 s Minimum operate time for
IEC IDMT curves, in sec
kIN 0.00 - 2.00 0.01 1.00 - IDMT time mult for
non-dir res over current
protection
OpUN> Off - Off - Operation of non-direc-
On tional residual overvolt-
age protection
UN> 1.00 - 200.00 0.01 20.00 %UB Set level for non-direc-
tional residual over volt-
age, in %Ub
tUNNonDir 0.000 - 60.000 0.001 0.100 s Time delay for non-direc-
age, in sec
INRel> 0.25 - 200.00 0.01 1.00 %IB Residual release current
for all directional modes,
in %Ib
UNRel> 0.01 - 200.00 0.01 3.00 %UB Residual release voltage
for all direction modes, in
%Ub
Table 150: Advanced general settings for the SDEPSDE_67N (SDE1-) function
RotResU 0 deg - 180 deg - Setting for rotating polar-
180 deg izing quantity if neces-
sary
299
Table 151: Advanced parameter group settings for the SDEPSDE_67N (SDE1-) function
tReset 0.000 - 60.000 0.001 0.040 s Time delay used for reset
of definite timers, in sec
tPCrv 0.005 - 3.000 0.001 1.000 - Setting P for customer
programmable curve
tACrv 0.005 - 200.000 0.001 13.500 - Setting A for customer
programmable curve
tBCrv 0.00 - 20.00 0.01 0.00 - Setting B for customer
programmable curve
tCCrv 0.1 - 10.0 0.1 1.0 - Setting C for customer
programmable curve
ResetTypeCrv Immediate - IEC Reset - Reset mode when cur-
IEC Reset rent drops off.
ANSI reset
tPRCrv 0.005 - 3.000 0.001 0.500 - Setting PR for customer
programmable curve
tTRCrv 0.005 - 100.000 0.001 13.500 - Setting TR for customer
programmable curve
tCRCrv 0.1 - 10.0 0.1 1.0 - Setting CR for customer
programmable curve

Table 152: Basic general settings for the SDEPSDE_67N (SDE1-) function
IBase 1 - 99999 1 100 A Base Current, in A
UBase 0.05 - 2000.00 0.05 63.50 kV Base Voltage, in kV
Phase to Neutral
SBase 0.05 - 0.05 6350.00 kVA Base Power, in kVA.
200000000.00 IBase*Ubase
300
Table 153: Basic parameter group settings for the SDEPSDE_67N (SDE1-) function
On
OpMode 3I0Cosfi - 3I0Cosfi - Selection of operation
3I03U0Cosfi mode for protection
3I0 and fi
DirMode Forward - Forward - Direction of operation for-
Reverse ward or reverse
RCADir -179 - 180 1 -90 Deg Relay characteristic
angle RCA, in deg
RCAComp -10.0 - 10.0 0.1 0.0 Deg Relay characteristic
angle compensation
ROADir 0 - 90 1 90 Deg Relay open angle ROA
used as release in phase
mode, in deg
INCosPhi> 0.25 - 200.00 0.01 1.00 %IB Set level for 3I0cosFi,
directional res over cur-
rent, in %Ib
SN> 0.25 - 200.00 0.01 10.00 %SB Set level for
3I03U0cosFi, starting inv
time count, in %Sb
INDir> 0.25 - 200.00 0.01 5.00 %IB Set level for directional
prot, in %Ib
tDef 0.000 - 60.000 0.001 0.100 s Definite time delay direc-
tional residual overcur-
rent, in sec
SRef 0.03 - 200.00 0.01 10.00 %SB Reference value of res
power for inverse time
count, in %Sb
kSN 0.00 - 2.00 0.01 0.10 - Time multiplier setting for
mode
OpINNonDir> Off - Off - Operation of non-direc-
On tional residual overcur-
rent protection
INNonDir> 1.00 - 400.00 0.01 10.00 %IB Set level for non direc-
rent, in %Ib
tINNonDir 0.000 - 60.000 0.001 1.000 s Time delay for non-direc-
rent, in sec
301

TimeChar ANSI Ext. inv. - IEC Norm. inv. - Operation curve selection
ANSI Very inv. for IDMT operation
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
tMin 0.000 - 60.000 0.001 0.040 s Minimum operate time for
IEC IDMT curves, in sec
kIN 0.00 - 2.00 0.01 1.00 - IDMT time mult for
non-dir res over current
protection
OpUN> Off - Off - Operation of non-direc-
On tional residual overvolt-
age protection
UN> 1.00 - 200.00 0.01 20.00 %UB Set level for non-direc-
age, in %Ub
tUNNonDir 0.000 - 60.000 0.001 0.100 s Time delay for non-direc-
age, in sec
INRel> 0.25 - 200.00 0.01 1.00 %IB Residual release current
for all directional modes,
in %Ib
UNRel> 0.01 - 200.00 0.01 3.00 %UB Residual release voltage
for all direction modes, in
%Ub
Table 154: Advanced general settings for the SDEPSDE_67N (SDE1-) function
RotResU 0 deg - 180 deg - Setting for rotating polar-
180 deg izing quantity if neces-
sary
302
Table 155: Advanced parameter group settings for the SDEPSDE_67N (SDE1-) function
tReset 0.000 - 60.000 0.001 0.040 s Time delay used for reset
of definite timers, in sec
tPCrv 0.005 - 3.000 0.001 1.000 - Setting P for customer
programmable curve
tACrv 0.005 - 200.000 0.001 13.500 - Setting A for customer
programmable curve
tBCrv 0.00 - 20.00 0.01 0.00 - Setting B for customer
programmable curve
tCCrv 0.1 - 10.0 0.1 1.0 - Setting C for customer
programmable curve
ResetTypeCrv Immediate - IEC Reset - Reset mode when cur-
IEC Reset rent drops off.
ANSI reset
tPRCrv 0.005 - 3.000 0.001 0.500 - Setting PR for customer
programmable curve
tTRCrv 0.005 - 100.000 0.001 13.500 - Setting TR for customer
programmable curve
tCRCrv 0.1 - 10.0 0.1 1.0 - Setting CR for customer
programmable curve
303
5.6 Technical data

Table 156: Sensitive directional residual overcurrent and power protection (PSDE, 67N)
Operate level for 3I0 cosϕ (0.25-200.00)% of lbase ± 1.0% of Ir at I ≤ Ir
directional residual overcurrent
± 1.0% of I at I > Ir
At low setting:
(2.5-10) mA ± 1.0 mA
(10-50) mA ± 0.5 mA
Operate level for 3I03U0 cosϕ (0.25-200.00)% of Sbase ± 1.0% of Sr at S ≤ Sr
± 1.0% of S at S > Sr
At low setting:
(0.25-5.00)% of Sbase ± 10% of set value
Operate level for 3I0 and ϕ (0.25-200.00)% of Ibase ± 1.0% of Ir at ≤ Ir
residual overcurrent
± 1.0% of I at I > Ir
At low setting:
(2.5-10) mA ± 1.0 mA
(10-50) mA ± 0.5 mA
Operate level for non directional (1.00-400.00)% of Ibase ± 1.0% of Ir at I ≤ Ir
overcurrent
± 1.0% of I at I > Ir
At low setting:
(10-50) mA ± 1.0 mA
Operate level for non directional (1.00-200.00)% of Ubase ± 0.5% of Ur at U ≤ Ur
residual overvoltage
± 0.5% of U at U > Ur
Residual release current for all (0.25-200.00)% of Ibase ± 1.0% of Ir at I ≤ Ir
directional modes
± 1.0% of I at I > Ir
At low setting:
(2.5-10) mA ± 1.0 mA
(10-50) mA ± 0.5 mA
Residual release voltage for all (0.01-200.00)% of Ubase ± 0.5% of Ur at U ≤ Ur
directional modes
± 0.5% of U at > Ur
Reset ratio > 95% -
Timers (0.000-60.000) s ± 0.5% ± 10 ms
Inverse characteristics, see table 19 curve types See table 577 and table 578
577 and table 578
Relay characteristic angle RCA (-179 to 180) degrees ± 2.0 degrees
304

Relay open angle ROA (0-90) degrees ± 2.0 degrees
Operate time, non directional 60 ms typically at 0 to 2 x Iset -
Reset time, non directinal residual 60 ms typically at 2 to 0 x Iset -
over current
305
Thermal overload protection, one time Chapter 6
constant (PTTR, 26) Current protection
6 Thermal overload protection, one time constant

(PTTR, 26)
Function block name: THLx- IEC 60617 graphical symbol:

ANSI number: 49
LPTTR
6.1 Introduction
The increasing utilizing of the power system closer to the thermal limits have generated a need
of a thermal overload function also for power lines.
A thermal overload will often not be detected by other protection functions and the introduction
of the thermal overload function can allow the protected circuit to operate closer to the thermal
limits.
The three phase current measuring function has an I2t characteristic with settable time constant
and a thermal memory.
An alarm level gives early warning to allow operators to take action well before the line will be
tripped.

The sampled analogue phase currents are pre-processed and for each phase current the RMS val-
ue of each phase current is derived. These phase current values are fed to the THL function.
From the largest of the three phase currents a final temperature is calculated according to the
expression:
2
⎛ I ⎞
Θ final =⎜ ⎟⎟ ⋅ Tref
⎜ I ref
⎝ ⎠
(Equation 63)
where:
I is the largest phase current,
Iref is a given reference current and
Tref is steady state temperature corresponding to Iref
306
The ambient temperature is added to the calculated final temperature. If this temperature is larg-
er than the set operate temperature level a start output signal START is activated.
The actual temperature at the actual execution cycle is calculated as:
⎛ Δt
⎞
Θn = Θn −1 + ( Θ final − Θ n−1 ) ⋅ ⎜ 1 − e τ ⎟
−
⎝ ⎠
(Equation 64)
where:
Θn is the calculated present temperature,
Θn-1 is the calculated temperature at the previous time step,
Θfinal is the calculated final temperature with the actual current,
Δt is the time step between calculation of the actual temperature and
τ is the set thermal time constant for the protected device (line or cable)
The actual temperature of the protected component (line or cable) is calculated by adding the
ambient temperature to the calculated temperature, as shown above. The ambient temperature
can be given a constant value. The calculated component temperature can be monitored as it is
exported from the function as a real figure.
When the component temperature reaches the set alarm level AlarmTemp the output signal
ALARM is set. When the component temperature reaches the set trip level TripTemp the output
signal TRIP is set.
There is also a calculation of the present time to operation with the present current. This calcu-
lation is only performed if the final temperature is calculated to be above the operation temper-
ature:
⎛Θ − Θ operate ⎞
toperate = −τ ⋅ ln ⎜ final
⎜ Θ final − Θ n ⎟⎟
⎝ ⎠
(Equation 65)
The calculated time to trip can be monitored as it is exported from the function as a real figure
TTRIP.
After a trip, caused by the thermal overload protection function, there can be a lockout to recon-
nect the tripped circuit. The output lockout signal LOCKOUT is activated when the device tem-
perature is above the set lockout release temperature setting ReclTemp.
The time to lockout release is calculated, i.e. a calculation of the cooling time to a set value. The
thermal content of the function can be reset with input RESET.
307
⎛Θ − Θlockout _ release ⎞
tlockout _ release = −τ ⋅ ln ⎜ final ⎟⎟
⎜ Θ − Θ
⎝ final n ⎠
(Equation 66)
Here the final temperature is equal to the set or measured ambient temperature. The calculated
component temperature can be monitored as it is exported from the function as a real figure.
In some applications the measured current can involve a number of parallel lines. This is often
used for cable lines where one bay connects several parallel cables. By setting the parameter IM-
ult to the number of parallel lines (cables) the actual current on one line is used in the protection
algorithm. To activate this option the input ENMULT must be activated.
The function has a reset input: RESET. By activating this input the calculated temperature is re-
set to its default initial value. This is useful during testing when secondary injected current has
given a calculated “false” temperature level.
308
Final Temp start signal

> TripTemp
actual temperature
Calculation
of actual
temperature
IL1, IL2, IL3 Calculation

of final
temperature
Actual Temp >

alarm signal
AlarmTemp
trip signal
Actual Temp
> TripTemp initiate lockout
Actual Temp Reset of lockout after trip

< Recl Temp
Calculation time to trip

of time to
trip
Calculation
of time to time to reset of lockout
reset of
lockout
en05000736.vsd
Figure 160: Functional overview of THL
309
6.3 Function block
THL1-
LPTTR_26
I3P TRIP
BLOCK START
BLKTR ALARM
ENMULT LOCKOUT
AMBTEMP
SENSFLT
RESET
en04000396.vsd
Figure 161: THL function block

Table 157: Input signals for the LPTTR_26 (THL1-) function block
Signal Description
I3P Group connection
BLKTR Block of trip
ENMULT Current multiplyer used when THOL is for two or more lines
AMBTEMP Ambient temperature from external temperature sensor
SENSFLT Validity status of ambient temperature sensor
RESET Reset of internal thermal load counter
Table 158: Output signals for the LPTTR_26 (THL1-) function block
Signal Description
TRIP Trip
START Start Signal
ALARM Alarm signal
LOCKOUT Lockout signal
310

Table 159: Basic parameter group settings for the LPTTR_26 (THL1-) function
On
IBase 0 - 99999 1 3000 A Base current in A
TRef 0 - 600 1 90 Deg End temperature rise
above ambient of the line
when loaded with IRef
IRef 0 - 400 1 100 %IB The load current (in %of
IBase) leading to TRef
temperature
IMult 1-5 1 1 - Current multiplier when
function is used for two or
more lines
Tau 0 - 1000 1 45 Min Time constant of the line
in minutes.
AlarmTemp 0 - 200 1 80 Deg Temperature level for
start (alarm)
TripTemp 0 - 600 1 90 Deg Temperature level for trip
ReclTemp 0 - 600 1 75 Deg Temperature for reset of
lockout after trip
tPulse 0.05 - 0.30 0.01 0.1 s Operate pulse length.
Minimum one execution
cycle
AmbiSens Off - Off - External temperature
On sensor availiable
DefaultAmbTemp -50 - 250 1 20 Deg Ambient temperature
used when AmbiSens is
set to Off.
DefaultTemp -50 - 600 1 50 Deg Temperature raise above
ambient temperature at
startup
311
6.6 Technical data

Table 160: Thermal overload protection, one time constant (PTTR, 26)
Reference current (0-400)% of Ibase ± 1.0% of Ir
Start temperature reference (0-400)°C ± 1.0°C
Operate time: Ip = load current before IEC 60255-8, class 5 + 200 ms
overload occurs
Time constant τ = (0–1000) min-
⎛ I − Ip
2 2 ⎞ utes
t = τ ⋅ ln ⎜ 2 ⎟
⎜ I − Ib 2 ⎟
⎝ ⎠
I = Imeasured
Alarm temperature (0-200)°C ± 2.0% of heat content trip
Trip temperature (0-400)°C ± 2.0% of heat content trip
Reset level temperature (0-400)°C ± 2.0% of heat content trip
312
Breaker failure protection (RBRF, 50BF) Chapter 6
Current protection
7 Breaker failure protection (RBRF, 50BF)
Function block name: BFPx- IEC 60617 graphical symbol:

ANSI number: 50BF
CCRBRF
3I>BF
7.1 Introduction
The circuit breaker failure function ensures fast back-up tripping of surrounding breakers. The
breaker failure protection operation can be current based, contact based or adaptive combination
between these two principles.
A current check with extremely short reset time is used as a check criteria to achieve a high se-
curity against unnecessary operation.
The breaker failure protection can be single- or three-phase initiated to allow use with single
phase tripping applications. For the three-phase version of the breaker failure protection the cur-
rent criteria can be set to operate only if two out of four e.g. two phases or one phase plus the
residual current starts. This gives a higher security to the back-up trip command.
The function can be programmed to give a single- or three phase re-trip of the own breaker to
avoid unnecessary tripping of surrounding breakers at an incorrect initiation due to mistakes dur-
ing testing.

The breaker failure protection function is initiated from protection trip command, either from
protection functions within the protection terminal or from external protection devices.
The start signal can be phase selective or general (for all three phases). Phase selective start sig-
nals enable single pole re-trip function. This means that a second attempt to open the breaker is
done. The re-trip attempt can be made after a set time delay. For transmission lines single pole
trip and autoreclosing is often used. The re-trip function can be phase selective if it is initiated
from phase selective line protection. The re-trip function can be done with or without current
check. With the current check the re-trip is only performed if the current through the circuit
breaker is larger than the operate current level.
The start signal can be an internal or external protection trip signal. If this start signal gets high
at the same time as current is detected through the circuit breaker, the back-up trip timer is start-
ed. If the opening of the breaker is successful this is detected by the function, both by detection
of low RMS current and by a special adapted algorithm. The special algorithm enables a very
fast detection of successful breaker opening, i.e. fast resetting of the current measurement. If the
current detection has not detected breaker opening before the back-up timer has run its time a
back-up trip is initiated. There is also a possibility to have a second back-up trip output activated
after an added settable time after the first back-up trip.
313
Current protection
Further the following possibilities are available:
• The minimum length of the re-trip pulse, the back-up trip pulse and the back-up
trip pulse 2 are settable. The re-trip pulse, the back-up trip pulse and the back-up
trip pulse 2 will however sustain as long as there is an indication of closed break-
er.
• In the current detection it is possible to use three different options: 1 out of 3
where it is sufficient to detect failure to open (high current) in one pole, 1 out of
4 where it is sufficient to detect failure to open (high current) in one pole or high
residual current and 2 out of 4 where at least two current (phase current and/or
residual current) shall be high for breaker failure detection.
• The current detection for the residual current can be set different from the setting
of phase current detection.
• It is possible to have different re-trip time delays for single phase faults and for
multi-phase faults.
• The back-up trip can be made without current check. It is possible to have this
option activated for small load currents only.
• It is possible to have instantaneous back-up trip function if a signal is high if the
circuit breaker is insufficient to clear faults, for example at low gas pressure.
Current
AND
BLOCK
Current & t1 tp
STIL1
Contact t TRRETL1
AND AND
START
OR
STL1
OR
TRRET
OR
AND AND
CBCLDL1
Contact
L2 L3
en05000832.vsd
Figure 162: Simplified logic scheme of the retrip function
314
Current protection
Figure 163: Simplified logic scheme of the back-up trip function
315
Current protection
Internal logical signals STIL1, STIL2, STIL3 have logical value 1 when current in respective
phase has magnitude larger than setting parameter IP>.
Internal logical signal STN has logical value 1 when neutral current has magnitude larger than
setting parameter IN>.
More than 1 current high t2MPh

AND t
1 of 3
tp
TRBU
OR
t2
1 of 4 t
OR
t3 tp
t TRBU2
2 of 3
AND
CBALARM
CBFLT CBALARM
t
en06000223.vsd
Figure 164: Simplified logic scheme of the back-up trip function
7.3 Function block
BFP1-
CCRBRF_50BF
I3P TRBU
BLOCK TRBU2
START TRRET
STL1 TRRETL1
STL2 TRRETL2
STL3 TRRETL3
CBCLDL1 CBALARM
CBCLDL2
CBCLDL3
CBFLT
en06000188.vsd
Figure 165: BFP function block
316
Current protection

Table 161: Input signals for the CCRBRF_50BF (BFP1-) function block
Signal Description
START Three phase start of breaker failure protection function
STL1 Start signal of phase L1
CBCLDL1 Circuit breaker closed in phase L1
CBFLT CB faulty, unable to trip. Back-up trip instantanously.
Table 162: Output signals for the CCRBRF_50BF (BFP1-) function block
Signal Description
TRBU Back-up trip by breaker failure protection function
TRBU2 Second back-up trip by breaker failure protection function
TRRET Retrip by breaker failure protection function
TRRETL1 Retrip by breaker failure protection function phase L1
CBALARM Alarm for faulty circuit breaker

Table 163: Basic parameter group settings for the CCRBRF_50BF (BFP1-) function
On
FunctionMode Current - Current - Detection principle for
Contact back-up trip
Current&Contact
BuTripMode 2 out of 4 - 1 out of 3 - Back-up trip mode
1 out of 3
1 out of 4
RetripMode Retrip Off - Retrip Off - Operation mode of re-trip
CB Pos Check logic
No CBPos Check
317
Current protection

IP> 5 - 200 1 10 %IB Operate phase current
level in % of IBase
IN> 2 - 200 1 10 %IB Operate residual current
level in % of IBase
t1 0.000 - 60.000 0.001 0.000 s Time delay of re-trip
t2 0.000 - 60.000 0.001 0.150 s Time delay of back-up
trip
t2MPh 0.000 - 60.000 0.001 0.150 s Time delay of back-up
trip at multi-phase start
tPulse 0.000 - 60.000 0.001 0.200 s Trip pulse duration
Table 164: Advanced parameter group settings for the CCRBRF_50BF (BFP1-) function
I>BlkCont 5 - 200 1 20 %IB Current for blocking of
CB contact operation in
% of IBase
t3 0.000 - 60.000 0.001 0.030 s Additional time delay to
t2 for a second back-up
trip
tCBAlarm 0.000 - 60.000 0.001 5.000 s Time delay for CB faulty
signal
7.6 Technical data

Table 165: Breaker failure protection (RBRF, 50BF)
Operate phase current (5-200)% of lbase ± 1.0% of Ir at I ≤ Ir
± 1.0% of I at I > Ir
Reset ratio, phase current > 95% -
Operate residual current (2-200)% of lbase ± 1.0% of Ir at I ≤ Ir
± 1.0% of I at I > Ir
Reset ratio, residual current > 95% -
Phase current level for blocking of (5-200)% of lbase ± 1.0% of Ir at I ≤ Ir
contact function
± 1.0% of I at I > Ir
Reset ratio > 95% -
Timers (0.000-60.000) s ± 0.5% ± 10 ms
Operate time for current detection 10 ms typically -
Reset time for current detection 15 ms maximum -
318
Stub protection (PTOC, 50STB) Chapter 6
Current protection
8 Stub protection (PTOC, 50STB)
Function block name: STB-- IEC 60617 graphical symbol:

ANSI number: 50STB
STBPTOC 3I>STUB
8.1 Introduction
When a power line is taken out of service for maintenance and the line disconnector is opened
in multi-breaker arrangements the voltage transformers will mostly be outside on the discon-
nected part. The primary line distance protection will thus not be able to operate and must be
blocked.
The stub protection covers the zone between the current transformers and the open disconnector.
The three phase instantaneous overcurrent function is released from a NO (b) auxiliary contact
on the line disconnector.

The sampled analog phase currents are pre-processed in a discrete Fourier filter (DFT) block.
phase current is derived. These phase current values are fed to the STB function. In a comparator
the RMS values are compared to the set operation current value of the function I>. If a phase
current is larger than the set operation current the signal from the comparator for this phase is
set to true. This signal will, in combination with the release signal from line disconnection (RE-
LEASE input), activate the timer of this function. The function can be blocked by activation of
the BLOCK input. If the fault current remains during the set timer delayt the function gives a
trip signal.
319
Current protection
STUB PROTECTION FUNCTION
BLOCK
TRIP
STIL1 AND
STIL2 OR
STIL3
RELEASE
en05000731.vsd
Figure 166: Simplified logic diagram for the stub protection
8.3 Function block
STB1-
STBPTOC_50STB
I3P TRIP
BLOCK START
BLKTR
RELEASE
en05000678.vsd
Figure 167: STB function block

Table 166: Input signals for the STBPTOC_50STB (STB1-) function block
Signal Description
BLKTR Block of trip
RELEASE Release of stub protection
320
Current protection
Table 167: Output signals for the STBPTOC_50STB (STB1-) function block
Signal Description
TRIP Trip
START General start

Table 168: Basic parameter group settings for the STBPTOC_50STB (STB1-) function
On
ReleaseMode Release - Release - Release of stub protec-
Continuous tion
I> 1 - 2500 1 200 %IB Operate current level in
% of IBase
Table 169: Advanced parameter group settings for the STBPTOC_50STB (STB1-) func-
tion
t 0.000 - 60.000 0.001 0.000 s Time delay
8.6 Technical data

Table 170: Stub protection (PTOC, 50STB)
Operate current (1-2500)% of Ibase ± 1.0% of Ir at I ≤ Ir
± 1.0% of I at I > Ir
Reset ratio > 95% -
Definite time (0.000-60.000) s ± 0.5% ± 10 ms
321
Pole discordance protection (RPLD, 52PD) Chapter 6
Current protection
9 Pole discordance protection (RPLD, 52PD)
Function block name: PDx-- IEC 60617 graphical symbol:

ANSI number: 50PD
CCRPLD
PD
9.1 Introduction
Single pole operated circuit breakers can due to electrical or mechanical failures end up with the
different poles in different positions (close-open). This can cause negative and zero sequence
currents which gives thermal stress on rotating machines and can cause unwanted operation of
zero sequence or negative sequence current functions.
Normally the own breaker is tripped to correct the positions. If the situation consists the remote
end can be intertripped to clear the unsymmetrical load situation.
The pole discordance function operates based on information from auxiliary contacts of the cir-
cuit breaker for the three phases with additional criteria from unsymmetrical phase current when
required.

The detection of pole discordance can be made in two different ways. If the contact based func-
tion is used an external logic can be made by connecting the auxiliary contacts of the circuit
breaker so that a pole discordance is indicated. This is shown in figure 169
C.B.
poleDiscordance Signal from C.B.
en05000287.vsd
Figure 168: Pole discordance external detection logic
322
Current protection
This single binary signal is connected to a binary input of the IED. The appearance of this signal
will start a timer that will give a trip signal after the set delay.
There is also a possibility to connect all phase selective auxiliary contacts (phase contact open
and phase contact closed) to binary inputs of the IED. This is shown in figure 170
C.B.
poleOneClosed from C.B.
poleTwoClosed from C.B.
poleThreeClosed from C.B.
+
poleOneOpened from C.B.
poleTwoOpened from C.B.
poleThreeOpened from C.B.
en05000288.vsd
Figure 169: Pole discordance signals for internal logic
In this case the logic is realized within the function. If the inputs are indicating pole discordance
the trip timer is started. This timer will give a trip signal after the set delay.
Pole discordance can also be detected by means of phase selective current measurement. The
sampled analogue phase currents are pre-processed in a discrete Fourier filter (DFT) block.
phase current is derived. These phase current values are fed to the PD (RPLD) function. The dif-
ference between the smallest and the largest phase current is derived. If this difference is larger
than a set ratio the trip timer is started. This timer will give a trip signal after the set delay. The
current based pole discordance function can be set to be active either continuously or only di-
rectly in connection to breaker open or close command.
The function also has a binary input that can be configured from the autoreclosing function, so
that the pole discordance function can be blocked during sequences with a single pole open if
single pole autoreclosing is used.
The simplified block diagram of the current and contact based pole discordance function is
shown in figure 171.
323
Current protection
BLOCK
OR
BLKDBYAR
PolPosAuxCont
AND
POLE1OPN
POLE1CL
POLE2OPN
Discordance
POLE2CL
detection
POLE3OPN
POLE3CL t 150 ms
t TRIP
AND
OR
PD Signal from CB
AND
EXTPDIND
CLOSECMD t+200 ms
OR
OPENCMD
AND
Unsymmetry current
detection
en05000747.vsd
Figure 170: Simplified block diagram of pole discordance function - contact and current based
The pole discordance function is blocked if:
• The terminal is in TEST mode (TEST-ACTIVE is high) and the function has
been blocked from the HMI (BlockPD=Yes)
• The input signal BLOCK is high
• The input signal BLKDBYAR is high
The BLOCK signal is a general purpose blocking signal of the pole discordance function. It can
be connected to a binary input of the terminal in order to receive a block command from external
devices or can be software connected to other internal functions of the terminal itself in order to
receive a block command from internal functions. Through OR gate it can be connected to both
binary inputs and internal function outputs.
The BLKDBYAR signal blocks the pole discordance operation when a single phase autoreclos-
ing cycle is in progress. It can be connected to the output signal AR01-1PT1 if the autoreclosing
function is integrated in the terminal; if the autoreclosing function is an external device, then
BLKDBYAR has to be connected to a binary input of the terminal and this binary input is con-
nected to a signalization “1phase autoreclosing in progress” from the external autoreclosing de-
vice.
If the pole discordance function is enabled, then two different criteria will generate a trip signal
TRIP:
• Pole discordance signalling from the circuit breaker.

• Unsymmetrical current detection.
324
Current protection
9.2.1 Pole discordance signalling from circuit breaker

If one or two poles of the circuit breaker have failed to open or to close (pole discordance status),
then the function input EXTPDIND is activated from the pole discordance signal derived from
the circuit breaker auxiliary contacts (one NO contact for each phase connected in parallel, and
in series with one NC contact for each phase connected in parallel) and, after a settable time in-
terval t (0-60 s), a 150 ms trip pulse command TRIP is generated by the pole discordance func-
tion.
9.2.2 Unsymmetrical current detection

Unsymmetrical current detection is based on checking that:
• any phase current is lower than CurrUnsymLevel of the highest current in the re-
maining two phases
• the highest phase current is greater than CurrRelLevelof the rated current
If these conditions are true, an unsymmetrical condition is detected and the internal signal INPS
is turned high. This detection is enabled to generate a trip after a set time delay t (0-60 s) if the
detection occurs in the next 200 ms after the circuit breaker has received a command to open trip
or close and if the unbalance persists. The 200 ms limitation is for avoiding unwanted operation
during unsymmetrical load conditions.
The pole discordance function is informed that a trip or close command has been given to the
circuit breaker through the inputs CLOSECMD (for closing command information) and
OPENCMD (for opening command information). These inputs can be connected to terminal bi-
nary inputs if the information are generated from the field (i.e. from auxiliary contacts of the
close and open push buttons) or may be software connected to the outputs of other integrated
functions (i.e. close command from a control function or a general trip from integrated protec-
tions).
9.3 Function block
PD01-
CCRPLD_52PD
I3P TRIP
BLOCK START
BLKDBYAR
CLOSECMD
OPENCMD
EXTPDIND
POLE1OPN
POLE1CL
POLE2OPN
POLE2CL
POLE3OPN
POLE3CL
en06000275.vsd
Figure 171: PD function block
325
Current protection

Table 171: Input signals for the CCRPLD_52PD (PD01-) function block
Signal Description
BLKDBYAR Block of function at CB single phase auto re-closing cycle
CLOSECMD Close order to CB
OPENCMD Open order to CB
EXTPDIND Pole discordance signal from CB logic
POLE1OPN Pole one opened indication from CB
POLE1CL Pole one closed indication from CB
POLE2OPN Pole two opened indication from CB
POLE2CL Pole two closed indication from CB
POLE3OPN Pole three opened indication from CB
POLE3CL Pole three closed indication from CB
Table 172: Output signals for the CCRPLD_52PD (PD01-) function block
Signal Description
TRIP Trip signal to CB
START Trip condition TRUE, waiting for time delay

Table 173: Basic parameter group settings for the CCRPLD_52PD (PD01-) function
On
IBase 1 - 99999 1 3000 - Base current
326
Current protection

tTrip 0.000 - 60.000 0.001 0.300 s Time delay between trip
condition and trip signal
ContSel Off - Off - Contact function selec-
PD signal from CB tion
Pole pos aux cont.
CurrSel Off - Off - Current function selection
CB oper monitor
Continuous moni-
tor
CurrUnsymLevel 0 - 100 1 80 % Unsym magn of lowest
phase current compared
to the highest.
CurrRelLevel 0 - 100 1 10 %IB Current magnitude for
release of the function in
% of IBase
9.6 Technical data

Table 174: Pole discordance protection (RPLD, 52PD)
Operate current (0–100)% of Ibase ± 1.0% of Ir
Time delay (0.000-60.000) s ± 0.5% ± 10 ms
327
Directional underpower protection (PDUP, 32) Chapter 6
Current protection
10 Directional underpower protection (PDUP, 32)
Function block name: IEC 60617 graphical symbol:

ANSI number: 32
IEC 61850 logical node name: P><
10.1 Introduction
The task of a generator in a power plant is to convert mechanical energy available as a torque on
a rotating shaft to electric energy.
Sometimes, the mechanical power from a prime mover may decrease so much that it does not
cover bearing losses and ventilation losses. Then, the synchronous generator becomes a syn-
chronous motor and starts to take electric power from the rest of the power system. This operat-
ing state, where individual synchronous machines operate as motors, implies no risk for the
machine itself. If the generator under consideration is very large and if it consumes lots of elec-
tric power, it may be desirable to disconnect it to ease the task for the rest of the power system.
Often, the motoring condition may imply that the turbine is in a very dangerous state. The task
of the reverse power protection is to protect the turbine and not to protect the generator itself.
Figure 173 illustrates the reverse power protection with underpower relay and with overpower
relay. The underpower relay gives a higher margin and should provide better dependability. On
the other hand, the risk for unwanted operation immediately after synchronization may be high-
er. One should set the underpower relay to trip if the active power from the generator is less than
about 2%. One should set the overpower relay to trip if the power flow from the network to the
generator is higher than 1% depending on the type of turbine.
Underpower Relay Overpower Relay
Operate
Q Q
Operate
Line Line
Margin Margin
P P
Operating point Operating point

without without
turbine torque turbine torque
en06000315.vsd
Figure 172: Protection with underpower relay and overpower relay
328
Current protection

A simplified scheme showing the principle of the power protection function is shown in
figure 174. The function has two stages with individual settings.
Chosen current
phasors P
Complex Derivation of S(angle)

S(angle) < t Trip1
power S(composant)
Chosen voltage Power1
calculation in Char angle
phasors Q
Start1
S(angle) < t Trip2

Power2
Start2
P = POWRE
Q = POWIM
en06000438.vsd
Figure 173: Simplified logic diagram of the power protection function
The function will use voltage and current phasors calculated in the pre-processing blocks. The
apparent complex power is calculated according to chosen formula as shown in table 175.
329
Current protection
Table 175: Complex power calculation

Set value: measureMode Formula used for complex power calculation
L1, L2, L3
S = U L1 ⋅ I L1* + U L 2 ⋅ I L 2* + U L 3 ⋅ I L 3*
Arone
S = U L1L 2 ⋅ I L1* − U L 2 L 3 ⋅ I L 3*
PosSeq
S = 3 ⋅ U PosSeq ⋅ I PosSeq*
L1L2
S = U L1L 2 ⋅ ( I L1* − I L 2* )
L2L3
S = U L 2 L 3 ⋅ ( I L 2* − I L 3* )
L3L1
S = U L 3 L1 ⋅ ( I L 3* − I L1* )
L1
S = 3 ⋅ U L1 ⋅ I L1*
L2
S = 3 ⋅ U L 2 ⋅ I L 2*
L3
S = 3 ⋅ U L 3 ⋅ I L 3*
NegSeq
S = 3 ⋅ U NegSeq ⋅ I NegSeq *
The active and reactive power is available from the function and can be used for monitoring and
fault recording.
The component of the complex power S = P + jQ in the direction Angle1(2) is calculated. If this
angle is 0° the active power component P is calculated. If this angle is 90° the reactive power
component Q is calculated.
The calculated power component is compared to the power pick up setting Power1(2). A start
signal START1(2) is activated if the calculated power component is smaller than the pick up val-
ue. After a set time delay TripDelay1(2) a trip TRIP1(2) signal is activated if the start signal is
still active. At activation of any of the two stages a common signal START will be activated. At
trip from any of the two stages also a common signal TRIP will be activated.
330
Current protection
To avoid instability there is a settable hysteresis in the power function. The absolute hysteresis
of the stage1(2) is Hysteresis1(2) = abs (Power1(2) + drop-power1(2)). For generator low for-
ward power protection the power setting is very low, normally down to 0.02 pu of rated gener-
ator power. The hysteresis should therefore be set to a smaller value. The drop-power value of
stage1 can be calculated with the Power1(2), Hysteresis1(2): drop-power1(2) = Power1(2) +
Hysteresis1(2)
For small power1 values the hysteresis1 may not be too big, because the drop-power1(2) would
be too small. In such cases, the hysteresis1 greater than (0.5 * Power1(2)) is corrected to the min-
imal value.
If the measured power drops under the drop-power1(2) value the function will reset after a set
time DropDelay1(2). The reset means that the start signal will drop out ant that the timer of the
stage will reset.
10.2.1 Low pass filtering

In order to minimize the influence of the noise signal on the measurement it is possible to intro-
duce the recursive, low pass filtering of the measured values for S (P, Q). This will make slower
measurement response to the step changes in the measured quantity. Filtering is performed in
accordance with the following recursive formula:
S = k ⋅ SOld + (1 − k ) ⋅ SCalculated
(Equation 67)
Where
S is a new measured value to be used for the protection function
Sold is the measured value given from the function in previous execution cycle
SCalcu- is the new calculated value in the present execution cycle
lated
k is settable parameter by the end user which influence the filter properties
Default value for parameter k is 0.00. With this value the new calculated value is immediately
given out without any filtering (i.e. without any additional delay). When k is set to value bigger
than 0, the filtering is enabled. A typical value for k = 0.14.
10.2.2 Calibration of analog inputs

Measured currents and voltages used in the Power function can be calibrated to get class 0.5
measuring accuracy. This is achieved by amplitude and angle compensation at 5, 30 and 100%
of rated current and voltage. The compensation below 5% and above 100% is constant and linear
in between, see example in figure 175.
331
Current protection
Amplitude
% of Ir compensation
-10
IAmpComp5 Measured
IAmpComp30 current
IAmpComp100
5 30 100 % of Ir
0-5%: Constant
-10 5-30-100%: Linear
>100%: Constant
Degrees Angle
compensation
-10
IAngComp30 Measured
current
IAngComp5
IAngComp100
5 30 100 % of Ir
-10
en05000652.vsd
Figure 174: Calibration curves
The first current and voltage phase in the group signals will be used as reference and the ampli-
tude and angle compensation will be used for related input signals.
Analog outputs from the function can be used for service values or in the disturbance report. The
active power is provided as a MW value: P, or in percent of base power: PPERCENT. The re-
active power is provided as a Mvar value: Q, or in percent of base power: QPERCENT.
332
Current protection
10.3 Function block
GUP1-
GUPPDUP_37
I3P TRIP
U3P TRIP1
BLOCK TRIP2
BLOCK1 START
BLOCK2 START1
START2
P
PPERCENT
Q
QPERCENT
en07000027.vsd
Figure 175: GUP function block

Table 176: Input signals for the GUPPDUP_37 (GUP1-) function block
Signal Description
BLOCK1 Block of stage 1
Table 177: Output signals for the GUPPDUP_37 (GUP1-) function block
Signal Description
TRIP1 Trip of stage 1
START Common start
START1 Start of stage 1
P Active Power in MW
PPERCENT Active power in % of SBASE
Q Reactive power in Mvar
QPERCENT Reactive power in % of SBASE
333
Current protection

Table 178: Basic general settings for the GUPPDUP_37 (GUP1-) function
IBase 1 - 99999 1 3000 A Current-Reference (pri-
mary current A)
UBase 0.05 - 2000.00 0.05 400.00 kV Voltage-Reference (pri-
mary voltage kV)
Mode L1, L2, L3 - Pos Seq - Selection of measured
Arone current and voltage
Pos Seq
L1L2
L2L3
L3L1
L1
L2
L3
Table 179: Basic parameter group settings for the GUPPDUP_37 (GUP1-) function
On
OpMode1 Off - UnderPower - Operation mode 1
UnderPower
Power1 0.0 - 500.0 0.1 1.0 %SB Power setting for stage 1
in % of Sbase
Angle1 -180.0 - 180.0 0.1 0.0 Deg Angle for stage 1
TripDelay1 0.010 - 6000.000 0.001 1.000 s Trip delay for stage 1
DropDelay1 0.010 - 6000.000 0.001 0.060 s Drop delay for stage 1
OpMode2 Off - UnderPower - Operation mode 2
UnderPower
in % of Sbase
334
Current protection
Table 180: Advanced parameter group settings for the GUPPDUP_37 (GUP1-) function
k 0.00 - 0.99 0.01 0.00 - Low pass filter coefficient
for power measurement,
P and Q
Hysteresis1 0.2 - 5.0 0.1 0.5 pu Absolute hysteresis of
stage 1
stage 2
IAmpComp5 -10.000 - 10.000 0.001 0.000 % Amplitude factor to cali-
brate current at 5% of Ir
brate current at 100% of
Ir
UAmpComp5 -10.000 - 10.000 0.001 0.000 % Amplitude factor to cali-
brate voltage at 5% of Ur
brate voltage at 30% of
Ur
Ur
IAngComp5 -10.000 - 10.000 0.001 0.000 Deg Angle calibration for cur-
rent at 5% of Ir
rent at 30% of Ir
rent at 100% of Ir
10.6 Technical data

Table 181: Directional underpower protection (PDUP)
Power level (0.0–500.0)% of Sbase < ± 0.5% of Sbase with calibration
At low setting:
(0.5-2.5)% of Sbase < ± 20% of set value
(2.5-10)% of Sbase < ± 10% of set value
Characteristic angle (-180.0–180.0) degrees 2 degrees
Timers (0.00-6000.00) s ± 0.5% ± 10 ms
335
Directional overpower protection (PDOP, 32) Chapter 6
Current protection
11 Directional overpower protection (PDOP, 32)
Function block name: GOPx IEC 60617 graphical symbol:

ANSI number: 32
IEC 61850 logical node name: P><
GOPPDOP
11.1 Introduction
The task of a generator in a power plant is to convert mechanical energy available as a torque on
a rotating shaft to electric energy.
Sometimes, the mechanical power from a prime mover may decrease so much that it does not
cover bearing losses and ventilation losses. Then, the synchronous generator becomes a syn-
chronous motor and starts to take electric power from the rest of the power system. This operat-
ing state, where individual synchronous machines operate as motors, implies no risk for the
machine itself. If the generator under consideration is very large and if it consumes lots of elec-
tric power, it may be desirable to disconnect it to ease the task for the rest of the power system.
Often, the motoring condition may imply that the turbine is in a very dangerous state. The task
of the reverse power protection is to protect the turbine and not to protect the generator itself.
Figure 177 illustrates the reverse power protection with underpower relay and with overpower
relay. The underpower relay gives a higher margin and should provide better dependability. On
the other hand, the risk for unwanted operation immediately after synchronization may be high-
er. One should set the underpower relay to trip if the active power from the generator is less than
about 2%. One should set the overpower relay to trip if the power flow from the network to the
generator is higher than 1%.
Underpower Relay Overpower Relay
Operate
Q Q
Operate
Line Line
Margin Margin
P P
Operating point Operating point

without without
turbine torque turbine torque
en06000315.vsd
Figure 176: Reverse power protection with underpower relay and overpower relay
336
Current protection

A simplified scheme showing the principle of the power protection function is shown in
figure 178. The function has two stages with individual settings.
Chosen current
phasors P
Complex Derivation of S(angle)

S(angle) > t Trip1
power S(composant)
Chosen voltage Power1
calculation in Char angle
phasors Q
Start1
S(angle) > t Trip2

Power2
Start2
P = POWRE
Q = POWIM
en06000567.vsd
Figure 177: Simplified logic diagram of the power protection function
The function will use voltage and current phasors calculated in the pre-processing blocks. The
apparent complex power is calculated according to chosen formula as shown in table 182.
337
Current protection
Table 182: Complex power calculation

Set value: measureMode Formula used for complex power calculation
L1, L2, L3
S = U L1 ⋅ I L1* + U L 2 ⋅ I L 2* + U L 3 ⋅ I L 3*
Arone
S = U L1L 2 ⋅ I L1* − U L 2 L 3 ⋅ I L 3*
PosSeq
S = 3 ⋅ U PosSeq ⋅ I PosSeq*
L1L2
S = U L1L 2 ⋅ ( I L1* − I L 2* )
L2L3
S = U L 2 L 3 ⋅ ( I L 2* − I L 3* )
L3L1
S = U L 3 L1 ⋅ ( I L 3* − I L1* )
L1
S = 3 ⋅ U L1 ⋅ I L1*
L2
S = 3 ⋅ U L 2 ⋅ I L 2*
L3
S = 3 ⋅ U L 3 ⋅ I L 3*
The active and reactive power is available from the function and can be used for monitoring and
fault recording.
The component of the complex power S = P + jQ in the direction Angle1(2) is calculated. If this
angle is 0° the active power component P is calculated. If this angle is 90° the reactive power
component Q is calculated.
The calculated power component is compared to the power pick up setting Power1(2). A start
signal START1(2) is activated if the calculated power component is larger than the pick up val-
ue. After a set time delay TripDelay1(2) a trip TRIP1(2) signal is activated if the start signal is
still active. At activation of any of the two stages a common signal START will be activated. At
trip from any of the two stages also a common signal TRIP will be activated.
To avoid instability there is a settable hysteresis in the power function. The absolute hysteresis
of the stage1(2) is Hysteresis1(2) = abs (Power1(2) – drop-power1(2)). For generator reverse
power protection the power setting is very low, normally down to 0.02 pu of rated generator
338
Current protection
power. The hysteresis should therefore be set to a smaller value. The drop-power value of stage1
can be calculated with the Power1(2), Hysteresis1(2): drop-power1(2) = Power1(2) –
Hysteresis1(2)
For small power1 values the hysteresis1 may not be too big, because the drop-power1(2) would
be too small. In such cases, the hysteresis1 greater than (0.5 * Power1(2)) is corrected to the min-
imal value.
If the measured power drops under the drop-power1(2) value the function will reset after a set
time DropDelay1(2). The reset means that the start signal will drop out ant that the timer of the
stage will reset.
11.2.1 Low pass filtering

duce the recursive, low pass filtering of the measured values for S (P, Q). This will make slower
measurement response to the step changes in the measured quantity. Filtering is performed in
accordance with the following recursive formula:
S = k ⋅ SOld + (1 − k ) ⋅ SCalculated
(Equation 68)
Where
S is a new measured value to be used for the protection function
Sold is the measured value given from the function in previous execution cycle
SCalcu- is the new calculated value in the present execution cycle
lated
than 0, the filtering is enabled. A typical value for k = 0.14.
11.2.2 Calibration of analog inputs

Measured currents and voltages used in the Power function can be calibrated to get class 0.5
measuring accuracy. This is achieved by amplitude and angle compensation at 5, 30 and 100%
of rated current and voltage. The compensation below 5% and above 100% is constant and linear
339
Current protection
Amplitude
-10
IAmpComp5 Measured
IAmpComp30 current
IAmpComp100
5 30 100 % of Ir
0-5%: Constant
-10 5-30-100%: Linear
>100%: Constant
Degrees Angle
compensation
-10
IAngComp30 Measured
current
IAngComp5
IAngComp100
5 30 100 % of Ir
-10
en05000652.vsd
Analog outputs from the function can be used for service values or in the disturbance report. The
active power is provided as a MW value: P, or in percent of base power: PPERCENT. The re-
active power is provided as a Mvar value: Q, or in percent of base power: QPERCENT.
340
Current protection
11.3 Function block
GOP1-
GOPPDOP_32
I3P TRIP
U3P TRIP1
BLOCK TRIP2
BLOCK1 START
BLOCK2 START1
START2
P
PPERCENT
Q
QPERCENT
en07000028.vsd
Figure 179: GOP function block

Table 183: Input signals for the GOPPDOP_32 (GOP1-) function block
Signal Description
Table 184: Output signals for the GOPPDOP_32 (GOP1-) function block
Signal Description
START Common start
P Active Power in MW
PPERCENT Active power in % of SBASE
Q Reactive power in Mvar
QPERCENT Reactive power in % of SBASE
341
Current protection

Table 185: Basic general settings for the GOPPDOP_32 (GOP1-) function
IBase 1 - 99999 1 3000 A Current-Reference (pri-
mary current A)
UBase 0.05 - 2000.00 0.05 400.00 kV Voltage-Reference (pri-
mary voltage kV)
Mode L1, L2, L3 - Pos Seq - Selection of measured
Pos Seq
L1L2
L2L3
L3L1
L1
L2
L3
Table 186: Basic parameter group settings for the GOPPDOP_32 (GOP1-) function
On
OpMode1 Off - OverPower - Operation mode 1
OverPower
in % of Sbase
OpMode2 Off - OverPower - Operation mode 2
OverPower
in % of Sbase
342
Current protection
Table 187: Advanced parameter group settings for the GOPPDOP_32 (GOP1-) function
P and Q
stage 1 in % of Sbase
stage 2 in % of Sbase
Ir
Ur
Ur
rent at 5% of Ir
rent at 30% of Ir
rent at 100% of Ir
11.6 Technical data

Table 188: Directional overpower protection (PDOP)
Power level (0.0–500.0)% of Sbase < ± 0.5% of Sbase with calibration
At low setting:
(0.5-2.5)% of Sbase < ± 20% of set value
(2.5-10)% of Sbase < ± 10% of set value
Characteristic angle (-180.0–180.0) degrees 2 degrees
Timers (0.00-6000.00) s ± 0.5% ± 10 ms
343
Broken conductor check (PTOC, 46) Chapter 6
Current protection
12 Broken conductor check (PTOC, 46)
Function block name: BRC IEC 60617 graphical symbol:

ANSI number: 46
BRCPTOC
12.1 Introduction
Conventional protection functions can not detect the broken conductor condition. The broken
conductor monitoring function (BRC), consisting of continuous current unsymmetry check on
the line where the terminal is connected will give alarm or trip at detecting broken conductors.

The BRCPTOC function detects a broken conductor condition by detecting the unsymmetry be-
tween currents in the three phases. The current-measuring elements continuously measure the
three-phase currents.
The current unsymmetry signal output START is set on if :
• The difference in currents between the phase with the lowest current and the
phase with the highest current is greater than set percentage Iub> of the highest
phase current
• The highest phase current is greater than the minimum setting value IP>.
• The lowest phase current is below 50% of the minimum setting value IP>
The third condition is included to avoid problems in systems involving parallel lines. If a con-
ductor breaks in one phase on one line the parallel line will experience an increase in current in
the same phase. This might result in the first two conditions being satisfied. If the unsymmetrical
detection lasts for a period longer than the set time tOper the TRIP output is activated.
The simplified logic diagram of the broken conductor check function is shown in figure 181
The function is disabled (blocked) if:
• The IED is in TEST status and the function has been blocked from the HMI test
menu (BlockBRC=Yes).
• The input signal BLOCK is high.
The BLOCK input can be connected to a binary input of the terminal in order to receive a block
command from external devices or can be software connected to other internal functions of the
terminal itself in order to receive a block command from internal functions.
The output trip signal TRIP is a three phase trip. It can be used to command a trip to the circuit
breaker or for alarm purpose only.
344
Current protection
TEST
TEST-ACTIVE
&
BlockBRC = Yes
BRC--START
Function Enable
BRC--BLOCK >1
t
BRC--TRIP
& t
Unsymmetrical
Current Detection
STI
IL1<50%IP>
IL2<50%IP> ≥1
IL3<50%IP>
en07000122.vsd
Figure 180: Simplified logic diagram for broken conductor check function.
12.3 Function block
BRC1-
BRCPTOC_46
I3P TRIP
BLOCK START
BLKTR
en07000034.vsd
Figure 181: BRC function block

Table 189: Input signals for the BRCPTOC_46 (BRC1-) function block
Signal Description
BLKTR Blocks the operate output
345
Current protection
Table 190: Output signals for the BRCPTOC_46 (BRC1-) function block
Signal Description
TRIP Operate signal of the protection logic
START Start signal of the protection logic

Table 191: Basic parameter group settings for the BRCPTOC_46 (BRC1-) function
On
IBase 0 - 99999 1 3000 A IBase
Iub> 50 - 90 1 50 %IM Unbalance current opera-
tion value in percent of
max current
IP> 5 - 100 1 20 %IB Minimum phase current
for operation of Iub> in %
of Ibase
tOper 0.000 - 60.000 0.001 5.000 s Operate time delay
Table 192: Advanced parameter group settings for the BRCPTOC_46 (BRC1-) function
tReset 0.010 - 60.000 0.001 0.100 s Time delay in reset
12.6 Technical data

Table 193: Broken conductor check (PTOC, 46)
Minimum phase current for opera- (5–100)% of Ibase ± 0.1% of Ir
tion
Unbalance current operation (0–100)% of maximum current ± 0.1% of Ir
Timers (0.00-6000.00) s ± 0.5% ± 10 ms
346
Voltage protection
Chapter 7 Voltage protection
About this chapter

This chapter describes voltage related protection functions. The way the functions work, their
setting parameters, function blocks, input and output signals and technical data are included for
each function.
347
Two step undervoltage protection (PTUV, 27) Chapter 7
Voltage protection
1 Two step undervoltage protection (PTUV, 27)
Function block name: TUVx- IEC 60617 graphical symbol:

ANSI number: 27
UV2PTUV
3U<
1.1 Introduction
Undervoltages can occur in the power system during faults or abnormal conditions. The function
can be used to open circuit breakers to prepare for system restoration at power outages or as
long-time delayed back-up to primary protection.
The function has two voltage steps, each with inverse or definite time delay.

The two-step undervoltage protection function (TUV) is used to detect low power system volt-
age. The function has two voltage measuring steps with separate time delays. If one, two or three
phase voltages decrease below the set value, a corresponding start signal is issued. TUV can be
set to start/trip based on "one out of three", "two out of three", or "three out of three" of the mea-
sured voltages, being below the set point. If the voltage remains below the set value for a time
period corresponding to the chosen time delay, the corresponding trip signal is issued. To avoid
an unwanted trip due to disconnection of the related high voltage equipment, a voltage con-
trolled blocking of the function is available, i.e. if the voltage is lower than the set blocking level
the function is blocked and no start or trip signal is issued. The time delay characteristic is indi-
vidually chosen for each step and can be either definite time delay or inverse time delay.
The undervoltage protection function can be set to measure phase to earth fundamental value,
phase to phase fundamental value, phase to earth RMS value or phase to phase RMS value. The
choise of the measuring is done by the parameter ConnType in PST or LHMI under Generall
Settings/Voltage protection. The voltage related settings are made in percent of base voltage
which is set i kV phase-phase voltage This means operation for phase to earth voltage under:
U < (%) ⋅ UBase( kV )

3
(Equation 69)
and operation for phase to phase voltage under:
U < (%) ⋅ UBase(kV)

(Equation 70)
348
Voltage protection
1.2.1 Measurement principle

All the three phase to earth voltages are measured continuously, and compared with the set val-
ues, U1< and U2<. The parameters OpMode1 and OpMode2 influence the requirements to ac-
tivate the start outputs. Either "1 out of 3", "2 out of 3" or "3 out of 3" phases have to be lower
than the corresponding set point to issue the corresponding start signal.
To avoid oscillations of the output start signal, a hysteresis has been included.
1.2.2 Time delay

The time delay for the two steps can be either definite time delay (DT) or inverse time delay (ID-
MT). For the inverse time delay three different modes are available; inverse curve A, inverse
curve B, and a programmable inverse curve.
The type A curve is described as:
k
t=
⎛ U < −U ⎞
⎜ ⎟
⎝ U< ⎠
(Equation 71)
The type B curve is described as:
k ⋅ 480
t= + 0.055
U < −U
2.0
⎛ ⎞
⎜ 32 ⋅ − 0.5 ⎟
⎝ U< ⎠
(Equation 72)
The programmable curve can be created as:
⎡ ⎤
⎢ ⎥
⎢ k⋅A ⎥+D
t=
⎢⎛ U < −U ⎞
p
⎥
⎢⎜ B ⋅ −C⎟ ⎥
⎣⎝ U< ⎠ ⎦
(Equation 73)
When the denominator in the expression is equal to zero the time delay will be infinity. There
will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate
for this phenomenon. In the voltage interval U< down to U< *(1.0 – CrvSatn/100) the used volt-
age will be: U< *(1.0 – CrvSatn/100). If the programmable curve is used this parameter must be
calculated so that:
349
Voltage protection
CrvSatn
B⋅ −C > 0
100
(Equation 74)
The lowest voltage is always used for the inverse time delay integration. The details of the dif-
ferent inverse time characteristics are shown in section 3 "Inverse characteristics".
Trip signal issuing requires that the undervoltage condition continues for at least the user set
time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by
some special voltage level dependent time curves for the inverse time mode (IDMT). If the start
condition, with respect to the measured voltage ceases during the delay time, and is not fulfilled
again within a user defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and
tIReset2pickup for the inverse time) the corresponding start output is reset. Here it should be not-
ed that after leaving the hysteresis area, the start condition must be fulfilled again and it is not
sufficient for the signal to only return back to the hysteresis area. Note that for the undervoltage
function the IDMT reset time is constant and does not depend on the voltage fluctuations during
the drop-off period. However, there are three ways to reset the timer, either the timer is reset in-
stantaneously, or the timer value is frozen during the reset time, or the timer value is linearly
decreased during the reset time. See figure 183 and figure 184.
350
Voltage protection
tReset
tReset 1
Voltage 1 Measured
START Voltage
Hysteresis
TRIP
U1<
Time
START t1
TRIP
Time
Integrator Froozen Timer
t1
Time
Instantaneous
Linear Decrease
Reset en05000010.vsd
Figure 182: Voltage profile not causing a reset of the start signal for step 1, and definite time
delay
351
Voltage protection
tReset1
Voltage
tReset1
START
START
Hysteresis Measured Voltage
TRIP
U1<
Time
START t1
TRIP
Time Integrator
Froozen Timer
t1
Time
Instantaneous
Linear Decrease
Figure 183: Voltage profile causing a reset of the start signal for step 1, and definite time delay
1.2.3 Blocking
The undervoltage function can be partially or totally blocked, by binary input signals or by pa-
rameter settings, where:
352
Voltage protection
BLOCK: blocks all outputs

BLKTR1: blocks all trip outputs of step 1
BLKST1: blocks all start and trip outputs related to step 1
If the measured voltage level decreases below the setting of IntBlkStVal1, either the trip output
of step 1, or both the trip and the start outputs of step 1, are blocked. The characteristic of the
blocking is set by the IntBlkSel1 parameter. This internal blocking can also be set to "off" result-
ing in no voltage based blocking. Corresponding settings and functionality are valid also for step
2.
In case of disconnection of the high voltage component the measured voltage will get very low.
The event will start both the under voltage function and the blocking function, as seen in figure
185. The delay of the blocking function must be set less than the time delay of under voltage
function.
353
Voltage protection
U Disconnection
Normal voltage
U1<
U2<
tBlkUV1 <
t1,t1Min
IntBlkStVal1
tBlkUV2 <
t2,t2Min
IntBlkStVal2
Time
Block step 1
Block step 2
en05000466.vsd
Figure 184: Blocking function.
1.2.4 Design
The voltage measuring elements continuously measure the three phase-to-neutral voltages or the
three phase to phase voltages. Recursive Fourier filters or RMS filters based on one fundamental
cycle filter the input voltage signals. The voltages are individually compared to the set value,
and the lowest voltage is used for the inverse time characteristic integration. A special logic is
included to achieve the "1 out of 3", "2 out of 3" and "3 out of 3" criteria to fulfill the start con-
dition. The design of the TimeUnderVoltage function is schematically described in figure 186.
354
Voltage protection
UL1 Comparator ST1L1

UL1 < U1< Phase 1
Voltage Phase
Selector ST1L2
UL2 Comparator OpMode1 Phase 2
UL2 < U1< 1 out of 3
2 out of 3 ST1L3
Phase 3 Start
UL3 Comparator 3 out of 3
&
UL3 < U1< Trip ST1
OR
Output
START Logic TR1L1
Step 1
Time integrator TR1L2
MinVoltSelect t1 TRIP
or tReset1
ResetTypeCrv1 TR1L3
TR1
OR
Comparator ST2L1
UL1 < U2< Phase 1
Voltage Phase
Selector ST2L2
Comparator OpMode2 Phase 2
UL2 < U2< 1 out of 3
2 outof 3 ST2L3
Phase 3 Start
Comparator 3 out of 3
&
UL3 < U2< Trip ST2
Output OR
START Logic TR2L1
Step 2
MinVoltSelect t2 TRIP
or tReset2
ResetTypeCrv2 TR2L3
TR2
OR
OR START
TRIP
OR
en05000012.vsd
Figure 185: Schematic design of the TUV function
355
Voltage protection
1.3 Function block
TUV1-
UV2PTUV_27
U3P TRIP
BLOCK TR1
BLKTR1 TR1L1
BLKST1 TR1L2
BLKTR2 TR1L3
BLKST2 TR2
TR2L1
TR2L2
TR2L3
START
ST1
ST1L1
ST1L2
ST1L3
ST2
ST2L1
ST2L2
ST2L3
en06000276.vsd
Figure 186: TUV function block

Table 194: Input signals for the UV2PTUV_27 (TUV1-) function block
Signal Description
U3P Three phase voltages
BLKTR1 Block of operate signal, step 1
BLKST1 Block of step 1
Table 195: Output signals for the UV2PTUV_27 (TUV1-) function block
Signal Description
TRIP Trip
356
Voltage protection
Signal Description

Table 196: Basic general settings for the UV2PTUV_27 (TUV1-) function
ConnType PhG DFT - PhG DFT - Group selector for con-
PhPh RMS nection type
PhG RMS
PhG DFT
Table 197: Basic parameter group settings for the UV2PTUV_27 (TUV1-) function
On
OperationStep1 Off - On - Enable execution of step
On 1
Characterist1 Definite time - Definite time - Selection of time delay
Inverse curve A curve type for step 1
Inverse curve B
Prog. inv. curve
OpMode1 1 out of 3 - 1 out of 3 - Number of phases
3 out of 3 of 3, 3 of 3) from step 1
U1< 1 - 100 1 70 %UB Voltage setting/start val

(DT & IDMT) in % of
UBase, step 1
step 1
step 1
357
Voltage protection

IntBlkSel1 Off - Off - Internal (low level) block-
Block of trip ing mode, step 1
Block all
IntBlkStVal1 1 - 100 1 20 %UB Voltage setting for inter-
nal blocking in % of
UBase, step 1
tBlkUV1 0.000 - 60.000 0.001 0.000 s Time delay of internal
(low level) blocking for
step 1
HystAbs1 0.0 - 100.0 0.1 0.5 %UB Absolute hysteresis in %
of UBase, step 1
On 2
Inverse curve B
Prog. inv. curve
U2< 1 - 100 1 50 %UB Voltage setting/start val

(DT & IDMT) in % of
UBase, step 2
step 2
step 2
IntBlkSel2 Off - Off - Internal (low level) block-
Block of trip ing mode, step 2
Block all
IntBlkStVal2 1 - 100 1 20 %UB Voltage setting for inter-
nal blocking in % of
UBase, step 2
tBlkUV2 0.000 - 60.000 0.001 0.000 s Time delay of internal
(low level) blocking for
step 2
of UBase, step 2
Table 198: Advanced parameter group settings for the UV2PTUV_27 (TUV1-) function
358
Voltage protection

step 1
Frozen timer type for step 1
Linearly decreased
tIReset1 0.000 - 60.000 0.001 0.025 s Time delay in IDMT reset
(s), step 1
ACrv1 0.005 - 200.000 0.001 1.000 - Parameter A for cus-
tomer programmable
curve for step 1
BCrv1 0.50 - 100.00 0.01 1.00 - Parameter B for cus-
tomer programmable
curve for step 1
CCrv1 0.0 - 1.0 0.1 0.0 - Parameter C for cus-
tomer programmable
curve for step 1
DCrv1 0.000 - 60.000 0.001 0.000 - Parameter D for cus-
tomer programmable
curve for step 1
PCrv1 0.000 - 3.000 0.001 1.000 - Parameter P for cus-
tomer programmable
curve for step 1
CrvSat1 0 - 100 1 0 % Tuning param for prog.
under voltage IDMT
curve, step 1
step 2
Linearly decreased
(s), step 2
tomer programmable
curve for step 2
359
Voltage protection

tomer programmable
curve for step 2
tomer programmable
curve for step 2
tomer programmable
curve for step 2
tomer programmable
curve for step 2
under voltage IDMT
curve, step 2
1.6 Technical data

Table 199: Two step undervoltage protection (PUVM, 27)
Operate voltage, low and high (1–100)% of Ubase ± 1.0% of Ur
step
Absolute hysteresis (0–100)% of Ubase ± 1.0% of Ur
Internal blocking level, low and (1–100)% of Ubase ± 1.0% of Ur
high step
Inverse time characteristics for - See table 579
low and high step, see table 579
Definite time delays (0.000-60.000) s ± 0.5% ±10 ms
Minimum operate time, inverse (0.000–60.000) s ± 0.5% ± 10 ms
characteristics
Operate time, start function 25 ms typically at 2 to 0 x Uset -
Reset time, start function 25 ms typically at 0 to 2 x Uset -
Critical impulse time 10 ms typically at 2 to 0 x Uset -
360
Two step overvoltage protection (PTOV, 59) Chapter 7
Voltage protection
2 Two step overvoltage protection (PTOV, 59)
Function block name: TOVx- IEC 60617 graphical symbol:

ANSI number: 59
3U>
OV2PTOV
2.1 Introduction
Overvoltages will occur in the power system during abnormal conditions such as sudden power
loss, tap changer regulating failures, open line ends on long lines.
The function can be used as open line end detector, normally then combined with directional re-
active over-power function or as system voltage supervision, normally then giving alarm only
or switching in reactors or switch out capacitor banks to control the voltage.
The function has two voltage steps, each of them with inverse or definite time delayed.
The overvoltage function has an extremely high reset ratio to allow setting close to system ser-
vice voltage.

The two-step overvoltage protection function (TOV) is used to detect high power system volt-
age. The function has two steps with separate time delays. If one, two or three phase voltages
increase above the set value, a corresponding start signal is issued. TOV can be set to start/trip
based on "one out of three", "two out of three", or "three out of three" of the measured voltages,
being above the set point. If the voltage remains above the set value for a time period corre-
sponding to the chosen time delay, the corresponding trip signal is issued. The time delay char-
acteristic is individually chosen for the two steps and can be either definite time delay or inverse
time delay.
The voltage related settings are made in percent of the base voltage, which is set in kV,
phase-phase.
The overvoltage protection function can be set to measure phase to earth fundamental value,
phase to phase fundamental value, phase to earth RMS value or phase to phase RMS value. The
choise of measuring is done by the parameter ConnType in PST or LHMI under Generall Set-
tings/Voltage protection. The setting of the analog inputs are given as primary phase to phase
voltage and secondary phase to phase voltage. The function will operate if the voltage gets high-
er than the set percentage of the set base voltage UBase. This means operation for phase to earth
voltage over:
U > (%) ⋅ UBase( kV )

3
(Equation 75)
361
Voltage protection
and operation for phase for phase voltage over:
U > (%) ⋅ UBase(kV)
Vpickup > (%) ⋅ VBase(kV)

(Equation 76)

All the three phase voltages are measured continuously, and compared with the set values, U1>
and U2>. The parameters OpMode1 and OpMode2 influence the requirements to activate the
start outputs. Either "1 out of 3", "2 out of 3" or "3 out of 3" phases have to be higher than the
corresponding set point to issue the corresponding start signal.
2.2.2 Time delay

MT). For the inverse time delay four different modes are available; inverse curve A, inverse
curve B, inverse curve C, and a programmable inverse curve.
TD
t=
⎛ V − Vpickup ⎞
⎜
⎝ Vpickup ⎠
(Equation 77)
k ⋅ 480
t=
U −U >
2.0
⎛ ⎞
⎜ 32 ⋅ − 0.5 ⎟ − 0.035
⎝ U> ⎠
(Equation 78)
The type C curve is described as:
362
Voltage protection
k ⋅ 480
t=
U −U >
3.0
⎛ ⎞
⎜ 32 ⋅ − 0.5 ⎟ − 0.035
⎝ U> ⎠
TD ⋅ 480
t= 3.0
⎜ 32 ⋅ Vpickup − 0.5 ⎟ − 0.035
⎝ ⎠
(Equation 79)
k⋅A
t= +D
⎛ U −U >
p
⎞
⎜B⋅ −C⎟
⎝ U > ⎠
(Equation 80)
for this phenomenon. In the voltage interval U< down to U< *(1.0 – CrvSatn/100) the used volt-
age will be: U< *(1.0 – CrvSatn/100). If the programmable curve is used this parameter must be
calculated so that:
CrvSatn
B⋅ −C > 0
100
(Equation 81)
The highest phase (or phase to phase) voltage is always used for the inverse time delay integra-
tion, see figure 188. The details of the different inverse time characteristics are shown in section
3 "Inverse characteristics".
363
Voltage protection
Voltage
IDMT Voltage
UL1
UL2
UL3
Time
en05000016.vsd
Figure 187: Voltage used for the inverse time characteristic integration
Trip signal issuing requires that the overvoltage condition continues for at least the user set time
delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by se-
lected voltage level dependent time curves for the inverse time mode (IDMT). If the start con-
dition, with respect to the measured voltage ceases during the delay time, and is not fulfilled
again within a user defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and
tIReset2 for the inverse time) the corresponding start output is reset, after that the defined reset
time has elapsed. Here it should be noted that after leaving the hysteresis area, the start condition
must be fulfilled again and it is not sufficient for the signal to only return back to the hysteresis
area. The hysteresis value for each step is settable (HystAbs2) to allow an high and accurate reset
of the function. It is also remarkable that for the overvoltage function the IDMT reset time is
constant and does not depend on the voltage fluctuations during the drop-off period. However,
there are three ways to reset the timer, either the timer is reset instantaneously, or the timer value
is frozen during the reset time, or the timer value is linearly decreased during the reset time..
2.2.3 Blocking
The overvoltage function can be partially or totally blocked, by binary input signals where:
364
Voltage protection

2.2.4 Design
The voltage measuring elements continuously measure the three phase-to-earth voltages or the
three phase to phasel voltages. Recursive Fourier filters filter the input voltage signals. The
phase voltages are individually compared to the set value, and the highest voltage is used for the
inverse time characteristic integration. A special logic is included to achieve the "1 out of 3", "2
out of 3" and "3 out of 3" criteria to fulfill the start condition. The design of the TimeOverVolt-
age function is schematically described in figure 189.
365
Voltage protection
UL1 Comparator ST1L1

UL1 > U1> Phase 1
Voltage Phase
Selector ST1L2
UL2 Comparator OpMode1 Phase 2
UL2 > U1> 1 out of 3
2 outof 3 ST1L3
Phase 3 Start
3 out of 3
UL3 Comparator &
UL3 > U1> Trip ST1
OR
Output
START Logic TR1L1
Step 1
MaxVoltSelect t1 TRIP
or tReset1
ResetTypeCrv1 TR1L3
OR TR1
Comparator ST2L1
UL1 > U2> Phase 1
Voltage Phase
Selector ST2L2
Comparator OpMode2 Phase 2
UL2 > U2> 1 out of 3
2 outof 3 ST2L3
Phase 3 Start
3 out of 3
Comparator &
UL3 > U2> Trip ST2
OR
Output
START Logic TR2L1
Step 2
MaxVoltSelect t2 TRIP
or tReset2
ResetTypeCrv2 TR2L3
TR2
OR
START
OR
TRIP
OR
en05000013.vsd
Figure 188: Schematic design of the TimeOverVoltage function
366
Voltage protection
2.3 Function block
TOV1-
OV2PTOV_59
U3P TRIP
BLOCK TR1
BLKTR1 TR1L1
BLKST1 TR1L2
BLKTR2 TR1L3
BLKST2 TR2
TR2L1
TR2L2
TR2L3
START
ST1
ST1L1
ST1L2
ST1L3
ST2
ST2L1
ST2L2
ST2L3
en06000277.vsd
Figure 189: TOV function block

Table 200: Input signals for the OV2PTOV_59 (TOV1-) function block
Signal Description
U3P Group signal for three phase voltage input
Table 201: Output signals for the OV2PTOV_59 (TOV1-) function block
Signal Description
TRIP Trip
367
Voltage protection
Signal Description

Table 202: Basic general settings for the OV2PTOV_59 (TOV1-) function
ConnType PhG - PhG - TBD
PhPh
PhG RMS
PhPh RMS
Table 203: Basic parameter group settings for the OV2PTOV_59 (TOV1-) function
On
On 1
Inverse curve B
Inverse curve C
Prog. inv. curve
U1> 1 - 200 1 120 %UB Voltage setting/start val

(DT & IDMT) in % of
UBase, step 1
step 1
368
Voltage protection

step 1
of UBase, step 1
On 2
Inverse curve B
Inverse curve C
Prog. inv. curve

(DT & IDMT) in % of
UBase, step 2
step 2
step 2
of UBase, step 2
Table 204: Advanced parameter group settings for the OV2PTOV_59 (TOV1-) function
step 1
Linearly decreased
(s), step 1
tomer programmable
curve for step 1
tomer programmable
curve for step 1
369
Voltage protection

tomer programmable
curve for step 1
tomer programmable
curve for step 1
tomer programmable
curve for step 1
over voltage IDMT curve,
step 1
step 2
Linearly decreased
(s), step 2
tomer programmable
curve for step 2
tomer programmable
curve for step 2
tomer programmable
curve for step 2
tomer programmable
curve for step 2
tomer programmable
curve for step 2
step 2
370
Voltage protection
2.6 Technical data

Table 205: Two step overvoltage protection (POVM, 59)
Operate voltage, low and high (1-200)% of Ubase ± 1.0% of Ur at U < Ur
step
± 1.0% of U at U > Ur
Absolute hysteresis (0–100)% of Ubase ± 1.0% of Ur at U < Ur
± 1.0% of U at U > Ur
Definite time delays (0.000-60.000) s ± 0.5% ± 10 ms
Minimum operate time, Inverse (0.000-60.000) s ± 0.5% ± 10 ms
characteristics
371
Two step residual overvoltage Chapter 7
protection (PTOV, 59N) Voltage protection
3 Two step residual overvoltage

protection (PTOV, 59N)
Function block name: TRVx- IEC 60617 graphical symbol:

ANSI number: 59N
ROV2PTOV 3U0
3.1 Introduction
Residual voltages will occur in the power system during earth faults.
The function can be configured to calculate the residual voltage from the three phase voltage in-
put transformers or from a single phase voltage input transformer fed from an open delta or neu-
tral point voltage transformer.
The function has two voltage steps, each with inverse or definite time delayed.

The two-step residual overvoltage protection function (TRV) is used to detect high single-phase
voltage, such as high residual voltage, also called 3U0. The residual voltage can be measured
directly from a voltage transformer in the neutral of a power transformer or from a three-phase
voltage transformer, where the secondary windings are connected in an open delta. Another pos-
sibility is to measure the three phase voltages and internally in the protection terminal calculate
the corresponding residual voltage and connect this calculated residual voltage to the TRV func-
tion block. The function has two steps with separate time delays. If the single-phase (residual)
voltage remains above the set value for a time period corresponding to the chosen time delay,
the corresponding trip signal is issued. The time delay characteristic is individually chosen for
the two steps and can be either definite time delay or inverse time delay
The voltage related settings are made in percent of the base voltage, which is set in kV,
phase-phase.

The residual voltage is measured continuously, and compared with the set values, U1> and U2>.
3.2.2 Time delay

MT). For the inverse time delay four different modes are available; inverse curve A, inverse
curve B, inverse curve C, and a programmable inverse curve.
372
TD
t=
⎜ ⎟
⎝ Vpickup ⎠
(Equation 82)
k ⋅ 480
t=
U −U >
2.0
⎛ ⎞
⎜ 32 ⋅ − 0.5 ⎟ − 0.035
⎝ U> ⎠
(Equation 83)
The type C curve is described as:
k ⋅ 480
t=
U −U >
3.0
⎛ ⎞
⎜ 32 ⋅ − 0.5 ⎟ − 0.035
⎝ U> ⎠
(Equation 84)
k⋅A
t= +D
⎛ U −U >
p
⎞
⎜B⋅ −C⎟
⎝ U> ⎠
TD ⋅ A
t= +D
P
⎜B⋅ −C⎟
⎝ Vpickup ⎠
(Equation 85)
for this phenomenon. In the voltage interval U> up to U> *(1.0 + CrvSatn/100) the used voltage
will be: U> *(1.0 + CrvSatn/100). If the programmable curve is used this parameter must be cal-
culated so that:
373
CrvSatn
B⋅ −C > 0
100
(Equation 86)
The details of the different inverse time characteristics are shown in chapter 3 "Inverse charac-
teristics".
Trip signal issuing requires that the residual overvoltage condition continues for at least the user
set time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and
by some special voltage level dependent time curves for the inverse time mode (IDMT). If the
start condition, with respect to the measured voltage ceases during the delay time, and is not ful-
filled again within a user defined reset time (tReset1 and tReset2 for the definite time and
tIReset1 and tIReset2 for the inverse time) the corresponding start output is reset, after that the
defined reset time has elapsed. Here it should be noted that after leaving the hysteresis area, the
start condition must be fulfilled again and it is not sufficient for the signal to only return back to
the hysteresis area. It is also remarkable that for the overvoltage function the IDMT reset time
is constant and does not depend on the voltage fluctuations during the drop-off period. However,
there are three ways to reset the timer, either the timer is reset instantaneously, or the timer value
is frozen during the reset time, or the timer value is linearly decreased during the reset time. See
figure 191 and figure 192.
374
tReset
1
tReset1
Voltage
START
TRIP
U1>
Hysteresis
Measured
Voltage
Time
START t1
TRIP
Time
Integrator Linear Decrease
Froozen Timer
t1
Instantaneous Time
Figure 190: Voltage profile not causing a reset of the start signal for step 1, and definite time
delay
375
tReset1
Voltage tReset1
START TRIP
START
Hysteresis
U1>
Measured Voltage
Time
START t1
TRIP
Time Integrator
Froozen Timer
t1
Time
Instantaneous
Linear Decrease en05000020.vsd
Reset
Figure 191: Voltage profile causing a reset of the start signal for step 1, and definite time delay
3.2.3 Blocking
The residual overvoltage function can be partially or totally blocked, by binary input signals
where:
376

BLKST1: blocks all startrip outputs related to step 1
BLKST2: blocks all start and trip inputs related to step 2
3.2.4 Design
The voltage measuring elements continuously measure the residual voltage. Recursive Fourier
filters filter the input voltage signal. The single input voltage is compared to the set value, and
is also used for the inverse time characteristic integration. The design of the TRV function is
schematically described in figure 193.
UN Comparator Phase 1 ST1

UN > U1>
TR1
START Start
&
Trip
Time integrator Output
t1 Logic
TRIP
tReset1
ResetTypeCrv1 Step 1
ST2
Comparator Phase 1
UN > U2> TR2
Start
START &
Trip START
Output OR
Time integrator
Logic
t2 TRIP
tReset2
Step 2
ResetTypeCrv2 TRIP
OR
en05000748.vsd
Figure 192: Schematic design of the TRV function
377
3.3 Function block
TRV1-
ROV2PTOV_59N
U3P TRIP
BLOCK TR1
BLKTR1 TR2
BLKST1 START
BLKTR2 ST1
BLKST2 ST2
en06000278.vsd
Figure 193: TRV function block

Table 206: Input signals for the ROV2PTOV_59N (TRV1-) function block
Signal Description
U3P Three phase voltages
Table 207: Output signals for the ROV2PTOV_59N (TRV1-) function block
Signal Description
TRIP Trip
378

Table 208: Basic parameter group settings for the ROV2PTOV_59N (TRV1-) function
On
On 1
Inverse curve B
Inverse curve C
Prog. inv. curve
(DT & IDMT), step 1 in %
of UBase
step 1
step 1
of UBase, step 1
On 2
Inverse curve B
Inverse curve C
Prog. inv. curve
(DT & IDMT), step 2 in %
of UBase
step 2
step 2
of UBase, step 2
379
Table 209: Advanced parameter group settings for the ROV2PTOV_59N (TRV1-) function
step 1
Linearly decreased
(s), step 1
tomer programmable
curve for step 1
tomer programmable
curve for step 1
tomer programmable
curve for step 1
tomer programmable
curve for step 1
tomer programmable
curve for step 1
step 1
tReset2 0.000 - 60.000 0.001 0.025 s Time delay in DT reset
(s), step 2
Linearly decreased
(s), step 2
tomer programmable
curve for step 2
380

tomer programmable
curve for step 2
tomer programmable
curve for step 2
tomer programmable
curve for step 2
tomer programmable
curve for step 2
step 2
3.6 Technical data

Table 210: Two step residual overvoltage protection (PTOV, 59N)
Operate voltage, low and high (1-200)% of Ubase ± 1.0% of Ur at U < Ur
step ± 1.0% of U at U > Ur
Absolute hysteresis (0–100)% of Ubase ± 1.0% of Ur at U < Ur
± 1.0% of U at U > Ur
Definite time setting (0.000–60.000) s ± 0.5% ± 10 ms
Minimum operate time (0.000-60.000) s ± 0.5% ± 10 ms
381
Overexcitation protection (PVPH, 24) Chapter 7
Voltage protection
4 Overexcitation protection (PVPH, 24)
Function block name: OEXx- IEC 60617 graphical symbol:

ANSI number: 24
U/f >
OEXPVPH
4.1 Introduction
When the laminated core of a power transformer or generator is subjected to a magnetic flux
density beyond its design limits, stray flux will flow into non-laminated components not de-
signed to carry flux and cause eddy currents to flow. The eddy currents can cause excessive heat-
ing and severe damage to insulation and adjacent parts in a relatively short time. Function has
settable inverse operating curve and independent alarm stage.

The importance of overexcitation protection is growing as the power transformers as well as oth-
er power system elements today operate most of the time near their designated limits.
Modern design transformers are more sensitive to overexcitation than earlier types. This is a re-
sult of the more efficient designs and designs which rely on the improvement in the uniformity
of the excitation level of modern systems. Thus, if emergency that includes overexcitation does
occur, transformers may be damaged unless corrective action is promptly taken. Transformer
manufacturers recommend an overexcitation protection as a part of the transformer protection
system.
Overexcitation results from excessive applied voltage, possibly in combination with below-nor-
mal frequency. Such condition may occur when a unit is on load, but are more likely to arise
when it is on open circuit, or at a loss of load occurrence. Transformers directly connected to
generators are in particular danger to experience overexcitation condition. It follows from the
fundamental transformer equation, see equation 87, that peak flux density Bmax is directly pro-
portional to induced voltage E, and inversely proportional to frequency f, and turns n.
E = 4.44 ⋅ f ⋅ n ⋅ B max ⋅ A
(Equation 87)
The relative excitation M (relative V/Hz) is therefore according to equation 88.
E⁄f
M = relative ⎛⎝ -------⎞⎠ = ------------------------
V
Hz ( Ur ) ⁄ ( fr )
(Equation 88)
382
Voltage protection
Disproportional variations in quantities E and f may give rise to core overfluxing. If the core flux
density Bmax increases to a point above saturation level (typically 1.9 Tesla), the flux will no
longer be contained within the core only but will extend into other (non-laminated) parts of the
power transformer and give rise to Eddy current circulations. Overexcitation will result in:
• overheating of the non-laminated metal parts,

• a large increase in magnetizing currents,
• an increase in core and winding temperature,
• an increase in transformer vibration and noise.
Protection against overexcitation is based on calculation of the relative Volts per Hertz (V / Hz)
ratio. The action of the protection is usually to initiate a reduction of excitation and, if this should
fail, or is not possible, to trip the transformer after a delay which can be from seconds to minutes,
typically 5 - 10 seconds.
Overexcitation protection may be of particular concern on directly connected generator unit

transformers. Directly connected generator-transformers are subjected to a wide range of fre-
quencies during the acceleration and deceleration of the turbine. In such cases, the overexcita-
tion protection may trip the field breaker during a start-up of a machine, by means of the
overexcitation ALARM signal from the transformer terminal. If this is not possible, the power
transformer can be disconnected from the source, after a delay, by the TRIP signal.
The IEC 60076 - 1 standard requires that transformers shall be capable of operating continuously
at 10% above rated voltage at no load, and rated frequency. At no load, the ratio of the actual
generator terminal voltage to the actual frequency should not exceed 1.1 times the ratio of trans-
former rated voltage to the rated frequency on a sustained basis, see equation 89.
E
---- ≤ 1.1 ⋅ Ur
------
f fr
(Equation 89)
or equivalently, with 1.1 · Ur = V/Hz> according to equation 90.
E V/Hz>
---- ≤ ---------------------
f fr
(Equation 90)
where:
V/Hz> is the maximum continuously allowed voltage at no load, and rated frequency.
V/Hz> is an OEX setting parameter. The setting range is 100% to 150%. If the user does not
know exactly what to set, then the standard IEC 60076 - 1, section 4.4, the default value V/Hz>
= 1.10 pu shall be used.
In OEX protection function the relative excitation M (relative V/Hz) is expressed according to
equation 91.
383
Voltage protection
E⁄f
M = relative ⎛⎝ -------⎞⎠ = --------------
V
Hz Ur ⁄ fr
(Equation 91)
It is clear from the above formula that, for an unloaded power transformer, M = 1 for any E and
f, where the ratio E / f is equal to Ur / fr. A power transformer is not overexcited as long as the
relative excitation is M ≤ V/Hz>, V/Hz> expressed in %. The relative overexcitation is thus de-
fined as shown in equation 92.
overexcitation = M – V/Hz>
(Equation 92)
The overexcitation protection algorithm is fed with an input voltage U which is in general not
the induced voltage E from the fundamental transformer equation. For no load condition, these
two voltages are the same, but for a loaded power transformer the internally induced voltage E
may be lower or higher than the voltage U which is measured and fed to OEX, depending on the
direction of the power flow through the power transformer, the power transformer side where
OEX is applied, and the power transformer leakage reactance of the winding. It is important to
specify on the OEX function block in CAP 531 configuration tool worksheet on which side of
the power transformer OEX is placed
As an example, at a transformer with a 15% short circuit impedance Xsc, the full load, 0.8 power
factor, 105% voltage on the load side, the actual flux level in the transformer core, will not be
significantly different from that at the 110% voltage, no load, rated frequency, provided that the
short circuit impedance X can be equally divided between the primary and the secondary wind-
ing: Xleak = Xleak1 = Xleak2 = Xsc / 2 = 0.075 pu..
OEX calculates the internal induced voltage E if Xleak (meaning the leakage reactance of the
winding where OEX is connected) is known to the user. The assumption taken for 2-winding
power transformers that Xleak = Xsc / 2 is unfortunately most often not true. For a 2-winding
power transformer the leakage reactances of the two windings depend on how the windings are
located on the core with respect to each other. In the case of three-winding power transformers
the situation is still more complex. If a user has the knowledge on the leakage reactance, then it
should applied. If a user has no idea about it, Xleak can be set to Xc/2. The OEX protection will
then take the given measured terminal voltage U, as the induced voltage E.
It is assumed that overexcitation is a symmetrical phenomenon, caused by events such as loss of

load, etc. It will be observed that a high phase-to-earth voltage does not mean overexcitation.
For example, in an unearthed power system, a single-phase-to-earth fault means high voltages
of the “healthy” two phases to earth, but no overexcitation on any winding. The phase-to-phase
voltages will remain essentially unchanged. The important voltage is the voltage between the
two ends of each winding.
384
Voltage protection
4.2.1 Measured voltage

If one phase-to-phase voltage is available from the side where OEX protection is applied, then
OEX protection function block shall be set to measure this voltage, MeasuredU. The particular
voltage which is used determines the two currents that must be used.This must be chosen with
the setting MeasuredI.
Note!
It is extremely important that MeasuredU and MeasuredI is set to same value!
If, for example, voltage Uab is fed to OEX, then currents Ia, and Ib must be applied, etc. From
these two input currents, current Iab = Ia - Ib is calculated internally by the OEX protection al-
gorithm. The phase-to-phase voltage must be higher than 70% of the rated value, otherwise the
OEX protection algorithm is exited without calculating the excitation. ERROR output is set to
1, and the displayed value of relative excitation V / Hz shows 0.000.
If three phase-to-earth voltages are available from the side where OEX is connected, then OEX
protection function block shall be set to measure positive sequence voltage. In this case the pos-
itive sequence voltage and the positive sequence current are used by OEX protection. A check
is made within OEX protection if the positive sequence voltage is higher than 70% rated
phase-to-earth voltage; below this value, OEX is exited immediately, and no excitation is calcu-
lated. ERROR output is set to 1, and the displayed value of relative excitation V / Hz shows
0.000.
The frequency value is received from the pre-processing block. The function is in operation for
frequencies within the range of 33-60 Hz and of 42-75 Hz for 50 and 60 Hz respectively.
• OEX protection function can be connected to any power transformer side, inde-
pendent from the power flow.
• The side with a possible On-Load-Tap-Changer (OLTC) must not be used.
4.2.2 Operate time of the overexcitation protection.

The operate time of the overexcitation protection is a function of the relative overexcitation. Ba-
sically there are two different delay laws available to choose between:
• the so called IEEE law, and

• a tailor-made law.
The so called IEEE law approximates a square law and has been chosen based on analysis of the
various transformers’ overexcitation capability characteristics. They can match well a trans-
former core capability.
The square law is according to equation 93.
385
Voltage protection
0.18 ⋅ k 0.18 ⋅ k
t o p = --------------------------------------------
2
- = ---------------------------------------
-
2
( M – V/Hz> ) overexcitation
(Equation 93)
where:
M is excitation, mean value in the interval from t = 0 to t = top
V/Hz> is maximum continuously allowed voltage at no load, and rated frequency, in pu and
k is time multiplier setting for inverse time functions, see figure 196.
Parameter k (“time multiplier setting”) selects one delay curve from the family of curves.
An analog overexcitation relay would have to evaluate the following integral expression, which
means to look for the instant of time t = top according to equation 94.
t op
2
∫ ( M(t) – V/Hz> ) dt ≥ 0.18 ⋅ k
0
(Equation 94)
A digital, numerical relay will instead look for the lowest j (i.e. j = n) where it becomes true that:
∑ ( M(j) –
2
Δt ⋅ V/Hz> ) ≥ 0.18 ⋅ k
j=k
(Equation 95)
where:
Δt is the time interval between two successive executions of overexcitation function
and
M(j) - V/Hz> is the relative excitation at (time j) in excess of the normal (rated) excitation which
is given as Ur/fr.
As long as M > V/Hz> (i.e. overexcitation condition), the above sum can only be larger with
time, and if the overexcitation persists, the protected transformer will be tripped at j = n.
Inverse delays as per figure 196, can be modified (limited) by two special definite delay settings,
namely tMax and tMin, see figure 195.
386
Voltage protection
delay in s
tMax
under - inverse delay law

excitation
overexcitation
tMin
0 M max - V/Hz> Overexcitation M-V/Hz>
M=V/Hz> M max Excitation M
V/Hz> Emax E (only if f = fr = const)
99001067.vsd
Figure 194: Restrictions imposed on inverse delays by tMax, and tMin
A definite maximum time, tMax, can be used to limit the operate time at low degrees of overex-
citation. Inverse delays longer than tMax will not be allowed. In case the inverse delay is longer
than tMax, OEX trips after tMaxt_MaxTripDelay seconds.
A definite minimum time, tMin, can be used to limit the operate time at high degrees of overex-
citation. In case the inverse delay is shorter than tMin, OEX function trips after
tMint_MinTripDelay seconds. Also, the inverse delay law is no more valid beyond excitation
Mmax. Beyond Mmax (beyond overexcitation Mmax - V/Hz>), the delay will always be tMin,
no matter what overexcitation.
387
Voltage protection
Time (s) IEEE OVEREXCITATION CURVES
1000
100
k = 60
k = 20
k = 10
10 k=9
k=8
k=7
k=6
k=5
k=4
k=3
k=2
k=1
1
1 2 3 4 5 10 20 30 40
OVEREXCITATION IN % (M-Emaxcont)*100)
en01000373.vsd
Figure 195: Delays inversely proportional to the square of the overexcitation.
The critical value of excitation Mmax is determined indirectly via OEX protection function set-
ting V/Hz>>. V/Hz>> can be thought of as a no-load-rated-frequency voltage, where the inverse
law should be replaced by a short definite delay, tMin. If, for example, V/Hz>> = 140 %, then
Mmax is according to equation 96.
(V/Hz>>) ⁄ f
Mmax = -------------------------
- = 1.40
Ur ⁄ fr
(Equation 96)
388
Voltage protection
The Tailor-Made law allows a user to design an arbitrary delay characteristic. In this case the
interval between M = V/Hz>, and M = Mmax is automatically divided into five equal subinter-
vals, with six delays. (settings t1, t2, t3, t4, t5, and t6) as shown in the figure 197. These times
should be set so that t1 => t2 => t3 => t4 => t5 => t6.
delay in s
tMax
under- tMin
excitation Overexcitation M-Emaxcont
0 Mmax - Emaxcont Excitation M
Emaxcont Mmax
99001068.vsd
Figure 196: An example of a Tailor-Made delay characteristic
Delays between two consecutive points, for example t3 and t4, are obtained by linear interpola-
tion.
Should it happen that tMax be lower than, for example, delays t1, and t2, the actual delay would
be tMax. Above Mmax, the delay can only be tMin.
4.2.3 Cooling
The overexcitation protection OEX is basically a thermal protection; therefore a cooling process
has been introduced. Exponential cooling process is applied. Parameter Tcool is an OEX setting,
with a default time constant tCooling of 20 minutes. This means that if the voltage and frequency
return to their previous normal values (no more overexcitation), the normal temperature is as-
sumed to be reached not before approximately 5 times tCooling minutes. If an overexcitation
condition would return before that, the time to trip will be shorter than it would be otherwise.
4.2.4 OEX protection function measurands

A service value data item called Time to trip, and designated on the display by tTRIP is available
in seconds on the local HMI, or monitoring tool. This value is an estimation of the remaining
time to trip if the overexcitation remained on the level it had when the estimation was done. This
information can be useful with small or moderate overexcitations. If the overexcitation is so low
that the valid delay is tMax, then the estimation of the remaining time to trip is done against
tMax.
The displayed relative excitation M, designated on the display by V/Hz is calculated from the
expression:
389
Voltage protection
E⁄f
M = relative ⎛ -------⎞ = --------------
V
⎝ Hz⎠ Uf ⁄ fr
(Equation 97)
If less than V / Hz = V/Hz> (in pu) is shown on the HMI display (or read via SM/RET521), the
power transformer is underexcited. If the value of V/Hz is shown which is equal to V/Hz> (in
pu), it means that the excitation is exactly equal to the power transformer continuous capability.
If a value higher than the value of V/Hz> is shown, the protected power transformer is overex-
cited. For example, if V/Hz = 1.100 is shown, while V/Hz> = 110 %, then the power transformer
is exactly on its maximum continuous excitation limit.
The third item of the OEX protection service report is the thermal status of the protected power
transformer iron core, designated on the display by ThermalStatus. This gives the thermal status
in % of the trip value which corresponds to 100%. Thermal Status should reach 100% at the
same time, when tTRIP reaches 0 seconds. If the protected power transformer is then for some
reason not switched off, the ThermalStaus shall go over 100%.
If the delay as per IEEE law, or Tailor-made Law, is limited by tMax, and/or TMin, then the
Thermal Status will generally not reach 100% at the same time, when tTRIP reaches 0 seconds.
For example, if, at low degrees of overexcitation, the very long delay is limited by tMax, then
the OEX TRIP output signal will be set to 1 before the Thermal status reaches 100%.
4.2.5 Overexcitation alarm

A separate step, AlarmLevel, is provided for alarming purpose. The voltages are normally set
2% lower and has a definite time delay, tAlarm. This will give the operator an early abnormal
voltages warning.
390
Voltage protection
OVEX: FS = 1 = 2*SI + SU
BLOCK AlarmLevel
ALARM
SIDE t>tAlarm &
t
Prepool I tAlarm
M>V/Hz>
SI1 t>tMin TRIP
t &
V/Hz> tMin
SI2 Calculation
Ei k
of internal M= M
induced (Ei / f) M IEEE law
SU1 voltage Ei (Ur / fr)
Prepool O ≥1
2 M t
Tailor-made law
M>V/Hz>> tMax
Xleak
ERROR
V/Hz>>
M = relative V/Hz as service value
en05000162.vsd
Figure 197: A logic diagram over Overexcitation protection function.
4.2.6 Logic diagram
Figure 198: A simplified diagram of the OEX protection function
391
Voltage protection
Simplification of the diagram is in the way the IEEE and Tailor-made delays are calculated. The
cooling process is not shown. It is not shown that voltage and frequency are separately checked
against their respective limit values.
4.3 Function block
OEX1-
OEXPVPH_24
I3P TRIP
U3P START
BLOCK ALARM
RESET
en05000329.vs
d
Figure 199: OEX function block

Table 211: Input signals for the OEXPVPH_24 (OEX1-) function block
Signal Description
U3P Voltage connection
RESET Reset operation
Table 212: Output signals for the OEXPVPH_24 (OEX1-) function block
Signal Description
TRIP Trip from overexcitation function
START Overexcitation above set operate level (instantaneous)
ALARM Overexcitation above set alarm level (delayed)

Table 213: Basic general settings for the OEXPVPH_24 (OEX1-) function
MeasuredU PosSeq - L1L2 - Selection of measured
L1L2 voltage
L2L3
L3L1
MeasuredI L1L2 - L1L2 - Selection of measured
L2L3 current
L3L1
PosSeq
392
Voltage protection
Table 214: Basic parameter group settings for the OEXPVPH_24 (OEX1-) function
On
IBase 1 - 99999 1 3000 A Base current (rated
phase current) in A
UBase 0.05 - 2000.00 0.05 400.00 kV Base voltage (main volt-
age) in kV
V/Hz> 100.0 - 180.0 0.1 110.0 %UB/f Operate level of V/Hz at
no load and rated freq in
% of (Ubase/frated)
V/Hz>> 100.0 - 200.0 0.1 140.0 %UB/f High level of V/Hz above
which tMin is used, in %
of (Ubase/frated)
XLeak 0.000 - 200.000 0.001 0.000 ohm Winding leakage reac-
tance in primary ohms
TrPulse 0.000 - 60.000 0.001 0.100 s Length of the pulse for
trip signal (in sec)
tMin 0.000 - 60.000 0.001 7.000 s Minimum trip delay for
V/Hz inverse curve, in
sec
tMax 0.00 - 9000.00 0.01 1800.00 s Maximum trip delay for
V/Hz inverse curve, in
sec
tCooling 0.10 - 9000.00 0.01 1200.00 s Transformer magnetic
core cooling time con-
stant, in sec
CurveType IEEE - IEEE - Inverse time curve selec-
Tailor made tion, IEEE/Tailor made
kForIEEE 1 - 60 1 1 - Time multiplier for IEEE
inverse type curve
AlarmLevel 50.0 - 120.0 0.1 100.0 % Alarm operate level as %
of operate level
tAlarm 0.00 - 9000.00 0.01 5.00 s Alarm time delay, in sec
393
Voltage protection
Table 215: Advanced parameter group settings for the OEXPVPH_24 (OEX1-) function
t1Tailor 0.00 - 9000.00 0.01 7200.00 s Time delay t1 (longest)
for tailor made curve, in
sec
t2Tailor 0.00 - 9000.00 0.01 3600.00 s Time delay t2 for tailor
made curve, in sec
made curve, in sec
made curve, in sec
made curve, in sec
t6Tailor 0.00 - 9000.00 0.01 225.00 s Time delay t6 (shortest)
for tailor made curve, in
sec
4.6 Technical data

Table 216: Overexcitation protection (PVPH, 24)
Operate value, start (100–180)% of (Ubase/frated) ± 1.0% of U
Operate value, alarm (50–120)% of start level ± 1.0% of Ur at U ≤ Ur
± 1.0% of U at U > Ur
Operate value, high level (100–200)% of (Ubase/frated) ± 1.0% of U
Curve type IEEE or customer defined Class 5 + 40 ms
(0.18 ⋅ k )
IEEE : t =
( M − 1) 2
where M = relative (V/Hz) =
(E/f)/(Ur/fr)
Minimum time delay for inverse (0.000–60.000) s ± 0.5% ± 10 ms
function
Maximum time delay for inverse (0.00–9000.00) s ± 0.5% ± 10 ms
function
Alarm time delay (0.000–60.000) s ± 0.5% ± 10 ms
394
Voltage differential protection (PTOV, 60) Chapter 7
Voltage protection
5 Voltage differential protection (PTOV, 60)
Function block name: VDC IEC 60617 graphical symbol:

ANSI number: 60
VDCPTOV
5.1 Introduction
A voltage differential monitoring function is available. It compares the voltages from two three
phase sets of voltage transformers and has one sensitive alarm step and one trip step. It can be
used to supervise the voltage from two fuse groups or two different voltage transformers fuses
as a fuse/MCB supervision function.

The function is based on comparison of the amplitudes of the two voltages connected in each
phase. Possible differences between the ratios of the two Voltage/Capacitive voltage transform-
ers can be compensated for with a ratio correction factors RFLx The voltage difference is eval-
uated and if it exceeds the alarm level UDAlarm or trip level UDTrip signals for alarm (ALARM
output) or trip (TRIP output) is given after definite time delay tAlarm respectively tTrip. The
two three phase voltage supplies are also supervised with undervoltage settings U1Low and
U2Low. The outputs for loss of voltage U1LOW resp U2LOW will be activated. The U1 voltage
is supervised for loss of individual phases whereas the U2 voltage is supervised for loss of all
three phases.
Loss of one U1or all U2 voltages will block the differential measurement. This blocking can be
switched off with setting BlkDiffAtULow=No.
The function can be blocked from an external condition with the binary BLOCK input. It can
e.g. be activated from a fuse failure supervision function block.
To allow easy commissioning the measured differential voltage is available as service value.
This allows simple setting of the ratio correction factor to achieve full balance in normal service.
The principle logic diagram is shown in figure 201.
395
Voltage protection
UDTripL1>
AND
UDTripL1> O tReset tTrip

AND
R t t
AND TRIP
UDTripL1>
AND
AND START
UDAlarmL1>
AND
UDAlarmL1> O tAlarm
AND
R t AND ALARM
UDAlarmL1>
AND
U1<L1
tAlarm
U1<L2 OR t U1LOW
AND
AND
U1<L3
OR
BlkDiffAtULow
U2<L1
t1
U2<L2 AND t U2LOW
AND
U2<L3
BLOCK
en06000382.vsd
Figure 200: Principle logic for voltage differential function
396
Voltage protection
5.3 Function block
VDC1-
VDCPTOV_60
U3P1 TRIP
U3P2 START
BLOCK ALARM
U1LOW
U2LOW
UL1DIFF
UL2DIFF
UL3DIFF
en06000528.vsd
Figure 201: VDC function block

Table 217: Input signals for the VDCPTOV_60 (VDC1-) function block
Signal Description
U3P1 Bus voltage
U3P2 Capacitor voltage
Table 218: Output signals for the VDCPTOV_60 (VDC1-) function block
Signal Description
TRIP Voltage differential protection operated
START Start of voltage differential protection
ALARM Voltage differential protection alarm
U1LOW Loss of U1 voltage
U2LOW Loss of U2 voltage
UL1DIFF Differential Voltage phase L1
397
Voltage protection

Table 219: Basic parameter group settings for the VDCPTOV_60 (VDC1-) function
On
BlkDiffAtULow No - Yes - Block operation at low
Yes voltage
UDTrip 0.0 - 100.0 0.1 5.0 %UB Operate level, in % of
UBase
tTrip 0.000 - 60.000 0.001 1.000 s Time delay for voltage
differential operate, in
milliseconds
tReset 0.000 - 60.000 0.001 0.000 s Time delay for voltage
differential reset, in sec-
onds
U1Low 0.0 - 100.0 0.1 70.0 %UB Input 1 undervoltage
level, in % of UBase
U2Low 0.0 - 100.0 0.1 70.0 %UB Input 2 undervoltage
level, in % of UBase
tBlock 0.000 - 60.000 0.001 0.000 s Reset time for undervolt-
age block
UDAlarm 0.0 - 100.0 0.1 2.0 %UB Alarm level, in % of
UBase
tAlarm 0.000 - 60.000 0.001 2.000 s Time delay for voltage
differential alarm, in sec-
onds
Table 220: Advanced parameter group settings for the VDCPTOV_60 (VDC1-) function
RFL1 0.000 - 3.000 0.001 1.000 - Ratio compensation fac-
tor phase L1
UCap*RFL1=UL1Bus
tor phase L2
UCap*RFL2=UL2Bus
tor phase L3
UCap*RFL3=UL3Bus
398
Voltage protection
5.6 Technical data

Table 221: Voltage differential protection (PTOV)
Voltage difference for alarm and (0.0–100.0) % of Ubase ± 0.5 % of Ur
trip
Under voltage level (0.0–100.0) % of Ubase ± 0.5% of Ur
Timers (0.000–60.000)s ± 0.5% ± 10 ms
399
Loss of voltage check (PTUV, 27) Chapter 7
Voltage protection
6 Loss of voltage check (PTUV, 27)
Function block name: LOV IEC 60617 graphical symbol:

ANSI number: 27
LOVPTUV
6.1 Introduction
The loss of voltage detection, (PTUV, 27), is suitable for use in networks with an automatic Sys-
tem restoration function. The function issues a three-pole trip command to the circuit breaker, if
all three phase voltages fall below the set value for a time longer the set time and the circuit
breaker remains closed.

The operation of LOVPTUV function is based on line voltage measurement. The function is pro-
vided with a logic, which automatically recognises if the line was restored for at least tRestore
before starting the tTrip timer. All three phases are required to be low before the output TRIP
is activated. Start is available on output START.
Additionally, the function is automatically blocked if only one or two phase voltages have been
detected low for more than tBlock.
The LOVPTUV function operates again only if the line has been restored to full voltage for at
least tRestore. Operation of the function is also inhibited by fuse failure and open circuit breaker
information signals, by their connection to dedicated inputs of the function block.
Due to undervoltage conditions being continuous the trip pulse is limited to a length set by set-
ting tPulse.
The operation of the function is supervised by the fuse-failure function (VTSU input) and the
information about the open position (CBOPEN) of the associated circuit breaker.
The BLOCK input can be connected to a binary input of the terminal in order to receive a block
command from external devices or can be software connected to other internal functions of the
terminal itself in order to receive a block command from internal functions. The function is also
blocked when the IED is in TEST status and the function has been blocked from the HMI test
menu. (BlockLOV=Yes).
400
Voltage protection
LOV - LOSS OF VOLTAGE CHECK FUNCTION

TEST
TEST-ACTIVE
&
BlockLOV = Yes
LOV-START
LOV--BLOCK >1
Function Enable tTrip tPulse LOV–TRIP
STUL1N & t
STUL2N &
only 1 or 2 phases are low for
Latched at least 10 s (not three)
STUL3N Enable
&
tBlock
>1 t
LOV--CBOPEN Reset Enable

>1
&
LOV--VTSU
tRestore
>1 Set Enable
t
>1
Line restored for
at least 3 s
en07000089.vsd
Figure 202: Simplified diagram of loss of voltage check protection function
401
Voltage protection
6.3 Function block
LOV1-
LOVPTUV_27
U3P TRIP
BLOCK START
CBOPEN
VTSU
en07000039.vsd
Figure 203: LOV function block

Table 222: Input signals for the LOVPTUV_27 (LOV1-) function block
Signal Description
BLOCK Block the all outputs
CBOPEN Circuit breaker open
VTSU Block from voltage circuit supervision
Table 223: Output signals for the LOVPTUV_27 (LOV1-) function block
Signal Description
TRIP Trip signal
START Start signal

Table 224: Basic parameter group settings for the LOVPTUV_27 (LOV1-) function
On
UPE 1 - 100 1 70 %UB Operate voltagein% of
base voltage Ubase
tTrip 0.000 - 60.000 0.001 7.000 s Operate time delay
402
Voltage protection
Table 225: Advanced parameter group settings for the LOVPTUV_27 (LOV1-) function
tPulse 0.050 - 60.000 0.001 0.150 s Duration of TRIP pulse
tBlock 0.000 - 60.000 0.001 5.000 s Time delay to block when
all 3ph voltages are not
low
tRestore 0.000 - 60.000 0.001 3.000 s Time delay for enable the
function after restoration
403
Voltage protection
404
Frequency protection
Chapter 8 Frequency
protection
About this chapter

This chapter describes the frequency protection functions. The way the functions work, their set-
ting parameters, function blocks, input and output signals and technical data are included for
each function.
405
Underfrequency protection (PTUF, 81) Chapter 8
1 Underfrequency protection (PTUF, 81)
Function block name: TUFx- IEC 60617 graphical symbol:

ANSI number: 81
f<
SAPTUF
1.1 Introduction
Underfrequency occurs as a result of lack of generation in the network.
The function can be used for load shedding systems, remedial action schemes, gas turbine
start-up etc.
The function is provided with an undervoltage blocking. The operation may be based on single
phase, phase-to-phase or positive sequence voltage measurement.

The underfrequency (TUF) function is used to detect low power system frequency. The function
can either have a definite time delay or a voltage magnitude dependent time delay. If the voltage
magnitude dependent time delay is applied the time delay will be longer if the voltage is higher
and shorter if the voltage is lower. If the frequency remains below the set value for a time period
corresponding to the chosen time delay, the corresponding trip signal is issued. To avoid an un-
wanted trip due to uncertain frequency measurement at low voltage magnitude, a voltage con-
trolled blocking of the function is available, i.e. if the voltage is lower than the set blocking
voltage the function is blocked and no start or trip signal is issued.

The fundamental frequency of the measured input voltage is measured continuously, and com-
pared with the set value, StartFrequency. The frequency function is also dependent on the volt-
age magnitude. If the voltage magnitude decreases the setting IntBlkStVal, the underfrequency
function is blocked, and the output BLKDMAGN is issued. All voltage settings are made in per-
cent of the setting UBase, which should be set as a phase-phase voltage in kV.
1.2.2 Time delay

The time delay for the underfrequency function can be either a settable definite time delay or a
voltage magnitude dependent time delay, where the time delay depends on the voltage level; a
high voltage level gives a longer time delay and a low voltage level causes a short time delay.
For the definite time delay, the setting tTrip sets the time delay
406
For the voltage dependent time delay the measured voltage level and the settings UNom, UMin,
Exponent, tMax and tMin set the time delay according to figure 205 and equation 98. The setting
TimerOperation is used to decide what type of time delay to apply. The output STARTDUR,
gives the time elapsed from the issue of the start output, in percent of the total operation time
available in PST.
Trip signal issuing requires that the underfrequency condition continues for at least the user set
time delay. If the start condition, with respect to the measured frequency ceases during the delay
time, and is not fulfilled again within a user defined reset time, tReset, the start output is reset,
after that the defined reset time has elapsed. Here it should be noted that after leaving the hys-
teresis area, the start condition must be fulfilled again and it is not sufficient for the signal to
only return back to the hysteresis area.
On the output of the underfrequency function a 100 ms pulse is issued, after a time delay corre-
sponding to the setting of TimeDlyRestore, when the measured frequency returns to the level
corresponding to the setting RestoreFreq.
1.2.3 Voltage dependent time delay

Since the fundamental frequency in a power system is the same all over the system, except some
deviations during power oscillations, another criterion is needed to decide, where to take actions,
based on low frequency. In many applications the voltage level is very suitable, and in most cas-
es is load shedding preferable in areas with low voltage. Therefore, a voltage dependent time
delay has been introduced, to make sure that load shedding, or other actions, take place at the
right location. At constant voltage, U, the voltage dependent time delay is calculated according
to equation 98. At non-constant voltage, the actual time delay is integrated in a similar way as
for the inverse time characteristic for the undervoltage and overvoltage functions.
Exponent
⎡ U − UMin ⎤
t=⎢ ⋅ ( tMax − tMin ) + tMin
⎣ UNom − UMin ⎥
⎦
(Equation 98)
where:
t is the voltage dependent time delay (at constant voltage),
U is the measured voltage
Exponent is a setting,
UMin, UNom are voltage settings corresponding to
tMax, tMin are time settings.
The inverse time characteristics are shown in figure 205, for:
407
UMin = 90%
UNom = 100%
tMax = 1.0 s
tMin = 0.0 s
Exponent = 0, 1, 2, 3 and 4
1
0
1
TimeDlyOperate [s]
Exponenent
2
3
0.5 4
0
90 95 100
U [% of UBase]
en05000075.vsd
Figure 204: Voltage dependent inverse time characteristics for the underfrequency function.
The time delay to operate is plotted as a function of the measured voltage, for the
Exponent = 0, 1, 2, 3, 4 respectively.
1.2.4 Blocking
The underfrequency function can be partially or totally blocked, by binary input signals or by
parameter settings, where:

BLKTRIP: blocks the TRIP output
BLKREST: blocks the RESTORE output
If the measured voltage level decreases below the setting of IntBlkStVal, both the start and the
trip outputs, are blocked.
1.2.5 Design
The frequency measuring element continuously measures the frequency of the positive sequence
voltage and compares it to the setting StartFrequency. The frequency signal is filtered to avoid
transients due to switchings and faults. The time integrator can operate either due to a definite
408
delay time or to the special voltage dependent delay time. When the frequency has returned back
to the setting of RestoreFreq, the RESTORE output is issued after the time delay TimeDlyRe-
store. The design of the underfrequency function is schematically described in figure 206.
Block
BLOCK BLKDMAGN
OR
Comparator
U < IntBlockLevel
Voltage Time integrator

Start
TimerOperation Mode & START
Selector START
Frequency Comparator Trip
f < StartFrequency Output
TimeDlyOperate TRIP Logic
TimeDlyReset TRIP
100 ms
Comparator RESTORE
TimeDlyRestore
f > RestoreFreq
en05000726.vsd
Figure 205: Schematic design of the underfrequency function
1.3 Function block
TUF1-
SAPTUF_81
U3P TRIP
BLOCK START
BLKTRIP RESTORE
BLKREST BLKDMAGN
Frequency
en06000279.vsd
Figure 206: TUF function block
409

Table 226: Input signals for the SAPTUF_81 (TUF1-) function block
Signal Description
BLKTRIP Blocking operate output.
BLKREST Blocking restore output.
Table 227: Output signals for the SAPTUF_81 (TUF1-) function block
Signal Description
TRIP Operate/trip signal for frequency.
START Start/pick-up signal for frequency.
RESTORE Restore signal for load restoring purposes.
BLKDMAGN Blocking indication due to low amplitude.
Frequency Measured frequency

Table 228: Basic parameter group settings for the SAPTUF_81 (TUF1-) function
On
StartFrequency 35.00 - 75.00 0.01 48.80 Hz Frequency setting/start
value.
IntBlockLevel 0 - 100 1 50 %UB Internal blocking level in
% of UBase.
TimeDlyOperate 0.000 - 60.000 0.001 0.200 s Operate time delay in
over/under-frequency
mode.
TimeDlyReset 0.000 - 60.000 0.001 0.000 s Time delay for reset.
TimeDlyRestore 0.000 - 60.000 0.001 0.000 s Restore time delay.
RestoreFreq 45.00 - 65.00 0.01 50.10 Hz Restore frequency if fre-
quency is above fre-
quency value.
TimerOperation Definite timer - Definite timer - Setting for choosing timer
Volt based timer mode.
410

UNom 50 - 150 1 100 %UB Nominal voltage in % of
UBase for voltage based
timer.
UMin 50 - 150 1 90 %UB Lower operation limit in
% of UBase for voltage
based timer.
Exponent 0.0 - 5.0 0.1 1.0 - For calculation of the
curve form for voltage
based timer.
tMax 0.000 - 60.000 0.001 1.000 s Maximum time operation
limit for voltage based
timer.
tMin 0.000 - 60.000 0.001 1.000 s Minimum time operation
limit for voltage based
timer.
1.6 Technical data

Table 229: Underfrequency protection (PTUF, 81)
Operate value, start function (35.00-75.00) Hz ± 2.0 mHz
Operate time, start function 100 ms typically -
Reset time, start function 100 ms typically -
Operate time, definite time function (0.000-60.000)s ± 0.5% + 10 ms
Reset time, definite time function (0.000-60.000)s ± 0.5% + 10 ms
Voltage dependent time delay Settings: Class 5 + 200
ms
UNom=(50-150)% of Ubase
Exponent UMin=(50-150)% of Ubase
⎡ U − UMin ⎤
t=⎢ ⋅ ( tMax − tMin ) + tMin
⎣ UNom − UMin ⎥⎦ Exponent=0.0-5.0
U=Umeasured tMax=(0.000-60.000)s
tMin=(0.000-60.000)s
411
Overfrequency protection (PTOF, 81) Chapter 8
2 Overfrequency protection (PTOF, 81)
Function block name: TOFx- IEC 60617 graphical symbol:

ANSI number: 81
f>
SAPTOF
2.1 Introduction
Overfrequency will occur at sudden load drops or shunt faults in the power network. In some
cases close to generating part governor problems can also cause overfrequency.
The function can be used for generation shedding, remedial action schemes etc. It can also be
used as a sub-nominal frequency stage initiating load restoring.

The Overfrequency (TOF) function is used to detect high power system frequency. The function
has a settable definite time delay. If the frequency remains above the set value for a time period
corresponding to the chosen time delay, the corresponding trip signal is issued. To avoid an un-
wanted trip due to uncertain frequency measurement at low voltage magnitude, a voltage con-
trolled blocking of the function is available, i.e. if the voltage is lower than the set blocking
voltage the function is blocked and no start or trip signal is issued.

The fundamental frequency of the positive sequence voltage is measured continuously, and
compared with the set value, StartFrequency. The frequency function is also dependent on the
voltage magnitude. If the voltage magnitude decreases below the setting IntBlkStVal, the over-
frequency function is blocked, and the output BLKDMAGN is issued. All voltage settings are
made in percent of the UBase, which should be set as a phase-phase voltage in kV. To avoid
oscillations of the output start signal, a hysteresis has been included.
2.2.2 Time delay

The time delay for the overfrequency function is a settable definite time delay, specified by the
setting tTrip. The output STARTDUR, gives the time elapsed from the issue of the start output,
in percent of the total operation time available in PST.
Trip signal issuing requires that the overfrequency condition continues for at least the user set
time delay. If the start condition, with respect to the measured frequency ceases during the delay
time, and is not fulfilled again within a user defined reset time, tReset, the start output is reset,
412
after that the defined reset time has elapsed. Here it should be noted that after leaving the hys-
teresis area, the start condition must be fulfilled again and it is not sufficient for the signal to
only return back to the hysteresis area.
2.2.3 Blocking
The overfrequency function can be partially or totally blocked, by binary input signals or by pa-
rameter settings, where:
TOF-BLOCK: blocks all outputs

TOF-BLKTRIP: blocks the TOF-TRIP output
If the measured voltage level decreases below the setting of IntBlkStVal, both the start and the
2.2.4 Design
The frequency measuring element continuously measures the frequency of the positive sequence
voltage and compares it to the setting StartFrequency. The frequency signal is filtered to avoid
transients due to switchings and faults in the power system. The time integrator operates due to
a definite delay time. The design of the overfrequency function is schematically described in
figure 208.
BLOCK
BLKTRIP BLOCK
OR BLKDMAGN
Comparator
U < IntBlockLevel
Start
&
Trip
Voltage Time integrator Output
Logic
Definite Time Delay START START
Frequency Comparator
f > StartFrequency TimeDlyOperate
TRIP
TimeDlyReset
TRIP
en05000735.vsd
Figure 207: Schematic design of the overfrequency function
413
2.3 Function block
TOF1-
SAPTOF_81
U3P TRIP
BLOCK START
BLKTRIP BLKDMAGN
Frequency
en06000280.vsd
Figure 208: TOF function block

Table 230: Input signals for the SAPTOF_81 (TOF1-) function block
Signal Description
Table 231: Output signals for the SAPTOF_81 (TOF1-) function block
Signal Description
TRIP Operate/trip signal for frequency.
START Start/pick-up signal for frequency.
Frequency Measured frequency

Table 232: Basic parameter group settings for the SAPTOF_81 (TOF1-) function
On
StartFrequency 35.00 - 75.00 0.01 51.20 Hz Frequency setting/start
value.
% of UBase.
TimeDlyOperate 0.000 - 60.000 0.001 0.000 s Operate time delay in
over/under-frequency
mode.
TimeDlyReset 0.000 - 60.000 0.001 0.000 s Time delay for reset.
414
2.6 Technical data

Table 233: Overfrequency protection (PTOF, 81)
Operate value, start function (35.00-75.00) Hz ± 2.0 mHz
Reset time, start function 100 ms typically -
Operate time, definite time func- (0.000-60.000)s ± 0.5% + 10 ms
tion
Reset time, definite time function (0.000-60.000)s ± 0.5% + 10 ms
415
Rate-of-change frequency Chapter 8
protection (PFRC, 81) Frequency protection
3 Rate-of-change frequency protection (PFRC, 81)
Function block name: RCFx- IEC 60617 graphical symbol:

ANSI number: 81
df/dt >
<
SAPFRC
3.1 Introduction
Rate of change of frequency function gives an early indication of a main disturbance in the sys-
tem.
The function can be used for generation shedding, load shedding, remedial action schemes etc.
Each step can discriminate between positive or negative change of frequency.

The rate-of-change of frequency (RCF) function is used to detect fast power system frequency
changes, increase as well as decrease, at an early stage. The function has a settable definite time
delay. If the rate-of-change of frequency remains below the set value, for negative
rate-of-change, for a time period equal to the chosen time delay, the trip signal is issued. If the
rate-of-change of frequency remains above the set value, for positive rate-of-change, for a time
period equal to the chosen time delay, the trip signal is issued. To avoid an unwanted trip due to
uncertain frequency measurement at low voltage magnitude, a voltage controlled blocking of the
function is available, i.e. if the voltage is lower than the set blocking voltage, the function is
blocked and no start or trip signal is issued. If the frequency recovers, after a frequency decrease,
a restore signal is issued.

The rate-of-change of the fundamental frequency of the selected voltage is measured continu-
ously, and compared with the set value, StartFreqGrad. The rate-of-change of frequency func-
tion is also dependent on the voltage magnitude. If the voltage magnitude decreases below the
setting IntBlockLevel, the rate-of-change of frequency function is blocked, and the output
BLKDMAGN is issued. The sign of the setting StartFreqGrad, controls if the rate-of-change of
frequency function reacts on a positive or on a negative change in frequency. If the
rate-of-change of frequency function is used for decreasing frequency, i.e. the setting Start-
FreqGrad has been given a negative value, and a trip signal has been issued, then a 100 ms pulse
is issued on the RESTORE output, when the frequency recovers to a value higher than the setting
RestoreFreq. A positive setting of StartFreqGrad, sets the rate-of-change of frequency function
to start and trip for frequency increases.
416
3.2.2 Time delay

The rate-of-change of frequency function has a settable definite time delay, tTrip. The output
STARTDUR, gives the time elapsed from the issue of the start output, in percent of the total op-
eration time.
Trip signal issuing requires that the rate-of-change of frequency condition continues for at least
the user set time delay, tTrip. If the start condition, with respect to the measured frequency ceas-
es during the delay time, and is not fulfilled again within a user defined reset time, tReset, the
start output is reset, after that the defined reset time has elapsed. Here it should be noted that
after leaving the hysteresis area, the start condition must be fulfilled again and it is not sufficient
for the signal to only return back into the hysteresis area.
The RESTORE output of the rate-of-change of frequency function is set, after a time delay equal
to the setting of tRestore, when the measured frequency has returned to the level corresponding
to RestoreFreq, after an issue of the TRIP output signal. If tRestore is set to 0.000 s the restore
functionality is disabled, and no output will be given. The restore functionality is only active for
lowering frequency conditions and the restore sequence is disabled if a new negative frequency
gradient is detected during the restore period, defined by the settings RestoreFreq and tRestore.
3.2.3 Blocking
The rate-of-change of frequency function can be partially or totally blocked, by binary input sig-
nals or by parameter settings, where:

BLKTRIP: blocks the TRIP output
BLKREST: blocks the RESTORE output
If the measured voltage level decreases below the setting of IntBlockLevel, both the start and the
3.2.4 Design
The rate-of-change of frequency measuring element continuously measures the frequency of the
selected voltage and compares it to the setting StartFreqGrad. The frequency signal is filtered
to avoid transients due to power system switchings and faults. The time integrator operates with
a definite delay time. When the frequency has returned back to the setting of RestoreFreq, the
RESTORE output is issued after the time delay tRestore, if the TRIP signal has earlier been is-
sued. The sign of the setting StartFreqGrad is essential, and controls if the function is used for
raising or lowering frequency conditions. The design of the rate-of-change of frequency function
is schematically described in figure 210.
417
BLOCK
BLKTRIP
BLKRESET BLOCK
OR
Voltage Comparator BLKDMAGN

U < IntBlockLevel
Start
Rate-of-Change Time integrator &
Comparator
of Frequency Trip
If
Definite Time Delay Output
[StartFreqGrad<0 START START
Logic
AND
TimeDlyOperate
df/dt < StartFreqGrad]
OR
TimeDlyReset
[StartFreqGrad>0
AND
TRIP
df/dt > StartFreqGrad]
Then
START
100 ms
Frequency Comparator RESTORE

TimeDlyRestore
f > RestoreFreq
en05000835.vsd
Figure 209: Schematic design of the rate-of-change of frequency function
3.3 Function block
RCF1-
SAPFRC_81
U3P TRIP
BLOCK START
BLKTRIP RESTORE
BLKREST BLKDMAGN
en06000281.vsd
Figure 210: RCF function block
418

Table 234: Input signals for the SAPFRC_81 (RCF1-) function block
Signal Description
BLKREST Blocking restore output.
Table 235: Output signals for the SAPFRC_81 (RCF1-) function block
Signal Description
TRIP Operate/trip signal for frequencyGradient
START Start/pick-up signal for frequencyGradient
RESTORE Restore signal for load restoring purposes.

Table 236: Basic parameter group settings for the SAPFRC_81 (RCF1-) function
On
UBase 0.05 - 2000.00 0.05 400.00 kV Base setting for the
phase-phase voltage in
kV
StartFreqGrad -10.00 - 10.00 0.01 0.50 Hz/s Frequency gradient start
value. Sign defines direc-
tion.
% of UBase.
tTrip 0.000 - 60.000 0.001 0.200 s Operate time delay in
pos./neg. frequency gra-
dient mode.
RestoreFreq 45.00 - 65.00 0.01 49.90 Hz Restore frequency if fre-
quency is above fre-
quency value (Hz)
tRestore 0.000 - 60.000 0.001 0.000 s Restore time delay.
tReset 0.000 - 60.000 0.001 0.000 s Time delay for reset.
419
3.6 Technical data

Table 237: Rate-of-change frequency protection (PFRC, 81)
Operate value, start function (-10.00-10.00) Hz/s ± 10.0 mHz/s
Operate value, internal blocking (0-100)% of Ubase ± 1.0% of Ur
level
420
Multipurpose protection
Chapter 9 Multipurpose
protection
About this chapter

This chapter describes Multipurpose protection and includes the General current and voltage
function. The way the functions work, their setting parameters, function blocks, input and output
signals and technical data are included for each function.
421
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
1 General current and voltage protection (GAPC)
Function block name: GFxx- IEC 60617 graphical symbol:

ANSI number: 46, 51, 67, 51N, 67N, 27, 59, 21,
40
I
IEC 61850 logical node name: CVGAPC
U
1.1 Introduction
The function can be utilized as a negative sequence current protection detecting unsymmetrical
conditions such as open phase or unsymmetrical faults.
The function can also be used to improve phase selection for high resistive earth faults, outside
the distance protection reach, for the transmission line. Three functions are used which measures
the neutral current and each of the three phase voltages. This will give an independence from
load currents and this phase selection will be used in conjunction with the detection of the earth
fault from the directional earth fault protection function.
1.1.1 Inadvertent generator energization

When the generator is taken out of service, and non-rotating, there is a risk that the generator
circuit breaker flashes over or is closed by mistake.
To prevent damages on the generator or turbine, it is essential that high speed tripping is provid-
ed in case of inadvertent energization of the generator. This tripping should be almost instanta-
neous (< 100 ms).
There is a risk that the current into the generator at inadvertent energization will be limited so
that the “normal” overcurrent or underimpedance protection will not detect the dangerous situ-
ation. The delay of these protection functions might be too long. For big and important ma-
chines, fast protection against inadvertent energizing should, therefore, be included in the
protective scheme.
422

1.2.1 Measured quantities within the function
The function is always connected to three-phase current and three-phase voltage input in the
configuration tool, but it will always measure only one current and one voltage quantity selected
by the end user in the setting tool.
The user can select to measure one of the current quantities shown in table 238.
Table 238: Current selection for the GF function

Set value for
the parameter
Comment
CurrentInput
1 Phase1 GF function will measure the phase L1 current phasor
4 PosSeq GF function will measure internally calculated positive sequence
current phasor
5 NegSeq GF function will measure internally calculated negative sequence
current phasor
6 3ZeroSeq GF function will measure internally calculated zero sequence current pha-
sor multiplied by factor 3
7 MaxPh GF function will measure current phasor of the phase with
maximum magnitude
8 MinPh GF function will measure current phasor of the phase with
minimum magnitude
9 UnbalancePh GF function will measure magnitude of unbalance current, which is inter-
nally calculated as the algebraic magnitude difference between the current
phasor of the phase with maximum magnitude and current phasor of the
phase with minimum magnitude. Phase angle will be set to 0° all the time
10 Phase1-Phase2 GF function will measure the current phasor internally calculated as the vec-
tor difference between the phase L1 current phasor and phase L2 current
phasor (i.e. IL1-IL2)
13 MaxPh-Ph GF function will measure ph-ph current phasor with the maximum magni-
tude
14 MinPh-Ph GF function will measure ph-ph current phasor with the minimum magnitude
15 UnbalancePh-Ph GF function will measure magnitude of unbalance current, which is inter-
nally calculated as the algebraic magnitude difference between the ph-ph
current phasor with maximum magnitude and ph-ph current phasor with
minimum magnitude. Phase angle will be set to 0° all the time
423
The user can select to measure one of the voltage quantities shown in table 239:
Table 239: Voltage selection for the GF function

Set value for
the parameter Volt- Comment
ageInput
1 Phase1 GF function will measure the phase L1 voltage phasor
4 PosSeq GF function will measure internally calculated positive sequence voltage
phasor
5 -NegSeq GF function will measure internally calculated negative sequence voltage
phasor. This voltage phasor will be intentionally rotated for 180° in order to
enable easier settings for the directional feature when used.
6 -3ZeroSeq GF function will measure internally calculated zero sequence voltage pha-
sor multiplied by factor 3. This voltage phasor will be intentionally rotated for
180° in order to enable easier settings for the directional feature when used.
7 MaxPh GF function will measure voltage phasor of the phase with
maximum magnitude
8 MinPh GF function will measure voltage phasor of the phase with
minimum magnitude
9 UnbalancePh GF function will measure magnitude of unbalance voltage, which is inter-
nally calculated as the algebraic magnitude difference between the voltage
phasor of the phase with maximum magnitude and voltage phasor of the
phase with minimum magnitude. Phase angle will be set to 0° all the time
10 Phase1-Phase2 GF function will measure the voltage phasor internally calculated as the
vector difference between the phase L1 voltage phasor and phase L2 volt-
age phasor (i.e. UL1-UL2)
13 MaxPh-Ph GF function will measure ph-ph voltage phasor with the maximum magni-
tude
14 MinPh-Ph GF function will measure ph-ph voltage phasor with the minimum magni-
tude
15 UnbalancePh-Ph GF function will measure magnitude of unbalance voltage, which is inter-
nally calculated as the algebraic magnitude difference between the ph-ph
voltage phasor with maximum magnitude and ph-ph voltage phasor with
minimum magnitude. Phase angle will be set to 0° all the time
It is important to notice that the voltage selection from table 239 is always applicable regardless
the actual external VT connections. The three-phase VT inputs can be connected to IED as either
three phase-to-ground voltages UL1, UL2 & UL3 or three phase-to-phase voltages UL1L2, UL2L3
& UL3L1). This information about actual VT connection is entered as a setting parameter for the
pre-processing block, which will then take automatic care about it.
424
The user can select one of the current quantities shown in table 240 for built-in current restraint
feature:
Table 240: Restraint current selection for the GF function

Set value for
the parameter Restr-
Comment
Curr
1 PosSeq GF function will measure internally calculated positive sequence current
phasor
2 NegSeq GF function will measure internally calculated negative sequence current
phasor
3 3ZeroSeq GF function will measure internally calculated zero sequence current pha-
sor multiplied by factor 3
4 MaxPh GF function will measure current phasor of the phase with maximum magni-
tude
1.2.2 Base quantities for GF function

The parameter settings for the base quantities, which represent the base (i.e. 100%) for pickup
levels of all measuring stages shall be entered as setting parameters for every GF function.
Base current shall be entered as:
1. rated phase current of the protected object in primary amperes, when the mea-
sured Current Quantity is selected from 1 to 9, as shown in table 238.
2. rated phase current of the protected object in primary amperes multiplied by √3
(i.e. 1,732 x Iphase), when the measured Current Quantity is selected from 10 to
15, as shown in table 238.
Base voltage shall be entered as:
1. rated phase-to-ground voltage of the protected object in primary kV, when the
measured Voltage Quantity is selected from 1 to 9, as shown in table 239.
2. rated phase-to-phase voltage of the protected object in primary kV, when the
measured Voltage Quantity is selected from 10 to 15, as shown in table 239.
1.2.3 Built-in overcurrent protection steps

Two overcurrent protection steps are available. They are absolutely identical and therefore only
one will be explained here.
Overcurrent step simply compares the magnitude of the measured current quantity
(see table 238) with the set pickup level. Non-directional overcurrent step will pickup if the
magnitude of the measured current quantity is bigger than this set level. Reset ratio is settable,
with default value of 0.96. However depending on other enabled built-in features this overcur-
rent pickup might not cause the overcurrent step start signal. Start signal will only come if all of
the enabled built-in features in the overcurrent step are fulfilled at the same time.
425
Second harmonic feature

The overcurrent protection step can be restrained by a second harmonic component in the mea-
sured current quantity (see table 238). However it shall be noted that this feature is not applica-
ble when one of the following measured currents is selected:
• PosSeq (i.e. positive sequence current)

• NegSeq (i.e. negative sequence current)
• UnbalancePh (i.e. unbalance phase current)
• UnbalancePh-Ph (i.e. unbalance ph-ph current)
This feature will simple prevent overcurrent step start if the second-to-first harmonic ratio in the
measured current exceeds the set level.
Directional feature
The overcurrent protection step operation can be can be made dependent on the relevant phase
angle between measured current phasor (see table 238) and measured voltage phasor
(see table 239). In protection terminology it means that the PGPF function can be made direc-
tional by enabling this built-in feature. In that case overcurrent protection step will only operate
if the current flow is in accordance with the set direction (i.e. Forward, which means towards
the protected object, or Reverse, which means from the protected object). For this feature it is of
the outmost importance to understand that the measured voltage phasor (see table 239) and mea-
sured current phasor (see table 238) will be used for directional decision. Therefore it is the sole
responsibility of the end user to select the appropriate current and voltage signals in order to get
a proper directional decision. The PGPF function will NOT do this automatically. It will just
simply use the current and voltage phasors selected by the end user to check for the directional
criteria.
Table 241 gives an overview of the typical choices (but not the only possible ones) for these two
quantities for traditional directional relays.
Table 241: Typical current and voltage choices for directional feature
Set value for Set value for
the parameter Cur- the parameter Volt- Comment
rentInput ageInput
PosSeq PosSeq Directional positive sequence overcurrent function is
obtained. Typical setting for RCADir is from -45° to -90°
depending on the power
426
Set value for Set value for

the parameter Cur- the parameter Volt-
Comment
rentInput ageInput
NegSeq -NegSeq Directional negative sequence overcurrent function is
obtained. Typical setting for RCADir is from -45° to -90°
depending on the power system voltage level (i.e. X/R
ratio)
3ZeroSeq -3ZeroSeq Directional zero sequence overcurrent function is
obtained. Typical setting for RCADir is from
0° to -90° depending on the power system earthing (i.e.
solidly earthed, earthed via resistor, etc.)
Phase1 Phase2-Phase3 Directional overcurrent function for the first phase is
obtained. Typical setting for RCADir is +30° or +45°
Phase2 Phase3-Phase1 Directional overcurrent function for the second phase is
Phase3 Phase1-Phase2 Directional overcurrent function for the third phase is
Unbalance current or voltage measurement shall not be used when the directional feature is en-
abled.
Two types of directional measurement principles are available, I & U and IcosPhi&U. The first
principle, referred to as "I & U" in the parameter setting tool, checks that:
• the magnitude of the measured current is bigger than the set pick-up level
• the phasor of the measured current is within the operating region (defined by the
relay operate angle, ROADir parameter setting; see figure 212).
427
U=-3U0
RCADir
Ipickup ROADir I=3Io
Operate region
mta line
en05000252.vsd
where:
RCADir is -75°
ROADir is 50°
Figure 211: I & U directional operating principle for the GF function
The second principle, referred to as "IcosPhi&U" in the parameter setting tool, checks that:
• that the product I·cos(Φ) is bigger than the set pick-up level, where Φ is angle
between the current phasor and the mta line
• that the phasor of the measured current is within the operating region (defined by
the I·cos(Φ) straight line and the relay operate angle, ROADir parameter setting;
see figure 212).
428
U=-3U0
RCADir
Ipickup ROADir Φ I=3Io
Operate region
mta line
en05000253.vsd
where:
RCADir is -75°
ROADir is 50°
Figure 212: GF, IcosPhi&U directional operating principle
Note that it is possible to decide by a parameter setting how the directional feature shall behave
when the magnitude of the measured voltage phasor falls below the pre-set value. User can select
one of the following three options:
• Non-directional (i.e. operation allowed for low magnitude of the reference volt-
age)
• Block (i.e. operation prevented for low magnitude of the reference voltage)
• Memory (i.e. memory voltage shall be used to determine direction of the current)
It shall also be noted that the memory duration is limited in the algorithm to 100 ms. After that
time the current direction will be locked to the one determined during memory time and it will
re-set only if the current fails below set pickup level or voltage goes above set voltage memory
limit.
Voltage restraint/control feature

The overcurrent protection step operation can be can be made dependent of a measured voltage
quantity (see table 239). Practically then the pickup level of the overcurrent step is not constant
but instead decreases with the decrease in the magnitude of the measured voltage quantity. Two
different types of dependencies are available:
• Voltage restraint overcurrent (when setting parameter VDepMode_OC1=Slope)
429
OC1 Stage Pickup Level
StartCurr_OC1
VDepFact_OC1 * StartCurr_OC1
ULowLimit_OC1 UHighLimit_OC1
Selected Voltage
Magnitude
en05000324.vsd
Figure 213: Example for OC1 step current pickup level variation as function of measured volt-
age magnitude in Slope mode of operation
• Voltage controlled overcurrent (when setting parameter VDepMode_OC1=Step

has value = step)
OC1 Stage Pickup Level
StartCurr_OC1
VDepFact_OC1 * StartCurr_OC1
UHighLimit_OC1 Selected Voltage Magnitude
en05000323.vsd
Figure 214: Example for OC1 step current pickup level variation as function of measured volt-
age magnitude in Step mode of operation
430
This feature will simple change the set overcurrent pickup level in accordance with magnitude
variations of the measured voltage. It shall be noted that this feature will as well affect the pickup
current value for calculation of operate times for IDMT curves (i.e. overcurrent with IDMT
curve will operate faster during low voltage conditions).
Current restraint feature

The overcurrent protection step operation can be can be made dependent of a restraining current
quantity (see table 240). Practically then the pickup level of the overcurrent step is not constant
but instead increases with the increase in the magnitude of the restraining current.
IMeasured
ea ain
ar str
e Ire
at ff*
per e
O Co
es tr
I>R
IsetHigh
IsetLow
atan(RestrCoeff)
Restraint
en05000255.vsd
Figure 215: Current pickup variation with restraint current magnitude
This feature will simple prevent overcurrent step to start if the magnitude of the measured cur-
rent quantity is smaller than the set percentage of the restrain current magnitude. However this
feature will not affect the pickup current value for calculation of operate times for IDMT curves.
This means that the IDMT curve operate time will not be influenced by the restrain current mag-
nitude.
When set, the start signal will start definite time delay or inverse (i.e. IDMT) time delay in ac-
cordance with the end user setting. If the start signal has value one for longer time than the set
time delay, the overcurrent step will set its trip signal to one. Reset of the start and trip signal
can be instantaneous or time delay in accordance with the end user setting.
1.2.4 Built-in undercurrent protection steps

Two undercurrent protection steps are available. They are absolutely identical and therefore only
one will be explained here. Undercurrent step simply compares the magnitude of the measured
current quantity (see table 238) with the set pickup level. The undercurrent step will pickup and
set its start signal to one if the magnitude of the measured current quantity is smaller than this
set level. The start signal will start definite time delay with set time delay. If the start signal has
431
value one for longer time than the set time delay the undercurrent step will set its trip signal to
one. Reset of the start and trip signal can be instantaneous or time delay in accordance with the
setting.
1.2.5 Built-in overvoltage protection steps

Two overvoltage protection steps are available. They are absolutely identical and therefore only
one will be explained here.
Overvoltage step simply compares the magnitude of the measured voltage quantity
(see table 239) with the set pickup level. The overvoltage step will pickup if the magnitude of
the measured voltage quantity is bigger than this set level. Reset ratio is settable, with default
value of 0.99.
The start signal will start definite time delay or inverse (i.e. IDMT) time delay in accordance
with the end user setting. If the start signal has value one for longer time than the set time delay,
the overvoltage step will set its trip signal to one. Reset of the start and trip signal can be instan-
taneous or time delay in accordance with the end user setting.
1.2.6 Built-in undervoltage protection steps

Two undervoltage protection steps are available. They are absolutely identical and therefore
only one will be explained here.
Undervoltage step simply compares the magnitude of the measured voltage quantity
(see table 239 with the set pickup level. The undervoltage step will pickup if the magnitude of
the measured voltage quantity is smaller than this set level. Reset ratio is settable, with default
value of 1.01.
The start signal will start definite time delay or inverse (i.e. IDMT) time delay in accordance
with the end user setting. If the start signal has value one for longer time than the set time delay,
the undervoltage step will set its trip signal to one. Reset of the start and trip signal can be in-
stantaneous or time delay in accordance with the end user setting.
1.2.7 Inadvertent generator energization

The inadvertent energization function is realized by means of the general current and voltage
protection function (CAGVPC). The function is configured as shown in figure 217.
432
CVGAPC
3IP
3UP TROC1
TROV1
≥1
TRUV1
BLKOC1
en06000497.vsd
Figure 216: Configuration of the inadvertent energization function
The setting of the general current and voltage function (typical values) is done as shown in
table 242.
433
Table 242: The setting of the general current and voltage function
Measured Pickup in % Time delay in
Quantity of generator seconds
rating
Undervolt- Maximum < 70% 10.0 s
age U< generator
Phase to
Phase voltage
Overvoltage Maximum > 85% 1.0 s
U> generator
Phase to
Phase voltage
Overcurrent Maximum > 50% 0.05 s
I> generator
Phase current
In normal operation the overvoltage trip signal is activated and the undervotage trip signal is de-
activated. This means that the overcurrent function is blocked.
When the generator is taken out of service the generator voltage gets low. The overvoltage trip
signal will be deactivated and the undervoltage trip signal will be activated after the set delay.
At this moment the block signal to the overcurrent function will be deactivated.
It the generator is energized at stand still conditions, i.e. when the voltage is zero, the overcurrent
function will operate after the short set delay if the generator current is larger than the set value.
When the generator is started the overvoltage trip signal will be activared the set time delay after
the moment when the voltage has reached the set value. At this moment the blocking of the over-
current function is activated.
The delay of the undervoltage function will prevent false operation at short circuits in the exter-
nal power grid.
1.2.8 Logic diagram

The simplified internal logics, for the PGPF function are shown in the following figures.
434
REx670
ADM PGPF function
Current and voltage selection

settings
Phasor calculation of
scaling with CT ratio
individual currents
A/D conversion Selection of which current Selected current
Phasors &
and voltage shall be given to
samples
the built-in protection Selected voltage
elements
Restraint current selection

A/D conversion scaling
Selection of restraint current

Selected restraint current
Phasor calculation of
individual voltages
with CT ratio
Phasors &
samples
en05000169.vsd
Figure 217: Treatment of measured currents within IED for PGPF function
Figure 218 shows how internal treatment of measured currents is done for multipurpose protec-
tion function
The following currents and voltages are inputs to the multipurpose protection function. They
must all be expressed in true power system (primary) Amperes and kilovolts.
1. Instantaneous values (samples) of currents & voltages from one three-phase cur-
rent and one three-phase voltage input.
2. Fundamental frequency phasors from one three-phase current and one
three-phase voltage input calculated by the pre-processing modules.
3. Sequence currents & voltages from one three-phase current and one three-phase
voltage input calculated by the pre-processing modules.
The multipurpose protection function:
1. Selects one current from the three phase input system (see table 243) for internal-
ly measured current.
2. Selects one voltage from the three phase input system (see table 244) for inter-
nally measured voltage.
3. Selects one current from the three phase input system (see table 244) for internal-
ly measured restraint current.
435
CURRENT
UC1
TRUC1
2nd Harmonic
Selected current restraint
STUC2
UC2
nd
TRUC2
2 Harmonic
restraint
STOC1
OC1 TROC1
2nd Harmonic BLK2ND

restraint ≥1
Selected restraint current
Current restraint
DIROC1
Directionality
Voltage control /
restraint
STOC2
OC2 TROC2
2nd Harmonic
restraint
Current restraint ≥1
UDIRLOW
Directionality DIROC2
Voltage control /
restraint
STOV1
OV1 TROV1
STOV2
OV2 TROV2
STUV1
Selected voltage
UV1 TRUV1
STUV2
UV2 TRUV2
VOLTAGE
en05000170.vsd
Figure 218: PGPF function main logic diagram for built in protection elements
Logic in figure 219 can be summarized as follows:
436
1. The selected currents and voltage are given to built-in protection elements. Each
protection element and step makes independent decision about status of its
START and TRIP output signals.
2. More detailed internal logic for every protection element is given in the following
four figures
3. Common START and TRIP signals from all built-in protection elements & steps
(internal OR logic) are available from multipurpose function as well.
Enable
second
harmonic Second
harmonic check
1 DEF time BLKTROC
selected DEF 1 TROC1
AND
OR
Selected current a
a>b
b
OC1=On STOC1
AND
StartCurr_OC1 BLKOC1
X
Inverse
Voltage Directionality DIR_OK Inverse

control or time
check selected
restraint
feature
Selected voltage
Current
Restraint
Feature
Selected restrain current Imeasured > k Irestraint
en05000831.vsd
Figure 219: Simplified internal logic diagram for built-in first overcurrent step i.e. OC1 (step
OC2 has the same internal logic)
437
Bin input: BLKUC1TR
Selected current a TRUC1

b>a
DEF AND
b
StartCurr_UC1
AND
Operation_UC1=On
STUC1
Bin input: BLKUC1
en05000750.vsd
Figure 220: Simplified internal logic diagram for built-in first undercurrent step i.e. UC1 (step
UC2 has the same internal logic)
DEF time BLKTROV1

selected DEF TROV1
AND
OR
Selected voltage a
a>b
b STOV1
StartVolt_OV1
AND
Inverse
Operation_OV1=On
Inverse time
BLKOV1 selected
en05000751.vsd
Figure 221: Simplified internal logic diagram for built-in first overvoltage step i.e.OV1 (step
OV2 has the same internal logic)
438
DEF time BLKTRUV

selected DEF 1 TRUV1
AND
OR
Selected voltage a
b>a
b STUV1
AND
StartVolt_UV1
Inverse
Operation_UV1=On
Inverse time
BLKUV1 selected
en05000752.vsd
Figure 222: Simplified internal logic diagram for built-in first undervoltage step i.e.UV1 (step
UV2 has the same internal logic)
1.3 Function block
GF01-
CVGAPC
I3P TRIP
U3P TROC1
BLOCK TROC2
BLKOC1 TRUC1
BLKOC1TR TRUC2
ENMLTOC1 TROV1
BLKOC2 TROV2
BLKOC2TR TRUV1
ENMLTOC2 TRUV2
BLKUC1 START
BLKUC1TR STOC1
BLKUC2 STOC2
BLKUC2TR STUC1
BLKOV1 STUC2
BLKOV1TR STOV1
BLKOV2 STOV2
BLKOV2TR STUV1
BLKUV1 STUV2
BLKUV1TR BLK2ND
BLKUV2 DIROC1
BLKUV2TR DIROC2
UDIRLOW
CURRENT
ICOSFI
VOLTAGE
UIANGLE
en05000372.vsd
Figure 223: GF function block
439

Table 243: Input signals for the CVGAPC (GF01-) function block
Signal Description
BLKOC1 Block of over current function OC1
BLKOC1TR Block of trip for over current function OC1
ENMLTOC1 When activated, the current multiplier is in use for OC1
BLKOC2 Block of over current function OC2
BLKOC2TR Block of trip for over current function OC2
ENMLTOC2 When activated, the current multiplier is in use for OC2
BLKUC1 Block of under current function UC1
BLKUC1TR Block of trip for under current function UC1
BLKUC2 Block of under current function UC2
BLKUC2TR Block of trip for under current function UC2
BLKOV1 Block of over voltage function OV1
BLKOV1TR Block of trip for over voltage function OV1
BLKOV2 Block of over voltage function OV2
BLKOV2TR Block of trip for over voltage function OV2
BLKUV1 Block of under voltage function UV1
BLKUV1TR Block of trip for under voltage function UV1
BLKUV2 Block of under voltage function UV2
BLKUV2TR Block of trip for under voltage function UV2
Table 244: Output signals for the CVGAPC (GF01-) function block
Signal Description
TRIP General trip signal
TROC1 Trip signal from overcurrent function OC1
TROC2 Trip signal from overcurrent function OC2
TRUC1 Trip signal from undercurrent function UC1
TRUC2 Trip signal from undercurrent function UC2
TROV1 Trip signal from overvoltage function OV1
TROV2 Trip signal from overvoltage function OV2
TRUV1 Trip signal from undervoltage function UV1
TRUV2 Trip signal from undervoltage function UV2
STOC1 Start signal from overcurrent function OC1
STOC2 Start signal from overcurrent function OC2
440
Signal Description
STUC1 Start signal from undercurrent function UC1
STUC2 Start signal from undercurrent function UC2
STOV1 Start signal from overvoltage function OV1
STOV2 Start signal from overvoltage function OV2
STUV1 Start signal from undervoltage function UV1
STUV2 Start signal from undervoltage function UV2
BLK2ND Block from second harmonic detection
DIROC1 Directional mode of OC1 (nondir, forward,reverse)
DIROC2 Directional mode of OC2 (nondir, forward,reverse)
UDIRLOW Low voltage for directional polarization
CURRENT Measured current value
ICOSFI Measured current multiplied with cos (Phi)
VOLTAGE Measured voltage value
UIANGLE Angle between voltage and current
441

Table 245: Basic parameter group settings for the CVGAPC (GF01-) function
On
CurrentInput phase1 - MaxPh - Select current signal
phase2 which will be measured
phase3 inside function
PosSeq
NegSeq
3*ZeroSeq
MaxPh
MinPh
UnbalancePh
phase1-phase2
phase2-phase3
phase3-phase1
MaxPh-Ph
MinPh-Ph
UnbalancePh-Ph
IBase 1 - 99999 1 3000 A Base Current
VoltageInput phase1 - MaxPh - Select voltage signal
phase2 which will be measured
phase3 inside function
PosSeq
-NegSeq
-3*ZeroSeq
MaxPh
MinPh
UnbalancePh
phase1-phase2
phase2-phase3
phase3-phase1
MaxPh-Ph
MinPh-Ph
UnbalancePh-Ph
OperHarmRestr Off - Off - Operation of 2nd har-
On monic restrain Off / On
l_2nd/l_fund 10.0 - 50.0 1.0 20.0 % Ratio of second to funda-
mental current harmonic
in %
BlkLevel2nd 10 - 5000 1 5000 %IB Harm analyse disabled
above this current level in
% of Ibase
EnRestrainCurr Off - Off - Enable current restrain
On function On / Off
442

RestrCurrInput PosSeq - PosSeq - Select current signal
NegSeq which will be used for
3*ZeroSeq curr restrain
Max
RestrCurrCoeff 0.00 - 5.00 0.01 0.00 - Restraining current coef-
ficient
RCADir -180 - 180 1 -75 Deg Relay Characteristic
Angle
ROADir 1 - 90 1 75 Deg Relay Operate Angle
LowVolt_VM 0.0 - 5.0 0.1 0.5 %UB Below this level in % of
Ubase setting ActLowVolt
takes over
Operation_OC1 Off - Off - Operation OC1 Off / On
On
StartCurr_OC1 2.0 - 5000.0 1.0 120.0 %IB Operate current level for
OC1 in % of Ibase
CurveType_OC1 ANSI Ext. inv. - ANSI Def. Time - Selection of time delay
ANSI Very inv. curve type for OC1
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
tDef_OC1 0.00 - 6000.00 0.01 0.50 s Independent (definitive)
time delay of OC1
k_OC1 0.05 - 999.00 0.01 0.30 - Time multiplier for the
OC1
tMin_OC1 0.00 - 6000.00 0.01 0.05 s Minimum operate time for
IEC IDMT curves for OC1
VCntrlMode_OC1 Voltage control - Off - Control mode for voltage
Input control controlled OC1 function
Volt/Input control
Off
VDepMode_OC1 Step - Step - Voltage dependent mode
Slope OC1 (step, slope)
443

VDepFact_OC1 0.02 - 5.00 0.01 1.00 - Multiplying factor for I
pickup when OC1 is U
dependent
ULowLimit_OC1 1.0 - 200.0 0.1 50.0 %UB Voltage low limit setting
OC1 in % of Ubase
UHighLimit_OC1 1.0 - 200.0 0.1 100.0 %UB Voltage high limit setting
OC1 in % of Ubase
HarmRestr_OC1 Off - Off - Enable block of OC1 by
On 2nd harmonic restrain
DirMode_OC1 Non-directional - Non-directional - Directional mode of OC1
Forward (nondir, forward,reverse)
Reverse
DirPrinc_OC1 I&U - I&U - Measuring on IandU or
IcosPhi&U IcosPhiandU for OC1
ActLowVolt1_VM Non-directional - Non-directional - Low voltage level action
Block for Dir_OC1 (Nodir, Blk,
Memory Mem)
Operation_OC2 Off - Off - Operation OC2 Off / On

On
StartCurr_OC2 2.0 - 5000.0 1.0 120.0 %IB Operate current level for
OC2 in % of Ibase
CurveType_OC2 ANSI Ext. inv. - ANSI Def. Time - Selection of time delay
ANSI Very inv. curve type for OC2
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
tDef_OC2 0.00 - 6000.00 0.01 0.50 s Independent (definitive)
time delay of OC2
k_OC2 0.05 - 999.00 0.01 0.30 - Time multiplier for the
OC2
tMin_OC2 0.00 - 6000.00 0.01 0.05 s Minimum operate time for
IEC IDMT curves for OC2
444

VCntrlMode_OC2 Voltage control - Off - Control mode for voltage
Input control controlled OC2 function
Volt/Input control
Off
VDepMode_OC2 Step - Step - Voltage dependent mode
Slope OC2 (step, slope)
VDepFact_OC2 0.02 - 5.00 0.01 1.00 - Multiplying factor for I
pickup when OC2 is U
dependent
ULowLimit_OC2 1.0 - 200.0 0.1 50.0 %UB Voltage low limit setting
OC2 in % of Ubase
UHighLimit_OC2 1.0 - 200.0 0.1 100.0 %UB Voltage high limit setting
OC2 in % of Ubase
HarmRestr_OC2 Off - Off - Enable block of OC2 by
DirMode_OC2 Non-directional - Non-directional - Directional mode of OC2
Forward (nondir, forward,reverse)
Reverse
DirPrinc_OC2 I&U - I&U - Measuring on IandU or
IcosPhi&U IcosPhiandU for OC2
ActLowVolt2_VM Non-directional - Non-directional - Low voltage level action
Block for Dir_OC2 (Nodir, Blk,
Memory Mem)
Operation_UC1 Off - Off - Operation UC1 Off / On

On
EnBlkLowI_UC1 Off - Off - Enable internal low cur-
On rent level blocking for
UC1
BlkLowCurr_UC1 0 - 150 1 20 %IB Internal low current
blocking level for UC1 in
% of Ibase
StartCurr_UC1 2.0 - 150.0 1.0 70.0 %IB Operate undercurrent
level for UC1 in % of
Ibase
tDef_UC1 0.00 - 6000.00 0.01 0.50 s Independent (definitive)
time delay of UC1
tResetDef_UC1 0.00 - 6000.00 0.01 0.00 s Reset time delay used in
UC1
HarmRestr_UC1 Off - Off - Enable block of UC1 by
Operation_UC2 Off - Off - Operation UC2 Off / On
On
EnBlkLowI_UC2 Off - Off - Enable internal low cur-
On rent level blocking for
UC2
445

BlkLowCurr_UC2 0 - 150 1 20 %IB Internal low current
blocking level for UC2 in
% of Ibase
StartCurr_UC2 2.0 - 150.0 1.0 70.0 %IB Operate undercurrent
level for UC2 in % of
Ibase
tDef_UC2 0.00 - 6000.00 0.01 0.50 s Independent (definitive)
time delay of UC2
HarmRestr_UC2 Off - Off - Enable block of UC2 by
Operation_OV1 Off - Off - Operation OV1 Off / On
On
StartVolt_OV1 2.0 - 200.0 0.1 150.0 %UB Operate voltage level for
OV1 in % of Ubase
CurveType_OV1 Definite time - Definite time - Selection of time delay
Inverse curve A curve type for OV1
Inverse curve B
Inverse curve C
Prog. inv. curve
tDef_OV1 0.00 - 6000.00 0.01 1.00 s Operate time delay in sec
for definite time use of
OV1
tMin_OV1 0.00 - 6000.00 0.01 0.05 s Minimum operate time for
IDMT curves for OV1
k_OV1 0.05 - 999.00 0.01 0.30 - Time multiplier for the
OV1
Operation_OV2 Off - Off - Operation OV2 Off / On
On
StartVolt_OV2 2.0 - 200.0 0.1 150.0 %UB Operate voltage level for
OV2 in % of Ubase
CurveType_OV2 Definite time - Definite time - Selection of time delay
Inverse curve A curve type for OV2
Inverse curve B
Inverse curve C
Prog. inv. curve
tDef_OV2 0.00 - 6000.00 0.01 1.00 s Operate time delay in sec
OV2
tMin_OV2 0.00 - 6000.00 0.01 0.05 s Minimum operate time for
IDMT curves for OV2
k_OV2 0.05 - 999.00 0.01 0.30 - Time multiplier for the
OV2
Operation_UV1 Off - Off - Operation UV1 Off / On
On
446

StartVolt_UV1 2.0 - 150.0 0.1 50.0 %UB Operate undervoltage
level for UV1 in % of
Ubase
CurveType_UV1 Definite time - Definite time - Selection of time delay
Inverse curve A curve type for UV1
Inverse curve B
Prog. inv. curve
tDef_UV1 0.00 - 6000.00 0.01 1.00 s Operate time delay in sec
UV1
tMin_UV1 0.00 - 6000.00 0.01 0.05 s Minimum operate time for
IDMT curves for UV1
k_UV1 0.05 - 999.00 0.01 0.30 - Time multiplier for the
UV1
EnBlkLowV_UV1 Off - On - Enable internal low volt-
On age level blocking for
UV1
BlkLowVolt_UV1 0.0 - 5.0 0.1 0.5 %UB Internal low voltage
blocking level for UV1 in
% of Ubase
Operation_UV2 Off - Off - Operation UV2 Off / On
On
StartVolt_UV2 2.0 - 150.0 0.1 50.0 %UB Operate undervoltage
level for UV2 in % of
Ubase
CurveType_UV2 Definite time - Definite time - Selection of time delay
Inverse curve A curve type for UV2
Inverse curve B
Prog. inv. curve
tDef_UV2 0.00 - 6000.00 0.01 1.00 s Operate time delay in sec
UV2
tMin_UV2 0.00 - 6000.00 0.01 0.05 s Minimum operate time for
IDMT curves for UV2
k_UV2 0.05 - 999.00 0.01 0.30 - Time multiplier for the
UV2
EnBlkLowV_UV2 Off - On - Enable internal low volt-
On age level blocking for
UV2
BlkLowVolt_UV2 0.0 - 5.0 0.1 0.5 %UB Internal low voltage
blocking level for UV2 in
% of Ubase
447
Table 246: Advanced parameter group settings for the CVGAPC (GF01-) function
CurrMult_OC1 1.0 - 10.0 0.1 2.0 - Multiplier for scaling the
OC1
ResCrvType_OC1 Instantaneous - Instantaneous - Selection of reset curve
IEC Reset type for OC1
ANSI reset
tResetDef_OC1 0.00 - 6000.00 0.01 0.00 s Reset time delay used in
OC1
P_OC1 0.0001 - 10.0000 0.0001 0.0200 - Parameter P for cus-
tomer programmable
curve for OC1
A_OC1 0.0000 - 999.0000 0.0001 0.1400 - Parameter A for cus-
tomer programmable
curve for OC1
B_OC1 0.0000 - 99.0000 0.0001 0.0000 - Parameter B for cus-
tomer programmable
curve for OC1
C_OC1 0.0000 - 1.0000 0.0001 1.0000 - Parameter C for cus-
tomer programmable
curve for OC1
PR_OC1 0.005 - 3.000 0.001 0.500 - Parameter PR for cus-
tomer programmable
curve for OC1
TR_OC1 0.005 - 600.000 0.001 13.500 - Parameter TR for cus-
tomer programmable
curve for OC1
CR_OC1 0.1 - 10.0 0.1 1.0 - Parameter CR for cus-
tomer programmable
curve for OC1
CurrMult_OC2 1.0 - 10.0 0.1 2.0 - Multiplier for scaling the
OC2
ResCrvType_OC2 Instantaneous - Instantaneous - Selection of reset curve
IEC Reset type for OC2
ANSI reset
tResetDef_OC2 0.00 - 6000.00 0.01 0.00 s Reset time delay used in
OC2
P_OC2 0.0001 - 10.0000 0.0001 0.0200 - Parameter P for cus-
tomer programmable
curve for OC2
A_OC2 0.0000 - 999.0000 0.0001 0.1400 - Parameter A for cus-
tomer programmable
curve for OC2
448

B_OC2 0.0000 - 99.0000 0.0001 0.0000 - Parameter B for cus-
tomer programmable
curve for OC2
C_OC2 0.0000 - 1.0000 0.0001 1.0000 - Parameter C for cus-
tomer programmable
curve for OC2
PR_OC2 0.005 - 3.000 0.001 0.500 - Parameter PR for cus-
tomer programmable
curve for OC2
TR_OC2 0.005 - 600.000 0.001 13.500 - Parameter TR for cus-
tomer programmable
curve for OC2
CR_OC2 0.1 - 10.0 0.1 1.0 - Parameter CR for cus-
tomer programmable
curve for OC2
tResetDef_UC2 0.00 - 6000.00 0.01 0.00 s Reset time delay used in
UC2
ResCrvType_OV1 Instantaneous - Instantaneous - Selection of reset curve
Frozen timer type for OV1
Linearly decreased
tResetDef_OV1 0.00 - 6000.00 0.01 0.00 s Reset time delay in sec
OV1
tResetIDMT_OV1 0.00 - 6000.00 0.01 0.00 s Reset time delay in sec
for IDMT curves for OV1
A_OV1 0.0050 - 999.0000 0.0001 0.1400 - Parameter A for cus-
tomer programmable
curve for OV1
B_OV1 0.5000 - 99.0000 0.0001 1.0000 - Parameter B for cus-
tomer programmable
curve for OV1
C_OV1 0.0000 - 1.0000 0.0001 1.0000 - Parameter C for cus-
tomer programmable
curve for OV1
D_OV1 0.000 - 10.000 0.001 0.000 - Parameter D for cus-
tomer programmable
curve for OV1
P_OV1 0.0001 - 10.0000 0.0001 0.0200 - Parameter P for cus-
tomer programmable
curve for OV1
ResCrvType_OV2 Instantaneous - Instantaneous - Selection of reset curve
Frozen timer type for OV2
Linearly decreased
tResetDef_OV2 0.00 - 6000.00 0.01 0.00 s Reset time delay in sec
OV2
449

tResetIDMT_OV2 0.00 - 6000.00 0.01 0.00 s Reset time delay in sec
for IDMT curves for OV2
A_OV2 0.0050 - 999.0000 0.0001 0.1400 - Parameter A for cus-
tomer programmable
curve for OV2
B_OV2 0.5000 - 99.0000 0.0001 1.0000 - Parameter B for cus-
tomer programmable
curve for OV2
C_OV2 0.0000 - 1.0000 0.0001 1.0000 - Parameter C for cus-
tomer programmable
curve for OV2
D_OV2 0.000 - 10.000 0.001 0.000 - Parameter D for cus-
tomer programmable
curve for OV2
P_OV2 0.0001 - 10.0000 0.0001 0.0200 - Parameter P for cus-
tomer programmable
curve for OV2
ResCrvType_UV1 Instantaneous - Instantaneous - Selection of reset curve
Frozen timer type for UV1
Linearly decreased
tResetDef_UV1 0.00 - 6000.00 0.01 0.00 s Reset time delay in sec
UV1
tResetIDMT_UV1 0.00 - 6000.00 0.01 0.00 s Reset time delay in sec
for IDMT curves for UV1
A_UV1 0.0050 - 999.0000 0.0001 0.1400 - Parameter A for cus-
tomer programmable
curve for UV1
B_UV1 0.5000 - 99.0000 0.0001 1.0000 - Parameter B for cus-
tomer programmable
curve for UV1
C_UV1 0.0000 - 1.0000 0.0001 1.0000 - Parameter C for cus-
tomer programmable
curve for UV1
D_UV1 0.000 - 10.000 0.001 0.000 - Parameter D for cus-
tomer programmable
curve for UV1
P_UV1 0.0001 - 10.0000 0.0001 0.0200 - Parameter P for cus-
tomer programmable
curve for UV1
ResCrvType_UV2 Instantaneous - Instantaneous - Selection of reset curve
Frozen timer type for UV2
Linearly decreased
tResetDef_UV2 0.00 - 6000.00 0.01 0.00 s Reset time delay in sec
UV2
tResetIDMT_UV2 0.00 - 6000.00 0.01 0.00 s Reset time delay in sec
for IDMT curves for UV2
450

A_UV2 0.0050 - 999.0000 0.0001 0.1400 - Parameter A for cus-
tomer programmable
curve for UV2
B_UV2 0.5000 - 99.0000 0.0001 1.0000 - Parameter B for cus-
tomer programmable
curve for UV2
C_UV2 0.0000 - 1.0000 0.0001 1.0000 - Parameter C for cus-
tomer programmable
curve for UV2
D_UV2 0.000 - 10.000 0.001 0.000 - Parameter D for cus-
tomer programmable
curve for UV2
P_UV2 0.0001 - 10.0000 0.0001 0.0200 - Parameter P for cus-
tomer programmable
curve for UV2
1.6 Technical data

Table 247: General current and voltage protection (GAPC)
Measuring current input phase1, phase2, phase3, Pos- -
Seq, NegSeq, 3*ZeroSeq,
MaxPh, MinPh, UnbalancePh,
phase1-phase2,
phase2-phase3,
phase3-phase1, MaxPh-Ph,
MinPh-Ph, UnbalancePh-Ph
Base current (1 - 99999) A -
Measuring voltage input phase1, phase2, phase3, Pos- -
Seq, -NegSeq, -3*ZeroSeq,
MaxPh, MinPh, UnbalancePh,
phase1-phase2,
phase2-phase3,
phase3-phase1, MaxPh-Ph,
MinPh-Ph, UnbalancePh-Ph
Base voltage (0.05 - 2000.00) kV -
Start overcurrent, step 1 and 2 (2 - 5000)% of Ibase ± 1.0% of Ir for I<Ir
± 1.0% of I for I>Ir
Start undercurrent, step 1 and 2 (2 - 150)% of Ibase ± 1.0% of Ir for I<Ir
± 1.0% of I for I>Ir
Definite time delay (0.00 - 6000.00) s ± 0.5% ± 10 ms
Operate time start overcurrent 25 ms typically at 0 to 2 x Iset -
Reset time start overcurrent 25 ms typically at 2 to 0 x Iset -
Operate time start undercurrent 25 ms typically at 2 to 0 x Iset -
Reset time start undercurrent 25 ms typically at 0 to 2 x Iset -
451

See table 577 and table 578 Parameter ranges for customer See table 577 and table 578
defined characteristic no 17:
k: 0.05 - 999.00
A: 0.0000 - 999.0000
B: 0.0000 - 99.0000
C: 0.0000 - 1.0000
P: 0.0001 - 10.0000
PR: 0.005 - 3.000
TR: 0.005 - 600.000
CR: 0.1 - 10.0
Voltage level where voltage (0.0 - 5.0)% of Ubase ± 1.0% of Ur
memory takes over
Start overvoltage, step 1 and 2 (2.0 - 200.0)% of Ubase ± 1.0% of Ur for U<Ur
± 1.0% of U for U>Ur
Start undervoltage, step 1 and 2 (2.0 - 150.0)% of Ubase ± 1.0% of Ur for U<Ur
Operate time, start overvoltage 25 ms typically at 0 to 2 x Uset -
Reset time, start overvoltage 25 ms typically at 2 to 0 x Uset -
Operate time start undervoltage 25 ms typically 2 to 0 x Uset -
Reset time start undervoltage 25 ms typically at 0 to 2 x Uset -
High and low voltage limit, volt- (1.0 - 200.0)% of Ubase ± 1.0% of Ur for U<Ur
age dependent operation
Directional function Settable: NonDir, forward and -
reverse
Relay characteristic angle (-180 to +180) degrees ± 2.0 degrees
Relay operate angle (1 to 90) degrees ± 2.0 degrees
Reset ratio, overcurrent > 95% -
Reset ratio, undercurrent < 105% -
Reset ratio, overvoltage > 95% -
Reset ratio, undervoltage < 105% -
Overcurrent:
Undercurrent:
Overvoltage:
452

Undervoltage:
453
454
Secondary system supervision
Chapter 10 Secondary system

supervision
About this chapter

This chapter describes functions like Current circuit supervision and Fuse failure supervision.
The way the functions work, their setting parameters, function blocks, input and output signals
and technical data are included for each function.
455
Current circuit supervision (RDIF) Chapter 10
1 Current circuit supervision (RDIF)
Function block name: CCSx- IEC 60617 graphical symbol:

ANSI number:
IEC 61850 logical node name: CCSRDIF
1.1 Introduction
Open or short circuited current transformer cores can cause unwanted operation of many protec-
tion functions such as differential, earth fault current and negative sequence current functions.
It must be remembered that a blocking of protection functions at an occurring open CT circuit

will mean that the situation will remain and extremely high voltages will stress the secondary
circuit.
The current circuit supervision function compares the residual current from a three phase set of
current transformer cores with the neutral point current on a separate input taken from another
set of cores on the current transformer.
A detection of a difference indicates a fault in the circuit and is used as alarm or to block protec-
tion functions expected to give unwanted tripping.

The supervision function compares the absolute value of the vectorial sum of the three phase
currents |ΣIphase| and the numerical value of the residual current |Iref| from another current
transformer set, see figure 225.
The FAIL output will be set to a logical one when the following criteria are fulfilled:
• The numerical value of the difference |ΣIphase| – |Iref| is higher than 80% of the
numerical value of the sum |ΣIphase| + |Iref|.
• The numerical value of the current |ΣIphase| – |Iref| is equal to or higher than the
set operate value IMinOp.
• No phase current has exceeded Ip>Block during the last 10 ms.
• The current circuit supervision is enabled by setting Operation = On.
The FAIL output remains activated 100 ms after the AND-gate resets when being activated for
more than 20 ms. If the FAIL lasts for more than 150 ms a ALARM will be issued. In this case
the FAIL and ALARM will remain activated 1 s after the AND-gate resets. This prevents un-
wanted resetting of the blocking function when phase current supervision element(s) operate,
e.g. during a fault.
456
Figure 224: Simplified logic diagram for the current circuit supervision
The operate characteristic is percentage restrained, see figure 226.
457
| ∑I phase | - | I ref |
Slope = 1
Operation
Slope = 0.8
area
I MinOp
| ∑I phase | + | I ref |
99000068.vsd
Figure 225: Operate characteristics
Note!
Due to the formulas for the axis compared, |ΣIphase | - |I ref | and |Σ I phase | + | I ref | respec-
tively, the slope can not be above 2.
1.3 Function block
CCS1-
CCSRDIF
I3P FAIL
IREF ALARM
BLOCK
en05000389.vsd
Figure 226: CCS function block

Table 248: Input signals for the CCSRDIF (CCS1-) function block
Signal Description
I3P Group signal for three phase current input
IREF TBD
458
Table 249: Output signals for the CCSRDIF (CCS1-) function block
Signal Description
FAIL Detection of current circuit failure
ALARM Alarm for current circuit failure

Table 250: Basic parameter group settings for the CCSRDIF (CCS1-) function
On
IBase 1 - 99999 1 3000 A IBase value for current
level detectors
IMinOp 5 - 200 1 20 %IB Minimum operate cur-
rent differential level in %
of IBase
Table 251: Advanced parameter group settings for the CCSRDIF (CCS1-) function
Ip>Block 5 - 500 1 150 %IB Block of the function at
high phase current, in %
of IBase
1.6 Technical data

Table 252: Current circuit supervision (RDIF)
Operate current (5-200)% of Ir ± 10.0% of Ir at I ≤ Ir
± 10.0% of I at I > Ir
Block current (5-500)% of Ir ± 5.0% of Ir at I ≤ Ir
± 5.0% of I at I > Ir
459
Fuse failure supervision (RFUF) Chapter 10
2 Fuse failure supervision (RFUF)
Function block name: FSDx- IEC 60617 graphical symbol:

ANSI number:
IEC 61850 logical node name: SDDRFUF
2.1 Introduction
The aim of the fuse failure supervision function (FSD) is to block voltage measuring functions
at failures in the secondary circuits between the voltage transformer and the IED in order to
avoid unwanted operations that otherwise might occur.
The fuse failure supervision function basically has two different algorithms, negative sequence
and zero sequence based algorithm and an additional delta voltage and delta current algorithm.
The negative sequence detection algorithm is recommended for IEDs used in isolated or
high-impedance earthed networks. It is based on the negative-sequence measuring quantities, a
high value of voltage 3·U2 without the presence of the negative-sequence current 3·I2.
The zero sequence detection algorithm is recommended for IEDs used in directly or low imped-
ance earthed networks. It is based on the zero sequence measuring quantities, a high value of
voltage 3·U0 without the presence of the residual current 3·I0.
A criterion based on delta current and delta voltage measurements can be added to the fuse fail-
ure supervision function in order to detect a three phase fuse failure, which in practice is more
associated with voltage transformer switching during station operations.
For better adaptation to system requirements, an operation mode setting has been introduced
which makes it possible to select the operating conditions for negative sequence and zero se-
quence based function. The selection of different operation modes makes it possible to choose
different interaction possibilities between the negative sequence and zero sequence based algo-
rithm.

2.2.1 Zero sequence
The function can be set in five different modes by setting the parameter OpMode. The zero se-
quence function continuously measure the internal currents and voltages in all three phases and
calculate:
• the zero-sequence voltage 3U0

• the zero-sequence current 3I0.
The measured signals are compared with their respective set values 3U0< and 3I0>.
The function enable the internal signal fuseFailDetected if the measured zero sequence voltage
is higher than the set value 3U0>, the measured zero sequence current is below the set value
3I0< and the operation mode selector (OpMode is set to 2 (zero sequence mode). This will ac-
460
tivate the output signal BLKU, intended to block voltage related protection functions in the IED.
The output signal BLKZ will be activated as well if not the internal dead line detection is acti-
vaded at the same time.
If the fuseFailDetected signal is present for more than 5 seconds at the same time as all phase
voltages are below the set value UPh> and the setting parameter ISealIn is set to On, the function
will activate the output signals 3PH, BLKU and BLKZ. The same signals will aslo be activated
if all phase voltages are below the value UPh>, SealIn=On and any of the phase voltages below
the setting value for more than 5 seconds.
It is recommended to always set SealIn to On since this will secure that no unwanted operation
of fuse failure will occur at closing command of breaker when the line is already energized from
the other end. The system voltages shall be normal before fuse failure is allowed to be activated
and initiate block of different protection functions.
The output signal BLKU can also be activated if no phase voltages is below the setting UPh>
for more than 60 seconds at the same time as the zero sequence voltage is above the set value
3U0> for more than 5 seconds, all phase currents are below the setting IDLD< (operate level for
dead line detection) and the circuit breaker is closed (input CBCLOSED is activated). This con-
dition covers for fuse failure at open breaker position.
Fuse failure condition is unlatched when the normal voltage conditions are restored.
Fuse failure condition is stored in the non volatile memory in the IED. In the new start-up pro-
cedure the IED checks the stored value in its non volatile memory and establishes the corre-
sponding starting conditions.
461
TEST
TEST ACTIVE
AND
BlocFuse = Yes
BLOCK
OR
BLKTRIP
fufailStarted AND
OR
All UL less
than Uph>
3PH
AND
SealIn = On AND
5s
Any UL less AND
OR t
than Uph>
Fuse fail detected fuseFaildetected

(3U0 high and 3I0 low AND
for t>3 ms)
BLKU
AND
OR
OpMode = 2
setLatch U I
BLKZ
200 ms AND
AND OR
deadLineCondition t
150 ms
MCBOP
t
60 sec
All UL> UPh> t
AND
UN > 3U0> for
t>5 s AND
All IL < IDLD<

CBCLOSED
DISCPOS
en06000394.vsd
Figure 227: Simplified logic diagram for fuse failure supervision function, zero sequence
based
462
Input and output signals

The output signals 3PH, BLKU and BLKZ can be blocked in the following conditions:
• The input BLOCK is activated

• The input BLKTRIP is activated at the same time as the internal signal fufail-
Started is not present
• The operation mode selector OpMode is set to Off.
• The IED is in TEST status (TEST-ACTIVE is high) and the function has been
blocked from the HMI (BlockFUSE=Yes)
The input BLOCK signal is a general purpose blocking signal of the fuse failure supervision
function. It can be connected to a binary input of the IED in order to receive a block command
from external devices or can be software connected to other internal functions of the IED itself
in order to receive a block command from internal functions. Through OR gate it can be con-
nected to both binary inputs and internal function outputs.
The input BLKSP is intended to be connected to the trip output at any of the protection functions
included in the IED. When activated for more than 20 ms, the operation of the fuse failure is
blocked during a fixed time of 100 ms. The aim is to increase the security against unwanted op-
erations during the opening of the breaker, which might cause unbalance conditions for which
the fuse failure might operate.
The output signal BLKZ will also be blocked if the internal dead line detection is activated. The
block signal has a 200 ms drop-off time delay.
The input signal MCBOP is supposed to be connected via a terminal binary input to the N.C.
auxiliary contact of the miniature circuit breaker protecting the VT secondary circuit. The
MCBOP signal sets the output signals BLKU and BLKZ in order to block all the voltage related
functions when the MCB is open independent of the setting of OpMode selector. The additional
drop-off timer of 150 ms prolongs the presence of MCBOP signal to prevent the unwanted op-
eration of voltage dependent function due to non simultaneous closing of the main contacts of
the miniature circuit breaker.
The input signal DISCPOS is supposed to be connected via a terminal binary input to the N.C.
auxiliary contact of the line disconnector. The DISCPOS signal sets the output signal BLKU in
order to block the voltage related functions when the line disconnector is open. The impedance
protection function is not affected by the position of the line disconnector since there will be no
line currents that can cause maloperation of the distance protection. If DISCPOS=0 it signifies
that the line is connected to the system and when the DISCPOS=1 it signifies that the line is dis-
connected from the system and the block signal BLKU is generated.
The output BLKU can be used for blocking the voltage related measuring functions (undervolt-
age protection, synchro-check etc.) except for the impedance protection.
The function output BLKZ can be used for blocking the impedance protection function.
The BLKZ will only be activated if not the internal dead line detection is activated at the same
time.
The fuse failure condition is unlatched when the normal voltage conditions are restored.
When the output 3PH is activated, all three voltage are low.
463
2.2.2 Negative sequence

The negative sequence operates in the same way as the zero sequence, but it calculates the neg-
ative sequence component of current and voltage.
• the negative sequence current 3I2

• the negative sequence voltage 3U2
The function enable the internal signal fuseFailDetected if the measured negative sequence volt-
age is higher than the set value 3U2>, the measured negative sequence current is below the value
3I2< and the operation mode selector (OpMode) is set to 1 (negative sequence mode).
2.2.3 du/dt and di/dt

The delta function can be activated by setting the parameter OperationDUDI to On. When it is
selected On it operates in parallel with the sequence based algorithm.
The current and voltage is continuously measured in all three phases and the following quantities
are calculated:
• The change of voltage ΔU/Δt

• The change of current ΔI/Δt
The calculated delta quantities are compared with their respective set values DI< and DU>.
The delta current and delta voltage algorithm, detects a fuse failure if a sufficient negative
change in voltage amplitude without a sufficient change in current amplitude is detected in each
phase separately. This check is performed if the circuit breaker is closed. Information about the
circuit breaker position is brought to the function input CBCLOSED through a binary input of
the IED.
There are two conditions for activating the internal STDU signal and set the latch:
• The magnitude of ΔU is higher than the corresponding setting DU> and ΔI is be-
low the setting DI> in any phase at the same time as the circuit breaker is closed
(CBCLOSED = 1)
• The magnitude ΔU is higher than the setting DU> and the magnitude of ΔI is be-
low the setting DI> in any phase at the same time as the magnitude of the phase
current in the same phase is higher than the setting IPh>.
The first criterion requires that the delta condition shall be fulfilled in any phase at the same time
as circuit breaker is closed. Opening circuit breaker at one end and energizing the line from other
end onto a fault could lead to wrong start of the fuse failure function at the end with the open
breaker. If this is considering to bee an important disadvantage, connect the CBCLOSED input
to FALSE. In this way only the second criterion can activate the delta function.
The second criterion means that detection of failure in one phase together with high current for
the same phase will set the latch. The measured phase current is used to reduce the risk of false
fuse failure detection. If the current on the protected line is low, a voltage drop in the system (not
caused by fuse failure) is not by certain followed by current change and a false fuse failure might
occur. To prevent that the phase current criterion is introduced.
464
If the signal setLatchΔUΔI is set (see figure 228) and if all measured voltages are low (lower
than the setting UPh>) the output 3PH will be activated indicating fuse failure in all three phas-
es. The output BLKU and BLKZ will be activated as well.
If the signal setLatchΔUΔI is activated but not all three phases are below the setting UPh> only
BLKU will be activated.
The BLKZ will be activated as well if not the internal dead line detection is activated.
2.2.4 Operation modes

The fuse failure supervision function can be switched on or off by the setting parameter Opera-
tion to On or Off.
Negative and zero sequence algorithm

For increased flexibility and adaptation to system requirements, an operation mode selector, Op-
erationMode has been introduced to make it possible to select different operating modes for the
negative and zero sequence based algorithm. The different operation modes are:
• OpMode = 0, the negative and zero sequence function is switched off

• OpMode = 1; Negative sequence is selected
• OpMode = 2; Zero sequence is selected
• OMode = 3; Both negative and zero sequence is activated and working in parallel
in an OR-condition
• OpMode = 4; Both negative and zero sequence is activated and working in series
(AND-condition for operation)
• OpMode = 5; Optimum of negative and zero sequence (the function that has the
highest magnitude of measured negative and zero sequence current will be acti-
vated).
du/dt and di/dt algorithm

The ΔU and ΔI function can be switched on or off by the setting parameter OpDUDI to On or
Off.
2.2.5 Dead line detection

The function input signal deadLineCondition (see figure 228) is related to the internal dead line
detection function. This signal is activated from the dead line condition function when the volt-
age and the current in at least one phase is below their respective setting values UDLD< and
IDLD<. It prevents the blocking of the impedance protection by a fuse failure detection during
dead line condition (that occurs also during single pole auto-reclosing). The 200 ms drop-off
timer prolongs the dead line condition after the line-energization in order to prevent the blocking
of the impedance protection for unequal pole closing.
465
2.3 Function block
FSD1-
SDDRFUF
I3P BLKZ
U3P BLKU
BLOCK 3PH
CBCLOSED DLD1PH
MCBOP DLD3PH
DISCPOS
BLKTRIP
en05000700.vsd
Figure 228: FSD function block

Table 253: Input signals for the SDDRFUF (FSD1-) function block
Signal Description
CBCLOSED Active when circuit breaker is closed
MCBOP Active when external MCB opens protected voltage circuit
DISCPOS Active when line disconnector is open
BLKTRIP Blocks operation of function when active
Table 254: Output signals for the SDDRFUF (FSD1-) function block
Signal Description
BLKZ Start of current and voltage controlled function
BLKU General start of function
3PH Three-phase start of function
DLD1PH Dead line condition in at least one phase
DLD3PH Dead line condition in all three phases
466

Table 255: Basic parameter group settings for the SDDRFUF (FSD1-) function
On
OpMode Off - UZsIZs - Operating mode selec-
UNsINs tion
UZsIZs
UZsIZs OR
UNsINs
UZsIZs AND
UNsINs
OptimZsNs
3U0> 1 - 100 1 30 %UB Operate level of residual
overvoltage element in %
of UBase
3I0< 1 - 100 1 10 %IB Operate level of residual
undercurrent element in
% of IBase
3U2> 1 - 100 1 30 %UB Operate level of neg seq
overvoltage element in %
of UBase
3I2< 1 - 100 1 10 %IB Operate level of neg seq
undercurrent element in
% of IBase
OpDUDI Off - Off - Operation of change
On based function Off/On
DU> 1 - 100 1 60 %UB Operate level of change
in phase voltage in % of
UBase
DI< 1 - 100 1 15 %IB Operate level of change
in phase current in % of
IBase
UPh> 1 - 100 1 70 %UB Operate level of phase
voltage in % of UBase
467

IPh> 1 - 100 1 10 %IB Operate level of phase
current in % of IBase
SealIn Off - On - Seal in functionality
On Off/On
USealln< 1 - 100 1 70 %UB Operate level of seal-in
phase voltage in % of
UBase
IDLD< 1 - 100 1 5 %IB Operate level for open
phase current detection
in % of IBase
UDLD< 1 - 100 1 60 %UB Operate level for open
phase voltage detection
in % of UBase
2.6 Technical data

Table 256: Fuse failure supervision (RFUF)
Operate voltage, zero sequence (1-100)% of Ubase ± 1.0% of Ur
Operate current, zero sequence (1–100)% of Ibase ± 1.0% of Ir
Operate voltage, negative sequence (1–100)% of Ubase ± 1.0% of Ur
Operate current, negative sequence (1–100)% of Ibase ± 1.0% of Ir
Operate voltage change level (1–100)% of Ubase ± 5.0% of Ur
Operate current change level (1–100)% of Ibase ± 5.0% of Ir
468
Control
Chapter 11 Control
About this chapter

This chapter describes the control functions. The way the functions work, their setting parame-
ters, function blocks, input and output signals and technical data are included for each function.
469
Synchronizing, synchrocheck and energizing Chapter 11
check (RSYN, 25) Control
1 Synchronizing, synchrocheck and energizing

check (RSYN, 25)
Function block name: SYNx- IEC 60617 graphical symbol:

ANSI number: 25
sc/vc
SESRSYN
1.1 Introduction
The Synchronizing function allows closing of asynchronous networks at the correct moment in-
cluding the breaker closing time. The systems can thus be reconnected after an auto-reclose or
manual closing which improves the network stability.
The synchrocheck function checks that the voltages on both sides of the circuit breaker are in
synchronism, or with at least one side dead to ensure that closing can be done safely.
The function includes a built-in voltage selection scheme for double bus and one- and a half or
ring busbar arrangements.
Manual closing as well as automatic reclosing can be checked by the function and can have dif-
ferent settings.
For systems which are running asynchronous a synchronizing function is provided. The main
purpose of the synchronizing function is to provide controlled closing of circuit breakers when
two asynchronous systems are going to be connected. It is used for slip frequencies that are larg-
er than those for synchrocheck and lower than a set maximum level for the synchronizing func-
tion.

1.2.1 Basic functionality
The synchronism check function measures the conditions across the circuit breaker and com-
pares them to set limits. The output is only given when all measured quantities are simultaneous-
ly within their set limits.
The energizing check function measures the bus and line voltages and compares them to both
high and low threshold detectors. The output is only given when the actual measured quantities
match the set conditions.
The synchronizing measures the conditions across the circuit breaker, and it also determines the
angle change occurring during the closing delay of the circuit breaker, from the measured slip
frequency. The output is only given when all measured conditions are simultaneously within
their set limits. The issue of the output is timed to give closure at the optimal time including the
time for the circuit breaker and the closing circuit.
470
For single circuit breaker and 1 1/2 circuit breaker arrangements, the SYN function blocks have
the capability to make the necessary voltage selection. For single circuit breaker arrangements,
selection of the correct voltage is made using auxiliary contacts of the bus disconnectors. For 1
1/2 circuit breaker arrangements, correct voltage selection is made using auxiliary contacts of
the bus disconnectors as well as the circuit breakers
The internal logic for each function block as well as the Input and Outputs and the setting pa-
rameters with default setting and setting ranges is described in this document. For application
related information, please refer to the “Application manual”.
1.2.2 Logic diagrams

The logic diagrams that follow illustrate the main principles of the Synchrocheck function com-
ponents such as Synchronism check, Energizing check and Voltage selection, and are intended
to simplify the understanding of the function.
Synchronism check
The voltage difference, frequency difference and phase angle difference values are measured in
the IED centrally and are available for the Synchrocheck function for evaluation. If the bus volt-
age is connected as phase-phase and the line voltage as phase-neutral (or the opposite), this need
to be compensated. This is done with a setting, which scales up the line voltage to a level equal
to the bus voltage.
When the function is set to OperationSC = On, the measuring will start.
The function will compare the bus and line voltage values with the set values for UHighBusSC
and UHighLineSC.
If both sides are higher than the set values the measured values are compared with the set values
for acceptable frequency, phase angle and voltage difference FreqDiff, PhaseDiff and UDiff. If
a compensation factor is set due to the use of different voltages on the Bus and Line, the factor
is deducted from the line voltage before the comparison of the phase angle values.
The frequency on both sides of the circuit breaker is also measured. The frequencies must not
deviate from the rated frequency more than +/-5Hz. The frequency difference between the bus
frequency and the line frequency is measured and may not exceed the set value.
Two sets of settings for frequency difference and phase angle difference are available and used
for the Manual closing and Auto-Reclose functions respectively as required.
The inputs BLOCK and BLKSC are available for total block of the complete Synchrocheck
function and block of the Synchronism check function respectively. TSTSC will allow testing
of the function where the fulfilled conditions are connected to a separate test output
Two outputs MANSYOK resp. AUTOSYOK are activated when the actual measured conditions
match the set conditions for the respective output. The output signal can be delayed independent-
ly for MANSYOK conditions and for AUTOSYOK.
A number of outputs are available as information about fulfilled checking conditions. UOKSC
shows that the voltages are high, UDIFFSC, FRDIFFM/A, PHDIFFM/A shows when the volt-
age difference, frequency difference and phase angle difference conditions are met.
471
Synchronizing
When the function is set to OperationSynch=On the measuring will be performed.
The function will compare the values for the bus and line voltage with the set values for UHigh-
BusSynch and UHighLineSynch which is a supervision that the voltages are both live. If both
sides are higher than the set values the measured values are compared with the set values for ac-
ceptable frequency, rate of change of frequency, phase angle and voltage difference FreqDiff-
Max, FreqDiffMin and UDiffSynch.
Measured frequencies between the settings for the maximum and minimum frequency will ini-
tiate the measuring and the evaluation of the angle change to allow operation to be sent in the
right moment including the set tBreaker time. There is a phase angle release internally to block
any incorrect closing pulses. At operation the SYNOK output will be activated with a pulse
tClosePulse and the function reset. The function will also reset if the syncronizing conditions
are not fulfilled within the set tMaxSynch time. This will then prevent that the functions is by
mistake maintained in operation a long time waiting for conditions to be fulfilled.
The inputs BLOCK and BLKSYNCH are available for total block of the complete function resp.
of the Synchronizing part.
472
SYN1
OPERATION SYNCH
OFF
ON
TEST MODE
OFF
ON
STARTSYN SYNPROGR
AND
AND
S
BLKSYNCH
OR R
UDiffSynch
50 ms SYNOK
AND
UHighBusSynch AND t
UHighLineSynch OR
FreqDiffMax
AND
TSTSYNOK
FreqDiffMin OR
tClose
FreqRateChange Pulse
AND
fBus&fLine ± 5 Hz tMax
AND
Synch
PhaseDiff < 15 deg SYNFAIL
PhaseDiff=closing angle
en06000636.vsd
Figure 229: Simplified logic diagram for the synchronizing function
Energizing check
Voltage values are measured in the IED centrally and are available for evaluation by the Synch-
rocheck function. If the bus voltage is connected as phase-phase and the line voltage as
phase-neutral, (or the opposite) this needs to be compensated. This is done with a setting, which
scales the line voltage to a level equal to the bus voltage.
473
The function measures voltages on the busbar and the line to verify whether they are live or dead.
This is done by comparing with the set values UHighBusEnerg and ULowBusEnerg for bus en-
ergizing and UHighBusEnergand ULowBusEnerg for line energizing.
The frequency on both sides of the circuit breaker is also measured. The frequencies must not
deviate from the rated frequency more than +/-5Hz. The frequency difference between the bus
frequency and the line frequency is measured and shall not exceed a set value.
The Energizing direction can be selected individually for the Manual and the Automatic func-
tions respectively. When the conditions are met the outputs AUTOENOK and MANENOK re-
spectively will be activated if the fuse supervision conditions are fulfilled. The output signal can
be delayed independently for MANENOK conditions and for AUTOENOK. The Energizing di-
rection can also be selected by an integer input AENMODE resp MENMODE, which e.g. can
be connected to a Binary to Integer function block BI 16 (BAxx or BBxx). Integers supplied
shall be 1=off, 2=DLLB, 3=DBLL and 4= Both. Not connected input with connection of INTZ-
ERO output from Fixed Signals function block will mean that the setting is done from PST tool.
The active position can be read on outputs MODEAEN resp MODEMEN. The modes are
0=OFF, 1=DLLB, 2=DBLL and 3=Both.
The inputs BLOCK and BLKENERG are available for total block of the complete Synchrocheck
function resp. block of the Energizing check function. TSTENOK will allow testing of the func-
tion where the fulfilled conditions are connected to a separate test output.
474
Note! Similar logic for Manual Synchrocheck.
OperationSC = On
AND TSTAUTOSY
AND
TSTSC
BLKSC AND
BLOCK OR
AUTOSYOK
AND
0-60 s
AND t
tSCA
UDiffSC 50 ms
AND t
UHighBusSC
UOKSC
AND
UHighLineSC
UDIFFSC
1
FRDIFFA
FreqDiffA 1
PHDIFFA
PhaseDiffA 1
UDIFFME
voltageDifferenceValue
FRDIFFME
frequencyDifferenceValue
PHDIFFME
phaseAngleDifferenceValue
en07000114.vsd
Figure 230: Simplified logic diagram for the Synchrocheck function
Voltage selection
The voltage selection module including supervision of included voltage transformer fuses for
the different arrangements is a basic part of the Synchrocheck function and determines the pa-
rameters fed to the Synchronism check and Energizing check functions. This includes the selec-
tion of the appropriate Line and Bus voltages and fuse supervision.
The voltage selection type to be used is set with the parameter CBConfig. The different alterna-
tives are described below.
475
If NoVoltageSel is set the default voltages used will be ULine1 and UBus1. This is also the case
when external voltage selection is provided. Fuse failure supervision for the used inputs must
also be connected.
The voltage selection function selected voltages and fuse conditions are the Synchronism check
and Energizing check inputs.
For the disconnector positions it is advisable to use (NO) a and (NC) b type contacts to supply
Disconnector Open and Closed positions but it is of course also possible to use an inverter for
one of the positions.
Fuse failure supervision

External fuse-failure signals or signals from a tripped fuse switch/MCB are connected to binary
inputs that are configured to the inputs of the Synchrocheck functions in the terminal. Alterna-
tively the internal signals from fuse failure supervision can be used when available. There are
two alternative connection possibilities. Inputs labelled OK must be connected if the available
contact indicates that the voltage circuit is healthy. Inputs labelled FF must be connected if the
available contact indicates that the voltage circuit is faulty.
The SYN1(2)-UB1/2OK and SYN1(2)-UB1/2FF inputs are related to the busbar voltage and the
SYN1(2)-ULN1/2OK and SYN1(2)-ULN1/2FF inputs are related to the line voltage. Configure
them to the binary inputs or function outputs that indicate the status of the external fuse failure
of the busbar and line voltages. In the event of a fuse failure, the energizing check functions are
blocked. The synchronism check requires full voltage on both sides and will be blocked auto-
matically in the event of fuse failures.
Voltage selection for a single circuit breaker with double busbars

This function uses the binary input from the disconnectors auxiliary contacts
B1QOPEN-B1QCLD for Bus 1, and B2QOPEN-B2QCLD for Bus 2 to select between bus 1 and
bus 2 voltages. If the disconnector connected to bus 2 is closed and the disconnector connected
to bus 1 is opened the bus 2 voltage is used. All other combinations use the bus 1 voltage. The
Outputs B1SEL and B2SEL respectively indicate the selected Bus voltage.
The function also checks the fuse-failure signals for bus 1, bus 2 and line voltage transformers.
Inputs UB1OK-UB1FF supervise the fuse for Bus 1. UB2OK-UB2FF supervises the fuse for
Bus 2 and ULN1OK-ULN1FF supervises the fuse for the Line voltage transformer. The inputs
fail (FF) or healthy (OK) can alternatively be used dependent on the available signal. If a
fuse-failure is detected in the selected voltage source an output signal USELFAIL is set. This
output signal is true if the selected bus or line voltages have a fuse failure. This output as well
as the function can be blocked with the input signal BLOCK. The function logic diagram is
shown in figure 232.
476
B1QOPEN
B1SEL
B1QCLD AND
B2QOPEN B2SEL
1
B2QCLD AND
AND invalidSelection
bus1Voltage
busVoltage
bus2Voltage
UB1OK AND
UB1FF OR
OR
AND selectedFuseOK
UB2OK AND
UB2FF OR USELFAIL
AND
ULN1OK
ULN1FF OR
BLOCK
en05000779.vsd
Figure 231: Logic diagram for the voltage selection function of a single circuit breaker with
double busbars
Voltage selection for a 1 1/2 circuit breaker arrangement

Note that with 11/2 breaker schemes two Synchrocheck functions must be used in the IED (three
for two IEDs in a complete bay). Below, the scheme for one Bus breaker and the Tie breakers is
described.
This voltage selection function uses the binary inputs from the disconnectors and circuit break-
ers auxiliary contacts to select the right voltage for the Synchrocheck (Synchronism and Ener-
gizing check) function. For the bus circuit breaker one side of the circuit breaker is connected to
the busbar and the other side is connected either to line 1, line 2 or the other busbar depending
on the arrangement.
Inputs LN1QOPEN-LN1QCLD, B1QOPEN-B1QCLD, B2QOPEN-B2QCLD,

LN2QOPEN-LN2QCLD are inputs for the position of the Line disconnectors respectively the
Bus and Tie breakers. The Outputs LN1SEL, LN2SEL and B2SEL will give indication of the
selected Line voltage as a reference to the fixed Bus 1 voltage.
The fuse supervision is connected to ULNOK-ULNFF etc. and with alternative Healthy or Fail-
ing fuse signals depending on what is available for each of fuse (MCB).
477
The tie circuit breaker is connected either to bus 1 or line 1 on one side and the other side is con-
nected either to bus 2 or line 2. Four different output combinations are possible, bus to bus, bus
to line, line to bus and line to line.
• The line 1 voltage is selected if the line 1 disconnector is closed.

• The bus 1 voltage is selected if the line 1 disconnector is open and the bus 1 cir-
cuit breaker is closed.
• The line 2 voltage is selected if the line 2 disconnector is closed.
• The bus 2 voltage is selected if the line 2 disconnector is open and the bus 2 Cir-
cuit breaker is closed.
The function also checks the fuse-failure signals for bus 1, bus 2, line 1 and line 2. If a fuse-fail-
ure is detected in the selected voltage an output signal USELFAIL is set. This output signal is
true if the selected bus or line voltages have a fuse failure. This output as well as the function
can be blocked with the input signal BLOCK.The function block diagram for the voltage selec-
tion of a bus circuit breaker is shown in Figure 233: and for the tie circuit breaker in Figure 234:
478
LN1QOPEN
AND
LN1SEL
LN1QCLD
B1QOPEN
LN2SEL
B1QCLD AND AND
OR
B2SEL
LN2QOPEN
LN2QCLD AND
AND invalidSelection
AND
B2QOPEN
B2QCLD AND
line1Voltage
lineVoltage
line2Voltage
bus2Voltage
UB1OK
UB1FF OR
OR
UB2OK AND
AND selectedFuseOK
UB2FF OR
USELFAIL
ULN1OK AND
AND
ULN1FF OR
ULN2OK
AND
ULN2FF OR
BLOCK
en05000780.vsd
Figure 232: Simplified logic diagram for the voltage selection function for a bus circuit break-
er in a 1 1/2 breaker arrangement.
479
LN1QOPEN
LN1SEL
LN1QCLD AND
B1SEL
1
B1QOPEN AND
AND
B1QCLD AND
line1Voltage
busVoltage
bus1Voltage
LN2QOPEN
LN2SEL
LN2QCLD AND
B2SEL
1
OR invalidSelection
B2QOPEN AND
AND
B2QCLD AND
line2Voltage
lineVoltage
bus2Voltage
UB1OK AND
UB1FF OR
OR
UB2OK AND selectedFuseOK
AND
UB2FF OR
USELFAIL
ULN1OK AND
AND
ULN1FF OR
ULN2OK
AND
ULN2FF OR
BLOCK
en05000781.vsd
Figure 233: Simplified logic diagram for the voltage selection function for the tie circuit break-
er in 1 1/2 breaker arrangement.
1.3 Function block

The Synchrocheck function block is shown in Figure 235:. Tables describing the inputs, outputs
and setting parameters of this function are presented in the following sections of this document.
Refer to the “Application manual” for the use of inputs and outputs in your particular applica-
tion.
480
SYN1-
SESRSYN_25
U3PBB1 SYNOK
U3PBB2 AUTOSYOK
U3PLN1 AUTOENOK
U3PLN2 MANSYOK
BLOCK MANENOK
BLKSYNCH TSTSYNOK
BLKSC TSTAUTSY
BLKENERG TSTMANSY
B1QOPEN TSTENOK
B1QCLD USELFAIL
B2QOPEN B1SEL
B2QCLD B2SEL
LN1QOPEN LN1SEL
LN1QCLD LN2SEL
LN2QOPEN SYNPROGR
LN2QCLD SYNFAIL
UB1OK UOKSYN
UB1FF UDIFFSYN
UB2OK FRDIFSYN
UB2FF FRDIFFOK
ULN1OK FRDERIVA
ULN1FF UOKSC
ULN2OK UDIFFSC
ULN2FF FRDIFFA
STARTSYN PHDIFFA
TSTSYNCH FRDIFFM
TSTSC PHDIFFM
TSTENERG UDIFFME
AENMODE FRDIFFME
MENMODE PHDIFFME
MODEAEN
MODEMEN
en06000534.vsd
Figure 234: SYN function block

Table 257: Input signals for the SESRSYN_25 (SYN1-) function block
Signal Description
U3PBB1 Group signal for voltage input busbar 1
U3PBB2 Group signal for voltage input busbar 2
U3PLN1 Group signal for voltage input line 1
U3PLN2 Group signal for voltage input line 2
BLOCK General block
BLKSYNCH Block synchronizing
BLKSC Block synchro check
BLKENERG Block energizing check
B1QOPEN Open status for CB or disconnector connected to bus1
B1QCLD Close status for CB or disconnector connected to bus1
B2QOPEN Open status for CB or disconnector connected to bus2
481
Signal Description
B2QCLD Close status for CB or disconnector connected to bus2
LN1QOPEN Open status for CB or disconnector connected to line1
LN1QCLD Close status for CB or disconnector connected to line1
LN2QOPEN Open status for CB or disconnector connected to line2
LN2QCLD Close status for CB or disconnector connected to line2
UB1OK Bus1 voltage transformer OK
UB1FF Bus1 voltage transformer fuse failure
UB2OK Bus2 voltage transformer OK
UB2FF Bus2 voltage transformer fuse failure
ULN1OK Line1 voltage transformer OK
ULN1FF Line1 voltage transformer fuse failure
ULN2OK Line2 voltage transformer OK
ULN2FF Line2 voltage transformer fuse failure
STARTSYN Start synchronizing
TSTSYNCH Set synchronizing in test mode
TSTSC Set synchro check in test mode
TSTENERG Set energizing check in test mode
AENMODE Input for setting of automatic energizing mode
MENMODE Input for setting of manual energizing mode
Table 258: Output signals for the SESRSYN_25 (SYN1-) function block
Signal Description
SYNOK Synchronizing OK output
AUTOSYOK Auto synchro check OK
AUTOENOK Automatic energizing check OK
MANSYOK Manual synchro check OK
MANENOK Manual energizing check OK
TSTSYNOK Synchronizing OK test output
TSTAUTSY Auto synchro check OK test output
TSTMANSY Manual synchro check OK test output
TSTENOK Energizing check OK test output
USELFAIL Selected voltage transformer fuse failed
B1SEL Bus1 selected
B2SEL Bus2 selected
LN1SEL Line1 selected
LN2SEL Line2 selected
SYNPROGR Synchronizing in progress
SYNFAIL Synchronizing failed
482
Signal Description
UOKSYN Voltage amplitudes for synchronizing above set limits
UDIFFSYN Voltage difference out of limit for synchronizing
FRDIFSYN Frequency difference out of limit for synchronizing
FRDIFFOK Frequency difference in band for synchronizing
FRDERIVA Frequency derivative out of limit for synchronizing
UOKSC Voltage amplitudes above set limits
UDIFFSC Voltage difference out of limit
FRDIFFA Frequency difference out of limit for Auto operation
PHDIFFA Phase angle difference out of limit for Auto operation
FRDIFFM Frequency difference out of limit for Manual operation
PHDIFFM Phase angle difference out of limit for Manual Operation
UDIFFME Calculated difference in voltage
FRDIFFME Calculated difference in frequency
PHDIFFME Calculated difference of phase angle
MODEAEN Selected mode for automatic energizing
MODEMEN Selected mode for manual energizing
483

Table 259: Basic parameter group settings for the SESRSYN_25 (SYN1-) function
On
SelPhaseBus1 phase1 - phase2 - Select phase for bus1
phase2
phase3
phase1-phase2
phase2-phase3
phase3-phase1
SelPhaseBus2 phase1 - phase2 - Select phase for bus2
phase2
phase3
phase1-phase2
phase2-phase3
phase3-phase1
SelPhaseLine1 phase1 - phase2 - Select phase for line1
phase2
phase3
phase1-phase2
phase2-phase3
phase3-phase1
SelPhaseLine2 phase1 - phase2 - Select phase for line2
phase2
phase3
phase1-phase2
phase2-phase3
phase3-phase1
CBConfig No voltage sel. - No voltage sel. - Select CB configuration
Double bus
1 1/2 bus CB
1 1/2 bus alt. CB
Tie CB
UBase 0.001 - 9999.999 0.001 400.000 kV Base voltage in kV
PhaseShift -180 - 180 5 0 Deg Phase shift
URatio 0.20 - 5.00 0.01 1.00 - Voltage ratio
OperationSynch Off - Off - Operation for synchroniz-
On ing function Off/On
UHighBusSynch 50.0 - 120.0 1.0 80.0 %UB Voltage high limit bus for
synchronizing in % of
UBase
UHighLineSynch 50.0 - 120.0 1.0 80.0 %UB Voltage high limit line for
synchronizing in % of
UBase
UDiffSynch 2.0 - 50.0 1.0 10.0 %UB Voltage difference limit
for synchronizing in % of
UBase
484

FreqDiffMin 0.003 - 0.250 0.001 0.010 Hz Minimum frequency dif-
ference limit for synchro-
nizing
FreqDiffMax 0.050 - 0.250 0.001 0.200 Hz Maximum frequency dif-
ference limit for synchro-
nizing
FreqRateChange 0.000 - 0.500 0.001 0.300 Hz/s Maximum allowed fre-
quency rate of change
tBreaker 0.000 - 60.000 0.001 0.080 s Closing time of the
breaker
tClosePulse 0.050 - 60.000 0.001 0.200 s Breaker closing pulse
duration
tMaxSynch 0.00 - 6000.00 0.01 600.00 s Resets synch if no close
has been made before
set time
tMinSynch 0.000 - 60.000 0.001 2.000 s Minimum time to accept
synchronizing conditions
OperationSC Off - On - Operation for synchro-
On nism check function
Off/On
UHighBusSC 50.0 - 120.0 1.0 80.0 %UB Voltage high limit bus for
synchrocheck in % of
UBase
UHighLineSC 50.0 - 120.0 1.0 80.0 %UB Voltage high limit line for
synchrocheck in % of
UBase
UDiffSC 2.0 - 50.0 1.0 15.0 %UB Voltage difference limit in
% of UBase
FreqDiffA 0.003 - 1.000 0.001 0.010 Hz Frequency difference
limit between bus and
line Auto
FreqDiffM 0.003 - 1.000 0.001 0.010 Hz Frequency difference
line Manual
PhaseDiffA 5.0 - 90.0 1.0 25.0 Deg Phase angle difference
line Auto
PhaseDiffM 5.0 - 90.0 1.0 25.0 Deg Phase angle difference
line Manual
tSCA 0.000 - 60.000 0.001 0.100 s Time delay output for
synchrocheck Auto
tSCM 0.000 - 60.000 0.001 0.100 s Time delay output for
synchrocheck Manual
AutoEnerg Off - DBLL - Automatic energizing
DLLB check mode
DBLL
Both
485

ManEnerg Off - Both - Manual energizing check
DLLB mode
DBLL
Both
ManEnergDBDL Off - Off - Manual dead bus, dead
On line energizing
UHighBusEnerg 50.0 - 120.0 1.0 80.0 %UB Voltage high limit bus for
energizing check in % of
UBase
UHighLineEnerg 50.0 - 120.0 1.0 80.0 %UB Voltage high limit line for
UBase
ULowBusEnerg 10.0 - 80.0 1.0 40.0 %UB Voltage low limit bus for
UBase
ULowLineEnerg 10.0 - 80.0 1.0 40.0 %UB Voltage low limit line for
UBase
UMaxEnerg 80.0 - 140.0 1.0 115.0 %UB Maximum voltage for
energizing in % of UBase
tAutoEnerg 0.000 - 60.000 0.001 0.100 s Time delay for automatic
energizing check
tManEnerg 0.000 - 60.000 0.001 0.100 s Time delay for manual
energizing check
1.6 Technical data

Table 260: Synchronizing, synchrocheck check and energizing check (RSYN, 25)
Phase shift, ϕline - ϕbus (-180 to 180) degrees -
Voltage ratio, Ubus/Uline (0.20-5.00)% of Ubase -
Voltage high limit for synchro- (50.0-120.0)% of Ubase ± 1.0% of Ur at U ≤ Ur
check ± 1.0% of U at U >Ur
Reset ratio, synchrocheck > 95% -
Frequency difference limit (0.003-1.000) Hz ± 2.0 mHz
between bus and line
Phase angle difference limit (5.0-90.0) degrees ± 2.0 degrees
between bus and line
Voltage difference limit between (2.0-50.0)% of Ubase ± 1.0% of Ur
bus and line
Time delay output for synchro- (0.000-60.000) s ± 0.5% ± 10 ms
check
Voltage high limit for energizing (50.0-120.0)% of Ubase ± 1.0% of Ur at U ≤ Ur
check ± 1.0% of U at U >Ur
486

Reset ratio, voltage high limit > 95% -
Voltage low limit for energizing (10.0-80.0)% of Ubase ± 1.0% of Ur
check
Reset ratio, voltage low limit < 105% -
Maximum voltage for energizing (80.0-140.0)% of Ubase ± 1.0% of Ur at U ≤ Ur
± 1.0% of U at U >Ur
Time delay for energizing check (0.000-60.000) s ± 0.5% ± 10 ms
Operate time for synchrocheck 160 ms typically -
function
Operate time for energizing func- 80 ms typically -
tion
487
Autorecloser (RREC, 79) Chapter 11
Control
2 Autorecloser (RREC, 79)
Function block name: ARx-- IEC 60617 graphical symbol:

ANSI number: 79
O->I
SMBRREC
2.1 Introduction
The autoreclosing function provides high-speed and/or delayed auto-reclosing for single or
multi-breaker applications.
Up to five reclosing attempts can be programmed. The first attempt can be single-, two and/or
three phase for single phase or multi-phase faults respectively.
Multiple autoreclosing functions are provided for multi-breaker arrangements. A priority circuit
allows one circuit breaker to close first and the second will only close if the fault proved to be
transient.
Each autoreclosing function can be configured to co-operate with a synchrocheck function.

2.2.1 Logic Diagrams
The logic diagrams below illustrate the principles applicable in the understanding of the func-
tionality.
2.2.2 Auto-reclosing operation Off and On

Operation of the automatic reclosing can be set to Off or On via the setting parameters and
through external control. With the setting Operation=ON, the function is activated while with
the setting Operation=OFF the function is deactivated. With the setting
Operation=External ctrl, the activation/deactivation is made by input signal pulses, for example
from a control system.
When the function is set On and is operative the output SETON is activated (high). Other input
conditions such as CBPOS and CBREADY must also be fulfilled. At this point the automatic
recloser is prepared to start the reclosing cycle and the output signal READY on the AR function
block is activated (high).
2.2.3 Auto-reclosing mode selection

The Auto-reclosing mode is selected with setting AR-
Mode=3phase(0),1/2/3ph(1),1/2ph(2),1ph+1*2ph(3),1/2ph+1*3ph(4)1ph+1*2+3ph(5) The
selected mode can be read as integer as per above list on output MODE.
As an alternative to setting the mode can be selected by connecting an integer, e.g. from function
block B16I (BAxx respBBxx) to input MODEINT
488
Control
Following integers shall be used.

1=3phase,2=1/2/3ph,3=1/2ph,4=1ph+1*2ph,5=1/2ph+1*3ph or 5=1ph+1*2/3ph.
When INTZERO from Fixed signal function block is connected to the input MODEINT the pa-
rameter setting selected will be valid.
2.2.4 Start auto-reclosing and conditions for start of a reclosing cycle

The usual way in which to start a reclosing cycle, or sequence, is to start it when a line protection
tripping has occurred, by applying a signal to the START input. Should it be necessary to adjust
three-phase auto-reclosing open time, (dead time) for different power system configurations or
during tripping at different protection stages, the input STARTHS (start high-speed reclosing)
can also be used.
For a new auto-reclosing cycle to be started, a number of conditions need to be met. They are
linked to dedicated inputs. The inputs are: a) CBREADY, CB ready for a reclosing cycle, e.g.
charged operating gear, b) CBPOS to ensure that the CB was closed when the line fault occurred
and start was applied, c) No blocking or inhibit signal shall be present. After the start has been
accepted, it is latched in and an internal signal “Started” is set. It can be interrupted by certain
events, like an inhibit signal.
To start auto-reclosing by CB position Open instead of from protection trip signals, one has to
configure the CB Open position signal to inputs CBPOS and START and set a parameter Start-
ByCBOpen = ON and CBAuxContType = NormClosed (normally closed, 52b). One also has to
configure and connect signals from manual trip commands to input INHIBIT.
The logic for switching the auto-recloser ON/OFF and the starting of the reclosing is shown in
figure 236. The following should be considered.
• Setting Operation can be set to Off, External ctrl or ON. External ctrl offers the
possibility of switching by external switches to inputs ON and OFF, communi-
cation commands to the same inputs etc.
• Autoreclose AR is normally started by tripping. It is either a Zone 1 and Commu-
nication aided trip or a general trip. If the general trip is used the function must
be blocked from all back-up tripping connected to INHIBIT. In both alternatives
the breaker failure function must be connected to inhibit the function. START
makes a first attempt with synchrocheck, STARTHS makes its first attempt with-
out synchrocheck. TRSOTF starts shots 2-5.
• Circuit breaker checks that the breaker was closed for a certain length of time be-
fore the starting occurred and that the CB has sufficient stored energy to perform
an auto-reclosing sequence and is connected to inputs CBPOS and CBREADY.
489
Control
Operation:On
Operation:Off
Operation:External Ctrl
OR
ON AND SETON
AND S
OR
OFF AND R
START
STARTHS OR
OR initiate
autoInitiate
Additional conditions
TRSOTF AND
start
120 ms
CBREADY AND
t AND
AND S
tCBClosedMin
CBPOS CB Closed
t R
AND
Blocking conditions READY
AND
OR
Inhibit condistions
count 0
en05000782.vsd
Figure 235: Auto-reclosing Off/On and start
2.2.5 Control of the auto-reclosing open time for shot 1

It is possible to use up to four different time settings for the first shot, and one extension time.
There are separate settings for single-, two- and three-phase auto-reclosing open times, t1 1Ph,
t1 2Ph, t1 3Ph. If no particular input signal is applied, and an auto-reclosing program with sin-
gle-phase reclosing is selected, the auto-reclosing open time t1 1Ph will be used. If one of the
inputs TR2P or TR3P is activated in connection with the start, the auto-reclosing open time for
two-phase or three-phase reclosing is used. There is also a separate time setting facility for
three-phase high-speed auto-reclosing, t1 3PhHS available for use when required. It is activated
by input STARTHS.
An auto-reclosing open time extension delay, tExtended t1, can be added to the normal shot 1
delay. It is intended to come into use if the communication channel for permissive line protection
is lost. In a case like this there can be a significant time difference in fault clearance at the two
line ends. A longer auto-reclosing open time can then be useful. This extension time is controlled
by setting parameter Extended t1 = On and the input PLCLOST.
490
Control
2.2.6 Long trip signal

In normal circumstances the trip command resets quickly due to fault clearing. The user can set
a maximum trip pulse duration tTrip. When trip signals are longer, the auto-reclosing open time
is extended by tExtended t1. If Extended t1 = Off. A long trip signal interrupts the reclosing se-
quence in the same way as a signal to input INHIBIT.
Extended t1
PLCLOST Extend t1
initiate AND OR AND
AND
tTrip
t
AND
start
long duration
AND
(block AR)
en05000783.vsd
Figure 236: Control of extended auto-reclosing open time and long trip pulse detection
Reclosing checks and the reclaim timer

When dead time has elapsed during the auto-reclosing procedure certain conditions must be ful-
filled before the CB closing command is issued. To achieve this, signals are exchanged between
program modules to check that these conditions are met. In three-phase reclosing a synchroniz-
ing and/or energizing check can be used. It is possible to use a synchronism check function in
the same physical device or an external one. The release signal is configured by connecting to
the auto-reclosing function input SYNC. If reclosing without checking is preferred the SYNC
input can be set to TRUE (set high). Another possibility is to set the output of the synchro-check
function to a permanently activated state. At confirmation from the synchro-check, or if the re-
closing is of single-phase or two-phase type, the signal passes on. At single-phase, two-phase
reclosing and at three-phase high-speed reclosing started by STARTHS, synchronization is not
checked, and the state of the SYNC input is disregarded.
By choosing CBReadyType = CO (CB ready for a Close-Open sequence) the readiness of the
circuit breaker is also checked before issuing the CB closing command. If the CB has a readiness
contact of type CBReadyType = OCO (CB ready for an Open-Close-Open sequence) this con-
dition may not be complied with after the tripping and at the moment of reclosure. The
Open-Close-Open condition was however checked at the start of the reclosing cycle and it is
then likely that the CB is prepared for a Close-Open sequence.
The synchronism check or energizing check must be fulfilled within a set time interval, tSync.
If it is not, or if other conditions are not met, the reclosing is interrupted and blocked.
491
Control
The reclaim timer defines a time from the issue of the reclosing command, after which the re-
closing function resets. Should a new trip occur during this time, it is treated as a continuation
of the first fault. The reclaim timer is started when the CB closing command is given.
A number of outputs for Autoreclosing state control keeps track of the actual state in the reclos-
ing sequence.
492
Control
t1 1Ph
"AR Open time" timers
t
1P2PTO
From logic for t1 2Ph OR
reclosing t
programs
1P2PTO t1 3Ph HS
t
3PHSTO
3PHSTO
3PT1TO
t1 3Ph
3PT2TO t
3PT1TO
3PT3TO OR
AND
3PT4TO OR Pulse AR
3PT5TO AND
SYNC
initiate AND Blocking X
CBREADY AND OR
AR State
tSync Control
AND t
COUNTER
0 Shot 0
CL Shot 1
1
2 Shot 2
3 Shot 3
tReclaim
Pulse AR (above) AND t R 4 Shot 4
OR Shot 5
5
TR2P LOGIC Reclaim Timer On
TR3P reclosing
1PT1
programs
start 2PT1
initiate 3PHS
INPROGR
Shot 0 3PT1 OR
Shot 1 3PT2
Shot 2
Shot 3 3PT3
Shot 4
Shot 5 3PT4
PERMIT1P
3PT5
PREP3P
1
Y Blocking tInhibit
OR t
Inhibit Y
INHIBIT
en05000784.vsd
Figure 237: Reclosing Reclaim and Inhibit timers
493
Control
Pulsing of the CB closing command

The CB closing command, CLOSECB is a pulse with a duration set by parameter tPulse. For
circuit-breakers without anti-pumping function, the close pulse cutting described below can be
used. This is done by selecting the parameter CutPulse=On. In case of a new trip pulse, the clos-
ing command pulse is cut (interrupted). The minimum duration of the pulse is always 50 ms. See
figure 239
When a reclosing command is issued, the appropriate reclosing operation counter is increment-
ed. There is a counter for each type of reclosing and one for the total number of reclosing com-
mands issued.
tPulse
pulse
**) AND CLOSECB
OR
initiate
50 ms
1PT1 AND COUNT1P

counter
2PT1 AND COUNT2P

counter
3PT1 AND COUNT3P1

counter
3PT2 AND COUNT3P2

counter
3PT3 AND COUNT3P3

counter
3PT4 AND COUNT3P4

counter
3PT5 AND COUNT3P5

counter
counter COUNTAR
RSTCOUNT
**) Only if "CutPulse" = On
en05000785.vsd
Figure 238: Pulsing of closing command and driving the operation counters
Transient fault
After the reclosing command the reclaim timer tReclaim starts running for the set time. If no trip-
ping occurs within this time, the auto-reclosing will reset.
494
Control
Permanent fault and reclosing unsuccessful signal

If a new trip occurs after the CB closing command, and a new input signal START or TRSOTF
appears, the output UNSUCCL (unsuccessful closing) is set high. The timers for the first shot
can no longer be started. Depending on the setting for the number of reclosing shots, further
shots may be made or the reclosing sequence will be ended. After the reclaim time has elapsed,
the auto-reclosing function resets but the CB remains open. The CB closed data at the CBPOS
input will be missing. Because of this, the reclosing function will not be ready for a new reclos-
ing cycle.
Normally the signal UNSUCCL appears when a new trip and start is received after the last re-
closing shot has been made and the auto-reclosing function is blocked. The signal resets once
the reclaim time has elapsed. The “unsuccessful“ signal can also be made to depend on CB po-
sition input. The parameter UnsucClByCBChk should then be set to CBCheck, and a timer tUn-
sucCl should also be set. If the CB does not respond to the closing command and does not close,
but remains open, the output UNSUCCL is set high after time tUnsucCl.
initiate
block start AND
OR UNSUCCL
AND S
shot 0
R
UnsucClByCBchk = CBcheck
Pulse AR (Closing) OR tUnsucCl

AND
AND t
CBPOS CBclosed
eno5000786.vsd
Figure 239: Issue of signal UNSUCCL, unsuccessful reclosing
Automatic continuation of the reclosing sequence

The auto-reclosing function can be programmed to proceed to the following reclosing shots (if
selected) even if the start signals are not received from the protection functions, but the breaker
is still not closed. This is done by setting parameter AutoCont = On and tAutoContWait to the
required delay for the function to proceed without a new start.
495
Control
tAutoContWait
t
AND
CLOSECB
AND S Q
AND
CBPOS CBClosed
OR
initiate
START OR
en05000787.vsd
Figure 240: Automatic proceeding of shot 2 to 5
Start of reclosing from CB open information

If a user wants to apply starting auto-reclosing from CB open position instead of from protection
trip signals, the function offers such a possibility. This starting mode is selected by a setting pa-
rameter StartByCBOpen = On. One needs then to block reclosing at all manual trip operations.
Typically one also set CBAuxContType = NormClosed and connect a CB auxiliary contact of
type NC (normally closed, 52b) to inputs CBPOS and START. When the signal changes from
CB closed to CB open an auto-reclosing start pulse of limited length is generated and latched in
the function, subject to the usual checks. Then the reclosing sequence continues as usual. One
needs to connect signals from manual tripping and other functions, which shall prevent reclos-
ing, to the input INHIBIT.
496
Control
StartByCBOpen = On
1
START AND
STARTHS AND
start
≥1
100 ms
AND
100 ms
AND
en05000788.vsd
Figure 241: Pulsing of the start inputs at "StartByCBOpen=On"
2.2.7 Time sequence diagrams

Some examples of the timing of internal and external signals at typical transient and permanent
faults are shown below in figures 243 to 246.
Fault
CB POS
Closed Open Closed
CB READY
START (Trip)
SYNC
tReclaim
READY
INPROG
1PT1
ACTIVE
CLOSE CB t1 1Ph tPulse
PREP3P
SUCCL
Time
en04000196.vsd
Figure 242: Transient single-phase fault. Single -phase reclosing
497
Control
Fault
CB POS Open
Closed Open C C
CB READY
START (Trip)
TR3P
SYNC
READY
INPROGR
3PT1 t1 3Ph
3PT2 t2 3Ph
ACTIVE tReclaim
CLOSE CB tPulse tPulse
PREP3P
UNSUCCL
Time
en04000197.vsd
Figure 243: Permanent fault. Three-phase trip. Two-shot reclosing
498
Control
Fault
AR01-CBCLOSED
AR01-CBREADY(CO)
AR01-START
AR01-TR3P
AR01-SYNC
AR01-READY
AR01-INPROGR
AR01-1PT1
AR01-T1
AR01-T2
AR01-CLOSECB t1s
AR01-P3P
AR01-UNSUC
tReclaim
en04000198.vsd
Figure 244: Permanent single-phase fault. Program 1/2/3ph, single-phase single-shot reclos-
ing
499
Control
Fault
AR01-CBCLOSED
AR01-CBREADY(CO)
AR01-START
AR01-TR3P
AR01-SYNC
AR01-READY
AR01-INPROGR
AR01-1PT1
AR01-T1
AR01-T2
t2
AR01-CLOSECB t1s
AR01-P3P
AR01-UNSUC
tReclaim
en04000199.vsd
Figure 245: Permanent single-phase fault. Program 1ph + 3ph or 1/2ph + 3ph, two-shot re-
closing
500
Control
2.3 Function block
AR01-
SMBRREC_79
ON BLOCKED
OFF SETON
BLKON READY
BLKOFF ACTIVE
RESET SUCCL
INHIBIT UNSUCCL
START INPROGR
STARTHS 1PT1
TRSOTF 2PT1
SKIPHS 3PT1
ZONESTEP 3PT2
TR2P 3PT3
TR3P 3PT4
THOLHOLD 3PT5
CBREADY PERMIT1P
CBPOS PREP3P
PLCLOST CLOSECB
SYNC WFMASTER
WAIT COUNT1P
RSTCOUNT COUNT2P
MODEINT COUNT3P1
COUNT3P2
COUNT3P3
COUNT3P4
COUNT3P5
COUNTAR
MODE
en06000189.vsd
Figure 246: AR function block

Table 261: Input signals for the SMBRREC_79 (AR01-) function block
Signal Description
ON Switches the AR On (at Operation = ExternalCtrl)
OFF Switches the AR Off (at Operation = ExternalCtrl)
BLKON Sets the AR in blocked state
BLKOFF Releases the AR from the blocked state
RESET Resets the AR to initial conditions
INHIBIT Interrupts and inhibits reclosing sequence
START Reclosing sequence starts by a protection trip signal
STARTHS Start HS reclosing without SC: t13PhHS
TRSOTF Makes AR to continue to shots 2-5 at a trip from SOTF
SKIPHS Will skip the high speed shot and continue on delayed shots
ZONESTEP Coordination between local AR and down stream devices
TR2P Signal to the AR that a two-phase tripping occurred
TR3P Signal to the AR that a three-phase tripping occurred
THOLHOLD Hold the AR in wait state
501
Control
Signal Description
CBREADY CB must be ready for CO/OCO operation to allow start / close
CBPOS Status of the circuit breaker Closed/Open
PLCLOST Power line carrier or other form of permissive sigÂnal lost
SYNC Synchronizing check fulfilled (for 3Ph attempts)
WAIT Wait for master (in Multi-breaker arrangements)
RSTCOUNT Resets all counters
MODEINT Integer input used to set the reclosingMode, alternative to set-
ting
Table 262: Output signals for the SMBRREC_79 (AR01-) function block
Signal Description
BLOCKED The AR is in blocked state
SETON The AR operation is switched on, operative
READY Indicates that the AR function is ready for a new sequence
ACTIVE Reclosing sequence in progress
SUCCL Activated if CB closes during the time tUnsucCl
UNSUCCL Reclosing unsuccessful, signal resets after the reclaim time
INPROGR Reclosing shot in progress, activated during open time
1PT1 Single-phase reclosing is in progress, shot 1
2PT1 Two-phase reclosing is in progress, shot 1
3PT1 Three-phase reclosing in progress, shot 1
PERMIT1P Permit single-phase trip, inverse signal to PREP3P
PREP3P Prepare three-phase trip, control of the next trip operation
CLOSECB Closing command for CB
WFMASTER Signal to Slave issued by Master for sequential reclosing
COUNT1P Counting the number of single-phase reclosing shots
COUNT2P Counting the number of two-phase reclosing shots
COUNT3P1 Counting the number of three-phase reclosing shot 1
COUNTAR Counting total number of reclosing shots
MODE Integer output for reclosing mode
502
Control

Table 263: Basic parameter group settings for the SMBRREC_79 (AR01-) function
Operation Off - External ctrl - Off, ExternalCtrl, On
External ctrl
On
ARMode 3 phase - 1/2/3ph - The AR mode selection
1/2/3ph e.g. 3ph, 1/3ph
1/2ph
1ph+1*2ph
1/2ph+1*3ph
1ph+1*2/3ph
t1 1Ph 0.000 - 60.000 0.001 1.000 s Open time for shot 1, sin-
gle-phase
t1 3Ph 0.000 - 60.000 0.001 6.000 s Open time for shot 1,
delayed reclosing 3ph
t1 3PhHS 0.000 - 60.000 0.001 0.400 s Open time for shot 1,
high speed reclosing 3ph
tReclaim 0.00 - 6000.00 0.01 60.00 s Duration of the reclaim
time
tSync 0.00 - 6000.00 0.01 30.00 s Maximum wait time for
synchrocheck OK
tTrip 0.000 - 60.000 0.001 0.200 s Maximum trip pulse dura-
tion
tPulse 0.000 - 60.000 0.001 0.200 s Duration of the circuit
breaker closing pulse
tCBClosedMin 0.00 - 6000.00 0.01 5.00 s Min time that CB must be
closed before new
sequence allows
tUnsucCl 0.00 - 6000.00 0.01 30.00 s Wait time for CB before
indicating Unsuccess-
ful/Successful
Priority None - None - Priority selection
Low between adjacent termi-
High nals None/Low/High
tWaitForMaster 0.00 - 6000.00 0.01 60.00 s Maximum wait time for

release from Master
503
Control
Table 264: Advanced parameter group settings for the SMBRREC_79 (AR01-) function
NoOfShots 1 - 1 - Max number of reclosing
2 shots 1-5
3
4
5
StartByCBOpen Off - Off - To be set ON if AR is to
On be started by CB open
position
CBAuxContType NormClosed - NormOpen - Select the CB aux con-
NormOpen tact type NC/NO for
CBPOS input
CBReadyType CO - CO - Select type of circuit
OCO breaker ready signal
CO/OCO
two-phase
three-phase
three-phase
three-phase
three-phase
Extended t1 Off - Off - Extended open time at
On loss of permissive chan-
nel Off/On
tExtended t1 0.000 - 60.000 0.001 0.500 s 3Ph Dead time is
extended with this value
at loss of perm ch
tInhibit 0.000 - 60.000 0.001 5.000 s Inhibit reclosing reset
time
CutPulse Off - Off - Shorten closing pulse at
On a new trip Off/On
Follow CB Off - Off - Advance to next shot if
On CB has been closed dur-
ing dead time
504
Control

AutoCont Off - Off - Continue with next
On reclosing-shot if breaker
did not close
tAutoContWait 0.000 - 60.000 0.001 2.000 s Wait time after close
command before pro-
ceeding to next shot
UnsucClByCBChk NoCBCheck - NoCBCheck - Unsuccessful closing sig-
CB check nal obtained by checking
CB position
BlockByUnsucCl Off - Off - Block AR at unsuccessful
On reclosing
ZoneSeqCoord Off - Off - Coordination of down
On stream devices to local
prot unit's AR
2.6 Technical data

Table 265: Autorecloser (RREC, 79)
Number of autoreclosing shots 1-5 -
Number of autoreclosing programs 8 -
505
Control

Autoreclosing open time:
shot 1 - t1 1Ph (0.000-60.000) s ± 0.5% ± 10 ms
shot 1 - t1 2Ph
shot 1 - t1 3PhHS
shot 1 - t1 3PhDld
shot 2 - t2 (0.00-6000.00) s
shot 3 - t3
shot 4 - t4
shot 5 - t5
Extended autorecloser open time (0.000-60.000) s
Autorecloser maximum wait time for (0.00-6000.00) s
sync
Maximum trip pulse duration (0.000-60.000) s
Inhibit reset time (0.000-60.000) s
Reclaim time (0.00-6000.00) s
Minimum time CB must be closed (0.00-6000.00) s
before AR becomes ready for autore-
closing cycle
Circuit breaker closing pulse length (0.000-60.000) s
CB check time before unsuccessful (0.00-6000.00) s
Wait for master release (0.00-6000.00) s
Wait time after close command before (0.000-60.000) s
proceeding to next shot
506
Apparatus control (APC) Chapter 11
Control
3 Apparatus control (APC)
3.1 Introduction
The apparatus control is a function for control and supervision of circuit breakers, disconnectors
and earthing switches within a bay. Permission to operate is given after evaluation of conditions
from other functions such as interlocking, synchrocheck, operator place selection and external
or internal blockings.

A bay can handle, for example a power line, a transformer, a reactor, or a capacitor bank. The
different primary apparatuses within the bay can be controlled via the apparatus control function
directly by the operator or indirectly by automatic sequences.
Because a primary apparatus can be allocated to many functions within a Substation Automation
system, the object-oriented approach with a function module that handles the interaction and sta-
tus of each process object ensures consistency in the process information used by higher-level
control functions.
Primary apparatuses such as breakers and disconnectors are controlled and supervised by one
software module (SCSWI) each. Because the number and type of signals connected to a breaker
and a disconnector are almost the same, the same software is used to handle these two types of
apparatuses.
The software module is connected to the physical process in the switchyard via an interface
module by means of a number of digital inputs and outputs. One type of interface module is in-
tended for a circuit breaker (SXCBR) and another type is intended for a disconnector or earthing
switch (SXSWI). Four types of function blocks are available to cover most of the control and
supervision within the bay. These function blocks are interconnected to form a control function
reflecting the switchyard configuration. The total number used depends on the switchyard con-
figuration. These four types are:
• Bay control QCBAY

• Switch controller SCSWI
• Circuit breaker SXCBR
• Circuit switch SXSWI
The three latter functions are logical nodes according to IEC 61850. The function blocks Local-
Remote and LocRemControl, to handle the local/remote switch, and the function blocks
QCRSV and RESIN, for the reservation function, also belong to the apparatus control function.
The principles of operation, function block, input and output signals and setting parameters for
all these functions are described below.
507
Control
3.3 Bay control (QCBAY)

3.3.1 Introduction
This function is used to handle the selection of the operator place per bay. The bay control func-
tion also provides blocking functions that can be distributed to different apparatuses within the
bay.

The functionality of the bay control function is not defined in the IEC 61850–8–1 standard,
which means that the function is a vendor specific logical node.
The function sends information about the Permitted Source To Operate (PSTO) and blocking
conditions to other functions within the bay e.g. switch control functions, voltage control func-
tions and measurement functions.
Local panel switch

The local panel switch is a switch that defines the operator place selection. The switch connected
to this function can have three positions remote/local/off. The positions are here defined so that
remote means that operation is allowed from station/remote level and local from the IED level.
The local/remote switch is normally situated on the control/protection IED itself, which means
that the position of the switch and its validity information are connected internally, and not via
I/O boards. When the switch is mounted separately on the IED the signals are connected to the
function via I/O boards.
When the local panel switch is in Off position all commands from remote and local level will be
ignored. If the position for the local/remote switch is not valid the PSTO output will always be
set to faulty state (3), which means no possibility to operate.
To adapt the signals from the local HMI or from an external local/remote switch, the function
blocks LocalRemote and LocRemControl are needed and connected to QCBAY. For more in-
formation, see section 3.4 "Local/Remote switch (LocalRemote, LocRemControl)".
Permitted Source To Operate (PSTO)

The actual state of the operator place is presented by the value of the Permitted Source To Op-
erate, PSTO signal. The PSTO value is evaluated from the local/remote switch position accord-
ing to table 266. In addition, there is one configuration parameter that affects the value of the
PSTO signal. If the parameter AllPSTOValid is set and LR-switch position is in Local or Remote
state, the PSTO value is set to 5 (all), i.e. it is permitted to operate from both local and remote
level without any priority. When the external panel switch is in Off position the PSTO value
shows the actual state of switch, i.e. 0. In this case it is not possible to control anything.
508
Control
Table 266: PSTO values for different Local panel switch positions
Local panel switch PSTO value AllPSTOValid Possible locations that shall be able
positions (configuration to operate
parameter)
0 = Off 0 -- Not possible to operate
1 = Local 1 FALSE Local Panel
1 = Local 5 TRUE Local or Remote level without any priority
2 = Remote 2 FALSE Remote level
2 = Remote 5 TRUE Local or Remote level without any priority
3 = Faulty 3 -- Not possible to operate
Blockings
The blocking states for position indications and commands are intended to provide the possibil-
ity for the user to make common blockings for the functions configured within a complete bay.
The blocking facilities provided by the bay control function are the following:
• Blocking of position indications, BL_UPD. This input will block all inputs relat-
ed to apparatus positions for all configured functions within the bay.
• Blocking of commands, BL_CMD. This input will block all commands for all
configured functions within the bay.
• Blocking of function, BLOCK, signal from DO (Data Object) Behavior (IEC
61850–8–1). If DO Behavior is set to "blocked" it means that the function is ac-
tive, but no outputs are generated, no reporting, control commands are rejected
and functional and configuration data is visible.
The switching of the Local/Remote switch requires at least system operator level. The password
will be requested at an attempt to operate if authority levels have been defined in the IED. Oth-
erwise the default authority level, SuperUser, can handle the control without LogOn. The users
and passwords are defined with the UMT.
CB01-
QCBAY
LR_OFF PSTO
LR_LOC UPD_BLKD
LR_REM CMD_BLKD
LR_VALID
BL_UPD
BL_CMD
en05000796.vsd
Figure 247: CB function block
509
Control

Table 267: Input signals for the QCBAY (CB01-) function block
Signal Description
LR_OFF External Local/Remote switch is in Off position
LR_LOC External Local/Remote switch is in Local position
LR_REM External Local/Remote switch is in Remote position
LR_VALID Data representing the L/R switch position is valid
BL_UPD Steady signal to block the position updates
BL_CMD Steady signal to block the command
Table 268: Output signals for the QCBAY (CB01-) function block
Signal Description
PSTO The value for the operator place allocation
UPD_BLKD The update of position is blocked
CMD_BLKD The function is blocked for commands

Table 269: General settings for the QCBAY (CB01-) function
AllPSTOValid Priority - Priority - The priority of originators
No priority
3.4 Local/Remote switch (LocalRemote, LocRemControl)

3.4.1 Introduction
The signals from the local LCD HMI or from an external local/remote switch are applied via
function blocks LocalRemote and LocRemControl to the Bay control QCBAY function block.
A parameter in function block LocalRemote is set to choose if the switch signals are coming
from the local LCD HMI or from an external hardware switch connected via binary inputs.

The function block LocalRemote handles the signals coming from the local/remote switch. The
connections are seen in figure 249, where the inputs on function block LocalRemote are con-
nected to binary inputs if an external switch is used. When a local LCD HMI is used, the inputs
are not used and are set to FALSE in the configuration. The outputs from the LocalRemote func-
tion block control the output PSTO (Permitted Source To Operate) on QCBAY.
510
Control
LR01- CB01-
LocalRemote QCBAY
CTRLOFF OFF LR_OFF PSTO
LOCCTRL LOCAL LR_LOC UPD_BLKD
REMCTRL REMOTE LR_REM CMD_BLKD
LHMICTRL VALID LR_VALID
BL_UPD
BL_CMD
LR02- CB02-
LocalRemote QCBAY
CTRLOFF OFF LR_OFF PSTO
LOCCTRL LOCAL LR_LOC UPD_BLKD
REMCTRL REMOTE LR_REM CMD_BLKD
LHMICTRL VALID LR_VALID
BL_UPD
BL_CMD
LRC1-
LocRemControl
PSTO1 HMICTR1
PSTO2 HMICTR2
PSTO3 HMICTR3
PSTO4 HMICTR4
PSTO5 HMICTR5
PSTO6 HMICTR6
PSTO7 HMICTR7
PSTO8 HMICTR8
PSTO9 HMICTR9
PSTO10 HMICTR10
PSTO11 HMICTR11
PSTO12 HMICTR12
en05000250.vsd
Figure 248: Configuration for the local/remote handling for a local LCD HMI with two bays
and two screen pages
If the IED contains control functions for several bays, the local/remote position can be different
for the included bays. When the local LCD HMI is used the position of the local/remote switch
can be different depending on which single line diagram screen page that is presented on the lo-
cal HMI. The function block LocRemControl controls the presentation of the LEDs for the lo-
cal/remote position to applicable bay and screen page.
The switching of the Local/Remote switch requires at least system operator level. The password
will be requested at an attempt to operate if authority levels have been defined in the IED. Oth-
erwise the default authority level, SuperUser, can handle the control without LogOn. The users
and passwords are defined with the UMT.
511
Control
LR01-
LocalRemote
CT RLOFF OFF
LOCCT RL LOCAL
REMCT RL REMOT E
LHMICT RL VALID
en05000360.vsd
Figure 249: LR function block
LRC1-
LocRemControl
PST O1 HMICT R1
PST O2 HMICT R2
PST O3 HMICT R3
PST O4 HMICT R4
PST O5 HMICT R5
PST O6 HMICT R6
PST O7 HMICT R7
PST O8 HMICT R8
PST O9 HMICT R9
PST O10 HMICT R10
PST O11 HMICT R11
PST O12 HMICT R12
en05000361.vsd
Figure 250: LRC function block

Table 270: Input signals for the LocalRemote (LR01-) function block
Signal Description
CTRLOFF Disable control
LOCCTRL Local in control
REMCTRL Remote in control
LHMICTRL LHMI control
Table 271: Output signals for the LocalRemote (LR01-) function block
Signal Description
OFF Control is disabled
LOCAL Local control is activated
REMOTE Remote control is activated
VALID Outputs are valid
512
Control
Table 272: Input signals for the LocRemControl (LRC1-) function block
Signal Description
PSTO1 PSTO input channel 1
Table 273: Output signals for the LocRemControl (LRC1-) function block
Signal Description
HMICTR1 Bitmask output 1 to local remote LHMI input

Table 274: Basic general settings for the LocalRemote (LR01-) function
ControlMode Internal LR-switch - Internal LR-switch - Control mode for inter-
External LR-switch nal/external LR-switch
513
Control
3.5 Switch controller (SCSWI)

3.5.1 Introduction
The Switch controller (SCSWI) initializes and supervises all functions to properly select and op-
erate switching primary apparatuses. The Switch controller may handle and operate on one
three-phase device or three one-phase switching devices.

The function is provided with verification checks for the select - execute sequence, i.e. checks
the conditions prior each step of the operation. The involved functions for these condition veri-
fications are interlocking, reservation, blockings and synchrocheck.
Command handling
Two types of command models can be used. The two command models are "direct with en-
hanced security" and "SBO (Select-Before-Operate) with enhanced security". Which one of
these two command models that are used is defined by the parameter CtlModel. The meaning
with "direct with enhanced security" model is that no select is required. The meaning with "SBO
with enhanced security" model is that a select is required before execute.
In this function only commands with enhanced security is supported regarding changing of the
position. With enhanced security means that the command sequence is supervised in three steps,
the selection, command evaluation and the supervision of position. Each step ends up with a
pulsed signal to indicate that the respective step in the command sequence is finished. If an error
occurs in one of the steps in the command sequence, the sequence is terminated and the error is
mapped into the enumerated variable "cause" attribute belonging to the pulsed response signal
for the IEC61850 communication. The last cause L_CAUSE can be read from the function block
and used for example at commissioning. The meaning of the cause signals can be found in table
2.
Note!
There is not any relation between the command direction and the actual position. For example,
if the switch is in close position it is possible to execute a close command.
Before an executing command, an evaluation of the position is done. If the parameter PosDe-
pendent is true and the position is in intermediate state or in bad state no executing command is
send. If the parameter is false the execution command is send independent of the position value.
Evaluation of position
In the case when there are three one-phase switches connected to the switch control function, the
switch control will "merge" the position of the three switches to the resulting three-phase posi-
tion. In the case when the position differ between the one-phase switches, following principles
will be applied:
514
Control
All switches in open position: switch control position = open

All switches in close position: switch control position = close
One switch =open, two switches= close switch control position = intermediate
(or inversely):
Any switch in intermediate position: switch control position = intermediate
Any switch in bad state: switch control position = bad state
The time stamp of the output three-phase position from switch control will have the time stamp
of the last changed phase when it goes to end position. When it goes to intermediate position or
bad state, it will get the time stamp of the first changed phase.
In addition, there is also the possibility that one of the one-phase switches will change position
at any time due to a trip. Such situation is here called pole discordance and is supervised by this
function. In case of a pole discordance situation, i.e. the position of the one-phase switches are
not equal for a time longer than the setting tPoleDiscord, an error signal POLEDISC will be set.
In the supervision phase, the switch controller function evaluates the "cause" values from the
switch modules XCBR/XSWI. At error the "cause" value with highest priority is shown.
Blocking principles
The blocking signals are normally coming from the bay control function (QCBAY) and via the
IEC61850 communication from the operator place.
The different blocking possibilities are:
• Block/deblock of command. It is used to block command for operation of posi-

tion.
• Blocking of function, BLOCK, signal from DO (Data Object) Behavior
(IEC61850). If DO Behavior is set to "blocked" it means that the function is ac-
Note!
The different block conditions will only affect the operation of this function, i.e. no blocking sig-
nals will be "forwarded" to other functions. The above blocking outputs are stored in a non-vol-
atile memory.
Interaction with synchrocheck and synchronizing functions

The switch controller works in conjunction with the synchrocheck and the synchronizing func-
tion SECRSYN. It is assumed that the synchrocheck function is continuously in operation and
gives the result to the SCSWI. The result from the synchrocheck function is evaluated during the
close execution. If the operator performs an override of the synchrocheck, the evaluation of the
synchrocheck state is omitted. When there is a positive confirmation from the synchrocheck
function, the switch controller SCSWI will send the close signal EXE_CL to the switch function
SXCBR.
515
Control
When there is no positive confirmation from the synchrocheck function, the SCSWI will send a
start signal START_SY to the synchronizing function, which will send the closing command to
the SXCBR when the synchronizing conditions are fulfilled, see figure 252. If no synchronizing
function is included, the timer for supervision of the "synchronizing in progress signal" is set to
0, which means no start of the synchronizing function. The SCSWI will then set the attribute
"blocked-by-synchrocheck" in the "cause" signal. See also the time diagram in figure 256.
SCSWI SXCBR
EXE_CL
OR CLOSE
SYNC_OK
START_SY
SY_INPRO
SECRSYN
CLOSE. CB
Synchro Synchronizing
Check function
en05000091.vsd
Figure 251: Example of interaction between SCSWI, SECRSYN (synchrocheck and synchroniz-
ing function) and SXCBR function
Time diagrams
The SCSWI function has timers for evaluating different time supervision conditions. These tim-
ers are explained here.
The timer tSelect is used for supervising the time between the select and the execute command
signal, i.e. the time the operator has to perform the command execution after the selection of the
object to operate.
516
Control
select
execute command
tSelect
timer t1 t1>tSelect, then long-
operation-time in 'cause'
is set
en05000092.vsd
Figure 252: tSelect
The parameter tResResponse is used to set the maximum allowed time to make the reservation,
i.e. the time between reservation request and the feedback reservation granted from all bays in-
volved in the reservation function.
select
reservation request RES_RQ
reservation granted RES_GRT
command termination
tResResponse t1>tResResponse, then
timer 1-of-n-control in 'cause'
t1 is set
en05000093.vsd
Figure 253: tResResponse
The timer tExecutionFB supervises the time between the execute command and the command
termination, see figure 255.
517
Control
execute command
position L1 open
close
position L2 open
close
position L3 open
close
cmd termination L1
cmd termination L2
cmd termination L3
cmd termination *
position open
close
tExecutionFB t1>tExecutionFB, then

timer long-operation-time in
t1 'cause' is set
* The cmd termination will be delayed one execution sample.

en05000094.vsd
Figure 254: tExecutionFB
The parameter tSynchrocheck is used to define the maximum allowed time between the execute
command and the input SYNC_OK to become true. If SYNC_OK=true at the time the execute
command signal is received, the timer "tSynchrocheck" will not start. The start signal for the
synchronizing is obtained if the synchrocheck conditions are not fulfilled.
518
Control
execute command
SYNC_OK
tSynchrocheck
t1
START_SY
SY_INPRO
tSynchronizing t2>tSynchronizing, then

t2 blocked-by-synchrocheck in
'cause' is set
en05000095.vsd
Figure 255: tSynchroCheck and tSynchronizing
Error handling
Depending on what error that occurs during the command sequence the error signal will be set
with a value. Table 275 describes vendor specific cause values in addition to these specified in
IEC 61850-8-1 standard. The list of values of the “cause” are in order of priority. The values are
available over the IEC 61850. An output L_CAUSE on the function block indicates the latest
value of the error during the command.
Table 275: Values for "cause" signal in priority order

Apparatus control Description
function
–22 wrongCTLModel
–23 blockedForCommand
–24 blocked-for-open-command
–25 blocked-for-close-command
–30 longOperationTime
–31 switch-not-start-moving
–32 persistent-intermediate-state
–33 switch-returned-to-initial-position
–34 switch-in-bad-state
–35 not-expected-final-position
519
Control
CS01-
SCSWI
BLOCK EXE_OP
PSTO EXE_CL
L_SEL SELECTED
L_OPEN RES_RQ
L_CLOSE START_SY
AU_OPEN POSITION
AU_CLOSE OPENPOS
BL_CMD CLOSEPOS
RES_GRT POLEDISC
RES_EXT CMD_BLK
SY_INPRO L_CAUSE
SYNC_OK XOUT
EN_OPEN
EN_CLOSE
XPOS1
XPOS2
XPOS3
en05000337.vsd
Figure 256: CS function block

Table 276: Input signals for the SCSWI (CS01-) function block
Signal Description
PSTO Operator place selection
L_SEL Select signal from local panel
L_OPEN Open signal from local panel
L_CLOSE Close signal from local panel
AU_OPEN Used for local automation function
AU_CLOSE Used for local automation function
BL_CMD Steady signal for block of the command
RES_GRT Positive acknowledge that all reservations are made
RES_EXT Reservation is made externally
SY_INPRO Synchronizing function in progress
SYNC_OK Closing is permitted at set to true by the synchrocheck
EN_OPEN Enables open operation
EN_CLOSE Enables close operation
XPOS1 Group signal for XCBR input
520
Control
Table 277: Output signals for the SCSWI (CS01-) function block
Signal Description
EXE_OP Execute command for open direction
EXE_CL Execute command for close direction
SELECTED The select conditions are fulfilled
RES_RQ Request signal to the reservation function
START_SY Starts the synchronizing function
POSITION Position indication
OPENPOS Open position indication
CLOSEPOS Closed position indication
POLEDISC The positions for poles L1-L3 are not equal after a set time
CMD_BLK Commands are blocked
L_CAUSE Latest value of the error indication during command
XOUT Execution information to XCBR/XSWI

Table 278: Basic general settings for the SCSWI (CS01-) function
CtlModel Dir Norm - SBO Enh - Specifies the type for
SBO Enh (ABB) control model according
Dir Norm (ABB) to IEC 61850
SBO Enh
PosDependent Always permitted - Always permitted - Permission to operate
Not perm at 00/11 depending on the posi-
tion
tSelect 0.000 - 60.000 0.001 30.000 s Max time between select
and execute signals
tResResponse 0.000 - 60.000 0.001 5.000 s Allowed time from reser-
vation request to reserva-
tion granted
tSynchrocheck 0.00 - 6000.00 0.01 10.00 s Allowed time for synchro-
check to fulfil close condi-
tions
tSynchronizing 0.000 - 60.000 0.001 0.000 s Supervision time to get
the signal synchronizing
in progress
tExecutionFB 0.000 - 60.000 0.001 30.000 s Max time from command
execution to termination
tPoleDiscord 0.000 - 60.000 0.001 2.000 s Allowed time to have dis-
crepancy between the
poles
521
Control
3.6 Circuit breaker (SXCBR)

3.6.1 Introduction
The purpose of this function is to provide the actual status of positions and to perform the control
operations, i.e. pass all the commands to primary apparatuses in the form of circuit breakers via
output boards and to supervise the switching operation and position.

The intended user of this function is other functions such as e.g. Switch controller, protection
functions, autorecloser function or an IEC 61850 client residing in another IED or the operator
place. This switch function executes commands, evaluate block conditions and evaluate differ-
ent time supervision conditions. Only if all conditions indicate a switch operation to be allowed,
the function performs the execution command. In case of erroneous conditions, the function in-
dicates an appropriate "cause" value.
The function has an operation counter for closing and opening commands. The counter value
can be read remotely from the operator place. The value is reset from a binary input or remotely
from the operator place.
Local/Remote switch
One binary input signal LR_SWI is included in this function to indicate the local/remote switch
position from switchyard provided via the I/O board. If this signal is set to TRUE it means that
change of position is allowed only from switchyard level. If the signal is set to FALSE it means
that command from IED or higher level is permitted. When the signal is set to TRUE all com-
mands (for change of position) from internal IED clients are rejected, even trip commands from
protection functions are rejected. The functionality of the local/remote switch is described in
figure 258.
Local= Operation at
UE switch yard level
TR
From I/O switchLR

FAL
SE
Remote= Operation at
IED or higher level
en05000096.vsd
Figure 257: Local/Remote switch
Blocking principles
The function includes several blocking principles. The basic principle for all blocking signals is
that they will affect commands from all other clients e.g. operators place, protection functions,
autoreclosure etc.
The blocking possibilities are:
• Block/deblock for open command. It is used to block operation for open com-
mand. Note that this block signal also affects the input OPEN for immediate com-
mand.
522
Control
• Block/deblock for close command. It is used to block operation for close com-
mand. Note that this block signal also affects the input CLOSE for immediate
command.
• Update block/deblock of positions. It is used to block the updating of position
values. Other signals related to the position will be reset.
The above blocking outputs are stored in a non-volatile memory.
Substitution
The substitution part in this function is used for manual set of the position for the switch. The
typical use of substitution is that an operator enters a manual value because that the real process
value is erroneous of some reason. The function will then use the manually entered value instead
of the value for positions determined by the process.
Note!
It is always possible to make a substitution, independently of the position indication and the sta-
tus information of the I/O board. When substitution is enabled, the position values are blocked
for updating and other signals related to the position are reset. The substituted values are stored
in a non-volatile memory.
Time diagrams
There are two timers for supervising of the execute phase, tStartMove and tIntermediate. tStart-
Move supervises that the primary device starts moving after the execute output pulse is sent. tIn-
termediate defines the maximum allowed time for intermediate position. Figure 259 explains
these two timers during the execute phase.
523
Control
EXE_CL AdaptivePulse = TRUE

Close pulse duration
OPENPOS
CLOSEPOS
if t1 > tStartMove then

tStartMove timer "switch-not-start-moving"
t1 attribute in 'cause' is set
tStartMove
if t2 > tIntermediate then

tIntermediate timer "persisting-intermediate-state"
tIntermediate
en05000097.vsd
Figure 258: The timers tStartMove and tIntermediate
The timers tOpenPulse and tClosePulse are the length of the execute output pulses to be sent to
the primary equipment. Note that the output pulses for open and close command can have dif-
ferent pulse lengths. The pulses can also be set to be adaptive with the configuration parameter
AdaptivePulse. Figure 260 shows the principle of the execute output pulse. The adaptively pa-
rameter will have affect on both execute output pulses.
OPENPOS
CLOSEPOS
AdaptivePulse=FALSE
EXE_CL
tClosePulse
AdaptivePulse=TRUE
EXE_CL
tClosePulse
en05000098.vsd
Figure 259: Execute output pulse
524
Control
If the pulse is set to be adaptive, it is not possible for the pulse to exceed tOpenPulse or
tClosePulse.
The execute output pulses are reset when:
• the new expected final position is reached and the configuration parameter Adap-
tivePulse is set to true
• the timer tOpenPulse or tClosePulse has elapsed
• an error occurs due to the switch does not start moving, i.e. tStartMove has
elapsed.
Note!
If the start position indicates bad state (OPENPOS=1 and CLOSEPOS =1) when a command is
executed the execute output pulse resets only when timer "tOpenPulse" or "tClosePulse" has
elapsed.
There is one exception from the first item above. If the primary device is in open position and
an open command is executed or if the primary device is in close position and a close command
is executed. In these cases, with the additional condition that the configuration parameter Adap-
tivePulse is true, the execute output pulse is always activated and resets when tStartMove has
elapsed. If the configuration parameter AdaptivePulse is set to false the execution output re-
mains active until the pulse duration timer has elapsed.
An example of when a primary device is open and an open command is executed is shown in
figure 261 .
OPENPOS
CLOSEPOS
EXE_OP AdaptivePulse=FALSE
tOpenPulse
EXE_OP AdaptivePulse=TRUE
tOpenPulse
tStartMove timer
en05000099.vsd
Figure 260: Open command with open position indication
525
Control
Error handling
Table 279: Vendor specific cause values for Apparatus control in priority order
function
–22 wrongCTLModel
XC01-
SXCBR
BLOCK GRPConABS1
LR_SWI EXE_OP
OPEN GRPConABS2
CLOSE EXE_CL
BL_OPEN SUBSTED
BL_CLOSE OP_BLKD
BL_UPD CL_BLKD
POSOPEN UPD_BLKD
POSCLOSE POSITION
TR_OPEN OPENPOS
TR_CLOSE CLOSEPOS
RS_CNT TR_POS
XIN CNT_VAL
TERVALUE L_CAUSE
OSEVALUE
PENVALUE
en05000338.vsd
Figure 261: XC function block
526
Control

Table 280: Input signals for the SXCBR (XC01-) function block
Signal Description
LR_SWI Local/Remote switch indication from switchyard
OPEN Pulsed signal used to immediately open the switch
CLOSE Pulsed signal used to immediately close the switch
BL_OPEN Signal to block the open command
BL_CLOSE Signal to block the close command
BL_UPD Steady signal for block of the position updating
POSOPEN Signal for open position of apparatus from I/O
POSCLOSE Signal for close position of apparatus from I/O
TR_OPEN Signal for open position of truck from I/O
TR_CLOSE Signal for close position of truck from I/O
RS_CNT Resets the operation counter
XIN Execution information from CSWI
Table 281: Output signals for the SXCBR (XC01-) function block
Signal Description
XPOS Group signal for XCBR output
EXE_OP Executes the command for open direction
EXE_CL Executes the command for close direction
SUBSTED Indication that the position is substituted
OP_BLKD Indication that the function is blocked for open commands
CL_BLKD Indication that the function is blocked for close commands
UPD_BLKD The update of position indication is blocked
POSITION Apparatus position indication
OPENPOS Apparatus open position
CLOSEPOS Apparatus closed position
TR_POS Truck position indication
CNT_VAL The value of the operation counter
527
Control

Table 282: Basic general settings for the SXCBR (XC01-) function
tStartMove 0.000 - 60.000 0.001 0.100 s Supervision time for the
apparatus to move after a
command
tIntermediate 0.000 - 60.000 0.001 0.150 s Allowed time for interme-
diate position
AdaptivePulse Not adaptive - Not adaptive - The output resets when a
Adaptive new correct end position
is reached
tOpenPulse 0.000 - 60.000 0.001 0.200 s Output pulse length for
open command
tClosePulse 0.000 - 60.000 0.001 0.200 s Output pulse length for
close command
3.7 Circuit switch (SXSWI)

3.7.1 Introduction
The purpose of this function is to provide the actual status of positions and to perform the control
operations, i.e. pass all the commands to primary apparatuses in the form of disconnectors or
earthing switches via output boards and to supervise the switching operation and position.

The intended user of this function is other functions such as e.g. Switch controller, protection
functions, autorecloser function or a 61850 client residing in another IED or the operator place.
This switch function executes commands, evaluate block conditions and evaluate different time
supervision conditions. Only if all conditions indicate a switch operation to be allowed, the func-
tion performs the execution command. In case of erroneous conditions, the function indicates an
appropriate "cause" value.
The function has an operation counter for closing and opening commands. The counter value
can be read remotely from the operator place. The value is reset from a binary input or remotely
from the operator place.
Local/Remote switch
One binary input signal LR_SWI is included in this function to indicate the local/remote switch
position from switchyard provided via the I/O board. If this signal is set to TRUE it means that
change of position is allowed only from switchyard level. If the signal is set to FALSE it means
that command from IED or higher level is permitted. When the signal is set to TRUE all com-
mands (for change of position) from internal IED clients are rejected, even trip commands from
protection functions are rejected. The functionality of the local/remote switch is described in
figure 263.
528
Control
Local= Operation at
UE switch yard level
TR
From I/O switchLR

FAL
SE
Remote= Operation at
IED or higher level
en05000096.vsd
Figure 262: Local/Remote switch
Blocking principles
The function includes several blocking principles. The basic principle for all blocking signals is
that they will affect commands from all other clients e.g. operators place, protection functions,
autoreclosure etc.
The blocking possibilities are:
• Block/deblock for open command. It is used to block operation for open com-
mand. Note that this block signal also affects the input OPEN for immediate com-
mand.
• Block/deblock for close command. It is used to block operation for close com-
mand. Note that this block signal also affects the input CLOSE for immediate
command.
• Update block/deblock of positions. It is used to block the updating of position
values. Other signals related to the position will be reset.
The above blocking outputs are stored in a non-volatile memory.
Substitution
The substitution part in this function is used for manual set of the position for the switch. The
typical use of substitution is that an operator enters a manual value because that the real process
value is erroneous of some reason. The function will then use the manually entered value instead
of the value for positions determined by the process.
Note!
It is always possible to make a substitution, independently of the position indication and the sta-
tus information of the I/O board. When substitution is enabled, the position values are blocked
for updating and other signals related to the position are reset. The substituted values are stored
in a non-volatile memory.
529
Control
Time diagrams
There are two timers for supervising of the execute phase, tStartMove and tIntermediate. tStart-
Move supervises that the primary device starts moving after the execute output pulse is sent. tIn-
termediate defines the maximum allowed time for intermediate position. Figure 264 explains
these two timers during the execute phase.
EXE_CL AdaptivePulse = TRUE

Close pulse duration
OPENPOS
CLOSEPOS
if t1 > tStartMove then

tStartMove timer "switch-not-start-moving"
tStartMove
if t2 > tIntermediate then

tIntermediate timer "persisting-intermediate-state"
tIntermediate
en05000097.vsd
Figure 263: The timers tStartMove and tIntermediate
The timers tOpenPulse and tClosePulse are the length of the execute output pulses to be sent to
the primary equipment. Note that the output pulses for open and close command can have dif-
ferent pulse lengths. The pulses can also be set to be adaptive with the configuration parameter
AdaptivePulse. Figure 265 shows the principle of the execute output pulse. The adaptively pa-
rameter will have affect on both execute output pulses.
530
Control
OPENPOS
CLOSEPOS
AdaptivePulse=FALSE
EXE_CL
tClosePulse
AdaptivePulse=TRUE
EXE_CL
tClosePulse
en05000098.vsd
Figure 264: Execute output pulse
If the pulse is set to be adaptive, it is not possible for the pulse to exceed tOpenPulse or
tClosePulse.
The execute output pulses are reset when:
• the new expected final position is reached and the configuration parameter Adap-
tivePulse is set to true
• the timer tOpenPulse or tClosePulse has elapsed
• an error occurs due to the switch does not start moving, i.e. tStartMove has
elapsed.
Note!
If the start position indicates bad state (OPENPOS=1 and CLOSEPOS =1) when a command is
executed the execute output pulse resets only when timer "tOpenPulse" or "tClosePulse" has
elapsed.
There is one exception from the first item above. If the primary device is in open position and
an open command is executed or if the primary device is in close position and a close command
is executed. In these cases, with the additional condition that the configuration parameter Adap-
tivePulse is true, the execute output pulse is always activated and resets when tStartMove has
elapsed. If the configuration parameter AdaptivePulse is set to false the execution output re-
mains active until the pulse duration timer has elapsed.
An example when a primary device is open and an open command is executed is shown in
figure 266.
531
Control
OPENPOS
CLOSEPOS
EXE_OP AdaptivePulse=FALSE
tOpenPulse
EXE_OP AdaptivePulse=TRUE
tOpenPulse
tStartMove timer
en05000099.vsd
Figure 265: Open command with open position indication
Error handling
Table 283: Values for "cause" signal in priority order

function
–22 wrongCTLModel
532
Control
XS01-
SXSWI
BLOCK XPOS
LR_SWI EXE_OP
OPEN EXE_CL
CLOSE SUBSTED
BL_OPEN OP_BLKD
BL_CLOSE CL_BLKD
BL_UPD UPD_BLKD
POSOPEN POSITION
POSCLOSE OPENPOS
RS_CNT CLOSEPOS
XIN CNT_VAL
L_CAUSE
en05000339.vsd
Figure 266: XS function block

Table 284: Input signals for the SXSWI (XS01-) function block
Signal Description
LR_SWI Local/Remote switch indication from switchyard
OPEN Pulsed signal used to immediately open the switch
CLOSE Pulsed signal used to immediately close the switch
BL_OPEN Signal to block the open command
BL_CLOSE Signal to block the close command
BL_UPD Steady signal for block of the position updating
POSOPEN Signal for open position of apparatus from I/O
POSCLOSE Signal for close position of apparatus from I/O
RS_CNT Resets the operation counter
XIN Execution information from CSWI
Table 285: Output signals for the SXSWI (XS01-) function block
Signal Description
XPOS Group signal for XSWI output
EXE_OP Executes the command for open direction
EXE_CL Executes the command for close direction
SUBSTED Indication that the position is substituted
OP_BLKD Indication that the function is blocked for open commands
CL_BLKD Indication that the function is blocked for close commands
UPD_BLKD The update of position indication is blocked
533
Control
Signal Description
POSITION Apparatus position indication
OPENPOS Apparatus open position
CLOSEPOS Apparatus closed position
CNT_VAL The value of the operation counter

Table 286: Basic general settings for the SXSWI (XS01-) function
tStartMove 0.000 - 60.000 0.001 3.000 s Supervision time for the
apparatus to move after a
command
tIntermediate 0.000 - 60.000 0.001 15.000 s Allowed time for interme-
diate position
AdaptivePulse Not adaptive - Not adaptive - The output resets when a
Adaptive new correct end position
is reached
tOpenPulse 0.000 - 60.000 0.001 0.200 s Output pulse length for
open command
tClosePulse 0.000 - 60.000 0.001 0.200 s Output pulse length for
close command
SwitchType Load Break - Disconnector - Switch Type
Disconnector
Earthing Switch
HS Earthing
Switch
3.8 Bay reserve (QCRSV)

3.8.1 Introduction
The purpose of the reservation function is primarily to transfer interlocking information between
IEDs in a safe way and to prevent double operation in a bay, switchyard part, or complete sub-
station.

The function block QCRSV handles the reservation. The function starts to operate in two ways.
It starts when there is a request for reservation of the own bay or if there is a request for reser-
vation from another bay. It is only possible to reserve the function if it is not currently reserved.
The signal that can reserve the own bay is the input signal RES_RQx (x=1-8) coming from
switch controller SCWI. The signals for request from another bay are the outputs RE_RQ_B and
V_RE_RQ from function block RESIN. These signals are included in signal EXCH_OUT from
RESIN and are connected to RES_DATA in QCRSV.
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Control
The parameters ParamRequestx (x=1-8) are chosen at reservation of the own bay only (TRUE)
or other bays (FALSE). To reserve the own bay only means that no reservation request
RES_BAYS is created.
Reservation request of own bay

If the reservation request comes from the own bay, the function QCRSV has to know which ap-
paratus the request comes from. This information is available with the input signal RES_RQx
and parameter ParamRequestx (where x=1-8 is the number of the requesting apparatus). In order
to decide if a reservation request of the current bay can be permitted QCRSV has to know wheth-
er the own bay already is reserved by itself or another bay. This information is available in the
output signal RESERVED.
If the RESERVED output is not set, the selection is made with the output RES_GRTx (where
x=1-8 is the number of the requesting apparatus), which is connected to switch controller SC-
SWI. If the bay already is reserved the command sequence will be reset and the SCSWI will set
the attribute "1-of-n-control" in the "cause" signal.
Reservation of other bays

When the function QCRSV receives a request from an apparatus in the own bay that requires
other bays to be reserved as well, it checks if it already is reserved. If not, it will send a request
to the other bays that are predefined (to be reserved) and wait for their response (acknowledge).
The request of reserving other bays is done by activating the output RES_BAYS.
When it receives acknowledge from the bays via the input RES_DATA, it sets the output
RES_GRTx (where x=1-8 is the number of the requesting apparatus). If not acknowledgement
from all bays is received within a certain time defined in SCSWI (tResResponse), the SCSWI
will reset the reservation and set the attribute "1-of-n-control" in the "cause" signal.
Reservation request from another bay

When another bay requests for reservation, the input BAY_RES in corresponding function block
RESIN is activated. The signal for reservation request is grouped into the output signal
EXCH_OUT in RESIN, which is connected to input RES_DATA in QCRSV. If the bay is not
reserved, the bay will be reserved and the acknowledgment from output ACK_T_B is sent back
to the requested bay. If the bay already is reserved the reservation is kept and no acknowledg-
ment is sent.
Blocking and overriding of reservation

If the function QCRSV is blocked (input BLK_RES is set to true) the reservation is blocked.
That is, no reservation can be made from the own bay or any other bay. This can be set, for ex-
ample, via a binary input from an external device to prevent operations from another operator
place at the same time.
The reservation function can also be overridden in the own bay with the OVERRIDE input sig-
nal, i.e. reserving the own bay without waiting for the external acknowledge.
Bay with more than eight apparatuses

If only one instance of QCRSV is used for a bay i.e. use of up to eight apparatuses, the input
EXCH_IN must be set to FALSE.
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Control
If there are more than eight apparatuses in the bay there has to be one additional QCRSV. The
both functions QCRSV have to communicate and this is done through the input EXCH_IN and
EXCH_OUT according to figure 10. If more then one QCRSV are used, the execution order is
very important. The execution order must be in the way that the first QCRSV has a lower number
than the next one.
CR01-
QCRSV
EXCH_IN RES_GRT1
RES_RQ1 RES_GRT2
RES_RQ2 RES_GRT3
RES_RQ3 RES_GRT4
RES_RQ4 RES_GRT5
RES_RQ5 RES_GRT6
RES_RQ6 RES_GRT7
RES_RQ7 RES_GRT8
RES_RQ8 RES_BAYS
BLK_RES ACK_TO_B
OVERRIDE RESERVED
RES_DATA EXCH_OUT
CR02-
QCRSV
EXCH_IN RES_GRT1
RES_RQ1 RES_GRT2
RES_BAYS
RES_RQ2 RES_GRT3 ≥1
RES_RQ3 RES_GRT4
RES_RQ4 RES_GRT5
RES_RQ5 RES_GRT6 ACK_TO_B
RES_RQ6 RES_GRT7 ≥1
RES_RQ7 RES_GRT8
RES_RQ8 RES_BAYS
BLK_RES ACK_TO_B
≥1 RESERVED
OVERRIDE RESERVED
RES_DATA EXCH_OUT
en05000088.vsd
Figure 267: Connection of two QCRSV function blocks
536
Control
CR01-
QCRSV
EXCH_IN RES_GRT 1
RES_RQ1 RES_GRT 2
RES_RQ2 RES_GRT 3
RES_RQ3 RES_GRT 4
RES_RQ4 RES_GRT 5
RES_RQ5 RES_GRT 6
RES_RQ6 RES_GRT 7
RES_RQ7 RES_GRT 8
RES_RQ8 RES_BAYS
BLK_RES ACK_T O_B
OVERRIDE RESERVED
RES_DAT A EXCH_OUT
en05000340.vsd
Figure 268: CR function block

Table 287: Input signals for the QCRSV (CR01-) function block
Signal Description
EXCH_IN Used for exchange signals between different BayRes blocks
RES_RQ1 Signal for app. 1 that requests to do a reservation
BLK_RES Reservation is not possible and the output signals are reset
OVERRIDE Signal to override the reservation
RES_DATA Reservation data coming from function block ResIn
Table 288: Output signals for the QCRSV (CR01-) function block
Signal Description
RES_GRT1 Reservation is made and the app. 1 is allowed to operate
537
Control
Signal Description
RES_BAYS Request for reservation of other bays
ACK_TO_B Acknowledge to other bays that this bay is reserved
RESERVED Indicates that the bay is reserved
EXCH_OUT Used for exchange signals between different BayRes blocks

Table 289: General settings for the QCRSV (CR01-) function
tCancelRes 0.000 - 60.000 0.001 10.000 s Supervision time for can-
celing the reservation
ParamRequest1 Other bays res. - Only own bay res. - Reservation of the own
Only own bay res. bay only, at selection of
apparatus 1
apparatus 2
apparatus 3
apparatus 4
apparatus 5
apparatus 6
apparatus 7
apparatus 8
3.9 Reservation input (RESIN)

3.9.1 Introduction
The function block RESIN receives the reservation information from other bays. The number of
instances is the same as the number of involved bays (up to 60 instances are available).
538
Control

The reservation input function is based purely on Boolean logic conditions. The logic diagram
in figure 270 shows how the output signals are created. The inputs of the function block are con-
nected to a receive function block representing signals transferred over the station bus from an-
other bay.
EXCH_IN INT
BIN
ACK_F_B
&
FutureUse
≥1
ANY_ACK
BAY_ACK ≥1
VALID_TX
&
BAY_VAL ≥1
RE_RQ_B
≥1
BAY_RES &
V _RE_RQ
≥1
BIN
EXCH_OUT
INT
en05000089.vsd
Figure 269: Logic diagram for RESIN
Figure 271 describes the principle of the data exchange between all RESIN modules in the cur-
rent bay. There is one RESIN function block per "other bay" used in the reservation mechanism.
The output signal EXCH_OUT in the last RESIN functions block are connected to the module
QCRSV that handles the reservation function in the own bay. The value to the input EXCH_IN
on the first RESIN module in the chain has the integer value 5. This is provided by the use of
instance number one of the function block RESIN (RE01-), where the input EXCH_IN is set to
#5, but is hidden for the user.
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Control
RE01-
RESIN
BAY_ACK ACK_F_B
Bay 1 BAY_VAL ANY_ACK
BAY_RES VALID_TX
RE_RQ_B
V_RE_RQ
EXCH_OUT
RE02-
RESIN
EXCH_IN ACK_F_B
BAY_ACK ANY_ACK
Bay 2 BAY_VAL VALID_TX
BAY_RES RE_RQ_B
V_RE_RQ
EXCH_OUT
REnn-
RESIN
EXCH_IN ACK_F_B
BAY_ACK ANY_ACK
CR01-
Bay n BAY_VAL VALID_TX
BAY_RES RE_RQ_B QCRSV
V_RE_RQ
EXCH_OUT RES_DATA
en05000090.vsd
Figure 270: Diagram of the chaining principle for RESIN
RE01-
RESIN
BAY_ACK ACK_F_B
BAY_VAL ANY_ACK
BAY_RES VALID_TX
RE_RQ_B
V_RE_RQ
EXCH_OUT
en05000341.vsd
Figure 271: RE function block

Table 290: Input signals for the RESIN (RE01-) function block
Signal Description
BAY_ACK Another bay has acknow. the reservation req. from this bay
BAY_VAL The reserv. and acknow. signals from another bay are valid
BAY_RES Request from other bay to reserve this bay
540
Control
Table 291: Output signals for the RESIN (RE01-) function block
Signal Description
ACK_F_B All other bays have acknow. the reserv. req. from this bay
ANY_ACK Any other bay has acknow. the reserv. req. from this bay
VALID_TX The reserv. and acknow. signals from other bays are valid
RE_RQ_B Request from other bay to reserve this bay
V_RE_RQ Check if the request of reserving this bay is valid
EXCH_OUT Used for exchange signals between different ResIn blocks

Table 292: Basic general settings for the RESIN (RE01-) function
FutureUse Bay in use - Bay in use - The bay for this ResIn
Bay future use block is for future use
541
Interlocking Chapter 11
Control
4 Interlocking
4.1 Introduction
The interlocking function blocks the possibility to operate high-voltage switching devices, for
instance when a disconnector is under load, in order to prevent material damage and/or acciden-
tal human injury.
Each control IED has interlocking functions for different switchyard arrangements, each han-
dling the interlocking of one bay. The function is distributed to each control IED and not depen-
dent on any central function. For the station-wide interlocking, the IEDs communicate via the
station bus or by using hard wired binary inputs/outputs.
The interlocking conditions depend on the circuit configuration and status of the installation at
any given time.

The interlocking function consists of software modules located in each control IED. The func-
tion is distributed and not dependent on any central function. Communication between modules
in different bays is performed via the station bus.
The reservation function (see section 3 "Apparatus control (APC)") is used to ensure that HV
apparatuses that might affect the interlock are blocked during the time gap, which arises between
position updates. This can be done by means of the communication system, reserving all HV ap-
paratuses that might influence the interlocking condition of the intended operation. The reserva-
tion is maintained until the operation is performed.
After the selection and reservation of an apparatus, the function has complete data on the status
of all apparatuses in the switchyard that are affected by the selection. Other operators cannot in-
terfere with the reserved apparatus or the status of switching devices that may affect it.
The open or closed positions of the HV apparatuses are inputs to software modules distributed
in the control IEDs. Each module contains the interlocking logic for a bay. The interlocking log-
ic in a module is different, depending on the bay function and the switchyard arrangements, that
is, double-breaker or 1 1/2 breaker bays have different modules. Specific interlocking conditions
and connections between standard interlocking modules are performed with an engineering tool.
Bay-level interlocking signals can include the following kind of information:
• Positions of HV apparatuses (sometimes per phase)

• Valid positions (if evaluated in the control module)
• External release (to add special conditions for release)
• Line voltage (to block operation of line earthing switch)
• Output signals to release the HV apparatus
The interlocking module is connected to the surrounding functions within a bay as shown in fig-
ure 273.
542
Control
Apparatus control
Interlocking
modules
modules in
SCILO SCSWI SXSWI
other bays
Apparatus control
modules
Interlocking SCILO SCSWI SXCBR
module
Apparatus control
modules
en04000526.vsd SCILO SCSWI SXSWI
Figure 272: Interlocking module on bay level.
Bays communicate via the station bus and can convey information regarding the following:
• Unearthed busbars
• Busbars connected together
• Other bays connected to a busbar
• Received data from other bays is valid
Figure 274 illustrates the data exchange principle.
543
Control
Station bus
Bay 1 Bay n Bus coupler
Disc QB1 and QB2 closed Disc QB1 and QB2 closed WA1 unearthed
WA1 unearthed
WA1 and WA2 interconn
WA1 not earthed WA1 not earthed
WA2 not earthed
... WA2 not earthed
in other bay
..
WA1
WA2
QB1 QB2 QB1 QB2 QB1 QB2 QC1 QC2
QA1 QA1 QA1
QB9 QB9
en05000494.vsd
Figure 273: Data exchange between interlocking modules.
When invalid data such as intermediate position, loss of a control terminal, or input board error
are used as conditions for the interlocking condition in a bay, a release for execution of the func-
tion will not be given.
On the station HMI an override function exists, which can be used to bypass the interlocking
function in cases where not all the data required for the condition is valid.
For all interlocking modules these general rules apply:
• The interlocking conditions for opening or closing of disconnectors and earthing

switches are always identical.
• Earthing switches on the line feeder end, e.g. rapid earthing switches, are normal-
ly interlocked only with reference to the conditions in the bay where they are lo-
cated, not with reference to switches on the other side of the line. So a line voltage
indication may be included into line interlocking modules. If there is no line volt-
age supervision within the bay, then the appropriate inputs must be set to no volt-
age, and the operator must consider this when operating.
• Earthing switches can only be operated on isolated sections e.g. without
load/voltage. Circuit breaker contacts cannot be used to isolate a section, i.e. the
status of the circuit breaker is irrelevant as far as the earthing switch operation is
concerned.
• Disconnectors cannot break power current or connect different voltage systems.
Disconnectors in series with a circuit breaker can only be operated if the circuit
breaker is open, or if the disconnectors operate in parallel with other closed con-
544
Control
nections. Other disconnectors can be operated if one side is completely isolated,

or if the disconnectors operate in parallel to other closed connections, or if they
are earthed on both sides.
• Circuit breaker closing is only interlocked against running disconnectors in its
bay or additionally in a transformer bay against the disconnectors and earthing
switch on the other side of the transformer, if there is no disconnector between
CB and transformer.
• Circuit breaker opening is only interlocked in a bus-coupler bay, if a bus bar
transfer is in progress.
To make the implementation of the interlocking function easier, a number of standardized and
tested software interlocking modules containing logic for the interlocking conditions are avail-
able:
• Line for double and transfer busbars, ABC_LINE

• Bus for double and transfer busbars, ABC_BC
• Transformer bay for double busbars, AB_TRAFO
• Bus-section breaker for double busbars, A1A2_BS
• Bus-section disconnector for double busbars, A1A2_DC
• Busbar earthing switch, BB_ES
• Double CB Bay, DB_BUS_A, DB_LINE, DB_BUS_B
• 1 1/2-CB diameter, BH_LINE_A, BH_CONN, BH_LINE_B
The interlocking conditions can be altered, to meet the customers specific requirements, by add-
ing configurable logic by means of the graphical configuration tool PCM 600. The inputs
Qx_EXy on the interlocking modules are used to add these specific conditions.
The input signals EXDU_xx shall be set to true if there is no transmission error at the transfer
of information from other bays. Required signals with designations ending in TR are intended
for transfer to other bays.
4.3 Logical node for interlocking (SCILO)

4.3.1 Introduction
The function SCILO is used to enable a switching operation if the interlocking conditions per-
mit. The function itself does not provide any interlocking functionality. The interlocking condi-
tions are generated in separate function blocks containing the interlocking logic.

The function contains logic to enable the open and close commands respectively if the interlock-
ing conditions are fulfilled. That means also, if the switch has a defined end position e.g. open,
then the appropriate enable signal (in this case EN_OPEN) is false. The enable signals
EN_OPEN and EN_CLOSE can be true at the same time only in the intermediate and bad posi-
tion state and if they are enabled by the interlocking function. The position inputs come from the
logical nodes Circuit breaker/switch SXCBR/SXSWI and the enable signals come from the in-
terlocking logic. The outputs are connected to the logical node Switch controller SCSWI. One
instance per switching device is needed.
545
Control
POSOPEN SCILO
POSCLOSE =1 1
EN_OPEN
&
>1
&
OPEN_EN
CLOSE_EN & EN_CLOSE
>1
&
en04000525.vsd
Figure 274: SCILO function logic diagram
CI01-
SCILO
POSOPEN EN_OPEN
POSCLOSE EN_CLOSE
OPEN_EN
CLOSE_EN
en05000359.vsd
Figure 275: CI function block

Table 293: Input signals for the SCILO (CI01-) function block
Signal Description
POSOPEN Open position of switch device
POSCLOSE Closed position of switch device
OPEN_EN Open operation from interlocking logic is enabled
CLOSE_EN Close operation from interlocking logic is enabled
Table 294: Output signals for the SCILO (CI01-) function block
Signal Description
EN_OPEN Open operation at closed or interm. or bad pos. is enabled
EN_CLOSE Close operation at open or interm. or bad pos. is enabled
546
Control
4.4 Interlocking for line bay (ABC_LINE)

4.4.1 Introduction
The interlocking module ABC_LINE is used for a line connected to a double busbar arrange-
ment with a transfer busbar according to figure 277. The module can also be used for a double
busbar arrangement without transfer busbar or a single busbar arrangement with/without transfer
busbar.
W A1 (A)
W A2 (B)
W A7 (C)
QB1 QB2 QB7
QC1
QA1
QC2
QB9
QC9
en04000478.vsd
Figure 276: Switchyard layout ABC_LINE
547
Control
IF01-
ABC_LINE
QA1_OP QA1CLREL
QA1_CL QA1CLIT L
QB9_OP QB9REL
QB9_CL QB9IT L
QB1_OP QB1REL
QB1_CL QB1IT L
QB2_OP QB2REL
QB2_CL QB2IT L
QB7_OP QB7REL
QB7_CL QB7IT L
QC1_OP QC1REL
QC1_CL QC1IT L
QC2_OP QC2REL
QC2_CL QC2IT L
QC9_OP QC9REL
QC9_CL QC9IT L
QC11_OP QB1OPT R
QC11_CL QB1CLT R
QC21_OP QB2OPT R
QC21_CL QB2CLT R
QC71_OP QB7OPT R
QC71_CL QB7CLT R
BB7_D_OP QB12OPT R
BC_12_CL QB12CLT R
BC_17_OP VPQB1T R
BC_17_CL VPQB2T R
BC_27_OP VPQB7T R
BC_27_CL VPQB12T R
VOLT _OFF
VOLT _ON
VP_BB7_D
VP_BC_12
VP_BC_17
VP_BC_27
EXDU_ES
EXDU_BPB
EXDU_BC
QB9_EX1
QB9_EX2
QB1_EX1
QB1_EX2
QB1_EX3
QB2_EX1
QB2_EX2
QB2_EX3
QB7_EX1
QB7_EX2
QB7_EX3
QB7_EX4
en05000357.vsd
Figure 277: IF function block
548
Control
4.4.3 Logic diagram
ABC_LINE
QA1_OP
QA1_CL =1 VPQA1
QB9_OP
QB9_CL =1 VPQB9
QA1CLREL
QB1_OP
QB1_CL =1 VPQB1 QA1CLITL
& 1
QB2_OP
QB2_CL =1 VPQB2
QB7_OP
QB7_CL =1 VPQB7
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC9_OP
QC9_CL =1 VPQC9
QC11_OP
QC11_CL =1 VPQC11
QC21_OP
QC21_CL =1 VPQC21
QC71_OP
QC71_CL =1 VPQC71
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQA1
VPQC1 QB9REL
VPQC2 & >1
QB9ITL
1
VPQC9
QA1_OP
QC1_OP
QC2_OP
QC9_OP
QB9_EX1
VPQC2
VPQC9
&
QC2_CL
QC9_CL
QB9_EX2
en04000527.vsd
549
Control
QB1REL
VPQA1 & ≥1
VPQB2
VPQC1 1 QB1ITL
VPQC2
VPQC11
QA1_OP
QB2_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQB2 &
VP_BC_12
QB2_CL
BC_12_CL
EXDU_BC
QB1_EX2
VPQC1 &
VPQC11
QC1_CL
QC11_CL
EXDU_ES
QB1EX3
en04000528.vsd
550
Control
QB2REL
VPQA1 & ≥1
VPQB1
VPQC1 1 QB2ITL
VPQC2
VPQC21
QA1_OP
QB1_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQB1 &
VP_BC_12
QB1_CL
BC_12_CL
EXDU_BC
QB2_EX2
VPQC1 &
VPQC21
QC1_CL
QC21_CL
EXDU_ES
QB2_EX3
en04000529.vsd
551
Control
VPQC9 QB7REL
& >1
VPQC71
VP_BB7_D 1 QB7ITL
VP_BC_17
VP_BC_27
QC9_OP
QC71_OP
EXDU_ES
BB7_D_OP
EXDU_BPB
BC_17_OP
BC_27_OP
EXDU_BC
QB7_EX1
VPQA1
VPQB1
VPQC9
&
VPQB9
VPQC71
VP_BB7_D
VP_BC_17
QA1_CL
QB1_CL
QC9_OP
QB9_CL
QC71_OP
EXDU_ES
BB7_D_OP
EXDU_BPB
BC_17_CL
EXDU_BC
QB7_EX2
552
Control
VPQA1
VPQB2
& >1
VPQC9
VPQB9
VPQC71
VP_BB7_D
VP_BC_27
QA1_CL
QB2_CL
QC9_OP
QB9_CL
QC71_OP
EXDU_ES
BB7_D_OP
EXDU_BPB
BC_27_CL
EXDU_BC
QB7_EX3
VPQC9
VPQC71
&
QC9_CL
QC71_CL
EXDU_ES
QB7_EX4
VPQB1 QC1REL
VPQB2 QC1ITL
VPQB9 & 1
QC2REL
QB1_OP
QB2_OP QC2ITL
1
QB9_OP
VPQB7
VPQB9 QC9REL
VPVOLT &
QC9ITL
QB7_OP 1
QB9_OP
VOLT_OFF
en04000531.vsd
553
Control
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
QB7_OP QB7OPTR
QB7_CL QB7CLTR
VPQB7 VPQB7TR
QB1_OP QB12OPTR
QB2_OP >1 QB12CLTR
VPQB1 1
VPQB12TR
VPQB2 &
en04000532.vsd

Table 295: Input signals for the ABC_LINE (IF01-) function block
Signal Description
QA1_OP QA1 is in open position
QA1_CL QA1 is in closed position
QB9_OP QB9 is in open position
QB9_CL QB9 is in closed position
QC1_OP QC1 is in open position
QC1_CL QC1 is in closed position
QC11_OP Earthing switch QC11 on busbar WA1 is in open position
QC11_CL Earthing switch QC11 on busbar WA1 is in closed position
554
Control
Signal Description
BB7_D_OP Disconnectors on busbar WA7 except in the own bay are open
BC_12_CL A bus coupler connection exists between busbar WA1 and WA2
BC_17_OP No bus coupler connection exists between busbar WA1 and
WA7
BC_27_OP No bus coupler connection exists between busbar WA2 and
WA7
VOLT_OFF There is no voltage on the line and not VT (fuse) failure
VOLT_ON There is voltage on the line or there is a VT (fuse) failure
VP_BB7_D Switch status of the disconnectors on busbar WA7 are valid
VP_BC_12 Status of the bus coupler app. between WA1 and WA2 are valid
EXDU_ES No transm error from any bay containing earthing switches
EXDU_BPB No transm error from any bay with disconnectors on WA7
EXDU_BC No transmission error from any bus coupler bay
QB9_EX1 External condition for apparatus QB9
555
Control
Table 296: Output signals for the ABC_LINE (IF01-) function block
Signal Description
QA1CLREL Closing of QA1 is allowed
QA1CLITL Closing of QA1 is forbidden
QB9REL Switching of QB9 is allowed
QB9ITL Switching of QB9 is forbidden
QC1REL Switching of QC1 is allowed
QC1ITL Switching of QC1 is forbidden
QB1OPTR QB1 is in open position
QB1CLTR QB1 is in closed position
QB12OPTR QB1 or QB2 or both are in open position
QB12CLTR QB1 and QB2 are not in open position
VPQB1TR Switch status of QB1 is valid (open or closed)
VPQB12TR Switch status of QB1 and QB2 are valid (open or closed)
4.5 Interlocking for bus-coupler bay (ABC_BC)

4.5.1 Introduction
The interlocking module ABC_BC is used for a bus-coupler bay connected to a double busbar
arrangement according to figure 279. The module can also be used for a single busbar arrange-
ment with transfer busbar or double busbar arrangement without transfer busbar.
556
Control
WA1 (A)
WA2 (B)
WA7 (C)
QB1 QB2 QB20 QB7
QC1
QA1
QC2
en04000514.vsd
Figure 278: Switchyard layout ABC_BC
557
Control
IG01-
ABC_BC
QA1_OP QA1OPREL
QA1_CL QA1OPIT L
QB1_OP QA1CLREL
QB1_CL QA1CLIT L
QB2_OP QB1REL
QB2_CL QB1IT L
QB7_OP QB2REL
QB7_CL QB2IT L
QB20_OP QB7REL
QB20_CL QB7IT L
QC1_OP QB20REL
QC1_CL QB20IT L
QC2_OP QC1REL
QC2_CL QC1IT L
QC11_OP QC2REL
QC11_CL QC2IT L
QC21_OP QB1OPT R
QC21_CL QB1CLT R
QC71_OP QB220OT R
QC71_CL QB220CT R
BBT R_OP QB7OPT R
BC_12_CL QB7CLT R
VP_BBT R QB12OPT R
VP_BC_12 QB12CLT R
EXDU_ES BC12OPT R
EXDU_12 BC12CLT R
EXDU_BC BC17OPT R
QA1O_EX1 BC17CLT R
QA1O_EX2 BC27OPT R
QA1O_EX3 BC27CLT R
QB1_EX1 VPQB1T R
QB1_EX2 VQB220T R
QB1_EX3 VPQB7T R
QB2_EX1 VPQB12T R
QB2_EX2 VPBC12T R
QB2_EX3 VPBC17T R
QB20_EX1 VPBC27T R
QB20_EX2
QB7_EX1
QB7_EX2
en05000350.vsd
Figure 279: IG function block
558
Control
4.5.3 Logic diagram
ABC_BC
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB20_OP
QB20_CL =1 VPQB20
QB7_OP
QB7_CL =1 VPQB7
QB2_OP
QB2_CL =1 VPQB2
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC11_OP
QC11_CL =1 VPQC11
QC21_OP
QC21_CL =1 VPQC21
QC71_OP
QC71_CL =1 VPQC71
VPQB1
QB1_OP QA1OPREL
& >1 QA1OPITL
QA1O_EX1 1
VPQB20
QB20_OP &
QA1O_EX2
VP_BBTR
BBTR_OP &
EXDU_12
QA1O_EX3
VPQB1 QA1CLREL
VPQB2 QA1CLITL
VPQB7 & 1
VPQB20
en04000533.vsd
559
Control
VPQA1
VPQB2 QB1REL
& >1
VPQC1 QB1ITL
VPQC2 1
VPQC11
QA1_OP
QB2_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQB2
VP_BC_12
&
QB2_CL
BC_12_CL
EXDU_BC
QB1_EX2
VPQC1
VPQC11
&
QC1_CL
QC11_CL
EXDU_ES
QB1_EX3
en04000534.vsd
560
Control
VPQA1
VPQB1 QB2REL
& >1
VPQC1 QB2ITL
VPQC2 1
VPQC21
QA1_OP
QB1_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQB1
VP_BC_12
&
QB1_CL
BC_12_CL
EXDU_BC
QB2_EX2
VPQC1
VPQC21
&
QC1_CL
QC21_CL
EXDU_ES
QB2_EX3
en04000535.vsd
561
Control
VPQA1
VPQB20 QB7REL
& >1
VPQC1 QB7ITL
VPQC2 1
VPQC71
QA1_OP
QB20_OP
QC1_OP
QC2_OP
QC71_OP
EXDU_ES
QB7_EX1
VPQC2
VPQC71
&
QC2_CL
QC71_CL
EXDU_ES
QB7_EX2
VPQA1
VPQB7 QB20REL
& >1
VPQC1 QB20ITL
VPQC2 1
VPQC21
QA1_OP
QB7_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB20_EX1
VPQC2
VPQC21
&
QC2_CL
QC21_CL
EXDU_ES
QB20_EX2
en04000536.vsd
562
Control
VPQB1 QC1REL
VPQB20 QC1ITL
& 1
VPQB7
QC2REL
VPQB2
QB1_OP QC2ITL
1
QB20_OP
QB7_OP
QB2_OP
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB20_OP QB220OTR
QB2_OP & QB220CTR
VPQB20 1
VQB220TR
VPQB2 &
QB7_OP QB7OPTR
QB7_CL QB7CLTR
VPQB7 VPQB7TR
QB1_OP QB12OPTR
QB2_OP >1 QB12CLTR
VPQB1 1
VPQB12TR
VPQB2 &
QA1_OP BC12OPTR
QB1_OP >1 BC12CLTR
QB20_OP 1
VPQA1
VPBC12TR
VPQB1 &
VPQB20
QA1_OP BC17OPTR
QB1_OP >1 BC17CLTR
QB7_OP 1
VPQA1
VPBC17TR
VPQB1 &
VPQB7
QA1_OP BC27OPTR
QB2_OP >1 BC27CLTR
QB7_OP 1
VPQA1
VPBC27TR
VPQB2 &
VPQB7
en04000537.vsd
563
Control

Table 297: Input signals for the ABC_BC (IG01-) function block
Signal Description
BBTR_OP No busbar transfer is in progress
VP_BBTR Status are valid for app. involved in the busbar transfer
EXDU_12 No transm error from any bay connected to WA1/WA2 busbars
EXDU_BC No transmission error from any other bus coupler bay
QA1O_EX1 External open condition for apparatus QA1
564
Control
Signal Description
Table 298: Output signals for the ABC_BC (IG01-) function block
Signal Description
QA1OPREL Opening of QA1 is allowed
QA1OPITL Opening of QA1 is forbidden
QB220OTR QB2 and QB20 are in open position
QB220CTR QB2 or QB20 or both are not in open position
BC12OPTR No connection via the own bus coupler between WA1 and WA2
BC12CLTR Conn. exists via the own bus coupler between WA1 and WA2
565
Control
Signal Description
VQB220TR Switch status of QB2 and QB20 are valid (open or closed)
VPBC12TR Status of the bus coupler app. between WA1 and WA2 are valid
4.6 Interlocking for transformer bay (AB_TRAFO)

4.6.1 Introduction
The interlocking module AB_TRAFO is used for a transformer bay connected to a double bus-
bar arrangement according to figure 281. The module is used when there is no disconnector be-
tween circuit breaker and transformer. Otherwise, the module ABC_LINE can be used. This
module can also be used in single busbar arrangements.
WA1 (A)
WA2 (B)
QB1 QB2
QC1
QA1
AB_TRAFO
QC2
QC3
QA2
QA2 and QC4 are not
QC4 used in this interlocking
QB3 QB4
en04000515.vsd
Figure 280: Switchyard layout AB_TRAFO
566
Control
IE01-
AB_TRAFO
QA1_OP QA1CLREL
QA1_CL QA1CLIT L
QB1_OP QB1REL
QB1_CL QB1IT L
QB2_OP QB2REL
QB2_CL QB2IT L
QC1_OP QC1REL
QC1_CL QC1IT L
QC2_OP QC2REL
QC2_CL QC2IT L
QB3_OP QB1OPT R
QB3_CL QB1CLT R
QB4_OP QB2OPT R
QB4_CL QB2CLT R
QC3_OP QB12OPT R
QC3_CL QB12CLT R
QC11_OP VPQB1T R
QC11_CL VPQB2T R
QC21_OP VPQB12T R
QC21_CL
BC_12_CL
VP_BC_12
EXDU_ES
EXDU_BC
QA1_EX1
QA1_EX2
QA1_EX3
QB1_EX1
QB1_EX2
QB1_EX3
QB2_EX1
QB2_EX2
QB2_EX3
en05000358.vsd
Figure 281: IE function block
567
Control
4.6.3 Logic diagram
AB_TRAFO
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB2_OP
QB2_CL =1 VPQB2
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QB3_OP
QB3_CL =1 VPQB3
QB4_OP
QB4_CL =1 VPQB4
QC3_OP
QC3_CL =1 VPQC3
QC11_OP
QC11_CL =1 VPQC11
QC21_OP
QC21_CL =1 VPQC21
VPQB1 QA1CLREL
VPQB2 QA1CLITL
VPQC1 & 1
VPQC2
VPQB3
VPQB4
VPQC3
QA1_EX2
QC3_OP
QA1_EX3
QC1_CL >1
QC2_CL
QC3_CL &
QA1_EX1
en04000538.vsd
568
Control
VPQA1
VPQB2 QB1REL
& >1
VPQC1 QB1ITL
VPQC2 1
VPQC3
VPQC11
QA1_OP
QB2_OP
QC1_OP
QC2_OP
QC3_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQB2
VPQC3
&
VP_BC_12
QB2_CL
QC3_OP
BC_12_CL
EXDU_BC
QB1_EX2
VPQC1
VPQC2
&
VPQC3
VPQC11
QC1_CL
QC2_CL
QC3_CL
QC11_CL
EXDU_ES
QB1_EX3
en04000539.vsd
569
Control
VPQA1
VPQB1 QB2REL
& >1
VPQC1 QB2ITL
VPQC2 1
VPQC3
VPQC21
QA1_OP
QB1_OP
QC1_OP
QC2_OP
QC3_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQB1
VPQC3
&
VP_BC_12
QB1_CL
QC3_OP
BC_12_CL
EXDU_BC
QB2_EX2
VPQC1
VPQC2
&
VPQC3
VPQC21
QC1_CL
QC2_CL
QC3_CL
QC21_CL
EXDU_ES
QB2_EX3
en04000540.vsd
570
Control
VPQB1 QC1REL
VPQB2 QC1ITL
& 1
VPQB3
QC2REL
VPQB4
QB1_OP QC2ITL
1
QB2_OP
QB3_OP
QB4_OP
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
QB1_OP QB12OPTR
QB2_OP >1 QB12CLTR
VPQB1 1
VPQB12TR
VPQB2 &
en04000541.vsd

Table 299: Input signals for the AB_TRAFO (IE01-) function block
Signal Description
QC11_OP QC11 on busbar WA1 is in open position
571
Control
Signal Description
QC11_CL QC11 on busbar WA1 is in closed position
QC21_OP QC21 on busbar WA2 is in open position
QC21_CL QC21 on busbar WA2 is in closed position
EXDU_BC No transmission error from any bus coupler bay
QA1_EX1 External condition for apparatus QA1
Table 300: Output signals for the AB_TRAFO (IE01-) function block
Signal Description
572
Control
4.7 Interlocking for bus-section breaker (A1A2_BS)

4.7.1 Introduction
The interlocking module A1A2_BS is used for one bus-section circuit breaker between section
1 and 2 according to figure 283. The module can be used for different busbars, which includes
a bus-section circuit breaker.
WA1 (A1) WA2 (A2)
QC1 QB1 QB2 QC2
QA1
QC3 QC4
en04000516.vsd
A1A2_BS
Figure 282: Switchyard layout A1A2_BS
573
Control
IH01-
A1A2_BS
QA1_OP QA1OPREL
QA1_CL QA1OPIT L
QB1_OP QA1CLREL
QB1_CL QA1CLIT L
QB2_OP QB1REL
QB2_CL QB1IT L
QC3_OP QB2REL
QC3_CL QB2IT L
QC4_OP QC3REL
QC4_CL QC3IT L
S1QC1_OP QC4REL
S1QC1_CL QC4IT L
S2QC2_OP S1S2OPT R
S2QC2_CL S1S2CLT R
BBT R_OP QB1OPT R
VP_BBT R QB1CLT R
EXDU_12 QB2OPT R
EXDU_ES QB2CLT R
QA1O_EX1 VPS1S2T R
QA1O_EX2 VPQB1T R
QA1O_EX3 VPQB2T R
QB1_EX1
QB1_EX2
QB2_EX1
QB2_EX2
en05000348.vsd
Figure 283: IH function block
574
Control
4.7.3 Logic diagram
A1A2_BS
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB2_OP
QB2_CL =1 VPQB2
QC3_OP
QC3_CL =1 VPQC3
QC4_OP
QC4_CL =1 VPQC4
S1QC1_OP
S1QC1_CL =1 VPS1QC1
S2QC2_OP
S2QC2_CL =1 VPS2QC2
VPQB1
QB1_OP QA1OPREL
& >1
QA1O_EX1 QA1OPITL
1
VPQB2
QB2_OP
&
QA1O_EX2
VP_BBTR
BBTR_OP
&
EXDU_12
QA1O_EX3
VPQB1 QA1CLREL
VPQB2 & QA1CLITL
1
VPQA1
VPQC3 QB1REL
& >1
VPQC4 QB1ITL
1
VPS1QC1
QA1_OP
QC3_OP
QC4_OP
S1QC1_OP
EXDU_ES
QB1_EX1
VPQC3
VPS1QC1
&
QC3_CL
S1QC1_CL
EXDU_ES
QB1_EX2
en04000542.vsd
575
Control
VPQA1
VPQC3 QB2REL
VPQC4 & >1
QB2ITL
VPS2QC2 1
QA1_OP
QC3_OP
QC4_OP
S2QC2_OP
EXDU_ES
QB2_EX1
VPQC4
VPS2QC2
&
QC4_CL
S2QC2_CL
EXDU_ES
QB2_EX2
VPQB1 QC3REL
VPQB2 QC3ITL
QB1_OP & 1
QC4REL
QB2_OP
QC4ITL
1
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
QB1_OP S1S2OPTR
QB2_OP >1 S1S2CLTR
QA1_OP 1
VPQB1
VPS1S2TR
VPQB2 &
VPQA1
en04000543.vsd

Table 301: Input signals for the A1A2_BS (IH01-) function block
Signal Description
576
Control
Signal Description
S1QC1_OP QC1 on bus section 1 is in open position
S1QC1_CL QC1 on bus section 1 is in closed position
BBTR_OP No busbar transfer is in progress
VP_BBTR Status are valid for app. involved in the busbar transfer
EXDU_12 No transm error from any bay connected to busbar 1 and 2
EXDU_ES No transm error from bays containing earth. sw. QC1 or QC2
Table 302: Output signals for the A1A2_BS (IH01-) function block
Signal Description
QA1OPREL Opening of QA1 is allowed
QA1OPITL Opening of QA1 is forbidden
S1S2OPTR No bus section connection between bus section 1 and 2
S1S2CLTR Bus coupler connection between bus section 1 and 2 exists
577
Control
Signal Description
VPS1S2TR Status of the app. between bus section 1 and 2 are valid
4.8 Interlocking for bus-section disconnector (A1A2_DC)

4.8.1 Introduction
The interlocking module A1A2_DC is used for one bus-section disconnector between section 1
and 2 according to figure 285. The module can be used for different busbars, which includes a
bus-section disconnector.
QB
WA1 (A1) WA2 (A2)
QC1 QC2
A1A2_DC en04000492.vsd
Figure 284: Switchyard layout A1A2_DC
578
Control
II01-
A1A2_DC
QB_OP QBOPREL
QB_CL QBOPIT L
S1QC1_OP QBCLREL
S1QC1_CL QBCLIT L
S2QC2_OP DCOPT R
S2QC2_CL DCCLT R
S1DC_OP VPDCT R
S2DC_OP
VPS1_DC
VPS2_DC
EXDU_ES
EXDU_BB
QBCL_EX1
QBCL_EX2
QBOP_EX1
QBOP_EX2
QBOP_EX3
en05000349.vsd
Figure 285: II function block
579
Control
4.8.3 Logic diagram
A1A2_DC
QB_OP
VPQB VPDCTR
QB_CL =1
DCOPTR
DCCLTR
S1QC1_OP
VPS1QC1
S1QC1_CL =1
S2QC2_OP
VPS2QC2
S2QC2_CL =1
VPS1QC1
VPS2QC2
VPS1_DC & >1 QBOPREL
S1QC1_OP QBOPITL
1
S2QC2_OP
S1DC_OP
EXDU_ES
EXDU_BB
QBOP_EX1
VPS1QC1
VPS2QC2
VPS2_DC &
S1QC1_OP
S2QC2_OP
S2DC_OP
EXDU_ES
EXDU_BB
QBOP_EX2
VPS1QC1
VPS2QC2
S1QC1_CL &
S2QC2_CL
EXDU_ES
QBOP_EX3
en04000544.vsd
580
Control

Table 303: Input signals for the A1A2_DC (II01-) function block
Signal Description
QB_OP QB is in open position
QB_CL QB is in closed position
S1DC_OP All disconnectors on bus section 1 are in open position
S2DC_OP All disconnectors on bus section 2 are in open position
VPS1_DC Switch status of disconnectors on bus section 1 are valid
VPS2_DC Switch status of disconnectors on bus section 2 are valid
EXDU_ES No transm error from bays containing earth. sw. QC1 or QC2
EXDU_BB No transm error from bays with disc conn to section 1 and 2
QBCL_EX1 External close condition for section disconnector QB
QBCL_EX2 External close condition for section disconnector QB
QBOP_EX1 External open condition for section disconnector QB
581
Control
Table 304: Output signals for the A1A2_DC (II01-) function block
Signal Description
QBOPREL Opening of QB is allowed
QBOPITL Opening of QB is forbidden
QBCLREL Closing of QB is allowed
QBCLITL Closing of QB is forbidden
DCOPTR The bus section disconnector is in open position
DCCLTR The bus section disconnector is in closed position
VPDCTR Switch status of QB is valid (open or closed)
4.9 Interlocking for busbar earthing switch (BB_ES)

4.9.1 Introduction
The interlocking module BB_ES is used for one busbar earthing switch on any busbar parts ac-
cording to figure 287.
QC
en04000504.vsd
Figure 286: Switchyard layout BB_ES
IJ01-
BB_ES
QC_OP QCREL
QC_CL QCITL
BB_DC_OP BBESOPTR
VP_BB_DC BBESCLTR
EXDU_BB
en05000347.vsd
Figure 287: IJ function block
582
Control
4.9.3 Logic diagram
BB_ES
VP_BB_DC QCREL
BB_DC_OP QCITL
EXDU_BB & 1
QC_OP BBESOPTR
QC_CL BBESCLTR
en04000546.vsd

Table 305: Input signals for the BB_ES (IJ01-) function block
Signal Description
QC_OP Busbar earthing switch QC is in open position
QC_CL Busbar earthing switch QC is in closed position
BB_DC_OP All disconnectors on this busbar part are open
VP_BB_DC Status for all disconnectors on this busbar part are valid
EXDU_BB No transm error from bays with disc on this busbar part
Table 306: Output signals for the BB_ES (IJ01-) function block
Signal Description
QCREL Switching of QC is allowed
QCITL Switching of QC is forbidden
BBESOPTR QC on this busbar part is in open position
BBESCLTR QC on this busbar part is in closed position
4.10 Interlocking for double CB bay (DB)

4.10.1 Introduction
The interlocking modules DB_BUS_A, DB_LINE and DB_BUS_B are used for a line connect-
ed to a double circuit breaker arrangement according to figure 289.
583
Control
WA1 (A)
WA2 (B)
QB1 QB2
QC1 QC4
QA1 QA2
DB_BUS_A DB_BUS_B
QC2 QC5
QB61 QB62
QC3
QB9
DB_LINE
QC9
en04000518.vsd
Figure 288: Switchyard layout double circuit breaker.
Three types of interlocking modules per double circuit breaker bay are defined. DB_LINE is the
connection from the line to the circuit breaker parts that are connected to the busbars.
DB_BUS_A and DB_BUS_B are the connections from the line to the busbars.
584
Control
IB01-
DB_BUS_A
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB1_OP QB61REL
QB1_CL QB61ITL
QB61_OP QB1REL
QB61_CL QB1ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
QC3_OP QB1OPTR
QC3_CL QB1CLTR
QC11_OP VPQB1TR
QC11_CL
EXDU_ES
QB61_EX1
QB61_EX2
QB1_EX1
QB1_EX2
en05000354.vsd
Figure 289: IB function block
IA01-
DB_LINE
QA1_OP QB9REL
QA1_CL QB9ITL
QA2_OP QC3REL
QA2_CL QC3ITL
QB61_OP QC9REL
QB61_CL QC9ITL
QC1_OP
QC1_CL
QC2_OP
QC2_CL
QB62_OP
QB62_CL
QC4_OP
QC4_CL
QC5_OP
QC5_CL
QB9_OP
QB9_CL
QC3_OP
QC3_CL
QC9_OP
QC9_CL
VOLT_OFF
VOLT_ON
QB9_EX1
QB9_EX2
QB9_EX3
QB9_EX4
QB9_EX5
en05000356.vsd
Figure 290: IA function block
585
Control
IC01-
DB_BUS_B
QA2_OP QA2CLREL
QA2_CL QA2CLITL
QB2_OP QB62REL
QB2_CL QB62ITL
QB62_OP QB2REL
QB62_CL QB2ITL
QC4_OP QC4REL
QC4_CL QC4ITL
QC5_OP QC5REL
QC5_CL QC5ITL
QC3_OP QB2OPTR
QC3_CL QB2CLTR
QC21_OP VPQB2TR
QC21_CL
EXDU_ES
QB62_EX1
QB62_EX2
QB2_EX1
QB2_EX2
en05000355.vsd
Figure 291: IC function block
586
Control
DB_BUS_A
QA1_OP
QA1_CL =1 VPQA1
QB61_OP
QB61_CL =1 VPQB61
QB1_OP
QB1_CL =1 VPQB1
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC3_OP
QC3_CL =1 VPQC3
QC11_OP
QC11_CL =1 VPQC11
VPQB61 QA1CLREL
VPQB1 & QA1CLITL
1
VPQA1
VPQC1 QB61REL
& >1
VPQC2 QB61ITL
1
VPQC3
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QB61_EX1
VPQC2
VPQC3
&
QC2_CL
QC3_CL
QB61_EX2
VPQA1
VPQC1 QB1REL
& >1
VPQC2 QB1ITL
1
VPQC11
QA1_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQC1
VPQC11
&
QC1_CL
QC11_CL
EXDU_ES
QB1_EX2
en04000547.vsd
587
Control
VPQB61 QC1REL
VPQB1 QC1ITL
& 1
QB61_OP QC2REL
QB1_OP QC2ITL
1
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
en04000548.vsd
588
Control
DB_LINE
QA1_OP
QA1_CL =1 VPQA1
QA2_OP
QA2_CL =1 VPQA2
QB61_OP
QB61_CL =1 VPQB61
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QB62_OP
QB62_CL =1 VPQB62
QC4_OP
QC4_CL =1 VPQC4
QC5_OP
QC5_CL =1 VPQC5
QB9_OP
QB9_CL =1 VPQB9
QC3_OP
QC3_CL =1 VPQC3
QC9_OP
QC9_CL =1 VPQC9
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQA1
VPQA2 QB9REL
VPQC1 & >1
QB9ITL
1
VPQC2
VPQC3
VPQC4
VPQC5
VPQC9
QA1_OP
QA2_OP
QC1_OP
QC2_OP
QC3_OP
QC4_OP
QC5_OP
QC9_OP
QB9_EX1
& en04000549.vsd
589
Control
VPQA1
VPQC1
VPQC2 & >1
VPQC3
VPQC9
VPQB62
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QC9_OP
QB62_OP
QB9_EX2
VPQA2
VPQB61
&
VPQC3
VPQC4
VPQC5
VPQC9
QA2_OP
QB61_OP
QC3_OP
QC4_OP
QC5_OP
QC9_OP
QB9_EX3
VPQC3
VPQC9
&
VPQB61
VPQB62
QC3_OP
QC9_OP
QB61_OP
QB62_OP
QB9_EX4
VPQC3
VPQC9
&
QC3_CL
QC9_CL
QB9_EX5
en04000550.vsd
590
Control
VPQB61
VPQB62 QC3REL
VPQB9 &
QC3ITL
1
QB61_OP
QB62_OP
QB9_OP
VPQB9
VPVOLT QC9REL
QB9_OP &
QC9ITL
1
VOLT_OFF
en04000551.vsd
591
Control
DB_BUS_B
QA2_OP
QA2_CL =1 VPQA2
QB62_OP
QB62_CL =1 VPQB62
QB2_OP
QB2_CL =1 VPQB2
QC4_OP
QC4_CL =1 VPQC4
QC5_OP
QC5_CL =1 VPQC5
QC3_OP
QC3_CL =1 VPQC3
QC21_OP
QC21_CL =1 VPQC21
VPQB62 QA2CLREL
VPQB2 & QA2CLITL
1
VPQA2
VPQC4 QB62REL
& >1
VPQC5 QB62ITL
1
VPQC3
QA2_OP
QC4_OP
QC5_OP
QC3_OP
QB62_EX1
VPQC5
VPQC3
&
QC5_CL
QC3_CL
QB62_EX2
VPQA2
VPQC4 QB2REL
& >1
VPQC5 QB2ITL
1
VPQC21
QA2_OP
QC4_OP
QC5_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQC4
VPQC21
&
QC4_CL
QC21_CL
EXDU_ES
QB2_EX2
en04000552.vsd
592
Control
VPQB62 QC4REL
VPQB2 QC4ITL
& 1
QB62_OP QC5REL
QB2_OP QC5ITL
1
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
en04000553.vsd

Table 307: Input signals for the DB_BUS_A (IB01-) function block
Signal Description
EXDU_ES No transm error from bay containing earthing switch QC11
593
Control
Table 308: Output signals for the DB_BUS_A (IB01-) function block
Signal Description
Table 309: Input signals for the DB_LINE (IA01-) function block
Signal Description
594
Control
Signal Description
VOLT_OFF There is no voltage on the line and not VT (fuse) failure
Table 310: Output signals for the DB_LINE (IA01-) function block
Signal Description
Table 311: Input signals for the DB_BUS_B (IC01-) function block
Signal Description
595
Control
Signal Description
Table 312: Output signals for the DB_BUS_B (IC01-) function block
Signal Description
4.11 Interlocking for 1 1/2 CB diameter (BH)

4.11.1 Introduction
The interlocking modules BH_LINE_A, BH_CONN and BH_LINE_B are used for lines con-
nected to a breaker-and-a-half diameter according to figure 293.
596
Control
WA1 (A)
WA2 (B)
QB1 QB2
QC1 QC1
QA1 QA1
QC2 QC2
QB6 QB6
QC3 QC3
BH_LINE_A BH_LINE_B
QB61 QA1 QB62
QB9 QB9
QC1 QC2
QC9 QC9
BH_CONN
en04000513.vsd
Figure 292: Switchyard layout breaker-and-a-half
Three types of interlocking modules per diameter are defined. BH_LINE_A and BH_LINE_B
are the connections from a line to a busbar. BH_CONN is the connection between the two lines
of the diameter in the breaker and a half switchyard layout.
597
Control
4.11.2 Function blocks
IL01-
BH_LINE_A
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB6_OP QB6REL
QB6_CL QB6ITL
QB1_OP QB1REL
QB1_CL QB1ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
QC3_OP QC3REL
QC3_CL QC3ITL
QB9_OP QB9REL
QB9_CL QB9ITL
QC9_OP QC9REL
QC9_CL QC9ITL
CQA1_OP QB1OPTR
CQA1_CL QB1CLTR
CQB61_OP VPQB1TR
CQB61_CL
CQC1_OP
CQC1_CL
CQC2_OP
CQC2_CL
QC11_OP
QC11_CL
VOLT_OFF
VOLT_ON
EXDU_ES
QB6_EX1
QB6_EX2
QB1_EX1
QB1_EX2
QB9_EX1
QB9_EX2
QB9_EX3
QB9_EX4
QB9_EX5
QB9_EX6
QB9_EX7
en05000352.vsd
Figure 293: IL function block
598
Control
IM01-
BH_LINE_B
QA1_OP QA1CLREL
QA1_CL QA1CLIT L
QB6_OP QB6REL
QB6_CL QB6IT L
QB2_OP QB2REL
QB2_CL QB2IT L
QC1_OP QC1REL
QC1_CL QC1IT L
QC2_OP QC2REL
QC2_CL QC2IT L
QC3_OP QC3REL
QC3_CL QC3IT L
QB9_OP QB9REL
QB9_CL QB9IT L
QC9_OP QC9REL
QC9_CL QC9IT L
CQA1_OP QB2OPT R
CQA1_CL QB2CLT R
CQB62_OP VPQB2T R
CQB62_CL
CQC1_OP
CQC1_CL
CQC2_OP
CQC2_CL
QC21_OP
QC21_CL
VOLT _OFF
VOLT _ON
EXDU_ES
QB6_EX1
QB6_EX2
QB2_EX1
QB2_EX2
QB9_EX1
QB9_EX2
QB9_EX3
QB9_EX4
QB9_EX5
QB9_EX6
QB9_EX7
en05000353.vsd
Figure 294: IM function block
599
Control
IK01-
BH_CONN
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB61_OP QB61REL
QB61_CL QB61ITL
QB62_OP QB62REL
QB62_CL QB62ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
1QC3_OP
1QC3_CL
2QC3_OP
2QC3_CL
QB61_EX1
QB61_EX2
QB62_EX1
QB62_EX2
en05000351.vsd
Figure 295: IK function block
600
Control
BH_LINE_A
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB6_OP
QB6_CL =1 VPQB6
QC9_OP
QC9_CL =1 VPQC9
QB9_OP
QB9_CL =1 VPQB9
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC3_OP
QC3_CL =1 VPQC3
CQA1_OP
CQA1_CL =1 VPCQA1
CQC1_OP
CQC1_CL =1 VPCQC1
CQC2_OP
CQC2_CL =1 VPCQC2
CQB61_OP
CQB61_CL =1 VPCQB61
QC11_OP
QC11_CL =1 VPQC11
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQB1 QA1CLREL
VPQB6 QA1CLITL
& 1
VPQB9
VPQA1
VPQC1 QB6REL
VPQC2 & >1
QB6ITL
1
VPQC3
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QB6_EX1
VPQC2
VPQC3
&
QC2_CL
QC3_CL
QB6_EX2
en04000554.vsd
601
Control
VPQA1
VPQC1 QB1REL
VPQC2 & >1
QB1ITL
1
VPQC11
QA1_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQC1
VPQC11
&
QC1_CL
QC11_CL
EXDU_ES
QB1_EX2
VPQB1 QC1REL
VPQB6 QC1ITL
QB1_OP & 1
QC2REL
QB6_OP QC2ITL
VPQB6 1
VPQB9 QC3REL
VPCQB61 &
QC3ITL
1
QB6_OP
QB9_OP
CQB61_OP
VPQA1 QB9REL
VPQB6 QB9ITL
VPQC9 & >1 1
VPQC1
VPQC2
VPQC3
VPCQA1
VPCQB61
VPCQC1
VPCQC2
QB9_EX1
QB6_OP
QB9_EX2
>1
QA1_OP
QC1_OP
QC2_OP &
QB9_EX3
en04000555.vsd
602
Control
CQB61_OP
QB9_EX4
>1 & >1
CQA1_OP
CQC1_OP
CQC2_OP &
QB9_EX5
QC9_OP
QC3_OP
QB9_EX6
VPQC9
VPQC3
&
QC9_CL
QC3_CL
QB9_EX7
VPQB9 QC9REL
VPVOLT QC9ITL
QB9_OP & 1
VOLT_OFF
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
en04000556.vsd
603
Control
BH_LINE_B
QA1_OP
QA1_CL =1 VPQA1
QB2_OP
QB2_CL =1 VPQB2
QB6_OP
QB6_CL =1 VPQB6
QC9_OP
QC9_CL =1 VPQC9
QB9_OP
QB9_CL =1 VPQB9
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC3_OP
QC3_CL =1 VPQC3
CQA1_OP
CQA1_CL =1 VPCQA1
CQC1_OP
CQC1_CL =1 VPCQC1
CQC2_OP
CQC2_CL =1 VPCQC2
CQB62_OP
CQB62_CL =1 VPCQB62
QC21_OP
QC21_CL =1 VPQC21
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQB2 QA1CLREL
VPQB6 QA1CLITL
& 1
VPQB9
VPQA1
VPQC1 QB6REL
VPQC2 & >1
QB6ITL
1
VPQC3
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QB6_EX1
VPQC2
VPQC3
&
QC2_CL
QC3_CL
QB6_EX2
en04000557.vsd
604
Control
VPQA1
VPQC1 QB2REL
VPQC2 & >1
QB2ITL
1
VPQC21
QA1_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQC1
VPQC21
&
QC1_CL
QC21_CL
EXDU_ES
QB2_EX2
VPQB2 QC1REL
VPQB6 QC1ITL
QB2_OP & 1
QC2REL
QB6_OP QC2ITL
VPQB6 1
VPQB9 QC3REL
VPCQB62 &
QC3ITL
1
QB6_OP
QB9_OP
CQB62_OP
VPQA1 QB9REL
VPQB6 QB9ITL
VPQC9 & >1 1
VPQC1
VPQC2
VPQC3
VPCQA1
VPCQB62
VPCQC1
VPCQC2
QB9_EX1
QB6_OP
QB9_EX2
>1
QA1_OP
QC1_OP
QC2_OP &
QB9_EX3
en04000558.vsd
605
Control
CQB62_OP
QB9_EX4
>1 & >1
CQA1_OP
CQC1_OP
CQC2_OP &
QB9_EX5
QC9_OP
QC3_OP
QB9_EX6
VPQC9
VPQC3
&
QC9_CL
QC3_CL
QB9_EX7
VPQB9 QC9REL
VPVOLT QC9ITL
QB9_OP & 1
VOLT_OFF
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
en04000559.vsd
606
Control
BH_CONN
QA1_OP
QA1_CL =1 VPQA1
QB61_OP
QB61_CL =1 VPQB61
QB62_OP
QB62_CL =1 VPQB62
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
1QC3_OP
1QC3_CL =1 VP1QC3
2QC3_OP
2QC3_CL =1 VP2QC3
VPQB61 QA1CLREL
VPQB62 & QA1CLITL
1
VPQA1
VPQC1 QB61REL
& >1
VPQC2 QB61ITL
1
VP1QC3
QA1_OP
QC1_OP
QC2_OP
1QC3_OP
QB61_EX1
VPQC1
VP1QC3
&
QC1_CL
1QC3_CL
QB61_EX2
VPQA1
VPQC1 QB62REL
& >1
VPQC2 QB62ITL
1
VP2QC3
QA1_OP
QC1_OP
QC2_OP
2QC3_OP
QB62_EX1
VPQC2
VP2QC3
&
QC2_CL
2QC3_CL
QB62_EX2
VPQB61 QC1REL
VPQB62 QC1ITL
& 1
QB61_OP QC2REL
QB62_OP QC2ITL
1
en04000560.vsd
607
Control

Table 313: Input signals for the BH_LINE_A (IL01-) function block
Signal Description
QB6_CL QB6 is in close position
CQA1_OP QA1 in module BH_CONN is in open position
CQA1_CL QA1 in module BH_CONN is in closed position
CQB61_OP QB61 in module BH_CONN is in open position
CQB61_CL QB61 in module BH_CONN is in closed position
CQC1_OP QC1 in module BH_CONN is in open position
CQC1_CL QC1 in module BH_CONN is in closed position
VOLT_OFF There is no voltage on line and not VT (fuse) failure
608
Control
Signal Description
Table 314: Output signals for the BH_LINE_A (IL01-) function block
Signal Description
Table 315: Input signals for the BH_LINE_B (IM01-) function block
Signal Description
QB6_CL QB6 is in close position
609
Control
Signal Description
CQA1_OP QA1 in module BH_CONN is in open position
CQA1_CL QA1 in module BH_CONN is in closed position
CQB62_OP QB62 in module BH_CONN is in open position
CQB62_CL QB62 in module BH_CONN is in closed position
VOLT_OFF There is no voltage on line and not VT (fuse) failure
Table 316: Output signals for the BH_LINE_B (IM01-) function block
610
Control
Signal Description
Table 317: Input signals for the BH_CONN (IK01-) function block
Signal Description
1QC3_OP QC3 on line 1 is in open position
1QC3_CL QC3 on line 1 is in closed position
2QC3_OP QC3 on line 2 is in open position
611
Control
Signal Description
2QC3_CL QC3 on line 2 is in closed position
Table 318: Output signals for the BH_CONN (IK01-) function block
Signal Description
612
Control
4.12 Horizontal communication via GOOSE for interlocking

GR01-
IntlReceive
BLOCK RESREQ
INSTNAME RESGRANT
RESRENAM APP1_OP
RESGRNAM APP1_CL
APP1NAME APP1VAL
APP2NAME APP2_OP
APP3NAME APP2_CL
APP4NAME APP2VAL
APP5NAME APP3_OP
APP6NAME APP3_CL
APP7NAME APP3VAL
APP8NAME APP4_OP
APP9NAME APP4_CL
APP10NAM APP4VAL
APP11NAM APP5_OP
APP12NAM APP5_CL
APP13NAM APP5VAL
APP14NAM APP6_OP
APP15NAM APP6_CL
APP6VAL
APP7_OP
APP7_CL
APP7VAL
APP8_OP
APP8_CL
APP8VAL
APP9_OP
APP9_CL
APP9VAL
APP10_OP
APP10_CL
APP10VAL
APP11_OP
APP11_CL
APP11VAL
APP12_OP
APP12_CL
APP12VAL
APP13_OP
APP13_CL
APP13VAL
APP14_OP
APP14_CL
APP14VAL
APP15_OP
APP15_CL
APP15VAL
COM_VAL
en07000048.vsd
Figure 296: GR function block
613
Control

Table 319: Input signals for the IntlReceive (GR01-) function block
Signal Description
BLOCK Block of output signals
Table 320: Output signals for the IntlReceive (GR01-) function block
Signal Description
RESREQ Reservation request
RESGRANT Reservation granted
APP1_OP Apparatus 1 position is open
APP1_CL Apparatus 1 position is closed
APP1VAL Apparatus 1 position is valid
614
Control
Signal Description
COM_VAL Receive communication status is valid

Table 321: Basic general settings for the IntlReceive (GR01-) function
On
615
Logic rotating switch for function selection Chapter 11
and LHMI presentation (SLGGIO) Control
5 Logic rotating switch for function selection

and LHMI presentation (SLGGIO)
Function block name: SLxx IEC 60617 graphical symbol:

ANSI number:
SLGGIO
5.1 Introduction
The SLGGIO function block (or the selector switch function block) is used within the CAP tool
in order to get a selector switch functionality similar with the one provided by a hardware selec-
tor switch. Hardware selector switches are used extensively by utilities, in order to have different
functions operating on pre-set values. Hardware switches are however sources for maintenance
issues, lower system reliability and extended purchase portfolio. The virtual selector switches
eliminate all these problems.

The SLGGIO has two operating inputs – UP and DOWN. When a signal is received on the UP
input, the block will activate the output next to the present activated output, in ascending order
(if the present activated output is 3 – for example and one operates the UP input, then the output
4 will be activated). When a signal is received on the DOWN input, the block will activate the
output next to the present activated output, in descending order (if the present activated output
is 3 – for example and one operates the DOWN input, then the output 2 will be activated). De-
pending on the output settings the output signals can be steady or pulsed. In case of steady sig-
nals, in case of UP or DOWN operation, the previously active output will be deactivated. Also,
depending on the settings one can have a time delay between the UP or DOWN activation signal
positive front and the output activation.
Besides the inputs visible in “CAP configuration tool”, there are other executable inputs that
will allow an user to set the desired position directly (without activating the intermediate posi-
tions), either locally or remotely, using a “select before execute” dialog. One can block the func-
tion operation, by activating the BLOCK input. In this case, the present position will be kept and
further operation will be blocked. The operator place (local or remote) is specified through the
PSTO input. If any operation is allowed the signal INTONE from the Fixed signal function block
can be connected. The SLGGIO function block has also an integer value output, that generates
the actual position number. The positions and the block names are fully settable by the user.
These names will appear in the menu, so the user can see the position names instead of a number.
616
5.2.1 Functionality and behaviour
From the menu:
REC 670 1.1 REC 670/Control

Control Single Line Diagram REC 670/Ctrl/Com
Measurements Commands Single Command
Events Selector Switch (GGIO)
Disturbance records
Settings
Diagnostics
Test
Reset
Authorization
Language
1 2 3
../Ctrl/Com/Sel Sw ../Com/Sel Sw/SL03 ../Com/Sel Sw/SL03
SL01 Damage ctrl Damage ctrl
4 4
SL02
..
..
SL15
P:Disc All N: Disc Fe
OK Cancel
4
5
The dialog window that appears
../Com/Sel Sw/ shows the present position (P:)
DmgCtrl 7
and the new position (N:), both
Damage ctrl: in clear names, given by the
user (max. 13 characters).
E
Modify the position with arrows.
The pos will not be modified (outputs
will not be activated) until you press
the E-button for O.K. en06000420.vsd
1 The SLGGIO instances in CAP configuration tool

2 Switch name given by the user (max 13 characters)
3 Position number, up to 32 positions
4 Change position
5 New position
Figure 297: Example 1 on handling the switch from the local HMI.
617
5.2.2 Graphical display

There are two possibilities for the SLGGIO:
• if it is used just for the monitoring, the switches will be listed with their actual
position names, as defined by the user (max. 13 characters);
• if it is used for control, the switches will be listed with their actual positions, but
only the first three letters of the name will be used;
In both cases, the switch full name will be shown, but the user has to redefine it when building
the Graphical Display Editor, under the "Caption". If used for the control, the following se-
quence of commands will ensue:
618
From the graphical display:
REC 670 1.1 REC 670 1.1/Control

Control Single Line Diagram
Measurements Commands
Events
Disturbance records
Settings
Diagnostics
Test
Change to the "Switches" page Reset
of the SLD by left-right arrows. Authorization
Select switch by up-down Language
arrows
../Control/SLD/Switch O I ../Control/SLD/Switch
AR control AR control
WFM Select switch. Press the
WFM
I or O key. A dialog box
Pilot setup appears.
Pilot setup
OFF OFF
Damage control E P: Disc N: Disc Fe
DAL
The pos will not be modified
(outputs will not be activated) until OK Cancel
you press the E-button for O.K.
../Control/SLD/Switch
AR control
WFM
Pilot setup
OFF
Damage control
DFW
en06000421.vsd
Figure 298: Example 2 on handling the switch from the local HMI.
619
5.3 Function block
620
SL01-
SLGGIO
BLOCK SWPOS01
PSTO SWPOS02
UP SWPOS03
DOWN SWPOS04
SWPOS05
SWPOS06
SWPOS07
SWPOS08
SWPOS09
SWPOS10
SWPOS11
SWPOS12
SWPOS13
SWPOS14
SWPOS15
SWPOS16
SWPOS17
SWPOS18
SWPOS19
SWPOS20
SWPOS21
SWPOS22
SWPOS23
SWPOS24
SWPOS25
SWPOS26
SWPOS27
SWPOS28
SWPOS29
SWPOS30
SWPOS31
SWPOS32
SWPOSN
INSTNAME
NAME1
NAME2
NAME3
NAME4
NAME5
NAME6
NAME7
NAME8
NAME9
NAME10
NAME11
NAME12
NAME13
NAME14
NAME15
NAME16
NAME17
NAME18
NAME19
NAME20
NAME21
NAME22
NAME23
NAME24
NAME25
NAME26
NAME27
NAME28
NAME29
NAME30
NAME31
NAME32
en05000658.vsd
621
Figure 299: SL function block, example for SL01–SL15

Table 322: Input signals for the SLGGIO (SL01-) function block
Signal Description
UP Binary "UP" command
DOWN Binary "DOWN" command
Table 323: Output signals for the SLGGIO (SL01-) function block
Signal Description
SWPOS01 Selector switch position 1
622
Signal Description
SWPOSN Switch position (integer)

Table 324: Basic general settings for the SLGGIO (SL01-) function
On
NrPos 2 - 32 1 32 - Number of positions in
the switch
OutType Pulsed - Steady - Output type, steady or
Steady pulse
tPulse 0.000 - 60.000 0.001 0.200 s Operate pulse duration,
in [s]
tDelay 0.000 - 60000.000 0.010 0.000 s Time delay on the output,
in [s]
StopAtExtremes Disabled - Disabled - Stop when min or max
Enabled position is reached
623
Selector mini switch (VSGGIO) Chapter 11
Control
6 Selector mini switch (VSGGIO)
Function block name: VS IEC 60617 graphical symbol:

ANSI number:
VSGGIO
6.1 Introduction
The VSGGIO function block (or the versatile switch function block) is a multipurpose function
used within the CAP tool for a variety of applications, as a general – purpose switch.
The switch can be controlled from the menu or from a symbol on the SLD of the LHMI.

This function can be used for double purpose, in the same way as the switch controller (SCSWI)
functions are used:
• for indication, receiving position through the IPOS1 and IPOS2 inputs and dis-
tributing it in the configuration through the POS1 and POS2 outputs or to
IEC61850 through reporting or GOOSE
• for command, receiving commands via the HMI. HMI symbols Select button or
Indication button from menu (Control / Commands / Versatile Switch) or
IEC61850 and sending them in the configuration and especially to the outputs
(through a SMBO function block)
The PSTO input is connected to the Local remote switch to have a selection of operators place
, operation from local HMI (Local pos) or through IEC 61850 (Remote pos). An INTONE con-
nection from Fixed signal function block will allow operation from any operators place.
As it can be seen, both indications and commands are done in double-bit representation, where
a combination of signals on both inputs/outputs generate the desired result:
POS2 POS1 RESULT POS (integer

output)
0 0 intermediate 0
0 1 POS1 1
1 0 POS2 2
1 1 bad state 3
624
Control
6.3 Function block
VS01-
VSGGIO
BLOCK BLOCKED
PSTO POSITION
IPOS1 POS1
IPOS2 POS2
NAME_UND CMDPOS12
NAM_POS1 CMDPOS21
NAM_POS2
NAME_BAD
en06000508.vsd
Figure 300: VS function block

Table 325: Input signals for the VSGGIO (VS01-) function block
Signal Description
IPOS1 Position 1 indicating input
IPOS2 Position 2 indicating input
Table 326: Output signals for the VSGGIO (VS01-) function block
Signal Description
BLOCKED The function is active but the functionality is blocked
POSITION Position indication, integer
POS1 Position 1 indication, logical signal
POS2 Position 2 indication, logical signal
CMDPOS12 Execute command from position 1 to position 2
CMDPOS21 Execute command from position 2 to position 1
625
Control

Table 327: Basic general settings for the VSGGIO (VS01-) function
On
CtlModel Dir Norm - Dir Norm - Specifies the type for
SBO Enh control model according
to IEC 61850
Mode Steady - Pulsed - Operation mode
Pulsed
tSelect 0.000 - 60.000 0.001 30.000 s Max time between select
and execute signals
tPulse 0.000 - 60.000 0.001 0.200 s Command pulse lenght
626
Single point generic control 8 signals Chapter 11
(SPC8GGIO) Control
7 Single point generic control 8 signals (SPC8GGIO)
Function block name: SCx-- IEC 60617 graphical symbol:

ANSI number:
SPC8GGIO
7.1 Introduction
The SC function block is a collection of 8 single point commands, designed to bring in com-
mands from REMOTE (SCADA) or LOCAL (HMI) to those parts of the logic configuration that
do not need complicated function blocks that have the capability to receive commands (for ex-
ample SCSWI). In this way, simple commands can be sent directly to the IED outputs, without
confirmation. Confirmation (status) of the result of the commands is supposed to be achieved by
other means, such as binary inputs and SPGGIO function blocks.

The PSTO input will determine which the allowed position for the operator (LOCAL, RE-
MOTE, ALL) is. Upon sending a command from an allowed operator position, one of the 8 out-
puts will be activated. The settings Latchedx and tPulsex (where x is the respective output) will
determine if the signal will be pulsed (and how long the pulse is) or latched (“steady”). BLOCK
will block the operation of the function – in case a command is sent, no output will be activated.
7.3 Function block
SC01-
SPC8GGIO
BLOCK OUT1
PSTO OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
en07000143.vsd
Figure 301: SPC function block
627
Single point generic control 8 signals Chapter 11
(SPC8GGIO) Control

Table 328: Input signals for the SPC8GGIO (SC01-) function block
Signal Description
BLOCK Blocks the function operation
Table 329: Output signals for the SPC8GGIO (SC01-) function block
Signal Description
OUT1 Output 1
OUT2 Output2
OUT3 Output3
OUT4 Output4
OUT5 Output5
OUT6 Output6
OUT7 Output7
OUT8 Output8
628
Chapter 12 Scheme
communication
About this chapter

This chapter describes the scheme communication logic that is used in distance and earth fault
protection function to obtain almost instantaneous fault clearance for faults on the protected line.
The chapter considers scheme communication logic (ZCOM), current reversal and weak-end
in-feed logic (ZCAL) for the distance protection function and scheme communication logic for
residual overcurrent protection (EFC) and current reversal and weak-end in-feed logic (EFC) for
the residual overcurrent function.
Also Local acceleration logic (ZCLC) is discussed which is a function that can generate instan-
taneous tripping as a result of remote end faults without any telecommunication.
The chapter contains a short description of the design, simplified logical block diagrams, figure
of the function block, input and output signals and setting parameters.
629
Scheme communication Chapter 12
logic for distance protection (PSCH, 85) Scheme communication
1 Scheme communication
logic for distance protection (PSCH, 85)
Function block name: ZCOM- IEC 60617 graphical symbol:

ANSI number: 85
ZCPSCH
1.1 Introduction
To achieve instantaneous fault clearance for all line faults, a scheme communication logic is pro-
vided. All types of communication schemes e.g. permissive underreach, permissive overreach,
blocking, intertrip etc. are available. The built-in communication module (LDCM) can be used
for scheme communication signalling when included.
Phase segregated communication is also available for correct operation at simultaneous faults
when three distance protection communication channels are available between the line ends

Depending on whether a reverse or forward directed impedance zone is used to issue the send
signal, the communication schemes are divided into Blocking and Permissive schemes, respec-
tively.
A permissive scheme is inherently faster and has better security against false tripping than a
blocking scheme. On the other hand, a permissive scheme depends on a received signal for a fast
trip, so its dependability is lower than that of a blocking scheme.
1.2.1 Blocking scheme

The principal of operation for a blocking scheme is that an overreaching zone is allowed to trip
instantaneously after the settable co-ordination time tCoord has elapsed, when no signal is re-
ceived from the remote terminal.
The received signal, which shall be connected to CR, is used to not release the zone to be accel-
erated to clear the fault instantaneously (after time tCoord). The overreaching zone to be accel-
erated is connected to the input CACC, see figure 303.
In case of external faults, the blocking signal (CR) must be received before the settable timer
tCoord elapses, to prevent a false trip, see figure 303.
The function can be totally blocked by activating the input BLOCK, block of trip by activating
the input BLKTR, Block of carrier send by activating the input BLKCS.
630
tCoord
CACC
t TRIP
CR AND
en05000512.vsd
Figure 302: Basic logic for trip carrier in blocking scheme
Channels for communication in each direction must be available.
1.2.2 Permissive underreach scheme

In a permissive underreach scheme, a forward directed underreach measuring element (normally
zone1) sends a permissive signal CS to the remote end if a fault is detected in forward direction.
The received signal CR is used to allow an overreaching zone to trip after the tCoord timer has
elapsed. The tCoord in permissive underreach schemes is normally set to zero.
The logic for trip carrier in permissive scheme is shown in figure 304.
tCoord
CACC
t TRIP
CR AND
en05000513.vsd
Figure 303: Logic for trip carrier in permissive scheme
The permissive underreach scheme has the same blocking possibilities as mentioned for block-
ing scheme above.
1.2.3 Permissive overreach scheme

In a permissive overreach scheme, a forward directed overreach measuring element (normally
zone2) sends a permissive signal CS to the remote end if a fault is detected in forward direction.
The received signal CR is used to allow an overreaching zone to trip after the settable tCoord
timer has elapsed. The tCoord in permissive overreach schemes is normally set to zero.
The logic for trip carrier is the same as for permissive underreach, i.e. figure 304.
The permissive overreach scheme has the same blocking possibilities as mentioned for blocking
scheme above.
1.2.4 Unblocking scheme

In unblocking scheme, the lower dependability in permissive scheme is overcome by using the
loss of guard signal from the communication equipment to locally create a carrier receive signal.
It is common or suitable to use the function when older, less reliable, power-line carrier (PLC)
communication is used.
631
The unblocking function uses a carrier guard signal CRG, which must always be present, even
when no CR signal is received. The absence of the CRG signal for a time longer than the setting
tSecurity time is used as a CR signal, see figure 305. This also enables a permissive scheme to
operate when the line fault blocks the signal transmission.
The carrier received signal created by the unblocking function is reset 150 ms after the security
timer has elapsed. When that occurs an output signal LCG is activated for signalling purpose.
The unblocking function is reset 200 ms after that the guard signal is present again.
CR
tSecurity CRL
t >1
1
CRG
200 ms 150 ms
t OR t AND
AND
LCG
en05000746.vsd
Figure 304: Carrier guard logic with unblocking scheme
The unblocking function can be set in three operation modes (setting Unblock):
Off: The unblocking function is out of operation

No restart: Communication failure shorter than tSecurity will be ignored
If CRG disappears a CRL signal will be transferred to the trip logic
There will not be any information in case of communication failure (LCG)
Restart Communication failure shorter than tSecurity will be ignored
It sends a defined (150 ms) CRL after the disappearance of the CRG signal
The function will activate LCG output in case of communication failure
If the communication failure comes and goes (<200 ms) there will not be recurrent
signalling
1.2.5 Intertrip scheme

In the direct inter-trip scheme, the carrier send signal CS is sent from an underreaching zone that
is tripping the line.
The received signal CR is directly transferred to a TRIP for tripping without local criteria. The
signal is further processed in the tripping logic. In case of single-pole tripping in multi-phase
systems, a phase selection is performed.
632
1.2.6 Simplified logic diagram

The simplified logic diagram for the complete logic is shown in figure 306.
633
Unblock =
Off
CR
Unblock =
OR CRL
NoRestart AND
CRL
Unblock =
tSecurit
Restart
y
CRG 1 t AND
200 ms 150 ms LCG

AND
t OR AND t
SchemeType =
Intertrip
CSUR
tSendMi
n AND
OR
BLOCK AND
CSBLK OR
CRL
Schemetype =
Permissive UR AND CS
OR
tCoord
AND 25 ms
OR
t TRIP
CACC t
Schemetype =
Permissive OR
CSOR OR AND
AND
tSendMin
OR
AND
SchemeType =
Blocking
BLKCS
AND
en05000515.vsd
Figure 305: Scheme communication logic for distance protection, simplified logic diagram
634
1.3 Function block
ZCOM-
ZCPSCH_85
BLOCK TRIP
BLKTR CS
BLKCS CRL
CSBLK LCG
CACC
CSOR
CSUR
CR
CRG
en06000286.vsd
Figure 306: ZCOM function block

Table 330: Input signals for the ZCPSCH_85 (ZCOM-) function block
Signal Description
BLKTR Signal for block of trip output from communication logic
BLKCS Block of carrier send in permissive OR and blocking schemes
CSBLK Reverse directed distance protection zone signal
CACC Permissive distance protection zone signal
CSOR Overreaching distance protection zone signal
CSUR Underreaching distance protection zone signal
CR Carrier Signal Received
CRG Carrier guard signal received
Table 331: Output signals for the ZCPSCH_85 (ZCOM-) function block
Signal Description
TRIP Trip output
CS Carrier Send signal
CRL Carrier signal received or missing carrier guard signal
LCG Loss of carrier guard signal
635

Table 332: Basic parameter group settings for the ZCPSCH_85 (ZCOM-) function
On
SchemeType Off - Permissive UR - Scheme type
Intertrip
Permissive UR
Permissive OR
Blocking
tCoord 0.000 - 60.000 0.001 0.035 s Co-ordination time for
blocking communication
scheme
tSendMin 0.000 - 60.000 0.001 0.100 s Minimum duration of a
carrier send signal
Table 333: Advanced parameter group settings for the ZCPSCH_85 (ZCOM-) function
Unblock Off - Off - Operation mode of
NoRestart unblocking logic
Restart
tSecurity 0.000 - 60.000 0.001 0.035 s Security timer for loss of
carrier guard detection
1.6 Technical data

Table 334: Scheme communication logic for distance protection (PSCH, 85)
Scheme type Intertrip -
Permissive UR
Permissive OR
Blocking
Co-ordination time for blocking com- (0.000-60.000) s ± 0.5% ± 10 ms
munication scheme
Minimum duration of a carrier send (0.000-60.000) s ± 0.5% ± 10 ms
signal
Security timer for loss of carrier guard (0.000-60.000) s ± 0.5% ± 10 ms
detection
Operation mode of unblocking logic Off -
NoRestart
Restart
636
Phase segregated scheme communication Chapter 12
2 Phase segregated scheme communication logic

for distance protection (PSCH, 85)
Function block name: ZCIP- IEC 60617 graphical symbol:

ANSI number: 85
ZC1PPSCH
2.1 Introduction
Communication between line ends is used to achieve fault clearance for all faults on a power
line. All possible types of communication schemes e.g. permissive underreach, permissive over-
reach and blocking schemes are available. To manage problems with simultaneous faults on par-
allel power lines phase segregated communication is needed. This will then replace the standard
scheme communication module (ZCOM) on important lines where three communication chan-
nels (in each subsystem) are available for the distance protection communication.
The main purpose of the ZC1P scheme communication logic is to supplement the distance pro-
tection function such that:
• fast clearance of faults is also achieved at the line end for which the faults are on
the part of the line not covered by its underreaching zone.
• correct phase selection can be maintained to support single-pole tripping for
faults occurring anywhere on the entire length of a double circuit line.
To accomplish this, three separate communication channels, i.e. one per phase, each capable of
transmitting a signal in each direction are required.
The Phase segregated communication logic can be completed with the current reversal and WEI
logic for phase segregated communication, when found necessary in Blocking and Permissive
overreaching schemes.

Depending on whether a reverse or forward directed impedance zone is used to issue the send
signal, the communication schemes are divided into Blocking and Permissive schemes, respec-
tively.
A permissive scheme is inherently faster and has better security against false tripping than a
blocking scheme. On the other hand, a permissive scheme depends on a received signal for a fast
trip, so its dependability is lower than that of a blocking scheme.
The ZC1P function is a logical function built-up from logical elements. It is a supplementary
function to the distance protection, requiring for its operation inputs from the distance protection
and the communication equipment.
The type of communication-aided scheme to be used can be selected by way of the settings.
637
The ability to select which distance protection zone is assigned to which input of the scheme
communication logic makes this logic able to support practically any scheme communication re-
quirements regardless of their basic operating principle. The outputs to initiate tripping and
sending of the teleprotection signal are given in accordance with the type of communication-aid-
ed scheme selected and the zone(s) and phase(s) of the distance protection which have operated.
When power line carrier communication channels are used for permissive schemes communica-
tion, unblocking logic which uses the loss of guard signal as a receive criteria is provided. This
logic compensates for the lack of dependability due to the transmission of the command signal
over the faulted line.

The principle of operation for a blocking scheme is that an overreaching zone is allowed to trip
instantaneously after the settable co-ordination time tCoord has elapsed, when no signal is re-
ceived from the remote terminal. The received signal (sent by a reverse looking element in the
remote IED), which shall be connected to CRLx, is used to not release the zone to be accelerated
to clear the fault instantaneously (after time tCoord). The overreaching zone to be accelerated is
connected to the input CACCLx, see figure 308. In case of external faults, the blocking signal
(CRLx) must be received before the settable timer tCoord elapses, to prevent an unneccesary
trip, see figure 308.
The function can be totally blocked by activating the input BLOCK, block of trip is achieved by
activating the input BLKTRLx, Block of carrier send is done by activating the input BLKCSLx.
tCoord 25 ms
CACCLx t t TRLx
CRLx AND
en06000310.vsd
Figure 307: Basic logic for trip carrier in one phase of a blocking scheme
2.2.2 Permissive underreach scheme

In a permissive underreach scheme, a forward directed underreach measuring element (normally
zone1) sends a permissive signal CSLx to the remote end if a fault is detected in forward direc-
tion. The received signal CRLx is used to allow an overreaching zone (connected to CACCLx)
to trip after the tCoord timer has elapsed. The tCoord is in permissive underreach schemes nor-
mally set to zero. The logic for trip carrier in permissive scheme is shown in figure 309. Three
channels for communication in each direction must be available.
tCoord 25 ms
CACCLx t t TRLx
CRLx AND
en07000088.vsd
Figure 308: Basic logic for trip carrier in one phase of a permissive underreach scheme
638
2.2.3 Permissive overreach scheme

In a permissive overreach scheme, a forward directed overreach measuring element (normally
zone2) sends a permissive signal CSLx to the remote end if a fault is detected in forward direc-
tion. The received signal CRLx is used to allow an overreaching zone to trip after the settable
tCoord timer has elapsed. The tCoord is in permissive overreach schemes normally set to zero.
The logic for trip carrier is the same as for permissive underreach, see figure 308.
The permissive overreach scheme has the same blocking possibilities as mentioned for blocking
scheme above. The blocking inputs are activated from the current reversal logic when this func-
tion is included.
Three channels for communication in each direction must be available.

In an unblocking scheme, the lower dependability in permissive scheme is overcome by using
the loss of guard signal from the communication equipment to locally create a carrier receive
signal. It is common or suitable to use the function when older, less reliable, power-line carrier
(PLC) communication is used. As phase segregated communication schemes uses phases indi-
vidually and the PLC is typically connected single phase or phase to phase it is not possible to
evaluate which of the phases to release and the unblocking scheme has thus not been supported.
2.2.5 Intertrip scheme

In the direct intertrip scheme, the carrier send signal CS is sent from an underreaching zone that
is tripping the line.
The received signal per phase is directly transferred to the trip function block for tripping with-
out local criteria. The signal is not further processed in the phase segregated communication log-
ic. In case of single-pole tripping the phase selection and logic for tripping the three phases is
performed in the trip function block.
2.2.6 Simplified logic diagram

The simplified logic diagram for one phase (Lx) is shown in figure 310.
639
SchemeType =
Intertrip
CSURLx
tSendMin AND
OR
BLOCK
AND
CSBLKLx OR
CRLx
Schemetype =
Permissive UR AND CSLx
OR
tCoord
25 ms
AND t TRLx
OR t
CACCLx
Schemetype =
Permissive OR
CSORLx OR AND
AND
tSendMin
OR
AND
SchemeType =
Blocking
BLKCSx
AND
CSL1
CSL2 AND
CSL2
OR CSMPH
CSL3 AND
CSL3
CSL1 AND
CSL1
CSL2 GENERAL
OR
CSL3
en06000311.vsd
Figure 309: Simplified logic diagram for one phase (Lx)
640
2.3 Function block
ZC1P-
ZC1PPSCH_85
BLOCK TRIP
BLKTR TRL1
BLKTRL1 TRL2
BLKTRL2 TRL3
BLKTRL3 CSL1
CACCL1 CSL2
CACCL2 CSL3
CACCL3 CSMPH
CSURL1 CRLL1
CSURL2 CRLL2
CSURL3 CRLL3
CSORL1
CSORL2
CSORL3
CSBLKL1
CSBLKL2
CSBLKL3
BLKCSL1
BLKCSL2
BLKCSL3
CRL1
CRL2
CRL3
CRMPH
en06000427.vsd
Figure 310: ZC1P function block

Table 335: Input signals for the ZC1PPSCH_85 (ZC1P-) function block
Signal Description
BLKTR Common signal for block of trip output from communication logic
in all phases
BLKTRL1 Signal for block of trip output from communication logic in Phase
L1
L2
L3
CACCL1 Accelerated Distance protection zone start in Phase L1
CACCL2 Accelerated Distance protection zone signal in Phase L2
CACCL3 Accelerated Distance protection zone signal in Phase L3
CSURL1 Underreaching distance protection zone signal in Phase L1
CSORL1 Overreaching distance protection zone signal in Phase L1
641
Signal Description
CSBLKL1 Reverse directed distance protection zone signal in Phase L1
BLKCSL1 Block of carrier send in POR and Blocking schemes in Phase L1
CRL1 Carrier signal received in Phase L1
CRMPH Carrier Signal received for multiphase fault
Table 336: Output signals for the ZC1PPSCH_85 (ZC1P-) function block
Signal Description
TRIP Common trip output in any of the phase
TRL1 Trip output in Phase L1
CSL1 Carrier Send in phase L1
CSMPH carrier Send for mulitphase fault
CRLL1 Carrier signal received in Phase L1
642

Table 337: Parameter group settings for the ZC1PPSCH_85 (ZC1P-) function
Operation Off - Off - Operation On / Off
On
Scheme Type Off - Permissive UR - Scheme type
Intertrip
Permissive UR
Permissive OR
Blocking
tCoord 0.000 - 60.000 0.001 0.000 s Trip coordinate time
tSendMin 0.000 - 60.000 0.001 0.100 s Minimum duration of Car-
rier Send signal
2.6 Technical data

Table 338: Phase segregated scheme communication logic for distance
protection (PSCH, 85)
Scheme type Intertrip -
Permissive UR
Permissive OR
Blocking
Co-ordination time for blocking com- (0.000-60.000) s ± 0.5% ± 10 ms
munication scheme
Minimum duration of a carrier send (0.000-60.000) s ± 0.5% ± 10 ms
signal
Security timer for loss of carrier guard (0.000-60.000) s ± 0.5% ± 10 ms
detection
Operation mode of unblocking logic Off -
NoRestart
Restart
643
Current reversal and weak-end infeed logic Chapter 12
for distance protection (PSCH, 85) Scheme communication
3 Current reversal and weak-end infeed logic

Function block name: ZCAL- IEC 60617 graphical symbol:

ANSI number: 85
ZCRWPSCH
3.1 Introduction
The current reversal function is used to prevent unwanted operations due to current reversal
when using permissive overreach protection schemes in application with parallel lines when the
overreach from the two ends overlaps on the parallel line.
The weak-end infeed logic is used in cases where the apparent power behind the protection can
be too low to activate the distance protection function. When activated, received carrier signal
together with local under voltage criteria and no reverse zone operation gives an instantaneous
trip. The received signal is also echoed back to accelerate the sending end.
Three phase or phase segregated scheme logic is available.

3.2.1 Current reversal logic
The current reversal logic uses a reverse zone connected to the input IRLVLx to recognize the
fault on the parallel line in phase Lx. When the reverse zone has been activated for a certain set-
table time tPickUpRev it prevents sending of a communication signal and activation of trip sig-
nal for a predefined time tDelayRev. This makes it possible for the carrier receive signal to reset
before the carrier aided trip signal is activated due to the current reversal by the forward directed
zone, see figure 312.
Figure 311: Current reversal logic
The preventing of sending carrier send signal CSLx and activating of the TRIPLx in the scheme
communication block ZCOM is carried out by connecting the IRVL signal to input BLOCK in
the ZCOM function.
644
The function has an internal 10 ms drop-off timer which secure that the current reversal logic
will be activated for short input signals even if the pick-up timer is set to zero.
3.2.2 Weak end infeed logic

The WEI function sends back (echoes) the received carrier signal under the condition that no
fault has been detected on the weak end by different fault detection elements (distance protection
in forward and reverse direction).
The WEI function returns the received carrier signal, see figure 313, when:
• No active signal present on the input BLOCK.

• The functional input CRLx is active. This input is usually connected to the CRL
output on the scheme communication logic ZCOM.
• The WEI function is not blocked by the active signal connected to the
WEIBLKL1 functional input or to the VTSZ functional input. The later is usually
configured to the BLOCK functional output of the fuse-failure function.
• No active signal has been present for at least 200 ms on the WEIBLK2 functional
input. An OR combination of all fault detection functions (not undervoltage) as
present within the terminal is usually used for this purpose.
Figure 312: Echo of a received carrier signal by the WEI function
When an echo function is used in both terminals (should generally be avoided), a spurious signal
can be looped round by the echo logics. To avoid a continuous lock-up of the system, the dura-
tion of the echoed signal is limited to 200 ms.
An undervoltage criteria is used as an additional tripping criteria, when the tripping of the local
breaker is selected, setting WEI = Echo&Trip, together with the WEI function and ECHO signal
has been issued by the echo logic, see figure 314.
645
Figure 313: Tripping part of the WEI logic, simplified diagram
3.3 Function block
ZCAL-
ZCRWPSCH_85
U3P IRVL
BLOCK TRWEI
IRVBLK TRWEIL1
IRV TRWEIL2
WEIBLK1 TRWEIL3
WEIBLK2 ECHO
VTSZ
CBOPEN
CRL
en06000287.vsd
Figure 314: ZCAL function block
646

Table 339: Input signals for the ZCRWPSCH_85 (ZCAL-) function block
Signal Description
IRVBLK Block of current reversal function
IRV Activation of current reversal logic
WEIBLK1 Block of WEI logic
WEIBLK2 Block of WEI logic due to operation of other protections
VTSZ Block of trip from WEI logic through fuse-failure function
CBOPEN Block of trip from WEI logic by an open breaker
CRL POR Carrier receive for WEI logic
Table 340: Output signals for the ZCRWPSCH_85 (ZCAL-) function block
Signal Description
IRVL Operation of current reversal logic
TRWEI Trip of WEI logic
TRWEIL1 Trip of WEI logic in phase L1
ECHO Carrier send by WEI logic

Table 341: Basic parameter group settings for the ZCRWPSCH_85 (ZCAL-) function
CurrRev Off - Off - Operating mode of Cur-
On rent Reversal Logic
tPickUpRev 0.000 - 60.000 0.001 0.020 s Pickup time for current
reversal logic
tDelayRev 0.000 - 60.000 0.001 0.060 s Time Delay to prevent
Carrier send and local
trip
647

WEI Off - Off - Operating mode of WEI
Echo logic
Echo & Trip
tPickUpWEI 0.000 - 60.000 0.001 0.010 s Coordination time for the
WEI logic
level
UPP< 10 - 90 1 70 %UB Phase to Phase voltage
for detection of fault con-
dition
UPN< 10 - 90 1 70 %UB Phase to Neutral voltage
dition
3.6 Technical data

Table 342: Current reversal and weak-end infeed logic
Detection level phase to neutral (10-90)% of Ubase ± 1.0% of Ur
voltage
Detection level phase to phase (10-90)% of Ubase ± 1.0% of Ur
voltage
Reset ratio <105% -
Operate time for current reversal (0.000-60.000) s ± 0.5% ± 10 ms
Delay time for current reversal (0.000-60.000) s ± 0.5% ± 10 ms
Coordination time for weak-end (0.000-60.000) s ± 0.5% ± 10 ms
infeed logic
648
Local acceleration logic (PLAL) Chapter 12
4 Local acceleration logic (PLAL)
Function block name: ZCLC- IEC 60617 graphical symbol:

ANSI number:
ZPLAL
4.1 Introduction
To achieve fast clearing of faults on the whole line, when no communication channel is avail-
able, local acceleration logic (ZCLC) can be used. This logic enables fast fault clearing during
certain conditions, but naturally, it can not fully replace a communication channel.
The logic can be controlled either by the auto re-closer (zone extension) or by the loss of load
current (loss-of-load acceleration).

4.2.1 Zone extension
The overreaching zone is connected to the input -EXACC. For this reason, configure the AR-
READY functional input to a READY functional output of a used auto-reclosing function or via
the selected binary input to an external autoreclosing device, see figure 316.
This will allow the overreaching zone to trip instantaneously.
Figure 315: Simplified logic diagram for local acceleration logic
649
After the auto-recloser initiates the close command and remains in the reclaim state, there will
be no ARREADY signal, and the protection will trip normally with step distance time functions.
In case of a fault on the adjacent line within the overreaching zone range, an unwanted auto-re-
closing cycle will occur. The step distance function at the reclosing attempt will prevent an un-
wanted retrip when the breaker is reclosed.
On the other hand, at a persistent line fault on line section not covered by instantaneous zone
(normally zone 1) only the first trip will be "instantaneous".
The function will be blocked if the input BLOCK is activated (common with loss of load accel-
eration).
4.2.2 Loss-of-load acceleration

When the "acceleration" is controlled by a loss of load, the overreaching zone used for "accel-
eration" connected to LLACC is not allowed to trip "instantaneously" during normal non-fault
system conditions. When all three-phase currents have been above the set value MinCurr for
more than setting tLowCurr, an overreaching zone will be allowed to trip "instantaneously" dur-
ing a fault condition when one or two of the phase currents will become low due to a three phase
trip at the opposite terminal, see figure 317. The current measurement is performed internally
and the STILL signal becomes logical one under the described conditions. The load current in a
healthy phase is in this way used to indicate the tripping at the opposite terminal. Note that this
function will not operate in case of three-phase faults, because none of the phase currents will
be low when the opposite terminal is tripped.
Figure 316: Loss of load acceleration - simplified logic diagram
Breaker closing signals can if decided be connected to block the function during normal closing.
650
4.3 Function block
ZCLC-
ZCLCPLAL
I3P TRZE
BLOCK TRLL
ARREADY
NDST
EXACC
BC
LLACC
en05000333.vsd
Figure 317: ZCLC function block

Table 343: Input signals for the ZCLCPLAL (ZCLC-) function block
Signal Description
ARREADY Autoreclosure ready, releases function used for fast trip
NDST Non directional criteria used to prevent instantaneous trip
EXACC Connected to function used for tripping at zone xtension
BC Breaker Close
LLACC Connected to function used for tripping at loss of load
Table 344: Output signals for the ZCLCPLAL (ZCLC-) function block
Signal Description
TRZE Trip by zone extension
TRLL Trip by loss of load
651

Table 345: Basic parameter group settings for the ZCLCPLAL (ZCLC-) function
On
values
LoadCurr 1 - 100 1 10 %IB Load current before dis-
turbance in % of IBase
LossOfLoad Off - Off - Enable/Disable opera-
On tion of Loss of load.
ZoneExtension Off - Off - Enable/Disable opera-
On tion of Zone extension
MinCurr 1 - 100 1 5 %IB Lev taken as curr loss
due to remote CB trip in
% of IBase
tLowCurr 0.000 - 60.000 0.001 0.200 s Time delay on pick-up for
MINCURR value
tLoadOn 0.000 - 60.000 0.001 0.000 s Time delay on pick-up for
load current release
tLoadOff 0.000 - 60.000 0.001 0.300 s Time delay on drop off for
load current release
652
Scheme communication logic Chapter 12
for residual overcurrent protection (PSCH, 85) Scheme communication
5 Scheme communication logic

for residual overcurrent protection (PSCH, 85)
Function block name: EFC-- IEC 60617 graphical symbol:

ANSI number: 85
ECPSCH
5.1 Introduction
To achieve fast fault clearance of earth faults on the part of the line not covered by the instanta-
neous step of the residual overcurrent protection, the directional residual overcurrent protection
can be supported with a logic that uses communication channels.
In the directional scheme, information of the fault current direction must be transmitted to the
other line end. With directional comparison, an operate time of the protection of 50 – 60 ms in-
cluding a channel transmission time of 20 ms, can be achieved. This short operate time enables
rapid autoreclosing function after the fault clearance.
The communication logic module for directional residual current protection enables blocking as
well as permissive under/overreach schemes. The logic can also be supported by additional logic
for weak-end-infeed and current reversal, included in the EFCA function.

The directional residual overcurrent protection (TEF) is configured to give input information,
i.e. directional fault detection signals, to the EFC logic:
• CACC: Signal to be used for tripping of the communication scheme, normally

the start signal of a forward overreach step of STFW.
• CSBLK: Signal to be used for sending block signal in the blocking communica-
tion scheme, normally the startpickup signal of a reverse overreach step of
STRV.
• CSUR: Signal to be used for sending permissive signal in the underreach permis-
sive communication scheme, normally the start signal of a forward underreach
step of STINn, where n corresponds to the underacting step.
• CSOR: Signal to be used for sending permissive signal in the overreach permis-
sive communication scheme, normally the start signal of a forward overreach
step of STINn, where n corresponds to the overreach step.
In addition to this a signal from the autoreclosing function should be configured to the BLKCS
input for blocking of the function at a single phase reclosing cycle.
653

In the blocking scheme a signal is sent to the other line end if the directional element detects an
earth fault in the reverse direction. When the forward directional element operates, it trips after
a short time delay if no blocking signal is received from the other line end. The time delay, nor-
mally 30 – 40 ms, depends on the communication transmission time and a chosen safety margin.
One advantage of the blocking scheme is that only one channel (carrier frequency) is needed if
the ratio of source impedances at both end is approximately equal for zero and positive sequence
source impedances, the channel can be shared with the impedance-measuring system, if that sys-
tem also works in the blocking mode. The power line carrier communication signal is transmit-
ted on a healthy line and no signal attenuation will occur due to the fault.
Blocking schemes are particular favorable for three-terminal applications if there is no zero-se-
quence outfeed from the tapping. The blocking scheme is immune to current reversals because
the received carrier signal is maintained long enough to avoid unwanted operation due to current
reversal. There is never any need for weak-end-infeed logic, because the strong end trips for an
internal fault when no blocking signal is received from the weak end. The fault clearing time is
however generally longer for a blocking scheme than for a permissive scheme.
If the fault is on the line, the forward direction measuring element operates. If no blocking signal
comes from the other line end via the CR binary input (carrier receive) the TRIP output is acti-
vated after the tCoord set time delay.
Figure 318: Simplified logic diagram for blocking scheme.
5.2.2 Permissive under/overreach scheme

In the permissive scheme the forward directed earth fault measuring element sends a permissive
signal to the other end, if an earth fault is detected in the forward direction. The directional ele-
ment at the other line end must wait for a permissive signal before activating an operation signal.
Independent channels must be available for the communication in each direction.
654
An impedance measuring relay which works in the same type of permissive mode, with one
channel in each direction, can share the channels with the communication scheme for residual
overcurrent protection. If the impedance measuring relay works in the permissive overreach
mode, common channels can be used in single-line applications. In case of double lines connect-
ed to a common bus at both ends, use common channels only if the ratio Z1S/Z0S (positive
through zero-sequence source impedance) is about equal at both ends. If the ratio is different,
the impedance measuring and the directional earth-fault current system of the healthy line may
detect a fault in different directions, which could result in unwanted tripping.
Common channels cannot be used when the weak-end-infeed function is used in the distance or
earth fault protection.
In case of an internal earth fault, the forward directed measuring element operates and sends a
permissive signal to the remote end via the CS output (carrier send). Local tripping is permitted
when the forward direction measuring element operates and a permissive signal is received via
the CR binary input (carrier receive).
The permissive scheme can of either underreach or overreach type. In the underreach alternative
an underreach directional residual overcurrent measurement element will be used as sending cri-
terion of the permissive send signal CSUR.
In the overreach alternative an overreach directional residual overcurrent measurement element

will be used as sending criterion of the permissive send signal CSOR. Also the underreach signal
CSUR can initiate sending.

In unblocking scheme, the lower dependability in permissive scheme is overcome by using the
loss of guard signal from the communication equipment to locally create a carrier receive signal.
It is common or suitable to use the function when older, less reliable, power-line carrier (PLC)
communication is used.
655
The unblocking function uses a carrier guard signal CRG, which must always be present, even
when no CR signal is received. The absence of the CRG signal for a time longer than the setting
tSecurity time is used as a CR signal, see figure 320. This also enables a permissive scheme to
operate when the line fault blocks the signal transmission.
The carrier received signal created by the unblocking function is reset 150 ms after the security
timer has elapsed. When that occurs an output signal LCG is activated for signalling purpose.
The unblocking function is reset 200 ms after that the guard signal is present again.
CR
tSecurity CRL
t >1
1
CRG
200 ms 150 ms
t OR t AND
AND
LCG
en05000746.vsd
Figure 319: Carrier guard logic with unblocking scheme
The unblocking function can be set in three operation modes (setting Unblock):
Off: The unblocking function is out of operation

No restart: Communication failure shorter than tSecurity will be ignored
If CRG disappeares a CRL signal will be transferred to the trip logic
There will not be any information in case of communication failure (LCG)
Restart Communication failure shorter than tSecure will be ignored
It sends a defined (150 ms) CRL after the disappearance of the CRG signal
The function will activate LCG output in case of communication failure
If the communication failure comes and goes (<200 ms) there will not be recurrent
signalling
656
5.3 Function block
EFC1-
ECPSCH_85
BLOCK TRIP
BLKTR CS
BLKCS CRL
CSBLK LCG
CACC
CSOR
CSUR
CR
CRG
en06000288.vsd
Figure 320: EFC function block

Table 346: Input signals for the ECPSCH_85 (EFC1-) function block
Signal Description
BLKTR Signal for blocking trip due to communication logic
BLKCS Signal for blocking CS in Overreach and Blocking schemes
CSBLK Reverse residual overcurrent signal for Carrier Send
CACC Signal to be used for tripping by Communication Scheme
CSOR Overreaching residual overcurrent signal for Carrier Send
CSUR Underreaching residual overcurrent signal for Carrier Send
CR Carrier Receive for Communication Scheme Logic
CRG Carrier guard signal received
Table 347: Output signals for the ECPSCH_85 (EFC1-) function block
Signal Description
TRIP Trip by Communication Scheme Logic
CS Carrier Send by Communication Scheme Logic
CRL Carrier Receive from Communication Scheme Logic
LCG loss of carrier guard signal
657

Table 348: Basic parameter group settings for the ECPSCH_85 (EFC1-) function
On
SchemeType Off - Permissive UR - Scheme type, Mode of
Intertrip Operation
Permissive UR
Permissive OR
Blocking
tCoord 0.000 - 60.000 0.001 0.035 s Communication scheme
coordination time
tSendMin 0.000 - 60.000 0.001 0.100 s Minimum duration of a
carrier send signal
Table 349: Advanced parameter group settings for the ECPSCH_85 (EFC1-) function
Unblock Off - Off - Operation mode of
NoRestart unblocking logic
Restart
tSecurity 0.000 - 60.000 0.001 0.035 s Security timer for loss of
carrier guard detection
5.6 Technical data

Table 350: Scheme communication logic for residual overcurrent protection (PSCH, 85)
Communication scheme coordi- (0.000-60.000) s ± 0.5% ± 10 ms
nation time
Scheme type Permissive UR -
Permissive OR
Blocking
658
6 Current reversal and weak-end infeed logic

Function block name: EFCA- IEC 60617 graphical symbol:

ANSI number: 85
ECRWPSCH
6.1 Introduction
The EFCA additional communication logic is a supplement to the EFC scheme communication
logic for the residual overcurrent protection.
To achieve fast fault clearing for all earth faults on the line, the directional earth-fault protection
function can be supported with logic, that uses communication channels. REx670 terminals have
for this reason available additions to scheme communication logic.
If parallel lines are connected to common busbars at both terminals, overreaching permissive
communication schemes can trip unselectively due to fault current reversal. This unwanted trip-
ping affects the healthy line when a fault is cleared on the other line. This lack of security can
result in a total loss of interconnection between the two buses. To avoid this type of disturbance,
a fault current-reversal logic (transient blocking logic) can be used.
Permissive communication schemes for residual overcurrent protection, can basically operate
only when the protection in the remote terminal can detect the fault. The detection requires a suf-
ficient minimum residual fault current, out from this terminal. The fault current can be too low
due to an opened breaker or high positive and/or zero sequence source impedance behind this
terminal. To overcome these conditions, weak end infeed (WEI) echo logic is used.

6.2.1 Directional comparison logic function
The directional comparison function contains logic for blocking overreach and permissive over-
reach schemes.
The circuits for the permissive overreach scheme contain logic for current reversal and weak end
infeed functions. These functions are not required for the blocking overreach scheme.
Use the independent or inverse time functions in the directional earth-fault protection module to
get back-up tripping in case the communication equipment malfunctions and prevents operation
of the directional comparison logic.
Figure 322 and figure 323 show the logic circuits.
Connect the necessary signal from the auto-recloser for blocking of the directional comparison
scheme, during a single-phase auto-reclosing cycle, to the BLOCK input of the directional com-
parison module.
659
6.2.2 Fault current reversal logic

The fault current reversal logic uses a reverse directed element, connected to IRV, which recog-
nizes that the fault is in reverse direction. When the reverse direction element is activated during
the tPickUp time, the IRVL signal is activated, see figure 322. The logic is now ready to handle
a current reversal without tripping. IRVL will be connected to the block input on the permissive
overreach scheme.
When the fault current is reversed on the non faulty line, IRV is deactivated and IRVBLK is ac-
tivated. The reset of IRVL is delayed by the tDelay time, see figure 322. This ensures the reset
of the carrier receive CR signal.
Figure 321: Simplified logic diagram, current reversal
6.2.3 Weak and infeed logic

The weak end infeed function can be set to send only an echo signal (WEI=Echo) or an echo
signal and a trip signal (WEI=Trip). See figure 323 and figure 324.
The weak end infeed logic uses normally a reverse and a forward direction element, connected
to WEIBLK via an OR-gate. See figure 323. If neither the forward nor the reverse directional
measuring element is activated during the last 200 ms. The weak-end-infeed logic echoes back
the received permissive signal. See figure 323.
If the forward or the reverse directional measuring element is activated during the last 200 ms,
the fault current is sufficient for the IED to detect the fault with the earth-fault function that is
in operation.
Figure 322: Simplified logic diagram, weak end infeed - echo.
With the Trip setting, the logic sends an echo according to above. Further, it activates the TR-
WEI signal to trip the breaker if the echo conditions are fulfilled and the neutral point voltage is
above the set operate value for 3U0>
660
The voltage signal that is used to calculate the zero sequence voltage is set in the earth-fault
function that is in operation.
Figure 323: Simplified logic diagram, weak end infeed - Trip.
The weak end infeed echo sent to the strong line end has a maximum duration of 200 ms. When
this time period has elapsed, the conditions that enable the echo signal to be sent are set to zero
for a time period of 50 ms. This avoids ringing action if the weak end echo is selected for both
line ends.
6.3 Function block
EFCA-
ECRWPSCH_85
U3P IRVL
BLOCK TRWEI
IRVBLK ECHO
IRV CR
WEIBLK1
WEIBLK2
VTSZ
CBOPEN
CRL
en06000289.vsd
Figure 324: EFCA function block
661

Table 351: Input signals for the ECRWPSCH_85 (EFCA-) function block
Signal Description
IRVBLK Block of current reversal function
IRV Activation of current reversal logic
WEIBLK1 Block of WEI Logic
WEIBLK2 Block of WEI logic due to operation of other protections
VTSZ Block of trip from WEI logic through fuse-failure function
CRL POR Carrier receive for WEI logic
Table 352: Output signals for the ECRWPSCH_85 (EFCA-) function block
Signal Description
IRVL Operation of current reversal logic
TRWEI Trip of WEI logic
ECHO Carrier send by WEI logic
CR POR Carrier signal received from remote end

Table 353: Basic parameter group settings for the ECRWPSCH_85 (EFCA-) function
CurrRev Off - Off - Operating mode of Cur-
reversal logic
trip
WEI Off - Off - Operating mode of WEI
Echo logic
Echo & Trip
WEI logic
level
3U0> 5 - 70 1 25 %UB Neutral voltage setting for
fault conditions measure-
ment
662
6.6 Technical data

Table 354: Current reversal and weak-end infeed logic
Operate voltage 3Uo for WEI trip (5-70)% of Ubase ± 1.0% of Ur
Reset ratio >95% -
Coordination time for weak-end (0.000–60.000) s ± 0.5% ± 10 ms
infeed logic
663
Current reversal and weak-end infeed logic for Chapter 12
phase segregated communication (PSCH) Scheme communication
7 Current reversal and weak-end infeed logic for

phase segregated communication (PSCH)
Function block name: ZC1W- IEC 60617 graphical symbol:

ANSI number:
ZC1WPSCH
7.1 Introduction
The current reversal function is used to prevent unwanted operations due to current reversal
when using permissive overreach protection schemes in application with parallel lines when the
overreach from the two ends overlaps on the parallel line.
The weak-end infeed logic is used in cases where the apparent power behind the protection can
be too low to activate the distance protection function. When activated, received carrier signal
together with local under voltage criteria and no reverse zone operation gives an instantaneous
trip. The received signal is also echoed back to accelerate the sending end.

7.2.1 Current reversal logic
The current reversal logic uses a reverse zone connected to the input IRVLx to recognize the
fault on the parallel line in phase Lx. When the reverse zone has been activated for a certain set-
table time tPickUpRev it prevents sending of a communication signal and activation of trip sig-
nal for a predefined time tDelayRev. This makes it possible for the carrier receive signal to reset
before the carrier aided trip signal is activated due to the current reversal by the forward directed
zone, see figure 326.
tPickUpRev 10 ms tPickUpRev
IRVLn t t t
tDelayRev
IRVOPLn
IRVBLKLn & t
en06000474.vsd
Figure 325: Current reversal logic
The preventing of sending carrier send signal CSLn and activating of the TRIPLn in the scheme
communication block ZCOM is carried out by connecting the IRVOPLn signal to input
BLOCKLn in the ZCOM function.
664
The function has an internal 10 ms drop-off timer which secure that the current reversal logic
will be activated for short input signals even if the pick-up timer is set to zero.
Weak end infeed logic
The WEI function sends back (echoes) the received carrier signal under the condition that no
fault has been detected at the weak end by different fault detection elements (distance protection
in forward and reverse direction).
VTSZ
BLOCK >1
tWEI 50 ms 200 ms ECHOLn - cont.

CRLLn
t & t t ECHOLn
&
200 ms
WEIBLK1
t
200 ms
WEIBLK2
t
en07000085.vsd
Figure 326: Weak end infeed logic
The WEI function returns the received carrier signal, see figure 327, when:
• The functional input CRLx is active. This input is usually connected to the CRLx
output on the scheme communication logic ZCOM.
• The WEI function is not blocked by the active signal connected to the
WEIBLKLx functional input or to the VTSZ functional input. The later is usually
configured to the STGEN functional output of the fuse-failure function.
• No active signal has been present for at least 200 ms on the WEIBLK2 functional
input. An OR combination of all fault detection functions (not undervoltage) as
present within the terminal is usually used for this purpose.
When an echo function is used in both terminals (should generally be avoided), a spurious signal
can be looped round by the echo logics. To avoid a continuous lock-up of the system, the dura-
tion of the echoed signal is limited to 200 ms. An undervoltage criteria is used as an additional
tripping criteria, when the tripping of the local breaker is selected, setting WEI = Echo &Trip,
together with the WEI function and ECHO signal has been issued by the echo logic, see figure
328.
665
WEI = Echo&Trip
ECHOLn - cont.
CBOPEN
STUL1N
100 ms TRWEI
OR OR
STUL2N AND t
STUL3N 15 ms
TRWEIL1
AND t
15 ms
TRWEIL2
AND t
15 ms
TRWEIL3
AND t
en00000551.vsd
Figure 327: Tripping part of the WEI logic, simplified diagram
7.3 Function block
ZC1W-
ZC1WPSCH_85
U3P TRPWEI
BLOCK TRPWEIL1
BLKZ TRPWEIL2
CBOPEN TRPWEIL3
CRL1 IRVOP
CRL2 IRVOPL1
CRL3 IRVOPL2
IRVL1 IRVOPL3
IRVL2 ECHO
IRVL3 ECHOL1
IRVBLKL1 ECHOL2
IRVBLKL2 ECHOL3
IRVBLKL3
WEIBLK
WEIBLKL1
WEIBLKL2
WEIBLKL3
WEIBLKOP
WEIBLKO1
WEIBLKO2
WEIBLKO3
en06000477.vsd
Figure 328: ZC1W function block
666

Table 355: Input signals for the ZC1WPSCH_85 (ZC1W-) function block
Signal Description
U3P Voltage
BLKZ Block of trip from WEI logic by the fuse-failure function
CRL1 Carrier receive for WEI logic in Phase L1
IRVL1 Activation of current reversal logic in Phase L1
IRVL2 Activation of current reversal logic in Phase L2
IRVL3 Activation of current reversal logic in phase L3
IRVBLKL1 Block of current reversal function in Phase L1
WEIBLK Block of WEI logic
WEIBLKL1 Block of WEI logic in Phase L1
WEIBLKOP Block of WEI logic due to operation of other protection
WEIBLKO1 Block of WEI logic in Phase L1 due to operation of other protec-
tion
tions
tions
Table 356: Output signals for the ZC1WPSCH_85 (ZC1W-) function block
Signal Description
TRPWEI Trip of WEI logic
TRPWEIL1 Trip of WEI logic in Phase L1
IRVOP Operation of current reversal logic
IRVOPL1 Operation of current reversal logic in Phase L1
667
Signal Description
ECHO Carrier Send by WEI logic
ECHOL1 Carrier Send by WEI logic in Phase L1

Table 357: Basic parameter group settings for the ZC1WPSCH_85 (ZC1W-) function
UBase 0.05 - 2000.00 0.05 400.00 kV Base setting for Voltage
level
OperCurrRev Off - Off - Operating mode of Cur-
reversal logic
trip
OperationWEI Off - Off - Operating mode of WEI
Echo logic
Echo & Trip
UPE< 10 - 90 1 70 %UB Phase to Earth voltage
dition
UPP< 10 - 90 1 70 %UB Phase to Phase voltage
dition
WEI logic
7.6 Technical data

Table 358: Current reversal and weak-end infeed logic for phase segregated
communication (PSCH, 85)
Detection level phase to neutral (10-90)% of Ubase ± 1.0% of Ur
voltage
668

Detection level phase to phase (10-90)% of Ubase ± 1.0% of Ur
voltage
Reset ratio <105% -
Coordination time for weak-end (0.000-60.000) s ± 0.5% ± 10 ms
infeed logic
669
670
Logic
Chapter 13 Logic
About this chapter

This chapter describes primarily tripping and trip logic functions. The way the functions work,
their setting parameters, function blocks, input and output signals and technical data are included
for each function.
671
Tripping logic (PTRC, 94) Chapter 13
Logic
1 Tripping logic (PTRC, 94)
Function block name: TRPx- IEC 60617 graphical symbol:

ANSI number: 94
SMPPTRC
I->O
1.1 Introduction
A function block for protection tripping is provided for each circuit breaker involved in the trip-
ping of the fault. It provides the pulse prolongation to ensure a trip pulse of sufficient length, as
well as all functionality necessary for correct co-operation with autoreclosing functions.
The trip function block includes functionality for evolving faults and breaker lock-out.

The duration of a trip output signal from the TRPx function is settable (tTripMin). The pulse
length should be long enough to secure the breaker opening.
For three-pole tripping, TRPx function has a single input (TRIN) through which all trip output
signals from the protection functions within the IED, or from external protection functions via
one or more of the IEDs binary inputs, are routed. It has a single trip output (TRIP) for connec-
tion to one or more of the IEDs binary outputs, as well as to other functions within the IED re-
quiring this signal.
BLOCK
tTripMin TRIP
TRIN OR
AND t
Operation Mode = On
Program = 3Ph
en05000789.vsd
Figure 329: Simplified logic diagram for three phasetrip
The TRPx function for single- and two-pole tripping has additional phase segregated inputs for
this, as well as inputs for faulted phase selection. The latter inputs enable single- and two-pole
tripping for those functions which do not have their own phase selection capability, and there-
672
Logic
fore which have just a single trip output and not phase segregated trip outputs for routing through
the phase segregated trip inputs of the expanded TRPx function. Examples of such protection
functions are the residual overcurrent protections. The expanded TRPx function has two inputs
for these functions, one for impedance tripping (e.g. carrier-aided tripping commands from the
scheme communication logic), and one for earth fault tripping (e.g. tripping output from a resid-
ual overcurrent protection). Additional logic secures a three-pole final trip command for these
protection functions in the absence of the required phase selection signals.
The expanded TRPx function has three trip outputs TRL1, TRL2, TRL3 (besides the trip output
TRIP), one per phase, for connection to one or more of the IEDs binary outputs, as well as to
other functions within the IED requiring these signals. There are also separate output signals in-
dicating single pole, two pole or three pole trip. These signals are important for cooperation with
the auto-reclosing function.
The expanded TRPx function is equipped with logic which secures correct operation for evolv-
ing faults as well as for reclosing on to persistent faults. A special input is also provided which
disables single- and two-pole tripping, forcing all tripping to be three-pole.
In multi-breaker arrangements, one TRPx function block is used for each breaker. This can be
the case if single pole tripping and auto-reclosing is used.
The breaker close lockout function can be activated from an external trip signal from another
protection function via input (SETLKOUT) or internally at a three pole trip, if desired.
It is possible to lockout seal in the tripping output signals or use blocking of closing only the
choice is by setting TripLockout.
1.2.1 Logic diagram
TRINL1
TRINL2
OR
TRINL3
1PTRZ OR
1PTREF
OR
TRIN RSTTRIP - cont.
AND
Program = 3ph
en05000517.vsd
Figure 330: Three-phase front logic — simplified logic diagram
673
Logic
TRIN
TRINL1
PSL1 L1TRIP
OR
AND
TRINL2
PSL2 L2TRIP
OR
AND
TRINL3
PSL3 L3TRIP
OR
AND
OR
OR OR
-loop
-loop
OR
AND AND
AND
1PTREF AND 50 ms
1PTRZ OR t
en05000518.vsd
Figure 331: Phase segregated front logic
674
Logic
150 ms
L1TRIP OR
t RTRIP
OR
2000 ms
t
OR
AND
150 ms
L2TRIP OR
t STRIP
OR
2000 ms
t
OR
AND
150 ms
L3TRIP OR
t TTRIP
OR
2000 ms
t
OR
AND
OR
OR AND
P3PTR
OR
-loop
en05000519.vsd
Figure 332: Additional logic for the 1ph/3ph operating mode
675
Logic
150 ms
L1TRIP - cont.
t OR RTRIP
OR
2000 ms
t
AND
150 ms
L2TRIP
t OR STRIP
OR
2000 ms
t AND
AND
150 ms
L3TRIP
t OR TTRIP
OR
2000 ms
t
AND
OR
AND
TRIP OR
OR
-loop
en05000520.vsd
Figure 333: Additional logic for the 1ph/2ph/3ph operating mode
676
Logic
BLOCK
RTRIP TRL1
AND
OR
STRIP TRL2
AND
OR
TTRIP TRL3
AND
OR
RSTTRIP
TRIP
OR
TR3P
AND AND
OR
-loop
AND 10 ms
TR1P
AND t
AND 5 ms
TR2P
AND t
OR
AND
-loop
en05000521.vsd
Figure 334: Final tripping circuits
677
Logic
1.3 Function block
TRP1-
SMPPTRC_94
BLOCK TRIP
BLKLKOUT TRL1
TRIN TRL2
TRINL1 TRL3
TRINL2 TR1P
TRINL3 TR2P
PSL1 TR3P
PSL2 CLLKOUT
PSL3
1PTRZ
1PTREF
P3PTR
SETLKOUT
RSTLKOUT
en05000707.vsd
Figure 335: TRP function block

Table 359: Input signals for the SMPPTRC_94 (TRP1-) function block
Signal Description
BLKLKOUT Blocks circuit breaker lockout output (CLLKOUT)
TRIN Trip all phases
TRINL1 Trip phase 1
TRINL2 Trip phase 2
TRINL3 Trip phase 3
PSL1 Functional input for phase selection in phase L1
1PTRZ Zone Trip with a separate phase selection
1PTREF Single phase DEF Trip for separate phase selection
P3PTR Prepare all tripping to be three-phase
SETLKOUT Input for setting the circuit breaker lockout function
RSTLKOUT Input for resetting the circuit breaker lockout function
678
Logic
Table 360: Output signals for the SMPPTRC_94 (TRP1-) function block
Signal Description
TRIP General trip output signal
TR1P Tripping single-pole
TR2P Tripping two-pole
TR3P Tripping three-pole
CLLKOUT Circuit breaker lockout output (set until reset)

Table 361: Basic parameter group settings for the SMPPTRC_94 (TRP1-) function
On
Program 3 phase - 1ph/3ph - Three ph; single or three
1ph/3ph ph; single, two or three
1Ph/2Ph/3Ph ph trip
tTripMin 0.000 - 60.000 0.001 0.150 s Minimum duration of trip

output signal
Table 362: Advanced parameter group settings for the SMPPTRC_94 (TRP1-) function
TripLockout Off - Off - On: activate output
On (CLLKOUT) and trip
latch, Off: only outp
AutoLock Off - Off - On: lockout from input
On (SETLKOUT) and trip,
Off: only inp
1.6 Technical data

Table 363: Tripping logic (PTRC, 94)
Trip action 3-ph, 1/3-ph, 1/2/3-ph -
Minimum trip pulse length (0.000-60.000) s ± 0.5% ± 10 ms
Timers (0.000-60.000) s ± 0.5% ± 10 ms
679
Trip matrix logic (GGIO) Chapter 13
Logic
2 Trip matrix logic (GGIO)
Function block name: TRxx- IEC 60617 graphical symbol:

ANSI number:
TRMGGIO
2.1 Introduction
Twelve trip matrix logic blocks are included in the IED. The function blocks are used in the con-
figuration of the IED to route trip signals and/or other logical output signals to the different out-
put relays.
The matrix and the physical outputs will be seen in the PCM 600 engineering tool and this allows
the user to adapt the signals to the physical tripping outputs according to the specific application
needs.

Tripping matrix logic block is provided with 32 input signals and 3 output signals. The function
block incorporates internal logic OR gates in order to provide the necessary grouping of con-
nected input signals (e.g. for tripping and alarming purposes) to the three output signals from the
function block.
Internal built-in OR logic is made in accordance with the following three rules:
1. when any one of first 16 inputs signals (i.e. INPUT1 to INPUT16) has logical val-
ue 1 (i.e. TRUE) the first output signal (i.e. OUTPUT1) will get logical value 1
(i.e. TRUE). Additional time delays can be introduced for OUTPUT1 via setting
parameters "PulseTime1", "OnDelayTime1" & "OffDelayTime1".
2. when any one of second 16 inputs signals (i.e. INPUT17 to INPUT32) has logical
value 1 (i.e. TRUE) the second output signal (i.e. OUTPUT2) will get logical val-
ue 1 (i.e. TRUE). Additional time delays can be introduced for OUTPUT2 via
setting parameters "PulseTime2", "OnDelayTime2" & "OffDelayTime2"
3. when any one of all 32 input signals (i.e. INPUT1 to INPUT32) has logical value
1 (i.e. TRUE) the third output signal (i.e. OUTPUT3) will get logical value 1 (i.e.
TRUE). Additional time delays can be introduced for OUTPUT3 via setting pa-
rameters "PulseTime3", "OnDelayTime3" & "OffDelayTime3".
Detailed logical diagram is shown in see figure 337
680
Logic
Pulse Time 1
&
Pulse t pulse
Input 1 Output 1
On Delay Time 1
&
≥1
Input 2
Input 16
≥1
t on t off
Off Delay Time 1
Pulse Time 2
&
t pulse
Pulse
Input 17 Output 2
Input 18
On Delay Time 2
&
≥1
Input 32
≥1
t on t off
Off Delay Time 2
Pulse Time 3
&
Pulse t pulse
Output 3
On Delay Time 3
&
≥1
≥1
t on t off
Off Delay Time 3
en06000514.vsd
Figure 336: Tripping Matrix Internal Logic.
Output signals from this function block are typically connected to other logic blocks or directly
to output contacts from the IED. When used for direct tripping of the circuit breaker(s) the pulse
time delay on that output signal shall be set to approximately 0,150s in order to obtain satisfac-
tory minimum duration of the trip pulse to the circuit breaker trip coils.
Twelve such function blocks are available in the IED.
681
Logic
2.3 Function block
T R01-
TRMGGIO
INPUT 1 OUT PUT 1
INPUT 2 OUT PUT 2
INPUT 3 OUT PUT 3
INPUT 4
INPUT 5
INPUT 6
INPUT 7
INPUT 8
INPUT 9
INPUT 10
INPUT 11
INPUT 12
INPUT 13
INPUT 14
INPUT 15
INPUT 16
INPUT 17
INPUT 18
INPUT 19
INPUT 20
INPUT 21
INPUT 22
INPUT 23
INPUT 24
INPUT 25
INPUT 26
INPUT 27
INPUT 28
INPUT 29
INPUT 30
INPUT 31
INPUT 32
en05000370.vsd
Figure 337: TR function block

Table 364: Input signals for the TMAGGIO (TR01-) function block
Signal Description
INPUT1 Binary input 1
682
Logic
Signal Description
Table 365: Output signals for the TMAGGIO (TR01-) function block
Signal Description
OUTPUT1 OR function betweeen inputs 1 to 16
OUTPUT2 OR function between inputs 17 to 32
OUTPUT3 OR function between inputs 1 to 32
683
Logic

Table 366: Basic parameter group settings for the TMAGGIO (TR01-) function
Operation Off - ON - Operation Off / On
ON
PulseTime 0.000 - 60.000 0.001 0.000 s Output pulse time
OnDelay 0.000 - 60.000 0.001 0.000 s Output on delay time
OffDelay 0.000 - 60.000 0.001 0.000 s Output off delay time
ModeOutput1 Steady - Steady - Mode for output ,1 steady
Pulsed or pulsed
ModeOutput2 Steady - Steady - Mode for output 2, steady
Pulsed or pulsed
ModeOutput3 Steady - Steady - Mode for output 3, steady
Pulsed or pulsed
684
Configurable logic blocks (LLD) Chapter 13
Logic
3 Configurable logic blocks (LLD)
3.1 Introduction
A number of logic blocks and timers are available for user to adapt the configuration to the spe-
cific application needs.
3.2 Inverter function block (INV)
I001-
INV
INPUT OUT
en04000404.vsd
Figure 338: INV function block
Table 367: Input signals for the INV (I001-) function block
Signal Description
INPUT Input
Table 368: Output signals for the INV (I001-) function block
Signal Description
OUT Output
3.3 OR function block (OR)

The OR function is used to form general combinatory expressions with boolean variables. The
OR function block has six inputs and two outputs. One of the outputs is inverted.
O001-
OR
INPUT1 OUT
INPUT2 NOUT
INPUT3
INPUT4
INPUT5
INPUT6
en04000405.vsd
Figure 339: OR function block
685
Logic
Table 369: Input signals for the OR (O001-) function block

Signal Description
INPUT1 Input 1 to OR gate
Table 370: Output signals for the OR (O001-) function block

Signal Description
OUT Output from OR gate
NOUT Inverted output from OR gate
3.4 AND function block (AND)

The AND function is used to form general combinatory expressions with boolean variables.The
AND function block has four inputs and two outputs. One of the inputs and one of the outputs
are inverted.
A001-
AND
INPUT 1 OUT
INPUT 2 NOUT
INPUT 3
INPUT 4N
en04000406.vsd
Figure 340: AND function block
Table 371: Input signals for the AND (A001-) function block
Signal Description
INPUT1 Input 1
INPUT2 Input 2
INPUT3 Input 3
INPUT4N Input 4 inverted
Table 372: Output signals for the AND (A001-) function block
Signal Description
OUT Output
NOUT Output inverted
686
Logic
3.5 Timer function block (Timer)

The function block TIMER has drop-out and pick-up delayed outputs related to the input signal.
The timer has a settable time delay (parameter T).
T M01-
Timer
INPUT ON
T OFF
en04000378.vsd
Figure 341: TM function block
Table 373: Input signals for the Timer (TM01-) function block
Signal Description
INPUT Input to timer
Table 374: Output signals for the Timer (TM01-) function block
Signal Description
ON Output from timer , pick-up delayed
OFF Output from timer, drop-out delayed
Table 375: General settings for the Timer (TM01-) function

T 0.000 - 90000.000 0.001 0.000 s Time delay of function
3.6 Pulse timer function block (PULSE)

The pulse function can be used, for example, for pulse extensions or limiting of operation of out-
puts. The pulse timer TP has a settable length.
TP01-
Pulse
INPUT OUT
en04000407.vsd
Figure 342: PULSE function block
Table 376: Input signals for the Pulse (TP01-) function block
Signal Description
INPUT Input to pulse timer
687
Logic
Table 377: Output signals for the Pulse (TP01-) function block
Signal Description
OUT Output from pulse timer
Table 378: General settings for the Pulse (TP01-) function

T 0.000 - 90000.000 0.001 0.010 s Time delay of function
3.7 Exclusive OR function block (XOR)

The exclusive OR function XOR is used to generate combinatory expressions with boolean vari-
ables. The function block XOR has two inputs and two outputs. One of the outputs is inverted.
The output signal is 1 if the input signals are different and 0 if they are equal.
XO01-
XOR
INPUT 1 OUT
INPUT 2 NOUT
en04000409.vsd
Figure 343: XOR function block
Table 379: Input signals for the XOR (XO01-) function block
Signal Description
INPUT1 Input 1 to XOR gate
INPUT2 Input 2 to XOR gate
Table 380: Output signals for the XOR (XO01-) function block
Signal Description
OUT Output from XOR gate
NOUT Inverted output from XOR gate
3.8 Set-reset with memory function block (SRM)

The Set-Reset function SRM is a flip-flop with memory that can set or reset an output from two
inputs respectively. Each SRM function block has two outputs, where one is inverted. The mem-
ory setting controls if the flip-flop after a power interruption will return the state it had before or
if it will be reset.
688
Logic
Table 381: Truth table for the Set-Reset (SRM) function block
SET RESET OUT NOUT
1 0 1 0
0 1 0 1
1 1 0 1
0 0 0 1
SM01-
SRM
SET OUT
RESET NOUT
en04000408.vsd
Figure 344: SM function block
Table 382: Input signals for the SRM (SM01-) function block
Signal Description
SET Set input
RESET Reset input
Table 383: Output signals for the SRM (SM01-) function block
Signal Description
OUT Output
NOUT Output inverted
Table 384: Parameter group settings for the SRM (SM01-) function
Memory Off - Off - Operating mode of the
On memory function
3.9 Controllable gate function block (GT)

The GT function block is used for controlling if a signal should be able to pass from the input to
the output or not depending on a setting.
689
Logic
GT 01-
GT
INPUT OUT
en04000410.vsd
Figure 345: GT function block
Table 385: Input signals for the GT (GT01-) function block

Signal Description
INPUT Input to gate
Table 386: Output signals for the GT (GT01-) function block

Signal Description
OUT Output from gate
Table 387: Parameter group settings for the GT (GT01-) function

On
3.10 Settable timer function block (TS)

The function block TS timer has outputs for delayed input signal at drop-out and at pick-up. The
timer has a settable time delay. It also has an Operation setting On, Off that controls the opera-
tion of the timer.
TS01-
TimerSet
INPUT ON
OFF
en04000411.vsd
Figure 346: TS function block
Table 388: Input signals for the TimerSet (TS01-) function block
Signal Description
INPUT Input to timer
690
Logic
Table 389: Output signals for the TimerSet (TS01-) function block
Signal Description
ON Output from timer, pick-up delayed
OFF Output from timer, drop-out delayed
Table 390: Parameter group settings for the TimerSet (TS01-) function
On
t 0.000 - 90000.000 0.001 0.000 s Delay for settable timer n
3.11 Technical data

Table 391: Configurable logic blocks
Logic block Quantity with update rate Range or value Accuracy
fast medium normal
LogicAND 60 60 160 - -
LogicOR 60 60 160 - -
LogicXOR 10 10 20 - -
LogicInverter 30 30 80 - -
LogicSRMemory 10 10 20 - -
LogicGate 10 10 20 - -
LogicTimer 10 10 20 (0.000–90000.00 ± 0.5% ± 10 ms
0) s
LogicPulseTimer 10 10 20 (0.000–90000.00 ± 0.5% ± 10 ms
0) s
LogicTimerSet 10 10 20 (0.000–90000.00 ± 0.5% ± 10 ms
0) s
LogicLoopDelay 10 10 20 (0.000–90000.00 ± 0.5% ± 10 ms
0) s
691
Fixed signal function block (FIXD) Chapter 13
Logic
4 Fixed signal function block (FIXD)
Function block name: FIXD- IEC 60617 graphical symbol:

ANSI number:
FixedSignals
4.1 Introduction
The fixed signals function block generates a number of pre-set (fixed) signals that can be used
in the configuration of an IED, either for forcing the unused inputs in the other function blocks
to a certain level/value, or for creating a certain logic.

There are eight outputs from the FIXD function block: OFF is a boolean signal, fixed to OFF
(boolean 0) value; ON is a boolean signal, fixed to ON (boolean 1) value; INTZERO is an inte-
ger number, fixed to integer value 0; INTONE is an integer number, fixed to integer value 1;
REALZERO is a floating point real number, fixed to 0.0 value; STRNULL is a string, fixed to
an empty string (null) value; ZEROSMPL is a 32-bit integer, fixed to 0 value; GRP_OFF is a
32-bit integer, fixed to 0 value; The function does not allow any settings and therefore it’s not
present in PCM 600. For examples on how to use each type of output in the configuration, please
read the Application Manual.
4.3 Function block
FIXD-
FixedSignals
OFF
ON
INTZERO
INTONE
REALZERO
STRNULL
ZEROSMPL
GRP_OFF
en05000445.vsd
Figure 347: FIXD function block
692
Fixed signal function block (FIXD) Chapter 13
Logic

Table 392: Output signals for the FixedSignals (FIXD-) function block
Signal Description
OFF Boolean signal fixed off
ON Boolean signal fixed on
INTZERO Integer signal fixed zero
INTONE Integer signal fixed one
REALZERO Real signal fixed zero
STRNULL String signal with no characters
ZEROSMPL Channel id for zero sample
GRP_OFF Group signal fixed off

693
Boolean 16 to Integer conversion B16I Chapter 13
Logic
5 Boolean 16 to Integer conversion B16I
Function block name: BB-- IEC 60617 graphical symbol:

ANSI number:
–
5.1 Introduction
The B16I function block (or the Boolean 16 to Integer conversion function block) is used within
the CAP tool to transform a set of 16 binary (logical) signals into an integer.

The B16I function block is used within the CAP tool to transform an integer into a set of 16 bi-
nary (logical) signals. The B1I6 function block is designed for receiving the integer input local-
ly. The BLOCK input will freeze the logical outputs at the last value.
BB01-
B16I
BLOCK OUT
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
IN11
IN12
IN13
IN14
IN15
IN16
en07000128.vsd
Figure 348: The B16I function block.
694
Boolean 16 to Integer conversion B16I Chapter 13
Logic

Table 393: Input signals for the B16I (BB01-) function block
Signal Description
IN1 Input 1
IN2 Input 2
IN3 Input 3
IN4 Input 4
IN5 Input 5
IN6 Input 6
IN7 Input 7
IN8 Input 8
IN9 Input 9
IN10 Input 10
IN11 Input 11
IN12 Input 12
IN13 Input 13
IN14 Input 14
IN15 Input 15
IN16 Input 16
Table 394: Output signals for the B16I (BB01-) function block
Signal Description
OUT Output value

695
Boolean 16 to Integer conversion with logic Chapter 13
node representation (B16IGGIO) Logic
6 Boolean 16 to Integer conversion with logic node

representation (B16IGGIO)
Function block name: BA-- IEC 60617 graphical symbol:

ANSI number:
B16IGGIO
6.1 Introduction
The B16IGGIO function block (or the Boolean 16 to integer conversion with logic node repre-
sentation function block) is used within CAP tool to transform an integer to 16 binary (logic)
signals.
TheIB16IGGIO can receive it's value from remote like IEC61850 depending on the PSTO input.

The B16IGGIO function block is used within the CAP tool to transform an integer into a set of
16 binary (logical) signals. The B16IGGIO can receive an integer from a station computer – for
example, over IEC61850. The BLOCK input will freeze the logical outputs at the last value.
The PSTO input determines the operator place. The integer number can be written to the block
while in “Remote”. If PSTO is in ”Off” or ”Local” then no change is applied to the outputs.
6.3 Function block
BA01-
B16IGGIO
BLOCK OUT
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
IN11
IN12
IN13
IN14
IN15
IN16
en07000129.vsd
Figure 349: The B16IGGIO function block.
696
Boolean 16 to Integer conversion with logic Chapter 13
node representation (B16IGGIO) Logic

Table 395: Input signals for the B16IGGIO (BA01-) function block
Signal Description
IN1 Input 1
IN2 Input 2
IN3 Input 3
IN4 Input 4
IN5 Input 5
IN6 Input 6
IN7 Input 7
IN8 Input 8
IN9 Input 9
IN10 Input 10
IN11 Input 11
IN12 Input 12
IN13 Input 13
IN14 Input 14
IN15 Input 15
IN16 Input 16
Table 396: Output signals for the B16IGGIO (BA01-) function block
Signal Description
OUT Output value

697
Integer to Boolean 16 conversion (IB16) Chapter 13
Logic
7 Integer to Boolean 16 conversion (IB16)
Function block name: IY- - IEC 60617 graphical symbol:

ANSI number:
–
7.1 Introduction
The IB16 function block (or the integer to Boolean 16 conversion function block) is used within
the CAP tool to transform a set of 16 binary (logical) signals into an integer.

The IB16 function block is used within the CAP tool to transform an integer into a set of 16 bi-
nary (logical) signals. The IB16 function block is designed for receiving the integer input local-
ly. The BLOCK input will freeze the logical outputs at the last value.
7.3 Function block
IY01-
IB16
BLOCK OUT1
IN OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
OUT16
en06000501.vsd
Figure 350: The BI16 function block.

Table 397: Input signals for the IB16 (IY01-) function block
Signal Description
IN input
698
Integer to Boolean 16 conversion (IB16) Chapter 13
Logic
Table 398: Output signals for the IB16 (IY01-) function block
Signal Description
OUT1 Output 1
OUT2 Output 2
OUT3 Output 3
OUT4 Output 4
OUT5 Output 5
OUT6 Output 6
OUT7 Output 7
OUT8 Output 8
OUT9 Output 9
OUT10 Output 10
OUT11 Output 11
OUT12 Output 12
OUT13 Output 13
OUT14 Output 14
OUT15 Output 15
OUT16 Output 16

699
Integer to Boolean 16 conversion with logic Chapter 13
node representation (IB16GGIO) Logic
8 Integer to Boolean 16 conversion with logic node

representation (IB16GGIO)
Function block name: IX-- IEC 60617 graphical symbol:

ANSI number:
IB16GGIO
8.1 Introduction
The IB16GGIO function block (or the integer to Boolean conversion with logic node represen-
tation function block) is used within CAP tool to transform an integer to 16 binary (logic) sig-
nals.
The IB16GGIO can receive it's value from remote like IEC61850 depending on the PSTO input.
8.2 Function block
IX01-
IB16GGIO
BLOCK OUT1
PSTO OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
OUT16
en06000502.vsd
Figure 351: The BI16GGIO function block.

Table 399: Input signals for the IB16GGIO (IX01-) function block
Signal Description
700
Table 400: Output signals for the IB16GGIO (IX01-) function block
Signal Description
OUT1 Output 1
OUT2 Output 2
OUT3 Output 3
OUT4 Output 4
OUT5 Output 5
OUT6 Output 6
OUT7 Output 7
OUT8 Output 8
OUT9 Output 9
OUT10 Output 10
OUT11 Output 11
OUT12 Output 12
OUT13 Output 13
OUT14 Output 14
OUT15 Output 15
OUT16 Output 16

701
702
Monitoring
Chapter 14 Monitoring
About this chapter

This chapter describes the functions that handle measurements, events and disturbances. The
way the functions work, their setting parameters, function blocks, input and output signals, and
technical data are included for each function.
703
Measurements (MMXU) Chapter 14
Monitoring
1 Measurements (MMXU)
Function block name: SVRx- IEC 60617 graphical symbol:

ANSI number:
CVMMXU
P, Q, S, I, U, f
Function block name: CPxx IEC 60617 graphical symbol:

ANSI number:
CMMXU
I
Function block name: VPx- IEC 60617 graphical symbol:

ANSI number:
VMMXU
U
Function block name: CSQx IEC 60617 graphical symbol:

ANSI number:
CMSQI
I1, I2, I0
704
Monitoring
Function block name: VSQx IEC 60617 graphical symbol:

ANSI number:
VMSQI
U1, U2, U0
1.1 Introduction
Measurement functions is used for power system measurement, supervision and reporting to the
local HMI, monitoring tool within PCM 600 or to station level e.g.via IEC61850). The possibil-
ity to continuously monitor measured values of active power, reactive power, currents, voltages,
frequency, power factor etc. is vital for efficient production, transmission and distribution of
electrical energy. It provides to the system operator fast and easy overview of the present status
of the power system. Additionally it can be used during testing and commissioning of protection
and control IEDs in order to verify proper operation and connection of instrument transformers
(i.e. CTs & VTs). During normal service by periodic comparison of the measured value from the
IED with other independent meters the proper operation of the IED analog measurement chain
can be verified. Finally it can be used to verify proper direction orientation for distance or direc-
tional overcurrent protection function.
Note!
The available measured values of an IED are depending on the actual hardware (TRM) and the
logic configuration made in PCM 600.
All measured values can be supervised with four settable limits, i.e. low-low limit, low limit,
high limit and high-high limit. A zero clamping reduction is also supported, i.e the measured val-
ue below a settable limit is forced to zero which reduces the impact of noise in the inputs.
Dead-band supervision can be used to report measured signal value to station level when change
in measured value is above set threshold limit or time integral of all changes since the last time
value updating exceeds the threshold limit. Measure value can also be based on periodic report-
ing.
The measuring function, SVR (CVMMXU), provides the following power system quantities:
• P, Q and S: three phase active, reactive and apparent power

• PF: power factor
• U: phase-to-phase voltage magnitude
• I: phase current magnitude
• F: power system frequency
The measuring functions CP (CMMXU), VN (VNMMWU) and VP (VMMXU) provides phys-

ical quantities:
705
Monitoring
• I: phase currents (magnitude and angle) (CMMXU)

• U: voltages (phase and phase-phase voltage, magnitude and angle) (VMMXU,
VNMMXU)
It is possible to calibrate the measuring function above to get better then class 0.5 presentation.
This is accomplished by angle and amplitude compensation at 5, 30 and 100% of rated current
and at 100% of rated voltage.
Note!
The power system quantities provided, depends on the actual hardware, (TRM) and the logic
configuration made in PCM 600.
The measuring functions CSQ (CMSQI) and VSQ (VMSQI) provides sequential quantities:
• I: sequence currents (positive, zero, negative sequence, magnitude and angle)

• U: sequence voltages (positive, zero and negative sequence, magnitude and an-
gle).
The SVR function calculates three-phase power quantities by using fundamental frequency pha-
sors (i.e. DFT values) of the measured current respectively voltage signals. The measured power
quantities are available either as instantaneously calculated quantities or averaged values over a
period of time (i.e. low pass filtered) depending on the selected settings.

1.2.1 Measurement supervision
The protection, control, and monitoring IEDs have functionality to measure and further process
information for currents and voltages obtained from the pre-processing blocks. The number of
processed alternate measuring quantities depends on the type of IED and built-in options.
The information on measured quantities is available for the user at different locations:
• Locally by means of the local HMI

• Remotely using the monitoring tool within PCM 600 or over the station bus
• Internally by connecting the analog output signals to the Disturbance Report
function
Phase angle reference

All phase angles are presented in relation to a defined reference channel. The General setting
parameter PhaseAngleRef defines the reference, see section 1.
Zero point clamping

Measured value below zero point clamping limit is forced to zero. This allows the noise in the
input signal to be ignored. The zero point clamping limit is a general setting (XZeroDb where X
equals S, P, Q, PF, U, I, F, IL1-3, UL1-3, UL12-31, I1, I2, 3I0, U1, U2 or 3U0). Observe that
this measurement supervision zero point clamping might be overridden by the zero point clamp-
ing used for the service values within SVR.
706
Monitoring
Continuous monitoring of the measured quantity

Users can continuously monitor the measured quantity available in each function block by
means of four built-in operating thresholds, see figure 353. The monitoring has two different
modes of operating:
• Overfunction, when the measured current exceeds the High limit (XHiLim) or
High-high limit (XHiHiLim) pre-set values
• Underfunction, when the measured current decreases under the Low limit
(XLowLim) or Low-low limit (XLowLowLim) pre-set values.
X_RANGE is illustrated in figure 353.
X_RANGE = 3
High-high limit
X_RANGE= 1 Hysteresis
High limit
X_RANGE=0
X_RANGE=0 t
Low limit
X_RANGE=2
Low-low limit
X_RANGE=4
en05000657.vsd
Figure 352: Presentation of operating limits
Each analog output has one corresponding supervision level output (X_RANGE). The output
signal is an integer in the interval 0-4 (0: Normal, 1: High limit exceeded, 3: High-high limit ex-
ceeded, 2: below Low limit and 4: below Low-low limit). The output may be connected to a
measurement expander block (XP (RANGE_XP)) to get measurement supervision as binary sig-
nals.
The logical value of the functional output signals changes according to figure 353.
The user can set the hysteresis (XLimHyst), which determines the difference between the oper-
ating and reset value at each operating point, in wide range for each measuring channel separate-
ly. The hysteresis is common for all operating values within one channel.
707
Monitoring
Actual value of the measured quantity

The actual value of the measured quantity is available locally and remotely. The measurement
is continuous for each measured separately, but the reporting of the value to the higher levels
depends on the selected reporting mode. The following basic reporting modes are available:
• Cyclic reporting (Cyclic)

• Amplitude dead-band supervision (Dead band)
• Integral dead-band supervision (Int deadband)
Cyclic reporting
The cyclic reporting of measured value is performed according to chosen setting (XRepTyp).
The measuring channel reports the value independent of amplitude or integral dead-band report-
ing.
Y
Value Reported Value Reported
(1st)
Y3 Value Reported
Y2 Y4
Y1 Y5
t (*) t (*) t (*) t (*)
t
Value 1
Value 2
Value 3
Value 4
Value 5
en05000500.vsd
(*)Set value for t: XDbRepInt
Figure 353: Periodic reporting
Amplitude dead-band supervision

If a measuring value is changed, compared to the last reported value, and the change is larger
than the ±ΔY predefined limits that are set by user (XZeroDb), then the measuring channel re-
ports the new value to a higher level, if this is detected by a new measured value. This limits the
information flow to a minimum necessary. Figure 355 shows an example with the amplitude
dead-band supervision. The picture is simplified: the process is not continuous but the values are
evaluated with a time interval of one execution cycle from each other.
708
Monitoring
Value Reported
Y

Value Reported
(1st)
Y3 ΔY
ΔY
Y2 ΔY
ΔY
ΔY
ΔY
Y1
99000529.vsd
Figure 354: Amplitude dead-band supervision reporting
After the new value is reported, the ±ΔY limits for dead-band are automatically set around it.
The new value is reported only if the measured quantity changes more than defined by the ±ΔY
set limits.
Integral dead-band reporting

The measured value is reported if the time integral of all changes exceeds the pre-set limit
(XZeroDb), figure 356, where an example of reporting with integral dead-band supervision is
shown. The picture is simplified: the process is not continuous but the values are evaluated with
a time interval of one execution cycle from each other.
The last value reported, Y1 in figure 356 serves as a basic value for further measurement. A dif-
ference is calculated between the last reported and the newly measured value and is multiplied
by the time increment (discrete integral). The absolute values of these integral values are added
until the pre-set value is exceeded. This occurs with the value Y2 that is reported and set as a
new base for the following measurements (as well as for the values Y3, Y4 and Y5).
The integral dead-band supervision is particularly suitable for monitoring signals with small
variations that can last for relatively long periods.
709
Monitoring
Y A1 >=
A >= pre-set value
A2 >=
pre-set value pre-set value
Y3 A3 + A4 + A5 + A6 + A7 >=
pre-set value
Y2 A1 A2
A4 A6
Value Reported Y4 A3 A5 A7
(1st) Value
Value Reported Y5
A Reported Value
Reported Value
Y1 Reported
t
99000530.vsd
Figure 355: Reporting with integral dead-band supervision
1.2.2 Service values (MMXU, SVR)
Mode of operation
The measurement function must be connected to three-phase current and three-phase voltage in-
put in the configuration tool (group signals), but it is capable to measure and calculate above
mentioned quantities in nine different ways depending on the available VT inputs connected to
the IED. The end user can freely select by a parameter setting, which one of the nine available
measuring modes shall be used within the function. Available options are summarized in the fol-
lowing table:
710
Monitoring
Set value Formula used for complex, Formula used for voltage Comment
for parame- three-phase power calculation and current magnitude cal-
ter “Mode” culation
1 L1, L2, L3 Used when three
phase-to-earth
S = U L1 ⋅ I
*
L1 + U L2 ⋅ I
*
L2 + U L3 ⋅ I
*
L3
U = ( U L1 + U L 2 + U L 3 ) / 3 voltages are
available
I = ( I L1 + I L 2 + I L 3 ) / 3
2 Arone Used when three

two
S = U L1 L 2 ⋅ I − U L 2 L 3 ⋅ I
*
L1
*
L3
U = ( U L1 L 2 + U L 2 L 3 ) / 2 phase-to-phase
voltages are
I = ( I L1 + I L 3 ) / 2 available
3 PosSeq Used when only

symmetrical
S = 3 ⋅ U PosSeq ⋅ I PosSeq
*
U = 3 ⋅ U PosSeq three phase
power shall be
I = I PosSeq measured
4 L1L2 Used when only

UL1L2
S = U L1 L 2 ⋅ ( I L*1 − I L* 2 ) U = U L1 L 2 phase-to-phase
voltage is avail-
I = ( I L1 + I L 2 ) / 2 able

UL2L3
S = U L2 L3 ⋅ ( I L 2 − I L3 )
* *
U = U L2 L3 phase-to-phase
voltage is avail-
I = ( I L2 + I L3 ) / 2 able

UL3L1
S = U L 3 L1 ⋅ ( I
*
L3
−I )
*
L1
U = U L 3 L1 phase-to-phase
voltage is avail-
I = ( I L 3 + I L1 ) / 2 able
7 Used when only

UL1
S = 3 ⋅ U L 1 ⋅ I L1
*
U = 3 ⋅ U L1 phase-to-earth
voltage is avail-
I = I L1 able
8 L2 Used when only

UL2
S = 3 ⋅U L2 ⋅ I L2
*
voltage is avail-
I = IL2 able
9 L3 Used when only

UL3
S = 3 ⋅ U L3 ⋅ I
*
L3
voltage is avail-
S = 3 ⋅ VC ⋅ I C
* I = I L3 able
* means complex conjugated value
711
Monitoring
It shall be noted that only in the first two operating modes (i.e. 1 & 3) the measurement function
calculates exact three-phase power. In other operating modes (i.e. from 3 to 9) it calculates the
three-phase power under assumption that the power system is fully symmetrical. Once the com-
plex apparent power is calculated then the P, Q, S, & PF are calculated in accordance with the
following formulas:
P = Re( S )
(Equation 99)
Q = Im( S )
(Equation 100)
S = S = P +Q
2 2
(Equation 101)
PF = cosϕ = P
S
(Equation 102)
Additionally to the power factor value the two binary output signals from the function are pro-
vided which indicates the angular relationship between current and voltage phasors. Binary out-
put signal ILAG is set to one when current phasor is lagging behind voltage phasor. Binary
output signal ILEAD is set to one when current phasor is leading the voltage phasor.
Each analog output has a corresponding supervision level output (X_RANGE). The output sig-
nal is an integer in the interval 0-4, see section 1.2.1 "Measurement supervision".
Calibration of analog inputs

Measured currents and voltages used in the SVR function can be calibrated to get class 0.5 mea-
suring accuracy. This is achieved by amplitude and angle compensation at 5, 30 and 100% of
rated current and voltage. The compensation below 5% and above 100% is constant and linear
712
Monitoring
Amplitude
-10
IAmpComp5 Measured
IAmpComp30 current
IAmpComp100
5 30 100 % of Ir
0-5%: Constant
-10 5-30-100%: Linear
>100%: Constant
Degrees Angle
compensation
-10
IAngComp30 Measured
current
IAngComp5
IAngComp100
5 30 100 % of Ir
-10
en05000652.vsd
Low pass filtering

duce the recursive, low pass filtering of the measured values for P, Q, S, U, I & power factor.
This will make slower measurement response to the step changes in the measured quantity. Fil-
tering is performed in accordance with the following recursive formula:
X = k ⋅ X Old + (1 − k ) ⋅ X Calculated
(Equation 103)
where:
X is a new measured value (i.e. P, Q, S, U, I or PF) to be given out from the function
XOld is the measured value given from the measurement function in previous execution cycle
XCalculated is the new calculated value in the present execution cycle
713
Monitoring
than 0, the filtering is enabled. Appropriate value of k shall be determined separately for every
application. Some typical value for k =0.14.
Zero point clamping

In order to avoid erroneous measurements when either current or voltage signal is not present,
it is possible for the end user to set the magnitude IGenZeroDb level for current and voltage mea-
surement UGenZeroDb is forced to zero. When either current or voltage measurement is forced
to zero automatically the measured values for power (i.e. P, Q & S) and power factor are forced
to zero as well. Since the measurement supervision functionality, included in the SVR function,
is using these values the zero clamping will influence the subsequent supervision (observe the
possibility to do zero point clamping within measurement supervision, see section 1.2.1 "Mea-
surement supervision").
Compensation facility
In order to compensate for small magnitude and angular errors in the complete measurement
chain (i.e. CT error, VT error, IED input transformer errors etc.) it is possible to perform on site
calibration of the power measurement. This is achieved by setting the complex constant which
is then internally used within the function to multiply the calculated complex apparent power S.
This constant is set as magnitude (i.e. setting parameter PowAmpFact, default value 1.000) and
angle (i.e. setting parameter PowAngComp, default value 0.0 degrees). Default values for these
two parameters are done in such way that they do not influence internally calculated value (i.e.
complex constant has default value 1). In this way calibration, for specific operating range (e.g.
around rated power) can be done at site. However to perform this calibration it is necessary to
have external power meter of the high accuracy class available.
Directionality
In CT earthing parameter is set as described in section 1 "Analog inputs", active and reactive
power will be measured always towards the protected object. This is shown in the following
figure 358.
714
Monitoring
Busbar
P Q
Protected
Object
en05000373.vsd
Figure 357: Internal IED directionality convention for P & Q measurements
That practically means that active and reactive power will have positive values when they flow
from the busbar towards the protected object and they will have negative values when they flow
from the protected object towards the busbar.
In some application, like for example when power is measured on the secondary side of the pow-
er transformer it might be desirable, from the end client point of view, to have actually opposite
directional convention for active and reactive power measurements. This can be easily achieved
by setting parameter PowAngComp to value of 180.0 degrees. With such setting the active and
reactive power will have positive values when they flow from the protected object towards the
busbar.
Frequency
Frequency is actually not calculated within measurement block. It is simply obtained from the
pre-processing block and then just given out from the measurement block as an output.
1.2.3 Current Phasors (MMXU, CP)

The CP function must be connected to three-phase current input in the configuration tool to be
operable. Currents handled in the function can be calibrated to get better then class 0.5 measur-
ing accuracy for internal use, on the outputs and IEC 61850. This is achieved by amplitude and
angle compensation at 5, 30 and 100% of rated current. The compensation below 5% and above
100% is constant and linear in between, see figure 357 above.
Phase currents (amplitude and angle) are available on the outputs and each amplitude output has
a corresponding supervision level output (ILx_RANG). The supervision output signal is an in-
teger in the interval 0-4, see section 1.2.1 "Measurement supervision".
715
Monitoring
1.2.4 Voltage phasors (MMXU, VN and VP)

The voltage function must be connected to three-phase voltage input in the configuration tool to
be operable. Voltages are handled in the same way as currents when it comes to class 0.5 cali-
brations, see above.
The voltages (phase or phase-phase voltage, amplitude and angle) are available on the outputs
and each amplitude output has a corresponding supervision level output (ULxy_RANG). The
supervision output signal is an integer in the interval 0-4, see section 1.2.1 "Measurement super-
vision".
1.2.5 Sequence quantities (MSQI, CSQ and VSQ)

The measurement functions must be connected to three-phase current (CSQ) or voltage (VSQ)
input in the configuration tool to be operable. No outputs, but XRANG, are calculated within the
measuring block and it is not possible to calibrate the signals. Input signals are obtained from
the pre-processing block and transferred to corresponding output.
Positive, negative and three times zero sequence quantities are available on the outputs (voltage
and current, amplitude and angle). Each amplitude output has a corresponding supervision level
output (X_RANGE). The output signal is an integer in the interval 0-4, see section 1.2.1 "Mea-
surement supervision".
1.3 Function block

The available function blocks of an IED are depending on the actual hardware (TRM) and the
logic configuration made in PCM 600.
SVR1-
CVMMXU
I3P S
U3P S_RANGE
P_INST
P
P_RANGE
Q_INST
Q
Q_RANGE
PF
PF_RANGE
ILAG
ILEAD
U
U_RANGE
I
I_RANGE
F
F_RANGE
en05000772.vsd
Figure 358: SVR function block
716
Monitoring
CP01-
CMMXU
I3P IL1
IL1RANG
IL1ANGL
IL2
IL2RANG
IL2ANGL
IL3
IL3RANG
IL3ANGL
en05000699.vsd
Figure 359: CP function block
VP01-
VMMXU
U3P UL12
UL12RANG
UL23
UL23RANG
UL31
UL31RANG
en05000701.vsd
Figure 360: VP function block
CSQ1-
CMSQI
I3P 3I0
3I0RANG
I1
I1RANG
I2
I2RANG
en05000703.vsd
Figure 361: CS function block
717
Monitoring
VSQ1-
VMSQI
U3P 3U0
3U0RANG
U1
U1RANG
U2
U2RANG
en05000704.vsd
VSQ1-
VMSQI
V3P 3V0
3V0RANG
V1
V1RANG
V2
V2RANG
en05000704_ansi.vsd
Figure 362: VS function block

Table 401: Input signals for the CVMMXU (SVR1-) function block
Signal Description
Table 402: Output signals for the CVMMXU (SVR1-) function block
Signal Description
S Apparent Power magnitude of deadband value
S_RANGE Apparent Power range
P_INST Active Power
P Active Power magnitude of deadband value
P_RANGE Active Power range
Q_INST Reactive Power
Q Active Power magnitude of deadband value
Q_RANGE Reactive Power range
PF Power Factor magnitude of deadband value
PF_RANGE Power Factor range
ILAG Current is lagging voltage
ILEAD Current is leading voltage
U Calculate voltage magnitude of deadband value
718
Monitoring
Signal Description
U_RANGE Calcuate voltage range
I Calculated current magnitude of deadband value
I_RANGE Calculated current range
F System frequency magnitude of deadband value
F_RANGE System frequency range
Table 403: Input signals for the CMMXU (CP01-) function block
Signal Description
I3P Group connection abstract block 1
Table 404: Output signals for the CMMXU (CP01-) function block
Signal Description
IL1 IL1 Amplitude, magnitude of reported value
IL1RANG IL1 Amplitude range
IL1ANGL IL1 Angle, magnitude of reported value
Table 405: Input signals for the VMMXU (VP01-) function block
Signal Description
U3P Group connection abstract block 2
Table 406: Output signals for the VMMXU (VP01-) function block
Signal Description
UL12 UL12 Amplitude, magnitude of reported value
UL12RANG UL12 Amplitude range
719
Monitoring
Table 407: Input signals for the CMSQI (CSQ1-) function block
Signal Description
I3P Group connection abstract block 3
Table 408: Output signals for the CMSQI (CSQ1-) function block
Signal Description
3I0 3I0 Amplitude, magnitude of reported value
3I0RANG 3I0 Amplitude range
I1 I1 Amplitude, magnitude of reported value
I1RANG I1 Amplitude range
I2 I2 Amplitude, magnitude of reported value
I2RANG I2 Amplitude range
Table 409: Input signals for the VMSQI (VSQ1-) function block
Signal Description
U3P Group connection abstract block 4
Table 410: Output signals for the VMSQI (VSQ1-) function block
Signal Description
3U0 3U0 Amplitude, magnitude of reported value
3U0RANG 3U0 Amplitude range
U1 U1 Amplitude, magnitude of reported value
U1RANG U1 Amplitude range
U2 U2 Amplitude, magnitude of reported value
U2RANG U2 Amplitude range

The available setting parameters of the measurement function (MMXU, MSQI) are depending
on the actual hardware (TRM) and the logic configuration made in PCM 600.
720
Monitoring
Table 411: Basic general settings for the CVMMXU (SVR1-) function
SLowLim 0.000 - 0.001 0.000 VA Low limit (physical value)
10000000000.000
SLowLowLim 0.000 - 0.001 0.000 VA Low Low limit (physical
10000000000.000 value)
SMin 0.000 - 0.001 0.000 VA Minimum value
10000000000.000
SMax 0.000 - 0.001 1000000000.000 VA Maximum value
10000000000.000
SRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
PMin -10000000000.000 0.001 -1000000000.000 W Minimum value
-
10000000000.000
PMax -10000000000.000 0.001 1000000000.000 W Maximum value
-
10000000000.000
PRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
QMin -10000000000.000 0.001 -1000000000.000 VAr Minimum value
-
10000000000.000
On
level in A
QMax -10000000000.000 0.001 1000000000.000 VAr Maximum value
-
10000000000.000
QRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
level in kV
Mode L1, L2, L3 - L1, L2, L3 - Selection of measured
Pos Seq
L1L2
L2L3
L3L1
L1
L2
L3
PowAmpFact 0.000 - 6.000 0.001 1.000 - Amplitude factor to scale
power calculations
721
Monitoring

PowAngComp -180.0 - 180.0 0.1 0.0 Deg Angle compensation for
phase shift between
measured I & U
U and I
PFMin -1.000 - 0.000 0.001 -1.000 - Minimum value
PFMax 0.000 - 1.000 0.001 1.000 - Maximum value
PFRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
UMin -10000000000.000 0.001 0.000 V Minimum value
-
10000000000.000
UMax -10000000000.000 0.001 400000.000 V Maximum value
-
10000000000.000
URepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
IMin -10000000000.000 0.001 0.000 A Minimum value
-
10000000000.000
IMax -10000000000.000 0.001 1000.000 A Maximum value
-
10000000000.000
IRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
FrMin -10000000000.000 0.001 0.000 Hz Minimum value
-
10000000000.000
FrMax -10000000000.000 0.001 70.000 Hz Maximum value
-
10000000000.000
FrRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
722
Monitoring
Table 412: Advanced general settings for the CVMMXU (SVR1-) function
SDbRepInt 1 - 300 1 10 Type Cycl: Report interval (s),
Db: In % of range, Int Db:
In %s
SZeroDb 0 - 100000 1 0 m% Zero point clamping in
0,001% of range
SHiHiLim 0.000 - 0.001 900000000.000 VA High High limit (physical
10000000000.000 value)
SHiLim 0.000 - 0.001 800000000.000 VA High limit (physical value)
10000000000.000
SLimHyst 0.000 - 100.000 0.001 5.000 % Hysteresis value in % of
range (common for all
limits)
PDbRepInt 1 - 300 1 10 Type Cycl: Report interval (s),
In %s
PZeroDb 0 - 100000 1 0 m% Zero point clamping in
0,001% of range
PHiHiLim -10000000000.000 0.001 900000000.000 W High High limit (physical
- value)
10000000000.000
PHiLim -10000000000.000 0.001 800000000.000 W High limit (physical value)
-
10000000000.000
PLowLim -10000000000.000 0.001 -800000000.000 W Low limit (physical value)
-
10000000000.000
PLowLowLim -10000000000.000 0.001 -900000000.000 W Low Low limit (physical
- value)
10000000000.000
PLimHyst 0.000 - 100.000 0.001 5.000 % Hysteresis value in % of
limits)
QDbRepInt 1 - 300 1 10 Type Cycl: Report interval (s),
In %s
QZeroDb 0 - 100000 1 0 m% Zero point clamping in
0,001% of range
QHiHiLim -10000000000.000 0.001 900000000.000 VAr High High limit (physical
- value)
10000000000.000
QHiLim -10000000000.000 0.001 800000000.000 VAr High limit (physical value)
-
10000000000.000
QLowLim -10000000000.000 0.001 -800000000.000 VAr Low limit (physical value)
-
10000000000.000
723
Monitoring

QLowLowLim -10000000000.000 0.001 -900000000.000 VAr Low Low limit (physical
- value)
10000000000.000
QLimHyst 0.000 - 100.000 0.001 5.000 % Hysteresis value in % of
limits)
PFDbRepInt 1 - 300 1 10 Type Cycl: Report interval (s),
In %s
PFZeroDb 0 - 100000 1 0 m% Zero point clamping in
0,001% of range
UGenZeroDb 1 - 100 1 5 % Zero point clamping in %
of Ubase
PFHiHiLim -3.000 - 3.000 0.001 3.000 - High High limit (physical
value)
IGenZeroDb 1 - 100 1 5 % Zero point clamping in %
of Ibase
PFHiLim -3.000 - 3.000 0.001 2.000 - High limit (physical value)
PFLowLim -3.000 - 3.000 0.001 -2.000 - Low limit (physical value)
PFLowLowLim -3.000 - 3.000 0.001 -3.000 - Low Low limit (physical
value)
PFLimHyst 0.000 - 100.000 0.001 5.000 % Hysteresis value in % of
limits)
UDbRepInt 1 - 300 1 10 Type Cycl: Report interval (s),
In %s
UZeroDb 0 - 100000 1 0 m% Zero point clamping in
0,001% of range
UHiHiLim -10000000000.000 0.001 460000.000 V High High limit (physical
- value)
10000000000.000
UHiLim -10000000000.000 0.001 450000.000 V High limit (physical value)
-
10000000000.000
ULowLim -10000000000.000 0.001 380000.000 V Low limit (physical value)
-
10000000000.000
ULowLowLim -10000000000.000 0.001 350000.000 V Low Low limit (physical
- value)
10000000000.000
ULimHyst 0.000 - 100.000 0.001 5.000 % Hysteresis value in % of
limits)
IDbRepInt 1 - 300 1 10 Type Cycl: Report interval (s),
In %s
724
Monitoring

IZeroDb 0 - 100000 1 0 m% Zero point clamping in
0,001% of range
IHiHiLim -10000000000.000 0.001 900.000 A High High limit (physical
- value)
10000000000.000
IHiLim -10000000000.000 0.001 800.000 A High limit (physical value)
-
10000000000.000
ILowLim -10000000000.000 0.001 -800.000 A Low limit (physical value)
-
10000000000.000
ILowLowLim -10000000000.000 0.001 -900.000 A Low Low limit (physical
- value)
10000000000.000
ILimHyst 0.000 - 100.000 0.001 5.000 % Hysteresis value in % of
limits)
FrDbRepInt 1 - 300 1 10 Type Cycl: Report interval (s),
In %s
FrZeroDb 0 - 100000 1 0 m% Zero point clamping in
0,001% of range
FrHiHiLim -10000000000.000 0.001 65.000 Hz High High limit (physical
- value)
10000000000.000
FrHiLim -10000000000.000 0.001 63.000 Hz High limit (physical value)
-
10000000000.000
FrLowLim -10000000000.000 0.001 47.000 Hz Low limit (physical value)
-
10000000000.000
FrLowLowLim -10000000000.000 0.001 45.000 Hz Low Low limit (physical
- value)
10000000000.000
FrLimHyst 0.000 - 100.000 0.001 5.000 % Hysteresis value in % of
limits)
Ur
Ur
725
Monitoring

Ir
rent at 5% of Ir
rent at 30% of Ir
rent at 100% of Ir
Table 413: Basic general settings for the CMMXU (CP01-) function
IL1DbRepInt 1 - 300 1 10 Type Cycl: Report interval (s),
In %s
On
level in A
IL1Max 0.000 - 0.001 1000.000 A Maximum value
10000000000.000
IL1RepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
IL1AngDbRepInt 1 - 300 1 10 Type Cycl: Report interval (s),
In %s
In %s
10000000000.000
Dead band
Int deadband
726
Monitoring

In %s
In %s
10000000000.000
Dead band
Int deadband
In %s
Table 414: Advanced general settings for the CMMXU (CP01-) function
IL1ZeroDb 0 - 100000 1 0 m% Zero point clamping in
0,001% of range
IL1HiHiLim 0.000 - 0.001 900.000 A High High limit (physical
10000000000.000 value)
IL1HiLim 0.000 - 0.001 800.000 A High limit (physical value)
10000000000.000
IL1LowLim 0.000 - 0.001 0.000 A Low limit (physical value)
10000000000.000
IL1LowLowLim 0.000 - 0.001 0.000 A Low Low limit (physical
10000000000.000 value)
Ir
rent at 5% of Ir
IL1Min 0.000 - 0.001 0.000 A Minimum value
10000000000.000
rent at 30% of Ir
rent at 100% of Ir
IL1LimHys 0.000 - 100.000 0.001 5.000 % Hysteresis value in % of
range and is common for
all limits
727
Monitoring

0,001% of range
10000000000.000 value)
10000000000.000
10000000000.000
10000000000.000 value)
10000000000.000
all limits
0,001% of range
10000000000.000 value)
10000000000.000
10000000000.000
10000000000.000 value)
10000000000.000
all limits
Table 415: Basic general settings for the VMMXU (VP01-) function
UL12DbRepInt 1 - 300 1 10 s,%,% Cycl: Report interval (s),
s Db: In % of range, Int Db:
In %s
Operation Off - On - Operation Mode On / Off
On
UL12ZeroDb 0 - 100000 1 0 1/1000 Zero point clamping in
% 0,001% of range
level in kV
UL12HiHiLim -10000000000.000 0.001 460000.000 V High High limit (physical
- value)
10000000000.000
728
Monitoring

UL12HiLim -10000000000.000 0.001 450000.000 V High limit (physical value)
-
10000000000.000
Ur
UL12LowLim -10000000000.000 0.001 380000.000 V Low limit (physical value)
-
10000000000.000
UL12LowLowLim -10000000000.000 0.001 350000.000 V Low Low limit (physical
- value)
10000000000.000
Ur
UL12Min -10000000000.000 0.001 0.000 V Minimum value
-
10000000000.000
UL12Max -10000000000.000 0.001 450000.000 V Maximum value
-
10000000000.000
UL12RepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
UL12LimHys 0.000 - 100.000 0.001 5.000 % Hysteresis value in % of
all limits
UL12AnDbRepInt 1 - 300 1 10 s,%,% Cycl: Report interval (s),
In %s
UL12AngRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
In %s
% 0,001% of range
- value)
10000000000.000
-
10000000000.000
729
Monitoring

-
10000000000.000
- value)
10000000000.000
-
10000000000.000
-
10000000000.000
Dead band
Int deadband
all limits
In %s
Dead band
Int deadband
In %s
% 0,001% of range
- value)
10000000000.000
-
10000000000.000
-
10000000000.000
- value)
10000000000.000
-
10000000000.000
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Monitoring

-
10000000000.000
Dead band
Int deadband
all limits
In %s
Dead band
Int deadband
Table 416: Basic general settings for the CMSQI (CSQ1-) function
3I0DbRepInt 1 - 300 1 10 s,%,% Cycl: Report interval (s),
In %s
3I0ZeroDb 0 - 100000 1 0 1/1000 Zero point clamping in
% 0,001% of range
3I0HiHiLim -10000000000.000 0.001 900.000 A High High limit (physical
- value)
10000000000.000
3I0HiLim -10000000000.000 0.001 800.000 A High limit (physical value)
-
10000000000.000
3I0LowLim -10000000000.000 0.001 -800.000 A Low limit (physical value)
-
10000000000.000
3I0LowLowLim -10000000000.000 0.001 -900.000 A Low Low limit (physical
- value)
10000000000.000
3I0Min -10000000000.000 0.001 0.000 A Minimum value
-
10000000000.000
3I0Max -10000000000.000 0.001 1000.000 A Maximum value
-
10000000000.000
3I0RepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
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Monitoring

3I0LimHys 0.000 - 100.000 0.001 5.000 % Hysteresis value in % of
all limits
3I0AngDbRepInt 1 - 300 1 10 s,%,% Cycl: Report interval (s),
In %s
On
3I0AngRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
I1DbRepInt 1 - 300 1 10 s,%,% Cycl: Report interval (s),
In %s
I1ZeroDb 0 - 100000 1 0 1/1000 Zero point clamping in
% 0,001% of range
I1HiHiLim -10000000000.000 0.001 900.000 A High High limit (physical
- value)
10000000000.000
I1HiLim -10000000000.000 0.001 800.000 A High limit (physical value)
-
10000000000.000
I1LowLim -10000000000.000 0.001 -800.000 A Low limit (physical value)
-
10000000000.000
I1LowLowLim -10000000000.000 0.001 -900.000 A Low Low limit (physical
- value)
10000000000.000
I1Min -10000000000.000 0.001 0.000 A Minimum value
-
10000000000.000
I1Max -10000000000.000 0.001 1000.000 A Maximum value
-
10000000000.000
I1RepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
I1LimHys 0.000 - 100.000 0.001 5.000 % Hysteresis value in % of
all limits
I1AngDbRepInt 1 - 300 1 10 s,%,% Cycl: Report interval (s),
In %s
I1AngRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
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Monitoring

I2DbRepInt 1 - 300 1 10 s,%,% Cycl: Report interval (s),
In %s
I2ZeroDb 0 - 100000 1 0 1/1000 Zero point clamping in
% 0,001% of range
I2HiHiLim -10000000000.000 0.001 900.000 A High High limit (physical
- value)
10000000000.000
I2HiLim -10000000000.000 0.001 800.000 A High limit (physical value)
-
10000000000.000
I2LowLim -10000000000.000 0.001 -800.000 A Low limit (physical value)
-
10000000000.000
I2LowLowLim -10000000000.000 0.001 -900.000 A Low Low limit (physical
- value)
10000000000.000
I2Min -10000000000.000 0.001 0.000 A Minimum value
-
10000000000.000
I2Max -10000000000.000 0.001 1000.000 A Maximum value
-
10000000000.000
I2RepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
I2LimHys 0.000 - 100.000 0.001 5.000 % Hysteresis value in % of
all limits
I2AngDbRepInt 1 - 300 1 10 s,%,% Cycl: Report interval (s),
In %s
I2AngRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
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Monitoring
Table 417: Basic general settings for the VMSQI (VSQ1-) function
3U0DbRepInt 1 - 300 1 10 s,%,% Cycl: Report interval (s),
In %s
3U0ZeroDb 0 - 100000 1 0 1/1000 Zero point clamping in
% 0,001% of range
3U0HiHiLim -10000000000.000 0.001 460000.000 V High High limit (physical
- value)
10000000000.000
3U0HiLim -10000000000.000 0.001 450000.000 V High limit (physical value)
-
10000000000.000
3U0LowLim -10000000000.000 0.001 380000.000 V Low limit (physical value)
-
10000000000.000
3U0LowLowLim -10000000000.000 0.001 350000.000 V Low Low limit (physical
- value)
10000000000.000
3U0Min -10000000000.000 0.001 0.000 V Minimum value
-
10000000000.000
3U0Max -10000000000.000 0.001 450000.000 V Maximum value
-
10000000000.000
3U0RepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
3U0LimHys 0.000 - 100.000 0.001 5.000 % Hysteresis value in % of
all limits
3U0AngDbRepInt 1 - 300 1 10 s,%,% Cycl: Report interval (s),
In %s
On
3U0AngRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
U1DbRepInt 1 - 300 1 10 s,%,% Cycl: Report interval (s),
In %s
U1ZeroDb 0 - 100000 1 0 1/1000 Zero point clamping in
% 0,001% of range
U1HiHiLim -10000000000.000 0.001 460000.000 V High High limit (physical
- value)
10000000000.000
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Monitoring

U1HiLim -10000000000.000 0.001 450000.000 V High limit (physical value)
-
10000000000.000
U1LowLim -10000000000.000 0.001 380000.000 V Low limit (physical value)
-
10000000000.000
U1LowLowLim -10000000000.000 0.001 350000.000 V Low Low limit (physical
- value)
10000000000.000
U1Min -10000000000.000 0.001 0.000 V Minimum value
-
10000000000.000
U1Max -10000000000.000 0.001 450000.000 V Maximum value
-
10000000000.000
U1RepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
U1LimHys 0.000 - 100.000 0.001 5.000 % Hysteresis value in % of
all limits
U1AngDbRepInt 1 - 300 1 10 s,%,% Cycl: Report interval (s),
In %s
U1AngRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
U2DbRepInt 1 - 300 1 10 s,%,% Cycl: Report interval (s),
In %s
U2ZeroDb 0 - 100000 1 0 1/1000 Zero point clamping in
% 0,001% of range
U2HiHiLim -10000000000.000 0.001 460000.000 V High High limit (physical
- value)
10000000000.000
U2HiLim -10000000000.000 0.001 450000.000 V High limit (physical value)
-
10000000000.000
U2LowLim -10000000000.000 0.001 380000.000 V Low limit (physical value)
-
10000000000.000
U2LowLowLim -10000000000.000 0.001 350000.000 V Low Low limit (physical
- value)
10000000000.000
U2Min -10000000000.000 0.001 0.000 V Minimum value
-
10000000000.000
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Monitoring

U2Max -10000000000.000 0.001 450000.000 V Maximum value
-
10000000000.000
U2RepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
U2LimHys 0.000 - 100.000 0.001 5.000 % Hysteresis value in % of
all limits
U2AngDbRepInt 1 - 300 1 10 s,%,% Cycl: Report interval (s),
In %s
U2AngRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
1.6 Technical data

Table 418: Measurements (MMXU)
Frequency (0.95-1.05) × fr ± 2.0 mHz
Voltage (0.1-1.5) × Ur ± 0.5% of Ur at U ≤ Ur
± 0.5% of U at U > Ur
Connected current (0.2-4.0) × Ir ± 0.5% of Ir at I ≤ Ir
± 0.5% of I at I > Ir
Active power, P 0.1 x Ur Sr
Reactive power, Q 0.1 x Ur Sr
Apparent power, S 0.1 x Ur Sr
Power factor, cos (ϕ) 0.1 x Ur < U < 1.5 x Ur ± 0.02
0.2 x Ir < I < 4.0 x Ir
736
Event counter (GGIO) Chapter 14
Monitoring
2 Event counter (GGIO)
2.1 Function block
CNT1-
CNTGGIO
BLOCK
COUNTER1
COUNTER2
COUNTER3
COUNTER4
COUNTER5
COUNTER6
RESET
en05000345.vsd
Figure 363: CNT function block

737
Event function (EV) Chapter 14
Monitoring
3 Event function (EV)
Function block name: EVxx- IEC 60617 graphical symbol:

ANSI number:
Event
3.1 Introduction
When using a Substation Automation system with LON or SPA communication, time-tagged
events can be sent at change or cyclically from the IED to the station level. These events are cre-
ated from any available signal in the IED that is connected to the Event function block. The event
function block is used for LON and SPA communication.
Analog and double indication values are also transferred through the event block.

The main purpose of the event function block is to generate events when the state or value of
any of the connected input signals is in a state, or is undergoing a state transition, for which event
generation is enabled.
Each event function block has 16 inputs INPUT1 - INPUT16. Each input can be given a name
from the CAP configuration tool. The inputs are normally used to create single events, but are
also intended for double indication events.
The function also has an input BLOCK to block the generation of events.
The events that are sent from the IED can originate from both internal logical signals and binary
input channels. The internal signals are time-tagged in the main processing module, while the
binary input channels are time-tagged directly on the input module. The time-tagging of the
events that are originated from internal logical signals have a resolution corresponding to the ex-
ecution cyclicity of the event function block. The time-tagging of the events that are originated
from binary input signals have a resolution of 1 ms.
The outputs from the event function block are formed by the reading of status, events and alarms
by the station level on every single input. The user-defined name for each input is intended to
be used by the station level.
All events according to the event mask are stored in a buffer, which contains up to 1000 events.
If new events appear before the oldest event in the buffer is read, the oldest event is overwritten
and an overflow alarm appears.
The events are produced according to the set-event masks. The event masks are treated common-
ly for both the LON and SPA communication. The event mask can be set individually for each
input channel. These settings are available:
• NoEvents
738
Monitoring
• OnSet
• OnReset
• OnChange
• AutoDetect
It is possible to define which part of the event function block that shall generate events. This can
be performed individually for the LON and SPA communication respectively. For each commu-
nication type these settings are available:
• Off
• Channel 1-8
• Channel 9-16
• Channel 1-16
For LON communication the events normally are sent to station level at change. It is possibly
also to set a time for cyclic sending of the events individually for each input channel.
To protect the SA system from signals with a high change rate that can easily saturate the event
system or the communication subsystems behind it, a quota limiter is implemented. If an input
creates events at a rate that completely consume the granted quota then further events from the
channel will be blocked. This block will be removed when the input calms down and the accu-
mulated quota reach 66% of the maximum burst quota. The maximum burst quota per input
channel equals 3 times the configurable setting MaxEvPerSec.
739
Monitoring
3.3 Function block
EV01-
Event
BLOCK
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
NAME1
NAME2
NAME3
NAME4
NAME5
NAME6
NAME7
NAME8
NAME9
NAME10
NAME11
NAME12
NAME13
NAME14
NAME15
NAME16
en05000697.vsd

Table 419: Input signals for the Event (EV01-) function block
Signal Description
INPUT1 Input 1
INPUT2 Input 2
INPUT3 Input 3
INPUT4 Input 4
INPUT5 Input 5
INPUT6 Input 6
INPUT7 Input 7
INPUT8 Input 8
INPUT9 Input 9
INPUT10 Input 10
INPUT11 Input 11
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Monitoring
Signal Description
INPUT12 Input 12
INPUT13 Input 13
INPUT14 Input 14
INPUT15 Input 15
INPUT16 Input 16

Table 420: Basic general settings for the Event (EV01-) function
SPAChannelMask Off - Off - SPA channel mask
Channel 1-8
Channel 9-16
Channel 1-16
LONChannelMask Off - Off - LON channel mask
Channel 1-8
Channel 9-16
Channel 1-16
EventMask1 NoEvents - AutoDetect - Reporting criteria for
OnSet input 1
OnReset
OnChange
AutoDetect
OnSet input 2
OnReset
OnChange
AutoDetect
OnSet input 3
OnReset
OnChange
AutoDetect
OnSet input 4
OnReset
OnChange
AutoDetect
OnSet input 5
OnReset
OnChange
AutoDetect
741
Monitoring

OnSet input 6
OnReset
OnChange
AutoDetect
OnSet input 7
OnReset
OnChange
AutoDetect
OnSet input 8
OnReset
OnChange
AutoDetect
OnSet input 9
OnReset
OnChange
AutoDetect
OnSet input 10
OnReset
OnChange
AutoDetect
OnSet input 11
OnReset
OnChange
AutoDetect
OnSet input 12
OnReset
OnChange
AutoDetect
OnSet input 13
OnReset
OnChange
AutoDetect
OnSet input 14
OnReset
OnChange
AutoDetect
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Monitoring

OnSet input 15
OnReset
OnChange
AutoDetect
OnSet input 16
OnReset
OnChange
AutoDetect
MinRepIntVal1 0 - 3600 1 2 s Minimum reporting inter-
val input 1
val input 2
val input 3
val input 4
val input 5
val input 6
val input 7
val input 8
val input 9
val input 10
val input 11
val input 12
val input 13
val input 14
val input 15
val input 16
743
Fault locator (RFLO) Chapter 14
Monitoring
4 Fault locator (RFLO)
Function block name: FLO-- IEC 60617 graphical symbol:

ANSI number:
LMBRFLO
4.1 Introduction
The accurate fault locator is an essential component to minimize the outages after a persistent
fault and/or to pin-point a weak spot on the line.
The built-in fault locator is an impedance measuring function giving the distance to the fault in
percent, km or miles. The main advantage is the high accuracy achieved by compensating for
load current and for the mutual zero sequence effect on double circuit lines.
The compensation includes setting of the remote and local sources and calculation of the distri-
bution of fault currents from each side. This distribution of fault current, together with recorded
load (pre-fault) currents, is used to exactly calculate the fault position. The fault can be recalcu-
lated with new source data at the actual fault to further increase the accuracy.
Specially on heavily loaded long lines (where the fault locator is most important) where the
source voltage angles can be up to 35-40 degrees apart the accuracy can be still maintained with
the advanced compensation included in fault locator.

The Fault Locator (FL) in the IED is an essential complement to other monitoring functions,
since it measures and indicates the distance to the fault with great accuracy.
When calculating distance to fault, pre-fault and fault phasors of currents and voltages are se-
lected from the Trip Value Recorder data, thus the analog signals used by the fault locator must
be among those connected to the disturbance report function. The analog configuration (channel
selection) is performed using the parameter setting tool within PCM 600.
The calculation algorithm considers the effect of load currents, double-end infeed and additional
fault resistance.
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Monitoring
R0L+jX0L
R1L+jX1L
R1A+jX1A R1B+jX1B
Z0m=Z0m+jX0m
R0L+jX0L
R1L+jX1L en05000045.vsd
DRP
FL
Figure 364: Simplified network configuration with network data, required for settings of the
fault location-measuring function.
If source impedance in the near and far end of the protected line have changed in a significant
manner relative to the set values at fault location calculation time (due to exceptional switching
state in the immediate network, power generation out of order etc.), new values can be entered
via the local HMI and a recalculation of the distance to the fault can be ordered using the algo-
rithm described below. It’s also possible to change fault loop. In this way, a more accurate lo-
cation of the fault can be achieved.
The function indicates the distance to the fault as a percentage of the line length, in kilometers
or miles as selected on the local HMI. The fault location is stored as a part of the disturbance
report information (ER, DR, IND, TVR and FL) and managed via the LHMI or PCM 600.
4.2.1 Measuring principle

For transmission lines with voltage sources at both line ends, the effect of double-end infeed and
additional fault resistance must be considered when calculating the distance to the fault from the
currents and voltages at one line end. If this is not done, the accuracy of the calculated figure
will vary with the load flow and the amount of additional fault resistance.
The calculation algorithm used in the fault locator in compensates for the effect of double-end
infeed, additional fault resistance and load current.
4.2.2 Accurate algorithm for measurement of distance to fault

Figure 366 shows a single-line diagram of a single transmission line, that is fed from both ends
with source impedances ZA and ZB. Assume, that the fault occurs at a distance F from terminal
A on a line with the length L and impedance ZL. The fault resistance is defined as RF. A sin-
gle-line model is used for better clarification of the algorithm.
745
Monitoring
A B
ZA IA pZL IB (1-p).ZL ZB
IF
UA RF
xx01000171.vsd
Figure 365: Fault on transmission line fed from both ends.
From figure 366 it is evident that:
U A = I A ⋅ p ⋅ Z L + IF ⋅ R F
(Equation 104)
Where:
IA is the line current after the fault, that is, pre-fault current plus current change due to
the fault,
IF is the fault current and
p is a relative distance to the fault
The fault current is expressed in measurable quantities by:
IF A
IF = --------
DA
(Equation 105)
Where:
IFA is the change in current at the point of measurement, terminal A and
DA is a fault current-distribution factor, that is, the ratio between the fault current at line
end A and the total fault current.
For a single line, the value is equal to:
746
Monitoring
( 1 – p ) ⋅ Z L + ZB
DA = -----------------------------------------
Z A + Z L + ZB
(Equation 106)
Thus, the general fault location equation for a single line is:
I FA
U A = I A ⋅ p ⋅ Z L + -------
- ⋅ RF
DA
(Equation 107)
Table 421: Expressions for UA, IA and IFA for different types of faults
Fault type: UA IA IFA
L1-N UL1A IL1A + KN x INA 3
--- × Δ ( I L1A – I 0A )
2
L2-N UL2A IL2A + KN x INA
3
--- × Δ ( I L2A – I 0A )
2
L3-N UL3A IL3A + KN x INA

3
--- × Δ ( I L3A – I0A )
2
L1-L2-L3, L1-L2,L1-L2-N UL1A-UL2A IL1A - IL2A
ΔIL 1L 2A
L2-L3, L2-L3-N UL2A-UL3A IL2A - IL3A ΔIL2L3A
L3-L1, L3-L1-N UL3A-UL1A IL3A - IL1A

ΔIL3L1A
The KN complex quantity for zero-sequence compensation for the single line is equal to:
Z0L – Z 1L
K N = ------------------------
3 ⋅ Z1L
(Equation 108)
ΔI is the change in current, that is the current after the fault minus the current before the fault.
In the following, the positive sequence impedance for ZA, ZB and ZL is inserted into the equa-
tions, because this is the value used in the algorithm.
For double lines, the fault equation is:
747
Monitoring
I FA
U A = I A ⋅ p ⋅ Z 1L + -------- ⋅ RF + I 0P ⋅ Z 0M
DA
(Equation 109)
Where:
I0P is a zero sequence current of the parallel line,
Z0M is a mutual zero sequence impedance and
DA is the distribution factor of the parallel line, which is:
( 1 – p ) ⋅ ( ZA + ZA L + ZB ) + Z B
DA = ----------------------------------------------------------------------------- (Equation 110)
2 ⋅ ZA + Z L + 2 ⋅ Z B
The KN compensation factor for the double line becomes:
Z0L – Z 1L Z 0M I 0P
K N = ----------------------- - ⋅ -------
- + ----------------
3 ⋅ Z1L 3 ⋅ Z1L I 0A
(Equation 111)
From these equations it can be seen, that, if Z0m = 0, then the general fault location equation for
a single line is obtained. Only the distribution factor differs in these two cases.
Because the DA distribution factor according to equation 107 or 110 is a function of p, the gen-
eral equation 109 can be written in the form:
2
p – p ⋅ K1 + K2 – K3 ⋅ RF = 0
(Equation 112)
Where:
UA ZB
K 1 = ---------------- + --------------------------- + 1
I A ⋅ ZL Z L + ZA DD
(Equation 113)
UA ZB
K2 = --------------- ⋅ ⎛⎝ --------------------------- + 1⎞⎠
IA ⋅ Z L Z L + Z A DD
(Equation 114)
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Monitoring
IF A ⎛ ZA + ZB
- ⋅ --------------------------- + 1⎞
K 3 = ---------------
I A ⋅ Z L ⎝ Z 1 + ZA DD ⎠
(Equation 115)
and:
• ZADD = ZA + ZB for parallel lines.

• IA, IFA and UA are given in the above table.
• KN is calculated automatically according to equation 111.
• ZA, ZB, ZL, Z0L and Z0M are setting parameters.
For a single line, Z0M = 0 and ZADD = 0. Thus, equation 112 applies to both single and parallel
lines.
Equation 112 can be divided into real and imaginary parts:
2
p – p ⋅ Re ( K 1 ) + Re ( K 2 ) – R F ⋅ Re ( K 3 ) = 0
(Equation 116)
– p ⋅ Im ⋅ ( K1 ) + Im ⋅ ( K 2 ) – R F ⋅ Im ⋅ ( K3 ) = 0
(Equation 117)
If the imaginary part of K3 is not zero, RF can be solved according to equation 117, and then
inserted to equation 116. According to equation 116, the relative distance to the fault is solved
as the root of a quadratic equation.
Equation 116 gives two different values for the relative distance to the fault as a solution. A sim-
plified load compensated algorithm, that gives an unequivocal figure for the relative distance to
the fault, is used to establish the value that should be selected.
If the load compensated algorithms according to the above do not give a reliable solution, a less
accurate, non-compensated impedance model is used to calculate the relative distance to the
fault.
4.2.3 The non-compensated impedance model

In the non-compensated impedance model, IA line current is used instead of IFA fault current:
U A = p ⋅ Z 1 L ⋅ IA + R F ⋅ I A
(Equation 118)
Where:
IA is according to table 421.
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Monitoring
The accuracy of the distance-to-fault calculation, using the non-compensated impedance model,
is influenced by the pre-fault load current. So, this method is only used if the load compensated
models do not function.
4.2.4 IEC 60870-5-103

The communication protocol IEC 60870-5-103 may be used to poll fault location information
from the IED to a master (i.e. station HSI). There are two outputs that must be connected to ap-
propriate inputs on the function block I103StatFltDis, FLTDISTX gives distance to fault (reac-
tance, according the standard) and CALCMADE gives a pulse (100 ms) when a result is
obtainable on FLTDISTX output.
4.3 Function block
FLO1-
LMBRFLO
PHSELL1 FLTDISTX
PHSELL2 CALCMADE
PHSELL3 BCD_80
CALCDIST BCD_40
BCD_20
BCD_10
BCD_8
BCD_4
BCD_2
BCD_1
en05000679.vsd
Figure 366: FLO function block

Table 422: Input signals for the LMBRFLO (FLO1-) function block
Signal Description
PHSELL1 Phase selecton L1
CALCDIST Do calculate fault distance (release)
Table 423: Output signals for the LMBRFLO (FLO1-) function block
Signal Description
FLTDISTX Reactive distance to fault
CALCMADE Fault calculation made
BCD_80 Distance in binary coded data, bit represents 80%
750
Monitoring
Signal Description

Table 424: Basic general settings for the LMBRFLO (FLO1-) function
DrepChNoIL1 1 - 30 1 1 Ch Recorder input number
recording phase current,
IL1
IL2
IL3
DrepChNoIN 0 - 30 1 4 Ch Recorder input number
recording residual cur-
rent, IN
DrepChNoIP 0 - 30 1 0 Ch Recorder input number
recording 3I0 on parallel
line
DrepChNoUL1 1 - 30 1 5 Ch Recorder input number
recording phase voltage,
UL1
UL2
UL3
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Monitoring
Table 425: Basic parameter group settings for the LMBRFLO (FLO1-) function
R1A 0.001 - 1500.000 0.001 2.000 ohm/p Source resistance A
(near end)
X1A 0.001 - 1500.000 0.001 12.000 ohm/p Source reactance A (near
end)
R1B 0.001 - 1500.000 0.001 2.000 ohm/p Source resistance B (far
end)
X1B 0.001 - 1500.000 0.001 12.000 ohm/p Source reactance B (far
end)
R1L 0.001 - 1500.000 0.001 2.000 ohm/p Positive sequence line
resistance
X1L 0.001 - 1500.000 0.001 12.500 ohm/p Positive sequence line
reactance
R0L 0.001 - 1500.000 0.001 8.750 ohm/p Zero sequence line resis-
tance
X0L 0.001 - 1500.000 0.001 50.000 ohm/p Zero sequence line reac-
tance
R0M 0.000 - 1500.000 0.001 0.000 ohm/p Zero sequence mutual
resistance
X0M 0.000 - 1500.000 0.001 0.000 ohm/p Zero sequence mutual
reactance
LineLength 0.0 - 10000.0 0.1 40.0 - Length of line
4.6 Technical data

Table 426: Fault locator (RFLO)
Function Value or range Accuracy
Reactive and resistive reach (0.001-1500.000) Ω/phase ± 2.0% static accuracy
± 2.0% degrees static angular
accuracy
Conditions:
Phase selection According to input signals -
Maximum number of fault loca- 100 -
tions
752
Measured value expander block Chapter 14
Monitoring
5 Measured value expander block
Function block name: XP IEC 60617 graphical symbol:

ANSI number:
RANGE_XP
5.1 Introduction
The functions MMXU (SVR, CP and VP), MSQI (CSQ and VSQ) and MVGGIO (MV) are pro-
vided with measurement supervision functionality. All measured values can be supervised with
four settable limits, i.e. low-low limit, low limit, high limit and high-high limit. The measure val-
ue expander block (XP) has been introduced to be able to translate the integer output signal from
the measuring functions to 5 binary signals i.e. below low-low limit, below low limit, normal,
above high-high limit or above high limit. The output signals can be used as conditions in the
configurable logic.

The input signal must be connected to the RANGE-output of a measuring function block
(MMXU, MSQI or MVGGIO). The function block converts the input integer value to five bina-
ry output signals according to table 427.
Table 427: Input integer value converted to binary output signals

Measured supervised below between between low between above
value is: low-low limit low-low and and high limit high-high high-high
low limit and high limit limit
Output:
LOWLOW High
LOW High
NORMAL High
HIGH High
HIGHHIGH High
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Measured value expander block Chapter 14
Monitoring
5.3 Function block
XP01-
RANGE_XP
RANGE HIGHHIGH
HIGH
NORMAL
LOW
LOWLOW
en05000346.vsd
Figure 367: XP function block

Table 428: Input signals for the RANGE_XP (XP01-) function block
Signal Description
RANGE Measured value range
Table 429: Output signals for the RANGE_XP (XP01-) function block
Signal Description
HIGHHIGH Measured value is above high-high limit
HIGH Measured value is between high and high-high limit
NORMAL Measured value is between high and low limit
LOW Measured value is between low and low-low limit
LOWLOW Measured value is below low-low limit
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Disturbance report (RDRE) Chapter 14
Monitoring
6 Disturbance report (RDRE)
Function block name: DRP--, DRA1- – DRA4-, IEC 60617 graphical symbol:
DRB1- – DRB6-
ANSI number:
ABRDRE
6.1 Introduction
Complete and reliable information about disturbances in the primary and/or in the secondary
system together with continuous event-logging is accomplished by the disturbance report func-
tionality.
The disturbance report, always included in the IED, acquires sampled data of all selected analog
input and binary signals connected to the function block i.e. maximum 40 analog and 96 binary
signals.
The disturbance report functionality is a common name for several functions:
• Event List (EL)

• Indications (IND)
• Event recorder (ER)
• Trip Value recorder (TVR)
• Disturbance recorder (DR)
• Fault Locator (FL)
The function is characterized by great flexibility regarding configuration, starting conditions, re-
cording times and large storage capacity.
A disturbance is defined as an activation of an input in the DRAx or DRBy function blocks

which is set to trigger the disturbance recorder. All signals from start of pre-fault time to the end
of post-fault time, will be included in the recording.
Every disturbance report recording is saved in the IED in the standard Comtrade format. The
same applies to all events, which are continuously saved in a ring-buffer. The Local Human Ma-
chine Interface (LHMI) is used to get information about the recordings, but the disturbance re-
port files may be uploaded to the PCM 600 (Protection and Control IED Manager) and further
analysis using the disturbance handling tool.

The disturbance report (DRP) is a common name for several facilities to supply the operator,
analysis engineer, etc. with sufficient information about events in the system.
The facilities included in the disturbance report are:
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Monitoring
• General disturbance information

• Indications (IND)
• Event recorder (ER)
• Event list (EL)
• Trip values (phase values) (TVR)
• Disturbance recorder (DR)
• Fault locator (FL)
Figure 369 shows the relations among Disturbance Report, included functions and function
blocks. EL, ER and IND uses information from the binary input function blocks (DRB1- 6).
TVR uses analog information from the analog input function blocks (DRA1-3) which is used by
FL after estimation by TVR. The DR function acquires information from both DRAx and DRBx.
DRA1-- 4- Disturbance Report
DRP- - FL01
A4RADR RDRE FL
Analog signals
Trip Value Rec Fault Locator
DRB1-- 6- Disturbance
Recorder
Binary signals B6RBDR

Event List
Event Recorder
Indications
en05000124.vsd
Figure 368: Disturbance report functions and related function blocks
The whole disturbance report can contain information for a number of recordings, each with the
data coming from all the parts mentioned above. The event list function is working continuously,
independent of disturbance triggering, recording time etc. All information in the disturbance re-
port is stored in non-volatile flash memories. This implies that no information is lost in case of
loss of auxiliary power. Each report will get an identification number in the interval from 0-999.
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Disturbance report
Record no. N Record no. N+1 Record no. N+100
General dist. Trip Event Disturbance

Indications Fault locator Event list
information values recordings recording
en05000125.vsd
Figure 369: Disturbance report structure
Up to 100 disturbance reports can be stored. If a new disturbance is to be recorded when the
memory is full, the oldest disturbance report is over-written by the new one. The total recording
capacity for the disturbance recorder is depending of sampling frequency, number of analog and
binary channels and recording time. The figure 371 shows number of recordings vs total record-
ing time tested for a typical configuration, i.e. in a 50 Hz system it’s possible to record 100 where
the average recording time is 3.4 seconds. The memory limit does not affect the rest of the dis-
turbance report (IND, ER, EL and TVR).
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Number of recordings
100
3,4 s
80 3,4 s 20 analog
96 binary
40 analog
96 binary
60 6,3 s
6,3 s
6,3 s 50 Hz
40
60 Hz
Total recording time
250 300 350 400 s
en05000488.vsd
Figure 370: Number of recordings.
Disturbance information
Date and time of the disturbance, the indications, events, fault location and the trip values are
available on the local human-machine interface (LHMI). To acquire a complete disturbance re-
port the use of a PC and PCM600 is required. The PC may be connected to the IED-front, rear
or remotely via the station bus (Ethernet ports).
Indications (IND)
Indications is a list of signals that were activated during the total recording time of the distur-
bance (not time-tagged). (See section 8 "Indications (RDRE)" for more detailed information.)
Event recorder (ER)

The event recorder may contain a list of up to 150 time-tagged events, which have occurred dur-
ing the disturbance. The information is available via the LHMI or PCM 600. (See section 9
"Event recorder (RDRE)" for more detailed information.)
Event list (EL)

The event list may contain a list of totally 1000 time-tagged events. The list information is con-
tinuously updated when selected binary signals change state. The oldest data is overwritten. The
logged signals may be presented via LHMI or PCM 600. (See section 7 "Event list (RDRE)" for
more detailed information.)
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Trip value recorder (TVR)

The recorded trip values include phasors of selected analog signals before the fault and during
the fault. (See section 10 "Trip value recorder (RDRE)" for more detailed information.)
Disturbance recorder (DR)

The disturbance recorder records analog and binary signal data before, during and after the fault.
(See section 11 "Disturbance recorder (RDRE)" for more detailed information.)
Fault locator (FL)

The fault location function calculates the distance to fault. (See section 4 "Fault locator (RFLO)"
for more detailed information)
Time tagging
The IED has a built-in real-time calendar and clock. This function is used for all time tagging
within the disturbance report
Recording times
The disturbance report (DRP) records information about a disturbance during a settable time
frame. The recording times are valid for the whole disturbance report. The disturbance recorder
(DR), the event recorder (ER) and indication function register disturbance data and events dur-
ing tRecording, the total recording time.
The total recording time, tRecording, of a recorded disturbance is:
tRecording = PreFaultrecT + tFault + PostFaultrecT or PreFaultrecT + TimeLimit, depending on

which criterion stops the current disturbance recording
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Monitoring
Trig point
TimeLimit
PreFaultRecT PostFaultRecT
1 2 3
en05000487.vsd
Table 430: Definitions

PreFaultRecT, 1 Pre-fault or pre-trigger recording time. The time before the fault including the operate
time of the trigger. Use the setting PreFaultRecT to set this time.
tFault, 2 Fault time of the recording. The fault time cannot be set. It continues as long as any
valid trigger condition, binary or analog, persists (unless limited by TimeLimit the limit
time).
PostFaultRecT, 3 Post fault recording time. The time the disturbance recording continues after all acti-
vated triggers are reset. Use the setting PostFaultRecT to set this time.
TimeLimit Limit time. The maximum allowed recording time after the disturbance recording was
triggered. The limit time is used to eliminate the consequences of a trigger that does
not reset within a reasonable time interval. It limits the maximum recording time of a
recording and prevents subsequent overwriting of already stored disturbances.Use
the setting TimeLimit to set this time.
Figure 371: The recording times definition
Analog signals
Up to 40 analog signals can be selected for recording by the Disturbance recorder and triggering
of the Disturbance report function. Out of these 40, 30 are reserved for external analog signals,
i.e. signals from the analog input modules (TRM) and line differential communication module
(LDCM) via preprocessing function blocks (SMAI) and summation block (Sum3Ph). The last
10 channels may be connected to internally calculated analog signals available as function block
output signals (mA input signals, phase differential currents, bias currents etc.).
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PRxx- DRA1-
SMAI A1RADR DRA2-
GRPNAME AI3P A2RADR DRA3-
External analog AI1NAME AI1 INPUT1 A3RADR
signals
AI2NAME AI2 INPUT2
TRM, LDCM AI3NAME AI3 INPUT3
SUxx
AI4NAME AI4 INPUT4
AIN INPUT5
INPUT6
...
A4RADR
INPUT31
Internal analog signals
T2Dx, T3Dx, INPUT32
REFx, HZDx, INPUT33
L3D, L6D,
LT3D, LT6D INPUT34
INPUT35
SVRx, CPxx, VP0x,
CSQx, VSQx, MVxx INPUT36
...
INPUT40
en05000653.vsd
Figure 372: Analog input function blocks
The external input signals will be acquired, filtered and skewed and (after configuration) avail-
able as an input signal on the DRAx- function block via the PRxx function block. The informa-
tion is saved at the Disturbance report base sampling rate (1000 or 1200 Hz). Internally
calculated signals are updated according to the cycle time of the specific function. If a function
is running at lower speed than the base sampling rate, the Disturbance recorder will use the latest
updated sample until a new updated sample is available.
If the IED is preconfigured the only tool needed for analog configuration of the Disturbance re-
port is the Signal Matrix Tool (SMT, external signal configuration). In case of modification of
a preconfigured IED or general internal configuration the Application Configuration tool within
PCM600 is used.
The preprocessor function block (PRxx) calculates the residual quantities in cases where only
the three phases are connected (AI4-input not used). PRxx makes the information available as a
group signal output, phase outputs and calculated residual output (AIN-output). In situations
where AI4-input is used as a input signal the corresponding information is available on the
non-calculated output (AI4) on the PRxx-block. Connect the signals to the DRAx accordingly.
For each of the analog signals, Operation = On means that it is recorded by the disturbance re-
corder. The trigger is independent of the setting of Operation, and triggers even if operation is
set to Off. Both undervoltage and overvoltage can be used as trigger conditions. The same ap-
plies for the current signals.
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Monitoring
The analog signals are presented only in the disturbance recording, but they affect the entire dis-
turbance report when being used as triggers.
Binary signals
Up to 96 binary signals can be selected to be handled by the disturbance report.The signals can
be selected from internal logical and binary input signals. A binary signal is selected to be re-
corded when:
• the corresponding function block is included in the configuration

• the signal is connected to the input of the function block
Each of the 96 signals can be selected as a trigger of the disturbance report (operationON/OFF).
A binary signal can be selected to activate the red LED on the local HMI (setLED=On/Off).
The selected signals are presented in the event recorder, event list and the disturbance recording.
But they affect the whole disturbance report when they are used as triggers. The indications are
also selected from these 96 signals with the LHMI IndicationMask=Show/Hide.
Trigger signals
The trigger conditions affect the entire disturbance report, except the event list, which runs con-
tinuously. As soon as at least one trigger condition is fulfilled, a complete disturbance report is
recorded. On the other hand, if no trigger condition is fulfilled, there is no disturbance report, no
indications, and so on. This implies the importance of choosing the right signals as trigger con-
ditions.
A trigger can be of type:
• Manual trigger
• Binary-signal trigger
• Analog-signal trigger (over/under function)
Manual trigger
A disturbance report can be manually triggered from the local HMI, from PCM600 or via station
bus (IEC61850). When the trigger is activated, the manual trigger signal is generated. This fea-
ture is especially useful for testing. Refer to “Operators manual” for procedure.
Binary-signal trigger
Any binary signal state (logic one or a logic zero) can be selected to generate a trigger (Triglevel
= Trig on 0/Trig on 1). When a binary signal is selected to generate a trigger from a logic zero,
the selected signal will not be listed in the indications list of the disturbance report.
Analog-signal trigger
All analog signals are available for trigger purposes, no matter if they are recorded in the distur-
bance recorder or not. The settings are OverTrigOp, UnderTrigOp, OverTrigLe and UnderTri-
gLe.
The check of the trigger condition is based on peak-to-peak values. When this is found, the ab-
solute average value of these two peak values is calculated. If the average value is above the
threshold level for an overvoltage or overcurrent trigger, this trigger is indicated with a greater
than (>) sign with the user-defined name.
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Monitoring
If the average value is below the set threshold level for an undervoltage or undercurrent trigger,
this trigger is indicated with a less than (<) sign with its name. The procedure is separately per-
formed for each channel.
This method of checking the analog start conditions gives a function which is insensitive to DC
offset in the signal. The operate time for this start is typically in the range of one cycle, 20 ms
for a 50 Hz network.
All under/over trig signal information is available on the LHMI and PCM600, see table 431
"Output signals for the RDRE (DRP--) function block".
Post Retrigger
The disturbance report function does not respond to any new trig condition, during a recording.
Under certain circumstances the fault condition may reoccur during the post-fault recording, for
instance by automatic reclosing to a still faulty power line.
In order to capture the new disturbance it is possible to allow retriggering (PostRetrig = On)dur-
ing the post-fault time. In this case a new, complete recording will start and, during a period, run
in parallel with the initial recording.
When the retrig parameter is disabled (PostRetrig = Off), a new recording will not start until the
post-fault (PostFaultrecT or TimeLimit) period is terminated. If a new trig occurs during the
post-fault period and lasts longer than the proceeding recording a new complete recording will
be fetched.
The disturbance report function can handle maximum 3 simultaneous disturbance recordings.
6.3 Function block
DRP--
RDRE
DRPOFF
RECSTART
RECMADE
CLEARED
MEMUSED
en05000406.vsd
Figure 373: DRP function block
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Monitoring
DRA1-
A1RADR
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
NAME1
NAME2
NAME3
NAME4
NAME5
NAME6
NAME7
NAME8
NAME9
NAME10
en05000430.vsd
Figure 374: DRA1 function block, analog inputs, example for DRA1–DRA3
DRA4-
A4RADR
INPUT31
INPUT32
INPUT33
INPUT34
INPUT35
INPUT36
INPUT37
INPUT38
INPUT39
INPUT40
NAME31
NAME32
NAME33
NAME34
NAME35
NAME36
NAME37
NAME38
NAME39
NAME40
en05000431.vsd
Figure 375: DRA4 function block, derived analog inputs
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DRB1-
B1RBDR
INPUT 1
INPUT 2
INPUT 3
INPUT 4
INPUT 5
INPUT 6
INPUT 7
INPUT 8
INPUT 9
INPUT 10
INPUT 11
INPUT 12
INPUT 13
INPUT 14
INPUT 15
INPUT 16
NAME1
NAME2
NAME3
NAME4
NAME5
NAME6
NAME7
NAME8
NAME9
NAME10
NAME11
NAME12
NAME13
NAME14
NAME15
NAME16
en05000432.vsd
Figure 376: DRB1 function block, binary inputs, example for DRB1–DRB6

Table 431: Output signals for the RDRE (DRP--) function block
Signal Description
DRPOFF Disturbance report function turned off
RECSTART Disturbance recording started
RECMADE Disturbance recording made
CLEARED All disturbances in the disturbance report cleared
MEMUSED More than 80% of memory used
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Table 432: Input signals for the A1RADR (DRA1-) function block
Signal Description
INPUT1 Group signal for input 1
Table 433: Input signals for the A4RADR (DRA4-) function block
Signal Description
INPUT31 Analogue channel 31
Table 434: Input signals for the B1RBDR (DRB1-) function block
Signal Description
INPUT1 Binary channel 1
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Signal Description

Table 435: Basic general settings for the RDRE (DRP--) function
On
PreFaultRecT 0.05 - 1.00 0.01 0.10 s Pre-fault recording time
PostFaultRecT 0.1 - 10.0 0.1 0.5 s Post-fault recording time
TimeLimit 0.5 - 10.0 0.1 1.0 s Fault recording time limit
PostRetrig Off - Off - Post-fault retrig enabled
ZeroAngleRef 1 - 30 1 1 Ch Trip value recorder, pha-
sor reference channel
OpModeTest Off - Off - Operation mode during
On test mode
Table 436: Basic general settings for the A1RADR (DRA1-) function
Operation01 Off - Off - Operation On/Off
On
NomValue01 0.0 - 999999.9 0.1 0.0 - Nominal value for ana-
logue channel 1
UnderTrigOp01 Off - Off - Use under level trig for
On analogue cha 1 (on) or
not (off)
UnderTrigLe01 0 - 200 1 50 % Under trigger level for
analogue cha 1 in % of
signal
OverTrigOp01 Off - Off - Use over level trig for
not (off)
OverTrigLe01 0 - 5000 1 200 % Over trigger level for ana-
logue cha 1 in % of signal
On
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logue channel 2
not (off)
signal
not (off)
On
logue channel 3
not (off)
signal
not (off)
OverTrigLe03 0 - 5000 1 200 % Overtrigger level for ana-
On
logue channel 4
not (off)
signal
not (off)
On
logue channel 5
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not (off)
signal
not (off)
On
logue channel 6
not (off)
signal
not (off)
On
logue channel 7
not (off)
signal
not (off)
On
logue channel 8
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not (off)
signal
not (off)
On
logue channel 9
not (off)
signal
not (off)
On
logue channel 10
not (off)
signal
not (off)
logue cha 10 in % of sig-
nal
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Table 437: Basic general settings for the A4RADR (DRA4-) function
Operation31 Off - Off - Operation On/off
On
logue channel 31
not (off)
signal
not (off)
nal
On
logue channel 32
not (off)
signal
not (off)
nal
On
logue channel 33
not (off)
signal
not (off)
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OverTrigLe33 0 - 5000 1 200 % Overtrigger level for ana-
nal
On
logue channel 34
not (off)
signal
not (off)
nal
On
logue channel 35
not (off)
signal
not (off)
nal
On
logue channel 36
not (off)
signal
not (off)
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nal
On
logue channel 37
not (off)
signal
not (off)
nal
On
logue channel 38
not (off)
signal
not (off)
nal
On
logue channel 39
not (off)
signal
not (off)
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nal
On
logue channel 40
not (off)
signal
not (off)
nal
Table 438: Basic general settings for the B1RBDR (DRB1-) function
Operation01 Off - Off - Trigger operation On/Off
On
TrigLevel01 Trig on 0 - Trig on 1 - Trig on positiv (1) or neg-
Trig on 1 ative (0) slope for binary
inp 1
IndicationMa01 Hide - Hide - Indication mask for
Show binary channel 1
SetLED01 Off - Off - Set red-LED on HMI for
On binary channel 1
On
inp 2
On binary channel 2
On
inp 3
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On binary channel 3
On
inp 4
On binary channel 4
On
inp 5
On binary channel 5
On
inp 6
On binary channel 6
On
inp 7
On binary channel 7
On
inp 8
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On binary channel 8
On
inp 9
On binary channel 9
On
inp 10
On binary channel 10
On
inp 11
On
inp 12
On binary input 12
On
inp 13
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Monitoring

On
inp 14
On
inp 15
On
inp 16
FUNT1 0 - 255 1 0 FunT Function type for binary
channel 1 (IEC
-60870-5-103)
channel 2 (IEC
-60870-5-103)
channel 3 (IEC
-60870-5-103)
channel 4 (IEC
-60870-5-103)
channel 5 (IEC
-60870-5-103)
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channel 6 (IEC
-60870-5-103)
channel 7 (IEC
-60870-5-103)
channel 8 (IEC
-60870-5-103)
channel 9 (IEC
-60870-5-103)
channel 10 (IEC
-60870-5-103)
channel 11 (IEC
-60870-5-103)
channel 12 (IEC
-60870-5-103)
channel 13 (IEC
-60870-5-103)
channel 14 (IEC
-60870-5-103)
channel 15 (IEC
-60870-5-103)
channel 16 (IEC
-60870-5-103)
INFNO1 0 - 255 1 0 INFNO Information number for
binary channel 1 (IEC
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
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-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
6.6 Technical data

Table 439: Disturbance report (RDRE)
Pre-fault time (0.05–0.30) s -
Post-fault time (0.1–5.0) s -
Limit time (0.5–6.0) s -
Maximum number of recordings 100 -
Time tagging resolution 1 ms See Table 28: "Time synchroniza-
tion, time tagging".
Maximum number of analog 30 + 10 (external + internally -
inputs derived)
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Maximum number of binary inputs 96 -
Maximum number of phasors in 30 -
the Trip Value recorder per
recording
Maximum number of indications in 96 -
a disturbance report
Maximum number of events in the 150 -
Event recording per recording
Maximum number of events in the 1000, first in - first out -
Event list
Maximum total recording time (3.4 340 seconds (100 recordings) at -
s recording time and maximum 50 Hz, 280 seconds (80 record-
number of channels, typical value) ings) at 60 Hz
Sampling rate 1 kHz at 50 Hz -
1.2 kHz at 60 Hz
Recording bandwidth (5-300) Hz -
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Event list (RDRE) Chapter 14
Monitoring
7 Event list (RDRE)
7.1 Introduction
Continuous event-logging is useful for monitoring of the system from an overview perspective
and is a complement to specific disturbance recorder functions.
The event list logs all binary input signals connected to the Disturbance report function. The list
may contain of up to 1000 time-tagged events stored in a ring-buffer.
The event list information is available in the IED and is reported to higher control systems via
the station bus together with other logged events in the IED. In absence of any software tool the
information seeker may use the local HMI to view the event list.

When a binary signal, connected to the disturbance report function, changes status, the event list
function stores input name, status and time in the event list in chronological order. The list can
contain up to 1000 events from both internal logic signals and binary input channels. If the list
is full, the oldest event is overwritten when a new event arrives.
The list can be configured to show oldest or newest events first with a setting on the LHMI.
The event list function runs continuously, in contrast to the event recorder function, which is
only active during a disturbance.
The name of the binary input signal that appears in the event recording is the user-defined name
assigned when the IED is configured. The same name is used in the disturbance recorder func-
tion (DR), indications (IND) and the event recorder function (ER).
The event list is stored and managed separate from the disturbance report information (ER, DR,
IND, TVR and FL).
7.3 Function block

The object has no function block of it’s own. It is included in the DRP- block and uses informa-
tion from the DRBx- block.
7.4 Input signals

The event list logs the same binary input signals as configured for the Disturbance Report func-
tion.
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Event list (RDRE) Chapter 14
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7.5 Technical data

Table 440: Event list (RDRE)
Function Value
Buffer capacity Maximum number of events in the list 1000
Resolution 1 ms
Accuracy Depending on time synchro-
nizing
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8 Indications (RDRE)
8.1 Introduction
To get fast, condensed and reliable information about disturbances in the primary and/or in the
secondary system it is important to know e.g. binary signals that have changed status during a
disturbance. This information is used in the short perspective to get information via the LHMI
in a straightforward way.
There are three LEDs on the LHMI (green, yellow and red), which will display status informa-
tion about the IED and the Disturbance Report function (trigged).
The Indication list function shows all selected binary input signals connected to the Disturbance
Report function that have changed status during a disturbance.
The indication information is available for each of the recorded disturbances in the IED and the
user may use the Local Human Machine Interface (LHMI) to get the information.

The LED indications display this information:
Green LED:
Steady light In Service

Flashing light Internal fail
Dark No power supply
Yellow LED:
Steady light A disturbance report is triggered

Flashing light The IED is in test mode or in configuration mode
Red LED:
Steady light Trigged on binary signal N with SetLEDN=On
Indication list:
The possible indicated signals are the same as the ones chosen for the disturbance report function
and disturbance recorder
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Indications (RDRE) Chapter 14
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The indication function tracks 0 to 1 changes of binary signals during the recording period of the
collection window. This means that constant logic zero, constant logic one or state changes from
logic one to logic zero will not be visible in the list of indications. Signals are not time tagged.
In order to be recorded in the list of indications the:
• the signal must be connected to binary input (DRB1-6) function block

• the DRP parameter Operation must be set On
• the DRP must be trigged (binary or analog)
• the input signal must change state from logical 0 to 1 during the recording time.
Indications are selected with the indication mask (IndicationMask) when configuring the binary
inputs.
The name of the binary input signal that appears in the Indication function is the user-defined
name assigned at configuration of the IED. The same name is used in disturbance recorder func-
tion (DR), indications (IND) and event recorder function (ER).
8.3 Function block

8.4 Input signals

The indication function may log the same binary input signals as the Disturbance Report func-
tion.
8.5 Technical data

Table 441: Indications
Function Value
Buffer capacity Maximum number of indications pre- 96
sented for single disturbance
Maximum number of recorded distur- 100
bances
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Event recorder (RDRE) Chapter 14
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9 Event recorder (RDRE)
9.1 Introduction
Quick, complete and reliable information about disturbances in the primary and/or in the sec-
ondary system is vital e.g. time tagged events logged during disturbances. This information is
used for different purposes in the short term (e.g. corrective actions) and in the long term (e.g.
Functional Analysis).
The event recorder logs all selected binary input signals connected to the Disturbance Report
function. Each recording can contain up to 150 time-tagged events.
The event recorder information is available for the disturbances locally in the IED.
The information may be uploaded to the PCM 600 (Protection and Control IED Manager) and
further analyzed using the Disturbance Handling tool.
The event recording information is an integrated part of the disturbance record (Comtrade file).

When one of the trig conditions for the disturbance report is activated, the event recorder logs
every status change in the 96 selected binary signals. The events can be generated by both inter-
nal logical signals and binary input channels. The internal signals are time-tagged in the main
processor module, while the binary input channels are time-tagged directly in each I/O module.
The events are collected during the total recording time (pre-, post-fault and limit time), and are
stored in the disturbance report flash memory at the end of each recording.
In case of overlapping recordings, due to PostRetrig = On and a new trig signal appears during
post-fault time, events will be saved in both recording files.
The name of the binary input signal that appears in the event recording is the user-defined name
assigned when configuring the IED. The same name is used in the disturbance recorder function
(DR), indications (IND) and event recorder function (ER).
The event record is stored as a part of the disturbance report information (ER, DR, IND, TVR
and FL) and managed via the LHMI or PCM 600.
9.3 Function block

9.4 Input signals

The event recorder function logs the same binary input signals as the Disturbance Report func-
tion.
785
Event recorder (RDRE) Chapter 14
Monitoring
9.5 Technical data

Table 442: Event recorder (RDRE)
Function Value
Buffer capacity Maximum number of events in disturbance report 150
Maximum number of disturbance reports 100
Resolution 1 ms
Accuracy Depending on time syn-
chronizing
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Trip value recorder (RDRE) Chapter 14
Monitoring
10 Trip value recorder (RDRE)
10.1 Introduction
Information about the pre-fault and fault values for currents and voltages are vital for the distur-
bance evaluation.
The Trip value recorder calculates the values of all selected analog input signals connected to
the Disturbance report function. The result is magnitude and phase angle before and during the
fault for each analog input signal.
The trip value recorder information is available for the disturbances locally in the IED.
The information may be uploaded to the PCM 600 (Protection and Control IED Manager) and
further analyzed using the Disturbance Handling tool.
The trip value recorder information is an integrated part of the disturbance record (Comtrade
file).

The trip value recorder (TVR) calculates and presents both fault and pre-fault amplitudes as well
as the phase angles of all the selected analog input signals. The parameter ZeroAngleRef points
out which input signal is used as the angle reference. The calculated data is input information to
the fault locator (FL).
When the disturbance report function is triggered the sample for the fault interception is
searched for, by checking the non-periodic changes in the analog input signals. The channel
search order is consecutive, starting with the analog input with the lowest number.
When a starting point is found, the Fourier estimation of the pre-fault values of the complex val-
ues of the analog signals starts 1.5 cycle before the fault sample. The estimation uses samples
during one period. The post-fault values are calculated using the Recursive Least Squares (RLS)
method. The calculation starts a few samples after the fault sample and uses samples during 1/2
- 2 cycles depending on the shape of the signals.
If no starting point is found in the recording, the disturbance report trig sample is used as the
start sample for the Fourier estimation. The estimation uses samples during one cycle before the
trig sample. In this case the calculated values are used both as pre-fault and fault values.
The name of the analog input signal that appears in the Trip value recorder function is the us-
er-defined name assigned when the IED is configured. The same name is used in the Disturbance
recorder function (DR).
The trip value record is stored as a part of the disturbance report information (ER, DR, IND,
TVR and FLOC) and managed in via the LHMI or PCM 600.
10.3 Function block

787
Trip value recorder (RDRE) Chapter 14
Monitoring
10.4 Input signals

The trip value recorder function uses analog input signals connected to DRA1-3 (not DRA4).
10.5 Technical data

Table 443: Trip value recorder (RDRE)
Function Value
Buffer capacity Maximum number of analog inputs 30
788
Disturbance recorder (RDRE) Chapter 14
Monitoring
11 Disturbance recorder (RDRE)
11.1 Introduction
The Disturbance Recorder function supplies fast, complete and reliable information about dis-
turbances in the power system. It facilitates understanding system behavior and related primary
and secondary equipment during and after a disturbance. Recorded information is used for dif-
ferent purposes in the short perspective (e.g. corrective actions) and long perspective (e.g. Func-
tional Analysis).
The Disturbance Recorder acquires sampled data from all selected analog input and binary sig-
nals connected to the Disturbance Report function (maximum 40 analog and 96 binary signals).
The binary signals are the same signals as available under the event recorder function.
The function is characterized by great flexibility and is not dependent on the operation of pro-
tection functions. It can record disturbances not detected by protection functions.
The disturbance recorder information for the last 100 disturbances are saved in the IED and the
Local Human Machine Interface (LHMI) is used to view the list of recordings.
The disturbance recording information can be uploaded to the PCM 600 (Protection and Control
IED Manager) and further analyzed using the Disturbance Handling tool.

Disturbance recording (DR) is based on the acquisition of binary and analog signals. The binary
signals can be either true binary input signals or internal logical signals generated by the func-
tions in the IED. The analog signals to be recorded are input channels from the Transformer In-
put Module (TRM), Line Differential communication Module (LDCM) through the Signal
Matrix Analog Input (SMAI) and possible summation (Sum3Ph) function blocks and some in-
ternally derived analog signals. For details, refer to section 6 "Disturbance report (RDRE)".
DR collects analog values and binary signals continuously, in a cyclic buffer. The pre-fault buff-
er operates according to the FIFO principle; old data will continuously be overwritten as new
data arrives when the buffer is full. The size of this buffer is determined by the set pre-fault re-
cording time.
Upon detection of a fault condition (triggering), the disturbance is time tagged and the data stor-
age continues in a post-fault buffer. The storage process continues as long as the fault condition
prevails - plus a certain additional time. This is called the post-fault time and it can be set in the
disturbance report.
The above mentioned two parts form a disturbance recording. The whole memory, intended for
disturbance recordings, acts as a cyclic buffer and when it is full, the oldest recording is over-
written. The last 100 recordings are stored in the IED.
The time tagging refers to the activation of the trigger that starts the disturbance recording. A
recording can be trigged by, manual start, binary input and/or from analog inputs (over-/under-
level trig).
789
Monitoring
A user-defined name for each of the signals can be set. These names are common for all func-
tions within the disturbance report functionality.
11.2.1 Memory and storage

When a recording is completed, a post recording processing occurs.
This post-recording processing comprises:
• Saving the data for analog channels with corresponding data for binary signals
• Add relevant data to be used by the Disturbance Handling tool (part of PCM 600)
• Compression of the data, which is performed without losing any data accuracy
• Storing the compressed data in a non-volatile memory (flash memory)
The recorded disturbance is now ready for retrieval and evaluation.
The recording files comply with the Comtrade standard IEC 60255-24 and are divided into three
files; a header file (HDR), a configuration file (CFG) and a data file (DAT).
The header file (optional in the standard) contains basic information about the disturbance i.e.
information from the Disturbance Report functions (ER, TVR and FL). The Disturbance Han-
dling tool use this information and present the recording in a user-friendly way.
General:
• Station name, object name and unit name

• Date and time for the trig of the disturbance
• Record number
• Sampling rate
• Time synchronization source
• Recording times
• Activated trig signal
• Active setting group
Analog:
• Signal names for selected analog channels

• Information e.g. trig on analog inputs
• Primary and secondary instrument transformer rating
• Over- or Undertrig: level and operation
• Over- or Undertrig status at time of trig
• CT direction
Binary:
• Signal names
• Status of binary input signals
790
Monitoring
The configuration file is a mandatory file containing information needed to interpret the data
file. For example sampling rate, number of channels, system frequency, channel info etc.
The data file, which also is mandatory, containing values for each input channel for each sample
in the record (scaled value). The data file also contains a sequence number and time stamp for
each set of samples.
11.2.2 IEC 60870-5-103

The communication protocol IEC 60870-5-103 may be used to poll disturbance recordings from
the IED to a master (i.e. station HSI). The standard describes how to handle 8 disturbance re-
cordings, 8 analog channels (4 currents and 4 voltages) using the public range and binary sig-
nals.
The last 8 recordings, out of maximum 100, are available for transfer to the master. When the
last one is transferred and acknowledged new recordings in the IED will appear, in the master
points of view (even if they already where stored in the IED).
To be able to report 40 analog channels from the IED using IEC 60870-5-103 the first
8 channels are placed in the public range and the next 32 are placed in the private range. To com-
ply the standard the first 8 must be configured according to table 444.
Table 444: Configuration of analog channels

Signal Disturbance recorder
IL1 DRA1 INPUT1
IL2 DRA1 INPUT2
IL3 DRA1 INPUT3
IN DRA1 INPUT4
UL1 DRA1 INPUT5
UL2 DRA1 INPUT6
UL3 DRA1 INPUT7
UN DRA1 INPUT8
The binary signals connected to DRB1-DRB6 are reported by polling. The function blocks in-
clude function type and information number.
11.3 Function block

The object has no function block of it’s own. It is included in the DRP-, DRAx and DRBx-
block.

For signals see section, in Disturbance report, 6.4.
791
Monitoring

For Setting parameters see table 435 - table 438.
11.6 Technical data

Table 445: Disturbance recorder (RDRE)
Function Value
Buffer capacity Maximum number of analog inputs 40
Maximum number of binary inputs 96
Maximum total recording time (3.4 s recording time and maximum number of 340 seconds (100 record-
channels, typical value) ings) at 50 Hz
280 seconds (80 record-
ings) at 60 Hz
792
Metering
Chapter 15 Metering
About this chapter

This chapter describes among others, Pulse counter logic which is a function used to meter ex-
ternally generated binary pulses. The way the functions work, their setting parameters, function
blocks, input and output signals, and technical data are included for each function.
793
Pulse counter logic (GGIO) Chapter 15
Metering
1 Pulse counter logic (GGIO)
Function block name: PCx-- IEC 60617 graphical symbol:

ANSI number:
PCGGIO
1.1 Introduction
The pulse counter logic function counts externally generated binary pulses, for instance pulses
coming from an external energy meter, for calculation of energy consumption values. The pulses
are captured by the binary input module and then read by the pulse counter function. A scaled
service value is available over the station bus. The special Binary input module with enhanced
pulse counting capabilities must be ordered to achieve this functionality.

The registration of pulses is done for positive transitions (0->1) on one of the 16 binary input
channels located on the Binary Input Module (BIM). Pulse counter values are sent to the station
HMI with predefined cyclicity without reset.
The integration time period can be set in the range from 30 seconds to 60 minutes and is syn-
chronized with absolute system time. Interrogation of additional pulse counter values can be
done with a command (intermediate reading) for a single counter. All active counters can also
be read by the LON General Interrogation command (GI) or IEC 61850.
The pulse counter in REx670 supports unidirectional incremental counters. That means only
positive values are possible. The counter uses a 32 bit format, that is, the reported value is a
32-bit, signed integer with a range 0...+2147483647. The counter is reset at initialization of the
IED.
The reported value to station HMI over the station bus contains Identity, Value, Time, and Pulse
Counter Quality. The Pulse Counter Quality consists of:
• Invalid (board hardware error or configuration error)

• Wrapped around
• Blocked
• Adjusted
The transmission of the counter value by SPA can be done as a service value, that is, the value
frozen in the last integration cycle is read by the station HMI from the database. The pulse
counter function updates the value in the database when an integration cycle is finished and ac-
794
Metering
tivates the NEW_VAL signal in the function block. This signal can be connected to an Event
function block, be time tagged, and transmitted to the station HMI. This time corresponds to the
time when the value was frozen by the function.
Note!
The pulse counter function requires a binary input card, BIMp, that is specially adapted to the
pulse counter function.
Figure 378 shows the pulse counter function block with connections of the inputs and outputs.
SingleCmdFunc PulseCounter EVENT

OUTx BLOCK
INVALID INPUT1
SingleCmdFunc Pulse RESTART INPUT2
OUTx INPUT OUT READ_VAL
Pulse length >1s BLOCKED INPUT3
I/O-module NEW_VAL INPUT4
BI_PULSE
”Reset counter” RS_CNT
NAME
SCAL_VAL IEC EVENT
SMS settings Database

1.Operation = Off/On Pulse counter value:
2.tReporting = 0s...60min 0...2147483647
3.Event Mask = No Events/Report Events
4.Scale = 1-90000
en05000744.vsd
Figure 377: Overview of the pulse counter function
The BLOCK and READ_VAL inputs can be connected to Single Command blocks, which are
intended to be controlled either from the station HMI or/and the local HMI. As long as the
BLOCK signal is set, the pulse counter is blocked. The signal connected to READ_VAL per-
forms one additional reading per positive flank. The signal must be a pulse with a length >1 sec-
ond.
The BI_PULSE input is connected to the used input of the function block for the Binary Input
Module (BIM).
The NAME input is used for a user-defined name with up to 13 characters.
The RS_CNT input is used for resetting the counter.
Each pulse counter function block has four binary output signals that can be connected to an
Event function block for event recording: INVALID, RESTART, BLOCKED and NEW_VAL.
The SCAL_VAL signal can be connected to the IEC Event function block.
795
Metering
The INVALID signal is a steady signal and is set if the Binary Input Module, where the pulse
counter input is located, fails or has wrong configuration.
The RESTART signal is a steady signal and is set when the reported value does not comprise a
complete integration cycle. That is, in the first message after IED start-up, in the first message
after deblocking, and after the counter has wrapped around during last integration cycle.
The BLOCKED signal is a steady signal and is set when the counter is blocked. There are two
reasons why the counter is blocked:
• The BLOCK input is set, or

• The Binary Input Module, where the counter input is situated, is inoperative.
The NEW_VAL signal is a pulse signal. The signal is set if the counter value was updated since
last report.
The SCAL_VAL signal consists of value, time and status information.
1.3 Function block
PC01-
PCGGIO
BLOCK INVALID
READ_VAL RESTART
BI_PULSE BLOCKED
RS_CNT NEW_VAL
NAME SCAL_VAL
en05000709.vsd
Figure 378: PC function block

Table 446: Input signals for the PCGGIO (PC01-) function block
Signal Description
READ_VAL Initiates an additional pulse counter reading
BI_PULSE Connect binary input channel for metering
RS_CNT Resets pulse counter value
796
Metering
Table 447: Output signals for the PCGGIO (PC01-) function block
Signal Description
INVALID The pulse counter value is invalid
RESTART The reported value does not comprise a complete integration
cycle
BLOCKED The pulse counter function is blocked
NEW_VAL A new pulse counter value is generated
SCAL_VAL Scaled value with time and status information

Table 448: Basic general settings for the PCGGIO (PC01-) function
On
EventMask NoEvents - NoEvents - Report mask for analog
ReportEvents events from pulse
counter
CountCriteria Off - RisingEdge - Pulse counter criteria
RisingEdge
Falling edge
OnChange
Scale 1.000 - 90000.000 0.001 1.000 - Scaling value for
SCAL_VAL output to unit
per counted value
Quantity Count - Count - Measured quantity for
ActivePower SCAL_VAL output
ApparentPower
ReactivePower
ActiveEnergy
ApparentEnergy
ReactiveEnergy
tReporting 0 - 3600 1 60 s Cycle time for reporting
of counter value
1.6 Technical data

Table 449: Pulse counter logic (GGIO)
Input frequency See Binary Input Module (BIM) -
Cycle time for report of counter (0–3600) s -
value
797
Energy metering and demand handling Chapter 15
(MMTR) Metering
2 Energy metering and demand handling (MMTR)
Function block name: ETPx IEC 60617 graphical symbol:

ANSI number:
ETPMMTR
2.1 Introduction
Outputs from measurement function (MMXU) can be used to calculate energy. Active as well
as reactive values are calculated in import respectively export direction. Values can be read or
generated as pulses. Maximum demand power values are also calculated by the function.

The instantaneous values outputs of active and reactive power from the Measurements
(CVMMXU) function block are used and integrated over a selected time tEnergy to measure the
integrated energy. The energy values are presented as communication outputs but also as pulsed
output which can be connected to a pulse counter. Values are in Ws resp Vars. Outputs are avail-
able for forward as well as reverse direction. The accumulated energy values can be reset from
the HMI reset menu or with input RSTACC.
The maximum demand values for active and reactive power are calculated for the set time tEn-
ergy and the maximum value is stored in a register available over communication and from out-
puts MAXPAFD, MAXPARD, MAXRAFD, MAXRARD for the active and reactive power
forward and reverse direction until reset with input RSTDMD or from the LHMI reset menu.
SVR1 ETP1
CVMMXU ETPMMTR
PINST P
QINST Q
STACC
TRUE
RSTACC
FALSE
RSTDMD
FALSE
en07000121.vsd
Figure 379: Connection of the energy metering function to the outputs of the measuring func-
tion
798
(MMTR) Metering
2.3 Function block
ETP1-
ETPMMTR
P ACCST
Q EAFPULSE
STACC EARPULSE
RSTACC ERFPULSE
RSTDMD ERRPULSE
EAFALM
EARALM
ERFALM
ERRALM
EAFACC
EARACC
ERFACC
ERRACC
MAXPAFD
MAXPARD
MAXPRFD
MAXPRRD
en07000120.vsd
Figure 380: ETP function block

Table 450: Input signals for the ETPMMTR (ETP1-) function block
Signal Description
P Measured active power
Q Measured reactive power
STACC Start to accumulate energy values
RSTACC Reset accumulated energy values. Level sensitive
RSTDMD used by ch: reset maximum demand
Table 451: Output signals for the ETPMMTR (ETP1-) function block
Signal Description
ACCST Start of accumulating energy values.
EAFPULSE Accumulated forward active energy pulse
EARPULSE Accumulated reverse active energy pulse
ERFPULSE Accumulated forward reactive energy pulse
ERRPULSE Accumulated reverse reactive energy pulse
EAFALM Alarm for active forward energy exceed limit in set interval
EARALM Alarm for active reverse energy exceed limit in set interval
ERFALM Alarm for reactive forward energy exceed limit in set interval
799
(MMTR) Metering
Signal Description
ERRALM Alarm for reactive reverse energy exceed limit in set interval
EAFACC Accumulated forward active energy value in KWh
EARACC Accumulated reverse active energy value in kWh
ERFACC Accumulated forward reactive energy value in kVArh
ERRACC Accumulated reverse reactive energy value in kVArh
MAXPAFD Maximum forward active power demand value for set interval
MAXPARD Maximum reverse active power demand value for set interval
MAXPRFD Maximum forward reactive power demand value for set interval
MAXPRRD Maximum reactive power demand value in reverse direction

Table 452: Basic general settings for the ETPMMTR (ETP1-) function
On
StartAcc Off - Off - Activate the accumula-
On tion of energy values
tEnergy 1 Minute - 1 Minute - Time interval for energy
5 Minutes calculation
10 Minutes
15 Minutes
30 Minutes
60 Minutes
180 Minutes
tEnergyOnPls 0.000 - 60.000 0.001 1.000 s Energy accumulated
pulse ON time in secs
tEnergyOffPls 0.000 - 60.000 0.001 0.500 s Energy accumulated
pulse OFF time in secs
EAFAccPlsQty 0.001 - 10000.000 0.001 100.000 MWh Pulse quantity for active
forward accumulated
energy value
EARAccPlsQty 0.001 - 10000.000 0.001 100.000 MWh Pulse quantity for active
reverse accumulated
energy value
ERFAccPlsQty 0.001 - 10000.000 0.001 100.000 MVArh Pulse quantity for reac-
tive forward accumu-
lated energy value
ERVAccPlsQty 0.001 - 10000.000 0.001 100.000 MVArh Pulse quantity for reac-
tive reverse accumu-
lated energy value
800
(MMTR) Metering
Table 453: Advanced general settings for the ETPMMTR (ETP1-) function
EALim 0.001 - 0.001 1000000.000 MWh Active energy limit
10000000000.000
ERLim 0.001 - 0.001 1000.000 MVArh Reactive energy limit
10000000000.000
DirEnergyAct Forward - Forward - Direction of active energy
Reverse flow Forward/Reverse
DirEnergyReac Forward - Forward - Direction of reactive
Reverse energy flow For-
ward/Reverse
EnZeroClamp Off - On - Enable of zero point
On clamping detection func-
tion
LevZeroClampP 0.001 - 10000.000 0.001 10.000 MW Zero point clamping level
at active Power
LevZeroClampQ 0.001 - 10000.000 0.001 10.000 MVAr Zero point clamping level
at reactive Power
EAFPrestVal 0.000 - 10000.000 0.001 0.000 MWh Preset Initial value for for-
ward active energy
EARPrestVal 0.000 - 10000.000 0.001 0.000 MWh Preset Initial value for
reverse active energy
ERFPresetVal 0.000 - 10000.000 0.001 0.000 MVArh Preset Initial value for for-
ward reactive energy
ERVPresetVal 0.000 - 10000.000 0.001 0.000 MVArh Preset Initial value for
reverse reactive energy
801
(MMTR) Metering
802
Station communication
Chapter 16 Station
communication
About this chapter

This chapter describes the functions and protocols used on the interfaces to the substation auto-
mation and substation monitoring buses. The way these work, their setting parameters, function
blocks, input and output signals and technical data are included for each function.
803
Overview Chapter 16
1 Overview
Each IED is provided with a communication interface, enabling it to connect to one or many sub-
station level systems or equipment, either on the Substation Automation (SA) bus or Substation
Monitoring (SM) bus.
Following communication protocols are available:
• IEC 61850-8-1 communication protocol

• LON communication protocol
• SPA or IEC 60870-5-103 communication protocol
• DNP3.0 communication protocol
Theoretically, several protocols can be combined in the same IED.
804
IEC 61850-8-1 communication protocol Chapter 16
2 IEC 61850-8-1 communication protocol
2.1 Introduction
Single or double optical Ethernet ports for the new substation communication standard
IEC61850-8-1 for the station bus are provided. IEC61850-8-1 allows intelligent devices (IEDs)
from different vendors to exchange information and simplifies SA engineering. Peer- to peer
communication according to GOOSE is part of the standard. Disturbance files uploading is pro-
vided.
2.2 Generic single point function block (SPGGIO)

2.2.1 Introduction
The SPGGIO function block is used to send one single logical signal to other systems or equip-
ment in the substation.

Upon receiving a signal at its input, the SPGGIO function block will send the signal over IEC
61850-8-1 to the equipment or system that requests this signal. To be able to get the signal, one
must use other tools, described in the Application Manual, Chapter 2: “Engineering of the IED”
and define which function block in which equipment or system should receive this information.
SP01-
SPGGIO
BLOCK
IN
NAME
en07000124.vsd
Figure 381: SP function block
805
MP01-
SP16GGIO
BLOCK NAMEOR
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
IN11
IN12
IN13
IN14
IN15
IN16
NAME1
NAME2
NAME3
NAME4
NAME5
NAME6
NAME7
NAME8
NAME9
NAME10
NAME11
NAME12
NAME13
NAME14
NAME15
NAME16
en07000125.vsd
Figure 382: MP function block

Table 454: Input signals for the SPGGIO (SP01-) function block
Signal Description
IN Input status

2.3 Generic double point function block (DPGGIO)

2.3.1 Introduction
The DPGGIO function block is used to send three logical signals to other systems or equipment
in the substation. It is especially conceived to be used in the interlocking and reservation sta-
tion-wide logics.
806

Upon receiving the input signals, the DPGGIO function block will send the signals over IEC
61850-8-1 to the equipment or system that requests these signals. To be able to get the signals,
one must use other tools, described in the Application Manual, Chapter 2: “Engineering of the
IED” and define which function block in which equipment or system should receive this infor-
mation.
DP01-
DPGGIO
OPEN
CLOSE
VALID
en05000771.vsd
Figure 383: DP function block

Table 455: Input signals for the DPGGIO (DP01-) function block
Signal Description
OPEN Open indication
CLOSE Close indication
VALID Valid indication

2.4 Generic measured values function block (MVGGIO)

2.4.1 Introduction
The MVGGIO function block is used to send the instantaneous value of an analog output to other
systems or equipment in the substation. It can also be used inside the same IED, to attach a
“RANGE” aspect to an analog value and to permit measurement supervision on that value.

Upon receiving an analog signal at its input, the MVGGIO block will give the instantaneous val-
ue of the signal and the range, as output values. In the same time, it will send over IEC61850-8-1
the value and the deadband, to other equipment or systems in the substation.
807
MV01-
MVGGIO
IN VALUE
RANGE
en05000408.vsd
Figure 384: MV function block

Table 456: Input signals for the MVGGIO (MV01-) function block
Signal Description
IN Analogue input value
Table 457: Output signals for the MVGGIO (MV01-) function block
Signal Description
VALUE Magnitude of deadband value
RANGE Range

Table 458: Basic general settings for the MVGGIO (MV01-) function
MV db 1 - 300 1 10 Type Cycl: Report interval (s),
In %s
MV zeroDb 0 - 100000 1 500 m% Zero point clamping in
0,001% of range
MV hhLim -10000000000.000 0.001 90.000 - High High limit
-
10000000000.000
MV hLim -10000000000.000 0.001 80.000 - High limit
-
10000000000.000
MV lLim -10000000000.000 0.001 -80.000 - Low limit
-
10000000000.000
808

MV llLim -10000000000.000 0.001 -90.000 - Low Low limit
-
10000000000.000
MV min -10000000000.000 0.001 -100.000 - Minimum value
-
10000000000.000
MV max -10000000000.000 0.001 100.000 - Maximum value
-
10000000000.000
MV dbType Cyclic - Dead band - Reporting type
Dead band
Int deadband
MV limHys 0.000 - 100.000 0.001 5.000 % Hysteresis value in % of
limits)

Table 459: Basic general settings for the IEC61850-8-1 (IEC1-) function
ON
GOOSE Front - OEM311_AB - Port for GOOSE commu-
OEM311_AB nication
OEM311_CD
2.6 Technical data

Table 460: IEC 61850-8-1 communication protocol
Function Value
Protocol IEC 61850-8-1
Communication speed for the IEDs 100BASE-FX
809
LON communication protocol Chapter 16
3 LON communication protocol
3.1 Introduction
An optical network can be used within the Substation Automation system. This enables commu-
nication with the IED through the LON bus from the operator’s workplace, from the control cen-
ter and also from other terminals.
The LON protocol is specified in LonTalkProtocol Specification Version 3 from Echelon Cor-
poration and is designed for communication in control networks. These networks are character-
ized by high speed for data transfer, short messages (few bytes), peer-to-peer communication,
multiple communication media, low maintenance, multivendor equipment, and low support
costs. LonTalk supports the needs of applications that cover a range of requirements. The pro-
tocol follows the reference model for open system interconnection (OSI) designed by the Inter-
national Standardization Organization (ISO).
In this document the most common addresses for commands and events are available. Other ad-
dresses can be found in a separate document, refer to section 1.5 "Related documents".
It is assumed that the reader is familiar with the LON communication protocol in general.

The speed of the network depends on the medium and transceiver design. With protection and
control devices, fiber optic media is used, which enables the use of the maximum speed of 1.25
Mbits/s. The protocol is a peer-to-peer protocol where all the devices connected to the network
can communicate with each other. The own subnet and node number are identifying the nodes
(max. 255 subnets, 127 nodes per one subnet).
The LON bus links the different parts of the protection and control system. The measured values,
status information, and event information are spontaneously sent to the higher-level devices.
The higher-level devices can read and write memorized values, setting values, and other param-
eter data when required. The LON bus also enables the bay level devices to communicate with
each other to deliver, for example, interlocking information among the terminals without the
need of a bus master.
The LonTalk protocol supports two types of application layer objects: network variables and ex-
plicit messages. Network variables are used to deliver short messages, such as measuring values,
status information, and interlocking/blocking signals. Explicit messages are used to transfer
longer pieces of information, such as events and explicit read and write messages to access de-
vice data.
The benefits achieved from using the LON bus in protection and control systems include direct
communication among all terminals in the system and support for multi-master implementa-
tions. The LON bus also has an open concept, so that the terminals can communicate with ex-
ternal devices using the same standard of network variables.
Introduction of LON protocol

For more information see ‘LON bus, LonWorks Network in Protection and Control, User’s man-
ual and Technical description, 1MRS 750035-MTD EN’.
810
LON protocol
Configuration of LON
Lon Network Tool (LNT 505) is a multi-purpose tool for LonWorks network configuration. All
the functions required for setting up and configuring a LonWorks network is easily accessible
on a single tool program. For details see the “Operators manual”.
Activate LONCommunication
Activate LON communication in the PST Parameter Setting Tool under Settings -> General set-
tings – > Communication – > SLM configuration – > Rear optical LON, where ADE should be
set to ON.
Add LON Device Types LNT

A new device is added to LON Network Tool from the Device menu or by installing the device
from the ABB LON Device Types package for LNT 505, with the SLDT IED 670 package ver-
sion 1p2 r03.
LON net address

To be able to establish a LON connection with the 670IEDs, the IED has to be given a unique
net address. The net address consists of a subnet and node number. This is accomplished with
the LON Network Tool by creating one device for each IED.
Vertical communication
Vertical communication describes communication between the monitoring devices and protec-
tion and control IEDs. This communication includes sending of changed process data to moni-
toring devices as events and transfer of commands, parameter data and disturbance recorder
files. This communication is implemented using explicit messages.
Events and indications

Events sent to the monitoring devices are using explicit messages (message code 44H) with un-
acknowledged transport service of the LonTalk protocol. When a signal is changed in the
670IED, one message with the value, quality and time is transmitted from terminal.
Binary events
Binary events are generated in event function blocks EV01 to EV20 in the 670IEDs. The event
function blocks have predefined LON addresses. table 461 shows the LON addresses to the first
input on the event function blocks. The addresses to the other inputs on the event function block
are consecutive after the first input. For example, input 15 on event block EV17 has the address
1280 + 14 (15-1) = 1294.
For double indications only the first eight inputs 1–8 must be used. Inputs 9–16 can be used for
other type of events at the same event block.
As basic, 3 event function blocks EV01-EV03 running with a fast loop time (3 ms) is available
in the 670IEDS. The remaining event function blocks EV04-EV09 runs with a loop time on 8
ms and EV10-EV20 runs with a loop time on 100 ms. The event blocks are used to send binary
signals, integers, real time values like analogue data from measuring functions and mA input
modules as well as pulse counter signals.
16 pulse counter value function blocks PC01 to PC16 and 24 mA input service values function
blocks SMMI1_In1 to 6 – SMMI4_In1 to 6 are available in the 670IEDs.
811
The first LON address in every event function block is found in table 461
Table 461: LON adresses for Event functions

Function block First LON address in
function block
EV01 1024
EV02 1040
EV03 1056
EV04 1072
EV05 1088
EV06 1104
EV07 1120
EV08 1136
EV09 1152
EV10 1168
EV11 1184
EV12 1200
EV13 1216
EV14 1232
EV15 1248
EV16 1264
EV17 1280
EV18 1296
EV19 1312
EV20 1328
Event masks
The event mask for each input can be set individually from the Parameter Setting Tool (PST)
Under: Settings – > General Settings –> Monitoring –> Event function as.
• No events
• OnSet, at pick-up of the signal
• OnReset, at drop-out of the signal
• OnChange, at both pick-up and drop-out of the signal
• AutoDetect, event system itself make the reporting decision, (reporting criteria
for integers has no semantic, prefer to be set by the user)
The following type of signals from application functions can be connected to the event function
block.
812
Single indication
Directly connected binary IO signal via binary input function block (SMBI) is always reported
on change, no changed detection is done in the event function block. Other Boolean signals, for
example a start or a trip signal from a protection function is event masked in the event function
block.
Double indications
Double indications can only be reported via switch-control (SCSWI) functions, the event re-
porting is based on information from switch-control, no change detection is done in the event
function block.
Directly connected binary IO signal via binary input function block (SMBI) is not possible to
handle as double indication. Double indications can only be reported for the first 8 inputs on an
event function block.
• 00 generates an intermediate event with the read status 0

• 01 generates an open event with the read status 1
• 10 generates a close event with the read status 2
• 11 generates an undefined event with the read status 3
Analog value
All analog values are reported cyclic, the reporting interval is taken from the connected function
if there is a limit supervised signal, otherwise it is taken from the event function block.
813
Figure 385: Connection of protection signals for event handling.
Command handling
Commands are transferred using transparent SPA-bus messages. The transparent SPA-bus mes-
sage is an explicit LON message, which contains an ASCII character message following the cod-
ing rules of the SPA-bus protocol. The message is sent using explicit messages with message
code 41H and using acknowledged transport service.
Both the SPA-bus command messages (R or W) and the reply messages (D, A or N) are sent
using the same message code. It is mandatory that one device sends out only one SPA-bus mes-
sage at a time to one node and waits for the reply before sending the next message.
For commands from the operator workplace to the IED for apparatus control, i.e. the function
blocks type SCSWI 1 to 32, SXCBR 1 to 18and SXSWI 1 to 28; the SPA addresses are accord-
ing to table 462
Horizontal communication
Network variables are used for communication between REx 5xx and 670IEDs. The supported
network variable type is SNVT_state (NV type 83). SNVT_state is used to communicate the
state of a set of 1 to 16 Boolean values.
814
The multiple command send function block (MTxx) is used to pack the information to one value.
This value is transmitted to the receiving node and presented for the application by a multiple
command function block (CMxx). At horizontal communication the input BOUND on the event
function block (MTxx) must be set to 1. There are 10 MT and 60 CM function blocks available.
The MT and CM function blocks are connected using Lon Network Tool (LNT 505). This tool
also defines the service and addressing on LON.
This is an overview description how to configure the network variables for 670IEDs.
Configuration of LON network variables

Configure the Network variables according to your application from the LON network Tool. For
more details see “LNT 505” in “Operators manual”. The following is an example of how to con-
figure network variables concerning e.g. interlocking between two 670IEDs.
LON
BAY E1 BAY E3 BAY E4

MT07 CM09 CM09
en05000718.vsd
Figure 386: Examples connections between MT and CM function blocks in three terminals.
The network variable connections are done from the NV Connection window. From LNT win-
dow select Connections -> NVConnections -> New
815
en05000719.vsd
Figure 387: The network variables window in LNT.
There are two ways of downloading NV connections. Either you use the drag-and-drop method
where you select all nodes in the device window, drag them to the Download area in the bottom
of the program window and drop them there. Or the traditional menu selection, Configuration
-> Download...
816
en05000720.vsd
Figure 388: The download configuration window in LNT.
Communication ports
The serial communication module (SLM) is used for SPA or IEC 60870-5-103 and LON com-
munication. This module is a mezzanine module, and can be placed on the Main Processing
Module (NUM). The serial communication module can have connectors for two plastic fiber ca-
bles (snap-in) or two glass fiber cables (ST, bayonet) or a combination of plastic and glass fiber.
Three different types are available depending on type of fiber. The incoming optical fiber is con-
nected to the RX receiver input, and the outgoing optical fiber to the TX transmitter output.
When the fiber optic cables are laid out, pay special attention to the instructions concerning the
handling, connection, etc. of the optical fibers. The module is identified with a number on the
label on the module.
Table 462: SPA addresses for commands from the operator workplace to the IED for ap-
paratus control
Name Function SPA Description
block address
BL_CMD SCSWI01 1 I 5115 SPA parameters for block command
817

block address
CANCEL SCSWI01 1 I 5107 SPA parameters for cancel command
818

block address
SELECTOpen=00, SCSWI01 1 I 5105 SPA parameters for select (Open/Close)
SELECTClose=01, command
SELOpen+ILO=10, Note: Send select command before operate
SELClose+ILO=11, command
SELOpen+SCO=20,
SELClose+SCO=21,
SELOpen+ILO+SCO=30,
SELClose+ILO+SCO=31
SELECTClose=01, etc. command
819

block address
820

block address
ExcOpen=00, SCSWI01 1 I 5106 SPA parameters for operate (Open/Close)
ExcClose=01, command
ExcOpen+ILO=10, Note: Send select command before operate
ExcClose+ILO=11, command
ExcOpen+SCO=20,
ExcClose+SCO=21,
ExcOpen+ILO+SCO=30,
ExcClose+ILO+SCO=31
ExcClose=01, etc. command
821

block address
Sub Value SXCBR01 2 I 7854 SPA parameter for position to be substituted
Note: Send the value before Enable
Sub Value SXCBR09 3I7 SPA parameter for position to be substituted
822

block address
Sub Value SXSWI01 3 I 196 SPA parameter for position to be substituted
Sub Enable SXCBR01 2 I 7855 SPA parameter for substitute enable com-
mand
Note: Send the Value before Enable
823

block address
mand
mand
mand
mand
mand
mand
mand
Sub Enable SXCBR09 3I8 SPA parameter for substitute enable com-
mand
mand
mand
mand
mand
mand
mand
mand
mand
mand
Sub Enable SXSWI01 3 I 197 SPA parameter for substitute enable com-
mand
mand
mand
mand
mand
824

block address
mand
mand
mand
mand
mand
Sub Enable SXSWI11 3I 379 SPA parameter for substitute enable com-
mand
mand
mand
mand
mand
mand
mand
mand
mand
mand
mand
mand
mand
mand
mand
mand
mand
825

block address
mand
Update Block SXCBR01 2 I 7853 SPA parameter for update block command
Update Block SXCBR09 3I6 SPA parameter for update block command
Update Block SXSWI01 3 I 198 SPA parameter for update block command
826

block address

Table 463: General settings for the NVLON (NV---) function
Operation Off - Off - Operation
On
Table 464: General settings for the LON (ADE1-) function

On
TimerClass Slow - Slow - Timer class
Normal
Fast
3.4 Technical data

Table 465: LON communication protocol
Function Value
Protocol LON
Communication speed 1.25 Mbit/s
827
SPA communication protocol Chapter 16
4 SPA communication protocol
4.1 Introduction
In this section the most common addresses for commands and events are available. Other ad-
dresses can be found in a separate document, refer to section 1.5 "Related documents".
It is assumed that the reader is familiar with the SPA communication protocol in general.

The SPA bus uses an asynchronous serial communications protocol (1 start bit, 7 data bits + even
parity, 1 stop bit) with data transfer rate up to 38400 bit/s. Recommended baud rate for each type
of terminal will be found in the “Technical reference manual”. Messages on the bus consist of
ASCII characters.
Introduction of SPA protocol

The basic construction of the protocol assumes that the slave has no self-initiated need to talk to
the master but the master is aware of the data contained in the slaves and, consequently, can re-
quest required data. In addition, the master can send data to the slave. Requesting by the master
can be performed either by sequenced polling (e.g. for event information) or only on demand.
The master requests slave information using request messages and sends information to the slave
in write messages. Furthermore, the master can send all slaves in common a broadcast message
containing time or other data. The inactive state of bus transmit and receive lines is a logical "1".
SPA protocol
The tables below specify the SPA addresses for reading data from and writing data to an
IED 670 with the SPA communication protocol implemented.
The SPA addresses for the mA input service values (MI03-MI16) are found in table466
Table 466: SPA addresses for the MIM (MI03-MI16) function

Function block SPA address
MI03-CH1 4-O-6508
MI03-CH2 4-O-6511
MI03-CH3 4-O-6512
MI03-CH4 4-O-6515
MI03-CH5 4-O-6516
MI03-CH6 4-O-6519
MI04-CH1 4-O-6527
MI04-CH2 4-O-6530
MI04-CH3 4-O-6531
MI04-CH4 4-O-6534
MI04-CH5 4-O-6535
MI04-CH6 4-O-6538
828

MI05-CH1 4-O-6546
MI05-CH2 4-O-6549
MI05-CH3 4-O-6550
MI05-CH4 4-O-6553
MI05-CH5 4-O-6554
MI05-CH6 4-O-6557
MI06-CH1 4-O-6565
MI06-CH2 4-O-6568
MI06-CH3 4-O-6569
MI06-CH4 4-O-6572
MI06-CH5 4-O-6573
MI06-CH6 4-O-6576
MI07-CH1 4-O-6584
MI07-CH2 4-O-6587
MI07-CH3 4-O-6588
MI07-CH4 4-O-6591
MI07-CH5 4-O-6592
MI07-CH6 4-O-6595
MI08-CH1 4-O-6603
MI08-CH2 4-O-6606
MI08-CH3 4-O-6607
MI08-CH4 4-O-6610
MI08-CH5 4-O-6611
MI08-CH6 4-O-6614
MI09-CH1 4-O-6622
MI09-CH2 4-O-6625
MI09-CH3 4-O-6626
MI09-CH4 4-O-6629
MI09-CH5 4-O-6630
MI09-CH6 4-O-6633
MI10-CH1 4-O-6641
MI10-CH2 4-O-6644
MI10-CH3 4-O-6645
MI10-CH4 4-O-6648
MI10-CH5 4-O-6649
MI10-CH6 4-O-6652
MI11-CH1 4-O-6660
MI11-CH2 4-O-6663
MI11-CH3 4-O-6664
829

MI11-CH4 4-O-6667
MI11-CH5 4-O-6668
MI11-CH6 4-O-6671
MI12-CH1 4-O-6679
MI12-CH2 4-O-6682
MI12-CH3 4-O-6683
MI12-CH4 4-O-6686
MI12-CH5 4-O-6687
MI12-CH6 4-O-6690
MI13-CH1 4-O-6698
MI13-CH2 4-O-6701
MI13-CH3 4-O-6702
MI13-CH4 4-O-6705
MI13-CH5 4-O-6706
MI13-CH6 4-O-6709
MI14-CH1 4-O-6717
MI14-CH2 4-O-6720
MI14-CH3 4-O-6721
MI14-CH4 4-O-6724
MI14-CH5 4-O-6725
MI14-CH6 4-O-6728
MI15-CH1 4-O-6736
MI15-CH2 4-O-6739
MI15-CH3 4-O-6740
MI15-CH4 4-O-6743
MI15-CH5 4-O-6744
MI15-CH6 4-O-6747
MI16-CH1 4-O-6755
MI16-CH2 4-O-6758
MI16-CH3 4-O-6759
MI16-CH4 4-O-6762
MI16-CH5 4-O-6763
MI16-CH6 4-O-6766
The SPA addresses for the pulse counter values PC01 – PC16 are found in table 467
830
Table 467: SPA addresses for the PCGGIO (PC01-PC16 function)

Function block SPA address CNT_VAL SPA address NEW_VAL
PC01 3-O-5834 3-O-5833
PC02 3-O-5840 3-O-5839
PC03 3-O-5846 3-O-5845
PC04 3-O-5852 3-O-5851
PC05 3-O-5858 3-O-5857
PC06 3-O-5864 3-O-5863
PC07 3-O-5870 3-O-5869
PC08 3-O-5876 3-O-5875
PC09 3-O-5882 3-O-5881
PC10 3-O-5888 3-O-5887
PC11 3-O-5894 3-O-5893
PC12 3-O-5900 3-O-5899
PC13 3-O-5906 3-O-5905
PC14 3-O-5912 3-O-5911
PC15 3-O-5918 3-O-5917
PC16 3-O-5924 3-O-5923
I/O modules
To read binary inputs, the SPA-addresses for the outputs of the I/O-module function block are
used, i.e. the addresses for BI1 – BI16. The SPA addresses are found in a separate document,
refer to section 1.5 "Related documents".
Single command function

The IEDs may be provided with a function to receive signals either from a substation automation
system or from the local human-machine interface, HMI. That receiving function block has 16
outputs that can be used, for example, to control high voltage apparatuses in switchyards. For
local control functions, the local HMI can also be used.
The single command function consists of three function blocks; CD01 – CD03 for 16 binary out-
put signals each.
The signals can be individually controlled from the operator station, remote-control gateway, or
from the local HMI on the IED. The SPA addresses for the single command function (CD) are
shown in Table 3. For the single command function block, CD01 to CD03, the address is for the
first output. The other outputs follow consecutively after the first one. For example, output 7 on
the CD02 function block has the 5O533 address.
The SPA addresses for the single command functions CD01 – CD03 are found in table 468
831
Table 468: SPA addresses for the SingleCmd (CD01-CD03) function

Function block SPA address CMD Input SPA address CMD output
CD01-Cmd1 4-S-4639 5-O-511
CD01-Cmd2 4-S-4640 5-O-512
CD01-Cmd3 4-S-4641 5-O-513
CD01-Cmd4 4-S-4642 5-O-514
CD01-Cmd5 4-S-4643 5-O-515
CD01-Cmd6 4-S-4644 5-O-516
CD01-Cmd7 4-S-4645 5-O-517
CD01-Cmd8 4-S-4646 5-O-518
CD01-Cmd9 4-S-4647 5-O-519
CD01-Cmd10 4-S-4648 5-O-520
CD01-Cmd11 4-S-4649 5-O-521
CD01-Cmd12 4-S-4650 5-O-522
CD01-Cmdt13 4-S-4651 5-O-523
CD01-Cmd14 4-S-4652 5-O-524
CD01-Cmd15 4-S-4653 5-O-525
CD01-Cmd16 4-S-4654 5-O-526
CD02-Cmd1 4-S-4672 5-O-527
CD02-Cmd2 4-S-4673 5-O-528
CD02-Cmdt3 4-S-4674 5-O-529
CD02-Cmd4 4-S-4675 5-O-530
CD02-Cmd5 4-S-4676 5-O-531
CD02-Cmd6 4-S-4677 5-O-532
CD02-Cmd7 4-S-4678 5-O-533
CD02-Cmd8 4-S-4679 5-O-534
CD02-Cmd9 4-S-4680 5-O-535
CD02-Cmd10 4-S-4681 5-O-536
CD02-Cmd11 4-S-4682 5-O-537
CD02-Cmd12 4-S-4683 5-O-538
CD02-Cmd13 4-S-4684 5-O-539
CD02-Cmd14 4-S-4685 5-O-540
CD02-Cmd15 4-S-4686 5-O-541
CD02-Cmd16 4-S-4687 5-O-542
CD03-Cmd1 4-S-4705 5-O-543
CD03-Cmd2 4-S-4706 5-O-544
CD03-Cmd3 4-S-4707 5-O-545
CD03-Cmd4 4-S-4708 5-O-546
CD03-Cmd5 4-S-4709 5-O-547
CD03-Cmd6 4-S-4710 5-O-548
832
Function block SPA address CMD Input SPA address CMD output
CD03-Cmd7 4-S-4711 5-O-549
CD03-Cmd8 4-S-4712 5-O-550
CD03-Cmd9 4-S-4713 5-O-551
CD03-Cmd10 4-S-4714 5-O-552
CD03-Cmd11 4-S-4715 5-O-553
CD03-Cmd12 4-S-4716 5-O-554
CD03-Cmd13 4-S-4717 5-O-555
CD03-Cmd14 4-S-4718 5-O-556
CD03-Cmd15 4-S-4719 5-O-557
CD03-Cmd16 4-S-4720 5-O-558
Table 468 SPA addresses for the signals on the single command functions
Figure 390 shows an application example of how the user can, in a simplified way, connect the
command function via the configuration logic circuit in a protection terminal for control of a cir-
cuit breaker.
A pulse via the binary outputs of the terminal normally performs this type of command control.
The SPA addresses to control the outputs OUT1 – OUT16 in CD01 are shown in table 468
Figure 389: Application example showing a simplified logic diagram for control of a circuit
breaker.
The MODE input defines if the output signals from CD01 shall be off, steady or pulsed signals.
This is set in Parameter Setting Tool (PST) under: Setting – > General Settings – > Control – >
Commands – > Single Command.
833
Event function
This event function is intended to send time-tagged events to the station level (e.g. operator
workplace) over the station bus. The events are there presented in an event list. The events can
be created from both internal logical signals and binary input channels. All must The internal
signals are time tagged in the main processing module, while the binary input channels are time
tagged directly on each I/O module. The events are produced according to the set event masks.
The event masks are treated commonly for both the LON and SPA channels. All events accord-
ing to the event mask are stored in a buffer, which contains up to 1000 events. If new events
appear before the oldest event in the buffer is read, the oldest event is overwritten and an over-
flow alarm appears.
Two special signals for event registration purposes are available in the terminal, Terminal Re-
started (0E50) and Event buffer overflow (0E51).
The input parameters can be set individually from the Parameter Setting Tool (PST) under: Set-
ting –> General Setting – > Monitoring – > Event Function as.
• No events
The Status and event codes for the Event functions are found in table 469
834
Table 469: Status and event codes

Single indication1) Double indication
Event block Status Set event Reset Interme- Closed Open Undefined
event diate 00 10 01 11
EV01
Input 1 22O1 22E33 22E32 22E0 22E1 22E2 22E3
Input 2 22O2 22E35 22E34 22E4 22E5 22E6 22E7
Input 3 22O3 22E37 22E36 22E8 22E9 22E10 22E11
Input 4 22O4 22E39 22E38 22E12 22E13 22E14 22E15
Input 5 22O5 22E41 22E40 22E16 22E17 22E18 22E19
Input 6 22O6 22E43 22E42 22E20 22E21 22E22 22E23
Input 7 22O7 22E45 22E44 22E24 22E25 22E26 22E27
Input 8 22O8 22E47 22E46 22E28 22E29 22E30 22E31
Input 9 22O9 22E49 22E48 - - - -
Input 10 22O10 22E51 22E50 - - - -
Input 11 22O11 22E53 22E52 - - - -
Input 12 22O12 22E55 22E54 - - - -
Input 13 22O13 22E57 22E56 - - - -
Input 14 22O14 22E59 22E58 - - - -
Input 15 22O15 22E61 22E60 - - - -
Input 16 22O16 22E63 22E62 - - - -
EV02 230.. 23E.. 23E.. 23E.. 23E.. 23E.. 23E..

EV03 240.. 24E.. 24E.. 24E.. 23E.. 24E.. 24E..
- - - - - - - -
- - - - - - - -
- - - - - - - -
EV20 410.. 41E.. 41E.. 41E.. 41E.. 41E.. 41E..
1) These values are only applicable if the Event mask is masked ≠ OFF.
Connection of signals as events

Signals coming from different protection and control functions and shall be sent as events to the
station level over the SPA-bus (or LON-bus) are connected to the Event function block accord-
ing to figure 391
835
Figure 390: Connection of protection signals for event handling.
Note that corresponding Event mask must be set to an applicable value via the Parameter Setting
Tool (PST), under: Settings – > General Settings – > Monitoring – > Event Function as.
• No events
4.2.1 Communication ports

munication. This module is a mezzanine module, and can be placed on the Analog/Digital con-
version module (ADM). The serial communication module can have connectors for two plastic
fiber cables (snap-in) or two glass fiber cables (ST, bayonet) or a combination of plastic and
glass fiber. Three different types are available depending on type of fiber.
836
The incoming optical fiber is connected to the RX receiver input, and the outgoing optical fiber
to the TX transmitter output. When the fiber optic cables are laid out, pay special attention to the
instructions concerning the handling, connection, etc. of the optical fibers. The module is iden-
tified with a number on the label on the module.
The procedure to set the transfer rate and slave number can be found in the Installation and com-
missioning manual for respective IED.
4.3 Design
When communicating locally with a Personal Computer (PC) in the station, using the rear SPA
port, the only hardware needed for a station monitoring system is:
• Optical fibres
• Opto/electrical converter for the PC
• PC
When communicating remotely with a PC using the rear SPA port, the same hardware is needed
plus telephone modems.
The software needed in the PC, either local or remote, is PCM 600.
When communicating between the LHMI and a PC, the only hardware required is a front-con-
nection cable.

Table 470: General settings for the SPA (SPA1-) function
SlaveAddress 1 - 899 1 30 - Slave address
BaudRate 300 Bd - 9600 Bd - Baudrate on serial line
1200 Bd
4800 Bd
9600 Bd
19200 Bd
38400 Bd
57600 Bd
Table 471: General settings for the SPAviaSLM (SPA1-) function

1200 Bd
4800 Bd
9600 Bd
19200 Bd
38400 Bd
837
Table 472: General settings for the SPAviaLON (SPA4-) function

On
4.5 Technical data

Table 473: SPA communication protocol
Function Value
Protocol SPA
Communication speed 300, 1200, 2400, 4800, 9600, 19200 or 38400 Bd
Slave number 1 to 899
838
5 IEC 60870-5-103 communication protocol
5.1 Introduction
The IEC 60870-5-103 communication protocol is mainly used when a protection terminal com-
municates with a third party control or monitoring system. This system must have software that
can interpret the IEC 60870-5-103 communication messages.

5.2.1 General
The IEC 60870-5-103 is an unbalanced (master-slave) protocol for coded-bit serial communica-
tion exchanging information with a control system, and with a data transfer rate up to
38400 bit/s. In IEC terminology a primary station is a master and a secondary station is a slave.
The communication is based on a point-to-point principle. The master must have software that
can interpret the IEC 60870-5-103 communication messages.
Introduction of IEC 60870–5–103 protocol

The IEC 60870-5-103 protocol implementation in IED 670 consists of these functions:
• Event handling
• Report of analog service values (measurements)
• Fault location
• Command handling
- Autorecloser ON/OFF
- Teleprotection ON/OFF
- Protection ON/OFF
- LED reset
- Characteristics 1 - 4 (Setting groups)
• File transfer (disturbance files)
• Time synchronization
For detailed information about IEC 60870-5-103, refer to the IEC60870 standard part 5: Trans-
mission protocols, and to the section 103: Companion standard for the informative interface of
protection equipment.
IEC 60870-5-103
The tables in the following sections specify the information types supported by the IED 670
products with the communication protocol IEC 60870-5-103 implemented.
To support the information, corresponding functions must be included in the protection and con-
trol IED.
839
Commands in control direction
Terminal commands in control direction, I103IEDCMD

Command block in control direction with defined terminal signals.
Number of instances: 1
Command block use PARAMETER as FUNCTION TYPE.
INFORMATION NUMBER is defined for each output signals.
Info. no Message Supported

19 LED Reset Yes
23 Activate setting group 1 Yes
Function commands in control direction, pre-defined I103CMD

Function command block in control direction with defined output signals.
FUNCTION TYPE parameter for each block.
INFORMATION NUMBER is defined for each output signals.
Info. no. Message Supported

16 Auto-recloser on/off Yes
17 Teleprotection on/off Yes
18 Protection on/off Yes
Function commands in control direction, user-defined, I103UserCMD

Function command blocks in control direction with user-defined output signals.
FUNCTION TYPE parameter for each block in private range. Default values are defined in
private range 1 - 4. One for each instance.
INFORMATION NUMBER is required for each output signal. Default values are 1 - 8.
840

1 Output signal 01 Yes
Status
Terminal status indications in monitor direction, I103IED

Indication block for status in monitor direction with defined terminal functions.
Indication block use PARAMETER as FUNCTION TYPE.
INFORMATION NUMBER is defined for each input signals.

19 LED reset Yes
23 Setting group 1 active Yes
21 Test mode active Yes
Function status indications in monitor direction, user-defined, I103UserDef

Function indication blocks in monitor direction with user-defined input signals.
FUNCTION TYPE parameter for each block in private range. Default values are defined in pri-
vate range 5 - 24. One for each instance.
INFORMATION NUMBER is required for each input signal. Default values are defined in
range 1 - 8
841

1 Input signal 01 Yes
Supervision indications in monitor direction, I103Superv

Indication block for supervision in monitor direction with defined functions.
INFORMATION NUMBER is defined for output signals.

32 Measurand supervision I Yes
33 Measurand supervision U Yes
37 I>>back-up operation Yes
38 VT fuse failure Yes
46 Group warning Yes
47 Group alarm Yes
Earth fault indications in monitor direction, I103EF

Indication block for earth fault in monitor direction with defined functions.
INFORMATION NUMBER is defined for each output signal.

51 Earth fault forward Yes
52 Earth fault reverse Yes
842
Fault indications in monitor direction, type 1, I103FltDis

Fault indication block for faults in monitor direction with defined functions.
The instance type is suitable for distance protection function.
INFORMATION NUMBER is defined for each input signal.

64 Start L1 Yes
65 Start L2 Yes
66 Start L3 Yes
67 Start IN Yes
84 General start Yes
69 Trip L1 Yes
70 Trip L2 Yes
71 Trip L3 Yes
68 General trip Yes
74 Fault forward/line Yes
75 Fault reverse/busbar Yes
78 Zone 1 Yes
79 Zone 2 Yes
80 Zone 3 Yes
81 Zone 4 Yes
82 Zone 5 Yes
76 Signal transmitted Yes
77 Signal received Yes
73 SCL, Fault location in ohm Yes
Fault indications in monitor direction, type 2, I103FltStd

Fault indication block for faults in monitor direction with defined functions.
The instance type is suitable for linediff, transformerdiff, overcurrent and earthfault protection
functions.
FUNCTION TYPE setting for each block.
INFORMATION NUMBER is defined for each input signal.
843

64 Start L1 Yes
65 Start L2 Yes
66 Start L3 Yes
67 Start IN Yes
84 General start Yes
69 Trip L1 Yes
70 Trip L2 Yes
71 Trip L3 Yes
68 General trip Yes
74 Fault forward/line Yes
75 Fault reverse/busbar Yes
85 Breaker failure Yes
86 Trip measuring system L1 Yes
89 Trip measuring system N Yes
90 Over current trip I> Yes
91 Over current trip I>> Yes
92 Earth fault trip IN> Yes
93 Earth fault trip IN>> Yes
Autorecloser indications in monitor direction, I103AR

Indication block for autorecloser in monitor direction with defined functions.
INFORMATION NUMBER is defined for each output signal.

16 Autorecloser active Yes
128 CB on by Autorecloser Yes
130 Autorecloser blocked Yes
Measurands
Function blocks in monitor direction for input measurands. Typically connected to monitoring
function, for example to power measurement CVMMXU.
844
Measurands in public range, I103Meas

The IED will report all valid measuring types depending on connected signals.
Upper limit for measured currents, active/reactive-power is 2.4 times rated value.
Upper limit for measured voltages and frequency is 1.2 times rated value.

148 IL1 Yes
144, 145, IL2 Yes
148
148 IL3 Yes
147 IN, Neutral current Yes
148 UL1 Yes
148 UL2 Yes
148 UL3 Yes
145, 146 UL1-UL2 Yes
147 UN, Neutral voltage Yes
146, 148 P, active power Yes
146, 148 Q, reactive power Yes
148 f, frequency Yes
Measurands in private range, I103MeasUsr

FUNCTION TYPE parameter for each block in private range. Default values are defined in pri-
vate range 25 – 27. One for each instance.
INFORMATION NUMBER parameter for each block. Default value 1.

- Meas1 Yes
- Meas2 Yes
- Meas3 Yes
- Meas4 Yes
- Meas5 Yes
- Meas6 Yes
- Meas7 Yes
- Meas8 Yes
- Meas9 Yes
845
Disturbance recordings
The following elements are used in the ASDUs (Application Service Data Units) defined in the
standard.
Analog signals, 40-channels: the channel number for each channel has to be specified. Channels
used in the public range are 1 to 8 and with:
• IL1 connected to channel 1 on disturbance function block DRA1

• IN connected to channel 4 on disturbance function block DRA1
• VL1E connected to channel 5 on disturbance function block DRA1
• VEN connected to channel 8 on disturbance function block DRA1
Channel number used for the remaining 32 analog signals are numbers in the private range
64 to 95.
Binary signals, 96-channels: for each channel the user can specify a FUNCTION TYPE and an
INFORMATION NUMBER.
Disturbance Upload
All analog and binary signals that are recorded with disturbance recorder will be reported to the
master. The last eight disturbances that are recorded are available for transfer to the master. A
successfully transferred disturbance (acknowledged by the master) will not be reported to the
master again.
When a new disturbance is recorded by the IED a list of available recorded disturbances will be
sent to the master, an updated list of available disturbances will be sent whenever something has
happened to disturbances in this list. I.e. when a disturbance is deleted (by other client e.g. SPA)
or when a new disturbance has been recorded or when the master has uploaded a disturbance.
Deviations from the standard
Information sent in the disturbance upload is specified by the standard; however, some of the
information are adapted to information available in disturbance recorder in Rex67x.
This section describes all data that is not exactly as specified in the standard.
ASDU23
In ‘list of recorded disturbances’ (ASDU23) an information element named SOF (status of fault)
exists. This information element consists of 4 bits and indicates whether:
• Bit TP: the protection equipment has tripped during the fault
• Bit TM: the disturbance data are currently being transmitted
846
• Bit TEST: the disturbance data have been recorded during normal operation or
test mode.
• Bit OTEV: the disturbance data recording has been initiated by another event
than start/pick-up
The only information that is easily available is test-mode status. The other information is always
set (hard coded) to:
TP Recorded fault with trip. [1]

TM Disturbance data waiting for transmission [0]
OTEV Disturbance data initiated by other events [1]
Another information element in ASDU23 is the FAN (fault number). According to the standard
this is a number that is incremented when a protection function takes action. In Rex67x FAN is
equal to disturbance number, which is incremented for each disturbance.
ASDU26
When a disturbance has been selected by the master; (by sending ASDU24), the protection
equipment answers by sending ASDU26, which contains an information element named NOF
(number of grid faults). This number should indicate fault number in the power system, i.e. a
fault in the power system with several trip and auto-reclosing has the same NOF (while the FAN
should be incremented). NOF is in Rex67x, just as FAN, equal to disturbance number.
To get INF and FUN for the recorded binary signals there are parameters on the disturbance re-
corder for each input. The user must set these parameters to whatever he connects to the corre-
sponding input.
Interoperability, physical layer
Supported
Electrical Interface
EIA RS-485 No
number of loads No
Optical interface
glass fibre Yes
plastic fibre Yes
Transmission speed
96000 bit/s Yes
19200 bit/s Yes
847
Supported
Link Layer
DFC-bit used Yes
Connectors
connector F-SMA No
connector BFOC/2.5 Yes
Interoperability, application layer
Supported
Selection of standard ASDUs in monitoring direction
ASDU Yes
1 Time-tagged message Yes
2 Time-tagged message with rel. time Yes
3 Measurands I Yes
4 Time-tagged message with rel. time Yes
5 Identification Yes
6 Time synchronization Yes
8 End of general interrogation Yes
9 Measurands II Yes
10 Generic data No
11 Generic identification No
23 List of recorded disturbances Yes
26 Ready for transm. of disturbance data Yes
27 Ready for transm. of a channel Yes
28 Ready for transm of tags Yes
29 Transmission of tags Yes
30 Transmission fo disturbance data Yes
31 End of transmission Yes
Selection of standard ASDUs in control direction
ASDU Yes
6 Time synchronization Yes
7 General interrogation Yes
10 Generic data No
20 General command Yes
21 Generic command No
24 Order for disturbance data transmission Yes
25 Acknowledgement for distance data transmission Yes
Selection of basic application functions
848
Supported
Test mode No
Blocking of monitoring direction Yes
Disturbance data Yes
Private data Yes
Generic services No
5.2.2 Communication ports

munication. This module is a mezzanine module, and can be placed on the Analog/Digital con-
version module (ADM). The serial communication module can have connectors for two plastic
fiber cables (snap-in) or two glass fiber cables (ST, bayonet) or a combination of plastic and
glass fiber. Three different types are available depending on type of fiber.
The incoming optical fiber is connected to the RX receiver input, and the outgoing optical fiber
to the TX transmitter output. When the fiber optic cables are laid out, pay special attention to the
instructions concerning the handling, connection, etc. of the optical fibers. The module is iden-
tified with a number on the label on the module.
5.3 Function block
ICMA-
I103IEDCMD
BLOCK 19-LEDRS
23-GRP1
24-GRP2
25-GRP3
26-GRP4
en05000689.vsd
ICMD-
I103CMD
BLOCK 16-AR
17-DIFF
18-PROT
en05000684.vsd
ICM1-
I103UserCMD
BLOCK OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
OUTPUT5
OUTPUT6
OUTPUT7
OUTPUT8
en05000693.vsd
849
IEV1-
I103IED
BLOCK
19_LEDRS
23_GRP1
24_GRP2
25_GRP3
26_GRP4
21_TESTM
en05000688.vsd
IS01-
I103UsrDef
BLOCK
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
en05000694.vsd
ISU1-
I103Superv
BLOCK
32_MEASI
33_MEASU
37_IBKUP
38_VTFF
46_GRWA
47_GRAL
en05000692.vsd
ISEF-
I103EF
BLOCK
51_EFFW
52_EFREV
en05000685.vsd
850
IZ01-
I103FltDis
BLOCK
64_STL1
65_STL2
66_STL3
67_STIN
84_STGEN
69_TRL1
70_TRL2
71_TRL3
68_TRGEN
74_FW
75_REV
78_ZONE1
79_ZONE2
80_ZONE3
81_ZONE4
82_ZONE5
76_TRANS
77_RECEV
73_SCL
FLTLOC
ARINPROG
en05000686.vsd
IFL1-
I103FltStd
BLOCK
64_STL1
65_STL2
66_STL3
67_STIN
84_STGEN
69_TRL1
70_TRL2
71_TRL3
68_TRGEN
74_FW
75_REV
85_BFP
86_MTRL1
87_MTRL2
88_MTRL3
89_MTRN
90_IOC
91_IOC
92_IEF
93_IEF
ARINPROG
en05000687.vsd
IAR1-
I103AR
BLOCK
16_ARACT
128_CBON
130_UNSU
en05000683.vsd
851
IMM1-
I103Meas
BLOCK
IL1
IL2
IL3
IN
UL1
UL2
UL3
UL1L2
UN
P
Q
F
en05000690.vsd
IMU1-
I103MeasUsr
BLOCK
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
en05000691.vsd

Table 474: Input signals for the I103AR (IAR1-) function block
Signal Description
BLOCK Block of status reporting
16_ARACT Information number 16, auto-recloser active
128_CBON Information number 128, circuit breaker on by auto-recloser
130_UNSU Information number 130, unsuccessful reclosing
Table 475: Input signals for the I103IEDCMD (ICMA-) function block
Signal Description
BLOCK Block of commands
Table 476: Input signals for the I103CMD (ICMD-) function block
Signal Description
852
Table 477: Input signals for the I103IED (IEV1-) function block
Signal Description
19_LEDRS Information number 19, reset LEDs
23_GRP1 Information number 23, setting group 1 is active
21_TESTM Information number 21, test mode is active
Table 478: Input signals for the I103UserCMD (ICM1-) function block
Signal Description
Table 479: Input signals for the I103UsrDef (IS01-) function block
Signal Description
INPUT1 Binary signal Input 1
INPUT2 Binary signal input 2
Table 480: Input signals for the I103Superv (ISU1-) function block
Signal Description
32_MEASI Information number 32, measurand supervision of I
33_MEASU Information number 33, measurand supervision of U
37_IBKUP Information number 37, I high-high back-up protection
38_VTFF Information number 38, fuse failure VT
46_GRWA Information number 46, group warning
47_GRAL Information number 47, group alarm
853
Table 481: Input signals for the I103EF (ISEF-) function block
Signal Description
51_EFFW Information number 51, earth-fault forward
52_EFREV Information number 52, earth-fault reverse
Table 482: Input signals for the I103FltDis (IZ01-) function block
Signal Description
64_STL1 Information number 64, start phase L1
67_STIN Information number 67, start residual current IN
84_STGEN Information number 84, start general
69_TRL1 Information number 69, trip phase L1
68_TRGEN Information number 68, trip general
74_FW Information number 74, forward/line
75_REV Information number 75, reverse/bus
78_ZONE1 Information number 78, zone 1
76_TRANS Information number 76, signal transmitted
77_RECEV Information number 77, signal recevied
73_SCL Information number 73, fault location in ohm
FLTLOC Faultlocator faultlocation valid (LMBRFLO-CALCMADE)
ARINPROG Autorecloser in progress (SMBRREC- INPROGR)
Table 483: Input signals for the I103FltStd (IFL1-) function block
Signal Description
67_STIN Information number 67, start residual curent IN
854
Signal Description
84_STGEN Information number 84, start general
68_TRGEN Information number 68, trip general
74_FW Information number 74, forward/line
75_REV Information number 75, reverse/bus
85_BFP Information number 85, breaker failure
86_MTRL1 Information number 86, trip measuring system phase L1
89_MTRN Information number 89, trip measuring system neutral N
90_IOC Information number 90, over current trip, stage low
91_IOC Information number 91, over current trip, stage high
92_IEF Information number 92, earth-fault trip, stage low
93_IEF Information number 93, earth-fault trip, stage high
ARINPROG Autorecloser in progress (SMBRREC- INPROGR)
Table 484: Input signals for the I103MeasUsr (IMU1-) function block
Signal Description
BLOCK Block of service value reporting
INPUT1 Service value for measurement on input 1
855
Table 485: Input signals for the I103Meas (IMM1-) function block
Signal Description
BLOCK Block of service value reporting
IL1 Service value for current phase L1
IN Service value for residual current IN
UL1 Service value for voltage phase L1
UL1L2 Service value for voltage phase-phase L1-L2
UN Service value for residual voltage UN
P Service value for active power
Q Service value for reactive power
F Service value for system frequency
Table 486: Output signals for the I103IEDCMD (ICMA-) function block
Signal Description
19-LEDRS Information number 19, reset LEDs
23-GRP1 Information number 23, activate setting group 1
Table 487: Output signals for the I103CMD (ICMD-) function block
Signal Description
16-AR Information number 16, block of autorecloser
17-DIFF Information number 17, block of differential protection
18-PROT Information number 18, block of protection
Table 488: Output signals for the I103UserCMD (ICM1-) function block
Signal Description
OUTPUT1 Command output 1
856
Signal Description

Table 489: General settings for the I103SLM (IECC-) function
19200 Bd
RevPolarity Off - On - Invert polarity
On
CycMeasRepTime 1.0 - 3600.0 0.1 5.0 - Cyclic reporting time of
measurments
Table 490: General settings for the I103IEDCMD (ICMA-) function

FUNTYPE 1 - 255 1 255 FunT Function type (1-255)
Table 491: General settings for the I103CMD (ICMD-) function

Table 492: General settings for the I103IED (IEV1-) function

857
Table 493: General settings for the I103UserCMD (ICM1-) function

PULSEMOD 0-1 1 1 Mode Pulse mode 0=Steady,
1=Pulsed
T 0.200 - 60.000 0.001 0.400 s Pulse length
INFNO_1 1 - 255 1 1 InfNo Information number for
output 1 (1-255)
output 2 (1-255)
output 3 (1-255)
output 4 (1-255)
output 5 (1-255)
output 6 (1-255)
output 7 (1-255)
output 8 (1-255)
Table 494: General settings for the I103UsrDef (IS01-) function

binary input 1 (1-255)
858
Table 495: General settings for the I103Superv (ISU1-) function

Table 496: General settings for the I103EF (ISEF-) function

Table 497: General settings for the I103FltDis (IZ01-) function

Table 498: General settings for the I103FltStd (IFL1-) function

Table 499: General settings for the I103MeasUsr (IMU1-) function

INFNO 1 - 255 1 1 InfNo Information number for
measurands (1-255)
RatedMeasur1 0.05 - 0.05 1000.00 - Rated value for measure-
10000000000.00 ment on input 1
10000000000.00 ment on input 2
10000000000.00 ment on input 3
10000000000.00 ment on input 4
10000000000.00 ment on input 5
10000000000.00 ment on input 6
10000000000.00 ment on input 7
10000000000.00 ment on input 8
10000000000.00 ment on input 9
859
Table 500: Basic general settings for the I103Meas (IMM1-) function
RatedIL1 1 - 99999 1 3000 A Rated current phase L1
RatedIN 1 - 99999 1 3000 A Rated residual current IN
RatedUL1 0.05 - 2000.00 0.05 230.00 kV Rated voltage for phase
L1
L2
L3
RatedUL1-UL2 0.05 - 2000.00 0.05 400.00 kV Rated voltage for
phase-phase L1-L2
RatedUN 0.05 - 2000.00 0.05 230.00 kV Rated residual voltage
UN
RatedP 0.00 - 2000.00 0.05 1200.00 MW Rated value for active
power
RatedQ 0.00 - 2000.00 0.05 1200.00 MVA Rated value for reactive
power
RatedF 50.0 - 60.0 10.0 50.0 Hz Rated system frequency
5.6 Technical data

Table 501: IEC 60870-5-103 communication protocol
Function Value
Protocol IEC 60870-5-103
Communication speed 9600, 19200 Bd
860
Automation bits (AUBI) Chapter 16
6 Automation bits (AUBI)
6.1 Introduction
The AUBI function block (or the automation bits function block) is used within the CAP tool in
order to get into the configuration the commands coming through the DNP3.0 protocol. In this
respect, this function block plays the same role as the BinGOOSEReceive (for IEC61850) or
MultiCmdReceive (for LON).

The AUBI function block have 32 individual outputs which each can be mapped as a Binary
Output point in DNP. The output is operated by a "Object 12" in DNP. This object contains pa-
rameters for control-code, count, on-time and off-time. To operate a AUBI output point you send
a control-code of latch-On, latch-Off, pulse-On, pulse-Off, Trip or Close. The remaining param-
eters will be regarded were appropriate. ex: pulse-On, on-time=100, off-time=300, count=5
would give you 5 positive 100 ms pulses, 300 ms apart. There is a BLOCK inputs signal, which
will disable the operation of the function, in the same way the setting Operation: On/Off does.
That means that – upon activation of the BLOCK input, all 32 CMDBITxx outputs will be set
on 0. The BLOCK acts like an overriding, the function still receiving data from the DNP master.
Upon deactivation of BLOCK, all the 32 CMDBITxx outputs will be set by the DNP master
again, momentarily. For the AUBI, the PSTO input determines the operator place. The com-
mand can be written to the block while in “Remote”. If PSTO is in “Local” then no change is
applied to the outputs.
861
6.3 Function block
ABI1-
AutoBits
BLOCK CMDBIT1
PSTO CMDBIT2
NAME1 CMDBIT3
NAME2 CMDBIT4
NAME3 CMDBIT5
NAME4 CMDBIT6
NAME5 CMDBIT7
NAME6 CMDBIT8
NAME7 CMDBIT9
NAME8 CMDBIT10
NAME9 CMDBIT11
NAME10 CMDBIT12
NAME11 CMDBIT13
NAME12 CMDBIT14
NAME13 CMDBIT15
NAME14 CMDBIT16
NAME15 CMDBIT17
NAME16 CMDBIT18
NAME17 CMDBIT19
NAME18 CMDBIT20
NAME19 CMDBIT21
NAME20 CMDBIT22
NAME21 CMDBIT23
NAME22 CMDBIT24
NAME23 CMDBIT25
NAME24 CMDBIT26
NAME25 CMDBIT27
NAME26 CMDBIT28
NAME27 CMDBIT29
NAME28 CMDBIT30
NAME29 CMDBIT31
NAME30 CMDBIT32
NAME31
NAME32
en06000504.vsd
Figure 391: AUBI function block

Table 502: Input signals for the AutoBits (ABI1-) function block
Signal Description
862
Table 503: Output signals for the AutoBits (ABI1-) function block
Signal Description
CMDBIT1 Command out bit 1
863

Table 504: Basic general settings for the AutoBits (ABI1-) function
On
Table 505: Basic general settings for the DNP3 (DNP--) function
Operation Off - Off - Operation mode Off / On
ON
Table 506: Basic general settings for the DNP3Ch1RS485 (DNC1-) function
Operation Off - Off - Operation mode
Serial-Mode
BaudRate 300 Bd - 9600 Bd - Baud-rate for serial port
600 Bd
1200 Bd
2400 Bd
4800 Bd
9600 Bd
19200 Bd
WireMode Four-wire - Two-wire - RS485 wire mode
Two-wire
Table 507: Advanced general settings for the DNP3Ch1RS485 (DNC1-) function
DLinkConfirm Never - Never - Data-link confirm
Sometimes
Always
tDLinkTimeout 0.000 - 60.000 0.001 2.000 s Data-link confirm timeout
in s
DLinkRetries 0 - 255 1 3 - Data-link maximum
retries
tRxToTxMinDel 0.000 - 60.000 0.001 0.000 s Rx to Tx minimum delay
in s
DataBits 5-8 1 8 - Data bits
StopBits 1-2 1 1 - Stop bits
Parity No - Even - Parity
Even
Odd
864

RTSEnable No - No - RTS enable
Yes
tRTSWarmUp 0.000 - 60.000 0.001 0.000 s RTS warm-up in s
tRTSWarmDown 0.000 - 60.000 0.001 0.000 s RTS warm-down in s
tBackOffDelay 0.000 - 60.000 0.001 0.050 s RS485 back-off delay in s
tMaxRndDelBkOf 0.000 - 60.000 0.001 0.100 s RS485 maximum
back-off random delay in
s
Table 508: Basic general settings for the DNP3Ch2TCPIP (DNC2-) function
TCP/IP
UDP-Only
TCPIPLisPort 1 - 65535 1 20000 - TCP/IP listen port
UDPPortAccData 1 - 65535 1 20000 - UDP port to accept UDP
datagrams from master
UDPPortInitNUL 1 - 65535 1 20000 - UDP portfor initial NULL
response
UDPPortCliMast 0 - 65535 1 0 - UDP port to remote cli-
ent/master
TCP/IP
UDP-Only
UDPPortInitNUL 1 - 65535 1 20000 - UDP port for initial NULL
response
ent/master
865
TCP/IP
UDP-Only
response
ent/master
TCP/IP
UDP-Only
response
ent/master
Table 512: Basic general settings for the DNP3Mast1RS485 (DNM1-) function
ON
MasterAddres 0 - 65519 1 1 - Master address
Obj1DefVar 1:BISingleBit - 1:BISingleBit - Object 1, default variation
2:BIWithStatus
Obj2DefVar 1:BIChWithout- - 3:BIChWithRel- - Object 2, default variation
Time Time
2:BIChWithTime
3:BIChWithRel-
Time
Obj4DefVar 1:DIChWithout- - 3:DIChWithRel- - Object 4, default variation
Time Time
2:DIChWithTime
3:DIChWithRel-
Time
866

Obj10DefVar 1:BO - 2:BOStatus - Object 10, default varia-
2:BOStatus tion
Obj20DefVar 1:BinCnt32 - 5:BinCnt32WoutF - Object 20, default varia-
2:BinCnt16 tion
5:BinCnt32WoutF
6:BinCnt16WoutF
Obj22DefVar 1:BinCnt32EvWout - 1:BinCnt32EvWout - Object 22, default varia-
T T tion
2:BinCnt16EvWout
T
5:BinCnt32EvWith
T
6:BinCnt16EvWith
T
Obj30DefVar 1:AI32Int - 3:AI32IntWithoutF - Object 30, default varia-
2:AI16Int tion
3:AI32IntWithoutF
4:AI16IntWithoutF
5:AI32FltWithF
6:AI64FltWithF
Obj32DefVar 1:AI32IntEvWoutF - 1:AI32IntEvWoutF - Object 32, default varia-
2:AI16IntEvWoutF tion
3:AI32IntEvWithFT
4:AI16IntEvWithFT
5:AI32FltEvWithF
6:AI64FltEvWithF
7:AI32FltEvWithFT
8:AI64FltEvWithFT
Table 513: Advanced general settings for the DNP3Mast1RS485 (DNM1-) function
ValMasterAddr No - Yes - Validate source (master)
Yes address
AddrQueryEnbl No - Yes - Address query enable
Yes
tApplConfTout 0.00 - 60.00 0.01 10.00 s Application layer confim
timeout
ApplMultFrgRes No - Yes - Enable application for
Yes multiple fragment
response
ConfMultFrag No - Yes - Confirm each multiple
Yes fragment
UREnable No - Yes - Unsolicited response
Yes enabled
URSendOnline No - No - Unsolicited response
Yes sends when on-line
867

UREvClassMask Off - Off - Unsolicited response,
Class 1 event class mask
Class 2
Class 1 and 2
Class 3
Class 1 and 3
Class 2 and 3
Class 1, 2 and 3
UROfflineRetry 0 - 10 1 5 - Unsolicited response
retries before off-line
retry mode
tURRetryDelay 0.00 - 60.00 0.01 5.00 s Unsolicited response
retry delay in s
tUROfflRtryDel 0.00 - 60.00 0.01 30.00 s Unsolicited response
off-line retry delay in s
UREvCntThold1 1 - 100 1 5 - Unsolicited response
class 1 event count
report treshold
tUREvBufTout1 0.00 - 60.00 0.01 5.00 s Unsolicited response
class 1 event buffer time-
out
class 2 event count
report treshold
out
class 3 event count
report treshold
out
DelOldBufFull No - No - Delete oldest event when
Yes buffer is full
tSynchTimeout 1 - 3600 1 1800 s Time synch timeout
before error status is
generated
TSyncReqAfTout No - Yes - Time synchronization
Yes request after timeout
DNPToSetTime No - No - Allow DNP to set time in
Yes IED
Averag3TimeReq No - No - Use average of 3 time
Yes requests
PairedPoint No - Yes - Enable paired point
Yes
tSelectTimeout 1.0 - 60.0 0.1 30.0 s Select timeout
868
Table 514: Basic general settings for the DNP3Mast3TCPIP (DNM3-) function
ON
Yes address
MasterIP-Addr 0 - 18 1 0.0.0.0 - Master IP-address
MasterIPNetMsk 0 - 18 1 255.255.255.255 - Master IP net mask
2:BIWithStatus
Time Time
2:BIChWithTime
3:BIChWithRel-
Time
Time Time
2:DIChWithTime
3:DIChWithRel-
Time
869

2:BOStatus tion
2:BinCnt16 tion
5:BinCnt32WoutF
6:BinCnt16WoutF
T T tion
2:BinCnt16EvWout
T
5:BinCnt32EvWith
T
6:BinCnt16EvWith
T
2:AI16Int tion
3:AI32IntWithoutF
4:AI16IntWithoutF
5:AI32FltWithF
6:AI64FltWithF
3:AI32IntEvWithFT
4:AI16IntEvWithFT
5:AI32FltEvWithF
6:AI64FltEvWithF
7:AI32FltEvWithFT
8:AI64FltEvWithFT
Table 515: Advanced general settings for the DNP3Mast3TCPIP (DNM3-) function
Yes
timeout
response
Yes fragment
Yes enabled
870

Class 2
Class 1 and 2
Class 3
Class 1 and 3
Class 2 and 3
Class 1, 2 and 3
retry mode
retry delay in s
class 1 event count
report treshold
out
class 2 event count
report treshold
out
class 3 event count
report treshold
out
Yes buffer is full
generated
Yes IED
871

Yes requests
Yes
tBrokenConTout 0 - 3600 1 0 s Broken connection time-
out
tKeepAliveT 0 - 3600 1 10 s Keep-Alive timer
Table 516: Basic general settings for the DNP3Mast4TCPIP (DNM4-) function
ON
Yes address
MasterIP-Addr 0 - 18 1 0.0.0.0 - Master IP-address
MasterIPNetMsk 0 - 18 1 255.255.255.255 - Master IP net mask
2:BIWithStatus
Time Time
2:BIChWithTime
3:BIChWithRel-
Time
Time Time
2:DIChWithTime
3:DIChWithRel-
Time
872

2:BOStatus tion
2:BinCnt16 tion
5:BinCnt32WoutF
6:BinCnt16WoutF
T T tion
2:BinCnt16EvWout
T
5:BinCnt32EvWith
T
6:BinCnt16EvWith
T
2:AI16Int tion
3:AI32IntWithoutF
4:AI16IntWithoutF
5:AI32FltWithF
6:AI64FltWithF
3:AI32IntEvWithFT
4:AI16IntEvWithFT
5:AI32FltEvWithF
6:AI64FltEvWithF
7:AI32FltEvWithFT
8:AI64FltEvWithFT
Table 517: Advanced general settings for the DNP3Mast4TCPIP (DNM4-) function
Yes
timeout
response
Yes fragment
Yes enabled
873

Class 2
Class 1 and 2
Class 3
Class 1 and 3
Class 2 and 3
Class 1, 2 and 3
retry mode
retry delay in s
class 1 event count
report treshold
out
class 2 event count
report treshold
out
class 3 event count
report treshold
out
Yes buffer is full
generated
Yes IED
874

Yes requests
Yes
tBrokenConTout 0 - 3600 1 0 s Broken connection time-
out
tKeepAliveT 0 - 3600 1 10 s Keep-Alive timer
875
Single command, 16 signals (CD) Chapter 16
7 Single command, 16 signals (CD)
7.1 Introduction
The IEDs can receive commands either from a substation automation system or from the local
human-machine interface, LHMI. The command function block has outputs that can be used, for
example, to control high voltage apparatuses or for other user defined functionality.

The single command function consists of a function block CD for 16 binary output signals. The
outputs can be individually controlled from a substation automation system or from the local
HMI. Each output signal can be given a name with a maximum of 13 characters from the CAP
configuration tool.
The output signals can be of the types Off, Steady, or Pulse. This configuration setting is done
via the LHMI or PCM 600 and is common for the whole function block. The length of the output
pulses are 100 ms. In steady mode the function block has a memory to remember the output val-
ues at power interruption of the IED. Also a BLOCK input is available used to block the updat-
ing of the outputs.
The output signals, here OUT1 to OUT16, are then available for configuration to built-in func-
tions or via the configuration logic circuits to the binary outputs of the IED.
7.3 Function block
CD01-
SingleCmd
BLOCK OUT1
NAME1 OUT2
NAME2 OUT3
NAME3 OUT4
NAME4 OUT5
NAME5 OUT6
NAME6 OUT7
NAME7 OUT8
NAME8 OUT9
NAME9 OUT10
NAME10 OUT11
NAME11 OUT12
NAME12 OUT13
NAME13 OUT14
NAME14 OUT15
NAME15 OUT16
NAME16
en05000698.vsd
876
Single command, 16 signals (CD) Chapter 16

Table 518: Input signals for the SingleCmd (CD01-) function block
Signal Description
BLOCK Block single command function
Table 519: Output signals for the SingleCmd (CD01-) function block
Signal Description
OUT1 Single command output 1

Table 520: Basic general settings for the SingleCmd (CD01-) function
Mode Off - Off - Operation mode
Steady
Pulsed
877
Multiple command (CM) and Multiple transmit Chapter 16
(MT) Station communication
8 Multiple command (CM) and Multiple transmit (MT)
8.1 Introduction
The IED may be provided with a function to send and receive signals to and from other IEDs via
the interbay bus. The send and receive function blocks has 16 outputs/inputs that can be used,
together with the configuration logic circuits, for control purposes within the IED or via binary
outputs. When it is used to communicate with other IEDs, these IEDs have a corresponding Mul-
tiple transmit function block with 16 outputs to send the information received by the command
block.

Two multiple transmit function blocks MT01-MT02 and 8 slow multiple transmit function
blocks MT03-MT10 are available in IED 670.
Sixteen signals can be connected and they will then be sent to the multiple command block in
the other IED. The connections are set with the LON Network Tool (LNT).
Twelve multiple command function block CM12 with fast execution time and 48 multiple com-
mand function blocks CM13-CM60 with slower execution time are available in the IED 670s.
The multiple command function block has 16 outputs combined in one block, which can be con-
trolled from other IEDs.
The output signals, here OUT1 to OUT16, are then available for configuration to built-in func-
tions or via the configuration logic circuits to the binary outputs of the terminal.
The command function also has a supervision function, which sets the output VALID to 0 if the
block did not receive data within set maximum time.
8.3 Design
8.3.1 General
The output signals can be of the types Off, Steady, or Pulse. The setting is done on the MODE
settings, common for the whole block, from the PCM 600 setting tool.
• 0 = Off sets all outputs to 0, independent of the values sent from the station level,
that is, the operator station or remote-control gateway.
• 1 = Steady sets the outputs to a steady signal 0 or 1, depending on the values sent
from the station level.
• 2 = Pulse gives a pulse with one execution cycle duration, if a value sent from the
station level is changed from 0 to 1. That means that the configured logic con-
nected to the command function blocks may not have a cycle time longer than the
execution cycle time for the command function block.
878
8.4 Function block
CM01-
MultiCmd
BLOCK ERROR
NEWDATA
OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
OUTPUT5
OUTPUT6
OUTPUT7
OUTPUT8
OUTPUT9
OUTPUT10
OUTPUT11
OUTPUT12
OUTPUT13
OUTPUT14
OUTPUT15
OUTPUT16
VALID
en06000007.vsd
Figure 392: CM function block
MT01-
MultiTransm
BLOCK ERROR
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
en06000008.vsd
Figure 393: MT function block

Table 521: Input signals for the MultiCmd (CM01-) function block
Signal Description
879
Table 522: Input signals for the MultiTransm (MT01-) function block
Signal Description
INPUT1 Input 1
INPUT2 Input 2
INPUT3 Input 3
INPUT4 Input 4
INPUT5 Input 5
INPUT6 Input 6
INPUT7 Input 7
INPUT8 Input 8
INPUT9 Input 9
INPUT10 Input 10
INPUT11 Input 11
INPUT12 Input 12
INPUT13 Input 13
INPUT14 Input 14
INPUT15 Input 15
INPUT16 Input 16
Table 523: Output signals for the MultiCmd (CM01-) function block
Signal Description
ERROR MultiReceive error
NEWDATA New data is received
OUTPUT1 Output 1
OUTPUT2 Output 2
OUTPUT3 Output 3
OUTPUT4 Output 4
OUTPUT5 Output 5
OUTPUT6 Output 6
OUTPUT7 Output 7
OUTPUT8 Output 8
OUTPUT9 Output 9
OUTPUT10 Output 10
OUTPUT11 Output 11
OUTPUT12 Output 12
880
Signal Description
OUTPUT13 Output 13
OUTPUT14 Output 14
OUTPUT15 Output 15
OUTPUT16 Output 16
VALID Output data is valid
Table 524: Output signals for the MultiTransm (MT01-) function block
Signal Description
ERROR MultiSend error

Table 525: General settings for the MultiCmd (CM01-) function
tMaxCycleTime 0.050 - 200.000 0.001 11.000 s Maximum cycle time
between receptions of
input data
tMinCycleTime 0.000 - 200.000 0.001 0.000 s Minimum cycle time
between receptions of
input data
Mode Steady - Steady - Mode for output signals
Pulsed
tPulseTime 0.000 - 60.000 0.001 0.200 s Pulse length for multi
command outputs
Table 526: General settings for the MultiTransm (MT01-) function

tMaxCycleTime 0.000 - 200.000 0.001 5.000 s Maximum time interval
between transmission of
output data
tMinCycleTime 0.000 - 200.000 0.001 0.000 s Minimum time interval
between transmission of
output data
881
882
Remote communication
Chapter 17 Remote
communication
About this chapter

This chapter describes the Binary signal transfer function and associated hardware functionality.
The way the functions work, their setting parameters, function blocks, input and output signals,
and technical data are included for each function.
883
Binary signal transfer to remote end Chapter 17
1 Binary signal transfer to remote end
Function block name: BSR--, BST-- IEC 60617 graphical symbol:

ANSI number:
BSDGGIO
Function block name: BRx--;BTx-- IEC 60617 graphical symbol:

ANSI number:
IEC 61850 logical node name: BSTGGIO
1.1 Introduction
The remote end data communication is used either for the transmission of current values togeth-
er with maximum 8 binary signals in the line differential protection in RED670, or for transmis-
sion of only binary signals, up to 192 signals, in the other 600 series IEDs. The binary signals
are freely configurable and can thus be used for any purpose e.g. communication scheme related
signals, transfer trip and/or other binary signals between IEDs.
Communication between two IEDs requires that each IED is equipped with an LDCMs (Line
Data Communication Module). The LDCMs are then interfaces to a 64 kbit/s communication
channel for duplex communication between the IEDs.
Each IED can be equipped with up to four LDCMs, thus enabling communication with four re-
mote IEDs.

The communication is made on standard ITU (CCITT) PCM digital 64 kbit/s channels. It is a
two-way communication where telegrams are sent every 5 ms (same in 50 Hz and 60 Hz), ex-
changing information between two IEDs. The format used is C37.94 and one telegram consists
of start and stop flags, address, data to be transmitted, Cyclic Redundancy Check (CRC) and
Yellow bit (which is associated with C37.94).
Start Stop
Information CRC
flag flag
8 bits n x 16 bits 16 bits 8 bits

en01000134.vsd
Figure 394: Data message structure
884
The start and stop flags are the 0111 1110 sequence (7E hexadecimal), defined in the HDLC
standard. The CRC is designed according to the standard CRC16 definition. The optional ad-
dress field in the HDLC frame is not used instead a separate addressing is included in the data
field.
The address field is used for checking that the received message originates from the correct
equipment. There is always a risk that multiplexers occasionally mix the messages up. Each ter-
minal in the system is given a number. The terminal is then programmed to accept messages
from a specific terminal number. If the CRC function detects a faulty message, the message is
thrown away and not used in the evaluation.
When the communication is used for line differential purpose, the transmitted data consists of
three currents, clock information, trip-, block- and alarm-signals and eight binary signals which
can be used for any purpose. The three currents are represented as sampled values.
When the communication is used exclusively for binary signals, the full data capacity of the
communication channel is used for the binary signal purpose which gives the capacity of
192 signals.
1.3 Function block
Note!
The function blocks are not represented in CAP 531 configuration tool. The signals appear only
in the SMT tool when a LDCM is included in the configuration with the function selector tool.
In the SMT tool they can be mapped to the desired virtual input (SMBI) of the IED670 and used
internally in the configuration.
885
CRM1-
LDCMRecBinStat
COMFAIL
YBIT
NOCARR
NOMESS
ADDRERR
LNGTHERR
CRCERROR
TRDELERR
SYNCERR
REMCOMF
REMGPSER
SUBSTITU
LOWLEVEL
en07000043.vsd
CRM2-
LDCMRecBinStat
COMFAIL
YBIT
NOCARR
NOMESS
ADDRERR
LNGTHERR
CRCERROR
TRDELERR
SYNCERR
REMCOMF
REMGPSER
SUBSTITU
LOWLEVEL
en07000044.vsd
Figure 395: CRM function blocks
CRB1-
LDCMRecBinStat
COMFAIL
YBIT
NOCARR
NOMESS
ADDRERR
LNGT HERR
CRCERROR
REMCOMF
LOWLEVEL
en05000451.vsd
Figure 396: CRB function block
886

Table 527: Output signals for the LDCMRecBinStat (CRM1-) function block
Signal Description
COMFAIL Detected error in the differential communication
YBIT Detected error in remote end with incoming message
NOCARR No carrier is detected in the incoming message
NOMESS No start and stop flags identified for the incoming message
ADDRERR Incoming message from a wrong terminal
LNGTHERR Wrong length of the incoming message
CRCERROR Identified error by CRC check in incoming message
TRDELERR Transmission time is longer than permitted
SYNCERR Indicates when echo synchronication is used
REMCOMF Remote terminal indicates problem with received message
REMGPSER Remote terminal indicates problem with GPS synchronization
SUBSTITU Link error, values are substituted
LOWLEVEL Low signal level on the receive link
Table 528: Output signals for the LDCMRecBinStat (CRM2-) function block
Signal Description
TRDELERR Transmission time is longer than permitted
SYNCERR Indicates when echo synchronication is used
REMGPSER Remote terminal indicates problem with GPS synchronization
SUBSTITU Link error, values are substituted
887
Table 529: Output signals for the LDCMRecBinStat (CRB1-) function block
Signal Description

Table 530: Basic general settings for the LDCMRecBinStat (CRM1-) function
ChannelMode Off - ON - Channel mode of LDCM,
ON 0=OFF, 1=ON, 2=OutOf-
OutOfService Service
TerminalNo 0 - 255 1 0 - Terminal number used for

line differential communi-
cation
RemoteTermNo 0 - 255 1 0 - Terminal number on
remote terminal
DiffSync ECHO - ECHO - Diff Synchronization
GPS mode of LDCM,
0=ECHO, 1=GPS
GPSSyncErr Block - Block - Operation mode when
Echo GPS synchroniation sig-
nal is lost
CommSync Slave - Slave - Com Synchronization
Master mode of LDCM, 0=Slave,
1=Master
OptoPower LowPower - LowPower - Transmission power for
HighPower LDCM, 0=Low, 1=High
TransmCurr CT-GRP1 - CT-GRP1 - Summation mode for
CT-GRP2 transmitted current val-
CT-SUM ues
CT-DIFF1
CT-DIFF2
ComFailAlrmDel 5 - 500 5 10 ms Time delay before com-
munication error signal is
activated
888

ComFailResDel 5 - 500 5 10 ms Reset delay before com-
reset
RedChSwTime 5 - 500 5 5 ms Time delay before switch-
ing in redundant channel
RedChRturnTime 5 - 500 5 100 ms Time delay before switch-
ing back from redundant
channel
AsymDelay -20.00 - 20.00 0.01 0.00 ms Asymmetric delay when
communication use echo
synch.
MaxTransmDelay 0 - 40 1 20 ms Max allowed transmis-
sion delay
CompRange 0-10kA - 0-25kA - Compression range
0-25kA
0-50kA
0-150kA
MaxtDiffLevel 200 - 2000 1 600 us Maximum time diff for
ECHO back-up
DeadbandtDiff 200 - 1000 1 300 us Deadband for t Diff
InvertPolX21 Off - Off - Invert polarization for
ON X21 communication
Table 531: Basic general settings for the LDCMRecBinStat (CRM2-) function
ChannelMode Off - ON - Channel mode of LDCM,
ON 0=OFF, 1=ON, 2=OutOf-

cation
remote terminal
DiffSync ECHO - ECHO - Diff Synchronization
GPS mode of LDCM,
0=ECHO, 1=GPS
GPSSyncErr Block - Block - Operation mode when
Echo GPS synchroniation sig-
nal is lost
1=Master
889

TransmCurr CT-GRP1 - CT-GRP1 - Summation mode for
CT-GRP2 transmitted current val-
CT-SUM ues
CT-DIFF1
CT-DIFF2
RedundantChan-
nel
activated
reset
RedChSwTime 5 - 500 5 5 ms Time delay before switch-
ing in redundant channel
RedChRturnTime 5 - 500 5 100 ms Time delay before switch-
ing back from redundant
channel
AsymDelay -20.00 - 20.00 0.01 0.00 ms Asymmetric delay when
communication use echo
synch.
MaxTransmDelay 0 - 40 1 20 ms Max allowed transmis-
sion delay
CompRange 0-10kA - 0-25kA - Compression range
0-25kA
0-50kA
0-150kA
MaxtDiffLevel 200 - 2000 1 600 us Maximum time diff for
ECHO back-up
DeadbandtDiff 200 - 1000 1 300 us Deadband for t Diff
ON X21 communication
890
Table 532: Basic general settings for the LDCMRecBinStat (CRB1-) function
ChannelMode Off - On - Channel mode of LDCM,
On 0=OFF, 1=ON, 2=OutOf-

cation
remote terminal
1=Master
activated
reset
On X21 communication
891
892
Hardware
Chapter 18 Hardware
About this chapter

This chapter includes descriptions of the different hardware modules. It includes diagrams from
different elevations indicating the location of connection terminals and modules.
893
Overview Chapter 18
Hardware
1 Overview
1.1 Variants of case- and HMI display size
xx04000458.eps
Figure 397: 1/2 19” case with medium HMI display.
xx04000459.eps
Figure 398: 1/2 19” case with small HMI display.
894
Overview Chapter 18
Hardware
xx05000763.eps
895
Overview Chapter 18
Hardware
xx04000460.eps
xx04000461.eps
896
Overview Chapter 18
Hardware
1.2 Case from the rear side

Table 533: Designations for 1/2 x 19” casing with 1 TRM slot
Module Rear Positions

PSM X11
BIM, BOM, SOM or IOM X31 and X32 etc. to X51
and X52
BIM, BOM, SOM, IOM or X51, X52
GSM
SLM X301:A, B, C, D
IRIG-B 1) X302
OEM X311:A, B, C, D
RS485 or LDCM 2) 3) X312
LDCM 2) X313
TRM X401
1) IRIG-B installation, when included in seat P30:2

2) LDCM installation sequence: P31:2 or P31:3
3) RS485 installation, when included in seat P31:2
Note!
1 One LDCM can be included depending of availability of
IRIG-B respective RS485 modules.
897
Overview Chapter 18
Hardware

PSM X11
BIM, BOM, SOM, IOM or X31 and X32 etc. to X101 and
MIM X102
BIM, BOM, SOM, IOM, X101, X102
MIM or GSM
SLM X301:A, B, C, D
IRIG-B or LDCM 1) 2) X302
LDCM 2) X303
OEM X311:A, B, C, D
RS485 or LDCM 2) 3) X312
LDCM 2) X313
TRM X401

2) LDCM installation sequence: P31:2, P31:3, P30:2 and
P30:3
Note!
2-4 LDCM can be included depending of availability of IRIG-B
respective RS485 modules.
898
Overview Chapter 18
Hardware

PSM X11
BIM, BOM, SOM, IOM or X31 and X32 etc. to X71 and
MIM X72
BIM, BOM, SOM, IOM, X71, X72
MIM or GSM
SLM X301:A, B, C, D
IRIG-B or LDCM 1,2) X302
LDCM 2) X303
OEM X311:A, B, C, D
RS485 or LDCM 2) 3) X312
LDCM 2) X313
LDCM 2) X322
LDCM 2) X323
TRM 1 X401
TRM 2 X411

2) LDCM installation sequence: P31:2, P31:3, P32:2,
P32:3, P30:2 and P30:3
Note!
2-4 LDCM can be included depending of availability of
IRIG-B respective RS485 modules.
899
Overview Chapter 18
Hardware

PSM X11
BIM, BOM, SOM, X31 and X32 etc. to X161 and
IOM or MIM X162
BIM, BOM, SOM, X161, X162
IOM, MIM or GSM
SLM X301:A, B, C, D
IRIG-B or LDCM X302
1,2)
LDCM 2) X303
OEM X311:A, B, C, D
RS485 or LDCM 2) X312
3)
LDCM 2) X313
TRM X401

2) LDCM installation sequence: P31:2, P31:3,
P30:2 and P30:3
Note!
2-4 LDCM can be included depending of availability
of IRIG-B respective RS485 modules.
Table 537: Designations for 1/1 x 19” casing with 2 TRM slots
900
Overview Chapter 18
Hardware

PSM X11
BIM, BOM, SOM, X31 and X32 etc. to X131 and
IOM or MIM X132
BIM, BOM, SOM, X131, X132
IOM, MIM or GSM
SLM X301:A, B, C, D
IRIG-B or LDCM X302
1,2)
LDCM 2) X303
OEM X311:A, B, C, D
RS485 or LDCM 2) X312
3)
LDCM 2) X313
LDCM 2) X322
LDCM 2) X323
TRM 1 X401
TRM 2 X411

2) LDCM installation sequence: P31:2, P31:3,
P32:2, P32:3, P30:2 and P30:3
Note!
2-4 LDCM can be included depending of availability
of IRIG-B respective RS485 modules.
901
Hardware modules Chapter 18
Hardware
2 Hardware modules
2.1 Overview
Table 538: Basic modules, always included
Module Description
Combined backplane module (CBM) A backplane PCB that carries all internal signals
between modules in an IED. Only the TRM is not con-
nected directly to this board.
Universal backplane module (UBM) A backplane PCB that forms part of the IED backplane
with connectors for TRM, ADM etc.
Power supply module (PSM) Including a regulated DC/DC converter that supplies
auxiliary voltage to all static circuits.
• An internal fail alarm output is available.
Numerical module (NUM) Module for overall application control. All information is
processed or passed through this module, such as
configuration, settings and communication.
Local Human machine interface (LHMI) The module consists of LED:s, an LCD, a push button
keyboard and an ethernet connector used to connect a
PC to the IED.
Transformer input module (TRM) Transformer module that galvanically separates the
internal circuits from the VT and CT circuits. It has 12
analog inputs.
Analog digital conversion module (ADM) Slot mounted PCB with A/D conversion.
Table 539: Application specific modules

Module Description
Binary input module (BIM) Module with 16 optically isolated binary inputs
Binary output module (BOM) Module with 24 single outputs or 12 double-pole com-
mand outputs including supervision function
Binary I/O module (IOM) Module with 8 optically isolated binary inputs, 10 out-
puts and 2 fast signalling outputs.
Line data communication modules (LDCM) Modules used for digital communication to remote ter-
minal.
Serial SPA/LON/IEC 60870-5-103 communication Used for SPA/LON/IEC 60870–5–103 communication
modules (SLM)
Optical ethernet module (OEM) PMC board for IEC 61850 based communication.
mA input module (MIM) Analog input module with 6 independent, galvanically
separated channels.
GPS time synchronization module (GSM) Used to provide the IED with GPS time synchroniza-
tion.
902
Hardware
2.2 Combined backplane module (CBM)

2.2.1 Introduction
The combined backplane module (CBM) carries signals between modules in an IED.
2.2.2 Functionality
The Compact PCI makes 3.3V or 5V signaling in the backplane possible. The CBM backplane
and connected modules are 5V PCI-compatible.
Some pins on the Compact PCI connector are connected to the CAN bus, to be able to commu-
nicate with CAN based modules.
If a modules self test discovers an error it informs other modules using the Internal Fail signal
IRF.
2.2.3 Design
There are two basic versions of the CBM:
• with 3 Compact PCI connectors and a number of euro connectors depending on

the IED case size. One Compact PCI connector is used by NUM and two are used
by other PCI modules, for example two ADMs in IEDs with two TRMs. See fig-
ure 405
• with 2 Compact PCI connectors and a number of euro connectors depending on
the IED case size. One Compact PCI connector is used by NUM and one is used
by for example an ADM in IEDs with one TRM. See figure 404
Each PCI connector consists of 2 compact PCI receptacles. The euro connectors are connected
to the CAN bus and used for I/O modules and power supply.
903
Hardware
1 2
en05000516.vsd
Pos Description
1 CAN slots
2 CPCI slots
Figure 403: CBM for 1 TRM.
1 2
en05000755.vsd
Pos Description
1 CAN slots
2 CPCI slots
Figure 404: CBM for 2 TRM.
904
Hardware
en05000756.vsd
Pos Description
1 CBM
Figure 405: CBM position, rear view.
2.3 Universal backplane module (UBM)

2.3.1 Introduction
The Universal Backplane Module (UBM) is part of the IED backplane and is mounted above the
CBM. It connects the Transformer input module (TRM) to the Analog digital conversion mod-
ule (ADM) and the Numerical module (NUM).
2.3.2 Functionality
The Universal Backplane Module connects the CT and VT analog signals from the transformer
input module to the analog digital converter module. The Numerical processing module (NUM)
is also connected to the UBM. The ethernet contact on the front panel as well as the internal eth-
ernet contacts are connected to the UBM which provides the signal path to the NUM board.
2.3.3 Design
It connects the Transformer input module (TRM) to the Analog digital conversion module
(ADM) and the Numerical module (NUM).
The UBM exists in 2 versions.
• for IEDs with two TRM and two ADM. It has four 48 pin euro connectors and
one 96 pin euro connector, see figure 408
• for IEDs with one TRM and one ADM. It has two 48 pin euro connectors and one
96 pin euro connector, see figure 409.
905
Hardware
The 96 pin euro connector is used to connect the NUM board to the backplane. The 48 pin con-
nectors are used to connect the TRM and ADM.
TRM ADM
NUM
AD Data
X1 X2
X3 X4
RS485
X10 X10
Front Ethernet
LHMI connection
port
Ethernet X5
en05000489.vsd
Figure 406: UBM block diagram.
en05000757.vsd
Figure 407: UBM for 1 TRM.
906
Hardware
en05000758.vsd
Figure 408: UBM for 2 TRM.
en05000759.vsd
Pos Description
1 UBM
Figure 409: UBM position, rear view.
907
Hardware
2.4 Power supply module (PSM)

2.4.1 Introduction
The power supply module is used to provide the correct internal voltages and full isolation be-
tween the terminal and the battery system. An internal fail alarm output is available.
2.4.2 Design
There are two types of the power supply module. They are designed for different DC input volt-
age ranges see table 540. The power supply module contains a built-in, self-regulated DC/DC
converter that provides full isolation between the terminal and the external battery system.
Block diagram
Input connector
Power
Filter supply
Backplane connector
Supervision
99000516.vsd
Figure 410: PSM Block diagram.

Table 540: PSM - Power supply module
Quantity Rated value Nominal range
Auxiliary dc voltage, EL (input) EL = (24 - 60) V EL ± 20%
EL = (90 - 250) V EL ± 20%
Power consumption 50 W typically -
Auxiliary DC power in-rush < 5 A during 0.1 s -
908
Hardware
2.5 Numeric processing module (NUM)

2.5.1 Introduction
The Numeric processing module (NUM), is a CPU-module that handles all protection functions
and logic.
For communication with high speed modules, e.g. analog input modules and high speed serial
interfaces, the NUM is equipped with a Compact PCI bus. The NUM is the compact PCI system
card i.e. it controls bus mastering, clock distribution and receives interrupts.
2.5.2 Functionality
The NUM, Numeric processing module is a high performance, standard off-the-shelf com-
pact-PCI CPU module. It is 6U high and occupies one slot. Contact with the backplane is via
two compact PCI connectors and an euro connector.
The NUM has one PMC slot (32-bit IEEE P1386.1 compliant) and two PC-MIP slots onto which
mezzanine cards such as SLM or LDCM can be mounted.
To reduce bus loading of the compact PCI bus in the backplane the NUM has one internal PCI
bus for internal resources and the PMC/PC-MIP slots and external PCI accesses through the
backplane are buffered in a PCI/PCI bridge.
The application code and configuration data are stored in flash memory using a flash file system.
The NUM is equipped with a real time clock. It uses a capacitor for power backup of the real
time clock.
No forced cooling is used on this standard module because of the low power dissipation.
909
Hardware
2.5.3 Block diagram
Compact
Flash Logic
PMC
connector
PC-MIP
connector
UBM
Memory Ethernet
North
bridge
Backplane
connector
PCI-PCI-
bridge
CPU
en04000473.vsd
Figure 411: Numeric processing module block diagram
2.6 Local human-machine interface (LHMI)

Refer to Chapter 2 for information.
910
Hardware
2.7 Transformer input module (TRM)

2.7.1 Introduction
The transformer input module is used to galvanically separate and transform the secondary cur-
rents and voltages generated by the measuring transformers. The module has twelve inputs in
different combinations of currents and voltage inputs.
Alternative connectors of Ring lug or Compression type can be ordered.
2.7.2 Design
The transformer module has 12 input transformers. There are several versions of the module,
each with a different combination of voltage and current input transformers.
Basic versions:
• 6 current channels and 6 voltage channels

• 12 current channels
• 6 current channels
The rated values of the current inputs are selected at order.
The TRM is connected to the ADM and NUM via the UBM.
Configuration of the input and output signals, please refer to section 11.

Table 541: TRM - Energizing quantities, rated values and limits
Current Ir = 1 or 5 A (0.2-40) × Ir
Operative range (0-100) x Ir
Permissive overload 4 × Ir cont.
100 × Ir for 1 s *)
Burden < 150 mVA at Ir = 5 A
< 20 mVa at Ir = 1 A
Ac voltage Ur = 110 V 0.5–288 V
Operative range (0–340) V
Permissive overload 420 V cont.
450 V 10 s
Burden < 0.1 VA at 110 V
Frequency fr = 50/60 Hz ± 5%
*)
max. 350 A for 1 s when COMBITEST test switch is included.
911
Hardware
2.8 Analog digital conversion module,

with time synchronization (ADM)
2.8.1 Introduction
The Analog/Digital module has twelve analog inputs, 2 PC-MIP slots and 1 PMC slot. The
PC-MIP slot is used for PC-MIP cards and the PMC slot for PMC cards according to table 542.
The OEM card should always be mounted on the ADM board. The UBM connects the ADM to
the transformer input module (TRM).
Table 542: PC-MIP cards and PMC cards

PC-MIP cards PMC cards
LDCM SLM
LR-LDCM OEM 1 ch
MR-LDCM OEM 2 ch
X21-LDCM
IRIG-B
RS485
2.8.2 Design
The Analog digital conversion module input signals are voltage and current from the transformer
module. Shunts are used to adapt the current signals to the electronic voltage level. To gain dy-
namic range for the current inputs, two shunts with separate A\D channels are used for each in-
put current. In this way a 20 bit dynamic range is obtained with a 16 bit A\D converter.
Input signals are sampled with a sampling freqency of 5 kHz at 50 Hz system frequency and 6
kHz at 60 Hz system frequency.
The A\D converted signals goes through a filter with a cut off frequency of 500 Hz and are re-
ported to the numerical module (NUM) with 1 kHz at 50 Hz system frequency and 1,2 kHz at
60 Hz system frequency.
912
Hardware
Channel 1
AD1 Channel 2
Channel 3
Channel 4
AD2
Channel 5
1.2v Channel 6
AD3 Channel 7
Channel 8
Channel 9
AD4 Channel 10
Channel 11
Channel 12
PMC
level shift
PC-MIP
2.5v
PCI to PCI
PC-MIP
en05000474.vsd
Figure 412: The ADM layout
913
Hardware
2.9 Binary input module (BIM)

2.9.1 Introduction
The binary input module has 16 optically isolated inputs and is available in two versions, one
standard and one with enhanced pulse counting capabilities on the inputs to be used with the
pulse counter function. The binary inputs are freely programmable and can be used for the input
of logical signals to any of the functions. They can also be included in the disturbance recording
and event-recording functions. This enables extensive monitoring and evaluation of operation
of the IED and for all associated electrical circuits.
2.9.2 Design
The Binary input module contains 16 optical isolated binary inputs. The voltage level of the bi-
nary input is selected at order.
For configuration of the input signals, please refer to section 8.
A signal discriminator detects and blocks oscillating signals. When blocked, a hysteresis func-
tion may be set to release the input at a chosen frequency, making it possible to use the input for
pulse counting. The blocking frequency may also be set.
Figure 414 shows the operating characteristics of the binary inputs of the four voltage levels.
The standard version of binary inputs gives an improved capability to withstand disturbances
and should generally be used when pulse counting is not required.
914
Hardware
[V]
300
176
144
88
72
38
32
19
18
24/30V 48/60V 110/125V 220/250V
xx06000391.vsd
Guaranteed operation
Operation uncertain
No operation
Figure 413: Voltage dependence for the binary inputs
This binary input module communicates with the Numerical module (NUM) via the CAN-bus
on the backplane.
The design of all binary inputs enables the burn off of the oxide of the relay contact connected
to the input, despite the low, steady-state power consumption, which is shown in figure 415 and
416.
915
Hardware
[mA]
30
1
35 70 [ms]
en07000104.vsd
Figure 414: Approximate binary input inrush current for the standard version of BIM.
[mA]
30
1
3.5 7.0 [ms]
en07000105.vsd
Figure 415: Approximate binary input inrush current for the BIM version with enhanced pulse
counting capabilities.
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Hardware
Opto isolated input
Opto isolated input
Process connector
Opto isolated input
Opto isolated input
Opto isolated input
Opto isolated input
Opto isolated input

Micro-
Opto isolated input controller
Opto isolated input
Opto isolated input

Memory
Backplane connector
Opto isolated input
Process connector
Opto isolated input
Opto isolated input CAN
Opto isolated input
Opto isolated input
Opto isolated input
99000503.vsd
Figure 416: Block diagram of the Binary input module.
917
Hardware

Table 543: BIM - Binary input module
Binary inputs 16 -
DC voltage, RL 24/40 V RL ± 20%
48/60 V RL ± 20%
110/125 V RL ± 20%
220/250 V RL ± 20%
Power consumption
24/40 V max. 0.05 W/input -
48/60 V max. 0.1 W/input
110/125 V max. 0.2 W/input
220/250 V max. 0.4 W/input
Counter input frequency 10 pulses/s max -
Oscillating signal discriminator Blocking settable 1–40 Hz
Release settable 1–30 Hz
Table 544: BIM - Binary input module with enhanced pulse counting capabilities
Binary inputs 16 -
48/60 V RL ± 20%
110/125 V RL ± 20%
220/250 V RL ± 20%
Power consumption
24/40 V max. 0.05 W/input -
110/125 V max. 0.2 W/input
220/250 V max. 0.4 W/input
Counter input frequency 10 pulses/s max -
Balanced counter input frequency 40 pulses/s max -
Oscillating signal discriminator Blocking settable 1–40 Hz
Release settable 1–30 Hz
2.10 Binary output modules (BOM)

2.10.1 Introduction
The binary output module has 24 independent output relays and is used for trip output or any
signalling purpose.
918
Hardware
2.10.2 Design
The binary output module (BOM) has 24 software supervised output relays. Each pair of relays
have a common power source input to the contacts, see figure 418. This should be considered
when connecting the wiring to the connection terminal on the back of the IED.
The high closing and carrying current capability allows connection directly to breaker trip and
closing coils. If breaking capability is required to manage fail of the breaker auxiliary contacts
normally breaking the trip coil current, a parallel reinforcement is required.
For configuration of the output signals, please refer to section 9.
Output module
xx00000299.vsd
1 Output connection from relay 1

2 Output signal power source connection
3 Output connection from relay 2
Figure 417: Relay pair example
919
Hardware
Relay
Relay
Relay
Relay
Relay
Process connector Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Backplane connector
Process connector
Relay Micro-
controller
Relay
Relay
CAN
Relay
Relay Memory
Relay
Relay
99000505.vsd
Figure 418: Block diagram of the Binary Output Module
920
Hardware

Table 545: BOM - Binary output module contact data (reference standard: IEC 61810-2)
Function or quantity Trip and Signal relays
Binary outputs 24
Max system voltage 250 V AC, DC
Test voltage across open contact, 1 min 1000 V rms
Current carrying capacity
Continuous 8A
1s 10 A
Making capacity at inductive load with L/R>10 ms
0.2 s 30 A
1.0 s 10 A
Breaking capacity for AC, cos ϕ>0.4 250 V/8.0 A
Breaking capacity for DC with L/R < 40 ms 48 V/1 A
110 V/0.4 A
125 V/0.35 A
220 V/0.2 A
250 V/0.15 A
2.11 Static binary output module (SOM)

2.11.1 Introduction
The static binary output module has six fast static outputs and six change over output relays for
use in applications with high speed requirements.
2.11.2 Design
The Static output module (SOM) have 6 normally open (NO) static outputs and 6 electrome-
chanical relay outputs with change over contacts.
The SOM consists mainly of:
• An MCU
• A CAN-driver
• 6 static relays outputs
• 6 electromechanical relay outputs
• A DC/DC converter
• Connectors interfacing
- CAN-bus to backplane CBM
- IO-connectors to binary outputs (2 pcs.)
The following parts are supervised:
• Interruption in relay coil
921
Hardware
• Short circuit of relay coil

• Driver failure
Drive &
Read back
Drive &
Read back
Process connector
Drive &
Read back
Drive &
Read back
Drive & Code-

Read back flash
Drive &
Read back
MCU
CAN-
driver
Drive &
Read back
Drive &
Read back
Process connector
Backplane connector
DC/DC
Drive &
Read back
Internal_fail_n
Drive & AC_fail_n
Read back RCAN_ID
Sync
Drive &
Read back
Reset
Drive &
Read back
en07000115.vsd
Figure 419: Block diagram of the static output module
922
Hardware
Figure 420: Connection diagram of the static output module

Table 546: SOM - Static output module data (reference standard: IEC 61810-2)
Static binary outputs 6
Electromechanical relay outputs 6
Max system voltage 250 V AC, DC
Test voltage across open contact, 1 min 1000 V rms
Continuous 8A
1s 10 A
923
Hardware

Static binary outputs:
Making capacity at capacity load with the maximum capac-
itance of a closing circuit of 0.2 μF
0.2 s 30 A
1.0 s
10 A
Electromechanical relay outputs:
Making capacity of inductive load with L/R>10 ms
0.2 s 30 A
1.0 s 10 A
Breaking capacity for AC, cos ϕ>0.4 250 V/8.0 A
Breaking capacity for DC with L/R < 40 ms 48 V/1 A
110 V/0.4 A
125 V/0.35 A
220 V/0.2 A
250 V/0.15 A
Operating time, Static outputs <1 ms
2.12 Binary input/output module (IOM)

2.12.1 Introduction
The binary input/output module is used when only a few input and output channels are needed.
The ten standard output channels are used for trip output or any signalling purpose. The two high
speed signal output channels are used for applications where short operating time is essential.
Eight optically isolated binary inputs cater for required binary input information.
2.12.2 Design
The binary input/output module is available in two basic versions, one with unprotected contacts
and one with MOV (Metal Oxide Varistor) protected contacts.
Inputs are designed to allow oxide burn-off from connected contacts, and increase the distur-
bance immunity during normal protection operate times. This is achieved with a high peak in-
rush current while having a low steady-state current, see figure 415. Inputs are debounced by
software.
Well defined input high and input low voltages ensures normal operation at battery supply earth
faults, see figure 414.
The voltage level of the inputs is selected when ordering.
I/O events are time stamped locally on each module for minimum time deviance and stored by
the event recorder if present.
924
Hardware
The binary I/O module, IOM, has eight optically isolated inputs and ten output relays. One of
the outputs has a change-over contact. The nine remaining output contacts are connected in two
groups. One group has five contacts with a common and the other group has four contacts with
a common, to be used as single-output channels, see figure 422.
The binary I/O module also has two high speed output channels where a reed relay is connected
in parallel to the standard output relay.
For configuration of the input and output signals, please refer to section 8 "Signal matrix for bi-
nary inputs (SMBI)" and section 9 "Signal matrix for binary outputs (SMBO)".
Note!
The making capacity of the reed relays are limited.
925
Hardware
Figure 421: Binary in/out module (IOM), input contacts named XA corresponds to rear posi-
tion X31, X41, etc. and output contacts named XB to rear position X32, X42, etc.
IOM with MOV

The binary input/output module version with MOV protected contacts can for example be used
in applications where breaking high inductive load would cause excessive wear of the contacts.
Note!
The test voltage across open contact is lower for this version of the binary input/output module.
926
Hardware
xx04000069.vsd
Figure 422: IOM with MOV protection, relay example

Table 547: IOM - Binary input/output module
Binary inputs 8 -
48/60 V RL ± 20%
110/125 V RL ± 20%
220/250 V RL ± 20%
Power consumption -
110/125 V max. 0.2 W/input
220/250 V max. 0.4 W/input
Table 548: IOM - Binary input/output module

contact data (reference standard: IEC 61810-2)
Function or quantity Trip and signal relays Fast signal relays (parallel reed
relay)
Binary outputs 10 2
Max system voltage 250 V AC, DC 250 V AC, DC
Test voltage across open contact, 1000 V rms 800 V DC
1 min
927
Hardware
Function or quantity Trip and signal relays Fast signal relays (parallel reed
relay)
Continuous 8A 8A
1s 10 A 10 A
Making capacity at inductive load
with L/R>10 ms
0.2 s
30 A 0.4 A
1.0 s 10 A 0.4 A
Breaking capacity for AC, 250 V/8.0 A 250 V/8.0 A
cos ϕ > 0.4
Breaking capacity for DC with L/R 48 V/1 A 48 V/1 A
< 40 ms
110 V/0.4 A 110 V/0.4 A
125 V/0.35 A 125 V/0.35 A
220 V/0.2 A 220 V/0.2 A
250 V/0.15 A 250 V/0.15 A
Maximum capacitive load - 10 nF
Table 549: IOM with MOV - contact data (reference standard: IEC 60255-23)
Function or quantity Trip and Signal relays Fast signal relays (parallel reed
relay)
Binary outputs IOM: 10 IOM: 2
Max system voltage 250 V AC, DC 250 V AC, DC
Test voltage across open contact, 250 V rms 250 V DC
1 min
Continuous 8A 8A
1s 10 A 10 A
Making capacity at inductive load-
with L/R>10 ms
0.2 s
30 A 0.4 A
1.0 s 10 A 0.4 A
Breaking capacity for AC, cos 250 V/8.0 A 250 V/8.0 A
ϕ>0.4
Breaking capacity for DC with L/R 48 V/1 A 48 V/1 A
< 40 ms
110 V/0.4 A 110 V/0.4 A
220 V/0.2 A 220 V/0.2 A
250 V/0.15 A 250 V/0.15 A
Maximum capacitive load - 10 nF
928
Hardware
2.13 Line data communication module (LDCM)

2.13.1 Introduction
The line data communication module (LDCM) is used for communication between the IEDs sit-
uated at distances <150 km or from the IED to optical to electrical converter with G.703 inter-
face located on a distances <3 km away. The LDCM module sends and rereceives data, to and
from another LDCM module. The IEEE/ANSI standard format is used.
The line data communication module is used for binary signal transfer. The module has one op-
tical port with ST connectors see figure 424.
Alternatively there can be used a module with built-in X.21 converter.
The line data communication module is used for binary signal transfer. Each module has one
optical port, one for each remote end to which the IED communicates.
Alternative cards for Long range (1550 nm single mode), Medium range (1310 nm single mode)
and Short range (900 nm multi mode) are available.
Note!
Class 1 laser product. Take adequate measures to protect the eyes. Never look into the laser
beam.
2.13.2 Design
The LDCM is a PCMIP type II single width format module. The LDCM can be mounted on:
• the ADM
• the NUM
ID
ST
16.000
IO-connector
MHz
32,768
MHz
ST
en07000087.vsd
Figure 423: The SR-LDCM layout. PCMIP type II single width format with two PCI connectors
and one I/O ST type connector
929
Hardware
X1
C
ADN 2.5V
ID
2841
PCI9054
FPGA TQ176
DS DS
256 FBGA
3904 3904
MAX
3645
3
2
en06000393.vsd
Figure 424: The MR-LDCM and LR-LDCM layout. PCMIP type II single width format with
two PCI connectors and one I/O FC type connector

Table 550: Line data communication modules (LDCM)
Characteristic Range or value
Type of LDCM Short range (SR) Medium range Long range (LR)
(MR)
Type of fibre Graded-index mul- Singlemode 8/125 Singlemode 8/125
timode 62.5/125 μm μm
μm or 50/125 μm
Wave length 820 nm 1310 nm 1550 nm
Optical budget 20 dB (typical dis- 26 dB (typical dis-
tance 80 km *) tance 120 km *)
Graded-index multimode 62.5/125 μm, 11 dB (typical dis-
tance about 3 km
*)
7 dB (typical dis-
Graded-index multimode 50/125 μm tance about 2 km
*)
Optical connector Type ST Type FC Type FC
930
Hardware
Characteristic Range or value

Type of LDCM Short range (SR) Medium range Long range (LR)
(MR)
Protocol C37.94 C37.94 implemen- C37.94 implemen-
tation **) tation **)
Data transmission Synchronous Synchronous Synchronous
Transmission rate / Data rate 2 Mb/s / 64 kbit/s 2 Mb/s / 64 kbit/s 2 Mb/s / 64 kbit/s
Clock source Internal or derived Internal or derived Internal or derived
from received sig- from received sig- from received sig-
nal nal nal
*) depending on optical budget calculation
**) C37.94 originally defined just for multimode; using same header, configuration and data format as
C37.94
2.14 Serial SPA/IEC 60870-5-103 and LON

communication module (SLM)
2.14.1 Introduction
munication. The module has two communication ports, one for serial communication and one
dedicated for LON communication.
2.14.2 Design
The SLM is a PMC card and it is factory mounted as a mezzanine card on the NUM module.
Three variants of the SLM is available with different combinations of optical fiber connectors,
see figure 426. The plastic fiber connectors are of snap-in type and the glass fiber connectors are
of ST type.
931
Hardware
A Snap in connector for plastic fiber

B ST connector for glass fiber
1 LON port
2 SPA/IEC 60870-5-103 port
Figure 425: The SLM variants
932
Hardware
1 Receiver, LON
2 Transmitter, LON
3 Receiver, SPA/IEC 60870-5-103
4 Transmitter, SPA/IEC 60870-5-103
Figure 426: The SLM layout overview

Table 551: SLM – LON port
Quantity Range or value
Optical connector Glass fibre: type ST
Plastic fibre: type HFBR snap-in
Fibre, optical budget Glass fibre: 11 dB (1000 m typically *)
Plastic fibre: 7 dB (10 m typically *)
Fibre diameter Glass fibre: 62.5/125 μm
Plastic fibre: 1 mm
933
Hardware
Table 552: SLM – SPA/IEC 60870-5-103 port

Optical connector Glass fibre: type ST
Plastic fibre: type HFBR snap-in
Fibre, optical budget Glass fibre: 11 dB (3000ft/1000 m typically *)
Plastic fibre: 7 dB (80ft/25 m typically *)
Fibre diameter Glass fibre: 62.5/125 μm
Plastic fibre: 1 mm
2.15 Galvanic RS485 communication module

2.15.1 Introduction
The Galvanic RS485 communication module (RS485) is used for DNP3.0 communication. The
module has one RS485 communication port. The RS485 is a balanced serial communication that
can be used either in 2-wire or 4-wire connections. A 2-wire connection uses the same signal for
RX and TX and is a multidrop communication with no dedicated Master or slave. This variant
requires however a control of the output. The 4-wire connection has separated signals for RX
and TX multidrop communication with a dedicated Master and the rest are slaves. No special
control signal is needed in this case.
2.15.2 Design
The RS485 is a PMC card and it is factory mounted as a mezzanine card on the NUM module.
The internal structure of the RS485 can be seen in figure 428:
FPGA
32 MHz
Wishbone interconnect switch
Tx
PCI-con
Isolation
Internal UART RS485 6-pole-connector
bus tranceiver
PCI-bus Rx
Local bus Isolation
PCI-
to
Controller
wishbone
PCI-con
Isolation
Status
Register Termination
connector
Info
2-pole
Register
Control
ID-chip
Register Isolated Soft
DC/DC ground
Figure 427: The internal structure of the RS485 card
934
Hardware
RS485 connector pinouts

The arrangement for the pins in the RS485 connector (figure 429) are presented in table 553:
Table 553: The arrangement for the pins

Pin Name 2-wire Name 4-wire Description
1 RS485+ TX+ Receive/transmit high or transmit high
2 RS485– TX– Receive/transmit
3 Term T-Term Termination resistor for transmitter (and receiver in
2–wir case) (connect to TX+)
4 N.A. R-Term Termination resistor for receiver (connect to RX+)
5 N.A. RX– Receive low
6 N.A. RX+ Receive high
Angle
bracket
Screw
1
terminal
X3 2
1
2 RS485
3 PWB
Screw
4
terminal
5
X1
6
Backplane
Figure 428: RS485 connector
• 2-wire: Connect pin 1 to pin 6 and pin 2 to pin 5
• Termination (2-wire): Connect pin 1 to pin 3
• Termination (4-wire): Connect pin 1 to pin 3 and pin 4 to pin 6
Soft ground connector pinouts

A second 2-pole screw connector is used for the connection of IO-ground. It can be used in two
combinations like:
• Unconnected: No ground of the IO-part ·.
• Soft grounded: The IO is connected to the GND with an RC net parallel with a
MOV
935
Hardware

Table 554: Galvanic RS485 communication module
Communication speed 2400–19200 bauds
External connectors RS-485 6-pole connector
Soft ground 2-pole connector
2.16 Optical ethernet module (OEM)

2.16.1 Introduction
The optical fast-ethernet module is used to connect an IED to the communication buses (like the
station bus) that use the IEC 61850-8-1 protocol. The module has one or two optical ports with
ST connectors.
2.16.2 Functionality
The Optical Ethernet module (OEM) is used when communication systems according to
IEC61850–8–1 have been implemented.
2.16.3 Design
The Optical Ethernet module (OEM) is a PMC card and mounted as a mezzanine card on the
ADM. The OEM is a 100base Fx module and available as a single channel or double channel
unit.
PCI - bus Connector

100Base-FX
EEPROM
Transmitter ST fiber optic
Ethernet Controller connectors
100Base-FX
Receiver
PCI - PCI Bridge
100Base-FX
Transmitter
ID chip ST fiber optic
Ethernet Controller
connectors
100Base-FX
EEPROM
IO - bus Connector Receiver
en04000472.vsd
Figure 429: OEM block diagram.
936
Hardware
ID chip
Receiver
IO bus
LED
Ethernet cont.
25MHz oscillator
Transmitter
Receiver
PCI bus
LED
Ethernet cont. PCI to PCI
bridge
25MHz oscillator
Transmitter
en05000472.vsd
Figure 430: OEM layout, standard PMC format 2 channels

Table 555: OEM - Optical ethernet module
Quantity Rated value
Number of channels 1 or 2
Standard IEEE 802.3u 100BASE-FX
Type of fiber 62.5/125 μm multimode fibre
Wave length 1300 nm
Optical connector Type ST
Communication speed Fast Ethernet 100 MB
2.17 mA input module (MIM)

2.17.1 Introduction
The milli-ampere input module is used to interface transducer signals in the –20 to +20 mA
range from for example OLTC position, temperature or pressure transducers.The module has six
independent, galvanically separated channels.
2.17.2 Design
The Milliampere Input Module has six independent analog channels with separated protection,
filtering, reference, A/D-conversion and optical isolation for each input making them galvani-
cally isolated from each other and from the rest of the module.
For configuration of the input signals, please refer to section 10.
The analog inputs measure DC current in the range of +/- 20 mA. The A/D converter has a digital
filter with selectable filter frequency. All inputs are calibrated separately The filter parameters
and the calibration factors are stored in a non-volatile memory on the module.
937
Hardware
The calibration circuitry monitors the module temperature and starts an automatical calibration
procedure if the temperature drift is outside the allowed range. The module communicates, like
the other I/O-modules on the serial CAN-bus.
A/D Converter Opto-

Protection isolation
& filter
Volt-ref DC/DC
Process connector
A/D Converter Opto-

& filter
Volt-ref DC/DC
A/D Converter Opto-

& filter
Volt-ref DC/DC
A/D Converter Opto-

& filter
Volt-ref DC/DC
A/D Converter Opto-

& filter
Volt-ref DC/DC
Backplane connector
A/D Converter Opto-
& filter
Volt-ref DC/DC
CAN
Memory Micro-
controller
99000504.vsd
Figure 431: MIM block diagram
938
Hardware

Table 556: MIM - mA input module
Quantity: Rated value: Nominal range:
Input range ± 5, ± 10, ± 20mA -
0-5, 0-10, 0-20, 4-20mA
Input resistance Rin = 194 Ohm -
Power consumption -
each mA-board ≤4W
each mA input ≤ 0.1 W
2.18 GPS time synchronization module (GSM)

2.18.1 Introduction
This module includes the GPS receiver used for time synchronization. The GPS has one SMA
contact for connection to an antenna.
2.18.2 Design
The GPS time synchronization module is 6U high and occupies one slot. The slot closest to the
NUM shall always be used.
The GSM consists of
• CAN carrier module (CCM)

• GPS clock module (GCM)
• GPS receiver unit
The CCM is a carrier board for the GCM mezzanine PMC card and GPS unit, see figure 434.
There is a cable between the external antenna input on the back of the GCM and the GPS-receiv-
er. This is a galvanic connection vulnerable to electro-magnetic interference. The connector is
shielded and directly attached to a grounded plate to reduce the risk. The second cable is a flat
cable that connects the GPS and the GCM. It is used for communication between the GCM and
the GPS-receiver. All communication between the GCM and the NUM is via the CAN-bus.
The CMPPS signal is sent from the GCM to the rest of the time system to provide 1μs accuracy
at sampling level.
939
Hardware
PMC
GPS GPS clock
GPS antenna receiver module
CMPPS
Backplane CAN
CAN
connector
controller CAN
en05000675.vsd
Figure 432: GSM block diagram
940
Hardware
en07000086.vsd
1 GPS receiver
2 GPS Clock module (GCM)
3 CAN carrier module (CCM)
4 Antenna connector
Figure 433: A CCM with the GCM and GPS mounted with cables
941
Hardware

Table 557: GPS time synchronization module (GSM)
Receiver – ±1μs relative UTC
Time to reliable time reference with antenna in new <30 minutes –
position or after power loss longer than 1 month
Time to reliable time reference after a power loss longer <15 minutes –
than 48 hours
Time to reliable time reference after a power loss <5 minutes –
shorter than 48 hours
2.19 GPS antenna

2.19.1 Introduction
In order to receive GPS signals from the satellites orbiting the earth a GPS antenna with appli-
cable cable must be used.
2.19.2 Design
The antenna with a console for mounting on a horizontal or vertical flat surface or on an antenna
mast. See figure 435
942
Hardware
1 6
4 7
xx04000155.vsd
where:
1 GPS antenna
2 TNC connector
3 Console, 78x150 mm
4 Mounting holes 5.5 mm
5 Tab for securing of antenna cable
6 Vertical mounting position
7 Horizontal mounting position
Figure 434: Antenna with console
Always position the antenna and its console so that a continuous clear line-of-sight visibility to
all directions is obtained, preferably more than 75%. A minimum of 50% clear line-of-sight vis-
ibility is required for un-interrupted operation.
943
Hardware
99001046.vsd
Figure 435: Antenna line-of-sight
Antenna cable
Use a 50 ohm coaxial cable with a male TNC connector in the antenna end and a male SMA
connector in the receiver end to connect the antenna to GSM. Choose cable type and length so
that the total attenuation is max. 26 dB at 1.6 GHz.
Note!
Make sure that the antenna cable is not charged when connected to the antenna or to the receiver.
Short-circuit the end of the antenna cable with some metal device, when first connected to the
antenna. When the antenna is connected to the cable, connect the cable to the receiver. REx670
must be switched off when the antenna cable is connected.

Table 558: GPS – Antenna and cable
Function Value
Max antenna cable attenuation 26 db @ 1.6 GHz
Antenna cable impedance 50 ohm
Lightning protection Must be provided externally
Antenna cable connector SMA in receiver end
TNC in antenna end
944
Hardware
2.20 IRIG-B time synchronization module IRIG-B

2.20.1 Introduction
This module includes the IRIG-B time synchronization and the PPS time synchronization.
2.20.2 Design
The IRIG-B module have two inputs. One input is for the IRIG-B that can handle both a
pulse-width modulated signal (also called unmodulated) and an amplitude modulated signal (al-
so called sine wave modulated). The other is an optical input type ST for PPS to synchronize the
time between several protections.
32 MHz FPGA
connector
PCI-con
OPTO_INPUT
ST-
PCI-bus
Registers
PCI-Controller
PCI-con
4 mm barrier
IRIG- IRIG_INPUT
connector
Amplitude
ID-chip Decoder
BNC-
modulator
Capture1 Isolated
ZXING
receiver
Zero-cross
Capture2 detector
MPPS
IO-con
PPS
TSU Isolated
DC/DC
CMPPS 5 to +- 12V
en06000303.vsd
Figure 436: IRIG-B block diagram
945
Hardware
A1
DC//DC
ST
C
Y2
C
C
A1
C
O
T
3
2
O
en06000304.vsd
Figure 437: IRIG-B PC-MIP board with top left ST connector for PPS 820 nm multimode fibre
optic signal input and lower left BNC connector for IRIG-B signal input

Table 559: IRIG-B
Quantity Rated value
Number of channels IRIG-B 1
Number of channels PPS 1
Electrical connector IRIG-B BNC
Optical connector PPS Type ST
Type of fibre 62.5/125 μm multimode fibre
946
Dimensions Chapter 18
Hardware
3 Dimensions
3.1 Case without rear cover
K
E
D F
A
C G J
B
H
xx04000448.vsd
xx04000464.vsd
Figure 438: Case without rear cover Figure 439: Case without rear cover with 19” rack
mounting kit
Case size A B C D E F G H J K
(mm)
6U, 1/2 x 19” 265.9 223.7 201.1 252.9 205.7 190.5 203.7 - 187.6 -
6U, 3/4 x 19” 265.9 336.0 201.1 252.9 318.0 190.5 316.0 - 187.6 -
6U, 1/1 x 19” 265.9 448.3 201.1 252.9 430.3 190.5 428.3 465.1 187.6 482.6
The H and K dimensions are defined by the 19” rack mounting kit
947
Hardware
3.2 Case with rear cover
D F
J
G
B H xx05000502.vsd
C
xx05000501.vsd
Figure 441: Case with rear cover and 19” rack

Figure 440: Case with rear cover.
mounting kit.
xx05000503.vsd
Figure 442: Rear cover case with details.
(mm)
6U, 1/2 x 19” 265.9 223.7 242.1 255.8 205.7 190.5 203.7 - 228.6 -
6U, 3/4 x 19” 265.9 336.0 242.1 255.8 318.0 190.5 316.0 - 228.6 -
6U, 1/1 x 19” 265.9 448.3 242.1 255.8 430.3 190.5 428.3 465.1 228.6 482.6
The H and K dimensions are defined by the 19” rack mounting kit.
948
Hardware
(inches)
6U, 1/2 x 19” 10.47 8.81 9.53 10.07 8.10 7.50 8.02 - 9.00 -
6U, 3/4 x 19” 10.47 13.23 9.53 10.07 12.52 7.50 12.4 - 9.00 -
6U, 1/1 x 19” 10.47 17.65 9.53 10.07 16.86 7.50 16.86 18.31 9.00 19.00
The H and K dimensions are defined by the 19” rack mounting kit.
3.3 Flush mounting dimensions
A C
E
D
xx04000465.vsd
Cut-out dimensions (mm)

Case size A B C D
Tolerance +/-1 +/-1
6U, 1/2 x 19” 210.1 254.3 4.0-10.0 12.5
6U, 3/4 x 19” 322.4 254.3 4.0-10.0 12.5
6U, 1/1 x 19” 434.7 254.3 4.0-10.0 12.5
E = 188.6 mm without rear protection cover, 229.6 mm with rear protection cover
Figure 443: Flush mounting
949
Hardware
3.4 Side-by-side flush mounting dimensions
xx06000182.vsd
Figure 444: A 1/2 x 19” size IED 670 side-by-side with RHGS6.
950
Hardware
D
B
E
F
C
xx05000505.vsd
Case size (mm) A B C D E F G

Tolerance ±1 ±1 ±1 ±1 ±1 ±1 ±1
6U, 1/2 x 19” 214.0 259.3 240.4 190.5 34.4 13.2 6.4 diam
6U, 3/4 x 19” 326.4 259.3 352.8 190.5 34.4 13.2 6.4 diam
6U, 1/1 x 19” 438.7 259.3 465.1 190.5 34.4 13.2 6.4 diam
Figure 445: Panel-cut out dimensions for side-by-side flush mounting
951
Hardware
3.5 Wall mounting dimensions
B
E
C
D
en04000471.vsd
Figure 446: Wall mounting
Case size (mm) A B C D E

6U, 1/2 x 19” 292.0 267.1 272.8 390.0 243.0
6U, 3/4 x 19” 404.3 379.4 272.8 390.0 243.0
6U, 1/1 x 19” 516.0 491.1 272.8 390.0 243.0
952
Hardware
3.6 External resistor unit for high impedance differential protection
[1.48]
[6.97]
[4.02]
[0.33] [18.31] [0.79] [7.68]

[18.98]
Dimension
mm [inches] xx06000232.eps
Figure 447: Dimension drawing of a one phase impedance resistor unit

[1.50]
[10.47]
[7.50]
[0.33] [18.31] [0.79] [7.68]

[18.98]
en06000234.eps
[inches]
Figure 448: Dimension drawing of a three phase high impedance resistor unit
953
Mounting alternatives Chapter 18
Hardware
4 Mounting alternatives
4.1 Flush mounting

4.1.1 Overview
All IED sizes, 1/2 x 19”, 3/4 x 19” and 1/1 x 19” and RHGS6 6U 1/4 x 19”, cases, can be flush
mounted. Only a single case can be mounted in each cut-out on the cubicle panel, for class IP54
protection.
The flush mounting kit are utilized for IEDs of sizes: 1/2 x 19”, 3/4 x 19” and 1/1 x 19” and are
also suitable for mounting of RHGS6, 6U 1/4 x 19” cases.
Note!
Flush mounting cannot be used for side-by-side mounted IEDs when IP54 class must be ful-
filled. Only IP20 class can be obtained when mounting two cases side-by-side in one (1) cut-out.
Note!
To obtain IP54 class protection, an additional factory mounted sealing must be ordered when
ordering the IED.
954
Hardware
4.1.2 Mounting procedure for flush mounting
1
7
2
6
5
3
xx06000246.vsd
PosNo Description Quantity Type

1 Sealing strip, used - -
to obtain IP54 class.
The sealing strip is
factory mounted
between the case
and front plate.
2 Fastener 4 -
3 Groove - -
4 Screw, self tapping 4 2,9x9,5 mm
5 Joining point of seal- - -
ing strip (rear view)
6 Panel - -
7 Screw 4 M5x25
Figure 449: Flush mounting details.
955
Hardware
4.2 19” panel rack mounting

4.2.1 Overview
All IED sizes can be mounted in a standard 19” cubicle rack by using the for each size suited
mounting kit which consists of two mounting angles and fastening screws for the angles. The
mounting angles are reversible which enables mounting of IED size 1/2 x 19” or 3/4 x 19” either
to the left or right side of the cubicle.
Note!
Please note that the separately ordered rack mounting kit for side-by-side mounted IEDs, or
IEDs together with RHGS cases, is to be selected so that the total size equals 19”.
Note!
When mounting the mounting angles, be sure to use screws that follows the recommended di-
mensions. Using screws with other dimensions than the original may damage the PCBs inside
the IED.
956
Hardware
4.2.2 Mounting procedure for 19” panel rack mounting
1a
1b
xx04000452.vsd

1a, 1b Mounting angels, which can be mounted, either 2 -
to the left or right side of the case.
2 Screw 8 M4x6
Figure 450: 19” panel rack mounting details
4.3 Wall mounting

4.3.1 Overview
All case sizes, 1/2 x 19”, 3/4 x 19” and 1/1 x 19”, can be wall mounted. It is also possible to
mount the IED on a panel or in a cubicle.
Note!
When mounting the side plates, be sure to use screws that follows the recommended dimensions.
Using screws with other dimensions than the original may damage the PCBs inside the IED.
957
Hardware
4.3.2 Mounting procedure for wall mounting
3
4
2
6
xx04000453.vsd

1 Bushing 4 -
2 Screw 8 M4x10
3 Screw 4 M6x12 or correspond-
ing
4 Mounting bar 2 -
5 Screw 6 M5x8
6 Side plate 2 -
Figure 451: Wall mounting details.
4.3.3 How to reach the rear side of the IED

The IED can be equipped with a rear protection cover which is recommended to use with this
type of mounting. See figure 453.
To reach the rear side of the IED, a free space of 80 mmis required on the unhinged side.
958
Hardware
View from above
3
1
80 mm 2
en06000135.vsd
PosNo Description Type

1 Screw M4x10
2 Screw M5x8
3 Rear protection -
cover
Figure 452: How to reach the connectors on the rear side of the IED.
4.4 Side-by-side 19” rack mounting

4.4.1 Overview
IED case sizes, 1/2 x 19” or 3/4 x 19” and RHGS cases, can be mounted side-by-side up to a
maximum size of 19”. For side-by-side rack mounting, the side-by-side mounting kit together
with the 19” rack panel mounting kit must be used. The mounting kit has to be ordered separate-
ly.
Note!
When mounting the plates and the angles on the IED, be sure to use screws that follows the rec-
ommended dimensions. Using screws with other dimensions than the original may damage the
PCBs inside the IED.
959
Hardware
4.4.2 Mounting procedure for side-by-side rack mounting
2
1
xx04000456.vsd

1 Mounting plate 2 -
2, 3 Screw 16 M4x6
4 Mounting angle 2 -
Figure 453: Side-by-side rack mounting details.
4.4.3 IED 670 mounted with a RHGS6 case

An 1/2 x 19” or 3/4 x 19” size IED can be mounted with a RHGS (6 or 12 depending on IED
size) case. The RHGS case can be used for mounting a test switch of type RTXP 24. It also has
enough space for a terminal base of RX 2 type for mounting of, for example, a DC-switch or two
trip relays.
960
Hardware
1 2
1 2 1 2
1 1 1 1
2 2 2 2
3 3 3 3
4 4 4 4
5 5 5 5
6 6 6 6
7 7 7 7
8 8 8 8
xx06000180.vsd
Figure 454: IED 670 (1/2 x 19”) mounted with a RHGS6 case containing a test switch module
equipped with only a test switch and a RX2 terminal base.
4.5 Side-by-side flush mounting

4.5.1 Overview
It is not recommended to flush mount side by side mounted cases if IP54 is required. If your ap-
plication demands side-by-side flush mounting, the side-by-side mounting details kit and the 19”
panel rack mounting kit must be used. The mounting kit has to be ordered separately. The max-
imum size of the panel cut out is 19”.
Note!
With side-by-side flush mounting installation, only IP class 20 is obtained. To reach IP class 54,
it is recommended to mount the IEDs separately. For cut out dimensions of separately mounted
IEDs, see section 4.1 "Flush mounting" on page 956.
Note!
When mounting the plates and the angles on the IED, be sure to use screws that follows the rec-
ommended dimensions. Using screws with other dimensions than the original may damage the
PCBs inside the IED.
Note!
Please contact factory for special add on plates for mounting FT switches on the side (for 1/2
19" case) or bottom of the relay.
961
Hardware
4.5.2 Mounting procedure for side-by-side flush mounting
1 2
xx06000181.vsd

1 Mounting plate 2 -
2, 3 Screw 16 M4x6
4 Mounting angle 2 -
Figure 455: Side-by-side flush mounting details (RHGS6 side-by-side with 1/2 x 19” IED).
962
Technical data Chapter 18
Hardware
5 Technical data
5.1 Enclosure
Table 560: Case
Material Steel sheet
Front plate Steel sheet profile with cut-out for HMI
Surface treatment Aluzink preplated steel
Finish Light grey (RAL 7035)
Table 561: Water and dust protection level according to IEC 60529
Front IP40 (IP54 with sealing strip)
Rear, sides, top and bot- IP20
tom
Table 562: Weight

Case size Weight
6U, 1/2 x 19” ≤ 10 kg
6U, 3/4 x 19” ≤ 15 kg
6U, 1/1 x 19” ≤ 18 kg
5.2 Connection system

Table 563: CT and VT circuit connectors
Connector type Rated voltage and current Maximum conductor area
Terminal blocks of feed through 250 V AC, 20 A 4mm2
type
Terminal blocks suitable for ring 250 V AC, 20 A 4 mm2
lug terminals
963
Hardware
Table 564: Binary I/O connection system

Connector type Rated voltage Maximum conductor area
Screw compression type 250 V AC 2.5 mm2
2 × 1 mm2
Terminal blocks suitable for ring 300 V AC 3 mm2
lug terminals
Note!
Because of limitations of space, when ring lug terminal is ordered for Binary I/O connections,
one blank slot is necessary between two adjacent IO cards. Please refer to the ordering particu-
lars for details.
5.3 Influencing factors

Table 565: Temperature and humidity influence
Parameter Reference value Nominal range Influence
Ambient temperature, +20 °C -10 °C to +55 °C 0.02% /°C
operate value
Relative humidity 10%-90% 10%-90% -
Operative range 0%-95%
Storage temperature -40 °C to +70 °C - -
Table 566: Auxiliary DC supply voltage influence on functionality during operation

Dependence on Reference value Within nominal Influence
range
Ripple, in DC auxiliary voltage max. 2% 12% of EL 0.01% /%
Operative range Full wave rectified
Auxiliary voltage dependence, operate ± 20% of EL 0.01% /%
value
Interrupted auxiliary DC voltage 24-60 V DC ± 20%
90-250 V DC ± 20%
Interruption interval
0–50 ms
No restart
0–∞ s Correct behav-
iour at power
down
Restart time <180 s
964
Hardware
Table 567: Frequency influence (reference standard: IEC 60255–6)

Dependence on Within nominal range Influence
Frequency dependence, operate fr ± 2.5 Hz for 50 Hz ± 1.0% / Hz
value
fr ± 3.0 Hz for 60 Hz
Harmonic frequency dependence 2nd, 3rd and 5th harmonic of fr ± 1.0%
(20% content)
Harmonic frequency dependence 2nd, 3rd and 5th harmonic of fr ± 6.0%
for distance protection (10% con-
tent)
5.4 Type tests according to standard

Table 568: Electromagnetic compatibility
Test Type test values Reference standards
1 MHz burst disturbance 2.5 kV IEC 60255-22-1, Class III
100 kHz disturbance 2.5 kV IEC 61000-4-12, Class III
Surge withstand capability test 2.5 kV, oscillatory ANSI/IEEE C37.90.1
4.0 kV, fast transient
Electrostatic discharge 15 kV air discharge IEC 60255-22-2, Class IV
Direct applicaton 8 kV contact discharge
Indirect application 8 kV contact discharge IEC 61000-4-2, Class IV
Electrostatic discharge 15 kV air discharge ANSI/IEEE C37.90.1
Direct application 8 kV contact discharge
Indirect application 8 kV contact discharge
Fast transient disturbance 4 kV IEC 60255-22-4,Class A
Surge immunity test 1-2 kV, 1.2/50 μs IEC 60255-22-5
high energy
Power frequency immunity test 150-300 V, IEC 60255-22-7, Class A
50 Hz
Power frequency magnetic field test 1000 A/m, 3 s IEC 61000-4-8, Class V
Radiated electromagnetic field distur- 20 V/m, 80-1000 MHz IEC 60255-22-3
bance
Radiated electromagnetic field distur- 20 V/m, 80-2500 MHz EN 61000-4-3
bance
Radiated electromagnetic field distur- 35 V/m IEEE/ANSI C37.90.2
bance
26-1000 MHz
Conducted electromagnetic field dis- 10 V, 0.15-80 MHz IEC 60255-22-6
turbance
Radiated emission 30-1000 MHz IEC 60255-25
Conducted emission 0.15-30 MHz IEC 60255-25
965
Hardware
Table 569: Insulation

Test Type test values Reference standard
Dielectric test 2.0 kV AC, 1 min. IEC 60255-5
Impulse voltage test 5 kV, 1.2/50 μs, 0.5 J
Insulation resistance >100 MΩ at 500 VDC
Table 570: Environmental tests

Test Type test value Reference standard
Cold test Test Ad for 16 h at -25°C IEC 60068-2-1
Storage test Test Ad for 16 h at -40°C IEC 60068-2-1
Dry heat test Test Bd for 16 h at +70°C IEC 60068-2-2
Damp heat test, steady state Test Ca for 4 days at +40 °C and IEC 60068-2-78
humidity 93%
Damp heat test, cyclic Test Db for 6 cycles at +25 to +55 °C IEC 60068-2-30
and humidity 93 to 95% (1 cycle = 24
hours)
Table 571: CE compliance

Test According to
Immunity EN 50263
Emissivity EN 50263
Low voltage directive EN 50178
Table 572: Mechanical tests

Test Type test values Reference standards
Vibration Class I IEC 60255-21-1
Shock and bump Class I IEC 60255-21-2
Seismic Class I IEC 60255-21-3
966
Labels
Chapter 19 Labels
About this chapter

This chapter includes descriptions of the different labels and where to find them on the IED.
967
Different labels Chapter 19
Labels
1 Different labels
2
3
6
6 5
7
xx06000574.eps
968
Labels
1 Product type, description and serial number

2 Order number, dc supply voltage and rated frequency
3 Optional, customer specific information
4 Manufacturer
5 Transformer input module, rated currents and voltages
6 Transformer designations
7 Ordering and serial number
969
Labels
4
en06000573.eps
1 Warning label
2 Caution label
3 Class 1 laser product label
4 Warning label
970
Chapter 20
Connection diagrams
Chapter 20 Connection
diagrams
This chapter includes diagrams of the IED with all slot, terminal block and optical connector
designations. It is a necessary guide when making electrical and optical connections to the IED.
971
Chapter 20
Connection diagrams
972
Chapter 20
Connection diagrams
973
Chapter 20
Connection diagrams
974
Chapter 20
Connection diagrams
975
Chapter 20
Connection diagrams
976
Chapter 20
Connection diagrams
977
Chapter 20
Connection diagrams
978
Chapter 20
Connection diagrams
979
Chapter 20
Connection diagrams
980
Chapter 20
Connection diagrams
981
Chapter 20
Connection diagrams
982
Chapter 20
Connection diagrams
983
Chapter 20
Connection diagrams
984
Chapter 20
Connection diagrams
985
Chapter 20
Connection diagrams
986
Time inverse characteristics
Chapter 21 Time inverse

characteristics
About this chapter

This chapter describes current dependant time delay functionality. Both ANSI and IEC Inverse
time curves and tables are included.
987
Application Chapter 21
1 Application
In order to assure time selectivity between different overcurrent protections in different points
in the network different time delays for the different relays are normally used. The simplest way
to do this is to use definite time delay. In more sophisticated applications current dependent time
characteristics are used. Both alternatives are shown in a simple application with three overcur-
rent protections connected in series.
I> I> I>

xx05000129.vsd
Figure 456: Three overcurrent protections connected in series
Stage 3
Time
Stage 2 Stage 2
Stage 1 Stage 1 Stage 1
Fault point
position
en05000130.vsd
Figure 457: Definite time overcurrent characteristics
988
Time
Fault point
position
en05000131.vsd
Figure 458: Inverse time overcurrent characteristics with inst. function
The inverse time characteristic makes it possible to minimize the fault clearance time and still
assure the selectivity between protections.
To assure selectivity between protections there must be a time margin between the operation
time of the protections. This required time margin is dependent of following factors, in a simple
case with two protections in series:
• Difference between pick-up time of the protections to be co-ordinated

• Opening time of the breaker closest to the studied fault
• Reset time of the protection
• Margin dependent of the time-delay inaccuracy of the protections
Assume we have the following network case.
989
A1 B1
Feeder
I> I>
Time axis
t=0 t=t1 t=t2 t=t3
en05000132.vsd
where:
t=0 is The fault occurs
t=t1 is Protection B1 trips
t=t2 is Breaker at B1 opens
t=t3 is Protection A1 resets
Figure 459: Selectivity steps for a fault on feeder B1
In the case protection B1 shall operate without any intentional delay (instantaneous). When the
fault occurs the protections start to detect the fault current. After the time t1 the protection B1
send a trip signal to the circuit breaker. The protection A1 starts its delay timer at the same time,
with some deviation in time due to differences between the two protections. There is a possibility
that A1 will start before the trip is sent to the B1 circuit breaker.
At the time t2 the circuit breaker B1 has opened its primary contacts and thus the fault current is
interrupted. The breaker time (t2 - t1) can differ between different faults. The maximum opening
time can be given from manuals and test protocols. Still at t2 the timer of protection A1 is active.
At time t3 the protection A1 is reset, i.e. the timer is stopped.
In most applications it is required that the delay times shall reset as fast as possible when the
current fed to the protection drops below the set current level, the reset time shall be minimized.
In some applications it is however beneficial to have some type of delayed reset time of the over-
current function. This can be the case in the following applications:
• If there is a risk of intermittent faults. If the current relay, close to the faults, starts
and resets there is a risk of unselective trip from other protections in the system.
• Delayed resetting could give accelerated fault clearance in case of automatic re-
closing to a permanent fault.
990
• Overcurrent protection functions are sometimes used as release criterion for other
protection functions. It can often be valuable to have a reset delay to assure the
release function.
991
Principle of operation Chapter 21
2 Principle of operation
2.1 Mode of operation

The function can operate in a definite time delay mode or in a current dependent inverse time
delay mode. For the inverse time characteristic both ANSI and IEC based standard curves are
available. Also programmable curve types are supported via the component inputs: p, A, B, C
pr, tr, and cr.
Different characteristics for reset delay can also be chosen.
If current in any phase exceeds the set start current value (here internal signal startValue), a tim-
er, according to the selected operate mode, is started. The component always uses the maximum
of the three phase current values as the current level used in timing calculations.
In case of definite time the timer will run constantly until the trip time is reached or until the
current drops below the reset value (start value minus the hysteresis) and the reset time has
elapsed.
For definite time delay curve index no 5 (ANSI/IEEE Definite time) or 15 (IEC Definite time)
are chosen.
The general expression for inverse time curves is according to equation 119.
⎛ ⎞
⎜ A
⎟
t[ s ] = ⎜ + B ⎟⋅k
⎜ ⎛ i ⎞p ⎟
⎜⎜ ⎟ −C ⎟
⎝ ⎝ in > ⎠ ⎠
(Equation 119)
where:
p, A, B, C are constants defined for each curve type,
in> is the set start current for step n,
k is set time multiplier for step n and
i is the measured current.
For inverse time characteristics a time will be initiated when the current reaches the set start lev-
el. From the general expression of the characteristic the following can be seen:
992
⎛⎛ i ⎞p ⎞
(top − B ⋅ k ) ⋅ ⎜ ⎜ ⎟ − C ⎟ = A⋅k
⎝ ⎝ in > ⎠ ⎠
(Equation 120)
where:
top is the operation time of the protection
The time elapsed to the moment of trip is reached when the integral fulfils according to
equation 121, in addition to the constant time delay:
t
⎛⎛ i ⎞p ⎞
∫ ⎜ ⎜⎝ in > ⎟⎠ − C ⎟ ⋅ dt ≥ A ⋅ k
0 ⎝ ⎠
(Equation 121)
For the numerical protection the sum below must fulfil the equation for trip.
n ⎛ ⎛ i( j ) ⎞ p ⎞
Δt ⋅ ∑ ⎜ ⎜ ⎟ − C ⎟ ≥ A⋅ k
j =1 ⎝ ⎝ in > ⎠ ⎠
(Equation 122)
where:
j=1 is the first protection execution cycle when a fault has been detected, i.e. when
i
>1
in >
Δt is the time interval between two consecutive executions of the protection algorithm,
n is the number of the execution of the algorithm when the trip time equation is fulfilled, i.e.
when a trip is given and
i (j) is the fault current at time j
For inverse time operation, the inverse-time characteristic is selectable. Both the IEC and AN-
SI/IEEE standardized inverse-time characteristics are supported. The list of characteristics in
table 573 matches the list in the IEC 61850-7-4 spec.
993
Table 573: Curve name and index no.

Curve name Curve index no.
Curve name 1
ANSI Extremely Inverse 2
ANSI Very Inverse 3
ANSI Normal Inverse 4
ANSI Moderately Inverse 6
ANSI Long Time Extremely Inverse 7
ANSI Long Time Very Inverse 8
IEC Normal Inverse 9
IEC Very Inverse 10
IEC Inverse 11
IEC Extremely. Inverse 12
IEC Short Time Inverse 13
IEC Long Time Inverse 14
For the ANSI/IEEE characteristics the inverse time curves are defined according to table 574:
Table 574: Inverse time curves for ANSI/IEEE characteristics

Parameter/operationMode A B C p
1 = ANSI Extremely inverse 28.2 0.1217 1 2.0
2 = ANSI Very inverse 19.61 0.491 1 2.0
3 = ANSI Inverse 0.0086 0.0185 1 0.02
4 = ANSI Moderately inverse 0.0515 0.1140 1 0.02
6 = ANSI Long-time extremely inverse 64.07 0.250 1 2.0
7 = ANSI Long-time very inverse 28.55 0.712 1 2.0
8 = ANSI Long-time inverse 0.086 0.185 1 0.02
For the IEC characteristics the inverse time curves are defined according to table 575:
Table 575: Inverse time curves for IEC characteristics

Parameter/operationMode A(β) B C p (α)
9 = IEC Normal inverse 0.14 0 1 0.02
10 = IEC Very inverse 13.5 0 1 1.0
11 = IEC Inverse 0.14 0 1 0.02
12 = IEC Extremely inverse 80.0 0 1 2.0
13 = IEC Short-time inverse 0.05 0 1 0.04
14 = IEC Long-time inverse 120 0 1 1.0
994
For the IEC curves there is also a setting of the minimum time delay of operation, see figure 461.
Operate
time
tnMin
Current
en05000133.vsd
Figure 460: Minimum time delay operation for the IEC curves
In order to fully comply with IEC curves definition setting parameter tMin shall be set to the
value which is equal to the operating time of the selected IEC inverse curve for measured current
of twenty times the set current pickup value. Note that the operating time value is dependent on
the selected setting value for time multiplier k.
In addition to the ANSI and IEC standardized characteristics, there are also two additional
curves available; the 18 = RI time inverse and the 19 = RD time inverse.
The 18 = RI time inverse curve emulates the characteristic of the electromechanical ASEA relay
RI. The curve is described by equation 123:
995
⎛ ⎞
⎜ k ⎟
t[ s ] = ⎜
in > ⎟
⎜ 0.339 − 0.235 ⋅ ⎟
⎝ i ⎠
(Equation 123)
where:
i is the measured current.
The 19 = RD time inverse curve gives a logarithmic delay, as used in the Combiflex protection
RXIDG. The curve enables a high degree of selectivity required for sensitive residual earth fault
current protection, with ability to detect high resistive earth faults. The curve is described by
equation 124:
⎛ i ⎞
t[ s ] = 5.8 − 1.35 ⋅ ln ⎜ ⎟
⎝ k ⋅ in > ⎠
(Equation 124)
where:
i is the measured current
If the curve type is chosen as 17 the user can make a tailor made inverse time curve according
to the general equation 125.
⎛ ⎞
⎜ A
⎟
t[ s ] = ⎜ + B ⎟⋅k
⎜ ⎛ i ⎞p ⎟
⎜⎜ ⎟ −C ⎟
⎝ ⎝ in > ⎠ ⎠
(Equation 125)
Also the reset time of the delayed function can be controlled. We have the possibility to choose
between three different reset type delays. Available alternatives are listed in table 576.
996
Table 576: Reset type delays

Curve name Curve index no.
Instantaneous 1
IEC Reset 2
ANSI Reset 3
If instantaneous reset is chosen the timer will be reset directly when the current drops below the
set start current level minus the hysteresis.
If IEC reset is chosen the timer is reset the timer will be reset after a set constant time when the
current drops below the set start current level minus the hysteresis.
If ANSI reset time is chosen the reset time will be dependent of the current after fault clearance
(when the current drops below the start current level minus the hysteresis). The timer will reset
according to equation 126.
⎛ ⎞
⎜ tr
⎟
t[ s ] = ⎜ ⎟
⎜ ⎛ i ⎞2 ⎟
⎜⎜ ⎟ −1 ⎟
⎝ ⎝ in > ⎠ ⎠
(Equation 126)
where:
The set value tr is the reset time in case of zero current after fault clearance.
The possibility of choice of reset characteristics is to some extent dependent of the choice of time
delay characteristic.
For the independent time delay characteristics (type 5 and 15) the possible delay time settings
are instantaneous (1) and IEC (2 = set constant time reset).
For ANSI inverse time delay characteristics (type 1 - 4 and 6 - 8) all three types of reset time
characteristics are available; instantaneous (1), IEC (2 = set constant time reset) and ANSI (3 =
current dependent reset time).
For IEC inverse time delay characteristics (type 9 - 14) the possible delay time settings are in-
stantaneous (1) and IEC (2 = set constant time reset).
For the customer tailor made inverse time delay characteristics (type 17) all three types of reset
time characteristics are available; instantaneous (1), IEC (2 = set constant time reset) and ANSI
(3 = current dependent reset time). If the current dependent type is used settings pr, tr and cr must
be given, see equation 127:
997
⎛ ⎞
⎜ tr
⎟
t[ s ] = ⎜ ⎟
⎜ ⎛ i ⎞ pr ⎟
⎜⎜ ⎟ − cr ⎟
⎝ ⎝ in > ⎠ ⎠
(Equation 127)
For RI and RD inverse time delay characteristics (type 18 and 19) the possible delay time set-
tings are instantaneous (1) and IEC (2 = set constant time reset).
998
Inverse characteristics Chapter 21
3 Inverse characteristics
Table 577: Inverse time characteristics ANSI
Operate characteristic: k = 0.05-999 in steps of -
0.01 unless otherwise
stated
⎛ A ⎞
t = ⎜ P + B⎟ ⋅ k
⎜ ( I − 1) ⎟
⎝ ⎠
Reset characteristic:
tr
t = ⋅k
(I 2
−1 )
I = Imeasured/Iset
ANSI Extremely Inverse no 1 A=28.2, B=0.1217, P=2.0, ANSI/IEEE C37.112, class 5 +
tr=29.1 30 ms
ANSI Very inverse no 2 A=19.61, B=0.491, P=2.0,
tr=21.6
ANSI Normal Inverse no 3 A=0.0086, B=0.0185,
P=0.02, tr=0.46
ANSI Moderately Inverse no 4 A=0.0515, B=0.1140,
P=0.02, tr=4.85
ANSI Long Time Extremely Inverse no 6 A=64.07, B=0.250, P=2.0,
tr=30
ANSI Long Time Very Inverse no 7 A=28.55, B=0.712, P=2.0,
tr=13.46
ANSI Long Time Inverse no 8 k=(0.01-1.20) in steps of
0.01
A=0.086, B=0.185,
P=0.02, tr=4.6
999
Table 578: Inverse time characteristics IEC

Operate characteristic: k = (0.05-1.10) in steps of -
0.01
⎛ A ⎞
t = ⎜ P ⎟⋅k
⎜ ( I − 1) ⎟
⎝ ⎠
I = Imeasured/Iset
Time delay to reset, IEC inverse time (0.000-60.000) s ± 0.5% of set time ± 10 ms
IEC Normal Inverse no 9 A=0.14, P=0.02 IEC 60255-3, class 5 + 40 ms
IEC Very inverse no 10 A=13.5, P=1.0
IEC Inverse no 11 A=0.14, P=0.02
IEC Extremely inverse no 12 A=80.0, P=2.0
IEC Short-time inverse no 13 A=0.05, P=0.04
IEC Long-time inverse no 14 A=120, P=1.0
Customer defined characteristic no 17 k=0.5-999 in steps of 0.1 IEC 60255, class 5 + 40 ms
Operate characteristic: A=(0.005-200.000) in
steps of 0.001
B=(0.00-20.00) in steps of
⎛ A ⎞ 0.01
=⎜ + B⎟ ⋅ k
⎜ (I P − C )
t
⎟ C=(0.1-10.0) in steps of
⎝ ⎠
0.1
Reset characteristic:
P=(0.005-3.000) in steps of
0.001
TR TR=(0.005-100.000) in
t = ⋅k
(I )
PR steps of 0.001
− CR
CR=(0.1-10.0) in steps of
I = Imeasured/Iset 0.1
PR=(0.005-3.000) in steps
of 0.001
RI inverse characteristic no 18 k=(0.05-999) in steps of IEC 60255-3, class 5 + 40 ms
0.01
1
t = ⋅k
0.236
0.339 −
I
I = Imeasured/Iset
Logarithmic inverse characteristic no 19 k=(0.05-1.10) in steps of IEC 60255-3, class 5 + 40 ms
0.01
⎛
t = 5.8 − ⎜ 1.35 ⋅ In
I ⎞
⎟
⎝ k ⎠
I = Imeasured/Iset
1000
Table 579: Inverse time characteristics for Two step undervoltage protection (PUVM, 27)
Type A curve: k = (0.05-1.10) in steps of Class 5 +40 ms
0.01
k
t =
⎛ U < −U ⎞
⎜ ⎟
⎝ U< ⎠
U< = Uset
U = UVmeasured
Type B curve: k = (0.05-1.10) in steps of
0.01
k ⋅ 480
t = + 0.055
⎛ 32 ⋅ U < −U − 0.5 ⎞
2.0
⎜ ⎟
⎝ U < ⎠
U< = Uset
U = Umeasured
Programmable curve: k = (0.05-1.10) in steps of
0.01
A = (0.005-200.000) in
⎡ ⎤ steps of 0.001
⎢ k⋅A
⎥
t =⎢ ⎥+D B = (0.50-100.00) in steps
⎢ ⎛ U < −U ⎞
P
⎥ of 0.01
⎢⎜B ⋅ −C⎟ ⎥ C = (0.0-1.0) in steps of 0.1
⎣⎝ U < ⎠ ⎦
U< = Uset D = (0.000-60.000) in
steps of 0.001
U = Umeasured
P = (0.000-3.000) in steps
of 0.001
1001
Table 580: Inverse time characteristics for Two step overvoltage protection (POVM, 59)
0.01
k
t =
⎛U −U >⎞
⎜ ⎟
⎝ U> ⎠
U> = Uset
U = Umeasured
0.01
k ⋅ 480
t =
⎛ 32 ⋅ U − U > − 0.5 ⎞
2.0
⎜ ⎟ − 0.035
⎝ U > ⎠
Type C curve: k = (0.05-1.10) in steps of
0.01
k ⋅ 480
t =
3.0
⎛ 32 ⋅ U − U > − 0.5 ⎞
⎜ ⎟ − 0.035
⎝ U > ⎠
0.01
A = (0.005-200.000) in
k⋅A steps of 0.001
t = +D
⎛B ⋅ U − U > ⎞
P
B = (0.50-100.00) in steps
⎜ −C⎟
⎝ U > ⎠ of 0.01
C = (0.0-1.0) in steps of 0.1
D = (0.000-60.000) in
steps of 0.001
P = (0.000-3.000) in steps
of 0.001
1002
Table 581: Inverse time characteristics for

Two step residual overvoltage protection (POVM, 59N)
0.01
k
t =
⎛U −U >⎞
⎜ ⎟
⎝ U> ⎠
U> = Uset
U = Umeasured
0.01
k ⋅ 480
t =
2.0
⎛ 32 ⋅ U − U > − 0.5 ⎞
⎜ ⎟ − 0.035
⎝ U > ⎠
Type C curve: k = (0.05-1.10) in steps of
0.01
k ⋅ 480
t =
⎛ 32 ⋅ U − U > − 0.5 ⎞
3.0
⎜ ⎟ − 0.035
⎝ U > ⎠
0.01
A = (0.005-200.000) in
k⋅A steps of 0.001
t = +D
⎛B ⋅ U − U > ⎞
P
B = (0.50-100.00) in steps
⎜ −C⎟
⎝ U > ⎠ of 0.01
C = (0.0-1.0) in steps of 0.1
D = (0.000-60.000) in
steps of 0.001
P = (0.000-3.000) in steps
of 0.001
1003
100
10
k=
15
10
7
1
5
3
2
1
0.1
0.5
0.01
1 10 100 I/I>
xx05000764.vsd
Figure 461: ANSI – Extremely inverse
1004
100
10
k=
15
10
1 7
5
3
2
1
0.1
0.5
0.01
1 10 100 I/I>
xx05000765.vsd
Figure 462: ANSI – Very inverse
1005
100
10
k=
15
10
1 7
5
3
2
1
0.1
0.5
0.01
1 10 100 I/I>
xx05000766.vsd
Figure 463: ANSI – Inverse
1006
100
k=
15
10
10
7
5
1
1
0.5
0.1
0.01
1 10 100 I/I>
xx05000767.vsd
Figure 464: Moderately inverse
1007
100
10
k=
1.1
0.9
0.7
1 0.5
0.3
0.2
0.1
0.1 0.05
0.01
1 10 100 I/I>
xx05000768.vsd
Figure 465: IEC – Normal inverse
1008
100
10
1
k=
1.1
0.9
0.7
0.5
0.3
0.1 0.2
0.1
0.05
0.01
1 10 100 I/I>
xx05000769.vsd
Figure 466: Very inverse
1009
100
10
k=
0.1 1.1
0.9
0.7
0.5
0.3
0.2
0.01 0.1
1 10 100 I/I>
0.05 xx05000770.vsd
Figure 467: Extremely inverse
1010
Glossary
Chapter 22 Glossary
About this chapter

This chapter contains a glossary with terms, acronyms and abbreviations used in ABB technical
documentation.
1011
Glossary Chapter 22
Glossary
1 Glossary
AC Alternating current
A/D converter Analog to digital converter
ADBS Amplitude dead -band supervision

ADM Analog digital conversion module, with time synchronization
ANSI American National Standards Institute
AR Autoreclosing
ArgNegRes Setting parameter/ZD/
ArgDir Setting parameter/ZD/
ASCT Auxiliary summation current transformer
ASD Adaptive signal detection

AWG American Wire Gauge standard
BBP Busbar protection
BFP Breaker failure protection

BIM Binary input module
BOM Binary output module
BR External bi-stable relay

BS British standard
BSR Binary signal transfer function, receiver blocks
BST Binary signal transfer function, transmit blocks

C37.94 IEEE/ANSI protocol used when sending binary signals between IEDs
CAN Controller Area Network. ISO standard (ISO 11898) for serial communi-
cation
CAP 531 Configuration and programming tool
CB Circuit breaker
CBM Combined backplane module

CCITT Consultative Committee for International Telegraph and Telephony. A
United Nations sponsored standards body within the International Tele-
communications Union.
CCM CAN carrier module
CCVT Capacitive Coupled Voltage Transformer
Class C Protection Current Transformer class as per IEEE/ ANSI

CMPPS Combined mega pulses per second
CO cycle Close-open cycle
1012
Glossary Chapter 22
Glossary
Co-directional Way of transmitting G.703 over a balanced line. Involves two twisted
pairs making it possible to transmit information in both directions
COMTRADE Standard format according to IEC 60255-24

Contra-directional Way of transmitting G.703 over a balanced line. Involves four twisted
pairs of with two are used for transmitting data in both directions, and
two pairs for transmitting clock signals
CPU Central processor unit
CR Carrier receive
CRC Cyclic redundancy check

CS Carrier send
CT Current transformer
CVT Capacitive voltage transformer

DAR Delayed auto-reclosing
DARPA Defense Advanced Research Projects Agency (The US developer of the

TCP/IP protocol etc.)
DBDL Dead bus dead line

DBLL Dead bus live line
DC Direct current
DFT Discrete Fourier transform

DIP-switch Small switch mounted on a printed circuit board
DLLB Dead line live bus
DNP Distributed Network Protocol as per IEEE/ANSI Std. 1379-2000

DR Disturbance recorder
DRAM Dynamic random access memory
DRH Disturbance report handler

DSP Digital signal processor
DTT Direct transfer trip scheme
EHV network Extra high voltage network

EIA Electronic Industries Association
EMC Electro magnetic compatibility
EMF Electro motive force

EMI Electro magnetic interference
EnFP End fault protection
ESD Electrostatic discharge

FOX 20 Modular 20 channel telecommunication system for speech, data and
protection signals
FOX 512/515 Access multiplexer
1013
Glossary Chapter 22
Glossary
FOX 6Plus Compact, time-division multiplexer for the transmission of up to seven

duplex channels of digital data over optical fibers
G.703 Electrical and functional description for digital lines used by local tele-
phone companies. Can be transported over balanced and unbalanced
lines
GCM Communication interface module with carrier of GPS receiver module

GI General interrogation command
GIS Gas insulated switchgear
GOOSE Generic object oriented substation event

GPS Global positioning system
GSM GPS time synchronization module
HDLC protocol High level data link control, protocol based on the HDLC standard
HFBR connector type Plastic fiber connector
HMI Human machine interface
HSAR High speed auto reclosing
HV High voltage
HVDC High voltage direct current
IDBS Integrating dead band supervision
IEC International Electrical Committee

IEC 60044-6 IEC Standard, Instrument transformers – Part 6: Requirements for pro-
tective current transformers for transient performance
IEC 60870-5-103 Communication standard for protective equipment. A serial master/slave

protocol for point-to-point communication
IEC 61850 Substation Automation communication standard
IEEE Institute of Electrical and Electronics Engineers

IEEE 802.12 A network technology standard that provides 100 Mbits/s on twisted-pair
or optical fiber cable
IEEE P1386.1 PCI Mezzanine card (PMC) standard for local bus modules. References
the CMC (IEEE P1386, also known as Common mezzanine card) stan-
dard for the mechanics and the PCI specifications from the PCI SIG
(Special Interest Group) for the electrical EMF Electro Motive Force.
IED Intelligent electronic device
I-GIS Intelligent gas insulated switchgear
IOM Binary input/output module

Instance When several occurrences of the same function are available in the IED
they are referred to as instances of that function. One instance of a func-
tion is identical to another of the same kind but will have a different num-
ber in the IED user interfaces. The word instance is sometimes defined
as an item of information that is representative of a type. In the same
way an instance of a function in the IED is representative of a type of
function.
1014
Glossary Chapter 22
Glossary
IP 1. Internet protocol. The network layer for the TCP/IP protocol suite
widely used on Ethernet networks. IP is a connectionless, best-effort
packet switching protocol. It provides packet routing, fragmentation and
re-assembly through the data link layer.
2. Ingression protection according to IEC standard
IP 20 Ingression protection, according to IEC standard, level 20

IRF Internal fail signal
IRIG-B: InterRange Instrumentation Group Time code format B, standard 200
ITU International Telecommunications Union

LAN Local area network
LIB 520 High voltage software module
LCD Liquid crystal display
LDCM Line differential communication module

LDD Local detection device
LED Light emitting diode
LNT LON network tool

LON Local operating network
MCB Miniature circuit breaker
MCM Mezzanine carrier module

MIM Milli-ampere module
MPM Main processing module
MVB Multifunction vehicle bus. Standardized serial bus originally developed

for use in trains.
NCC National Control Centre
NUM Numerical module

OCO cycle Open-close-open cycle
OCP Overcurrent protection
OEM Optical ethernet module

OLTC On load tap changer
OV Over voltage
Overreach A term used to describe how the relay behaves during a fault condition.
For example a distance relay is over-reaching when the impedance pre-
sented to it is smaller than the apparent impedance to the fault applied
to the balance point, i.e. the set reach. The relay “sees” the fault but per-
haps it should not have seen it.
PCI Peripheral component interconnect, a local data bus
PCM Pulse code modulation
1015
Glossary Chapter 22
Glossary
PCM 600 Protection and control IED manager
PC-MIP Mezzanine card standard
PISA Process interface for sensors & actuators

PMC PCI Mezzanine card
POTT Permissive overreach transfer trip
Process bus Bus or LAN used at the process level, that is, in near proximity to the
measured and/or controlled components
PSM Power supply module
PST Parameter setting tool

PT ratio Potential transformer or voltage transformer ratio
PUTT Permissive underreach transfer trip
RASC Synchrocheck relay, COMBIFLEX

RCA Relay characteristic angle
REVAL Evaluation software
RFPP Resistance for phase-to-phase faults
RFPE Resistance for phase-to-earth faults

RISC Reduced instruction set computer
RMS value Root mean square value
RS422 A balanced serial interface for the transmission of digital data in

point-to-point connections
RS485 Serial link according to EIA standard RS485
RTC Real time clock

RTU Remote terminal unit
SA Substation Automation
SC Switch or push-button to close

SCS Station control system
SCT System configuration tool according to standard IEC 61850
SLM Serial communication module. Used for SPA/LON/IEC communication.

SMA connector Subminiature version A, A threaded connector with constant impedance.
SMS Station monitoring system
SNTP Simple network time protocol – is used to synchronize computer clocks

on local area networks. This reduces the requirement to have accurate
hardware clocks in every embedded system in a network. Each embed-
ded node can instead synchronize with a remote clock, providing the
required accuracy.
SPA Strömberg protection acquisition, a serial master/slave protocol for

point-to-point communication
SRY Switch for CB ready condition
1016
Glossary Chapter 22
Glossary
ST Switch or push-button to trip
Starpoint Neutral point of transformer or generator
SVC Static VAr compensation

TC Trip coil
TCS Trip circuit supervision
TCP Transmission control protocol. The most common transport layer proto-
col used on Ethernet and the Internet.
TCP/IP Transmission control protocol over Internet Protocol. The de facto stan-
dard Ethernet protocols incorporated into 4.2BSD Unix. TCP/IP was
developed by DARPA for internet working and encompasses both net-
work layer and transport layer protocols. While TCP and IP specify two
protocols at specific protocol layers, TCP/IP is often used to refer to the
entire US Department of Defense protocol suite based upon these,
including Telnet, FTP, UDP and RDP.
TEF Time delayed earth-fault protection function
TNC connector Threaded Neill Concelman, A threaded constant impedance version of a

BNC connector
TPZ, TPY, TPX, TPS Current transformer class according to IEC
Underreach A term used to describe how the relay behaves during a fault condition.
For example a distance relay is under-reaching when the impedance
presented to it is greater than the apparent impedance to the fault
applied to the balance point, i.e. the set reach. The relay does not “see”
the fault but perhaps it should have seen it. See also Overreach.
U/I-PISA Process interface components that deliver measured voltage and cur-
rent values
UTC Coordinated universal time. A coordinated time scale, maintained by the
Bureau International des Poids et Mesures (BIPM), which forms the
basis of a coordinated dissemination of standard frequencies and time
signals. UTC is derived from International Atomic Time (TAI) by the addi-
tion of a whole number of "leap seconds" to synchronize it with Universal
Time 1 (UT1), thus allowing for the eccentricity of the Earth"s orbit, the
rotational axis tilt (23.5 degrees), but still showing the Earth"s irregular
rotation, on which UT1 is based. The Coordinated Universal Time is
expressed using a 24-hour clock and uses the Gregorian calendar. It is
used for aeroplane and ship navigation, where it also sometimes known
by the military name, "Zulu time". "Zulu" in the phonetic alphabet stands
for "Z" which stands for longitude zero.
UV Undervoltage
WEI Weak end infeed logic
VT Voltage transformer
X.21 A digital signalling interface primarily used for telecom equipment
3IO Three times zero-sequence current. Often referred to as the residual or

the earth-fault current
3UO Three times the zero sequence voltage. Often referred to as the residual
voltage or the neutral point voltage
1017
Glossary Chapter 22
Glossary
1018
1MRK 506 275-UEN
ABB AB
Substation Automation Products
SE-721 59 Västerås
Sweden
Telephone: +46 (0) 21 34 20 00
Facsimile: +46 (0) 21 14 69 18
Internet: www.abb.com/substationautomation
Printed on recycled and ecolabelled paper at Elanders Novum

1mrk506275-Uen - TRM Rel670 1.1

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Technical reference manual

Line distance protection IED REL 670

Innovation from ABB

About this manual

© Copyright 2007 ABB. All rights reserved.

Chapter 1 Introduction ..................................................................... 1

Introduction to the technical reference manual.................................... 2

Chapter 2 Local human-machine interface .................................. 11

Human machine interface.................................................................. 12

Chapter 3 Basic IED functions....................................................... 37

Analog inputs ..................................................................................... 38

Principle of operation .................................................................... 80

Chapter 4 Differential protection ................................................... 93

High impedance differential protection (PDIF, 87)............................. 94

Chapter 5 Impedance protection................................................... 97

Distance measuring zones, quadrilateral characteristic (PDIS, 21)... 98

Measuring principles.............................................................. 104

Introduction ................................................................................. 177

Input and output signals.............................................................. 232

Chapter 6 Current protection ....................................................... 245

Instantaneous phase overcurrent protection (PIOC, 50) ................. 246

Directional supervision element with

Input and output signals.............................................................. 335

Chapter 7 Voltage protection ....................................................... 349

Two step undervoltage protection (PTUV, 27)................................. 350

Function block ............................................................................ 380

Chapter 8 Frequency protection ................................................. 407

Underfrequency protection (PTUF, 81)............................................ 408

Design ................................................................................... 415

Chapter 9 Multipurpose protection ............................................. 423

General current and voltage protection (GAPC) .............................. 424

Chapter 10 Secondary system supervision.................................. 457

Current circuit supervision (RDIF).................................................... 458

du/dt and di/dt........................................................................ 466

Chapter 11 Control ......................................................................... 471

Synchronizing, synchrocheck and energizing check (RSYN, 25).... 472

Principle of operation ............................................................. 516

Function block ....................................................................... 576

Chapter 12 Scheme communication............................................. 631

logic for distance protection (PSCH, 85) ............................. 632

Input and output signals ............................................................. 659

Chapter 13 Logic............................................................................. 673

Tripping logic (PTRC, 94) ................................................................ 674

Technical data ............................................................................ 693

Chapter 14 Monitoring .................................................................... 705

Measurements (MMXU)................................................................... 706

Introduction ................................................................................. 740

Introduction ................................................................................. 791

Chapter 15 Metering ....................................................................... 795

Pulse counter logic (GGIO).............................................................. 796

Chapter 16 Station communication............................................... 805

Overview .......................................................................................... 806

LON communication protocol .......................................................... 812

Chapter 17 Remote communication ............................................. 885

Binary signal transfer to remote end................................................ 886

Chapter 18 Hardware ...................................................................... 895

Overview .......................................................................................... 896

Serial SPA/IEC 60870-5-103 and LON

Chapter 19 Labels ........................................................................... 969

Different labels ................................................................................. 970

Chapter 20 Connection diagrams.................................................. 973

Chapter 21 Time inverse characteristics ...................................... 989

Application ....................................................................................... 990