8051 Architecture

Module 2
Roadmap
 8051 -organization and architecture.
 RAM-ROM organization
 Machine cycle

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Intel MCS-51 family features:
 The Intel 8051 is Harvard architecture, single chip microcontroller (µC)
which was developed by Intel in 1980 for use in embedded systems.
 The official designation for the 8051 family is MCS 51.
 Intel's original versions were popular in the 1980s and early 1990s, but
has today largely been superseded by a vast range of faster and/or
functionally enhanced 8051-compatible devices manufactured by
more than 20 independent manufacturers including Atmel, Infineon
Technologies (formerly Siemens AG), Maxim Integrated Products (via
its Dallas Semiconductor subsidiary), NXP (formerly Philips
Semiconductor), Nuvoton (formerly Winbond), ST Microelectronics,
Silicon Laboratories (formerly Cygnal), Texas Instruments and Cypress
Semiconductor.
 Intel's original 8051 family was developed using NMOS technology,
but later versions, identified by a letter C in their name (e.g., 80C51)
used CMOS technology and were less power-hungry than their NMOS
predecessors.
 This made them more suitable for battery-powered devices.

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Important features:
 8-bit ALU, Accumulator and 8-bit Registers; hence it is an 8-bit
microcontroller
 8-bit data bus - It can access 8 bits of data in one operation
 16-bit address bus - It can access 216 memory locations - 64 KB
(65536 locations) each of RAM and ROM
 On-chip RAM - 128 bytes (data memory)
 On-chip ROM - 4 Kbyte (program memory)
 Four byte bi-directional input/output port
 UART (serial port)
 Two 16-bit Counter/timers: T0 and T1.
 Two-level interrupt priority: 2 external & 3 internal interrupt
sources.
 Oscillator and clock circuits.

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 16 bit: 0000h – FFFFh
 0000h – 0FFFh  internal ROM
 1000h – FFFFh External Memory
 4KB = 4 x 1 KB = 4 x 1024 = 22 x 210
 = 212

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Input / output pins, ports and circuits
 Microcontroller has build in input / output circuits the
connect 8051 with outside world.
 Each port has D – type output latch for each pin.
 SFR for each port is made up of these 8 latches, which can be
addressed at the SFR address at that port.
 For instance, the 8 latches for port 0 addressed at the location
80H; port 0 pin 3 is bit 2 of p0 SFR.
 The port latches should not be confused with port pins.
 The data on the SFR is not equal to data in the port pins.
 2 data paths are shown in the circuits.
 The upper buffer is enabled when the data is read.
 The lower buffer is enabled when the pin is read..
 The status of each latch may be read from a latch buffer, while
the input buffer is directly connected to each pin so that the
pin status may be read independently of latch state.

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8051 Block diagram

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Summary
Port Pin USE Port Pin USE
P0.0 P1.0
P0.1 Input / P1.1
Output
P0.2 Address P1.2
Port 0 P0.3 A0 - A7/ Port 1 P1.3 Input /
(P0) P0.4 Data (P1) P1.4 Output
D0 – D7
P0.5 P1.5
P0.6 P1.6
P0.7 P1.7

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Summary

Port Pin USE Port Pin USE Alternate use

P2.0 P3.0 P3.0 – RXD

P2.1 Input /
Output P3.1 P3.1 – TXD

P2.2 Address P3.2

Port 2 P2.3 A8 - A15 Port 3 P3.3 Input /
(P2) P2.4 (P3) P3.4 Output P3.4 – T0

P2.5 P3.5 P3.5 – T1

P2.6 P3.6
P2.7 P3.7

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The 8051 Oscillator and clock

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The 8051 Oscillator and clock
 Heart of 8051.
 It generates the pulses by which all the
internal operations are synchronized.
 XTAL1 & XTAL2 are provided for connecting a
resonant network to form an oscillator.
 Quartz crystal and capacitors are employed.
 Crystal frequency is the basic internal clock
frequency of microcontroller.
 8051 can run at specified minimum and
maximum frequencies: 1MHZ to 16 MHZ.
 Since the internal memories are dynamic, it
must always operate above a minimum
frequency or data will lost.
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The 8051 Oscillator and clock
 The basic clock rate must be divided by internal counters to
yield the standard communication bit per second (baud) rate.
 Ceramic resonators may be used as low cost alternative to
crystal oscillator.
 But decrease in frequency stability and accuracy make the
ceramic resonator as poor choice in a high speed serial data
communication.
 The oscillator generates the pulse train at the frequency of
crystal.
 The clock frequencies establishes the smallest interval time
called as pulse, p, time.
 The smallest interval of time to accomplish any simple
instruction or a part of complex instruction is machine cycle.
 A machine cycle is made up of states.
 A state is basic time interval for discrete operations of
microcontroller such as : fetch, decode, execute, write
 Two oscillator pulses define each state.

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The 8051 Oscillator and clock
 Program instruction may need one or more
machine cycles to be executed, depending on the
type of instruction
 To calculate the time taken by a particular
instruction to execute:
◦ Find the number of cycle C
Tinst = C X 12d / crystal frequency
 For example: ADD A, R1 – 1 cycle instruction
◦ Crystal frequency = 16 MHZ
◦ T = 1 X 12d / 16MHZ = 0.75µs.
8051 has 11.0592 MHZ. yields cycle frequency of
921.6KHZ.
Standard Baud rates are: 19200, 9600, 4800,2400,1200
and 300 hertz.
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COUNTERS & TIMERS
 8051 has two 16 bit UP counters named T0 &
T1.
 Each counter may be programmed to count
the internal clock pulses, acting as a timer or
programmed to count external pulses as a
counter.
 The counters may divided into two 8 bit
registers called timer low (TL0, TL1) and high
(TH0, TH1).
 All the counter actions are controlled by the
bits states in the Timer MOD Control Register
(TMOD) the timer/ counter control register
(TCON), and certain program instructions.

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Timer Counter Interrupts
 The timers in the processor is used for timing & counting
purpose.
 When a program wishes to count a certain number of internal
pulses or external events, a number is placed in one of the
counters.
 The number represents that maximum count less the desired
count plus 1.
 The counter increments from the initial number to maximum
and then rolls over to Zero on the final pulse and also set the
timer flag.
 The flag condition may be tested by an instruction to tell the
program that the count has been accomplished, or the flag
may be used to interrupt the program.

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interrupts
 A computer has only two ways to determine the
condition that exists in the internal & external
circuits.
1. Uses software instructions that jump subroutines on the
states of flags and port pins.
2. Responds to hardware signals, called interrupt that forces
the program to call a subroutine.
Software techniques uses the processor time that could be
devoted to other tasks.
Hardware interrupts take the processor time only when the
action taken by the program needed.
 Interrupts are the only way in which real time
programming can be done successfully.

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Special function register

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Special function register

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Internal RAM

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Internal Data Memory and Special Function Register
(SFR) Map

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SFR Mapping
F8H
F0H B*
E8H
E0H ACC*
D8H
D0H PSW*
C8H (T2CON)* (RCAP2L) (RCAP2H) (TL2) (TH2)
C0H
B8H IP*
B0H P3*
A8H IE*
A0H P2*
98H SCON* SBUF
90H P1*
88H TCON* TMOD TL0 TL1 TH0 TH1
80H P0* SP DPL DPH PCON

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SFR Mapping
F8H
F0H B*
E8H
E0H ACC*
D8H
D0H PSW*
C8H (T2CON)* (RCAP2L) (RCAP2H) (TL2) (TH2)
C0H
B8H IP*
B0H P3*
A8H IE*
A0H P2*
98H SCON* SBUF
90H P1*
88H TCON* TMOD TL0 TL1 TH0 TH1
80H P0* SP DPL DPH PCON

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 Program Status Word (PSW):
Address=D0H

7 6 5 4 3 2 1 0
CY AC F0 RS1 RS0 OV - P

PSW register stores the important status conditions of the

microcontroller. It also stores the bank select bits (RS1 & RS0) for
register bank selection.

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8051 Block diagram

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8051 pin diagram

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