Académique Documents
Professionnel Documents
Culture Documents
a. Weighted resistor network b. Binary ladder network c. Either (a) or (b) d. Neither (a) nor (b)
2. The advantage of using a dual slope ADC in a digital voltmeter is that a. Its conversion time is small
b. Its accuracy is high c. It gives output in BCD format d. It does not require a comparator
4. Typical size of digital IC chip is a. 1" × 1" b. 2" × 2" c. 0.1" × 0.1" d. 0.001" × 0.00
5. In analytical instrumentation, little circuitry is concerned with the amplification and processing of
signals. a) True b) False
7. 1001 is a data presented on a set of binary coded decimal output lines. What would be the decimal
equivalent of this number in the case of negative logic?
a) 9 b) 6 c) 1 d) 8
8. Given below is the equivalent circuit of a logic gate. Identify the logic gate.
9. Two switches are in parallel and are connected with a lamp and a supply in series. This represents
which of the following logic gate?
10. Two switches are in parallel and are connected with a lamp and a supply in series. This represents
which of the following logic gate?
13. A single transistor can be used to build which of the following digital logic gates?
14. Exclusive-OR (XOR) logic gates can be constructed from what other logic gates?
a) OR gates only b) AND gates and NOT gates c) AND gates, OR gates, and NOT gates
15. The AND function can be used to ___________ and the OR function can be used to _____________
16. The dependency notation “>=1” inside a block stands for which operation?
a) PMOS and NMOS b) CMOS and NMOS c) PMOS, NMOS and CMOS d) EMOS, NMOS and
PMOS
a) the time taken for the output of a gate to change after the inputs have changed
b) the time taken for the input of a gate to change after the outputs have changed
c) the time taken for the input of a gate to change after the intermediates have changed
d) the time taken for the output of a gate to change after the intermediates have changed
a) the number of outputs connected to gate without any degradation in the voltage levels
b) the number of inputs connected to gate without any degradation in the voltage levels
c) the number of outputs connected to gate with degradation in the voltage levels
d) the number of inputs connected to gate with degradation in the voltage levels
18. The maximum noise voltage that may appear at the input of a logic gate without changing the logical
state of its output is termed as
20. Small Scale Integration(SSI) refers to ICs with __________ gates on the same chip.
a) Large, Small and Medium b) Very Large, Small and Linear c) Linear and Digital
a) Plastic Grid Array b) Pin Grid Array c) Pin Greater Array d) None of the Mentioned
23. BiCMOS is an evolved semiconductor technology that integrates two formerly separate
semiconductor technologies those of the
a) CMOS and FET b) MOSFET and CMOS c) BJT and CMOS d) BJT and MOSFET
a) High speed b) High gain c) Low output resistance d) All of the Mentioned
26.