LTC1050

Precision Zero-Drift
Operational Amplifier
with Internal Capacitors
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FEATURES DESCRIPTIO
■ No External Components Required The LTC®1050 is a high performance, low cost zero-drift
■ Noise Tested and Guaranteed operational amplifier. The unique achievement of the
■ Low Aliasing Errors LTC1050 is that it integrates on-chip the two sample-and-
■ Maximum Offset Voltage: 5µV hold capacitors usually required externally by other chop-
■ Maximum Offset Voltage Drift: 0.05µV/°C per amplifiers. Further, the LTC1050 offers better com-
■ Low Noise: 1.6µVP-P (0.1Hz to 10Hz) bined overall DC and AC performance than is available
■ Minimum Voltage Gain: 130dB from other chopper stabilized amplifiers with or without
■ Minimum PSRR: 125dB internal sample-and-hold capacitors.
■ Minimum CMRR: 120dB
The LTC1050 has an offset voltage of 0.5µV, drift of
■ Low Supply Current: 1mA
0.01µV/°C, DC to 10Hz, input noise voltage of 1.6µVP-P
■ Single Supply Operation: 4.75V to 16V
and a typical voltage gain of 160dB. The slew rate of 4V/µs
■ Input Common Mode Range Includes Ground
and a gain bandwidth product of 2.5MHz are achieved with
■ Output Swings to Ground
only 1mA of supply current.
■ Typical Overload Recovery Time: 3ms
U Overload recovery times from positive and negative satu-
APPLICATIO S ration conditions are 1.5ms and 3ms respectively, which
represents an improvement of about 100 times over chop-
■ Thermocouple Amplifiers per amplifiers using external capacitors. Pin 5 is an optional
■ Electronic Scales external clock input, useful for synchronization purposes.
■ Medical Instrumentation
■ Strain Gauge Amplifiers The LTC1050 is available in standard 8-pin metal can,
■ High Resolution Data Acquisition plastic and ceramic dual-in-line packages as well as an
■ DC Accurate RC Active Filters SO-8 package. The LTC1050 can be an improved plug-in
, LTC and LT are registered trademarks of Linear Technology Corporation. replacement for most standard op amps.

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TYPICAL APPLICATIO
High Performance, Low Cost Instrumentation Amplifier Noise Spectrum
5V 160

4 140
VOLTAGE NOISE DENSITY (nV/√Hz)

5V
1/2 LTC1043 120
3 7
7 8 +
6 100
LTC1050 VOUT
2 80
11 – 4
DIFFERENTIAL CS CH 60
INPUT 1µF 1µF – 5V
1µF 40
12
20
R1 R2
13 14 0
1050 TA01 10 100 1k 10k 100k
CMRR > 120dB AT DC FREQUENCY (Hz)
16 17
0.01µF CMRR > 120dB AT 60Hz 1050 TA02

DUAL SUPPLY OR SINGLE 5V

GAIN = 1 + R2/R1
VOS = 5µV
– 5V COMMON MODE INPUT VOLTAGE EQUALS THE SUPPLIES
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LTC1050
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ABSOLUTE AXI U RATI GS (Note 1)
Total Supply Voltage (V + to V –) .............................. 18V Operating Temperature Range
Input Voltage ........................ (V + + 0.3V) to (V – – 0.3V) LTC1050AC/C .................................. – 40°C to 85°C
Output Short-Circuit Duration ......................... Indefinite LTC1050H ..................................... – 40°C to 125°C
Storage Temperature Range ................ – 65°C to 150°C LTC1050AM/M (OBSOLETE) .......... – 55°C to 125°C
Lead Temperature (Soldering, 10 sec)................. 300°C
U W U
PACKAGE/ORDER I FOR ATIO
TOP VIEW ORDER PART ORDER PART
NC NUMBER TOP VIEW
NUMBER
8
NC 1 7 V + (CASE)
LTC1050ACH NC 1 8 NC LTC1050CS8
–IN 2 6 OUT LTC1050CH –IN 2
–
7 V+ LTC1050HS8
+IN 3 5 EXT CLOCK
LTC1050AMH +IN 3
+
6 OUT
4 INPUT LTC1050MH V– 4 5 EXT CLOCK
V– INPUT S8 PART MARKING
H PACKAGE S8 PACKAGE
8-LEAD TO-5 METAL CAN 8-LEAD PLASTIC SO
1050
TJMAX = 150°C TJMAX = 150°C, θJA = 150°C/W
1050H
OBSOLETE PACKAGE
TOP VIEW ORDER PART TOP VIEW
ORDER PART
NC 1 8 NC
NUMBER NUMBER
NC 1 14 NC
–IN 2 7 V+
LTC1050ACN8 NC 2 13 NC LTC1050CN
+IN 3 OUT
6
LTC1050CN8 NC 3 12 NC
V– 4 5 EXT CLOCK
–IN 4 11 V +
INPUT
N8 PACKAGE +IN 5 10 OUT
8-LEAD PDIP
LTC1050ACJ8
NC 6 9 NC
TJMAX = 150°C, θJA = 100°C/W LTC1050CJ8
V– 7 8 NC
J8 PACKAGE 8-LEAD CERDIP LTC1050AMJ8
TJMAX = 150°C, θJA = 100°C/W LTC1050MJ8 N PACKAGE
14-LEAD PDIP
OBSOLETE PACKAGE TJMAX = 150°C, θJA = 70°C/W
Consider the N8 Package for Alternate Source

Consult LTC Marketing for parts specified with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. VS = ±5V
LTC1050AM LTC1050AC
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Input Offset Voltage (Note 3) ±0.5 ±5 ±0.5 ±5 µV
Average Input Offset Drift (Note 3) ● ±0.01 ±0.05 ±0.01 ±0.05 µV/°C
Long Term Offset Voltage Drift 50 50 nV/√Mo
Input Offset Current (Note 5) ±20 ±60 ±20 ±60 pA
● ±300 ±150 pA
Input Bias Current (Note 5) ±10 ±30 ±10 ±30 pA
● ±2000 ±100 pA
Input Noise Voltage 0.1Hz to 10Hz (Note 6) 1.6 2.1 1.6 2.1 µVP-P
DC to 1Hz 0.6 0.6 µVP-P
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 LTC1050

ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. VS = ±5V
LTC1050AM LTC1050AC
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Input Noise Current f = 10Hz (Note 4) 1.8 1.8 fA/√Hz
Common Mode Rejection Ratio VCM = V – to 2.7V 114 140 114 140 dB
● 110 110 dB
Power Supply Rejection Ratio VS = ±2.375V to ±8V ● 125 140 125 140 dB
Large-Signal Voltage Gain RL = 10k, VOUT = ±4V ● 130 160 130 160 dB
Maximum Output Voltage Swing RL = 10k ● ± 4.7 ±4.85 ±4.7 ±4.85 V
RL = 100k ±4.95 ±4.95 V
Slew Rate RL = 10k, CL = 50pF 4 4 V/µs
Gain Bandwidth Product 2.5 2.5 MHz
Supply Current No Load 1 1.5 1 1.5 mA
● 2.3 2.3 mA
Internal Sampling Frequency 2.5 2.5 kHz

The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VS = ±5V
LTC1050M/H LTC1050C
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Input Offset Voltage (Note 3) ±0.5 ±5 ±0.5 ±5 µV
Average Input Offset Drift (Note 3) ● ±0.01 ±0.05 ±0.01 ±0.05 µV/°C
Long Term Offset Voltage Drift 50 50 nV/√Mo
Input Offset Current (Note 5) ±20 ±100 ±20 ±125 pA
● ±300 ±200 pA
Input Bias Current (Note 5) ±10 ±50 ±10 ±75 pA
● ±2000 ±150 pA
Input Noise Voltage RS = 100Ω, 0.1Hz to 10Hz (Note 6) 1.6 1.6 µVP-P
RS = 100Ω, DC to 1Hz 0.6 0.6 µVP-P
Input Noise Current f = 10Hz (Note 4) 1.8 1.8 fA/√Hz
Common Mode Rejection Ratio VCM = V – to 2.7V 114 130 114 130 dB
LTC1050M/C ● 110 110 dB
LTC1050H ● 100 dB
Power Supply Rejection Ratio VS = ±2.375V to ±8V, LTC1050M/C ● 120 140 120 140 dB
LTC1050H ● 110 dB
Large-Signal Voltage Gain RL = 10k, VOUT = ±4V ● 120 160 120 160 dB
Maximum Output Voltage Swing RL = 10k ● ± 4.7 ±4.85 ±4.7 ±4.85 V
RL = 100k ±4.95 ±4.95 V
Slew Rate RL = 10k, CL = 50pF 4 4 V/µs
Gain Bandwidth Product 2.5 2.5 MHz
Supply Current No Load 1 1.5 1 1.5 mA
● 2.3 2.3 mA
Internal Sampling Frequency 2.5 2.5 kHz

Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: Connecting any terminal to voltages greater than V + or less than
V – may cause destructive latchup. It is recommended that no sources
operating from external supplies be applied prior to power-up of the
LTC1050.
Note 3: These parameters are guaranteed by design. Thermocouple effects
preclude measurement of these voltage levels in high speed automatic test
systems. VOS is measured to a limit determined by test equipment
capability.
Note 4: Current Noise is calculated from the formula: In = √(2q • Ib)
where q = 1.6 • 10 –19 Coulomb.
Note 5: At TA ≤ 0°C these parameters are guaranteed by design and not
tested.
Note 6: Every lot of LTC1050AM and LTC1050AC is 100% tested for
Broadband Noise at 1kHz and sample tested for Input Noise Voltage at
0.1Hz to 10Hz.
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LTC1050
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TYPICAL PERFOR A CE CHARACTERISTICS
Offset Voltage 10HzP-P Noise Common Mode Input Range
vs Sampling Frequency vs Sampling Frequency vs Supply Voltage
10 8 8
VS = ± 5V VS = ± 5V VCM = V –
7 6

10Hz PEAK-TO-PEAK NOISE (µV)

8

COMMON MODE RANGE (V)

6 4
OFFSET VOLTAGE (µV)

5 2
6
4 0
4 3 –2

2 –4
2
1 –6

0 0 –8
2.0 2.5 3.0 3.5 4.0 4.5 100 1k 10k 0 ±1 ±2 ±3 ±4 ±5 ±6 ±7 ±8
SAMPLING FREQUENCY, fS (kHz) SAMPLING FREQUENCY, fS (Hz) SUPPLY VOLTAGE (V)
1050 G01 1050 G02 1050 G03

Sampling Frequency Sampling Frequency

vs Supply Voltage vs Temperature Overload Recovery
3.5 5
TA = 25°C VS = ± 5V
200mV
INPUT
SAMPLING FREQUENCY, fS (kHz)
SAMPLING FREQUENCY, fS (kHz)

4 0V
3.0

3 0V
2.5 OUTPUT
2
– 5V
2.0
1
1050 G6
AV = – 100 0.5ms/DIV
VS = ±5V
1.5 0
4 6 8 10 12 14 16 –50 –25 0 25 50 75 100 125
TOTAL SUPPLY VOLTAGE, V + TO V – (V) AMBIENT TEMPERATURE, TA (°C)
1050 G04 1050 G05

Short-Circuit Output Current

Supply Current vs Supply Voltage Supply Current vs Temperature vs Supply Voltage
1.50 2.0 6
SHORT-CIRCUIT OUTPUT CURRENT, IOUT (mA)

TA = 25°C VS = ± 5V
1.8
1.25 4
1.6
ISOURCE
SUPPLY CURRENT, IS (mA)
SUPPLY CURRENT, IS (mA)

1.4 VOUT = V –
1.00 2
1.2

0.75 1.0 0
0.8
0.50 –10
0.6
0.4 ISINK
0.25 –20 VOUT = V +
0.2

0 0 –30
4 6 8 10 12 14 16 –50 –25 0 25 50 75 100 125 4 6 8 10 12 14 16
TOTAL SUPPLY VOLTAGE, V + TO V – (V) AMBIENT TEMPERATURE, TA (°C) TOTAL SUPPLY VOLTAGE, V + TO V – (V)
1050 G07 1050 G08 1050 G09

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 LTC1050
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TYPICAL PERFOR A CE CHARACTERISTICS
Gain/Phase vs Frequency Small-Signal Transient Response Large-Signal Transient Response
120 60

100 80
VOUT

PHASE SHIFT (DEGREES)

80 100
VOLTAGE GAIN (dB)

PHASE
60 120 100mV 2V
GAIN STEP
40 140
VIN = 6V
20 160

0 VS = ± 5V 180
TA = 25°C 1050 G11 1050 G12
– 20 200 AV = 1 AV = 1
CL = 100pF
RL = 10k RL = 10k
RL ≥ 1k
CL = 100pF CL = 100pF
– 40 220
100 1k 10k 100k 1M 10M VS = ±5V VS = ±5V
FREQUENCY (Hz)
1050 G10

LTC1050 DC to 1Hz Noise

0.5µV

1050 G13

10 SEC

LTC1050 DC to 10Hz Noise

1µV

1050 G14

1 SEC

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LTC1050

TEST CIRCUITS
Electrical Characteristics Test Circuit DC-10Hz Noise Test Circuit
1M 100k 475k

0.015µF
V+
1k 10Ω
2 7
– – 158k 316k 475k
6
LTC1050 OUTPUT LTC1050 –
3 TO X-Y
+ RL + 0.015µF 0.015µF LT®1012
RECORDER
4
+
V– 1050 TC01
FOR 1Hz NOISE BW, INCREASE ALL
THE CAPACITORS BY A FACTOR OF10 1050 TC02

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APPLICATI S I FOR ATIO
ACHIEVING PICOAMPERE/MICROVOLT V+

PERFORMANCE

Picoamperes OUTPUT 8
7 1
In order to realize the picoampere level of accuracy of the 6

LTC1050, proper care must be exercised. Leakage currents OPTIONAL

5 2
EXTERNAL
in circuitry external to the amplifier can significantly degrade CLOCK 4 3
performance. High quality insulation should be used (e.g.,

TS
Teflon, Kel-F); cleaning of all insulating surfaces to remove

PU
IN
fluxes and other residues will probably be necessary—
V–
particularly for high temperature performance. Surface GUARD 1050 F01

coating may be necessary to provide a moisture barrier in

high humidity environments.
Board leakage can be minimized by encircling the input
connections with a guard ring operated at a potential close
to that of the inputs: in inverting configurations the guard
ring should be tied to ground; in noninverting connections
to the inverting input (see Figure 1). Guarding both sides
of the printed circuit board is required. Bulk leakage reduc-
tion depends on the guard ring width.
Microvolts
Thermocouple effect must be considered if the LTC1050’s
ultralow drift is to be fully utilized. Any connection of dis-
similar metals forms a thermoelectric junction producing
an electric potential which varies with temperature (Seebeck
effect). As temperature sensors, thermocouples exploit this
phenomenon to produce useful information. In low drift
amplifier circuits the effect is a primary source of error.
Connectors, switches, relay contacts, sockets, resistors,
solder and even copper wire are all candidates for thermal
Figure 1
EMF generation. Junctions of copper wire from different
manufacturers can generate thermal EMFs of 200nV/°C—
4 times the maximum drift specification of the LTC1050.
The copper/kovar junction, formed when wire or printed
circuit traces contact a package lead, has a thermal EMF of
approximately 35µV/°C—700 times the maximum drift
specification of the LTC1050.
Minimizing thermal EMF-induced errors is possible if ju-
dicious attention is given to circuit board layout and
component selection. It is good practice to minimize the
number of junctions in the amplifier’s input signal path.
Avoid connectors, sockets, switches and relays where
possible. In instances where this is not possible, attempt
to balance the number and type of junctions so that differ-
ential cancellation occurs. Doing this may involve
deliberately introducing junctions to offset unavoidable
junctions.
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 LTC1050
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APPLICATI S I FOR ATIO
Figure 2 is an example of the introduction of an unneces- PACKAGE-INDUCED OFFSET VOLTAGE
sary resistor to promote differential thermal balance. Package-induced thermal EMF effects are another impor-
Maintaining compensating junctions in close physical prox- tant source of errors. It arises at the copper/kovar junctions
imity will keep them at the same temperature and reduce formed when wire or printed circuit traces contact a
thermal EMF errors. package lead. Like all the previously mentioned thermal
EMF effects, it is outside the LTC1050’s offset nulling loop
NOMINALLY
UNNECESSARY LEAD WIRE/SOLDER/COPPER
and cannot be cancelled. The input offset voltage specifi-
RESISTOR USED TO
THERMALLY BALANCE
TRACE JUNCTION cation of the LTC1050 is actually set by the package-induced
OTHER INPUT RESISTOR warm-up drift rather than by the circuit itself. The thermal
+ time constant ranges from 0.5 to 3 minutes, depending
LTC1050 OUTPUT
upon package type.
–
RESISTOR LEAD, SOLDER
COPPER TRACE JUNCTION
OPTIONAL EXTERNAL CLOCK
An external clock is not required for the LTC1050 to
1050 F02 operate. The internal clock circuit of the LTC1050 sets the
nominal sampling frequency at around 2.5kHz. This fre-
quency is chosen such that it is high enough to remove the
amplifier 1/f noise, yet still low enough to allow internal
Figure 2
circuits to settle.The oscillator of the internal clock circuit
has a frequency 4 times the sampling frequency and its
output is brought out to Pin 5 through a 2k resistor. When
When connectors, switches, relays and/or sockets are the LTC1050 operates without using an external clock,
necessary they should be selected for low thermal EMF Pin 5 should be left floating and capacitive loading on this
activity. The same techniques of thermally balancing and pin should be avoided. If the oscillator signal on Pin 5 is
coupling the matching junctions are effective in reducing used to drive other external circuits, a buffer with low
the thermal EMF errors of these components. input capacitance is required to minimize loading on this
Resistors are another source of thermal EMF errors. pin. Figure 3 illustrates the internal sampling frequency
Table 1 shows the thermal EMF generated for different versus capacitive loading at Pin 5.
resistors. The temperature gradient across the resistor is
important, not the ambient temperature. There are two
3
junctions formed at each end of the resistor and if these VS = ± 5V
junctions are at the same temperature, their thermal
SAMPLING FREQUENCY, fS (kHz)

EMFs will cancel each other. The thermal EMF numbers

are approximate and vary with resistor value. High values
give higher thermal EMF. 2
Table 1. Resistor Thermal EMF
RESISTOR TYPE THERMAL EMF/°C GRADIENT
Tin Oxide ~mV/°C
Carbon Composition ~450µV/°C
1
Metal Film ~20µV/°C 1 5 10 100
CAPACITANCE LOADING (pF)
Wire Wound
1050 F03
Evenohm ~2µV/°C
Manganin ~2µV/°C Figure 3. Sampling Frequency vs Capacitance Loading at Pin 5
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LTC1050
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APPLICATI S I FOR ATIO
When an external clock is used, it is directly applied to
Pin 5. The internal oscillator signal on Pin 5 has very low
drive capability and can be overdriven by any external
signal. When the LTC1050 operates on ±5V power sup-
plies, the external clock level is TTL compatible.
Using an external clock can affect performance of the
LTC1050. Effects of external clock frequency on input
offset voltage and input noise voltage are shown in the
Typical Performance Characteristics section. The sam-
pling frequency is the external clock frequency divided
by 4. Input bias currents at temperatures below 100°C
are dominated by the charge injection of input switches
and they are basically proportional to the sampling
frequency. At higher temperatures, input bias currents
are mainly due to leakage currents of the input protection
devices and are insensitive to the sampling frequency.
LOW SUPPLY OPERATION
The minimum supply for proper operation of the LTC1050
is typically below 4V (±2V). In single supply applications,
PSRR is guaranteed down to 4.7V (±2.35V) to ensure
proper operation down to the minimum TTL specified
voltage of 4.75V.
PIN COMPATIBILITY
The LTC1050 is pin compatible with the 8-pin versions of
7650, 7652 and other chopper-stabilized amplifiers. The
7650 and 7652 require the use of two external capacitors
connected to Pin 1 and Pin 8 that are not needed for the
LTC1050. Pin 1 and Pin 8 of the LTC1050 are not con-
nected internally while Pin 5 is an optional external clock
input pin. The LTC1050 can be a direct plug-in for the 7650
and 7652 even if the two capacitors are left on the circuit
board.
In applications operating from below 16V total power
supply, (±8V), the LTC1050 can replace many industry
standard operational amplifiers such as the 741, LM101,
LM108, OP07, etc. For devices like the 741 and LM101,
the removal of any connection to Pin 5 is all that is
needed.

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TYPICAL APPLICATI S
Strain Gauge Signal Conditioner with Bridge Excitation

120Ω 2.5V
5V *
350Ω 5V
LT1009 BRIDGE
3 7
+
6 OUTPUT
LTC1050
10k ± 2.5V
2
301k ZERO – 4 R2
RN60C C**
0.1%
5V – 5V

2 7
– 1N4148 GAIN R1
6 2k 0.1%
TRIM
LTC1050 2N2907
3
+ 4
1050 TA03

51Ω
2W *OPTIONAL REFERENCE OUT TO MONITORING
– 5V 10-BIT A/D CONVERTER
– 5V **AT GAIN = 1000, 10Hz PEAK-TO-PEAK NOISE
IS < 0.5LSB FOR 10-BIT RESOLUTION

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 LTC1050
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TYPICAL APPLICATI S

Single Supply Thermocouple Amplifier Air Flow Detector

1k 255k 5V
1% 100Ω 1% 10k

0.068µF 100k
1% 1k
2 7
–
LT1004-1.2 6 5V = NO AIR FLOW
5V LTC1050
43.2Ω 0V = AIR FLOW
5V 3
2
– 7 1% + 4
2 6 VOUT
LTC1050
10mV/°C
7 3 – –
K
– + + 4
AMBIENT
TEMPERATURE 240Ω
LT1025A 0.1µF STILL AIR
+ TYPE K +
TYPE K
GND R–
4 5
0°C ~ 100°C TEMPERATURE RANGE AIR FLOW
1050 TA06

1050 TA04

Battery-Operated Temperature Monitor with 10-Bit Serial Output A/D

VIN = 9V
2 6
LT1021C-5
0.1µF
+
4 10µF
1k 3.4k 178k
0.1% 1% 0.1% 1N4148

0.33µF

LTC1092
2 7 1 8
– CS VCC TO µP*
2 6 47Ω 2 7
LTC1050 +IN CLK
VIN 8 3 3 6
J
– + + 4
–IN DOUT
1µF 4 5
LT1025A 1µF GND VREF
1050 TA05
TYPE J
GND R–
4 5 0°C ~ 500°C TEMPERATURE RANGE
2°C MAX ERROR
*THERMOCOUPLE LINEARIZATION CODE AVAILABLE FROM LTC

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LTC1050
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TYPICAL APPLICATI S

Fast Precision Inverter ±100mA Output Drive

10k
1% 10k 10k
INPUT VIN
5pF 5V 5V
100pF 100k
10k 2 7
100pF – VOUT
1000pF 6
5V LTC1050 LT1010
±100mA
3
5V 2 7
+ 4
– RL
2 7 6 – 5V – 5V
– LT318A OUTPUT
1050 TA08
6 3
LTC1050 + 4
FULL POWER BANDWIDTH = 10kHz
10k 3 VOS = 5µV
+ 4
VOS/∆T = 50nV/°C
10k – 5V GAIN = 10
– 5V
1050 TA07

FULL POWER BANDWIDTH = 2MHz

SLEW RATE ≥ 40V/µs
SETTLING TIME = 5µs TO 0.01% (10V STEP)
OFFSET VOLTAGE = 5µV
OFFSET DRIFT = 50nV/°C

Ground Referred Precision Current Sources

LT1034 +
VOUT
0 ≤ IOUT ≤ 25mA* –
V+ 0.2V ≤ VOUT ≤ (V +) – 2V IOUT = 1.235V
RSET
2N2222 *MAXIMUM CURRENT LIMITED BY
POWER DISSIPATION OF 2N2222
10k 2 3
7 7
– +
6 6 RSET
LTC1050 LTC1050
RSET 10k
3 2
+ 4
– 4

2N2907 0 ≤ IOUT ≤ 25mA*

(V –) + 2V ≤ VOUT ≤ –1.8V
IOUT = 1.235V
RSET V– LT1034 *MAXIMUM CURRENT LIMITED BY
+ POWER DISSIPATION OF 2N2907
VOUT
– 1050 TA09

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 LTC1050
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TYPICAL APPLICATI S

Precision Voltage Controlled Current Source

with Ground Referred Input and Output

5V

INPUT 3 7
0V TO +
3.2V 6
LTC1050 2N2222
2
– 4

0.68µF

5V
1k
4
LTC1043
8 7

11

1µF 1µF 100Ω

12

14 13

VIN
17 16 IOUT =
100Ω
0.001µF

1050 TA10

Sample-and-Hold Amplifier Ultraprecision Voltage Inverter

LTC1043
2
– VIN 7 8
6
LTC1043 LTC1050 VOUT
3
NC 6 5 + 11
C1 C2 V+
CL 1µF 1µF
2 2 7
0.01µF 12 –
6
SAMPLE HOLD 16 17 LTC1050 VOUT
3
VIN 1050 TA11 13 14 + 4
FOR 1V ≤ VIN ≤ 4V, THE HOLD STEP IS ≤300µV.
ACQUISTION TIME IS DETERMINED BY THE SWITCH RON. 16 17 V–
CL TIME CONSTANT 0.01µF FOR VS = ±5V, (V – ) + 1.8V < VIN < V +
VOUT = – VIN ±20ppm
1050 TA12 MATCHING BETWEEN C1 AND C2 NOT REQUIRED

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LTC1050
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TYPICAL APPLICATI S

Instrumentation Amplifier with Low Offset and Input Bias Current

C

2
– 1k 100k
6 0.1% 0.1%
LTC1050
3
+
– 2
–
6
INPUT LTC1050 OUTPUT
3
+
+ 3
+ 1k 100k
6 0.1% 0.1%
LTC1050
2
–
1050 TA13

OFFSET VOLTAGE ≤ ±10µV

INPUT BIAS CURRENT = 15pA
CMRR = 100dB FOR GAIN = 100
INPUT REFERRED NOISE = 5µVP-P FOR C = 0.1µF
= 20µVP-P FOR C = 0.01µF

Instrumentation Amplifier with 100V Common Mode Input Voltage

1k

1M
V+
1M 2 7 V+
+ –
6 1k 2 7
VIN
1M
LTC1050 –
3 6
– + 4
LTC1050 VOUT
3
1k +
V– 4

V– 1050 TA14

OUTPUT OFFSET ≤ 5mV

FOR 0.1% RESISTORS, CMRR = 54dB

Single Supply Instrumentation Amplifier

1k

1M
V+
1M 2 7 V+
–
6 1k 2 7
LTC1050 –
3 6
–VIN + 4
LTC1050 VOUT
3
+VIN + 4

1050 TA15

OUTPUT OFFSET ≤ 5mV

FOR 0.1% RESISTORS, CMRR = 54dB
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12
 LTC1050
UO
TYPICAL APPLICATI S

Photodiode Amplifier

15pF

500k

5V
2 7
–
HP 6
LTC1050 VOUT
5082-4204
3 1050 TA16
+ 4
500k

6 Decade Log Amplifier

MAT-01 MAT-01

0.0022µF 22pF
5V
3k
10k 5V 1% 5V 2.5M 25k
0.1% 2 7 2M† 7 2 0.1%
VIN – 15.7k – 2.5V
1% 1N4148†
6 0.1% 6
IIN LTC1050 LTC1050 LT1009
3 3
+ 4 VOUT
1k*
4
+ 1050 TA17
0.1%
–5V –5V
ERROR REFERRED TO INPUT <1%
FOR INPUT CURRENT RANGE 1nA ~ 1mA
*TEL LAB TYPE Q81
†CORRECTS FOR NONLINEARITIES
VOUT = –LOG ( )
IIN
1µA
V
10mV ( )
= –LOG IN = –LOG(VIN) – 2V

DC Accurate, 10Hz, 7th Order Lowpass Bessel Filter

R R′ R′ 8V
16k 196k 196k 3 7
VIN +
C C2 C1 6
0.47µF 1 8 LTC1050 VOUT
0.047µF 0.047µF
2
2 7 – 4
3 LTC1062 6
–8V –8V
1N4148 4 5 fCLK 1050 TA18

0.1µF 2kHz
• WIDEBAND NOISE 52µVRMS
8V
• LINEAR PHASE
0.1µF • VIN ≤ ±6V
• CLOCK TO CUTOFF FREQUENCY RATIO = 200:1

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13
LTC1050
U
PACKAGE DESCRIPTIO
H Package
8-Lead TO-5 Metal Can (.200 Inch PCD)
(Reference LTC DWG # 05-08-1320)

0.335 – 0.370
(8.509 – 9.398)
DIA
0.027 – 0.045
0.305 – 0.335
(0.686 – 1.143)
(7.747 – 8.509)
45°TYP PIN 1
0.040
0.050 0.028 – 0.034
(1.016)
MAX (1.270) 0.165 – 0.185 (0.711 – 0.864)
MAX (4.191 – 4.699)
0.200
REFERENCE (5.080)
SEATING PLANE
GAUGE TYP
PLANE 0.500 – 0.750
PLANE
0.010 – 0.045* (12.700 – 19.050)
H8(TO-5) 0.200 PCD 1197
(0.254 – 1.143) 0.110 – 0.160
0.016 – 0.021** (2.794 – 4.064)
(0.406 – 0.533) INSULATING
STANDOFF
*LEAD DIAMETER IS UNCONTROLLED BETWEEN THE REFERENCE PLANE
AND 0.045" BELOW THE REFERENCE PLANE
0.016 – 0.024
**FOR SOLDER DIP LEAD FINISH, LEAD DIAMETER IS
(0.406 – 0.610)

J8 Package
8-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)

CORNER LEADS OPTION

(4 PLCS)

0.023 – 0.045
(0.584 – 1.143)
HALF LEAD 0.405
OPTION (10.287)
0.045 – 0.068 0.200 0.005 MAX
0.300 BSC
(1.143 – 1.727) (5.080) (0.127)
(0.762 BSC) MAX MIN
FULL LEAD 8 7 6 5
OPTION
0.015 – 0.060
(0.381 – 1.524)
0.025 0.220 – 0.310
(0.635) (5.588 – 7.874)
RAD TYP
0.008 – 0.018
0° – 15°
(0.203 – 0.457)
1 2 3 4 J8 1298

0.045 – 0.065
0.125
(1.143 – 1.651)
3.175
0.014 – 0.026 MIN
0.100
(0.360 – 0.660) (2.54)
BSC
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS

OBSOLETE PACKAGES

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14
 LTC1050
U
PACKAGE DESCRIPTIO
N8 Package
8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
0.400*
(10.160)
0.300 – 0.325 0.045 – 0.065 0.130 ± 0.005 MAX
(7.620 – 8.255) (1.143 – 1.651) (3.302 ± 0.127)
8 7 6 5

0.065
0.255 ± 0.015*
(1.651)
0.009 – 0.015 TYP (6.477 ± 0.381)
(0.229 – 0.381) 0.125
(3.175) 0.020
+0.035 MIN (0.508) 1 2 3 4
0.325 –0.015
0.100 0.018 ± 0.003 MIN

( )
N8 1098
+0.889 (2.54)
8.255 (0.457 ± 0.076)
–0.381 BSC
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)

N Package
14-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)

0.770*
(19.558)
0.300 – 0.325 0.130 ± 0.005 0.045 – 0.065 MAX
(7.620 – 8.255) (3.302 ± 0.127) (1.143 – 1.651)
14 13 12 11 10 9 8

0.020
(0.508) 0.255 ± 0.015*
MIN 0.065 (6.477 ± 0.381)
0.009 – 0.015 (1.651)
(0.229 – 0.381) TYP

+0.035 7
0.325 –0.015 0.005 1 2 3 4 5 6
0.125 0.018 ± 0.003
(0.125)
( )
N14 1098
+0.889 (3.175) (0.457 ± 0.076)
8.255 MIN 0.100
–0.381 MIN
(2.54)
BSC
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)

S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)

0.189 – 0.197*
(4.801 – 5.004)
0.010 – 0.020 8 7 6 5
× 45° 0.053 – 0.069
(0.254 – 0.508)
(1.346 – 1.752)
0.004 – 0.010
0.008 – 0.010
0°– 8° TYP (0.101 – 0.254)
(0.203 – 0.254)

0.228 – 0.244 0.150 – 0.157**

0.016 – 0.050 (5.791 – 6.197) (3.810 – 3.988)
0.014 – 0.019 0.050
(0.406 – 1.270)
(0.355 – 0.483) (1.270)
TYP BSC
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SO8 1298
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD 1 2 3 4
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
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15
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC1050
UO
TYPICAL APPLICATI S
DC Accurate 10th Order Max Flat Lowpass Filter

5V
C
2 7
–
6 R
VOUT
LTC1050
0.12R R (DC ACCURATE)
3
VIN + 4
C C
–5V
1 8 1 8
2 7 2 7
3 LTC1062 6 3 LTC1062 6
–5V 5V –5V 5V
4 5 4 5
0.1µF 0.1µF

fCLK
( )
f
• fCUTOFF = 0.9 CLK
0.2244
100
1050 TA19

• RC =
fCUTOFF
• 60dB/OCT. SLOPE
• PASSBAND ERROR <0.1dB FOR 0 ≤ f ≤ 0.67fCUTOFF
• THD = 0.04%, WIDEBAND NOISE = 120µVRMS
• fCLK ≅ 100kHz

DC Accurate, Noninverting 2nd Order Lowpass Filter Gain of 1, 10Hz 3rd Order Bessel DC Accurate Lowpass Filter

R4

5V 5V
R3 2 2 7
7
– –
6 R3 R1 R2 6
LTC1050 VOUT LTC1050
R1 R2 3 5.9k 47.5k 24.3k 3
VIN + + 4
4
C3 C1 C2
–5V 2µF 0.47µF 0.22µF –5V
C1 C2
1050 TA21
1050 TA20

Q = 0.707, fC = 20Hz. FOR fC = 10Hz, THE RESISTOR (R1, R2) VALUES SHOULD BE DOUBLED

COMPONENT VALUES
DC GAIN R3 R4 R1 R2 C1 C2
1 ∞ 0 32.4k 18.7k 0.47µF 0.22µF
2 10k 10k 11.8k 24.3k 0.47µF 0.47µF
4 10.5k 31.6k 18.7k 34.8k 0.22µF 0.47µF
6 10.2k 51.1k 14k 46.4k 0.22µF 0.47µF
8 10.2k 71.5k 11.8k 54.9k 0.22µF 0.47µF
10 10.1k 90.9k 10.5k 61.9k 0.22µF 0.47µF

RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LTC1051 Dual Zero-Drift Op Amp’s Dual Version of the LTC1050
LTC2050 Zero-Drift Op Amp SOT-23 Package
LTC2051 Zero-Drift Op Amp’s Dual Version of the LTC2050 in an MS8 Package
LTC2053 Zero-Drift Instrumentation Amp 110dB CMRR, MS8 Package, Gain Programmable
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LW/TP 0802 1K • PRINTED IN USA

Linear Technology Corporation
16 1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ●
www.linear.com  LINEAR TECHNOLOGY CORPORATION 1991