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Kirchoff’s Voltage Law

Leonard MacEachern
October 3, 2010

Kirchoff’s voltage law states that the algebraic sum of the voltages encountered
when traversing a closed1 loop must total to zero. Mathematically, we can write
X
v = 0, (1)
Li

where Li is any loop in the circuit, and v are the voltages found in the loop. This
equation must hold for all loops in the circuit.
The term “algebraic sum” means that if we move through an element in the
direction of a voltage rise, then that element’s voltage is added as a positive quantity
in the summation. Conversely, if we move through an element in the direction of
a voltage drop, then that element’s voltage is added as a negative quantity in the
voltage summation.
Note that a voltage rise v is the same as a “negative voltage drop” of −v. So, we
could write the KVL equation as,
X
vrise = 0, (2)
Li

where Li is any loop in the circuit, and vrise are the voltage rises found in the loop.
We still include the voltage drops, but we just enter them as negative quantities.
Same as above, really. Don’t get confused.
Going further with this, we could also write the KVL equation as,
X
vdrop = 0, (3)
Li

where Li is any loop in the circuit, and vdrop are the voltage drops found in the loop.
We still include the voltage rises, but we just enter them as negative quantities.
1
Loops are closed by definition. I added the word closed here to remind you.

1
Seems redundant, and perhaps it is, but you’ll encounter different ways of writing
the same thing all the time.
One good way to write out the KVL equation is to balance the voltage rises with
the voltage drops, since the whole idea of KVL is that the total of the rises and drops
should be zero. In other words, the sum of the voltage rises will equal the sum of
the voltage drops. Hence we can write,
X X
vrise = vdrop , (4)
Li Li

where Li is any loop in the circuit, vrise are the voltage rises found in the loop, and
vdrop are the voltage drops found in the loop.

1 Example of KVL
Consider the circuit shown in Figure 1. You should verify that there are six nodes,
eight branches, and seven loops in this circuit. The boxes labelled from A through
H represent any linear circuit component, such as R, L, C, or a voltage source.
vA
A

vB vC
B C

vH H vF F D vD

vG vE
G E

Figure 1: This is an example circuit used for discussion of KVL.

The seven loops for the circuit shown in Figure 1 are listed in Table 1. Note that
any of the loops given in Table 1 could have been traversed in the opposite direction.

2
For example, we could have written HGEDA for L1. Usually it’s best to stick with
a certain orientation (clockwise or counter-clockwise) in order to avoid confusion.

Table 1: Loops for the circuit shown in Figure 1.

Loop Name Path Followed


L1 ADEGH
L2 HBFG
L3 FCDE
L4 ABC
L5 HACFG
L6 ADEFB
L7 HBCDEG

To write the KVL equations for each loop, traverse each loop in the direction
indicated in Table 1, and record the voltage rises and drops as encountered. You
should be able to derive equations (5) to (11).

L1 : vH − vA + vD + vE − vG = 0 (5)
L2 : −vH + vG + vF − vB = 0 (6)
L3 : vF − vC + vD + vE = 0 (7)
L4 : vB − vC + vA = 0 (8)
L5 : vH − vA + vC − vF − vG = 0 (9)
L6 : −vA + vD + vE + vF − vB = 0 (10)
L7 : vH + vB − vC + vD + vE − vG = 0 (11)

All of these equations must be satisfied at all times. However, in order to solve
the circuit, do we really need all these equations? It turns out that we don’t, since
some of the equations can be derived from others. For example, the equation for L1
can be found by adding the equation for L3 to the equation for L5.
As it turns out, if we have b branches and n nodes, then we need to write b−n+ 1
equations. However, we can’t just randomly choose the loops to use. Later we will
learn how to choose the right loops.

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